java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-tiling/pr2_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:29:00,360 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:29:00,362 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:29:00,380 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:29:00,380 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:29:00,381 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:29:00,382 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:29:00,384 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:29:00,386 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:29:00,387 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:29:00,388 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:29:00,388 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:29:00,389 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:29:00,390 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:29:00,393 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:29:00,394 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:29:00,395 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:29:00,400 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:29:00,404 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:29:00,405 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:29:00,409 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:29:00,412 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:29:00,418 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:29:00,418 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:29:00,418 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:29:00,419 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:29:00,424 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:29:00,424 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:29:00,429 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:29:00,430 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:29:00,430 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:29:00,430 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:29:00,431 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:29:00,431 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:29:00,432 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:29:00,432 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:29:00,434 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:29:00,453 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:29:00,453 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:29:00,454 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:29:00,454 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:29:00,455 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:29:00,455 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:29:00,455 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:29:00,455 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:29:00,456 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:29:00,456 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:29:00,456 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:29:00,456 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:29:00,456 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:29:00,457 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:29:00,457 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:29:00,457 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:29:00,457 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:29:00,457 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:29:00,457 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:29:00,458 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:29:00,458 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:29:00,458 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:29:00,458 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:29:00,458 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:29:00,459 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:29:00,459 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:29:00,459 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:29:00,459 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:29:00,459 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:29:00,460 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:29:00,460 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:29:00,460 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:29:00,460 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:29:00,521 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:29:00,536 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:29:00,540 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:29:00,542 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:29:00,542 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:29:00,543 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/pr2_true-unreach-call.i [2018-11-23 10:29:00,609 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/51d741b2a/2b53bb0cc9dd44fdb9c4476633d80fc7/FLAG9d3ce9d8e [2018-11-23 10:29:01,084 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:29:01,085 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/pr2_true-unreach-call.i [2018-11-23 10:29:01,093 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/51d741b2a/2b53bb0cc9dd44fdb9c4476633d80fc7/FLAG9d3ce9d8e [2018-11-23 10:29:01,456 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/51d741b2a/2b53bb0cc9dd44fdb9c4476633d80fc7 [2018-11-23 10:29:01,467 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:29:01,468 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:29:01,469 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:29:01,469 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:29:01,473 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:29:01,475 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,478 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d11a47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01, skipping insertion in model container [2018-11-23 10:29:01,478 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,489 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:29:01,523 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:29:01,774 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:29:01,780 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:29:01,812 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:29:01,839 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:29:01,840 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01 WrapperNode [2018-11-23 10:29:01,840 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:29:01,841 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:29:01,841 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:29:01,841 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:29:01,852 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,863 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,872 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:29:01,873 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:29:01,873 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:29:01,873 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:29:01,885 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,885 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,888 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,888 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,903 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,913 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,917 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... [2018-11-23 10:29:01,922 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:29:01,922 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:29:01,926 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:29:01,926 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:29:01,929 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:29:02,097 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:29:02,097 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:29:02,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:29:02,098 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:29:02,098 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:29:02,098 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:29:02,098 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:29:02,099 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:29:02,099 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:29:02,099 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:29:02,099 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:29:02,100 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:29:02,898 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:29:02,898 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-11-23 10:29:02,899 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:29:02 BoogieIcfgContainer [2018-11-23 10:29:02,899 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:29:02,900 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:29:02,901 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:29:02,904 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:29:02,905 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:29:01" (1/3) ... [2018-11-23 10:29:02,906 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36265ed3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:29:02, skipping insertion in model container [2018-11-23 10:29:02,906 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:01" (2/3) ... [2018-11-23 10:29:02,906 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36265ed3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:29:02, skipping insertion in model container [2018-11-23 10:29:02,906 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:29:02" (3/3) ... [2018-11-23 10:29:02,908 INFO L112 eAbstractionObserver]: Analyzing ICFG pr2_true-unreach-call.i [2018-11-23 10:29:02,919 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:29:02,929 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:29:02,948 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:29:02,983 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:29:02,984 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:29:02,984 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:29:02,984 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:29:02,985 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:29:02,985 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:29:02,985 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:29:02,986 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:29:02,986 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:29:03,005 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states. [2018-11-23 10:29:03,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 10:29:03,012 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:03,013 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:03,015 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:03,021 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:03,022 INFO L82 PathProgramCache]: Analyzing trace with hash 435909, now seen corresponding path program 1 times [2018-11-23 10:29:03,025 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:03,026 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:03,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:03,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:03,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:03,129 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:03,605 INFO L256 TraceCheckUtils]: 0: Hoare triple {33#true} call ULTIMATE.init(); {33#true} is VALID [2018-11-23 10:29:03,609 INFO L273 TraceCheckUtils]: 1: Hoare triple {33#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {33#true} is VALID [2018-11-23 10:29:03,610 INFO L273 TraceCheckUtils]: 2: Hoare triple {33#true} assume true; {33#true} is VALID [2018-11-23 10:29:03,610 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {33#true} {33#true} #77#return; {33#true} is VALID [2018-11-23 10:29:03,610 INFO L256 TraceCheckUtils]: 4: Hoare triple {33#true} call #t~ret7 := main(); {33#true} is VALID [2018-11-23 10:29:03,611 INFO L273 TraceCheckUtils]: 5: Hoare triple {33#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {33#true} is VALID [2018-11-23 10:29:03,611 INFO L273 TraceCheckUtils]: 6: Hoare triple {33#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {33#true} is VALID [2018-11-23 10:29:03,611 INFO L273 TraceCheckUtils]: 7: Hoare triple {33#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {33#true} is VALID [2018-11-23 10:29:03,611 INFO L273 TraceCheckUtils]: 8: Hoare triple {33#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {33#true} is VALID [2018-11-23 10:29:03,612 INFO L273 TraceCheckUtils]: 9: Hoare triple {33#true} ~i~0 := 0bv32; {33#true} is VALID [2018-11-23 10:29:03,612 INFO L273 TraceCheckUtils]: 10: Hoare triple {33#true} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {33#true} is VALID [2018-11-23 10:29:03,613 INFO L273 TraceCheckUtils]: 11: Hoare triple {33#true} assume #t~short6; {71#|main_#t~short6|} is VALID [2018-11-23 10:29:03,614 INFO L256 TraceCheckUtils]: 12: Hoare triple {71#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {75#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:03,617 INFO L273 TraceCheckUtils]: 13: Hoare triple {75#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {79#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:03,628 INFO L273 TraceCheckUtils]: 14: Hoare triple {79#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {34#false} is VALID [2018-11-23 10:29:03,628 INFO L273 TraceCheckUtils]: 15: Hoare triple {34#false} assume !false; {34#false} is VALID [2018-11-23 10:29:03,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:03,632 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:03,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:03,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:29:03,649 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 10:29:03,652 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:03,656 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:29:03,735 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:03,735 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:29:03,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:29:03,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:29:03,746 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 5 states. [2018-11-23 10:29:04,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:04,581 INFO L93 Difference]: Finished difference Result 54 states and 69 transitions. [2018-11-23 10:29:04,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:29:04,581 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 10:29:04,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:04,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:29:04,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 69 transitions. [2018-11-23 10:29:04,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:29:04,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 69 transitions. [2018-11-23 10:29:04,601 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 69 transitions. [2018-11-23 10:29:05,080 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:05,092 INFO L225 Difference]: With dead ends: 54 [2018-11-23 10:29:05,092 INFO L226 Difference]: Without dead ends: 30 [2018-11-23 10:29:05,096 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:29:05,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-11-23 10:29:05,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2018-11-23 10:29:05,141 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:05,142 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand 29 states. [2018-11-23 10:29:05,142 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 29 states. [2018-11-23 10:29:05,143 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 29 states. [2018-11-23 10:29:05,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:05,147 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-11-23 10:29:05,147 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2018-11-23 10:29:05,148 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:05,148 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:05,149 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 30 states. [2018-11-23 10:29:05,149 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 30 states. [2018-11-23 10:29:05,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:05,153 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-11-23 10:29:05,153 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2018-11-23 10:29:05,154 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:05,154 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:05,154 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:05,155 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:05,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-23 10:29:05,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2018-11-23 10:29:05,160 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 16 [2018-11-23 10:29:05,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:05,161 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2018-11-23 10:29:05,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:29:05,161 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2018-11-23 10:29:05,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 10:29:05,162 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:05,162 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:05,163 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:05,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:05,163 INFO L82 PathProgramCache]: Analyzing trace with hash 2282951, now seen corresponding path program 1 times [2018-11-23 10:29:05,164 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:05,164 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:05,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:05,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:05,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:05,251 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:05,367 INFO L256 TraceCheckUtils]: 0: Hoare triple {253#true} call ULTIMATE.init(); {253#true} is VALID [2018-11-23 10:29:05,368 INFO L273 TraceCheckUtils]: 1: Hoare triple {253#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {253#true} is VALID [2018-11-23 10:29:05,368 INFO L273 TraceCheckUtils]: 2: Hoare triple {253#true} assume true; {253#true} is VALID [2018-11-23 10:29:05,369 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {253#true} {253#true} #77#return; {253#true} is VALID [2018-11-23 10:29:05,370 INFO L256 TraceCheckUtils]: 4: Hoare triple {253#true} call #t~ret7 := main(); {253#true} is VALID [2018-11-23 10:29:05,370 INFO L273 TraceCheckUtils]: 5: Hoare triple {253#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {253#true} is VALID [2018-11-23 10:29:05,392 INFO L273 TraceCheckUtils]: 6: Hoare triple {253#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {276#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:29:05,401 INFO L273 TraceCheckUtils]: 7: Hoare triple {276#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {280#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:05,421 INFO L273 TraceCheckUtils]: 8: Hoare triple {280#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {254#false} is VALID [2018-11-23 10:29:05,422 INFO L273 TraceCheckUtils]: 9: Hoare triple {254#false} ~i~0 := 0bv32; {254#false} is VALID [2018-11-23 10:29:05,422 INFO L273 TraceCheckUtils]: 10: Hoare triple {254#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {254#false} is VALID [2018-11-23 10:29:05,422 INFO L273 TraceCheckUtils]: 11: Hoare triple {254#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {254#false} is VALID [2018-11-23 10:29:05,423 INFO L256 TraceCheckUtils]: 12: Hoare triple {254#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {254#false} is VALID [2018-11-23 10:29:05,423 INFO L273 TraceCheckUtils]: 13: Hoare triple {254#false} ~cond := #in~cond; {254#false} is VALID [2018-11-23 10:29:05,423 INFO L273 TraceCheckUtils]: 14: Hoare triple {254#false} assume 0bv32 == ~cond; {254#false} is VALID [2018-11-23 10:29:05,423 INFO L273 TraceCheckUtils]: 15: Hoare triple {254#false} assume !false; {254#false} is VALID [2018-11-23 10:29:05,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:05,426 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:05,427 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:05,427 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:29:05,429 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-23 10:29:05,429 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:05,429 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:29:05,468 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:05,469 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:29:05,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:29:05,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:29:05,470 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 4 states. [2018-11-23 10:29:05,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:05,910 INFO L93 Difference]: Finished difference Result 50 states and 58 transitions. [2018-11-23 10:29:05,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:29:05,911 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-23 10:29:05,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:05,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:05,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 48 transitions. [2018-11-23 10:29:05,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:05,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 48 transitions. [2018-11-23 10:29:05,918 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 48 transitions. [2018-11-23 10:29:06,108 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:06,113 INFO L225 Difference]: With dead ends: 50 [2018-11-23 10:29:06,113 INFO L226 Difference]: Without dead ends: 33 [2018-11-23 10:29:06,115 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:29:06,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-11-23 10:29:06,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 30. [2018-11-23 10:29:06,150 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:06,150 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand 30 states. [2018-11-23 10:29:06,150 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 30 states. [2018-11-23 10:29:06,150 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 30 states. [2018-11-23 10:29:06,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:06,153 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2018-11-23 10:29:06,154 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2018-11-23 10:29:06,156 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:06,156 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:06,156 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 33 states. [2018-11-23 10:29:06,157 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 33 states. [2018-11-23 10:29:06,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:06,162 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2018-11-23 10:29:06,162 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2018-11-23 10:29:06,162 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:06,163 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:06,163 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:06,163 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:06,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 10:29:06,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 34 transitions. [2018-11-23 10:29:06,166 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 34 transitions. Word has length 16 [2018-11-23 10:29:06,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:06,166 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 34 transitions. [2018-11-23 10:29:06,166 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:29:06,166 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2018-11-23 10:29:06,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 10:29:06,167 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:06,168 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:06,168 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:06,168 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:06,168 INFO L82 PathProgramCache]: Analyzing trace with hash -1753718226, now seen corresponding path program 1 times [2018-11-23 10:29:06,169 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:06,169 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:06,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:06,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:06,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:06,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:06,493 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:29:06,504 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:29:06,506 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:06,511 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:06,539 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:06,540 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-11-23 10:29:06,656 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-23 10:29:06,675 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:06,677 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:06,679 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-11-23 10:29:06,687 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:06,703 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:06,725 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:06,725 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:30, output treesize:23 [2018-11-23 10:29:07,319 WARN L180 SmtUtils]: Spent 229.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 19 [2018-11-23 10:29:07,368 INFO L256 TraceCheckUtils]: 0: Hoare triple {477#true} call ULTIMATE.init(); {477#true} is VALID [2018-11-23 10:29:07,369 INFO L273 TraceCheckUtils]: 1: Hoare triple {477#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {477#true} is VALID [2018-11-23 10:29:07,369 INFO L273 TraceCheckUtils]: 2: Hoare triple {477#true} assume true; {477#true} is VALID [2018-11-23 10:29:07,369 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {477#true} {477#true} #77#return; {477#true} is VALID [2018-11-23 10:29:07,370 INFO L256 TraceCheckUtils]: 4: Hoare triple {477#true} call #t~ret7 := main(); {477#true} is VALID [2018-11-23 10:29:07,370 INFO L273 TraceCheckUtils]: 5: Hoare triple {477#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {477#true} is VALID [2018-11-23 10:29:07,371 INFO L273 TraceCheckUtils]: 6: Hoare triple {477#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {500#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:07,372 INFO L273 TraceCheckUtils]: 7: Hoare triple {500#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {504#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,373 INFO L273 TraceCheckUtils]: 8: Hoare triple {504#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {504#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,376 INFO L273 TraceCheckUtils]: 9: Hoare triple {504#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {511#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,378 INFO L273 TraceCheckUtils]: 10: Hoare triple {511#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {515#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,379 INFO L273 TraceCheckUtils]: 11: Hoare triple {515#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {515#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,380 INFO L273 TraceCheckUtils]: 12: Hoare triple {515#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {515#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,381 INFO L273 TraceCheckUtils]: 13: Hoare triple {515#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} ~i~0 := 0bv32; {525#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,382 INFO L273 TraceCheckUtils]: 14: Hoare triple {525#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {529#(and |main_#t~short6| (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:07,383 INFO L273 TraceCheckUtils]: 15: Hoare triple {529#(and |main_#t~short6| (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {478#false} is VALID [2018-11-23 10:29:07,384 INFO L256 TraceCheckUtils]: 16: Hoare triple {478#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {478#false} is VALID [2018-11-23 10:29:07,384 INFO L273 TraceCheckUtils]: 17: Hoare triple {478#false} ~cond := #in~cond; {478#false} is VALID [2018-11-23 10:29:07,384 INFO L273 TraceCheckUtils]: 18: Hoare triple {478#false} assume 0bv32 == ~cond; {478#false} is VALID [2018-11-23 10:29:07,385 INFO L273 TraceCheckUtils]: 19: Hoare triple {478#false} assume !false; {478#false} is VALID [2018-11-23 10:29:07,389 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:07,390 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:07,857 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-11-23 10:29:07,864 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 38 [2018-11-23 10:29:10,081 WARN L670 Elim1Store]: solver failed to check if following equality is implied: (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32))) [2018-11-23 10:29:10,087 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:10,087 INFO L303 Elim1Store]: Index analysis took 2130 ms [2018-11-23 10:29:10,089 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-11-23 10:29:10,096 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:10,119 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:10,135 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:10,174 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:10,174 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:55, output treesize:23 [2018-11-23 10:29:10,183 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:10,184 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~MINVAL~0]. (let ((.cse0 (select (let ((.cse1 (bvmul (_ bv8 32) main_~i~0))) (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967292 32)) main_~CCCELVOL1~0)) |main_~#volArray~0.offset|))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge .cse0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) .cse0))) [2018-11-23 10:29:10,184 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [main_~MINVAL~0, v_arrayElimCell_4]. (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_4) (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32))) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_4 main_~MINVAL~0)) [2018-11-23 10:29:10,305 INFO L273 TraceCheckUtils]: 19: Hoare triple {478#false} assume !false; {478#false} is VALID [2018-11-23 10:29:10,306 INFO L273 TraceCheckUtils]: 18: Hoare triple {548#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {478#false} is VALID [2018-11-23 10:29:10,307 INFO L273 TraceCheckUtils]: 17: Hoare triple {552#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {548#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:29:10,308 INFO L256 TraceCheckUtils]: 16: Hoare triple {556#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {552#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:29:10,309 INFO L273 TraceCheckUtils]: 15: Hoare triple {560#(or |main_#t~short6| (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {556#|main_#t~short6|} is VALID [2018-11-23 10:29:10,312 INFO L273 TraceCheckUtils]: 14: Hoare triple {564#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {560#(or |main_#t~short6| (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-23 10:29:10,314 INFO L273 TraceCheckUtils]: 13: Hoare triple {568#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} ~i~0 := 0bv32; {564#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-23 10:29:10,315 INFO L273 TraceCheckUtils]: 12: Hoare triple {568#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {568#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:10,316 INFO L273 TraceCheckUtils]: 11: Hoare triple {568#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {568#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:10,325 INFO L273 TraceCheckUtils]: 10: Hoare triple {578#(or (= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {568#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:10,358 INFO L273 TraceCheckUtils]: 9: Hoare triple {582#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_4) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_4 main_~MINVAL~0))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {578#(or (= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:10,359 INFO L273 TraceCheckUtils]: 8: Hoare triple {582#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_4) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_4 main_~MINVAL~0))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {582#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_4) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_4 main_~MINVAL~0))))} is VALID [2018-11-23 10:29:10,360 INFO L273 TraceCheckUtils]: 7: Hoare triple {477#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {582#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_4) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_4 main_~MINVAL~0))))} is VALID [2018-11-23 10:29:10,360 INFO L273 TraceCheckUtils]: 6: Hoare triple {477#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {477#true} is VALID [2018-11-23 10:29:10,360 INFO L273 TraceCheckUtils]: 5: Hoare triple {477#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {477#true} is VALID [2018-11-23 10:29:10,361 INFO L256 TraceCheckUtils]: 4: Hoare triple {477#true} call #t~ret7 := main(); {477#true} is VALID [2018-11-23 10:29:10,361 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {477#true} {477#true} #77#return; {477#true} is VALID [2018-11-23 10:29:10,361 INFO L273 TraceCheckUtils]: 2: Hoare triple {477#true} assume true; {477#true} is VALID [2018-11-23 10:29:10,362 INFO L273 TraceCheckUtils]: 1: Hoare triple {477#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {477#true} is VALID [2018-11-23 10:29:10,362 INFO L256 TraceCheckUtils]: 0: Hoare triple {477#true} call ULTIMATE.init(); {477#true} is VALID [2018-11-23 10:29:10,366 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:10,369 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:10,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10] total 16 [2018-11-23 10:29:10,369 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 20 [2018-11-23 10:29:10,370 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:10,370 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:29:10,603 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:10,604 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:29:10,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:29:10,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=196, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:29:10,605 INFO L87 Difference]: Start difference. First operand 30 states and 34 transitions. Second operand 16 states. [2018-11-23 10:29:18,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:18,211 INFO L93 Difference]: Finished difference Result 91 states and 115 transitions. [2018-11-23 10:29:18,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 10:29:18,211 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 20 [2018-11-23 10:29:18,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:18,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:29:18,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 105 transitions. [2018-11-23 10:29:18,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:29:18,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 105 transitions. [2018-11-23 10:29:18,224 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 105 transitions. [2018-11-23 10:29:20,922 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 104 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:20,927 INFO L225 Difference]: With dead ends: 91 [2018-11-23 10:29:20,928 INFO L226 Difference]: Without dead ends: 70 [2018-11-23 10:29:20,929 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=238, Invalid=818, Unknown=0, NotChecked=0, Total=1056 [2018-11-23 10:29:20,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-11-23 10:29:21,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 51. [2018-11-23 10:29:21,018 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:21,018 INFO L82 GeneralOperation]: Start isEquivalent. First operand 70 states. Second operand 51 states. [2018-11-23 10:29:21,018 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand 51 states. [2018-11-23 10:29:21,019 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 51 states. [2018-11-23 10:29:21,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:21,025 INFO L93 Difference]: Finished difference Result 70 states and 85 transitions. [2018-11-23 10:29:21,025 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 85 transitions. [2018-11-23 10:29:21,026 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:21,027 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:21,027 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand 70 states. [2018-11-23 10:29:21,027 INFO L87 Difference]: Start difference. First operand 51 states. Second operand 70 states. [2018-11-23 10:29:21,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:21,032 INFO L93 Difference]: Finished difference Result 70 states and 85 transitions. [2018-11-23 10:29:21,032 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 85 transitions. [2018-11-23 10:29:21,033 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:21,034 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:21,034 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:21,034 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:21,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-11-23 10:29:21,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 60 transitions. [2018-11-23 10:29:21,037 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 60 transitions. Word has length 20 [2018-11-23 10:29:21,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:21,038 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 60 transitions. [2018-11-23 10:29:21,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:29:21,038 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 60 transitions. [2018-11-23 10:29:21,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 10:29:21,040 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:21,040 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:21,040 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:21,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:21,040 INFO L82 PathProgramCache]: Analyzing trace with hash -269205759, now seen corresponding path program 1 times [2018-11-23 10:29:21,041 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:21,041 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:21,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:21,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:21,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:21,123 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:21,183 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-23 10:29:21,188 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-23 10:29:21,190 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:21,192 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:21,201 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:21,202 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-11-23 10:29:21,616 INFO L256 TraceCheckUtils]: 0: Hoare triple {975#true} call ULTIMATE.init(); {975#true} is VALID [2018-11-23 10:29:21,616 INFO L273 TraceCheckUtils]: 1: Hoare triple {975#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {975#true} is VALID [2018-11-23 10:29:21,617 INFO L273 TraceCheckUtils]: 2: Hoare triple {975#true} assume true; {975#true} is VALID [2018-11-23 10:29:21,617 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {975#true} {975#true} #77#return; {975#true} is VALID [2018-11-23 10:29:21,617 INFO L256 TraceCheckUtils]: 4: Hoare triple {975#true} call #t~ret7 := main(); {975#true} is VALID [2018-11-23 10:29:21,617 INFO L273 TraceCheckUtils]: 5: Hoare triple {975#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {975#true} is VALID [2018-11-23 10:29:21,618 INFO L273 TraceCheckUtils]: 6: Hoare triple {975#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {998#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:29:21,618 INFO L273 TraceCheckUtils]: 7: Hoare triple {998#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1002#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,619 INFO L273 TraceCheckUtils]: 8: Hoare triple {1002#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {1002#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,619 INFO L273 TraceCheckUtils]: 9: Hoare triple {1002#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {1002#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,621 INFO L273 TraceCheckUtils]: 10: Hoare triple {1002#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {1012#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,622 INFO L273 TraceCheckUtils]: 11: Hoare triple {1012#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1012#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,624 INFO L273 TraceCheckUtils]: 12: Hoare triple {1012#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {1012#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,625 INFO L273 TraceCheckUtils]: 13: Hoare triple {1012#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} ~i~0 := 0bv32; {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,625 INFO L273 TraceCheckUtils]: 14: Hoare triple {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,626 INFO L273 TraceCheckUtils]: 15: Hoare triple {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume #t~short6; {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,627 INFO L256 TraceCheckUtils]: 16: Hoare triple {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} is VALID [2018-11-23 10:29:21,628 INFO L273 TraceCheckUtils]: 17: Hoare triple {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} ~cond := #in~cond; {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} is VALID [2018-11-23 10:29:21,630 INFO L273 TraceCheckUtils]: 18: Hoare triple {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} assume !(0bv32 == ~cond); {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} is VALID [2018-11-23 10:29:21,630 INFO L273 TraceCheckUtils]: 19: Hoare triple {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} assume true; {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} is VALID [2018-11-23 10:29:21,631 INFO L268 TraceCheckUtils]: 20: Hoare quadruple {1032#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32))))} {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #81#return; {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,632 INFO L273 TraceCheckUtils]: 21: Hoare triple {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,632 INFO L273 TraceCheckUtils]: 22: Hoare triple {1022#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1051#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,633 INFO L273 TraceCheckUtils]: 23: Hoare triple {1051#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1051#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:21,639 INFO L273 TraceCheckUtils]: 24: Hoare triple {1051#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {1058#|main_#t~short6|} is VALID [2018-11-23 10:29:21,640 INFO L256 TraceCheckUtils]: 25: Hoare triple {1058#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1062#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:21,641 INFO L273 TraceCheckUtils]: 26: Hoare triple {1062#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1066#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:21,644 INFO L273 TraceCheckUtils]: 27: Hoare triple {1066#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {976#false} is VALID [2018-11-23 10:29:21,644 INFO L273 TraceCheckUtils]: 28: Hoare triple {976#false} assume !false; {976#false} is VALID [2018-11-23 10:29:21,647 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:21,648 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:21,990 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:29:22,029 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:29:22,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:22,033 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:22,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:22,036 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-11-23 10:29:22,041 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:22,041 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) [2018-11-23 10:29:22,041 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) [2018-11-23 10:29:22,126 INFO L273 TraceCheckUtils]: 28: Hoare triple {976#false} assume !false; {976#false} is VALID [2018-11-23 10:29:22,127 INFO L273 TraceCheckUtils]: 27: Hoare triple {1076#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {976#false} is VALID [2018-11-23 10:29:22,131 INFO L273 TraceCheckUtils]: 26: Hoare triple {1080#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1076#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:29:22,132 INFO L256 TraceCheckUtils]: 25: Hoare triple {1058#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1080#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:29:22,132 INFO L273 TraceCheckUtils]: 24: Hoare triple {1087#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {1058#|main_#t~short6|} is VALID [2018-11-23 10:29:22,137 INFO L273 TraceCheckUtils]: 23: Hoare triple {1087#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1087#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:29:22,336 INFO L273 TraceCheckUtils]: 22: Hoare triple {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1087#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:29:22,336 INFO L273 TraceCheckUtils]: 21: Hoare triple {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:29:22,337 INFO L268 TraceCheckUtils]: 20: Hoare quadruple {975#true} {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #81#return; {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:29:22,338 INFO L273 TraceCheckUtils]: 19: Hoare triple {975#true} assume true; {975#true} is VALID [2018-11-23 10:29:22,338 INFO L273 TraceCheckUtils]: 18: Hoare triple {975#true} assume !(0bv32 == ~cond); {975#true} is VALID [2018-11-23 10:29:22,338 INFO L273 TraceCheckUtils]: 17: Hoare triple {975#true} ~cond := #in~cond; {975#true} is VALID [2018-11-23 10:29:22,338 INFO L256 TraceCheckUtils]: 16: Hoare triple {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {975#true} is VALID [2018-11-23 10:29:22,339 INFO L273 TraceCheckUtils]: 15: Hoare triple {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume #t~short6; {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:29:22,339 INFO L273 TraceCheckUtils]: 14: Hoare triple {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:29:22,341 INFO L273 TraceCheckUtils]: 13: Hoare triple {1122#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} ~i~0 := 0bv32; {1094#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:29:22,341 INFO L273 TraceCheckUtils]: 12: Hoare triple {1122#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {1122#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} is VALID [2018-11-23 10:29:22,342 INFO L273 TraceCheckUtils]: 11: Hoare triple {1122#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1122#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} is VALID [2018-11-23 10:29:22,344 INFO L273 TraceCheckUtils]: 10: Hoare triple {1132#(= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {1122#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} is VALID [2018-11-23 10:29:22,344 INFO L273 TraceCheckUtils]: 9: Hoare triple {1132#(= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {1132#(= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0))} is VALID [2018-11-23 10:29:22,359 INFO L273 TraceCheckUtils]: 8: Hoare triple {1132#(= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {1132#(= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0))} is VALID [2018-11-23 10:29:22,360 INFO L273 TraceCheckUtils]: 7: Hoare triple {975#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1132#(= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0))} is VALID [2018-11-23 10:29:22,360 INFO L273 TraceCheckUtils]: 6: Hoare triple {975#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {975#true} is VALID [2018-11-23 10:29:22,361 INFO L273 TraceCheckUtils]: 5: Hoare triple {975#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {975#true} is VALID [2018-11-23 10:29:22,361 INFO L256 TraceCheckUtils]: 4: Hoare triple {975#true} call #t~ret7 := main(); {975#true} is VALID [2018-11-23 10:29:22,361 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {975#true} {975#true} #77#return; {975#true} is VALID [2018-11-23 10:29:22,361 INFO L273 TraceCheckUtils]: 2: Hoare triple {975#true} assume true; {975#true} is VALID [2018-11-23 10:29:22,362 INFO L273 TraceCheckUtils]: 1: Hoare triple {975#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {975#true} is VALID [2018-11-23 10:29:22,362 INFO L256 TraceCheckUtils]: 0: Hoare triple {975#true} call ULTIMATE.init(); {975#true} is VALID [2018-11-23 10:29:22,363 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:22,365 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:22,365 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 17 [2018-11-23 10:29:22,366 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-11-23 10:29:22,366 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:22,366 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 10:29:22,722 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:22,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 10:29:22,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 10:29:22,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:29:22,724 INFO L87 Difference]: Start difference. First operand 51 states and 60 transitions. Second operand 17 states. [2018-11-23 10:29:28,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:28,772 INFO L93 Difference]: Finished difference Result 101 states and 119 transitions. [2018-11-23 10:29:28,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 10:29:28,773 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-11-23 10:29:28,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:28,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:29:28,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 86 transitions. [2018-11-23 10:29:28,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:29:28,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 86 transitions. [2018-11-23 10:29:28,781 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 86 transitions. [2018-11-23 10:29:29,022 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:29,027 INFO L225 Difference]: With dead ends: 101 [2018-11-23 10:29:29,027 INFO L226 Difference]: Without dead ends: 99 [2018-11-23 10:29:29,028 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 42 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=111, Invalid=489, Unknown=0, NotChecked=0, Total=600 [2018-11-23 10:29:29,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-23 10:29:29,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 87. [2018-11-23 10:29:29,239 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:29,239 INFO L82 GeneralOperation]: Start isEquivalent. First operand 99 states. Second operand 87 states. [2018-11-23 10:29:29,239 INFO L74 IsIncluded]: Start isIncluded. First operand 99 states. Second operand 87 states. [2018-11-23 10:29:29,239 INFO L87 Difference]: Start difference. First operand 99 states. Second operand 87 states. [2018-11-23 10:29:29,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:29,245 INFO L93 Difference]: Finished difference Result 99 states and 117 transitions. [2018-11-23 10:29:29,245 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 117 transitions. [2018-11-23 10:29:29,247 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:29,247 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:29,247 INFO L74 IsIncluded]: Start isIncluded. First operand 87 states. Second operand 99 states. [2018-11-23 10:29:29,247 INFO L87 Difference]: Start difference. First operand 87 states. Second operand 99 states. [2018-11-23 10:29:29,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:29,253 INFO L93 Difference]: Finished difference Result 99 states and 117 transitions. [2018-11-23 10:29:29,253 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 117 transitions. [2018-11-23 10:29:29,255 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:29,255 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:29,255 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:29,255 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:29,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-11-23 10:29:29,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 104 transitions. [2018-11-23 10:29:29,260 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 104 transitions. Word has length 29 [2018-11-23 10:29:29,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:29,261 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 104 transitions. [2018-11-23 10:29:29,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 10:29:29,261 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 104 transitions. [2018-11-23 10:29:29,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 10:29:29,262 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:29,262 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:29,263 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:29,263 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:29,263 INFO L82 PathProgramCache]: Analyzing trace with hash 602089533, now seen corresponding path program 1 times [2018-11-23 10:29:29,263 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:29,263 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:29,295 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:29,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:29,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:29,359 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:29,432 INFO L256 TraceCheckUtils]: 0: Hoare triple {1631#true} call ULTIMATE.init(); {1631#true} is VALID [2018-11-23 10:29:29,432 INFO L273 TraceCheckUtils]: 1: Hoare triple {1631#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1631#true} is VALID [2018-11-23 10:29:29,432 INFO L273 TraceCheckUtils]: 2: Hoare triple {1631#true} assume true; {1631#true} is VALID [2018-11-23 10:29:29,433 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1631#true} {1631#true} #77#return; {1631#true} is VALID [2018-11-23 10:29:29,433 INFO L256 TraceCheckUtils]: 4: Hoare triple {1631#true} call #t~ret7 := main(); {1631#true} is VALID [2018-11-23 10:29:29,433 INFO L273 TraceCheckUtils]: 5: Hoare triple {1631#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1631#true} is VALID [2018-11-23 10:29:29,434 INFO L273 TraceCheckUtils]: 6: Hoare triple {1631#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1654#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} is VALID [2018-11-23 10:29:29,434 INFO L273 TraceCheckUtils]: 7: Hoare triple {1654#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1654#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} is VALID [2018-11-23 10:29:29,435 INFO L273 TraceCheckUtils]: 8: Hoare triple {1654#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {1654#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} is VALID [2018-11-23 10:29:29,435 INFO L273 TraceCheckUtils]: 9: Hoare triple {1654#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {1664#(and (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv3 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:29:29,437 INFO L273 TraceCheckUtils]: 10: Hoare triple {1664#(and (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv3 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {1632#false} is VALID [2018-11-23 10:29:29,437 INFO L273 TraceCheckUtils]: 11: Hoare triple {1632#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1632#false} is VALID [2018-11-23 10:29:29,438 INFO L273 TraceCheckUtils]: 12: Hoare triple {1632#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {1632#false} is VALID [2018-11-23 10:29:29,438 INFO L273 TraceCheckUtils]: 13: Hoare triple {1632#false} ~i~0 := 0bv32; {1632#false} is VALID [2018-11-23 10:29:29,438 INFO L273 TraceCheckUtils]: 14: Hoare triple {1632#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1632#false} is VALID [2018-11-23 10:29:29,438 INFO L273 TraceCheckUtils]: 15: Hoare triple {1632#false} assume #t~short6; {1632#false} is VALID [2018-11-23 10:29:29,438 INFO L256 TraceCheckUtils]: 16: Hoare triple {1632#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1632#false} is VALID [2018-11-23 10:29:29,439 INFO L273 TraceCheckUtils]: 17: Hoare triple {1632#false} ~cond := #in~cond; {1632#false} is VALID [2018-11-23 10:29:29,439 INFO L273 TraceCheckUtils]: 18: Hoare triple {1632#false} assume !(0bv32 == ~cond); {1632#false} is VALID [2018-11-23 10:29:29,439 INFO L273 TraceCheckUtils]: 19: Hoare triple {1632#false} assume true; {1632#false} is VALID [2018-11-23 10:29:29,439 INFO L268 TraceCheckUtils]: 20: Hoare quadruple {1632#false} {1632#false} #81#return; {1632#false} is VALID [2018-11-23 10:29:29,440 INFO L273 TraceCheckUtils]: 21: Hoare triple {1632#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {1632#false} is VALID [2018-11-23 10:29:29,440 INFO L273 TraceCheckUtils]: 22: Hoare triple {1632#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1632#false} is VALID [2018-11-23 10:29:29,440 INFO L273 TraceCheckUtils]: 23: Hoare triple {1632#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1632#false} is VALID [2018-11-23 10:29:29,440 INFO L273 TraceCheckUtils]: 24: Hoare triple {1632#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {1632#false} is VALID [2018-11-23 10:29:29,440 INFO L256 TraceCheckUtils]: 25: Hoare triple {1632#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1632#false} is VALID [2018-11-23 10:29:29,440 INFO L273 TraceCheckUtils]: 26: Hoare triple {1632#false} ~cond := #in~cond; {1632#false} is VALID [2018-11-23 10:29:29,441 INFO L273 TraceCheckUtils]: 27: Hoare triple {1632#false} assume 0bv32 == ~cond; {1632#false} is VALID [2018-11-23 10:29:29,441 INFO L273 TraceCheckUtils]: 28: Hoare triple {1632#false} assume !false; {1632#false} is VALID [2018-11-23 10:29:29,442 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:29:29,442 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:29,443 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:29,444 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:29:29,444 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2018-11-23 10:29:29,444 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:29,444 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:29:29,501 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:29,502 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:29:29,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:29:29,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:29:29,503 INFO L87 Difference]: Start difference. First operand 87 states and 104 transitions. Second operand 4 states. [2018-11-23 10:29:30,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:30,113 INFO L93 Difference]: Finished difference Result 185 states and 234 transitions. [2018-11-23 10:29:30,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:29:30,113 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2018-11-23 10:29:30,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:30,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:30,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 63 transitions. [2018-11-23 10:29:30,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:30,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 63 transitions. [2018-11-23 10:29:30,118 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 63 transitions. [2018-11-23 10:29:30,295 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:30,300 INFO L225 Difference]: With dead ends: 185 [2018-11-23 10:29:30,300 INFO L226 Difference]: Without dead ends: 121 [2018-11-23 10:29:30,301 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:29:30,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-11-23 10:29:30,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 95. [2018-11-23 10:29:30,464 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:30,464 INFO L82 GeneralOperation]: Start isEquivalent. First operand 121 states. Second operand 95 states. [2018-11-23 10:29:30,464 INFO L74 IsIncluded]: Start isIncluded. First operand 121 states. Second operand 95 states. [2018-11-23 10:29:30,464 INFO L87 Difference]: Start difference. First operand 121 states. Second operand 95 states. [2018-11-23 10:29:30,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:30,471 INFO L93 Difference]: Finished difference Result 121 states and 153 transitions. [2018-11-23 10:29:30,471 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2018-11-23 10:29:30,472 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:30,472 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:30,472 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand 121 states. [2018-11-23 10:29:30,473 INFO L87 Difference]: Start difference. First operand 95 states. Second operand 121 states. [2018-11-23 10:29:30,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:30,479 INFO L93 Difference]: Finished difference Result 121 states and 153 transitions. [2018-11-23 10:29:30,479 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2018-11-23 10:29:30,480 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:30,480 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:30,480 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:30,481 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:30,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-11-23 10:29:30,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 114 transitions. [2018-11-23 10:29:30,485 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 114 transitions. Word has length 29 [2018-11-23 10:29:30,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:30,485 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 114 transitions. [2018-11-23 10:29:30,486 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:29:30,486 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 114 transitions. [2018-11-23 10:29:30,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 10:29:30,487 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:30,487 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:30,487 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:30,487 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:30,487 INFO L82 PathProgramCache]: Analyzing trace with hash -833830662, now seen corresponding path program 1 times [2018-11-23 10:29:30,488 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:30,488 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:30,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:30,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:30,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:30,551 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:30,597 INFO L256 TraceCheckUtils]: 0: Hoare triple {2346#true} call ULTIMATE.init(); {2346#true} is VALID [2018-11-23 10:29:30,597 INFO L273 TraceCheckUtils]: 1: Hoare triple {2346#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2346#true} is VALID [2018-11-23 10:29:30,598 INFO L273 TraceCheckUtils]: 2: Hoare triple {2346#true} assume true; {2346#true} is VALID [2018-11-23 10:29:30,598 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2346#true} {2346#true} #77#return; {2346#true} is VALID [2018-11-23 10:29:30,598 INFO L256 TraceCheckUtils]: 4: Hoare triple {2346#true} call #t~ret7 := main(); {2346#true} is VALID [2018-11-23 10:29:30,598 INFO L273 TraceCheckUtils]: 5: Hoare triple {2346#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2346#true} is VALID [2018-11-23 10:29:30,599 INFO L273 TraceCheckUtils]: 6: Hoare triple {2346#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2346#true} is VALID [2018-11-23 10:29:30,599 INFO L273 TraceCheckUtils]: 7: Hoare triple {2346#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2346#true} is VALID [2018-11-23 10:29:30,599 INFO L273 TraceCheckUtils]: 8: Hoare triple {2346#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {2346#true} is VALID [2018-11-23 10:29:30,599 INFO L273 TraceCheckUtils]: 9: Hoare triple {2346#true} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {2346#true} is VALID [2018-11-23 10:29:30,615 INFO L273 TraceCheckUtils]: 10: Hoare triple {2346#true} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:30,624 INFO L273 TraceCheckUtils]: 11: Hoare triple {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:30,637 INFO L273 TraceCheckUtils]: 12: Hoare triple {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:30,639 INFO L273 TraceCheckUtils]: 13: Hoare triple {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:30,641 INFO L273 TraceCheckUtils]: 14: Hoare triple {2381#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {2347#false} is VALID [2018-11-23 10:29:30,641 INFO L273 TraceCheckUtils]: 15: Hoare triple {2347#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2347#false} is VALID [2018-11-23 10:29:30,641 INFO L273 TraceCheckUtils]: 16: Hoare triple {2347#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {2347#false} is VALID [2018-11-23 10:29:30,641 INFO L273 TraceCheckUtils]: 17: Hoare triple {2347#false} ~i~0 := 0bv32; {2347#false} is VALID [2018-11-23 10:29:30,642 INFO L273 TraceCheckUtils]: 18: Hoare triple {2347#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2347#false} is VALID [2018-11-23 10:29:30,642 INFO L273 TraceCheckUtils]: 19: Hoare triple {2347#false} assume #t~short6; {2347#false} is VALID [2018-11-23 10:29:30,642 INFO L256 TraceCheckUtils]: 20: Hoare triple {2347#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2347#false} is VALID [2018-11-23 10:29:30,642 INFO L273 TraceCheckUtils]: 21: Hoare triple {2347#false} ~cond := #in~cond; {2347#false} is VALID [2018-11-23 10:29:30,643 INFO L273 TraceCheckUtils]: 22: Hoare triple {2347#false} assume !(0bv32 == ~cond); {2347#false} is VALID [2018-11-23 10:29:30,643 INFO L273 TraceCheckUtils]: 23: Hoare triple {2347#false} assume true; {2347#false} is VALID [2018-11-23 10:29:30,643 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {2347#false} {2347#false} #81#return; {2347#false} is VALID [2018-11-23 10:29:30,643 INFO L273 TraceCheckUtils]: 25: Hoare triple {2347#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {2347#false} is VALID [2018-11-23 10:29:30,643 INFO L273 TraceCheckUtils]: 26: Hoare triple {2347#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2347#false} is VALID [2018-11-23 10:29:30,644 INFO L273 TraceCheckUtils]: 27: Hoare triple {2347#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2347#false} is VALID [2018-11-23 10:29:30,644 INFO L273 TraceCheckUtils]: 28: Hoare triple {2347#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {2347#false} is VALID [2018-11-23 10:29:30,644 INFO L256 TraceCheckUtils]: 29: Hoare triple {2347#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2347#false} is VALID [2018-11-23 10:29:30,644 INFO L273 TraceCheckUtils]: 30: Hoare triple {2347#false} ~cond := #in~cond; {2347#false} is VALID [2018-11-23 10:29:30,645 INFO L273 TraceCheckUtils]: 31: Hoare triple {2347#false} assume 0bv32 == ~cond; {2347#false} is VALID [2018-11-23 10:29:30,645 INFO L273 TraceCheckUtils]: 32: Hoare triple {2347#false} assume !false; {2347#false} is VALID [2018-11-23 10:29:30,646 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:29:30,646 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:30,651 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:30,651 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:29:30,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2018-11-23 10:29:30,652 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:30,652 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:29:30,731 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:30,732 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:29:30,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:29:30,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:29:30,732 INFO L87 Difference]: Start difference. First operand 95 states and 114 transitions. Second operand 3 states. [2018-11-23 10:29:31,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:31,321 INFO L93 Difference]: Finished difference Result 112 states and 132 transitions. [2018-11-23 10:29:31,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:29:31,321 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2018-11-23 10:29:31,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:31,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:29:31,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 63 transitions. [2018-11-23 10:29:31,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:29:31,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 63 transitions. [2018-11-23 10:29:31,325 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 63 transitions. [2018-11-23 10:29:31,506 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:31,508 INFO L225 Difference]: With dead ends: 112 [2018-11-23 10:29:31,508 INFO L226 Difference]: Without dead ends: 80 [2018-11-23 10:29:31,512 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:29:31,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-11-23 10:29:31,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 79. [2018-11-23 10:29:31,860 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:31,860 INFO L82 GeneralOperation]: Start isEquivalent. First operand 80 states. Second operand 79 states. [2018-11-23 10:29:31,860 INFO L74 IsIncluded]: Start isIncluded. First operand 80 states. Second operand 79 states. [2018-11-23 10:29:31,861 INFO L87 Difference]: Start difference. First operand 80 states. Second operand 79 states. [2018-11-23 10:29:31,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:31,864 INFO L93 Difference]: Finished difference Result 80 states and 93 transitions. [2018-11-23 10:29:31,864 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 93 transitions. [2018-11-23 10:29:31,864 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:31,864 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:31,864 INFO L74 IsIncluded]: Start isIncluded. First operand 79 states. Second operand 80 states. [2018-11-23 10:29:31,864 INFO L87 Difference]: Start difference. First operand 79 states. Second operand 80 states. [2018-11-23 10:29:31,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:31,868 INFO L93 Difference]: Finished difference Result 80 states and 93 transitions. [2018-11-23 10:29:31,868 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 93 transitions. [2018-11-23 10:29:31,868 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:31,869 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:31,869 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:31,869 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:31,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-11-23 10:29:31,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 92 transitions. [2018-11-23 10:29:31,873 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 92 transitions. Word has length 33 [2018-11-23 10:29:31,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:31,873 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 92 transitions. [2018-11-23 10:29:31,873 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:29:31,873 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 92 transitions. [2018-11-23 10:29:31,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 10:29:31,876 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:31,876 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:31,876 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:31,876 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:31,877 INFO L82 PathProgramCache]: Analyzing trace with hash -358527666, now seen corresponding path program 1 times [2018-11-23 10:29:31,877 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:31,877 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:31,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:31,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:32,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:32,009 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:32,548 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-11-23 10:29:33,053 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2018-11-23 10:29:33,343 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-11-23 10:29:33,368 INFO L256 TraceCheckUtils]: 0: Hoare triple {2864#true} call ULTIMATE.init(); {2864#true} is VALID [2018-11-23 10:29:33,369 INFO L273 TraceCheckUtils]: 1: Hoare triple {2864#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2864#true} is VALID [2018-11-23 10:29:33,369 INFO L273 TraceCheckUtils]: 2: Hoare triple {2864#true} assume true; {2864#true} is VALID [2018-11-23 10:29:33,369 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2864#true} {2864#true} #77#return; {2864#true} is VALID [2018-11-23 10:29:33,369 INFO L256 TraceCheckUtils]: 4: Hoare triple {2864#true} call #t~ret7 := main(); {2864#true} is VALID [2018-11-23 10:29:33,370 INFO L273 TraceCheckUtils]: 5: Hoare triple {2864#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2864#true} is VALID [2018-11-23 10:29:33,387 INFO L273 TraceCheckUtils]: 6: Hoare triple {2864#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2887#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:29:33,388 INFO L273 TraceCheckUtils]: 7: Hoare triple {2887#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,389 INFO L273 TraceCheckUtils]: 8: Hoare triple {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,389 INFO L273 TraceCheckUtils]: 9: Hoare triple {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,390 INFO L273 TraceCheckUtils]: 10: Hoare triple {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,397 INFO L273 TraceCheckUtils]: 11: Hoare triple {2891#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2904#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:33,398 INFO L273 TraceCheckUtils]: 12: Hoare triple {2904#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,399 INFO L273 TraceCheckUtils]: 13: Hoare triple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} ~i~0 := 0bv32; {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,400 INFO L273 TraceCheckUtils]: 14: Hoare triple {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,400 INFO L273 TraceCheckUtils]: 15: Hoare triple {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} assume #t~short6; {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,401 INFO L256 TraceCheckUtils]: 16: Hoare triple {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,402 INFO L273 TraceCheckUtils]: 17: Hoare triple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} ~cond := #in~cond; {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,403 INFO L273 TraceCheckUtils]: 18: Hoare triple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} assume !(0bv32 == ~cond); {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,404 INFO L273 TraceCheckUtils]: 19: Hoare triple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} assume true; {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,405 INFO L268 TraceCheckUtils]: 20: Hoare quadruple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} #81#return; {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,406 INFO L273 TraceCheckUtils]: 21: Hoare triple {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,407 INFO L273 TraceCheckUtils]: 22: Hoare triple {2912#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,408 INFO L273 TraceCheckUtils]: 23: Hoare triple {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,409 INFO L273 TraceCheckUtils]: 24: Hoare triple {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short6; {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,411 INFO L256 TraceCheckUtils]: 25: Hoare triple {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,412 INFO L273 TraceCheckUtils]: 26: Hoare triple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} ~cond := #in~cond; {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,413 INFO L273 TraceCheckUtils]: 27: Hoare triple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} assume !(0bv32 == ~cond); {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,413 INFO L273 TraceCheckUtils]: 28: Hoare triple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} assume true; {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} is VALID [2018-11-23 10:29:33,415 INFO L268 TraceCheckUtils]: 29: Hoare quadruple {2908#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))))} {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #81#return; {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,416 INFO L273 TraceCheckUtils]: 30: Hoare triple {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:33,417 INFO L273 TraceCheckUtils]: 31: Hoare triple {2940#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2968#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:33,437 INFO L273 TraceCheckUtils]: 32: Hoare triple {2968#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv2 32)) (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2865#false} is VALID [2018-11-23 10:29:33,437 INFO L273 TraceCheckUtils]: 33: Hoare triple {2865#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {2865#false} is VALID [2018-11-23 10:29:33,438 INFO L256 TraceCheckUtils]: 34: Hoare triple {2865#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2865#false} is VALID [2018-11-23 10:29:33,438 INFO L273 TraceCheckUtils]: 35: Hoare triple {2865#false} ~cond := #in~cond; {2865#false} is VALID [2018-11-23 10:29:33,438 INFO L273 TraceCheckUtils]: 36: Hoare triple {2865#false} assume 0bv32 == ~cond; {2865#false} is VALID [2018-11-23 10:29:33,438 INFO L273 TraceCheckUtils]: 37: Hoare triple {2865#false} assume !false; {2865#false} is VALID [2018-11-23 10:29:33,444 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:29:33,444 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:35,049 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-23 10:29:35,125 INFO L273 TraceCheckUtils]: 37: Hoare triple {2865#false} assume !false; {2865#false} is VALID [2018-11-23 10:29:35,125 INFO L273 TraceCheckUtils]: 36: Hoare triple {2865#false} assume 0bv32 == ~cond; {2865#false} is VALID [2018-11-23 10:29:35,126 INFO L273 TraceCheckUtils]: 35: Hoare triple {2865#false} ~cond := #in~cond; {2865#false} is VALID [2018-11-23 10:29:35,126 INFO L256 TraceCheckUtils]: 34: Hoare triple {2865#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2865#false} is VALID [2018-11-23 10:29:35,126 INFO L273 TraceCheckUtils]: 33: Hoare triple {2865#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {2865#false} is VALID [2018-11-23 10:29:35,127 INFO L273 TraceCheckUtils]: 32: Hoare triple {3002#(not (bvslt main_~i~0 ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2865#false} is VALID [2018-11-23 10:29:35,128 INFO L273 TraceCheckUtils]: 31: Hoare triple {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3002#(not (bvslt main_~i~0 ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,129 INFO L273 TraceCheckUtils]: 30: Hoare triple {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,130 INFO L268 TraceCheckUtils]: 29: Hoare quadruple {2864#true} {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} #81#return; {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,130 INFO L273 TraceCheckUtils]: 28: Hoare triple {2864#true} assume true; {2864#true} is VALID [2018-11-23 10:29:35,130 INFO L273 TraceCheckUtils]: 27: Hoare triple {2864#true} assume !(0bv32 == ~cond); {2864#true} is VALID [2018-11-23 10:29:35,131 INFO L273 TraceCheckUtils]: 26: Hoare triple {2864#true} ~cond := #in~cond; {2864#true} is VALID [2018-11-23 10:29:35,131 INFO L256 TraceCheckUtils]: 25: Hoare triple {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2864#true} is VALID [2018-11-23 10:29:35,132 INFO L273 TraceCheckUtils]: 24: Hoare triple {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} assume #t~short6; {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,132 INFO L273 TraceCheckUtils]: 23: Hoare triple {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,154 INFO L273 TraceCheckUtils]: 22: Hoare triple {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3006#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,154 INFO L273 TraceCheckUtils]: 21: Hoare triple {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,155 INFO L268 TraceCheckUtils]: 20: Hoare quadruple {2864#true} {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} #81#return; {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,155 INFO L273 TraceCheckUtils]: 19: Hoare triple {2864#true} assume true; {2864#true} is VALID [2018-11-23 10:29:35,155 INFO L273 TraceCheckUtils]: 18: Hoare triple {2864#true} assume !(0bv32 == ~cond); {2864#true} is VALID [2018-11-23 10:29:35,156 INFO L273 TraceCheckUtils]: 17: Hoare triple {2864#true} ~cond := #in~cond; {2864#true} is VALID [2018-11-23 10:29:35,156 INFO L256 TraceCheckUtils]: 16: Hoare triple {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2864#true} is VALID [2018-11-23 10:29:35,157 INFO L273 TraceCheckUtils]: 15: Hoare triple {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} assume #t~short6; {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,158 INFO L273 TraceCheckUtils]: 14: Hoare triple {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,161 INFO L273 TraceCheckUtils]: 13: Hoare triple {3062#(not (bvslt (_ bv2 32) ~CELLCOUNT~0))} ~i~0 := 0bv32; {3034#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,164 INFO L273 TraceCheckUtils]: 12: Hoare triple {3066#(or (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3062#(not (bvslt (_ bv2 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:35,180 INFO L273 TraceCheckUtils]: 11: Hoare triple {3070#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3066#(or (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:35,181 INFO L273 TraceCheckUtils]: 10: Hoare triple {3070#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {3070#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:35,181 INFO L273 TraceCheckUtils]: 9: Hoare triple {3070#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {3070#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:35,182 INFO L273 TraceCheckUtils]: 8: Hoare triple {3080#(or (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3070#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:35,201 INFO L273 TraceCheckUtils]: 7: Hoare triple {2864#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3080#(or (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv2 32)))) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv2 32))) (not (bvslt (_ bv2 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:35,201 INFO L273 TraceCheckUtils]: 6: Hoare triple {2864#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2864#true} is VALID [2018-11-23 10:29:35,201 INFO L273 TraceCheckUtils]: 5: Hoare triple {2864#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2864#true} is VALID [2018-11-23 10:29:35,201 INFO L256 TraceCheckUtils]: 4: Hoare triple {2864#true} call #t~ret7 := main(); {2864#true} is VALID [2018-11-23 10:29:35,202 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2864#true} {2864#true} #77#return; {2864#true} is VALID [2018-11-23 10:29:35,202 INFO L273 TraceCheckUtils]: 2: Hoare triple {2864#true} assume true; {2864#true} is VALID [2018-11-23 10:29:35,202 INFO L273 TraceCheckUtils]: 1: Hoare triple {2864#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2864#true} is VALID [2018-11-23 10:29:35,202 INFO L256 TraceCheckUtils]: 0: Hoare triple {2864#true} call ULTIMATE.init(); {2864#true} is VALID [2018-11-23 10:29:35,220 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:29:35,223 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:35,223 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-11-23 10:29:35,224 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-11-23 10:29:35,224 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:35,224 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:29:35,767 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:35,767 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:29:35,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:29:35,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:29:35,768 INFO L87 Difference]: Start difference. First operand 79 states and 92 transitions. Second operand 16 states. [2018-11-23 10:29:39,451 WARN L180 SmtUtils]: Spent 180.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:39,861 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-11-23 10:29:40,548 WARN L180 SmtUtils]: Spent 138.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:45,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:45,004 INFO L93 Difference]: Finished difference Result 173 states and 199 transitions. [2018-11-23 10:29:45,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 10:29:45,004 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-11-23 10:29:45,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:45,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:29:45,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 86 transitions. [2018-11-23 10:29:45,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:29:45,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 86 transitions. [2018-11-23 10:29:45,010 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 86 transitions. [2018-11-23 10:29:45,806 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:45,808 INFO L225 Difference]: With dead ends: 173 [2018-11-23 10:29:45,808 INFO L226 Difference]: Without dead ends: 101 [2018-11-23 10:29:45,809 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 59 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=104, Invalid=238, Unknown=0, NotChecked=0, Total=342 [2018-11-23 10:29:45,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-11-23 10:29:46,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 86. [2018-11-23 10:29:46,014 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:46,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand 86 states. [2018-11-23 10:29:46,014 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand 86 states. [2018-11-23 10:29:46,014 INFO L87 Difference]: Start difference. First operand 101 states. Second operand 86 states. [2018-11-23 10:29:46,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:46,019 INFO L93 Difference]: Finished difference Result 101 states and 117 transitions. [2018-11-23 10:29:46,019 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 117 transitions. [2018-11-23 10:29:46,020 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:46,020 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:46,020 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand 101 states. [2018-11-23 10:29:46,020 INFO L87 Difference]: Start difference. First operand 86 states. Second operand 101 states. [2018-11-23 10:29:46,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:46,024 INFO L93 Difference]: Finished difference Result 101 states and 117 transitions. [2018-11-23 10:29:46,024 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 117 transitions. [2018-11-23 10:29:46,025 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:46,025 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:46,025 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:46,025 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:46,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-11-23 10:29:46,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 99 transitions. [2018-11-23 10:29:46,029 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 99 transitions. Word has length 38 [2018-11-23 10:29:46,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:46,029 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 99 transitions. [2018-11-23 10:29:46,029 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:29:46,029 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 99 transitions. [2018-11-23 10:29:46,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-23 10:29:46,030 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:46,030 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:46,031 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:46,031 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:46,031 INFO L82 PathProgramCache]: Analyzing trace with hash 502956661, now seen corresponding path program 2 times [2018-11-23 10:29:46,031 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:46,031 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:46,059 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:29:46,186 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:29:46,186 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:29:46,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:46,222 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:46,509 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 9 [2018-11-23 10:29:46,557 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:29:46,565 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:29:46,567 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:46,571 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:46,586 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:46,586 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:19 [2018-11-23 10:29:46,635 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-23 10:29:46,647 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:46,653 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-23 10:29:46,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:46,669 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:46,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:46,687 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:13 [2018-11-23 10:29:46,698 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:46,699 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_23|, main_~CCCELVOL1~0]. (let ((.cse0 (select |v_#memory_int_23| |main_~#volArray~0.base|))) (and (= (store |v_#memory_int_23| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| (_ bv12 32)) main_~CCCELVOL1~0)) |#memory_int|) (bvsge (_ bv3 32) main_~MINVAL~0) (= (select .cse0 (bvadd |main_~#volArray~0.offset| (_ bv8 32))) (_ bv3 32)))) [2018-11-23 10:29:46,699 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))) [2018-11-23 10:29:47,201 INFO L256 TraceCheckUtils]: 0: Hoare triple {3664#true} call ULTIMATE.init(); {3664#true} is VALID [2018-11-23 10:29:47,201 INFO L273 TraceCheckUtils]: 1: Hoare triple {3664#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3664#true} is VALID [2018-11-23 10:29:47,202 INFO L273 TraceCheckUtils]: 2: Hoare triple {3664#true} assume true; {3664#true} is VALID [2018-11-23 10:29:47,202 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3664#true} {3664#true} #77#return; {3664#true} is VALID [2018-11-23 10:29:47,202 INFO L256 TraceCheckUtils]: 4: Hoare triple {3664#true} call #t~ret7 := main(); {3664#true} is VALID [2018-11-23 10:29:47,203 INFO L273 TraceCheckUtils]: 5: Hoare triple {3664#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3664#true} is VALID [2018-11-23 10:29:47,204 INFO L273 TraceCheckUtils]: 6: Hoare triple {3664#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3687#(= (_ bv3 32) main_~CCCELVOL2~0)} is VALID [2018-11-23 10:29:47,205 INFO L273 TraceCheckUtils]: 7: Hoare triple {3687#(= (_ bv3 32) main_~CCCELVOL2~0)} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3691#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,205 INFO L273 TraceCheckUtils]: 8: Hoare triple {3691#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3691#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,206 INFO L273 TraceCheckUtils]: 9: Hoare triple {3691#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {3698#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,206 INFO L273 TraceCheckUtils]: 10: Hoare triple {3698#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {3698#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,207 INFO L273 TraceCheckUtils]: 11: Hoare triple {3698#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3705#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:47,208 INFO L273 TraceCheckUtils]: 12: Hoare triple {3705#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3705#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:47,209 INFO L273 TraceCheckUtils]: 13: Hoare triple {3705#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {3712#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:47,211 INFO L273 TraceCheckUtils]: 14: Hoare triple {3712#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv2 32) main_~i~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {3716#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,212 INFO L273 TraceCheckUtils]: 15: Hoare triple {3716#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3716#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,212 INFO L273 TraceCheckUtils]: 16: Hoare triple {3716#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3716#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,213 INFO L273 TraceCheckUtils]: 17: Hoare triple {3716#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} ~i~0 := 0bv32; {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,214 INFO L273 TraceCheckUtils]: 18: Hoare triple {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,215 INFO L273 TraceCheckUtils]: 19: Hoare triple {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume #t~short6; {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,218 INFO L256 TraceCheckUtils]: 20: Hoare triple {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,218 INFO L273 TraceCheckUtils]: 21: Hoare triple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} ~cond := #in~cond; {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,219 INFO L273 TraceCheckUtils]: 22: Hoare triple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,220 INFO L273 TraceCheckUtils]: 23: Hoare triple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} assume true; {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,220 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #81#return; {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,221 INFO L273 TraceCheckUtils]: 25: Hoare triple {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:47,221 INFO L273 TraceCheckUtils]: 26: Hoare triple {3726#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,222 INFO L273 TraceCheckUtils]: 27: Hoare triple {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,223 INFO L273 TraceCheckUtils]: 28: Hoare triple {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short6; {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,226 INFO L256 TraceCheckUtils]: 29: Hoare triple {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,227 INFO L273 TraceCheckUtils]: 30: Hoare triple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} ~cond := #in~cond; {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,227 INFO L273 TraceCheckUtils]: 31: Hoare triple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,228 INFO L273 TraceCheckUtils]: 32: Hoare triple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} assume true; {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,229 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {3736#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_3| (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)))} {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #81#return; {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,230 INFO L273 TraceCheckUtils]: 34: Hoare triple {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:47,232 INFO L273 TraceCheckUtils]: 35: Hoare triple {3755#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3712#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:47,235 INFO L273 TraceCheckUtils]: 36: Hoare triple {3712#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3786#|main_#t~short6|} is VALID [2018-11-23 10:29:47,237 INFO L273 TraceCheckUtils]: 37: Hoare triple {3786#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {3665#false} is VALID [2018-11-23 10:29:47,237 INFO L256 TraceCheckUtils]: 38: Hoare triple {3665#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3665#false} is VALID [2018-11-23 10:29:47,237 INFO L273 TraceCheckUtils]: 39: Hoare triple {3665#false} ~cond := #in~cond; {3665#false} is VALID [2018-11-23 10:29:47,237 INFO L273 TraceCheckUtils]: 40: Hoare triple {3665#false} assume 0bv32 == ~cond; {3665#false} is VALID [2018-11-23 10:29:47,237 INFO L273 TraceCheckUtils]: 41: Hoare triple {3665#false} assume !false; {3665#false} is VALID [2018-11-23 10:29:47,244 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:29:47,244 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:47,702 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:29:47,765 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:29:47,766 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:47,790 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:29:47,824 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:29:47,824 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:17, output treesize:27 [2018-11-23 10:29:47,848 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:47,848 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, |main_~#volArray~0.offset|]. (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0) [2018-11-23 10:29:47,848 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_11, v_prenex_2]. (let ((.cse0 (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (.cse1 (= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0)))) (and (or (bvsge v_arrayElimCell_11 main_~MINVAL~0) .cse0) (or (not .cse1) .cse0) (or (bvsge v_prenex_2 main_~MINVAL~0) .cse1))) [2018-11-23 10:29:48,284 INFO L273 TraceCheckUtils]: 41: Hoare triple {3665#false} assume !false; {3665#false} is VALID [2018-11-23 10:29:48,284 INFO L273 TraceCheckUtils]: 40: Hoare triple {3665#false} assume 0bv32 == ~cond; {3665#false} is VALID [2018-11-23 10:29:48,285 INFO L273 TraceCheckUtils]: 39: Hoare triple {3665#false} ~cond := #in~cond; {3665#false} is VALID [2018-11-23 10:29:48,285 INFO L256 TraceCheckUtils]: 38: Hoare triple {3665#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3665#false} is VALID [2018-11-23 10:29:48,286 INFO L273 TraceCheckUtils]: 37: Hoare triple {3786#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {3665#false} is VALID [2018-11-23 10:29:48,294 INFO L273 TraceCheckUtils]: 36: Hoare triple {3817#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3786#|main_#t~short6|} is VALID [2018-11-23 10:29:50,320 INFO L273 TraceCheckUtils]: 35: Hoare triple {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3817#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:29:50,321 INFO L273 TraceCheckUtils]: 34: Hoare triple {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:50,322 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {3664#true} {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #81#return; {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:50,322 INFO L273 TraceCheckUtils]: 32: Hoare triple {3664#true} assume true; {3664#true} is VALID [2018-11-23 10:29:50,322 INFO L273 TraceCheckUtils]: 31: Hoare triple {3664#true} assume !(0bv32 == ~cond); {3664#true} is VALID [2018-11-23 10:29:50,322 INFO L273 TraceCheckUtils]: 30: Hoare triple {3664#true} ~cond := #in~cond; {3664#true} is VALID [2018-11-23 10:29:50,323 INFO L256 TraceCheckUtils]: 29: Hoare triple {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3664#true} is VALID [2018-11-23 10:29:50,324 INFO L273 TraceCheckUtils]: 28: Hoare triple {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short6; {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:50,325 INFO L273 TraceCheckUtils]: 27: Hoare triple {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,340 INFO L273 TraceCheckUtils]: 26: Hoare triple {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3821#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:29:52,341 INFO L273 TraceCheckUtils]: 25: Hoare triple {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,341 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {3664#true} {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #81#return; {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,342 INFO L273 TraceCheckUtils]: 23: Hoare triple {3664#true} assume true; {3664#true} is VALID [2018-11-23 10:29:52,342 INFO L273 TraceCheckUtils]: 22: Hoare triple {3664#true} assume !(0bv32 == ~cond); {3664#true} is VALID [2018-11-23 10:29:52,342 INFO L273 TraceCheckUtils]: 21: Hoare triple {3664#true} ~cond := #in~cond; {3664#true} is VALID [2018-11-23 10:29:52,342 INFO L256 TraceCheckUtils]: 20: Hoare triple {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3664#true} is VALID [2018-11-23 10:29:52,342 INFO L273 TraceCheckUtils]: 19: Hoare triple {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume #t~short6; {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,343 INFO L273 TraceCheckUtils]: 18: Hoare triple {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,343 INFO L273 TraceCheckUtils]: 17: Hoare triple {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {3849#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,344 INFO L273 TraceCheckUtils]: 16: Hoare triple {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,344 INFO L273 TraceCheckUtils]: 15: Hoare triple {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,357 INFO L273 TraceCheckUtils]: 14: Hoare triple {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,376 INFO L273 TraceCheckUtils]: 13: Hoare triple {3890#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {3877#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:52,377 INFO L273 TraceCheckUtils]: 12: Hoare triple {3890#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3890#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:52,381 INFO L273 TraceCheckUtils]: 11: Hoare triple {3897#(and (or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3890#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:52,383 INFO L273 TraceCheckUtils]: 10: Hoare triple {3897#(and (or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {3897#(and (or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:52,390 INFO L273 TraceCheckUtils]: 9: Hoare triple {3904#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_prenex_2 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {3897#(and (or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:52,391 INFO L273 TraceCheckUtils]: 8: Hoare triple {3904#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_prenex_2 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {3904#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_prenex_2 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:52,391 INFO L273 TraceCheckUtils]: 7: Hoare triple {3664#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3904#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_prenex_2 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:52,391 INFO L273 TraceCheckUtils]: 6: Hoare triple {3664#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3664#true} is VALID [2018-11-23 10:29:52,392 INFO L273 TraceCheckUtils]: 5: Hoare triple {3664#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3664#true} is VALID [2018-11-23 10:29:52,392 INFO L256 TraceCheckUtils]: 4: Hoare triple {3664#true} call #t~ret7 := main(); {3664#true} is VALID [2018-11-23 10:29:52,392 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3664#true} {3664#true} #77#return; {3664#true} is VALID [2018-11-23 10:29:52,392 INFO L273 TraceCheckUtils]: 2: Hoare triple {3664#true} assume true; {3664#true} is VALID [2018-11-23 10:29:52,392 INFO L273 TraceCheckUtils]: 1: Hoare triple {3664#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3664#true} is VALID [2018-11-23 10:29:52,392 INFO L256 TraceCheckUtils]: 0: Hoare triple {3664#true} call ULTIMATE.init(); {3664#true} is VALID [2018-11-23 10:29:52,396 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:29:52,400 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:52,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 19 [2018-11-23 10:29:52,402 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 42 [2018-11-23 10:29:52,402 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:52,402 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 10:29:58,861 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 64 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:58,861 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 10:29:58,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 10:29:58,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=284, Unknown=0, NotChecked=0, Total=342 [2018-11-23 10:29:58,862 INFO L87 Difference]: Start difference. First operand 86 states and 99 transitions. Second operand 19 states. [2018-11-23 10:30:10,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:10,893 INFO L93 Difference]: Finished difference Result 200 states and 231 transitions. [2018-11-23 10:30:10,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 10:30:10,893 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 42 [2018-11-23 10:30:10,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:10,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:30:10,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 113 transitions. [2018-11-23 10:30:10,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:30:10,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 113 transitions. [2018-11-23 10:30:10,900 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 113 transitions. [2018-11-23 10:30:13,337 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 112 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:13,341 INFO L225 Difference]: With dead ends: 200 [2018-11-23 10:30:13,341 INFO L226 Difference]: Without dead ends: 148 [2018-11-23 10:30:13,342 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 61 SyntacticMatches, 5 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 181 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=176, Invalid=694, Unknown=0, NotChecked=0, Total=870 [2018-11-23 10:30:13,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-11-23 10:30:13,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 128. [2018-11-23 10:30:13,813 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:13,813 INFO L82 GeneralOperation]: Start isEquivalent. First operand 148 states. Second operand 128 states. [2018-11-23 10:30:13,813 INFO L74 IsIncluded]: Start isIncluded. First operand 148 states. Second operand 128 states. [2018-11-23 10:30:13,813 INFO L87 Difference]: Start difference. First operand 148 states. Second operand 128 states. [2018-11-23 10:30:13,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:13,820 INFO L93 Difference]: Finished difference Result 148 states and 168 transitions. [2018-11-23 10:30:13,820 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 168 transitions. [2018-11-23 10:30:13,820 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:13,820 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:13,821 INFO L74 IsIncluded]: Start isIncluded. First operand 128 states. Second operand 148 states. [2018-11-23 10:30:13,821 INFO L87 Difference]: Start difference. First operand 128 states. Second operand 148 states. [2018-11-23 10:30:13,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:13,826 INFO L93 Difference]: Finished difference Result 148 states and 168 transitions. [2018-11-23 10:30:13,826 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 168 transitions. [2018-11-23 10:30:13,827 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:13,827 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:13,827 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:13,828 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:13,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-11-23 10:30:13,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 147 transitions. [2018-11-23 10:30:13,833 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 147 transitions. Word has length 42 [2018-11-23 10:30:13,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:13,833 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 147 transitions. [2018-11-23 10:30:13,833 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 10:30:13,833 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 147 transitions. [2018-11-23 10:30:13,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-23 10:30:13,834 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:13,835 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:13,835 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:13,835 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:13,835 INFO L82 PathProgramCache]: Analyzing trace with hash 1582060021, now seen corresponding path program 1 times [2018-11-23 10:30:13,836 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:13,836 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:13,857 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 10:30:13,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:13,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:13,985 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:14,107 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:30:14,116 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:30:14,119 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,124 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,143 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-23 10:30:14,201 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:30:14,211 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,213 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:30:14,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,229 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,253 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:41, output treesize:37 [2018-11-23 10:30:14,412 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 34 [2018-11-23 10:30:14,423 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,424 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,426 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,427 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 79 [2018-11-23 10:30:14,431 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,451 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,479 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-11-23 10:30:14,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-11-23 10:30:14,608 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,611 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,614 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,616 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,619 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,622 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:14,623 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 77 [2018-11-23 10:30:14,627 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,656 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,685 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:14,686 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-11-23 10:30:14,896 INFO L256 TraceCheckUtils]: 0: Hoare triple {4694#true} call ULTIMATE.init(); {4694#true} is VALID [2018-11-23 10:30:14,896 INFO L273 TraceCheckUtils]: 1: Hoare triple {4694#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4694#true} is VALID [2018-11-23 10:30:14,896 INFO L273 TraceCheckUtils]: 2: Hoare triple {4694#true} assume true; {4694#true} is VALID [2018-11-23 10:30:14,896 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4694#true} {4694#true} #77#return; {4694#true} is VALID [2018-11-23 10:30:14,897 INFO L256 TraceCheckUtils]: 4: Hoare triple {4694#true} call #t~ret7 := main(); {4694#true} is VALID [2018-11-23 10:30:14,897 INFO L273 TraceCheckUtils]: 5: Hoare triple {4694#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4694#true} is VALID [2018-11-23 10:30:14,897 INFO L273 TraceCheckUtils]: 6: Hoare triple {4694#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4717#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:30:14,898 INFO L273 TraceCheckUtils]: 7: Hoare triple {4717#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {4721#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,898 INFO L273 TraceCheckUtils]: 8: Hoare triple {4721#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {4721#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,900 INFO L273 TraceCheckUtils]: 9: Hoare triple {4721#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {4728#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,904 INFO L273 TraceCheckUtils]: 10: Hoare triple {4728#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {4732#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32))) (_ bv0 32)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,907 INFO L273 TraceCheckUtils]: 11: Hoare triple {4732#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32))) (_ bv0 32)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4736#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:30:14,925 INFO L273 TraceCheckUtils]: 12: Hoare triple {4736#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {4736#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:30:14,927 INFO L273 TraceCheckUtils]: 13: Hoare triple {4736#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {4743#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:30:14,930 INFO L273 TraceCheckUtils]: 14: Hoare triple {4743#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)))) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {4747#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,931 INFO L273 TraceCheckUtils]: 15: Hoare triple {4747#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4747#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,931 INFO L273 TraceCheckUtils]: 16: Hoare triple {4747#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {4747#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,933 INFO L273 TraceCheckUtils]: 17: Hoare triple {4747#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} ~i~0 := 0bv32; {4757#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:30:14,934 INFO L273 TraceCheckUtils]: 18: Hoare triple {4757#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv3 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4761#(not |main_#t~short6|)} is VALID [2018-11-23 10:30:14,935 INFO L273 TraceCheckUtils]: 19: Hoare triple {4761#(not |main_#t~short6|)} assume #t~short6; {4695#false} is VALID [2018-11-23 10:30:14,935 INFO L256 TraceCheckUtils]: 20: Hoare triple {4695#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4695#false} is VALID [2018-11-23 10:30:14,935 INFO L273 TraceCheckUtils]: 21: Hoare triple {4695#false} ~cond := #in~cond; {4695#false} is VALID [2018-11-23 10:30:14,935 INFO L273 TraceCheckUtils]: 22: Hoare triple {4695#false} assume !(0bv32 == ~cond); {4695#false} is VALID [2018-11-23 10:30:14,936 INFO L273 TraceCheckUtils]: 23: Hoare triple {4695#false} assume true; {4695#false} is VALID [2018-11-23 10:30:14,936 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {4695#false} {4695#false} #81#return; {4695#false} is VALID [2018-11-23 10:30:14,936 INFO L273 TraceCheckUtils]: 25: Hoare triple {4695#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {4695#false} is VALID [2018-11-23 10:30:14,936 INFO L273 TraceCheckUtils]: 26: Hoare triple {4695#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4695#false} is VALID [2018-11-23 10:30:14,937 INFO L273 TraceCheckUtils]: 27: Hoare triple {4695#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4695#false} is VALID [2018-11-23 10:30:14,937 INFO L273 TraceCheckUtils]: 28: Hoare triple {4695#false} assume #t~short6; {4695#false} is VALID [2018-11-23 10:30:14,937 INFO L256 TraceCheckUtils]: 29: Hoare triple {4695#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4695#false} is VALID [2018-11-23 10:30:14,938 INFO L273 TraceCheckUtils]: 30: Hoare triple {4695#false} ~cond := #in~cond; {4695#false} is VALID [2018-11-23 10:30:14,938 INFO L273 TraceCheckUtils]: 31: Hoare triple {4695#false} assume !(0bv32 == ~cond); {4695#false} is VALID [2018-11-23 10:30:14,938 INFO L273 TraceCheckUtils]: 32: Hoare triple {4695#false} assume true; {4695#false} is VALID [2018-11-23 10:30:14,939 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {4695#false} {4695#false} #81#return; {4695#false} is VALID [2018-11-23 10:30:14,939 INFO L273 TraceCheckUtils]: 34: Hoare triple {4695#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {4695#false} is VALID [2018-11-23 10:30:14,939 INFO L273 TraceCheckUtils]: 35: Hoare triple {4695#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4695#false} is VALID [2018-11-23 10:30:14,939 INFO L273 TraceCheckUtils]: 36: Hoare triple {4695#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4695#false} is VALID [2018-11-23 10:30:14,939 INFO L273 TraceCheckUtils]: 37: Hoare triple {4695#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {4695#false} is VALID [2018-11-23 10:30:14,940 INFO L256 TraceCheckUtils]: 38: Hoare triple {4695#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4695#false} is VALID [2018-11-23 10:30:14,940 INFO L273 TraceCheckUtils]: 39: Hoare triple {4695#false} ~cond := #in~cond; {4695#false} is VALID [2018-11-23 10:30:14,940 INFO L273 TraceCheckUtils]: 40: Hoare triple {4695#false} assume 0bv32 == ~cond; {4695#false} is VALID [2018-11-23 10:30:14,940 INFO L273 TraceCheckUtils]: 41: Hoare triple {4695#false} assume !false; {4695#false} is VALID [2018-11-23 10:30:14,944 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 10:30:14,945 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:30:15,329 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2018-11-23 10:30:15,335 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-11-23 10:30:15,408 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 11 [2018-11-23 10:30:15,412 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:15,456 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 23 [2018-11-23 10:30:15,460 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:30:15,489 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:30:15,508 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:30:15,534 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-23 10:30:15,535 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:27, output treesize:30 [2018-11-23 10:30:15,546 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:30:15,547 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~MINVAL~0]. (or (not (bvsge (select (let ((.cse0 (bvmul (_ bv8 32) main_~i~0))) (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0) (_ bv0 32))) |main_~#volArray~0.offset|) main_~MINVAL~0)) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) [2018-11-23 10:30:15,547 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [main_~MINVAL~0, v_arrayElimCell_17, v_prenex_3]. (and (let ((.cse0 (bvmul (_ bv8 32) main_~i~0))) (or (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32))) (= (_ bv0 32) .cse0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (not (bvsge v_arrayElimCell_17 main_~MINVAL~0)))) (or (bvsge main_~CCCELVOL2~0 v_prenex_3) (not (bvsge (_ bv0 32) v_prenex_3)))) [2018-11-23 10:30:15,799 INFO L273 TraceCheckUtils]: 41: Hoare triple {4695#false} assume !false; {4695#false} is VALID [2018-11-23 10:30:15,800 INFO L273 TraceCheckUtils]: 40: Hoare triple {4695#false} assume 0bv32 == ~cond; {4695#false} is VALID [2018-11-23 10:30:15,800 INFO L273 TraceCheckUtils]: 39: Hoare triple {4695#false} ~cond := #in~cond; {4695#false} is VALID [2018-11-23 10:30:15,800 INFO L256 TraceCheckUtils]: 38: Hoare triple {4695#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4695#false} is VALID [2018-11-23 10:30:15,800 INFO L273 TraceCheckUtils]: 37: Hoare triple {4695#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {4695#false} is VALID [2018-11-23 10:30:15,800 INFO L273 TraceCheckUtils]: 36: Hoare triple {4695#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4695#false} is VALID [2018-11-23 10:30:15,800 INFO L273 TraceCheckUtils]: 35: Hoare triple {4695#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4695#false} is VALID [2018-11-23 10:30:15,800 INFO L273 TraceCheckUtils]: 34: Hoare triple {4695#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {4695#false} is VALID [2018-11-23 10:30:15,801 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {4694#true} {4695#false} #81#return; {4695#false} is VALID [2018-11-23 10:30:15,801 INFO L273 TraceCheckUtils]: 32: Hoare triple {4694#true} assume true; {4694#true} is VALID [2018-11-23 10:30:15,801 INFO L273 TraceCheckUtils]: 31: Hoare triple {4694#true} assume !(0bv32 == ~cond); {4694#true} is VALID [2018-11-23 10:30:15,801 INFO L273 TraceCheckUtils]: 30: Hoare triple {4694#true} ~cond := #in~cond; {4694#true} is VALID [2018-11-23 10:30:15,801 INFO L256 TraceCheckUtils]: 29: Hoare triple {4695#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4694#true} is VALID [2018-11-23 10:30:15,801 INFO L273 TraceCheckUtils]: 28: Hoare triple {4695#false} assume #t~short6; {4695#false} is VALID [2018-11-23 10:30:15,801 INFO L273 TraceCheckUtils]: 27: Hoare triple {4695#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4695#false} is VALID [2018-11-23 10:30:15,801 INFO L273 TraceCheckUtils]: 26: Hoare triple {4695#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4695#false} is VALID [2018-11-23 10:30:15,802 INFO L273 TraceCheckUtils]: 25: Hoare triple {4695#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {4695#false} is VALID [2018-11-23 10:30:15,802 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {4694#true} {4695#false} #81#return; {4695#false} is VALID [2018-11-23 10:30:15,802 INFO L273 TraceCheckUtils]: 23: Hoare triple {4694#true} assume true; {4694#true} is VALID [2018-11-23 10:30:15,802 INFO L273 TraceCheckUtils]: 22: Hoare triple {4694#true} assume !(0bv32 == ~cond); {4694#true} is VALID [2018-11-23 10:30:15,802 INFO L273 TraceCheckUtils]: 21: Hoare triple {4694#true} ~cond := #in~cond; {4694#true} is VALID [2018-11-23 10:30:15,803 INFO L256 TraceCheckUtils]: 20: Hoare triple {4695#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4694#true} is VALID [2018-11-23 10:30:15,807 INFO L273 TraceCheckUtils]: 19: Hoare triple {4761#(not |main_#t~short6|)} assume #t~short6; {4695#false} is VALID [2018-11-23 10:30:15,808 INFO L273 TraceCheckUtils]: 18: Hoare triple {4900#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4761#(not |main_#t~short6|)} is VALID [2018-11-23 10:30:15,809 INFO L273 TraceCheckUtils]: 17: Hoare triple {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} ~i~0 := 0bv32; {4900#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,809 INFO L273 TraceCheckUtils]: 16: Hoare triple {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,809 INFO L273 TraceCheckUtils]: 15: Hoare triple {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,821 INFO L273 TraceCheckUtils]: 14: Hoare triple {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,844 INFO L273 TraceCheckUtils]: 13: Hoare triple {4917#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {4904#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,845 INFO L273 TraceCheckUtils]: 12: Hoare triple {4917#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {4917#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,855 INFO L273 TraceCheckUtils]: 11: Hoare triple {4924#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4917#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,866 INFO L273 TraceCheckUtils]: 10: Hoare triple {4924#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {4924#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,891 INFO L273 TraceCheckUtils]: 9: Hoare triple {4931#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_17 (_ BitVec 32))) (or (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (not (bvsge v_arrayElimCell_17 main_~MINVAL~0)))) (= (_ bv0 32) (bvmul (_ bv8 32) main_~i~0))) (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge (_ bv0 32) v_prenex_3)) (bvsge main_~CCCELVOL2~0 v_prenex_3))))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {4924#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:30:15,892 INFO L273 TraceCheckUtils]: 8: Hoare triple {4931#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_17 (_ BitVec 32))) (or (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (not (bvsge v_arrayElimCell_17 main_~MINVAL~0)))) (= (_ bv0 32) (bvmul (_ bv8 32) main_~i~0))) (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge (_ bv0 32) v_prenex_3)) (bvsge main_~CCCELVOL2~0 v_prenex_3))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {4931#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_17 (_ BitVec 32))) (or (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (not (bvsge v_arrayElimCell_17 main_~MINVAL~0)))) (= (_ bv0 32) (bvmul (_ bv8 32) main_~i~0))) (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge (_ bv0 32) v_prenex_3)) (bvsge main_~CCCELVOL2~0 v_prenex_3))))} is VALID [2018-11-23 10:30:15,892 INFO L273 TraceCheckUtils]: 7: Hoare triple {4938#(forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge (_ bv0 32) v_prenex_3)) (bvsge main_~CCCELVOL2~0 v_prenex_3)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {4931#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_17 (_ BitVec 32))) (or (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (not (bvsge v_arrayElimCell_17 main_~MINVAL~0)))) (= (_ bv0 32) (bvmul (_ bv8 32) main_~i~0))) (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge (_ bv0 32) v_prenex_3)) (bvsge main_~CCCELVOL2~0 v_prenex_3))))} is VALID [2018-11-23 10:30:15,916 INFO L273 TraceCheckUtils]: 6: Hoare triple {4694#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4938#(forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge (_ bv0 32) v_prenex_3)) (bvsge main_~CCCELVOL2~0 v_prenex_3)))} is VALID [2018-11-23 10:30:15,916 INFO L273 TraceCheckUtils]: 5: Hoare triple {4694#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4694#true} is VALID [2018-11-23 10:30:15,916 INFO L256 TraceCheckUtils]: 4: Hoare triple {4694#true} call #t~ret7 := main(); {4694#true} is VALID [2018-11-23 10:30:15,916 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4694#true} {4694#true} #77#return; {4694#true} is VALID [2018-11-23 10:30:15,917 INFO L273 TraceCheckUtils]: 2: Hoare triple {4694#true} assume true; {4694#true} is VALID [2018-11-23 10:30:15,917 INFO L273 TraceCheckUtils]: 1: Hoare triple {4694#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4694#true} is VALID [2018-11-23 10:30:15,917 INFO L256 TraceCheckUtils]: 0: Hoare triple {4694#true} call ULTIMATE.init(); {4694#true} is VALID [2018-11-23 10:30:15,922 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 8 proven. 6 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-23 10:30:15,926 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:30:15,926 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 17 [2018-11-23 10:30:15,926 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 42 [2018-11-23 10:30:15,927 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:15,927 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 10:30:16,190 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:16,190 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 10:30:16,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 10:30:16,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:30:16,191 INFO L87 Difference]: Start difference. First operand 128 states and 147 transitions. Second operand 17 states. [2018-11-23 10:30:24,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:24,253 INFO L93 Difference]: Finished difference Result 170 states and 195 transitions. [2018-11-23 10:30:24,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 10:30:24,254 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 42 [2018-11-23 10:30:24,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:24,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:30:24,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 101 transitions. [2018-11-23 10:30:24,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:30:24,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 101 transitions. [2018-11-23 10:30:24,259 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 101 transitions. [2018-11-23 10:30:26,685 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 100 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:26,688 INFO L225 Difference]: With dead ends: 170 [2018-11-23 10:30:26,689 INFO L226 Difference]: Without dead ends: 144 [2018-11-23 10:30:26,689 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=243, Invalid=687, Unknown=0, NotChecked=0, Total=930 [2018-11-23 10:30:26,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-11-23 10:30:27,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 136. [2018-11-23 10:30:27,494 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:27,494 INFO L82 GeneralOperation]: Start isEquivalent. First operand 144 states. Second operand 136 states. [2018-11-23 10:30:27,494 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand 136 states. [2018-11-23 10:30:27,495 INFO L87 Difference]: Start difference. First operand 144 states. Second operand 136 states. [2018-11-23 10:30:27,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:27,500 INFO L93 Difference]: Finished difference Result 144 states and 162 transitions. [2018-11-23 10:30:27,500 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 162 transitions. [2018-11-23 10:30:27,501 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:27,501 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:27,501 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand 144 states. [2018-11-23 10:30:27,501 INFO L87 Difference]: Start difference. First operand 136 states. Second operand 144 states. [2018-11-23 10:30:27,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:27,506 INFO L93 Difference]: Finished difference Result 144 states and 162 transitions. [2018-11-23 10:30:27,506 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 162 transitions. [2018-11-23 10:30:27,506 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:27,506 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:27,507 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:27,507 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:27,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-23 10:30:27,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 153 transitions. [2018-11-23 10:30:27,510 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 153 transitions. Word has length 42 [2018-11-23 10:30:27,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:27,511 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 153 transitions. [2018-11-23 10:30:27,511 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 10:30:27,511 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 153 transitions. [2018-11-23 10:30:27,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-23 10:30:27,512 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:27,512 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:27,512 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:27,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:27,513 INFO L82 PathProgramCache]: Analyzing trace with hash -1234495563, now seen corresponding path program 1 times [2018-11-23 10:30:27,513 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:27,513 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:27,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:27,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:27,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:27,752 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:28,236 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:30:28,247 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:30:28,250 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:28,257 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:28,271 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:28,272 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-11-23 10:30:28,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-23 10:30:28,330 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:28,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-23 10:30:28,337 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:28,354 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:28,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:28,367 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:19 [2018-11-23 10:30:28,848 INFO L256 TraceCheckUtils]: 0: Hoare triple {5692#true} call ULTIMATE.init(); {5692#true} is VALID [2018-11-23 10:30:28,848 INFO L273 TraceCheckUtils]: 1: Hoare triple {5692#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {5692#true} is VALID [2018-11-23 10:30:28,849 INFO L273 TraceCheckUtils]: 2: Hoare triple {5692#true} assume true; {5692#true} is VALID [2018-11-23 10:30:28,849 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5692#true} {5692#true} #77#return; {5692#true} is VALID [2018-11-23 10:30:28,849 INFO L256 TraceCheckUtils]: 4: Hoare triple {5692#true} call #t~ret7 := main(); {5692#true} is VALID [2018-11-23 10:30:28,849 INFO L273 TraceCheckUtils]: 5: Hoare triple {5692#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {5692#true} is VALID [2018-11-23 10:30:28,850 INFO L273 TraceCheckUtils]: 6: Hoare triple {5692#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {5692#true} is VALID [2018-11-23 10:30:28,850 INFO L273 TraceCheckUtils]: 7: Hoare triple {5692#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:28,850 INFO L273 TraceCheckUtils]: 8: Hoare triple {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:28,851 INFO L273 TraceCheckUtils]: 9: Hoare triple {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:28,851 INFO L273 TraceCheckUtils]: 10: Hoare triple {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:28,852 INFO L273 TraceCheckUtils]: 11: Hoare triple {5718#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5731#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:30:28,852 INFO L273 TraceCheckUtils]: 12: Hoare triple {5731#(= (_ bv2 32) main_~i~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {5731#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:30:28,854 INFO L273 TraceCheckUtils]: 13: Hoare triple {5731#(= (_ bv2 32) main_~i~0)} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {5738#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:30:28,856 INFO L273 TraceCheckUtils]: 14: Hoare triple {5738#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= (_ bv2 32) main_~i~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {5742#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:28,857 INFO L273 TraceCheckUtils]: 15: Hoare triple {5742#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5742#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:28,857 INFO L273 TraceCheckUtils]: 16: Hoare triple {5742#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {5742#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:28,858 INFO L273 TraceCheckUtils]: 17: Hoare triple {5742#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} ~i~0 := 0bv32; {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:30:28,858 INFO L273 TraceCheckUtils]: 18: Hoare triple {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:30:28,859 INFO L273 TraceCheckUtils]: 19: Hoare triple {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:30:28,863 INFO L256 TraceCheckUtils]: 20: Hoare triple {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,863 INFO L273 TraceCheckUtils]: 21: Hoare triple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} ~cond := #in~cond; {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,864 INFO L273 TraceCheckUtils]: 22: Hoare triple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} assume !(0bv32 == ~cond); {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,865 INFO L273 TraceCheckUtils]: 23: Hoare triple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} assume true; {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,866 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} #81#return; {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:30:28,867 INFO L273 TraceCheckUtils]: 25: Hoare triple {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:30:28,868 INFO L273 TraceCheckUtils]: 26: Hoare triple {5752#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:28,869 INFO L273 TraceCheckUtils]: 27: Hoare triple {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:28,870 INFO L273 TraceCheckUtils]: 28: Hoare triple {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:28,873 INFO L256 TraceCheckUtils]: 29: Hoare triple {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,874 INFO L273 TraceCheckUtils]: 30: Hoare triple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} ~cond := #in~cond; {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,875 INFO L273 TraceCheckUtils]: 31: Hoare triple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} assume !(0bv32 == ~cond); {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,875 INFO L273 TraceCheckUtils]: 32: Hoare triple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} assume true; {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} is VALID [2018-11-23 10:30:28,876 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {5762#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_7| (_ bv12 32))))))} {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #81#return; {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:28,877 INFO L273 TraceCheckUtils]: 34: Hoare triple {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:28,878 INFO L273 TraceCheckUtils]: 35: Hoare triple {5781#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5809#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:30:28,879 INFO L273 TraceCheckUtils]: 36: Hoare triple {5809#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5809#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:30:28,880 INFO L273 TraceCheckUtils]: 37: Hoare triple {5809#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {5816#|main_#t~short6|} is VALID [2018-11-23 10:30:28,881 INFO L256 TraceCheckUtils]: 38: Hoare triple {5816#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {5820#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:28,882 INFO L273 TraceCheckUtils]: 39: Hoare triple {5820#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {5824#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:28,883 INFO L273 TraceCheckUtils]: 40: Hoare triple {5824#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {5693#false} is VALID [2018-11-23 10:30:28,883 INFO L273 TraceCheckUtils]: 41: Hoare triple {5693#false} assume !false; {5693#false} is VALID [2018-11-23 10:30:28,890 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:30:28,890 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:30:29,392 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:30:29,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:30:29,438 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:29,440 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:29,443 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:29,444 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:17, output treesize:5 [2018-11-23 10:30:29,449 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:30:29,449 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, |main_~#volArray~0.offset|]. (= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) [2018-11-23 10:30:29,450 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0)) [2018-11-23 10:30:29,533 INFO L273 TraceCheckUtils]: 41: Hoare triple {5693#false} assume !false; {5693#false} is VALID [2018-11-23 10:30:29,534 INFO L273 TraceCheckUtils]: 40: Hoare triple {5834#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {5693#false} is VALID [2018-11-23 10:30:29,534 INFO L273 TraceCheckUtils]: 39: Hoare triple {5838#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {5834#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:30:29,535 INFO L256 TraceCheckUtils]: 38: Hoare triple {5816#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {5838#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:30:29,536 INFO L273 TraceCheckUtils]: 37: Hoare triple {5845#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {5816#|main_#t~short6|} is VALID [2018-11-23 10:30:29,537 INFO L273 TraceCheckUtils]: 36: Hoare triple {5845#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5845#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:30:29,766 INFO L273 TraceCheckUtils]: 35: Hoare triple {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5845#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:30:29,766 INFO L273 TraceCheckUtils]: 34: Hoare triple {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:30:29,767 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {5692#true} {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #81#return; {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:30:29,767 INFO L273 TraceCheckUtils]: 32: Hoare triple {5692#true} assume true; {5692#true} is VALID [2018-11-23 10:30:29,768 INFO L273 TraceCheckUtils]: 31: Hoare triple {5692#true} assume !(0bv32 == ~cond); {5692#true} is VALID [2018-11-23 10:30:29,768 INFO L273 TraceCheckUtils]: 30: Hoare triple {5692#true} ~cond := #in~cond; {5692#true} is VALID [2018-11-23 10:30:29,768 INFO L256 TraceCheckUtils]: 29: Hoare triple {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {5692#true} is VALID [2018-11-23 10:30:29,769 INFO L273 TraceCheckUtils]: 28: Hoare triple {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:30:29,769 INFO L273 TraceCheckUtils]: 27: Hoare triple {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:30:30,037 INFO L273 TraceCheckUtils]: 26: Hoare triple {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5852#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:30:30,037 INFO L273 TraceCheckUtils]: 25: Hoare triple {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:30:30,038 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {5692#true} {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #81#return; {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:30:30,039 INFO L273 TraceCheckUtils]: 23: Hoare triple {5692#true} assume true; {5692#true} is VALID [2018-11-23 10:30:30,039 INFO L273 TraceCheckUtils]: 22: Hoare triple {5692#true} assume !(0bv32 == ~cond); {5692#true} is VALID [2018-11-23 10:30:30,039 INFO L273 TraceCheckUtils]: 21: Hoare triple {5692#true} ~cond := #in~cond; {5692#true} is VALID [2018-11-23 10:30:30,039 INFO L256 TraceCheckUtils]: 20: Hoare triple {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {5692#true} is VALID [2018-11-23 10:30:30,040 INFO L273 TraceCheckUtils]: 19: Hoare triple {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:30:30,040 INFO L273 TraceCheckUtils]: 18: Hoare triple {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:30:30,041 INFO L273 TraceCheckUtils]: 17: Hoare triple {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} ~i~0 := 0bv32; {5880#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:30:30,042 INFO L273 TraceCheckUtils]: 16: Hoare triple {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:30:30,042 INFO L273 TraceCheckUtils]: 15: Hoare triple {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:30:30,045 INFO L273 TraceCheckUtils]: 14: Hoare triple {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:30:30,047 INFO L273 TraceCheckUtils]: 13: Hoare triple {5921#(= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {5908#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:30:30,048 INFO L273 TraceCheckUtils]: 12: Hoare triple {5921#(= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {5921#(= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))} is VALID [2018-11-23 10:30:30,050 INFO L273 TraceCheckUtils]: 11: Hoare triple {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5921#(= (_ bv16 32) (bvmul (_ bv8 32) main_~i~0))} is VALID [2018-11-23 10:30:30,050 INFO L273 TraceCheckUtils]: 10: Hoare triple {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:30,051 INFO L273 TraceCheckUtils]: 9: Hoare triple {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:30,051 INFO L273 TraceCheckUtils]: 8: Hoare triple {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:30,066 INFO L273 TraceCheckUtils]: 7: Hoare triple {5692#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {5928#(= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32))} is VALID [2018-11-23 10:30:30,066 INFO L273 TraceCheckUtils]: 6: Hoare triple {5692#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {5692#true} is VALID [2018-11-23 10:30:30,067 INFO L273 TraceCheckUtils]: 5: Hoare triple {5692#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {5692#true} is VALID [2018-11-23 10:30:30,067 INFO L256 TraceCheckUtils]: 4: Hoare triple {5692#true} call #t~ret7 := main(); {5692#true} is VALID [2018-11-23 10:30:30,067 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5692#true} {5692#true} #77#return; {5692#true} is VALID [2018-11-23 10:30:30,067 INFO L273 TraceCheckUtils]: 2: Hoare triple {5692#true} assume true; {5692#true} is VALID [2018-11-23 10:30:30,067 INFO L273 TraceCheckUtils]: 1: Hoare triple {5692#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {5692#true} is VALID [2018-11-23 10:30:30,067 INFO L256 TraceCheckUtils]: 0: Hoare triple {5692#true} call ULTIMATE.init(); {5692#true} is VALID [2018-11-23 10:30:30,070 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:30:30,072 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:30:30,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 21 [2018-11-23 10:30:30,072 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 42 [2018-11-23 10:30:30,073 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:30,073 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-23 10:30:31,017 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:31,017 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 10:30:31,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 10:30:31,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2018-11-23 10:30:31,019 INFO L87 Difference]: Start difference. First operand 136 states and 153 transitions. Second operand 21 states. [2018-11-23 10:31:24,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:24,814 INFO L93 Difference]: Finished difference Result 213 states and 234 transitions. [2018-11-23 10:31:24,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-11-23 10:31:24,815 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 42 [2018-11-23 10:31:24,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:31:24,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:31:24,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 138 transitions. [2018-11-23 10:31:24,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:31:24,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 138 transitions. [2018-11-23 10:31:24,820 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 30 states and 138 transitions. [2018-11-23 10:31:26,051 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 138 edges. 138 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:26,058 INFO L225 Difference]: With dead ends: 213 [2018-11-23 10:31:26,058 INFO L226 Difference]: Without dead ends: 211 [2018-11-23 10:31:26,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 61 SyntacticMatches, 4 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=180, Invalid=1080, Unknown=0, NotChecked=0, Total=1260 [2018-11-23 10:31:26,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-11-23 10:31:26,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 175. [2018-11-23 10:31:26,478 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:31:26,478 INFO L82 GeneralOperation]: Start isEquivalent. First operand 211 states. Second operand 175 states. [2018-11-23 10:31:26,479 INFO L74 IsIncluded]: Start isIncluded. First operand 211 states. Second operand 175 states. [2018-11-23 10:31:26,479 INFO L87 Difference]: Start difference. First operand 211 states. Second operand 175 states. [2018-11-23 10:31:26,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:26,486 INFO L93 Difference]: Finished difference Result 211 states and 231 transitions. [2018-11-23 10:31:26,486 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 231 transitions. [2018-11-23 10:31:26,487 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:26,487 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:26,487 INFO L74 IsIncluded]: Start isIncluded. First operand 175 states. Second operand 211 states. [2018-11-23 10:31:26,487 INFO L87 Difference]: Start difference. First operand 175 states. Second operand 211 states. [2018-11-23 10:31:26,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:26,493 INFO L93 Difference]: Finished difference Result 211 states and 231 transitions. [2018-11-23 10:31:26,493 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 231 transitions. [2018-11-23 10:31:26,494 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:26,494 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:26,494 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:31:26,494 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:31:26,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-11-23 10:31:26,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 193 transitions. [2018-11-23 10:31:26,499 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 193 transitions. Word has length 42 [2018-11-23 10:31:26,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:31:26,500 INFO L480 AbstractCegarLoop]: Abstraction has 175 states and 193 transitions. [2018-11-23 10:31:26,500 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 10:31:26,500 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 193 transitions. [2018-11-23 10:31:26,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 10:31:26,501 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:31:26,501 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:31:26,501 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:31:26,502 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:31:26,502 INFO L82 PathProgramCache]: Analyzing trace with hash -287327464, now seen corresponding path program 3 times [2018-11-23 10:31:26,502 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:31:26,502 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:31:26,533 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:31:26,937 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:31:26,937 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:31:27,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:27,016 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:31:27,105 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-23 10:31:27,112 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-23 10:31:27,114 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:27,119 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:27,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:27,134 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:13 [2018-11-23 10:31:27,589 INFO L256 TraceCheckUtils]: 0: Hoare triple {6935#true} call ULTIMATE.init(); {6935#true} is VALID [2018-11-23 10:31:27,589 INFO L273 TraceCheckUtils]: 1: Hoare triple {6935#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {6935#true} is VALID [2018-11-23 10:31:27,590 INFO L273 TraceCheckUtils]: 2: Hoare triple {6935#true} assume true; {6935#true} is VALID [2018-11-23 10:31:27,590 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6935#true} {6935#true} #77#return; {6935#true} is VALID [2018-11-23 10:31:27,590 INFO L256 TraceCheckUtils]: 4: Hoare triple {6935#true} call #t~ret7 := main(); {6935#true} is VALID [2018-11-23 10:31:27,590 INFO L273 TraceCheckUtils]: 5: Hoare triple {6935#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {6935#true} is VALID [2018-11-23 10:31:27,592 INFO L273 TraceCheckUtils]: 6: Hoare triple {6935#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {6958#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} is VALID [2018-11-23 10:31:27,592 INFO L273 TraceCheckUtils]: 7: Hoare triple {6958#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,593 INFO L273 TraceCheckUtils]: 8: Hoare triple {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,593 INFO L273 TraceCheckUtils]: 9: Hoare triple {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,594 INFO L273 TraceCheckUtils]: 10: Hoare triple {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,594 INFO L273 TraceCheckUtils]: 11: Hoare triple {6962#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6975#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,595 INFO L273 TraceCheckUtils]: 12: Hoare triple {6975#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {6975#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,596 INFO L273 TraceCheckUtils]: 13: Hoare triple {6975#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~i~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {6982#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,598 INFO L273 TraceCheckUtils]: 14: Hoare triple {6982#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~i~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {6986#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,599 INFO L273 TraceCheckUtils]: 15: Hoare triple {6986#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6986#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,600 INFO L273 TraceCheckUtils]: 16: Hoare triple {6986#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {6986#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,601 INFO L273 TraceCheckUtils]: 17: Hoare triple {6986#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0))} ~i~0 := 0bv32; {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,602 INFO L273 TraceCheckUtils]: 18: Hoare triple {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,602 INFO L273 TraceCheckUtils]: 19: Hoare triple {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} assume #t~short6; {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,606 INFO L256 TraceCheckUtils]: 20: Hoare triple {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,606 INFO L273 TraceCheckUtils]: 21: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} ~cond := #in~cond; {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,607 INFO L273 TraceCheckUtils]: 22: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,607 INFO L273 TraceCheckUtils]: 23: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume true; {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,608 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} #81#return; {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,609 INFO L273 TraceCheckUtils]: 25: Hoare triple {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,609 INFO L273 TraceCheckUtils]: 26: Hoare triple {6996#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,610 INFO L273 TraceCheckUtils]: 27: Hoare triple {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,611 INFO L273 TraceCheckUtils]: 28: Hoare triple {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short6; {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,614 INFO L256 TraceCheckUtils]: 29: Hoare triple {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,615 INFO L273 TraceCheckUtils]: 30: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} ~cond := #in~cond; {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,615 INFO L273 TraceCheckUtils]: 31: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,616 INFO L273 TraceCheckUtils]: 32: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume true; {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,617 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #81#return; {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,618 INFO L273 TraceCheckUtils]: 34: Hoare triple {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,619 INFO L273 TraceCheckUtils]: 35: Hoare triple {7025#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,620 INFO L273 TraceCheckUtils]: 36: Hoare triple {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,620 INFO L273 TraceCheckUtils]: 37: Hoare triple {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} assume #t~short6; {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,623 INFO L256 TraceCheckUtils]: 38: Hoare triple {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,624 INFO L273 TraceCheckUtils]: 39: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} ~cond := #in~cond; {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,625 INFO L273 TraceCheckUtils]: 40: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,625 INFO L273 TraceCheckUtils]: 41: Hoare triple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} assume true; {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:27,626 INFO L268 TraceCheckUtils]: 42: Hoare quadruple {7006#(exists ((|v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (bvadd |v_main_~#volArray~0.offset_BEFORE_CALL_11| (_ bv12 32))) (_ bv4294967295 32)) (_ bv0 32)))} {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} #81#return; {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,627 INFO L273 TraceCheckUtils]: 43: Hoare triple {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:27,629 INFO L273 TraceCheckUtils]: 44: Hoare triple {7053#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv2 32) main_~i~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7081#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} is VALID [2018-11-23 10:31:27,631 INFO L273 TraceCheckUtils]: 45: Hoare triple {7081#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7085#|main_#t~short6|} is VALID [2018-11-23 10:31:27,632 INFO L273 TraceCheckUtils]: 46: Hoare triple {7085#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {6936#false} is VALID [2018-11-23 10:31:27,632 INFO L256 TraceCheckUtils]: 47: Hoare triple {6936#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6936#false} is VALID [2018-11-23 10:31:27,632 INFO L273 TraceCheckUtils]: 48: Hoare triple {6936#false} ~cond := #in~cond; {6936#false} is VALID [2018-11-23 10:31:27,633 INFO L273 TraceCheckUtils]: 49: Hoare triple {6936#false} assume 0bv32 == ~cond; {6936#false} is VALID [2018-11-23 10:31:27,633 INFO L273 TraceCheckUtils]: 50: Hoare triple {6936#false} assume !false; {6936#false} is VALID [2018-11-23 10:31:27,640 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 9 proven. 27 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:31:27,641 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:31:28,177 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:31:28,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:31:28,246 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:31:28,268 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:31:28,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:31:28,284 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:15 [2018-11-23 10:31:28,293 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:31:28,293 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, |main_~#volArray~0.offset|]. (or (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv12 32))) main_~MINVAL~0)) [2018-11-23 10:31:28,293 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_24]. (or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0)) [2018-11-23 10:31:28,672 INFO L273 TraceCheckUtils]: 50: Hoare triple {6936#false} assume !false; {6936#false} is VALID [2018-11-23 10:31:28,673 INFO L273 TraceCheckUtils]: 49: Hoare triple {6936#false} assume 0bv32 == ~cond; {6936#false} is VALID [2018-11-23 10:31:28,673 INFO L273 TraceCheckUtils]: 48: Hoare triple {6936#false} ~cond := #in~cond; {6936#false} is VALID [2018-11-23 10:31:28,673 INFO L256 TraceCheckUtils]: 47: Hoare triple {6936#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6936#false} is VALID [2018-11-23 10:31:28,674 INFO L273 TraceCheckUtils]: 46: Hoare triple {7085#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {6936#false} is VALID [2018-11-23 10:31:28,674 INFO L273 TraceCheckUtils]: 45: Hoare triple {7116#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7085#|main_#t~short6|} is VALID [2018-11-23 10:31:30,687 INFO L273 TraceCheckUtils]: 44: Hoare triple {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7116#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:31:30,688 INFO L273 TraceCheckUtils]: 43: Hoare triple {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:30,689 INFO L268 TraceCheckUtils]: 42: Hoare quadruple {6935#true} {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #81#return; {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:30,689 INFO L273 TraceCheckUtils]: 41: Hoare triple {6935#true} assume true; {6935#true} is VALID [2018-11-23 10:31:30,689 INFO L273 TraceCheckUtils]: 40: Hoare triple {6935#true} assume !(0bv32 == ~cond); {6935#true} is VALID [2018-11-23 10:31:30,689 INFO L273 TraceCheckUtils]: 39: Hoare triple {6935#true} ~cond := #in~cond; {6935#true} is VALID [2018-11-23 10:31:30,690 INFO L256 TraceCheckUtils]: 38: Hoare triple {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6935#true} is VALID [2018-11-23 10:31:30,690 INFO L273 TraceCheckUtils]: 37: Hoare triple {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short6; {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:30,690 INFO L273 TraceCheckUtils]: 36: Hoare triple {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:32,717 INFO L273 TraceCheckUtils]: 35: Hoare triple {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7120#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:31:32,717 INFO L273 TraceCheckUtils]: 34: Hoare triple {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:32,718 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {6935#true} {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #81#return; {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:32,718 INFO L273 TraceCheckUtils]: 32: Hoare triple {6935#true} assume true; {6935#true} is VALID [2018-11-23 10:31:32,718 INFO L273 TraceCheckUtils]: 31: Hoare triple {6935#true} assume !(0bv32 == ~cond); {6935#true} is VALID [2018-11-23 10:31:32,719 INFO L273 TraceCheckUtils]: 30: Hoare triple {6935#true} ~cond := #in~cond; {6935#true} is VALID [2018-11-23 10:31:32,719 INFO L256 TraceCheckUtils]: 29: Hoare triple {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6935#true} is VALID [2018-11-23 10:31:32,719 INFO L273 TraceCheckUtils]: 28: Hoare triple {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume #t~short6; {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:32,719 INFO L273 TraceCheckUtils]: 27: Hoare triple {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,730 INFO L273 TraceCheckUtils]: 26: Hoare triple {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7148#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:31:34,731 INFO L273 TraceCheckUtils]: 25: Hoare triple {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,732 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {6935#true} {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} #81#return; {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,732 INFO L273 TraceCheckUtils]: 23: Hoare triple {6935#true} assume true; {6935#true} is VALID [2018-11-23 10:31:34,732 INFO L273 TraceCheckUtils]: 22: Hoare triple {6935#true} assume !(0bv32 == ~cond); {6935#true} is VALID [2018-11-23 10:31:34,732 INFO L273 TraceCheckUtils]: 21: Hoare triple {6935#true} ~cond := #in~cond; {6935#true} is VALID [2018-11-23 10:31:34,732 INFO L256 TraceCheckUtils]: 20: Hoare triple {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6935#true} is VALID [2018-11-23 10:31:34,733 INFO L273 TraceCheckUtils]: 19: Hoare triple {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} assume #t~short6; {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,733 INFO L273 TraceCheckUtils]: 18: Hoare triple {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,734 INFO L273 TraceCheckUtils]: 17: Hoare triple {7204#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {7176#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,735 INFO L273 TraceCheckUtils]: 16: Hoare triple {7204#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {7204#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,735 INFO L273 TraceCheckUtils]: 15: Hoare triple {7204#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))) main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7204#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,768 INFO L273 TraceCheckUtils]: 14: Hoare triple {7214#(or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32))) (bvsge v_arrayElimCell_24 main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {7204#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:31:34,819 INFO L273 TraceCheckUtils]: 13: Hoare triple {7218#(or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {7214#(or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32))) (bvsge v_arrayElimCell_24 main_~MINVAL~0)))} is VALID [2018-11-23 10:31:34,823 INFO L273 TraceCheckUtils]: 12: Hoare triple {7218#(or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {7218#(or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} is VALID [2018-11-23 10:31:34,826 INFO L273 TraceCheckUtils]: 11: Hoare triple {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7218#(or (= (bvadd (bvmul (_ bv8 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} is VALID [2018-11-23 10:31:34,827 INFO L273 TraceCheckUtils]: 10: Hoare triple {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} is VALID [2018-11-23 10:31:34,827 INFO L273 TraceCheckUtils]: 9: Hoare triple {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} is VALID [2018-11-23 10:31:34,828 INFO L273 TraceCheckUtils]: 8: Hoare triple {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} is VALID [2018-11-23 10:31:34,829 INFO L273 TraceCheckUtils]: 7: Hoare triple {6935#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {7225#(or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (forall ((v_arrayElimCell_24 (_ BitVec 32)) (main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_24 main_~MINVAL~0))))} is VALID [2018-11-23 10:31:34,829 INFO L273 TraceCheckUtils]: 6: Hoare triple {6935#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {6935#true} is VALID [2018-11-23 10:31:34,829 INFO L273 TraceCheckUtils]: 5: Hoare triple {6935#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {6935#true} is VALID [2018-11-23 10:31:34,829 INFO L256 TraceCheckUtils]: 4: Hoare triple {6935#true} call #t~ret7 := main(); {6935#true} is VALID [2018-11-23 10:31:34,830 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6935#true} {6935#true} #77#return; {6935#true} is VALID [2018-11-23 10:31:34,830 INFO L273 TraceCheckUtils]: 2: Hoare triple {6935#true} assume true; {6935#true} is VALID [2018-11-23 10:31:34,830 INFO L273 TraceCheckUtils]: 1: Hoare triple {6935#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {6935#true} is VALID [2018-11-23 10:31:34,830 INFO L256 TraceCheckUtils]: 0: Hoare triple {6935#true} call ULTIMATE.init(); {6935#true} is VALID [2018-11-23 10:31:34,835 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 9 proven. 27 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:31:34,837 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:31:34,837 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 21 [2018-11-23 10:31:34,838 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 10:31:34,838 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:31:34,839 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-23 10:31:43,406 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 75 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:43,406 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 10:31:43,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 10:31:43,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=353, Unknown=0, NotChecked=0, Total=420 [2018-11-23 10:31:43,407 INFO L87 Difference]: Start difference. First operand 175 states and 193 transitions. Second operand 21 states. [2018-11-23 10:32:03,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:03,089 INFO L93 Difference]: Finished difference Result 217 states and 239 transitions. [2018-11-23 10:32:03,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 10:32:03,089 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 10:32:03,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:03,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:32:03,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 112 transitions. [2018-11-23 10:32:03,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:32:03,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 112 transitions. [2018-11-23 10:32:03,094 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 112 transitions. [2018-11-23 10:32:05,807 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 111 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:05,812 INFO L225 Difference]: With dead ends: 217 [2018-11-23 10:32:05,812 INFO L226 Difference]: Without dead ends: 201 [2018-11-23 10:32:05,813 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 77 SyntacticMatches, 5 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 293 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=256, Invalid=1226, Unknown=0, NotChecked=0, Total=1482 [2018-11-23 10:32:05,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-11-23 10:32:06,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 180. [2018-11-23 10:32:06,252 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:06,252 INFO L82 GeneralOperation]: Start isEquivalent. First operand 201 states. Second operand 180 states. [2018-11-23 10:32:06,252 INFO L74 IsIncluded]: Start isIncluded. First operand 201 states. Second operand 180 states. [2018-11-23 10:32:06,252 INFO L87 Difference]: Start difference. First operand 201 states. Second operand 180 states. [2018-11-23 10:32:06,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:06,257 INFO L93 Difference]: Finished difference Result 201 states and 221 transitions. [2018-11-23 10:32:06,257 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 221 transitions. [2018-11-23 10:32:06,258 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:06,258 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:06,258 INFO L74 IsIncluded]: Start isIncluded. First operand 180 states. Second operand 201 states. [2018-11-23 10:32:06,258 INFO L87 Difference]: Start difference. First operand 180 states. Second operand 201 states. [2018-11-23 10:32:06,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:06,264 INFO L93 Difference]: Finished difference Result 201 states and 221 transitions. [2018-11-23 10:32:06,264 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 221 transitions. [2018-11-23 10:32:06,265 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:06,265 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:06,265 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:06,265 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:06,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-11-23 10:32:06,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 199 transitions. [2018-11-23 10:32:06,270 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 199 transitions. Word has length 51 [2018-11-23 10:32:06,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:06,270 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 199 transitions. [2018-11-23 10:32:06,270 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 10:32:06,271 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 199 transitions. [2018-11-23 10:32:06,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 10:32:06,272 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:06,272 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:06,272 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:06,272 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:06,272 INFO L82 PathProgramCache]: Analyzing trace with hash 795850780, now seen corresponding path program 2 times [2018-11-23 10:32:06,273 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:06,273 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:06,296 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:32:06,479 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:32:06,479 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:06,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:06,542 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:06,909 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-11-23 10:32:06,984 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:32:06,991 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:32:06,994 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:06,998 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-11-23 10:32:07,146 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:32:07,156 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:07,157 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:07,159 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 52 [2018-11-23 10:32:07,165 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,178 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,206 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-11-23 10:32:07,379 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-23 10:32:07,388 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:07,390 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:07,392 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:07,394 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:07,395 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 68 [2018-11-23 10:32:07,399 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,416 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:07,442 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-11-23 10:32:07,857 INFO L256 TraceCheckUtils]: 0: Hoare triple {8231#true} call ULTIMATE.init(); {8231#true} is VALID [2018-11-23 10:32:07,857 INFO L273 TraceCheckUtils]: 1: Hoare triple {8231#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {8231#true} is VALID [2018-11-23 10:32:07,857 INFO L273 TraceCheckUtils]: 2: Hoare triple {8231#true} assume true; {8231#true} is VALID [2018-11-23 10:32:07,857 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8231#true} {8231#true} #77#return; {8231#true} is VALID [2018-11-23 10:32:07,858 INFO L256 TraceCheckUtils]: 4: Hoare triple {8231#true} call #t~ret7 := main(); {8231#true} is VALID [2018-11-23 10:32:07,858 INFO L273 TraceCheckUtils]: 5: Hoare triple {8231#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {8231#true} is VALID [2018-11-23 10:32:07,867 INFO L273 TraceCheckUtils]: 6: Hoare triple {8231#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {8254#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:07,868 INFO L273 TraceCheckUtils]: 7: Hoare triple {8254#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {8258#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,869 INFO L273 TraceCheckUtils]: 8: Hoare triple {8258#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {8258#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,870 INFO L273 TraceCheckUtils]: 9: Hoare triple {8258#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {8265#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,872 INFO L273 TraceCheckUtils]: 10: Hoare triple {8265#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {8269#(and (= (_ bv3 32) main_~CCCELVOL2~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32))) (_ bv0 32)) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,873 INFO L273 TraceCheckUtils]: 11: Hoare triple {8269#(and (= (_ bv3 32) main_~CCCELVOL2~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32))) (_ bv0 32)) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8273#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:07,874 INFO L273 TraceCheckUtils]: 12: Hoare triple {8273#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {8273#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:07,876 INFO L273 TraceCheckUtils]: 13: Hoare triple {8273#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {8280#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:07,878 INFO L273 TraceCheckUtils]: 14: Hoare triple {8280#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {8284#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,880 INFO L273 TraceCheckUtils]: 15: Hoare triple {8284#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8284#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,881 INFO L273 TraceCheckUtils]: 16: Hoare triple {8284#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {8284#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,883 INFO L273 TraceCheckUtils]: 17: Hoare triple {8284#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} ~i~0 := 0bv32; {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,885 INFO L273 TraceCheckUtils]: 18: Hoare triple {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,886 INFO L273 TraceCheckUtils]: 19: Hoare triple {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume #t~short6; {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,889 INFO L256 TraceCheckUtils]: 20: Hoare triple {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:07,890 INFO L273 TraceCheckUtils]: 21: Hoare triple {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} ~cond := #in~cond; {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:07,890 INFO L273 TraceCheckUtils]: 22: Hoare triple {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:07,891 INFO L273 TraceCheckUtils]: 23: Hoare triple {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} assume true; {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:07,891 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {8304#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_17| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv4 32)) (_ bv0 32)) (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv12 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_17|) (_ bv8 32)) (_ bv4294967293 32)) (_ bv0 32))))} {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #81#return; {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,893 INFO L273 TraceCheckUtils]: 25: Hoare triple {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,894 INFO L273 TraceCheckUtils]: 26: Hoare triple {8294#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8323#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:07,895 INFO L273 TraceCheckUtils]: 27: Hoare triple {8323#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8327#(not |main_#t~short6|)} is VALID [2018-11-23 10:32:07,896 INFO L273 TraceCheckUtils]: 28: Hoare triple {8327#(not |main_#t~short6|)} assume #t~short6; {8232#false} is VALID [2018-11-23 10:32:07,896 INFO L256 TraceCheckUtils]: 29: Hoare triple {8232#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8232#false} is VALID [2018-11-23 10:32:07,896 INFO L273 TraceCheckUtils]: 30: Hoare triple {8232#false} ~cond := #in~cond; {8232#false} is VALID [2018-11-23 10:32:07,897 INFO L273 TraceCheckUtils]: 31: Hoare triple {8232#false} assume !(0bv32 == ~cond); {8232#false} is VALID [2018-11-23 10:32:07,897 INFO L273 TraceCheckUtils]: 32: Hoare triple {8232#false} assume true; {8232#false} is VALID [2018-11-23 10:32:07,897 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {8232#false} {8232#false} #81#return; {8232#false} is VALID [2018-11-23 10:32:07,898 INFO L273 TraceCheckUtils]: 34: Hoare triple {8232#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {8232#false} is VALID [2018-11-23 10:32:07,898 INFO L273 TraceCheckUtils]: 35: Hoare triple {8232#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8232#false} is VALID [2018-11-23 10:32:07,898 INFO L273 TraceCheckUtils]: 36: Hoare triple {8232#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8232#false} is VALID [2018-11-23 10:32:07,899 INFO L273 TraceCheckUtils]: 37: Hoare triple {8232#false} assume #t~short6; {8232#false} is VALID [2018-11-23 10:32:07,899 INFO L256 TraceCheckUtils]: 38: Hoare triple {8232#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8232#false} is VALID [2018-11-23 10:32:07,899 INFO L273 TraceCheckUtils]: 39: Hoare triple {8232#false} ~cond := #in~cond; {8232#false} is VALID [2018-11-23 10:32:07,900 INFO L273 TraceCheckUtils]: 40: Hoare triple {8232#false} assume !(0bv32 == ~cond); {8232#false} is VALID [2018-11-23 10:32:07,900 INFO L273 TraceCheckUtils]: 41: Hoare triple {8232#false} assume true; {8232#false} is VALID [2018-11-23 10:32:07,900 INFO L268 TraceCheckUtils]: 42: Hoare quadruple {8232#false} {8232#false} #81#return; {8232#false} is VALID [2018-11-23 10:32:07,900 INFO L273 TraceCheckUtils]: 43: Hoare triple {8232#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {8232#false} is VALID [2018-11-23 10:32:07,901 INFO L273 TraceCheckUtils]: 44: Hoare triple {8232#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8232#false} is VALID [2018-11-23 10:32:07,901 INFO L273 TraceCheckUtils]: 45: Hoare triple {8232#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8232#false} is VALID [2018-11-23 10:32:07,901 INFO L273 TraceCheckUtils]: 46: Hoare triple {8232#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {8232#false} is VALID [2018-11-23 10:32:07,901 INFO L256 TraceCheckUtils]: 47: Hoare triple {8232#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8232#false} is VALID [2018-11-23 10:32:07,902 INFO L273 TraceCheckUtils]: 48: Hoare triple {8232#false} ~cond := #in~cond; {8232#false} is VALID [2018-11-23 10:32:07,902 INFO L273 TraceCheckUtils]: 49: Hoare triple {8232#false} assume 0bv32 == ~cond; {8232#false} is VALID [2018-11-23 10:32:07,902 INFO L273 TraceCheckUtils]: 50: Hoare triple {8232#false} assume !false; {8232#false} is VALID [2018-11-23 10:32:07,911 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 25 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 10:32:07,912 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:08,649 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2018-11-23 10:32:08,666 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 28 [2018-11-23 10:32:08,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 11 [2018-11-23 10:32:08,752 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:08,777 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 25 [2018-11-23 10:32:08,783 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:08,813 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:08,833 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:08,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:08,861 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:32 [2018-11-23 10:32:08,870 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:08,871 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (select (let ((.cse0 (bvmul (_ bv8 32) main_~i~0))) (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4 32)) (_ bv0 32))) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))) [2018-11-23 10:32:08,871 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_29]. (let ((.cse1 (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))) (and (let ((.cse0 (bvmul (_ bv8 32) main_~i~0))) (or (= (bvadd |main_~#volArray~0.offset| (_ bv4 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32))) .cse1 (= .cse0 (_ bv0 32)) (not (bvsge v_arrayElimCell_29 main_~MINVAL~0)))) (or .cse1 (not (bvsge (_ bv0 32) main_~MINVAL~0))))) [2018-11-23 10:32:09,395 INFO L273 TraceCheckUtils]: 50: Hoare triple {8232#false} assume !false; {8232#false} is VALID [2018-11-23 10:32:09,396 INFO L273 TraceCheckUtils]: 49: Hoare triple {8232#false} assume 0bv32 == ~cond; {8232#false} is VALID [2018-11-23 10:32:09,396 INFO L273 TraceCheckUtils]: 48: Hoare triple {8232#false} ~cond := #in~cond; {8232#false} is VALID [2018-11-23 10:32:09,396 INFO L256 TraceCheckUtils]: 47: Hoare triple {8232#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8232#false} is VALID [2018-11-23 10:32:09,396 INFO L273 TraceCheckUtils]: 46: Hoare triple {8232#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {8232#false} is VALID [2018-11-23 10:32:09,396 INFO L273 TraceCheckUtils]: 45: Hoare triple {8232#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8232#false} is VALID [2018-11-23 10:32:09,397 INFO L273 TraceCheckUtils]: 44: Hoare triple {8232#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8232#false} is VALID [2018-11-23 10:32:09,397 INFO L273 TraceCheckUtils]: 43: Hoare triple {8232#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {8232#false} is VALID [2018-11-23 10:32:09,397 INFO L268 TraceCheckUtils]: 42: Hoare quadruple {8231#true} {8232#false} #81#return; {8232#false} is VALID [2018-11-23 10:32:09,397 INFO L273 TraceCheckUtils]: 41: Hoare triple {8231#true} assume true; {8231#true} is VALID [2018-11-23 10:32:09,398 INFO L273 TraceCheckUtils]: 40: Hoare triple {8231#true} assume !(0bv32 == ~cond); {8231#true} is VALID [2018-11-23 10:32:09,398 INFO L273 TraceCheckUtils]: 39: Hoare triple {8231#true} ~cond := #in~cond; {8231#true} is VALID [2018-11-23 10:32:09,398 INFO L256 TraceCheckUtils]: 38: Hoare triple {8232#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8231#true} is VALID [2018-11-23 10:32:09,398 INFO L273 TraceCheckUtils]: 37: Hoare triple {8232#false} assume #t~short6; {8232#false} is VALID [2018-11-23 10:32:09,398 INFO L273 TraceCheckUtils]: 36: Hoare triple {8232#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8232#false} is VALID [2018-11-23 10:32:09,398 INFO L273 TraceCheckUtils]: 35: Hoare triple {8232#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8232#false} is VALID [2018-11-23 10:32:09,398 INFO L273 TraceCheckUtils]: 34: Hoare triple {8232#false} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {8232#false} is VALID [2018-11-23 10:32:09,398 INFO L268 TraceCheckUtils]: 33: Hoare quadruple {8231#true} {8232#false} #81#return; {8232#false} is VALID [2018-11-23 10:32:09,399 INFO L273 TraceCheckUtils]: 32: Hoare triple {8231#true} assume true; {8231#true} is VALID [2018-11-23 10:32:09,399 INFO L273 TraceCheckUtils]: 31: Hoare triple {8231#true} assume !(0bv32 == ~cond); {8231#true} is VALID [2018-11-23 10:32:09,399 INFO L273 TraceCheckUtils]: 30: Hoare triple {8231#true} ~cond := #in~cond; {8231#true} is VALID [2018-11-23 10:32:09,399 INFO L256 TraceCheckUtils]: 29: Hoare triple {8232#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8231#true} is VALID [2018-11-23 10:32:09,399 INFO L273 TraceCheckUtils]: 28: Hoare triple {8327#(not |main_#t~short6|)} assume #t~short6; {8232#false} is VALID [2018-11-23 10:32:09,400 INFO L273 TraceCheckUtils]: 27: Hoare triple {8466#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8327#(not |main_#t~short6|)} is VALID [2018-11-23 10:32:11,413 INFO L273 TraceCheckUtils]: 26: Hoare triple {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8466#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} is UNKNOWN [2018-11-23 10:32:11,413 INFO L273 TraceCheckUtils]: 25: Hoare triple {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} havoc #t~mem4;havoc #t~short6;havoc #t~mem5; {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,414 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {8231#true} {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} #81#return; {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,414 INFO L273 TraceCheckUtils]: 23: Hoare triple {8231#true} assume true; {8231#true} is VALID [2018-11-23 10:32:11,414 INFO L273 TraceCheckUtils]: 22: Hoare triple {8231#true} assume !(0bv32 == ~cond); {8231#true} is VALID [2018-11-23 10:32:11,415 INFO L273 TraceCheckUtils]: 21: Hoare triple {8231#true} ~cond := #in~cond; {8231#true} is VALID [2018-11-23 10:32:11,415 INFO L256 TraceCheckUtils]: 20: Hoare triple {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8231#true} is VALID [2018-11-23 10:32:11,415 INFO L273 TraceCheckUtils]: 19: Hoare triple {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} assume #t~short6; {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,415 INFO L273 TraceCheckUtils]: 18: Hoare triple {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,416 INFO L273 TraceCheckUtils]: 17: Hoare triple {8498#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} ~i~0 := 0bv32; {8470#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,416 INFO L273 TraceCheckUtils]: 16: Hoare triple {8498#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {8498#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,416 INFO L273 TraceCheckUtils]: 15: Hoare triple {8498#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8498#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,462 INFO L273 TraceCheckUtils]: 14: Hoare triple {8508#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {8498#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,472 INFO L273 TraceCheckUtils]: 13: Hoare triple {8508#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {8508#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,472 INFO L273 TraceCheckUtils]: 12: Hoare triple {8508#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {8508#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,482 INFO L273 TraceCheckUtils]: 11: Hoare triple {8518#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8508#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,502 INFO L273 TraceCheckUtils]: 10: Hoare triple {8522#(and (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (= (bvmul (_ bv8 32) main_~i~0) (_ bv0 32))) (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0))))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 1bv32))), 4bv32); {8518#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:32:11,536 INFO L273 TraceCheckUtils]: 9: Hoare triple {8526#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (= (bvmul (_ bv8 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_4)) (bvsge main_~CCCELVOL1~0 v_prenex_4)))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0)))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(2bv32, ~i~0), 2bv32))), 4bv32); {8522#(and (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (= (bvmul (_ bv8 32) main_~i~0) (_ bv0 32))) (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0))))} is VALID [2018-11-23 10:32:11,537 INFO L273 TraceCheckUtils]: 8: Hoare triple {8526#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (= (bvmul (_ bv8 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_4)) (bvsge main_~CCCELVOL1~0 v_prenex_4)))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 2bv32)); {8526#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (= (bvmul (_ bv8 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_4)) (bvsge main_~CCCELVOL1~0 v_prenex_4)))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0)))))} is VALID [2018-11-23 10:32:11,538 INFO L273 TraceCheckUtils]: 7: Hoare triple {8533#(forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0))))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 2bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 2bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {8526#(and (or (= (_ bv8 32) (bvmul (_ bv8 32) main_~i~0)) (= (bvmul (_ bv8 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_4 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_4)) (bvsge main_~CCCELVOL1~0 v_prenex_4)))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0)))))} is VALID [2018-11-23 10:32:11,539 INFO L273 TraceCheckUtils]: 6: Hoare triple {8231#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {8533#(forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge (_ bv0 32) main_~MINVAL~0))))} is VALID [2018-11-23 10:32:11,540 INFO L273 TraceCheckUtils]: 5: Hoare triple {8231#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {8231#true} is VALID [2018-11-23 10:32:11,540 INFO L256 TraceCheckUtils]: 4: Hoare triple {8231#true} call #t~ret7 := main(); {8231#true} is VALID [2018-11-23 10:32:11,540 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8231#true} {8231#true} #77#return; {8231#true} is VALID [2018-11-23 10:32:11,540 INFO L273 TraceCheckUtils]: 2: Hoare triple {8231#true} assume true; {8231#true} is VALID [2018-11-23 10:32:11,540 INFO L273 TraceCheckUtils]: 1: Hoare triple {8231#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {8231#true} is VALID [2018-11-23 10:32:11,540 INFO L256 TraceCheckUtils]: 0: Hoare triple {8231#true} call ULTIMATE.init(); {8231#true} is VALID [2018-11-23 10:32:11,544 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 21 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 10:32:11,546 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:11,546 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 21 [2018-11-23 10:32:11,547 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 10:32:11,547 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:11,548 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-23 10:32:13,927 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 64 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:13,928 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 10:32:13,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 10:32:13,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2018-11-23 10:32:13,928 INFO L87 Difference]: Start difference. First operand 180 states and 199 transitions. Second operand 21 states. [2018-11-23 10:32:17,541 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 32 [2018-11-23 10:32:20,302 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 31 [2018-11-23 10:32:20,866 WARN L180 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 36 [2018-11-23 10:32:31,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:31,009 INFO L93 Difference]: Finished difference Result 215 states and 237 transitions. [2018-11-23 10:32:31,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-23 10:32:31,009 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 10:32:31,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:31,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:32:31,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 137 transitions. [2018-11-23 10:32:31,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:32:31,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 137 transitions. [2018-11-23 10:32:31,015 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 27 states and 137 transitions. [2018-11-23 10:32:36,483 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 137 edges. 135 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:36,488 INFO L225 Difference]: With dead ends: 215 [2018-11-23 10:32:36,488 INFO L226 Difference]: Without dead ends: 194 [2018-11-23 10:32:36,490 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 350 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=382, Invalid=1340, Unknown=0, NotChecked=0, Total=1722 [2018-11-23 10:32:36,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-11-23 10:32:37,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 184. [2018-11-23 10:32:37,061 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:37,061 INFO L82 GeneralOperation]: Start isEquivalent. First operand 194 states. Second operand 184 states. [2018-11-23 10:32:37,061 INFO L74 IsIncluded]: Start isIncluded. First operand 194 states. Second operand 184 states. [2018-11-23 10:32:37,061 INFO L87 Difference]: Start difference. First operand 194 states. Second operand 184 states. [2018-11-23 10:32:37,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:37,068 INFO L93 Difference]: Finished difference Result 194 states and 212 transitions. [2018-11-23 10:32:37,068 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 212 transitions. [2018-11-23 10:32:37,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:37,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:37,069 INFO L74 IsIncluded]: Start isIncluded. First operand 184 states. Second operand 194 states. [2018-11-23 10:32:37,070 INFO L87 Difference]: Start difference. First operand 184 states. Second operand 194 states. [2018-11-23 10:32:37,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:37,075 INFO L93 Difference]: Finished difference Result 194 states and 212 transitions. [2018-11-23 10:32:37,075 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 212 transitions. [2018-11-23 10:32:37,076 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:37,076 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:37,076 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:37,076 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:37,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-11-23 10:32:37,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 202 transitions. [2018-11-23 10:32:37,081 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 202 transitions. Word has length 51 [2018-11-23 10:32:37,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:37,082 INFO L480 AbstractCegarLoop]: Abstraction has 184 states and 202 transitions. [2018-11-23 10:32:37,082 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 10:32:37,082 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 202 transitions. [2018-11-23 10:32:37,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 10:32:37,083 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:37,083 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:37,083 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:37,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:37,084 INFO L82 PathProgramCache]: Analyzing trace with hash -1009587554, now seen corresponding path program 3 times [2018-11-23 10:32:37,084 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:37,084 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:37,112 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:32:37,566 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:32:37,566 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:37,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:37,637 INFO L273 TraceCheckSpWp]: Computing forward predicates...