java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-tiling/pr4_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:29:11,864 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:29:11,866 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:29:11,879 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:29:11,879 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:29:11,880 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:29:11,881 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:29:11,883 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:29:11,885 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:29:11,886 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:29:11,887 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:29:11,887 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:29:11,888 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:29:11,889 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:29:11,891 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:29:11,891 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:29:11,892 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:29:11,894 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:29:11,896 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:29:11,898 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:29:11,900 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:29:11,901 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:29:11,904 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-23 10:29:11,911 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:29:11,911 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:29:11,912 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:29:11,913 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:29:11,913 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:29:11,929 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:29:11,930 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:29:11,930 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:29:11,931 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:29:11,931 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:29:11,931 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:29:11,932 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:29:11,932 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:29:11,932 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:29:11,932 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:29:11,933 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:29:11,933 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:29:11,933 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:29:11,933 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:29:11,933 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:29:11,933 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:29:11,934 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:29:11,934 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:29:11,934 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:29:11,934 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:29:11,934 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:29:11,935 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:29:11,935 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:29:11,935 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:29:11,935 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:29:11,935 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:29:11,936 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:29:11,936 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:29:11,936 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:29:11,936 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:29:11,936 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:29:11,936 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:29:11,937 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:29:11,981 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:29:11,994 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:29:11,997 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:29:11,999 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:29:12,000 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:29:12,001 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/pr4_true-unreach-call.i [2018-11-23 10:29:12,065 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6a2c041d3/7b32eae68237406797f0846c1fbafd53/FLAG8fdb1a944 [2018-11-23 10:29:12,514 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:29:12,515 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/pr4_true-unreach-call.i [2018-11-23 10:29:12,522 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6a2c041d3/7b32eae68237406797f0846c1fbafd53/FLAG8fdb1a944 [2018-11-23 10:29:12,883 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6a2c041d3/7b32eae68237406797f0846c1fbafd53 [2018-11-23 10:29:12,892 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:29:12,894 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:29:12,899 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:29:12,899 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:29:12,903 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:29:12,904 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:29:12" (1/1) ... [2018-11-23 10:29:12,907 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c04f9dd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:12, skipping insertion in model container [2018-11-23 10:29:12,907 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:29:12" (1/1) ... [2018-11-23 10:29:12,918 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:29:12,952 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:29:13,235 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:29:13,240 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:29:13,275 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:29:13,301 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:29:13,301 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13 WrapperNode [2018-11-23 10:29:13,302 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:29:13,303 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:29:13,303 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:29:13,303 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:29:13,313 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,323 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,331 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:29:13,332 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:29:13,332 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:29:13,332 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:29:13,342 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,342 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,346 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,346 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,362 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,370 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,372 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... [2018-11-23 10:29:13,375 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:29:13,376 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:29:13,376 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:29:13,376 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:29:13,377 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:29:13,501 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:29:13,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:29:13,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:29:13,502 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:29:13,502 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:29:13,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:29:13,502 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:29:13,503 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:29:13,503 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:29:13,503 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:29:13,503 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:29:13,503 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:29:14,330 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:29:14,331 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-11-23 10:29:14,332 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:29:14 BoogieIcfgContainer [2018-11-23 10:29:14,332 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:29:14,333 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:29:14,333 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:29:14,336 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:29:14,337 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:29:12" (1/3) ... [2018-11-23 10:29:14,338 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@563388e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:29:14, skipping insertion in model container [2018-11-23 10:29:14,338 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:13" (2/3) ... [2018-11-23 10:29:14,338 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@563388e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:29:14, skipping insertion in model container [2018-11-23 10:29:14,339 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:29:14" (3/3) ... [2018-11-23 10:29:14,341 INFO L112 eAbstractionObserver]: Analyzing ICFG pr4_true-unreach-call.i [2018-11-23 10:29:14,349 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:29:14,358 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:29:14,378 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:29:14,415 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:29:14,416 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:29:14,416 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:29:14,416 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:29:14,416 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:29:14,416 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:29:14,416 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:29:14,417 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:29:14,417 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:29:14,436 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2018-11-23 10:29:14,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 10:29:14,443 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:14,444 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:14,446 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:14,452 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:14,453 INFO L82 PathProgramCache]: Analyzing trace with hash -1387739323, now seen corresponding path program 1 times [2018-11-23 10:29:14,457 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:14,457 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:14,476 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:14,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:14,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:14,558 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:14,819 INFO L256 TraceCheckUtils]: 0: Hoare triple {35#true} call ULTIMATE.init(); {35#true} is VALID [2018-11-23 10:29:14,825 INFO L273 TraceCheckUtils]: 1: Hoare triple {35#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {35#true} is VALID [2018-11-23 10:29:14,826 INFO L273 TraceCheckUtils]: 2: Hoare triple {35#true} assume true; {35#true} is VALID [2018-11-23 10:29:14,827 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {35#true} {35#true} #89#return; {35#true} is VALID [2018-11-23 10:29:14,827 INFO L256 TraceCheckUtils]: 4: Hoare triple {35#true} call #t~ret7 := main(); {35#true} is VALID [2018-11-23 10:29:14,828 INFO L273 TraceCheckUtils]: 5: Hoare triple {35#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {35#true} is VALID [2018-11-23 10:29:14,828 INFO L273 TraceCheckUtils]: 6: Hoare triple {35#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {35#true} is VALID [2018-11-23 10:29:14,828 INFO L273 TraceCheckUtils]: 7: Hoare triple {35#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {35#true} is VALID [2018-11-23 10:29:14,832 INFO L273 TraceCheckUtils]: 8: Hoare triple {35#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {35#true} is VALID [2018-11-23 10:29:14,832 INFO L273 TraceCheckUtils]: 9: Hoare triple {35#true} ~i~0 := 0bv32; {35#true} is VALID [2018-11-23 10:29:14,833 INFO L273 TraceCheckUtils]: 10: Hoare triple {35#true} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {35#true} is VALID [2018-11-23 10:29:14,847 INFO L273 TraceCheckUtils]: 11: Hoare triple {35#true} assume #t~short6; {73#|main_#t~short6|} is VALID [2018-11-23 10:29:14,862 INFO L256 TraceCheckUtils]: 12: Hoare triple {73#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {77#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:14,872 INFO L273 TraceCheckUtils]: 13: Hoare triple {77#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {81#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:14,888 INFO L273 TraceCheckUtils]: 14: Hoare triple {81#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {36#false} is VALID [2018-11-23 10:29:14,889 INFO L273 TraceCheckUtils]: 15: Hoare triple {36#false} assume !false; {36#false} is VALID [2018-11-23 10:29:14,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:14,895 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:14,908 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:14,909 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:29:14,914 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 10:29:14,917 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:14,921 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:29:14,987 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:14,987 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:29:14,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:29:14,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:29:14,999 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 5 states. [2018-11-23 10:29:15,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:15,909 INFO L93 Difference]: Finished difference Result 56 states and 73 transitions. [2018-11-23 10:29:15,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:29:15,909 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 10:29:15,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:15,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:29:15,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 73 transitions. [2018-11-23 10:29:15,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:29:15,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 73 transitions. [2018-11-23 10:29:15,928 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 73 transitions. [2018-11-23 10:29:16,416 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:16,432 INFO L225 Difference]: With dead ends: 56 [2018-11-23 10:29:16,432 INFO L226 Difference]: Without dead ends: 32 [2018-11-23 10:29:16,436 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:29:16,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-11-23 10:29:16,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2018-11-23 10:29:16,586 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:16,587 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand 31 states. [2018-11-23 10:29:16,587 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 31 states. [2018-11-23 10:29:16,587 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 31 states. [2018-11-23 10:29:16,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:16,597 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2018-11-23 10:29:16,598 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2018-11-23 10:29:16,599 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:16,599 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:16,599 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 32 states. [2018-11-23 10:29:16,599 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 32 states. [2018-11-23 10:29:16,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:16,609 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2018-11-23 10:29:16,609 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2018-11-23 10:29:16,610 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:16,610 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:16,611 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:16,611 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:16,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 10:29:16,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 37 transitions. [2018-11-23 10:29:16,619 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 37 transitions. Word has length 16 [2018-11-23 10:29:16,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:16,619 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 37 transitions. [2018-11-23 10:29:16,620 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:29:16,620 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 37 transitions. [2018-11-23 10:29:16,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 10:29:16,621 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:16,621 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:16,621 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:16,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:16,622 INFO L82 PathProgramCache]: Analyzing trace with hash -1385892281, now seen corresponding path program 1 times [2018-11-23 10:29:16,622 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:16,623 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:16,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:16,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:16,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:16,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:16,847 INFO L256 TraceCheckUtils]: 0: Hoare triple {263#true} call ULTIMATE.init(); {263#true} is VALID [2018-11-23 10:29:16,847 INFO L273 TraceCheckUtils]: 1: Hoare triple {263#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {263#true} is VALID [2018-11-23 10:29:16,848 INFO L273 TraceCheckUtils]: 2: Hoare triple {263#true} assume true; {263#true} is VALID [2018-11-23 10:29:16,848 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {263#true} {263#true} #89#return; {263#true} is VALID [2018-11-23 10:29:16,849 INFO L256 TraceCheckUtils]: 4: Hoare triple {263#true} call #t~ret7 := main(); {263#true} is VALID [2018-11-23 10:29:16,849 INFO L273 TraceCheckUtils]: 5: Hoare triple {263#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {263#true} is VALID [2018-11-23 10:29:16,851 INFO L273 TraceCheckUtils]: 6: Hoare triple {263#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {286#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:29:16,856 INFO L273 TraceCheckUtils]: 7: Hoare triple {286#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {290#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:16,872 INFO L273 TraceCheckUtils]: 8: Hoare triple {290#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {264#false} is VALID [2018-11-23 10:29:16,873 INFO L273 TraceCheckUtils]: 9: Hoare triple {264#false} ~i~0 := 0bv32; {264#false} is VALID [2018-11-23 10:29:16,873 INFO L273 TraceCheckUtils]: 10: Hoare triple {264#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {264#false} is VALID [2018-11-23 10:29:16,873 INFO L273 TraceCheckUtils]: 11: Hoare triple {264#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {264#false} is VALID [2018-11-23 10:29:16,873 INFO L256 TraceCheckUtils]: 12: Hoare triple {264#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {264#false} is VALID [2018-11-23 10:29:16,874 INFO L273 TraceCheckUtils]: 13: Hoare triple {264#false} ~cond := #in~cond; {264#false} is VALID [2018-11-23 10:29:16,874 INFO L273 TraceCheckUtils]: 14: Hoare triple {264#false} assume 0bv32 == ~cond; {264#false} is VALID [2018-11-23 10:29:16,874 INFO L273 TraceCheckUtils]: 15: Hoare triple {264#false} assume !false; {264#false} is VALID [2018-11-23 10:29:16,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:16,877 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:16,879 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:16,879 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:29:16,881 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-23 10:29:16,881 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:16,882 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:29:16,971 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:16,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:29:16,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:29:16,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:29:16,972 INFO L87 Difference]: Start difference. First operand 31 states and 37 transitions. Second operand 4 states. [2018-11-23 10:29:17,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:17,494 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2018-11-23 10:29:17,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:29:17,495 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-23 10:29:17,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:17,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:17,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 56 transitions. [2018-11-23 10:29:17,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:17,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 56 transitions. [2018-11-23 10:29:17,503 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 56 transitions. [2018-11-23 10:29:17,727 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:17,730 INFO L225 Difference]: With dead ends: 54 [2018-11-23 10:29:17,731 INFO L226 Difference]: Without dead ends: 37 [2018-11-23 10:29:17,732 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:29:17,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-11-23 10:29:17,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 32. [2018-11-23 10:29:17,781 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:17,781 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand 32 states. [2018-11-23 10:29:17,781 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 32 states. [2018-11-23 10:29:17,782 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 32 states. [2018-11-23 10:29:17,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:17,785 INFO L93 Difference]: Finished difference Result 37 states and 47 transitions. [2018-11-23 10:29:17,785 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 47 transitions. [2018-11-23 10:29:17,786 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:17,786 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:17,786 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 37 states. [2018-11-23 10:29:17,787 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 37 states. [2018-11-23 10:29:17,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:17,790 INFO L93 Difference]: Finished difference Result 37 states and 47 transitions. [2018-11-23 10:29:17,790 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 47 transitions. [2018-11-23 10:29:17,791 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:17,791 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:17,791 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:17,792 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:17,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 10:29:17,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 38 transitions. [2018-11-23 10:29:17,794 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 38 transitions. Word has length 16 [2018-11-23 10:29:17,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:17,795 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 38 transitions. [2018-11-23 10:29:17,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:29:17,795 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2018-11-23 10:29:17,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 10:29:17,796 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:17,796 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:17,797 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:17,797 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:17,797 INFO L82 PathProgramCache]: Analyzing trace with hash 830594452, now seen corresponding path program 1 times [2018-11-23 10:29:17,798 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:17,798 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:17,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:17,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:17,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:17,947 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:18,106 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:29:18,117 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:29:18,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,127 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,152 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-11-23 10:29:18,253 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:29:18,266 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,273 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:29:18,276 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,347 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,396 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,397 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:32 [2018-11-23 10:29:18,409 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:18,410 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_22|, main_~CCCELVOL3~0]. (let ((.cse0 (select |v_#memory_int_22| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv16 32) main_~i~0))) (and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (store |v_#memory_int_22| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32)) main_~CCCELVOL3~0)) |#memory_int|) (= (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:29:18,410 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:29:18,442 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:29:18,455 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,458 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,460 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 54 [2018-11-23 10:29:18,468 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,482 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,509 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:48, output treesize:41 [2018-11-23 10:29:18,634 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-23 10:29:18,648 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,651 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,654 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,655 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,657 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,658 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:18,661 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 82 [2018-11-23 10:29:18,668 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,698 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:18,721 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:36 [2018-11-23 10:29:19,170 INFO L256 TraceCheckUtils]: 0: Hoare triple {501#true} call ULTIMATE.init(); {501#true} is VALID [2018-11-23 10:29:19,171 INFO L273 TraceCheckUtils]: 1: Hoare triple {501#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {501#true} is VALID [2018-11-23 10:29:19,171 INFO L273 TraceCheckUtils]: 2: Hoare triple {501#true} assume true; {501#true} is VALID [2018-11-23 10:29:19,172 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {501#true} {501#true} #89#return; {501#true} is VALID [2018-11-23 10:29:19,172 INFO L256 TraceCheckUtils]: 4: Hoare triple {501#true} call #t~ret7 := main(); {501#true} is VALID [2018-11-23 10:29:19,172 INFO L273 TraceCheckUtils]: 5: Hoare triple {501#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {501#true} is VALID [2018-11-23 10:29:19,176 INFO L273 TraceCheckUtils]: 6: Hoare triple {501#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {524#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:19,177 INFO L273 TraceCheckUtils]: 7: Hoare triple {524#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {528#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:19,178 INFO L273 TraceCheckUtils]: 8: Hoare triple {528#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {528#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:19,180 INFO L273 TraceCheckUtils]: 9: Hoare triple {528#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {535#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:19,184 INFO L273 TraceCheckUtils]: 10: Hoare triple {535#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {535#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:19,187 INFO L273 TraceCheckUtils]: 11: Hoare triple {535#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {542#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:19,193 INFO L273 TraceCheckUtils]: 12: Hoare triple {542#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {546#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:19,195 INFO L273 TraceCheckUtils]: 13: Hoare triple {546#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {546#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:19,210 INFO L273 TraceCheckUtils]: 14: Hoare triple {546#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {546#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:19,212 INFO L273 TraceCheckUtils]: 15: Hoare triple {546#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} ~i~0 := 0bv32; {556#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:19,213 INFO L273 TraceCheckUtils]: 16: Hoare triple {556#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {560#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) |main_#t~short6| (= main_~i~0 (_ bv0 32)) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:29:19,214 INFO L273 TraceCheckUtils]: 17: Hoare triple {560#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) |main_#t~short6| (= main_~i~0 (_ bv0 32)) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {502#false} is VALID [2018-11-23 10:29:19,215 INFO L256 TraceCheckUtils]: 18: Hoare triple {502#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {502#false} is VALID [2018-11-23 10:29:19,215 INFO L273 TraceCheckUtils]: 19: Hoare triple {502#false} ~cond := #in~cond; {502#false} is VALID [2018-11-23 10:29:19,216 INFO L273 TraceCheckUtils]: 20: Hoare triple {502#false} assume 0bv32 == ~cond; {502#false} is VALID [2018-11-23 10:29:19,217 INFO L273 TraceCheckUtils]: 21: Hoare triple {502#false} assume !false; {502#false} is VALID [2018-11-23 10:29:19,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:19,223 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:20,097 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-11-23 10:29:20,117 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 54 [2018-11-23 10:29:20,143 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:20,150 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 62 [2018-11-23 10:29:20,281 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:22,341 WARN L670 Elim1Store]: solver failed to check if following equality is implied: (= (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) |main_~#volArray~0.offset|) [2018-11-23 10:29:22,343 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:22,350 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:22,358 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:22,359 INFO L303 Elim1Store]: Index analysis took 2085 ms [2018-11-23 10:29:22,360 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 42 [2018-11-23 10:29:22,369 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:22,408 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:22,424 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:22,440 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:22,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:29:22,472 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:75, output treesize:27 [2018-11-23 10:29:22,495 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:22,495 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~MINVAL~0]. (let ((.cse0 (select (let ((.cse1 (bvmul (_ bv16 32) main_~i~0))) (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967292 32)) main_~CCCELVOL1~0)) |main_~#volArray~0.offset|))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (bvsge .cse0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) .cse0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)))) [2018-11-23 10:29:22,495 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [main_~MINVAL~0, v_arrayElimCell_6]. (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_6 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_6) (= (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) |main_~#volArray~0.offset|)) [2018-11-23 10:29:22,631 INFO L273 TraceCheckUtils]: 21: Hoare triple {502#false} assume !false; {502#false} is VALID [2018-11-23 10:29:22,631 INFO L273 TraceCheckUtils]: 20: Hoare triple {579#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {502#false} is VALID [2018-11-23 10:29:22,633 INFO L273 TraceCheckUtils]: 19: Hoare triple {583#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {579#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:29:22,633 INFO L256 TraceCheckUtils]: 18: Hoare triple {587#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {583#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:29:22,635 INFO L273 TraceCheckUtils]: 17: Hoare triple {591#(or |main_#t~short6| (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {587#|main_#t~short6|} is VALID [2018-11-23 10:29:22,638 INFO L273 TraceCheckUtils]: 16: Hoare triple {595#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {591#(or |main_#t~short6| (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-23 10:29:22,639 INFO L273 TraceCheckUtils]: 15: Hoare triple {599#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} ~i~0 := 0bv32; {595#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-23 10:29:22,640 INFO L273 TraceCheckUtils]: 14: Hoare triple {599#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {599#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:22,642 INFO L273 TraceCheckUtils]: 13: Hoare triple {599#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {599#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:22,654 INFO L273 TraceCheckUtils]: 12: Hoare triple {609#(or (= (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {599#(or (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:22,668 INFO L273 TraceCheckUtils]: 11: Hoare triple {613#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) (_ bv0 32)) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {609#(or (= (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)))} is VALID [2018-11-23 10:29:22,680 INFO L273 TraceCheckUtils]: 10: Hoare triple {613#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) (_ bv0 32)) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {613#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) (_ bv0 32)) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:22,724 INFO L273 TraceCheckUtils]: 9: Hoare triple {620#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_6 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_6 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_6))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {613#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) (_ bv0 32)) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:22,725 INFO L273 TraceCheckUtils]: 8: Hoare triple {620#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_6 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_6 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_6))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {620#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_6 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_6 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_6))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,726 INFO L273 TraceCheckUtils]: 7: Hoare triple {501#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {620#(or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_6 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_6 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_6))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,727 INFO L273 TraceCheckUtils]: 6: Hoare triple {501#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {501#true} is VALID [2018-11-23 10:29:22,727 INFO L273 TraceCheckUtils]: 5: Hoare triple {501#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {501#true} is VALID [2018-11-23 10:29:22,728 INFO L256 TraceCheckUtils]: 4: Hoare triple {501#true} call #t~ret7 := main(); {501#true} is VALID [2018-11-23 10:29:22,728 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {501#true} {501#true} #89#return; {501#true} is VALID [2018-11-23 10:29:22,728 INFO L273 TraceCheckUtils]: 2: Hoare triple {501#true} assume true; {501#true} is VALID [2018-11-23 10:29:22,729 INFO L273 TraceCheckUtils]: 1: Hoare triple {501#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {501#true} is VALID [2018-11-23 10:29:22,729 INFO L256 TraceCheckUtils]: 0: Hoare triple {501#true} call ULTIMATE.init(); {501#true} is VALID [2018-11-23 10:29:22,732 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:22,736 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:22,737 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11] total 18 [2018-11-23 10:29:22,737 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 22 [2018-11-23 10:29:22,737 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:22,738 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 10:29:23,003 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:23,003 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 10:29:23,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 10:29:23,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:29:23,004 INFO L87 Difference]: Start difference. First operand 32 states and 38 transitions. Second operand 18 states. [2018-11-23 10:29:25,263 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 45 [2018-11-23 10:29:25,950 WARN L180 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 47 [2018-11-23 10:29:26,532 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 49 [2018-11-23 10:29:27,373 WARN L180 SmtUtils]: Spent 186.00 ms on a formula simplification that was a NOOP. DAG size: 29 [2018-11-23 10:29:29,601 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification that was a NOOP. DAG size: 31 [2018-11-23 10:29:37,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:37,976 INFO L93 Difference]: Finished difference Result 133 states and 187 transitions. [2018-11-23 10:29:37,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-11-23 10:29:37,976 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 22 [2018-11-23 10:29:37,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:37,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:29:37,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 175 transitions. [2018-11-23 10:29:37,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:29:38,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 175 transitions. [2018-11-23 10:29:38,003 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 31 states and 175 transitions. [2018-11-23 10:29:43,487 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 173 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:43,493 INFO L225 Difference]: With dead ends: 133 [2018-11-23 10:29:43,494 INFO L226 Difference]: Without dead ends: 110 [2018-11-23 10:29:43,495 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=413, Invalid=1393, Unknown=0, NotChecked=0, Total=1806 [2018-11-23 10:29:43,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-23 10:29:43,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 61. [2018-11-23 10:29:43,634 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:43,635 INFO L82 GeneralOperation]: Start isEquivalent. First operand 110 states. Second operand 61 states. [2018-11-23 10:29:43,635 INFO L74 IsIncluded]: Start isIncluded. First operand 110 states. Second operand 61 states. [2018-11-23 10:29:43,635 INFO L87 Difference]: Start difference. First operand 110 states. Second operand 61 states. [2018-11-23 10:29:43,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:43,645 INFO L93 Difference]: Finished difference Result 110 states and 150 transitions. [2018-11-23 10:29:43,645 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 150 transitions. [2018-11-23 10:29:43,647 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:43,647 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:43,647 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 110 states. [2018-11-23 10:29:43,647 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 110 states. [2018-11-23 10:29:43,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:43,655 INFO L93 Difference]: Finished difference Result 110 states and 150 transitions. [2018-11-23 10:29:43,655 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 150 transitions. [2018-11-23 10:29:43,657 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:43,657 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:43,657 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:43,658 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:43,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-11-23 10:29:43,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 78 transitions. [2018-11-23 10:29:43,661 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 78 transitions. Word has length 22 [2018-11-23 10:29:43,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:43,662 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 78 transitions. [2018-11-23 10:29:43,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 10:29:43,662 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 78 transitions. [2018-11-23 10:29:43,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 10:29:43,663 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:43,663 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:43,664 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:43,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:43,664 INFO L82 PathProgramCache]: Analyzing trace with hash -183866139, now seen corresponding path program 1 times [2018-11-23 10:29:43,665 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:43,665 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:43,694 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:43,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:43,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:43,804 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:43,938 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:29:43,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:29:43,945 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:43,949 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:43,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:43,971 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-11-23 10:29:44,045 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:29:44,053 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,055 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 52 [2018-11-23 10:29:44,058 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:44,071 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:44,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:44,101 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:39 [2018-11-23 10:29:44,287 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-23 10:29:44,307 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,308 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,309 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,311 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,313 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,314 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:44,316 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 90 [2018-11-23 10:29:44,332 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:44,354 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:44,374 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:44,375 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:36 [2018-11-23 10:29:44,929 INFO L256 TraceCheckUtils]: 0: Hoare triple {1169#true} call ULTIMATE.init(); {1169#true} is VALID [2018-11-23 10:29:44,930 INFO L273 TraceCheckUtils]: 1: Hoare triple {1169#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1169#true} is VALID [2018-11-23 10:29:44,930 INFO L273 TraceCheckUtils]: 2: Hoare triple {1169#true} assume true; {1169#true} is VALID [2018-11-23 10:29:44,930 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1169#true} {1169#true} #89#return; {1169#true} is VALID [2018-11-23 10:29:44,930 INFO L256 TraceCheckUtils]: 4: Hoare triple {1169#true} call #t~ret7 := main(); {1169#true} is VALID [2018-11-23 10:29:44,931 INFO L273 TraceCheckUtils]: 5: Hoare triple {1169#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1169#true} is VALID [2018-11-23 10:29:44,932 INFO L273 TraceCheckUtils]: 6: Hoare triple {1169#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1192#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:44,932 INFO L273 TraceCheckUtils]: 7: Hoare triple {1192#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1196#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,933 INFO L273 TraceCheckUtils]: 8: Hoare triple {1196#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1196#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,934 INFO L273 TraceCheckUtils]: 9: Hoare triple {1196#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {1203#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,936 INFO L273 TraceCheckUtils]: 10: Hoare triple {1203#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {1207#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,941 INFO L273 TraceCheckUtils]: 11: Hoare triple {1207#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {1211#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,944 INFO L273 TraceCheckUtils]: 12: Hoare triple {1211#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {1215#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,946 INFO L273 TraceCheckUtils]: 13: Hoare triple {1215#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1215#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,960 INFO L273 TraceCheckUtils]: 14: Hoare triple {1215#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1215#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,961 INFO L273 TraceCheckUtils]: 15: Hoare triple {1215#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} ~i~0 := 0bv32; {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,963 INFO L273 TraceCheckUtils]: 16: Hoare triple {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,964 INFO L273 TraceCheckUtils]: 17: Hoare triple {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} assume #t~short6; {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,967 INFO L256 TraceCheckUtils]: 18: Hoare triple {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:29:44,968 INFO L273 TraceCheckUtils]: 19: Hoare triple {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} ~cond := #in~cond; {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:29:44,969 INFO L273 TraceCheckUtils]: 20: Hoare triple {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} assume !(0bv32 == ~cond); {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:29:44,970 INFO L273 TraceCheckUtils]: 21: Hoare triple {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} assume true; {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:29:44,971 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {1235#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (_ bv1 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv12 32))) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} #93#return; {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,973 INFO L273 TraceCheckUtils]: 23: Hoare triple {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,975 INFO L273 TraceCheckUtils]: 24: Hoare triple {1225#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1254#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,978 INFO L273 TraceCheckUtils]: 25: Hoare triple {1254#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv1 32) main_~MINVAL~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1258#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) |main_#t~short6| (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:44,979 INFO L273 TraceCheckUtils]: 26: Hoare triple {1258#(and (= (_ bv1 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) |main_#t~short6| (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {1170#false} is VALID [2018-11-23 10:29:44,979 INFO L256 TraceCheckUtils]: 27: Hoare triple {1170#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1170#false} is VALID [2018-11-23 10:29:44,979 INFO L273 TraceCheckUtils]: 28: Hoare triple {1170#false} ~cond := #in~cond; {1170#false} is VALID [2018-11-23 10:29:44,979 INFO L273 TraceCheckUtils]: 29: Hoare triple {1170#false} assume 0bv32 == ~cond; {1170#false} is VALID [2018-11-23 10:29:44,979 INFO L273 TraceCheckUtils]: 30: Hoare triple {1170#false} assume !false; {1170#false} is VALID [2018-11-23 10:29:44,986 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:44,987 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:45,802 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 63 [2018-11-23 10:29:45,811 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 58 [2018-11-23 10:29:45,852 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:45,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 66 [2018-11-23 10:29:45,992 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:45,993 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:46,005 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:46,021 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 48 [2018-11-23 10:29:46,046 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:29:46,112 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:29:46,138 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:29:46,165 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:29:46,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:29:46,209 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:75, output treesize:41 [2018-11-23 10:29:46,224 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:46,225 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (let ((.cse0 (select (let ((.cse1 (bvmul (_ bv16 32) main_~i~0))) (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967292 32)) main_~CCCELVOL1~0)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= .cse0 (_ bv0 32)) (bvsge .cse0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)))) [2018-11-23 10:29:46,225 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_11]. (let ((.cse0 (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))) (.cse1 (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)))) (and (or .cse0 (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) .cse1 (= (_ bv0 32) main_~CCCELVOL3~0)) (or .cse0 (= (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (bvsge v_arrayElimCell_11 main_~MINVAL~0) .cse1 (= (_ bv0 32) v_arrayElimCell_11)))) [2018-11-23 10:29:46,660 INFO L273 TraceCheckUtils]: 30: Hoare triple {1170#false} assume !false; {1170#false} is VALID [2018-11-23 10:29:46,661 INFO L273 TraceCheckUtils]: 29: Hoare triple {1277#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {1170#false} is VALID [2018-11-23 10:29:46,662 INFO L273 TraceCheckUtils]: 28: Hoare triple {1281#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1277#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:29:46,663 INFO L256 TraceCheckUtils]: 27: Hoare triple {1285#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1281#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:29:46,665 INFO L273 TraceCheckUtils]: 26: Hoare triple {1289#(or |main_#t~short6| (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {1285#|main_#t~short6|} is VALID [2018-11-23 10:29:46,667 INFO L273 TraceCheckUtils]: 25: Hoare triple {1293#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1289#(or |main_#t~short6| (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-23 10:29:48,698 INFO L273 TraceCheckUtils]: 24: Hoare triple {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1293#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is UNKNOWN [2018-11-23 10:29:48,699 INFO L273 TraceCheckUtils]: 23: Hoare triple {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} is VALID [2018-11-23 10:29:48,700 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {1169#true} {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} #93#return; {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} is VALID [2018-11-23 10:29:48,700 INFO L273 TraceCheckUtils]: 21: Hoare triple {1169#true} assume true; {1169#true} is VALID [2018-11-23 10:29:48,700 INFO L273 TraceCheckUtils]: 20: Hoare triple {1169#true} assume !(0bv32 == ~cond); {1169#true} is VALID [2018-11-23 10:29:48,701 INFO L273 TraceCheckUtils]: 19: Hoare triple {1169#true} ~cond := #in~cond; {1169#true} is VALID [2018-11-23 10:29:48,701 INFO L256 TraceCheckUtils]: 18: Hoare triple {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1169#true} is VALID [2018-11-23 10:29:48,701 INFO L273 TraceCheckUtils]: 17: Hoare triple {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} assume #t~short6; {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} is VALID [2018-11-23 10:29:48,716 INFO L273 TraceCheckUtils]: 16: Hoare triple {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} is VALID [2018-11-23 10:29:48,717 INFO L273 TraceCheckUtils]: 15: Hoare triple {1325#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} ~i~0 := 0bv32; {1297#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))))} is VALID [2018-11-23 10:29:48,718 INFO L273 TraceCheckUtils]: 14: Hoare triple {1325#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1325#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:48,718 INFO L273 TraceCheckUtils]: 13: Hoare triple {1325#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1325#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:48,737 INFO L273 TraceCheckUtils]: 12: Hoare triple {1335#(or (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {1325#(or (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:48,748 INFO L273 TraceCheckUtils]: 11: Hoare triple {1339#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {1335#(or (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (= (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:29:48,794 INFO L273 TraceCheckUtils]: 10: Hoare triple {1343#(and (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) (= (_ bv0 32) main_~CCCELVOL3~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (forall ((v_arrayElimCell_11 (_ BitVec 32))) (or (bvsge v_arrayElimCell_11 main_~MINVAL~0) (= (_ bv0 32) v_arrayElimCell_11))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {1339#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (= (_ bv0 32) (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) main_~CCCELVOL1~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)))} is VALID [2018-11-23 10:29:48,932 INFO L273 TraceCheckUtils]: 9: Hoare triple {1347#(and (or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_11 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_11))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (or (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_3)) (not (bvsge main_~CCCELVOL4~0 v_prenex_3)) (bvsge main_~CCCELVOL3~0 v_prenex_3) (not (bvsge main_~CCCELVOL1~0 v_prenex_3)))) (= (_ bv0 32) main_~CCCELVOL3~0)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {1343#(and (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) (= (_ bv0 32) main_~CCCELVOL3~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))) (or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (forall ((v_arrayElimCell_11 (_ BitVec 32))) (or (bvsge v_arrayElimCell_11 main_~MINVAL~0) (= (_ bv0 32) v_arrayElimCell_11))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))))} is VALID [2018-11-23 10:29:48,933 INFO L273 TraceCheckUtils]: 8: Hoare triple {1347#(and (or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_11 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_11))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (or (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_3)) (not (bvsge main_~CCCELVOL4~0 v_prenex_3)) (bvsge main_~CCCELVOL3~0 v_prenex_3) (not (bvsge main_~CCCELVOL1~0 v_prenex_3)))) (= (_ bv0 32) main_~CCCELVOL3~0)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1347#(and (or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_11 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_11))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (or (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_3)) (not (bvsge main_~CCCELVOL4~0 v_prenex_3)) (bvsge main_~CCCELVOL3~0 v_prenex_3) (not (bvsge main_~CCCELVOL1~0 v_prenex_3)))) (= (_ bv0 32) main_~CCCELVOL3~0)))} is VALID [2018-11-23 10:29:48,934 INFO L273 TraceCheckUtils]: 7: Hoare triple {1354#(or (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_3)) (not (bvsge main_~CCCELVOL4~0 v_prenex_3)) (bvsge main_~CCCELVOL3~0 v_prenex_3) (not (bvsge main_~CCCELVOL1~0 v_prenex_3)))) (= (_ bv0 32) main_~CCCELVOL3~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1347#(and (or (forall ((main_~MINVAL~0 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_11 main_~MINVAL~0) (not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (= (_ bv0 32) v_arrayElimCell_11))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (or (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_3)) (not (bvsge main_~CCCELVOL4~0 v_prenex_3)) (bvsge main_~CCCELVOL3~0 v_prenex_3) (not (bvsge main_~CCCELVOL1~0 v_prenex_3)))) (= (_ bv0 32) main_~CCCELVOL3~0)))} is VALID [2018-11-23 10:29:48,936 INFO L273 TraceCheckUtils]: 6: Hoare triple {1169#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1354#(or (forall ((v_prenex_3 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL2~0 v_prenex_3)) (not (bvsge main_~CCCELVOL4~0 v_prenex_3)) (bvsge main_~CCCELVOL3~0 v_prenex_3) (not (bvsge main_~CCCELVOL1~0 v_prenex_3)))) (= (_ bv0 32) main_~CCCELVOL3~0))} is VALID [2018-11-23 10:29:48,936 INFO L273 TraceCheckUtils]: 5: Hoare triple {1169#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1169#true} is VALID [2018-11-23 10:29:48,936 INFO L256 TraceCheckUtils]: 4: Hoare triple {1169#true} call #t~ret7 := main(); {1169#true} is VALID [2018-11-23 10:29:48,936 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1169#true} {1169#true} #89#return; {1169#true} is VALID [2018-11-23 10:29:48,937 INFO L273 TraceCheckUtils]: 2: Hoare triple {1169#true} assume true; {1169#true} is VALID [2018-11-23 10:29:48,937 INFO L273 TraceCheckUtils]: 1: Hoare triple {1169#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1169#true} is VALID [2018-11-23 10:29:48,938 INFO L256 TraceCheckUtils]: 0: Hoare triple {1169#true} call ULTIMATE.init(); {1169#true} is VALID [2018-11-23 10:29:48,944 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:48,946 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:48,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14] total 24 [2018-11-23 10:29:48,946 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 31 [2018-11-23 10:29:48,947 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:48,947 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 10:29:51,832 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 54 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:51,832 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 10:29:51,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 10:29:51,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=465, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:29:51,834 INFO L87 Difference]: Start difference. First operand 61 states and 78 transitions. Second operand 24 states. [2018-11-23 10:29:54,341 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 37 [2018-11-23 10:29:54,561 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 36 [2018-11-23 10:29:54,862 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 39 [2018-11-23 10:29:55,133 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 38 [2018-11-23 10:29:59,716 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 46 [2018-11-23 10:30:08,265 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 40 [2018-11-23 10:30:13,158 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-11-23 10:30:18,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:18,612 INFO L93 Difference]: Finished difference Result 201 states and 263 transitions. [2018-11-23 10:30:18,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-11-23 10:30:18,612 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 31 [2018-11-23 10:30:18,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:18,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:30:18,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 206 transitions. [2018-11-23 10:30:18,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:30:18,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 206 transitions. [2018-11-23 10:30:18,626 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 45 states and 206 transitions. [2018-11-23 10:30:33,166 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 206 edges. 200 inductive. 0 not inductive. 6 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:33,172 INFO L225 Difference]: With dead ends: 201 [2018-11-23 10:30:33,172 INFO L226 Difference]: Without dead ends: 151 [2018-11-23 10:30:33,174 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=713, Invalid=3069, Unknown=0, NotChecked=0, Total=3782 [2018-11-23 10:30:33,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-11-23 10:30:33,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 101. [2018-11-23 10:30:33,462 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:33,462 INFO L82 GeneralOperation]: Start isEquivalent. First operand 151 states. Second operand 101 states. [2018-11-23 10:30:33,462 INFO L74 IsIncluded]: Start isIncluded. First operand 151 states. Second operand 101 states. [2018-11-23 10:30:33,462 INFO L87 Difference]: Start difference. First operand 151 states. Second operand 101 states. [2018-11-23 10:30:33,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:33,470 INFO L93 Difference]: Finished difference Result 151 states and 192 transitions. [2018-11-23 10:30:33,470 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 192 transitions. [2018-11-23 10:30:33,472 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:33,472 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:33,472 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand 151 states. [2018-11-23 10:30:33,472 INFO L87 Difference]: Start difference. First operand 101 states. Second operand 151 states. [2018-11-23 10:30:33,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:33,479 INFO L93 Difference]: Finished difference Result 151 states and 192 transitions. [2018-11-23 10:30:33,480 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 192 transitions. [2018-11-23 10:30:33,481 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:33,481 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:33,481 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:33,481 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:33,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-23 10:30:33,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 121 transitions. [2018-11-23 10:30:33,486 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 121 transitions. Word has length 31 [2018-11-23 10:30:33,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:33,486 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 121 transitions. [2018-11-23 10:30:33,486 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 10:30:33,487 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 121 transitions. [2018-11-23 10:30:33,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 10:30:33,488 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:33,488 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:33,488 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:33,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:33,489 INFO L82 PathProgramCache]: Analyzing trace with hash -577661070, now seen corresponding path program 1 times [2018-11-23 10:30:33,489 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:33,489 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:33,509 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:33,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:33,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:33,629 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:33,872 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:30:33,877 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:30:33,878 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:33,882 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:33,904 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:33,904 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:27 [2018-11-23 10:30:33,963 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-23 10:30:33,972 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:33,974 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:33,975 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 39 [2018-11-23 10:30:33,979 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:33,991 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:34,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:34,010 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-11-23 10:30:34,421 INFO L256 TraceCheckUtils]: 0: Hoare triple {2148#true} call ULTIMATE.init(); {2148#true} is VALID [2018-11-23 10:30:34,421 INFO L273 TraceCheckUtils]: 1: Hoare triple {2148#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2148#true} is VALID [2018-11-23 10:30:34,421 INFO L273 TraceCheckUtils]: 2: Hoare triple {2148#true} assume true; {2148#true} is VALID [2018-11-23 10:30:34,422 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2148#true} {2148#true} #89#return; {2148#true} is VALID [2018-11-23 10:30:34,422 INFO L256 TraceCheckUtils]: 4: Hoare triple {2148#true} call #t~ret7 := main(); {2148#true} is VALID [2018-11-23 10:30:34,422 INFO L273 TraceCheckUtils]: 5: Hoare triple {2148#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2148#true} is VALID [2018-11-23 10:30:34,423 INFO L273 TraceCheckUtils]: 6: Hoare triple {2148#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2171#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:30:34,424 INFO L273 TraceCheckUtils]: 7: Hoare triple {2171#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2175#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,424 INFO L273 TraceCheckUtils]: 8: Hoare triple {2175#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2175#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,425 INFO L273 TraceCheckUtils]: 9: Hoare triple {2175#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {2182#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,426 INFO L273 TraceCheckUtils]: 10: Hoare triple {2182#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {2182#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,429 INFO L273 TraceCheckUtils]: 11: Hoare triple {2182#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {2189#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,431 INFO L273 TraceCheckUtils]: 12: Hoare triple {2189#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {2193#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,434 INFO L273 TraceCheckUtils]: 13: Hoare triple {2193#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2193#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,450 INFO L273 TraceCheckUtils]: 14: Hoare triple {2193#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2193#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,451 INFO L273 TraceCheckUtils]: 15: Hoare triple {2193#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} ~i~0 := 0bv32; {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,452 INFO L273 TraceCheckUtils]: 16: Hoare triple {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,453 INFO L273 TraceCheckUtils]: 17: Hoare triple {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} assume #t~short6; {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,455 INFO L256 TraceCheckUtils]: 18: Hoare triple {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,455 INFO L273 TraceCheckUtils]: 19: Hoare triple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} ~cond := #in~cond; {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,456 INFO L273 TraceCheckUtils]: 20: Hoare triple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} assume !(0bv32 == ~cond); {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,456 INFO L273 TraceCheckUtils]: 21: Hoare triple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} assume true; {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,457 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #93#return; {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,458 INFO L273 TraceCheckUtils]: 23: Hoare triple {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} is VALID [2018-11-23 10:30:34,459 INFO L273 TraceCheckUtils]: 24: Hoare triple {2203#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,462 INFO L273 TraceCheckUtils]: 25: Hoare triple {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,480 INFO L273 TraceCheckUtils]: 26: Hoare triple {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short6; {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,482 INFO L256 TraceCheckUtils]: 27: Hoare triple {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,491 INFO L273 TraceCheckUtils]: 28: Hoare triple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} ~cond := #in~cond; {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,491 INFO L273 TraceCheckUtils]: 29: Hoare triple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} assume !(0bv32 == ~cond); {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,492 INFO L273 TraceCheckUtils]: 30: Hoare triple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} assume true; {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:30:34,493 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {2213#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #93#return; {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,494 INFO L273 TraceCheckUtils]: 32: Hoare triple {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:34,495 INFO L273 TraceCheckUtils]: 33: Hoare triple {2232#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2260#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:30:34,498 INFO L273 TraceCheckUtils]: 34: Hoare triple {2260#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (bvsge (_ bv3 32) main_~MINVAL~0) (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2264#|main_#t~short6|} is VALID [2018-11-23 10:30:34,499 INFO L273 TraceCheckUtils]: 35: Hoare triple {2264#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {2149#false} is VALID [2018-11-23 10:30:34,499 INFO L256 TraceCheckUtils]: 36: Hoare triple {2149#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2149#false} is VALID [2018-11-23 10:30:34,499 INFO L273 TraceCheckUtils]: 37: Hoare triple {2149#false} ~cond := #in~cond; {2149#false} is VALID [2018-11-23 10:30:34,499 INFO L273 TraceCheckUtils]: 38: Hoare triple {2149#false} assume 0bv32 == ~cond; {2149#false} is VALID [2018-11-23 10:30:34,500 INFO L273 TraceCheckUtils]: 39: Hoare triple {2149#false} assume !false; {2149#false} is VALID [2018-11-23 10:30:34,508 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:30:34,508 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:30:34,976 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-23 10:30:34,984 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 27 [2018-11-23 10:30:37,156 WARN L670 Elim1Store]: solver failed to check if following equality is implied: (= (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) [2018-11-23 10:30:37,165 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,166 INFO L303 Elim1Store]: Index analysis took 2112 ms [2018-11-23 10:30:37,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-11-23 10:30:37,171 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:30:37,191 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:30:37,202 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:30:37,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:30:37,222 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:33, output treesize:21 [2018-11-23 10:30:37,231 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:30:37,232 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge (select (let ((.cse0 (bvmul (_ bv16 32) main_~i~0))) (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32)) (_ bv0 32))) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)) [2018-11-23 10:30:37,232 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_15]. (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge v_arrayElimCell_15 main_~MINVAL~0) (= (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) [2018-11-23 10:30:37,590 INFO L273 TraceCheckUtils]: 39: Hoare triple {2149#false} assume !false; {2149#false} is VALID [2018-11-23 10:30:37,591 INFO L273 TraceCheckUtils]: 38: Hoare triple {2149#false} assume 0bv32 == ~cond; {2149#false} is VALID [2018-11-23 10:30:37,591 INFO L273 TraceCheckUtils]: 37: Hoare triple {2149#false} ~cond := #in~cond; {2149#false} is VALID [2018-11-23 10:30:37,591 INFO L256 TraceCheckUtils]: 36: Hoare triple {2149#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2149#false} is VALID [2018-11-23 10:30:37,591 INFO L273 TraceCheckUtils]: 35: Hoare triple {2264#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {2149#false} is VALID [2018-11-23 10:30:37,592 INFO L273 TraceCheckUtils]: 34: Hoare triple {2295#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2264#|main_#t~short6|} is VALID [2018-11-23 10:30:39,624 INFO L273 TraceCheckUtils]: 33: Hoare triple {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2295#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:30:39,625 INFO L273 TraceCheckUtils]: 32: Hoare triple {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:39,625 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {2148#true} {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #93#return; {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:39,626 INFO L273 TraceCheckUtils]: 30: Hoare triple {2148#true} assume true; {2148#true} is VALID [2018-11-23 10:30:39,626 INFO L273 TraceCheckUtils]: 29: Hoare triple {2148#true} assume !(0bv32 == ~cond); {2148#true} is VALID [2018-11-23 10:30:39,626 INFO L273 TraceCheckUtils]: 28: Hoare triple {2148#true} ~cond := #in~cond; {2148#true} is VALID [2018-11-23 10:30:39,626 INFO L256 TraceCheckUtils]: 27: Hoare triple {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2148#true} is VALID [2018-11-23 10:30:39,626 INFO L273 TraceCheckUtils]: 26: Hoare triple {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short6; {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:39,628 INFO L273 TraceCheckUtils]: 25: Hoare triple {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,657 INFO L273 TraceCheckUtils]: 24: Hoare triple {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2299#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:30:41,657 INFO L273 TraceCheckUtils]: 23: Hoare triple {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,658 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {2148#true} {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #93#return; {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,658 INFO L273 TraceCheckUtils]: 21: Hoare triple {2148#true} assume true; {2148#true} is VALID [2018-11-23 10:30:41,659 INFO L273 TraceCheckUtils]: 20: Hoare triple {2148#true} assume !(0bv32 == ~cond); {2148#true} is VALID [2018-11-23 10:30:41,659 INFO L273 TraceCheckUtils]: 19: Hoare triple {2148#true} ~cond := #in~cond; {2148#true} is VALID [2018-11-23 10:30:41,659 INFO L256 TraceCheckUtils]: 18: Hoare triple {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2148#true} is VALID [2018-11-23 10:30:41,659 INFO L273 TraceCheckUtils]: 17: Hoare triple {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume #t~short6; {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,660 INFO L273 TraceCheckUtils]: 16: Hoare triple {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,660 INFO L273 TraceCheckUtils]: 15: Hoare triple {2355#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {2327#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,666 INFO L273 TraceCheckUtils]: 14: Hoare triple {2355#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2355#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,668 INFO L273 TraceCheckUtils]: 13: Hoare triple {2355#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2355#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,680 INFO L273 TraceCheckUtils]: 12: Hoare triple {2365#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {2355#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,701 INFO L273 TraceCheckUtils]: 11: Hoare triple {2369#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {2365#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:30:41,702 INFO L273 TraceCheckUtils]: 10: Hoare triple {2369#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {2369#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:41,757 INFO L273 TraceCheckUtils]: 9: Hoare triple {2376#(or (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {2369#(or (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:41,758 INFO L273 TraceCheckUtils]: 8: Hoare triple {2376#(or (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2376#(or (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:41,759 INFO L273 TraceCheckUtils]: 7: Hoare triple {2148#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2376#(or (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)) (not (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:41,759 INFO L273 TraceCheckUtils]: 6: Hoare triple {2148#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2148#true} is VALID [2018-11-23 10:30:41,759 INFO L273 TraceCheckUtils]: 5: Hoare triple {2148#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2148#true} is VALID [2018-11-23 10:30:41,759 INFO L256 TraceCheckUtils]: 4: Hoare triple {2148#true} call #t~ret7 := main(); {2148#true} is VALID [2018-11-23 10:30:41,760 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2148#true} {2148#true} #89#return; {2148#true} is VALID [2018-11-23 10:30:41,760 INFO L273 TraceCheckUtils]: 2: Hoare triple {2148#true} assume true; {2148#true} is VALID [2018-11-23 10:30:41,760 INFO L273 TraceCheckUtils]: 1: Hoare triple {2148#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2148#true} is VALID [2018-11-23 10:30:41,760 INFO L256 TraceCheckUtils]: 0: Hoare triple {2148#true} call ULTIMATE.init(); {2148#true} is VALID [2018-11-23 10:30:41,764 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:30:41,777 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:30:41,777 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 19 [2018-11-23 10:30:41,778 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 40 [2018-11-23 10:30:41,778 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:41,778 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 10:30:46,143 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 61 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:46,144 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 10:30:46,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 10:30:46,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=276, Unknown=0, NotChecked=0, Total=342 [2018-11-23 10:30:46,144 INFO L87 Difference]: Start difference. First operand 101 states and 121 transitions. Second operand 19 states. [2018-11-23 10:31:10,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:10,518 INFO L93 Difference]: Finished difference Result 336 states and 445 transitions. [2018-11-23 10:31:10,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-11-23 10:31:10,518 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 40 [2018-11-23 10:31:10,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:31:10,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:31:10,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 278 transitions. [2018-11-23 10:31:10,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:31:10,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 278 transitions. [2018-11-23 10:31:10,533 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 43 states and 278 transitions. [2018-11-23 10:31:20,890 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 278 edges. 274 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:20,899 INFO L225 Difference]: With dead ends: 336 [2018-11-23 10:31:20,899 INFO L226 Difference]: Without dead ends: 268 [2018-11-23 10:31:20,901 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 59 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 855 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=602, Invalid=2590, Unknown=0, NotChecked=0, Total=3192 [2018-11-23 10:31:20,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-11-23 10:31:21,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 169. [2018-11-23 10:31:21,404 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:31:21,404 INFO L82 GeneralOperation]: Start isEquivalent. First operand 268 states. Second operand 169 states. [2018-11-23 10:31:21,405 INFO L74 IsIncluded]: Start isIncluded. First operand 268 states. Second operand 169 states. [2018-11-23 10:31:21,405 INFO L87 Difference]: Start difference. First operand 268 states. Second operand 169 states. [2018-11-23 10:31:21,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:21,418 INFO L93 Difference]: Finished difference Result 268 states and 353 transitions. [2018-11-23 10:31:21,419 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 353 transitions. [2018-11-23 10:31:21,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:21,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:21,420 INFO L74 IsIncluded]: Start isIncluded. First operand 169 states. Second operand 268 states. [2018-11-23 10:31:21,420 INFO L87 Difference]: Start difference. First operand 169 states. Second operand 268 states. [2018-11-23 10:31:21,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:21,433 INFO L93 Difference]: Finished difference Result 268 states and 353 transitions. [2018-11-23 10:31:21,433 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 353 transitions. [2018-11-23 10:31:21,434 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:21,434 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:21,434 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:31:21,435 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:31:21,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-11-23 10:31:21,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 215 transitions. [2018-11-23 10:31:21,442 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 215 transitions. Word has length 40 [2018-11-23 10:31:21,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:31:21,442 INFO L480 AbstractCegarLoop]: Abstraction has 169 states and 215 transitions. [2018-11-23 10:31:21,443 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 10:31:21,443 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 215 transitions. [2018-11-23 10:31:21,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 10:31:21,444 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:31:21,444 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:31:21,444 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:31:21,445 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:31:21,445 INFO L82 PathProgramCache]: Analyzing trace with hash 1318015414, now seen corresponding path program 1 times [2018-11-23 10:31:21,445 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:31:21,445 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:31:21,475 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:31:21,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:21,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:21,549 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:31:21,653 INFO L256 TraceCheckUtils]: 0: Hoare triple {3678#true} call ULTIMATE.init(); {3678#true} is VALID [2018-11-23 10:31:21,653 INFO L273 TraceCheckUtils]: 1: Hoare triple {3678#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3678#true} is VALID [2018-11-23 10:31:21,653 INFO L273 TraceCheckUtils]: 2: Hoare triple {3678#true} assume true; {3678#true} is VALID [2018-11-23 10:31:21,654 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3678#true} {3678#true} #89#return; {3678#true} is VALID [2018-11-23 10:31:21,654 INFO L256 TraceCheckUtils]: 4: Hoare triple {3678#true} call #t~ret7 := main(); {3678#true} is VALID [2018-11-23 10:31:21,654 INFO L273 TraceCheckUtils]: 5: Hoare triple {3678#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3678#true} is VALID [2018-11-23 10:31:21,655 INFO L273 TraceCheckUtils]: 6: Hoare triple {3678#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3701#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0))} is VALID [2018-11-23 10:31:21,655 INFO L273 TraceCheckUtils]: 7: Hoare triple {3701#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3701#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0))} is VALID [2018-11-23 10:31:21,656 INFO L273 TraceCheckUtils]: 8: Hoare triple {3701#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3701#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0))} is VALID [2018-11-23 10:31:21,656 INFO L273 TraceCheckUtils]: 9: Hoare triple {3701#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {3711#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} is VALID [2018-11-23 10:31:21,657 INFO L273 TraceCheckUtils]: 10: Hoare triple {3711#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {3711#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} is VALID [2018-11-23 10:31:21,660 INFO L273 TraceCheckUtils]: 11: Hoare triple {3711#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {3718#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv3 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:31:21,663 INFO L273 TraceCheckUtils]: 12: Hoare triple {3718#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv3 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {3679#false} is VALID [2018-11-23 10:31:21,663 INFO L273 TraceCheckUtils]: 13: Hoare triple {3679#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3679#false} is VALID [2018-11-23 10:31:21,663 INFO L273 TraceCheckUtils]: 14: Hoare triple {3679#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3679#false} is VALID [2018-11-23 10:31:21,663 INFO L273 TraceCheckUtils]: 15: Hoare triple {3679#false} ~i~0 := 0bv32; {3679#false} is VALID [2018-11-23 10:31:21,664 INFO L273 TraceCheckUtils]: 16: Hoare triple {3679#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3679#false} is VALID [2018-11-23 10:31:21,664 INFO L273 TraceCheckUtils]: 17: Hoare triple {3679#false} assume #t~short6; {3679#false} is VALID [2018-11-23 10:31:21,664 INFO L256 TraceCheckUtils]: 18: Hoare triple {3679#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3679#false} is VALID [2018-11-23 10:31:21,664 INFO L273 TraceCheckUtils]: 19: Hoare triple {3679#false} ~cond := #in~cond; {3679#false} is VALID [2018-11-23 10:31:21,664 INFO L273 TraceCheckUtils]: 20: Hoare triple {3679#false} assume !(0bv32 == ~cond); {3679#false} is VALID [2018-11-23 10:31:21,664 INFO L273 TraceCheckUtils]: 21: Hoare triple {3679#false} assume true; {3679#false} is VALID [2018-11-23 10:31:21,664 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {3679#false} {3679#false} #93#return; {3679#false} is VALID [2018-11-23 10:31:21,665 INFO L273 TraceCheckUtils]: 23: Hoare triple {3679#false} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {3679#false} is VALID [2018-11-23 10:31:21,665 INFO L273 TraceCheckUtils]: 24: Hoare triple {3679#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3679#false} is VALID [2018-11-23 10:31:21,665 INFO L273 TraceCheckUtils]: 25: Hoare triple {3679#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3679#false} is VALID [2018-11-23 10:31:21,665 INFO L273 TraceCheckUtils]: 26: Hoare triple {3679#false} assume #t~short6; {3679#false} is VALID [2018-11-23 10:31:21,665 INFO L256 TraceCheckUtils]: 27: Hoare triple {3679#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3679#false} is VALID [2018-11-23 10:31:21,666 INFO L273 TraceCheckUtils]: 28: Hoare triple {3679#false} ~cond := #in~cond; {3679#false} is VALID [2018-11-23 10:31:21,666 INFO L273 TraceCheckUtils]: 29: Hoare triple {3679#false} assume !(0bv32 == ~cond); {3679#false} is VALID [2018-11-23 10:31:21,666 INFO L273 TraceCheckUtils]: 30: Hoare triple {3679#false} assume true; {3679#false} is VALID [2018-11-23 10:31:21,666 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {3679#false} {3679#false} #93#return; {3679#false} is VALID [2018-11-23 10:31:21,666 INFO L273 TraceCheckUtils]: 32: Hoare triple {3679#false} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {3679#false} is VALID [2018-11-23 10:31:21,667 INFO L273 TraceCheckUtils]: 33: Hoare triple {3679#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3679#false} is VALID [2018-11-23 10:31:21,667 INFO L273 TraceCheckUtils]: 34: Hoare triple {3679#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3679#false} is VALID [2018-11-23 10:31:21,667 INFO L273 TraceCheckUtils]: 35: Hoare triple {3679#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {3679#false} is VALID [2018-11-23 10:31:21,667 INFO L256 TraceCheckUtils]: 36: Hoare triple {3679#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3679#false} is VALID [2018-11-23 10:31:21,668 INFO L273 TraceCheckUtils]: 37: Hoare triple {3679#false} ~cond := #in~cond; {3679#false} is VALID [2018-11-23 10:31:21,668 INFO L273 TraceCheckUtils]: 38: Hoare triple {3679#false} assume 0bv32 == ~cond; {3679#false} is VALID [2018-11-23 10:31:21,668 INFO L273 TraceCheckUtils]: 39: Hoare triple {3679#false} assume !false; {3679#false} is VALID [2018-11-23 10:31:21,670 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 10:31:21,670 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:31:21,676 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:31:21,676 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:31:21,677 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2018-11-23 10:31:21,677 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:31:21,677 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:31:21,757 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:21,758 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:31:21,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:31:21,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:31:21,758 INFO L87 Difference]: Start difference. First operand 169 states and 215 transitions. Second operand 5 states. [2018-11-23 10:31:23,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:23,080 INFO L93 Difference]: Finished difference Result 280 states and 377 transitions. [2018-11-23 10:31:23,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:31:23,081 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2018-11-23 10:31:23,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:31:23,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:31:23,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 94 transitions. [2018-11-23 10:31:23,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:31:23,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 94 transitions. [2018-11-23 10:31:23,085 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 94 transitions. [2018-11-23 10:31:24,173 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:24,181 INFO L225 Difference]: With dead ends: 280 [2018-11-23 10:31:24,181 INFO L226 Difference]: Without dead ends: 213 [2018-11-23 10:31:24,182 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:31:24,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-11-23 10:31:25,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 181. [2018-11-23 10:31:25,101 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:31:25,101 INFO L82 GeneralOperation]: Start isEquivalent. First operand 213 states. Second operand 181 states. [2018-11-23 10:31:25,101 INFO L74 IsIncluded]: Start isIncluded. First operand 213 states. Second operand 181 states. [2018-11-23 10:31:25,102 INFO L87 Difference]: Start difference. First operand 213 states. Second operand 181 states. [2018-11-23 10:31:25,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:25,112 INFO L93 Difference]: Finished difference Result 213 states and 279 transitions. [2018-11-23 10:31:25,112 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 279 transitions. [2018-11-23 10:31:25,113 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:25,113 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:25,113 INFO L74 IsIncluded]: Start isIncluded. First operand 181 states. Second operand 213 states. [2018-11-23 10:31:25,113 INFO L87 Difference]: Start difference. First operand 181 states. Second operand 213 states. [2018-11-23 10:31:25,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:25,121 INFO L93 Difference]: Finished difference Result 213 states and 279 transitions. [2018-11-23 10:31:25,121 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 279 transitions. [2018-11-23 10:31:25,122 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:25,122 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:25,122 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:31:25,123 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:31:25,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-11-23 10:31:25,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 231 transitions. [2018-11-23 10:31:25,130 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 231 transitions. Word has length 40 [2018-11-23 10:31:25,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:31:25,130 INFO L480 AbstractCegarLoop]: Abstraction has 181 states and 231 transitions. [2018-11-23 10:31:25,130 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:31:25,131 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 231 transitions. [2018-11-23 10:31:25,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 10:31:25,132 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:31:25,132 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:31:25,132 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:31:25,132 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:31:25,132 INFO L82 PathProgramCache]: Analyzing trace with hash 808542324, now seen corresponding path program 1 times [2018-11-23 10:31:25,133 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:31:25,133 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:31:25,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:31:25,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:25,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:25,285 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:31:25,349 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:31:25,353 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:31:25,354 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:25,357 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:25,370 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:25,370 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-11-23 10:31:25,411 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-23 10:31:25,418 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:25,419 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-23 10:31:25,421 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:25,429 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:25,440 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:25,440 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:26, output treesize:22 [2018-11-23 10:31:25,796 INFO L256 TraceCheckUtils]: 0: Hoare triple {4849#true} call ULTIMATE.init(); {4849#true} is VALID [2018-11-23 10:31:25,796 INFO L273 TraceCheckUtils]: 1: Hoare triple {4849#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4849#true} is VALID [2018-11-23 10:31:25,796 INFO L273 TraceCheckUtils]: 2: Hoare triple {4849#true} assume true; {4849#true} is VALID [2018-11-23 10:31:25,796 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4849#true} {4849#true} #89#return; {4849#true} is VALID [2018-11-23 10:31:25,797 INFO L256 TraceCheckUtils]: 4: Hoare triple {4849#true} call #t~ret7 := main(); {4849#true} is VALID [2018-11-23 10:31:25,797 INFO L273 TraceCheckUtils]: 5: Hoare triple {4849#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4849#true} is VALID [2018-11-23 10:31:25,798 INFO L273 TraceCheckUtils]: 6: Hoare triple {4849#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4872#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:31:25,798 INFO L273 TraceCheckUtils]: 7: Hoare triple {4872#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,799 INFO L273 TraceCheckUtils]: 8: Hoare triple {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,801 INFO L273 TraceCheckUtils]: 9: Hoare triple {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,802 INFO L273 TraceCheckUtils]: 10: Hoare triple {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,804 INFO L273 TraceCheckUtils]: 11: Hoare triple {4876#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {4889#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,805 INFO L273 TraceCheckUtils]: 12: Hoare triple {4889#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {4893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,806 INFO L273 TraceCheckUtils]: 13: Hoare triple {4893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,807 INFO L273 TraceCheckUtils]: 14: Hoare triple {4893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,808 INFO L273 TraceCheckUtils]: 15: Hoare triple {4893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,809 INFO L273 TraceCheckUtils]: 16: Hoare triple {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,810 INFO L273 TraceCheckUtils]: 17: Hoare triple {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume #t~short6; {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,811 INFO L256 TraceCheckUtils]: 18: Hoare triple {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,812 INFO L273 TraceCheckUtils]: 19: Hoare triple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} ~cond := #in~cond; {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,812 INFO L273 TraceCheckUtils]: 20: Hoare triple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} assume !(0bv32 == ~cond); {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,813 INFO L273 TraceCheckUtils]: 21: Hoare triple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} assume true; {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,813 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #93#return; {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,814 INFO L273 TraceCheckUtils]: 23: Hoare triple {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:25,815 INFO L273 TraceCheckUtils]: 24: Hoare triple {4903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,816 INFO L273 TraceCheckUtils]: 25: Hoare triple {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,817 INFO L273 TraceCheckUtils]: 26: Hoare triple {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short6; {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,819 INFO L256 TraceCheckUtils]: 27: Hoare triple {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,820 INFO L273 TraceCheckUtils]: 28: Hoare triple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} ~cond := #in~cond; {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,821 INFO L273 TraceCheckUtils]: 29: Hoare triple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} assume !(0bv32 == ~cond); {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,821 INFO L273 TraceCheckUtils]: 30: Hoare triple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} assume true; {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:25,822 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {4913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32)))))} {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #93#return; {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,823 INFO L273 TraceCheckUtils]: 32: Hoare triple {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:25,823 INFO L273 TraceCheckUtils]: 33: Hoare triple {4932#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4960#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:25,824 INFO L273 TraceCheckUtils]: 34: Hoare triple {4960#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4960#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:31:25,826 INFO L273 TraceCheckUtils]: 35: Hoare triple {4960#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {4967#|main_#t~short6|} is VALID [2018-11-23 10:31:25,827 INFO L256 TraceCheckUtils]: 36: Hoare triple {4967#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4971#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:25,827 INFO L273 TraceCheckUtils]: 37: Hoare triple {4971#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {4975#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:25,828 INFO L273 TraceCheckUtils]: 38: Hoare triple {4975#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {4850#false} is VALID [2018-11-23 10:31:25,828 INFO L273 TraceCheckUtils]: 39: Hoare triple {4850#false} assume !false; {4850#false} is VALID [2018-11-23 10:31:25,834 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:31:25,834 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:31:26,153 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:31:26,192 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:31:26,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:26,195 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:26,198 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:26,199 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:7 [2018-11-23 10:31:26,203 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:31:26,203 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (= (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) (_ bv0 32)) [2018-11-23 10:31:26,203 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) [2018-11-23 10:31:26,254 INFO L273 TraceCheckUtils]: 39: Hoare triple {4850#false} assume !false; {4850#false} is VALID [2018-11-23 10:31:26,254 INFO L273 TraceCheckUtils]: 38: Hoare triple {4985#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {4850#false} is VALID [2018-11-23 10:31:26,255 INFO L273 TraceCheckUtils]: 37: Hoare triple {4989#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {4985#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:31:26,255 INFO L256 TraceCheckUtils]: 36: Hoare triple {4967#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4989#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:31:26,256 INFO L273 TraceCheckUtils]: 35: Hoare triple {4996#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {4967#|main_#t~short6|} is VALID [2018-11-23 10:31:26,256 INFO L273 TraceCheckUtils]: 34: Hoare triple {4996#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {4996#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:31:26,482 INFO L273 TraceCheckUtils]: 33: Hoare triple {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4996#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:31:26,483 INFO L273 TraceCheckUtils]: 32: Hoare triple {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:26,483 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {4849#true} {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #93#return; {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:26,484 INFO L273 TraceCheckUtils]: 30: Hoare triple {4849#true} assume true; {4849#true} is VALID [2018-11-23 10:31:26,484 INFO L273 TraceCheckUtils]: 29: Hoare triple {4849#true} assume !(0bv32 == ~cond); {4849#true} is VALID [2018-11-23 10:31:26,484 INFO L273 TraceCheckUtils]: 28: Hoare triple {4849#true} ~cond := #in~cond; {4849#true} is VALID [2018-11-23 10:31:26,484 INFO L256 TraceCheckUtils]: 27: Hoare triple {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4849#true} is VALID [2018-11-23 10:31:26,484 INFO L273 TraceCheckUtils]: 26: Hoare triple {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume #t~short6; {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:26,485 INFO L273 TraceCheckUtils]: 25: Hoare triple {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:26,793 INFO L273 TraceCheckUtils]: 24: Hoare triple {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5003#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:26,793 INFO L273 TraceCheckUtils]: 23: Hoare triple {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:31:26,794 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {4849#true} {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #93#return; {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:31:26,794 INFO L273 TraceCheckUtils]: 21: Hoare triple {4849#true} assume true; {4849#true} is VALID [2018-11-23 10:31:26,794 INFO L273 TraceCheckUtils]: 20: Hoare triple {4849#true} assume !(0bv32 == ~cond); {4849#true} is VALID [2018-11-23 10:31:26,794 INFO L273 TraceCheckUtils]: 19: Hoare triple {4849#true} ~cond := #in~cond; {4849#true} is VALID [2018-11-23 10:31:26,795 INFO L256 TraceCheckUtils]: 18: Hoare triple {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {4849#true} is VALID [2018-11-23 10:31:26,795 INFO L273 TraceCheckUtils]: 17: Hoare triple {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume #t~short6; {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:31:26,797 INFO L273 TraceCheckUtils]: 16: Hoare triple {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:31:26,798 INFO L273 TraceCheckUtils]: 15: Hoare triple {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} ~i~0 := 0bv32; {5031#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:31:26,799 INFO L273 TraceCheckUtils]: 14: Hoare triple {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:31:26,799 INFO L273 TraceCheckUtils]: 13: Hoare triple {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:31:26,802 INFO L273 TraceCheckUtils]: 12: Hoare triple {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:31:26,804 INFO L273 TraceCheckUtils]: 11: Hoare triple {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {5059#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:31:26,805 INFO L273 TraceCheckUtils]: 10: Hoare triple {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:26,805 INFO L273 TraceCheckUtils]: 9: Hoare triple {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:26,806 INFO L273 TraceCheckUtils]: 8: Hoare triple {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:26,806 INFO L273 TraceCheckUtils]: 7: Hoare triple {4849#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {5072#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:26,806 INFO L273 TraceCheckUtils]: 6: Hoare triple {4849#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4849#true} is VALID [2018-11-23 10:31:26,806 INFO L273 TraceCheckUtils]: 5: Hoare triple {4849#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4849#true} is VALID [2018-11-23 10:31:26,807 INFO L256 TraceCheckUtils]: 4: Hoare triple {4849#true} call #t~ret7 := main(); {4849#true} is VALID [2018-11-23 10:31:26,807 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4849#true} {4849#true} #89#return; {4849#true} is VALID [2018-11-23 10:31:26,807 INFO L273 TraceCheckUtils]: 2: Hoare triple {4849#true} assume true; {4849#true} is VALID [2018-11-23 10:31:26,807 INFO L273 TraceCheckUtils]: 1: Hoare triple {4849#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4849#true} is VALID [2018-11-23 10:31:26,807 INFO L256 TraceCheckUtils]: 0: Hoare triple {4849#true} call ULTIMATE.init(); {4849#true} is VALID [2018-11-23 10:31:26,810 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:31:26,812 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:31:26,812 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10] total 20 [2018-11-23 10:31:26,812 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 40 [2018-11-23 10:31:26,812 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:31:26,813 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 10:31:27,521 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:27,521 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 10:31:27,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 10:31:27,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=311, Unknown=0, NotChecked=0, Total=380 [2018-11-23 10:31:27,521 INFO L87 Difference]: Start difference. First operand 181 states and 231 transitions. Second operand 20 states. [2018-11-23 10:31:43,928 WARN L180 SmtUtils]: Spent 162.00 ms on a formula simplification that was a NOOP. DAG size: 23 [2018-11-23 10:32:06,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:06,322 INFO L93 Difference]: Finished difference Result 379 states and 497 transitions. [2018-11-23 10:32:06,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-11-23 10:32:06,322 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 40 [2018-11-23 10:32:06,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:06,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:32:06,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 219 transitions. [2018-11-23 10:32:06,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:32:06,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 219 transitions. [2018-11-23 10:32:06,332 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 39 states and 219 transitions. [2018-11-23 10:32:19,235 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 219 edges. 213 inductive. 0 not inductive. 6 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:19,245 INFO L225 Difference]: With dead ends: 379 [2018-11-23 10:32:19,245 INFO L226 Difference]: Without dead ends: 377 [2018-11-23 10:32:19,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 58 SyntacticMatches, 4 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 531 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=363, Invalid=1799, Unknown=0, NotChecked=0, Total=2162 [2018-11-23 10:32:19,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2018-11-23 10:32:20,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 307. [2018-11-23 10:32:20,133 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:20,133 INFO L82 GeneralOperation]: Start isEquivalent. First operand 377 states. Second operand 307 states. [2018-11-23 10:32:20,133 INFO L74 IsIncluded]: Start isIncluded. First operand 377 states. Second operand 307 states. [2018-11-23 10:32:20,133 INFO L87 Difference]: Start difference. First operand 377 states. Second operand 307 states. [2018-11-23 10:32:20,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:20,151 INFO L93 Difference]: Finished difference Result 377 states and 494 transitions. [2018-11-23 10:32:20,152 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 494 transitions. [2018-11-23 10:32:20,153 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:20,153 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:20,153 INFO L74 IsIncluded]: Start isIncluded. First operand 307 states. Second operand 377 states. [2018-11-23 10:32:20,154 INFO L87 Difference]: Start difference. First operand 307 states. Second operand 377 states. [2018-11-23 10:32:20,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:20,169 INFO L93 Difference]: Finished difference Result 377 states and 494 transitions. [2018-11-23 10:32:20,169 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 494 transitions. [2018-11-23 10:32:20,170 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:20,170 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:20,171 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:20,171 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:20,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2018-11-23 10:32:20,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 406 transitions. [2018-11-23 10:32:20,182 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 406 transitions. Word has length 40 [2018-11-23 10:32:20,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:20,182 INFO L480 AbstractCegarLoop]: Abstraction has 307 states and 406 transitions. [2018-11-23 10:32:20,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 10:32:20,183 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 406 transitions. [2018-11-23 10:32:20,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 10:32:20,184 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:20,185 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:20,185 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:20,185 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:20,185 INFO L82 PathProgramCache]: Analyzing trace with hash -1616898109, now seen corresponding path program 1 times [2018-11-23 10:32:20,185 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:20,186 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:20,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:20,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:20,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:20,284 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:20,533 INFO L256 TraceCheckUtils]: 0: Hoare triple {6816#true} call ULTIMATE.init(); {6816#true} is VALID [2018-11-23 10:32:20,534 INFO L273 TraceCheckUtils]: 1: Hoare triple {6816#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {6816#true} is VALID [2018-11-23 10:32:20,534 INFO L273 TraceCheckUtils]: 2: Hoare triple {6816#true} assume true; {6816#true} is VALID [2018-11-23 10:32:20,534 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6816#true} {6816#true} #89#return; {6816#true} is VALID [2018-11-23 10:32:20,535 INFO L256 TraceCheckUtils]: 4: Hoare triple {6816#true} call #t~ret7 := main(); {6816#true} is VALID [2018-11-23 10:32:20,535 INFO L273 TraceCheckUtils]: 5: Hoare triple {6816#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {6816#true} is VALID [2018-11-23 10:32:20,535 INFO L273 TraceCheckUtils]: 6: Hoare triple {6816#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {6816#true} is VALID [2018-11-23 10:32:20,535 INFO L273 TraceCheckUtils]: 7: Hoare triple {6816#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {6816#true} is VALID [2018-11-23 10:32:20,535 INFO L273 TraceCheckUtils]: 8: Hoare triple {6816#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6816#true} is VALID [2018-11-23 10:32:20,536 INFO L273 TraceCheckUtils]: 9: Hoare triple {6816#true} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:32:20,536 INFO L273 TraceCheckUtils]: 10: Hoare triple {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:32:20,537 INFO L273 TraceCheckUtils]: 11: Hoare triple {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:32:20,537 INFO L273 TraceCheckUtils]: 12: Hoare triple {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:32:20,537 INFO L273 TraceCheckUtils]: 13: Hoare triple {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:32:20,538 INFO L273 TraceCheckUtils]: 14: Hoare triple {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:32:20,538 INFO L273 TraceCheckUtils]: 15: Hoare triple {6848#(not (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {6817#false} is VALID [2018-11-23 10:32:20,538 INFO L273 TraceCheckUtils]: 16: Hoare triple {6817#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {6817#false} is VALID [2018-11-23 10:32:20,538 INFO L273 TraceCheckUtils]: 17: Hoare triple {6817#false} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {6817#false} is VALID [2018-11-23 10:32:20,538 INFO L273 TraceCheckUtils]: 18: Hoare triple {6817#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {6817#false} is VALID [2018-11-23 10:32:20,539 INFO L273 TraceCheckUtils]: 19: Hoare triple {6817#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6817#false} is VALID [2018-11-23 10:32:20,539 INFO L273 TraceCheckUtils]: 20: Hoare triple {6817#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6817#false} is VALID [2018-11-23 10:32:20,539 INFO L273 TraceCheckUtils]: 21: Hoare triple {6817#false} ~i~0 := 0bv32; {6817#false} is VALID [2018-11-23 10:32:20,539 INFO L273 TraceCheckUtils]: 22: Hoare triple {6817#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {6817#false} is VALID [2018-11-23 10:32:20,539 INFO L273 TraceCheckUtils]: 23: Hoare triple {6817#false} assume #t~short6; {6817#false} is VALID [2018-11-23 10:32:20,539 INFO L256 TraceCheckUtils]: 24: Hoare triple {6817#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6817#false} is VALID [2018-11-23 10:32:20,539 INFO L273 TraceCheckUtils]: 25: Hoare triple {6817#false} ~cond := #in~cond; {6817#false} is VALID [2018-11-23 10:32:20,540 INFO L273 TraceCheckUtils]: 26: Hoare triple {6817#false} assume !(0bv32 == ~cond); {6817#false} is VALID [2018-11-23 10:32:20,540 INFO L273 TraceCheckUtils]: 27: Hoare triple {6817#false} assume true; {6817#false} is VALID [2018-11-23 10:32:20,540 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {6817#false} {6817#false} #93#return; {6817#false} is VALID [2018-11-23 10:32:20,540 INFO L273 TraceCheckUtils]: 29: Hoare triple {6817#false} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {6817#false} is VALID [2018-11-23 10:32:20,540 INFO L273 TraceCheckUtils]: 30: Hoare triple {6817#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6817#false} is VALID [2018-11-23 10:32:20,540 INFO L273 TraceCheckUtils]: 31: Hoare triple {6817#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {6817#false} is VALID [2018-11-23 10:32:20,540 INFO L273 TraceCheckUtils]: 32: Hoare triple {6817#false} assume #t~short6; {6817#false} is VALID [2018-11-23 10:32:20,541 INFO L256 TraceCheckUtils]: 33: Hoare triple {6817#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6817#false} is VALID [2018-11-23 10:32:20,541 INFO L273 TraceCheckUtils]: 34: Hoare triple {6817#false} ~cond := #in~cond; {6817#false} is VALID [2018-11-23 10:32:20,541 INFO L273 TraceCheckUtils]: 35: Hoare triple {6817#false} assume !(0bv32 == ~cond); {6817#false} is VALID [2018-11-23 10:32:20,541 INFO L273 TraceCheckUtils]: 36: Hoare triple {6817#false} assume true; {6817#false} is VALID [2018-11-23 10:32:20,541 INFO L268 TraceCheckUtils]: 37: Hoare quadruple {6817#false} {6817#false} #93#return; {6817#false} is VALID [2018-11-23 10:32:20,541 INFO L273 TraceCheckUtils]: 38: Hoare triple {6817#false} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {6817#false} is VALID [2018-11-23 10:32:20,542 INFO L273 TraceCheckUtils]: 39: Hoare triple {6817#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6817#false} is VALID [2018-11-23 10:32:20,542 INFO L273 TraceCheckUtils]: 40: Hoare triple {6817#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {6817#false} is VALID [2018-11-23 10:32:20,542 INFO L273 TraceCheckUtils]: 41: Hoare triple {6817#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {6817#false} is VALID [2018-11-23 10:32:20,542 INFO L256 TraceCheckUtils]: 42: Hoare triple {6817#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {6817#false} is VALID [2018-11-23 10:32:20,542 INFO L273 TraceCheckUtils]: 43: Hoare triple {6817#false} ~cond := #in~cond; {6817#false} is VALID [2018-11-23 10:32:20,543 INFO L273 TraceCheckUtils]: 44: Hoare triple {6817#false} assume 0bv32 == ~cond; {6817#false} is VALID [2018-11-23 10:32:20,543 INFO L273 TraceCheckUtils]: 45: Hoare triple {6817#false} assume !false; {6817#false} is VALID [2018-11-23 10:32:20,544 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-23 10:32:20,544 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:20,547 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:20,547 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:32:20,547 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2018-11-23 10:32:20,548 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:20,548 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:32:20,635 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:20,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:32:20,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:32:20,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:20,637 INFO L87 Difference]: Start difference. First operand 307 states and 406 transitions. Second operand 3 states. [2018-11-23 10:32:23,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:23,678 INFO L93 Difference]: Finished difference Result 535 states and 699 transitions. [2018-11-23 10:32:23,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:32:23,679 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2018-11-23 10:32:23,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:23,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:23,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 74 transitions. [2018-11-23 10:32:23,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:23,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 74 transitions. [2018-11-23 10:32:23,682 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 74 transitions. [2018-11-23 10:32:23,937 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:23,947 INFO L225 Difference]: With dead ends: 535 [2018-11-23 10:32:23,947 INFO L226 Difference]: Without dead ends: 316 [2018-11-23 10:32:23,949 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:23,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 316 states. [2018-11-23 10:32:25,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 316 to 267. [2018-11-23 10:32:25,370 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:25,370 INFO L82 GeneralOperation]: Start isEquivalent. First operand 316 states. Second operand 267 states. [2018-11-23 10:32:25,370 INFO L74 IsIncluded]: Start isIncluded. First operand 316 states. Second operand 267 states. [2018-11-23 10:32:25,370 INFO L87 Difference]: Start difference. First operand 316 states. Second operand 267 states. [2018-11-23 10:32:25,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:25,384 INFO L93 Difference]: Finished difference Result 316 states and 406 transitions. [2018-11-23 10:32:25,384 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 406 transitions. [2018-11-23 10:32:25,386 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:25,386 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:25,386 INFO L74 IsIncluded]: Start isIncluded. First operand 267 states. Second operand 316 states. [2018-11-23 10:32:25,386 INFO L87 Difference]: Start difference. First operand 267 states. Second operand 316 states. [2018-11-23 10:32:25,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:25,398 INFO L93 Difference]: Finished difference Result 316 states and 406 transitions. [2018-11-23 10:32:25,398 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 406 transitions. [2018-11-23 10:32:25,399 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:25,399 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:25,400 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:25,400 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:25,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267 states. [2018-11-23 10:32:25,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 334 transitions. [2018-11-23 10:32:25,409 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 334 transitions. Word has length 46 [2018-11-23 10:32:25,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:25,409 INFO L480 AbstractCegarLoop]: Abstraction has 267 states and 334 transitions. [2018-11-23 10:32:25,409 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:32:25,409 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 334 transitions. [2018-11-23 10:32:25,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 10:32:25,411 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:25,411 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:25,411 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:25,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:25,412 INFO L82 PathProgramCache]: Analyzing trace with hash 1414196423, now seen corresponding path program 2 times [2018-11-23 10:32:25,412 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:25,412 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:25,443 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:32:25,560 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:32:25,560 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:25,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:25,612 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:26,376 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-23 10:32:26,417 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-23 10:32:26,442 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:26,476 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:26,561 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:26,561 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-11-23 10:32:27,039 INFO L256 TraceCheckUtils]: 0: Hoare triple {8680#true} call ULTIMATE.init(); {8680#true} is VALID [2018-11-23 10:32:27,040 INFO L273 TraceCheckUtils]: 1: Hoare triple {8680#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {8680#true} is VALID [2018-11-23 10:32:27,040 INFO L273 TraceCheckUtils]: 2: Hoare triple {8680#true} assume true; {8680#true} is VALID [2018-11-23 10:32:27,040 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8680#true} {8680#true} #89#return; {8680#true} is VALID [2018-11-23 10:32:27,040 INFO L256 TraceCheckUtils]: 4: Hoare triple {8680#true} call #t~ret7 := main(); {8680#true} is VALID [2018-11-23 10:32:27,040 INFO L273 TraceCheckUtils]: 5: Hoare triple {8680#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {8680#true} is VALID [2018-11-23 10:32:27,041 INFO L273 TraceCheckUtils]: 6: Hoare triple {8680#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {8703#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:32:27,041 INFO L273 TraceCheckUtils]: 7: Hoare triple {8703#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,042 INFO L273 TraceCheckUtils]: 8: Hoare triple {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,042 INFO L273 TraceCheckUtils]: 9: Hoare triple {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,043 INFO L273 TraceCheckUtils]: 10: Hoare triple {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,043 INFO L273 TraceCheckUtils]: 11: Hoare triple {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,045 INFO L273 TraceCheckUtils]: 12: Hoare triple {8707#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {8723#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,046 INFO L273 TraceCheckUtils]: 13: Hoare triple {8723#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8723#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,047 INFO L273 TraceCheckUtils]: 14: Hoare triple {8723#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8723#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,048 INFO L273 TraceCheckUtils]: 15: Hoare triple {8723#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,049 INFO L273 TraceCheckUtils]: 16: Hoare triple {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,049 INFO L273 TraceCheckUtils]: 17: Hoare triple {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume #t~short6; {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,051 INFO L256 TraceCheckUtils]: 18: Hoare triple {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,052 INFO L273 TraceCheckUtils]: 19: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} ~cond := #in~cond; {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,052 INFO L273 TraceCheckUtils]: 20: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} assume !(0bv32 == ~cond); {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,053 INFO L273 TraceCheckUtils]: 21: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} assume true; {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,054 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #93#return; {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,055 INFO L273 TraceCheckUtils]: 23: Hoare triple {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,056 INFO L273 TraceCheckUtils]: 24: Hoare triple {8733#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,057 INFO L273 TraceCheckUtils]: 25: Hoare triple {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,057 INFO L273 TraceCheckUtils]: 26: Hoare triple {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short6; {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,059 INFO L256 TraceCheckUtils]: 27: Hoare triple {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,060 INFO L273 TraceCheckUtils]: 28: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} ~cond := #in~cond; {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,061 INFO L273 TraceCheckUtils]: 29: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} assume !(0bv32 == ~cond); {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,061 INFO L273 TraceCheckUtils]: 30: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} assume true; {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,062 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #93#return; {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,063 INFO L273 TraceCheckUtils]: 32: Hoare triple {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:27,064 INFO L273 TraceCheckUtils]: 33: Hoare triple {8762#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:27,065 INFO L273 TraceCheckUtils]: 34: Hoare triple {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:27,066 INFO L273 TraceCheckUtils]: 35: Hoare triple {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume #t~short6; {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:27,068 INFO L256 TraceCheckUtils]: 36: Hoare triple {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,068 INFO L273 TraceCheckUtils]: 37: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} ~cond := #in~cond; {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,069 INFO L273 TraceCheckUtils]: 38: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} assume !(0bv32 == ~cond); {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,069 INFO L273 TraceCheckUtils]: 39: Hoare triple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} assume true; {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} is VALID [2018-11-23 10:32:27,070 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {8743#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_11| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_11|) (_ bv12 32))))} {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #93#return; {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:27,071 INFO L273 TraceCheckUtils]: 41: Hoare triple {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:27,072 INFO L273 TraceCheckUtils]: 42: Hoare triple {8790#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8818#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,073 INFO L273 TraceCheckUtils]: 43: Hoare triple {8818#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8818#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,074 INFO L273 TraceCheckUtils]: 44: Hoare triple {8818#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {8825#|main_#t~short6|} is VALID [2018-11-23 10:32:27,075 INFO L256 TraceCheckUtils]: 45: Hoare triple {8825#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8829#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:27,076 INFO L273 TraceCheckUtils]: 46: Hoare triple {8829#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {8833#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:27,076 INFO L273 TraceCheckUtils]: 47: Hoare triple {8833#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {8681#false} is VALID [2018-11-23 10:32:27,077 INFO L273 TraceCheckUtils]: 48: Hoare triple {8681#false} assume !false; {8681#false} is VALID [2018-11-23 10:32:27,083 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:32:27,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:27,488 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:32:27,528 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:32:27,531 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:27,533 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:27,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:27,536 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:7 [2018-11-23 10:32:27,542 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:27,543 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) [2018-11-23 10:32:27,543 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) [2018-11-23 10:32:27,594 INFO L273 TraceCheckUtils]: 48: Hoare triple {8681#false} assume !false; {8681#false} is VALID [2018-11-23 10:32:27,595 INFO L273 TraceCheckUtils]: 47: Hoare triple {8843#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {8681#false} is VALID [2018-11-23 10:32:27,595 INFO L273 TraceCheckUtils]: 46: Hoare triple {8847#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {8843#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:32:27,596 INFO L256 TraceCheckUtils]: 45: Hoare triple {8825#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8847#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:32:27,596 INFO L273 TraceCheckUtils]: 44: Hoare triple {8854#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {8825#|main_#t~short6|} is VALID [2018-11-23 10:32:27,596 INFO L273 TraceCheckUtils]: 43: Hoare triple {8854#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8854#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:32:27,788 INFO L273 TraceCheckUtils]: 42: Hoare triple {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8854#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:32:27,789 INFO L273 TraceCheckUtils]: 41: Hoare triple {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:32:27,790 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {8680#true} {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #93#return; {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:32:27,790 INFO L273 TraceCheckUtils]: 39: Hoare triple {8680#true} assume true; {8680#true} is VALID [2018-11-23 10:32:27,790 INFO L273 TraceCheckUtils]: 38: Hoare triple {8680#true} assume !(0bv32 == ~cond); {8680#true} is VALID [2018-11-23 10:32:27,790 INFO L273 TraceCheckUtils]: 37: Hoare triple {8680#true} ~cond := #in~cond; {8680#true} is VALID [2018-11-23 10:32:27,790 INFO L256 TraceCheckUtils]: 36: Hoare triple {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8680#true} is VALID [2018-11-23 10:32:27,791 INFO L273 TraceCheckUtils]: 35: Hoare triple {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume #t~short6; {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:32:27,791 INFO L273 TraceCheckUtils]: 34: Hoare triple {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:32:28,088 INFO L273 TraceCheckUtils]: 33: Hoare triple {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8861#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:32:28,088 INFO L273 TraceCheckUtils]: 32: Hoare triple {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:32:28,089 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {8680#true} {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #93#return; {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:32:28,089 INFO L273 TraceCheckUtils]: 30: Hoare triple {8680#true} assume true; {8680#true} is VALID [2018-11-23 10:32:28,089 INFO L273 TraceCheckUtils]: 29: Hoare triple {8680#true} assume !(0bv32 == ~cond); {8680#true} is VALID [2018-11-23 10:32:28,090 INFO L273 TraceCheckUtils]: 28: Hoare triple {8680#true} ~cond := #in~cond; {8680#true} is VALID [2018-11-23 10:32:28,090 INFO L256 TraceCheckUtils]: 27: Hoare triple {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8680#true} is VALID [2018-11-23 10:32:28,094 INFO L273 TraceCheckUtils]: 26: Hoare triple {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume #t~short6; {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:32:28,094 INFO L273 TraceCheckUtils]: 25: Hoare triple {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:32:28,447 INFO L273 TraceCheckUtils]: 24: Hoare triple {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8889#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:32:28,448 INFO L273 TraceCheckUtils]: 23: Hoare triple {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:32:28,448 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {8680#true} {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} #93#return; {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:32:28,448 INFO L273 TraceCheckUtils]: 21: Hoare triple {8680#true} assume true; {8680#true} is VALID [2018-11-23 10:32:28,448 INFO L273 TraceCheckUtils]: 20: Hoare triple {8680#true} assume !(0bv32 == ~cond); {8680#true} is VALID [2018-11-23 10:32:28,449 INFO L273 TraceCheckUtils]: 19: Hoare triple {8680#true} ~cond := #in~cond; {8680#true} is VALID [2018-11-23 10:32:28,449 INFO L256 TraceCheckUtils]: 18: Hoare triple {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {8680#true} is VALID [2018-11-23 10:32:28,449 INFO L273 TraceCheckUtils]: 17: Hoare triple {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} assume #t~short6; {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:32:28,449 INFO L273 TraceCheckUtils]: 16: Hoare triple {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:32:28,450 INFO L273 TraceCheckUtils]: 15: Hoare triple {8945#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} ~i~0 := 0bv32; {8917#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:32:28,450 INFO L273 TraceCheckUtils]: 14: Hoare triple {8945#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8945#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} is VALID [2018-11-23 10:32:28,451 INFO L273 TraceCheckUtils]: 13: Hoare triple {8945#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8945#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} is VALID [2018-11-23 10:32:28,452 INFO L273 TraceCheckUtils]: 12: Hoare triple {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {8945#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} is VALID [2018-11-23 10:32:28,453 INFO L273 TraceCheckUtils]: 11: Hoare triple {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:28,453 INFO L273 TraceCheckUtils]: 10: Hoare triple {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:28,454 INFO L273 TraceCheckUtils]: 9: Hoare triple {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:28,454 INFO L273 TraceCheckUtils]: 8: Hoare triple {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:28,455 INFO L273 TraceCheckUtils]: 7: Hoare triple {8680#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {8955#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:28,455 INFO L273 TraceCheckUtils]: 6: Hoare triple {8680#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {8680#true} is VALID [2018-11-23 10:32:28,455 INFO L273 TraceCheckUtils]: 5: Hoare triple {8680#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {8680#true} is VALID [2018-11-23 10:32:28,456 INFO L256 TraceCheckUtils]: 4: Hoare triple {8680#true} call #t~ret7 := main(); {8680#true} is VALID [2018-11-23 10:32:28,456 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8680#true} {8680#true} #89#return; {8680#true} is VALID [2018-11-23 10:32:28,456 INFO L273 TraceCheckUtils]: 2: Hoare triple {8680#true} assume true; {8680#true} is VALID [2018-11-23 10:32:28,456 INFO L273 TraceCheckUtils]: 1: Hoare triple {8680#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {8680#true} is VALID [2018-11-23 10:32:28,456 INFO L256 TraceCheckUtils]: 0: Hoare triple {8680#true} call ULTIMATE.init(); {8680#true} is VALID [2018-11-23 10:32:28,460 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 25 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:32:28,462 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:28,462 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 21 [2018-11-23 10:32:28,463 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-11-23 10:32:28,463 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:28,463 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-23 10:32:30,054 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:30,054 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 10:32:30,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 10:32:30,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2018-11-23 10:32:30,055 INFO L87 Difference]: Start difference. First operand 267 states and 334 transitions. Second operand 21 states.