java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-tiling/pr5_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:29:17,912 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:29:17,915 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:29:17,929 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:29:17,930 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:29:17,931 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:29:17,932 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:29:17,934 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:29:17,936 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:29:17,937 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:29:17,937 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:29:17,938 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:29:17,939 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:29:17,940 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:29:17,941 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:29:17,942 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:29:17,942 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:29:17,944 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:29:17,946 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:29:17,948 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:29:17,949 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:29:17,950 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:29:17,953 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-23 10:29:17,961 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:29:17,962 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:29:17,963 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:29:17,963 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:29:17,964 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:29:17,979 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:29:17,979 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:29:17,980 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:29:17,980 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:29:17,981 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:29:17,981 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:29:17,981 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:29:17,981 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:29:17,982 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:29:17,982 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:29:17,982 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:29:17,982 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:29:17,982 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:29:17,983 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:29:17,983 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:29:17,983 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:29:17,983 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:29:17,983 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:29:17,984 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:29:17,984 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:29:17,984 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:29:17,984 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:29:17,984 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:29:17,985 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:29:17,985 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:29:17,985 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:29:17,985 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:29:17,985 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:29:17,986 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:29:17,986 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:29:17,986 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:29:17,986 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:29:17,986 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:29:18,032 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:29:18,051 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:29:18,054 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:29:18,056 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:29:18,056 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:29:18,057 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/pr5_true-unreach-call.i [2018-11-23 10:29:18,115 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a934b7b41/ab85f500ec654329aaa7f8d463d0f8e2/FLAG018ae1ecc [2018-11-23 10:29:18,565 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:29:18,566 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/pr5_true-unreach-call.i [2018-11-23 10:29:18,573 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a934b7b41/ab85f500ec654329aaa7f8d463d0f8e2/FLAG018ae1ecc [2018-11-23 10:29:18,921 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a934b7b41/ab85f500ec654329aaa7f8d463d0f8e2 [2018-11-23 10:29:18,932 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:29:18,934 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:29:18,935 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:29:18,935 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:29:18,939 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:29:18,941 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:29:18" (1/1) ... [2018-11-23 10:29:18,944 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4c4df8dd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:18, skipping insertion in model container [2018-11-23 10:29:18,944 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:29:18" (1/1) ... [2018-11-23 10:29:18,955 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:29:18,982 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:29:19,251 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:29:19,258 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:29:19,313 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:29:19,340 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:29:19,341 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19 WrapperNode [2018-11-23 10:29:19,341 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:29:19,342 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:29:19,342 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:29:19,342 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:29:19,350 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,360 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,369 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:29:19,370 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:29:19,370 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:29:19,370 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:29:19,380 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,381 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,386 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,386 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,412 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,421 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,423 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... [2018-11-23 10:29:19,426 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:29:19,428 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:29:19,428 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:29:19,429 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:29:19,431 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:29:19,552 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:29:19,553 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:29:19,553 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:29:19,553 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:29:19,553 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:29:19,553 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:29:19,553 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:29:19,553 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:29:19,554 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:29:19,554 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:29:19,554 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:29:19,554 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:29:20,430 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:29:20,431 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-11-23 10:29:20,431 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:29:20 BoogieIcfgContainer [2018-11-23 10:29:20,431 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:29:20,432 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:29:20,432 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:29:20,436 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:29:20,436 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:29:18" (1/3) ... [2018-11-23 10:29:20,437 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@99769af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:29:20, skipping insertion in model container [2018-11-23 10:29:20,437 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:29:19" (2/3) ... [2018-11-23 10:29:20,438 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@99769af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:29:20, skipping insertion in model container [2018-11-23 10:29:20,438 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:29:20" (3/3) ... [2018-11-23 10:29:20,440 INFO L112 eAbstractionObserver]: Analyzing ICFG pr5_true-unreach-call.i [2018-11-23 10:29:20,449 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:29:20,458 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:29:20,476 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:29:20,509 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:29:20,509 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:29:20,510 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:29:20,510 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:29:20,511 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:29:20,511 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:29:20,511 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:29:20,511 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:29:20,511 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:29:20,528 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states. [2018-11-23 10:29:20,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 10:29:20,535 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:20,536 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:20,538 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:20,544 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:20,545 INFO L82 PathProgramCache]: Analyzing trace with hash 65656709, now seen corresponding path program 1 times [2018-11-23 10:29:20,549 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:20,549 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:20,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:20,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:20,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:20,668 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:20,957 INFO L256 TraceCheckUtils]: 0: Hoare triple {36#true} call ULTIMATE.init(); {36#true} is VALID [2018-11-23 10:29:20,960 INFO L273 TraceCheckUtils]: 1: Hoare triple {36#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {36#true} is VALID [2018-11-23 10:29:20,961 INFO L273 TraceCheckUtils]: 2: Hoare triple {36#true} assume true; {36#true} is VALID [2018-11-23 10:29:20,962 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {36#true} {36#true} #95#return; {36#true} is VALID [2018-11-23 10:29:20,962 INFO L256 TraceCheckUtils]: 4: Hoare triple {36#true} call #t~ret7 := main(); {36#true} is VALID [2018-11-23 10:29:20,962 INFO L273 TraceCheckUtils]: 5: Hoare triple {36#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {36#true} is VALID [2018-11-23 10:29:20,963 INFO L273 TraceCheckUtils]: 6: Hoare triple {36#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {36#true} is VALID [2018-11-23 10:29:20,963 INFO L273 TraceCheckUtils]: 7: Hoare triple {36#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {36#true} is VALID [2018-11-23 10:29:20,964 INFO L273 TraceCheckUtils]: 8: Hoare triple {36#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {36#true} is VALID [2018-11-23 10:29:20,964 INFO L273 TraceCheckUtils]: 9: Hoare triple {36#true} ~i~0 := 0bv32; {36#true} is VALID [2018-11-23 10:29:20,964 INFO L273 TraceCheckUtils]: 10: Hoare triple {36#true} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {36#true} is VALID [2018-11-23 10:29:20,977 INFO L273 TraceCheckUtils]: 11: Hoare triple {36#true} assume #t~short6; {74#|main_#t~short6|} is VALID [2018-11-23 10:29:20,987 INFO L256 TraceCheckUtils]: 12: Hoare triple {74#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {78#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:20,989 INFO L273 TraceCheckUtils]: 13: Hoare triple {78#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {82#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:20,991 INFO L273 TraceCheckUtils]: 14: Hoare triple {82#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {37#false} is VALID [2018-11-23 10:29:20,991 INFO L273 TraceCheckUtils]: 15: Hoare triple {37#false} assume !false; {37#false} is VALID [2018-11-23 10:29:20,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:20,995 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:21,001 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:21,002 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:29:21,007 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 10:29:21,010 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:21,016 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:29:21,103 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:21,104 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:29:21,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:29:21,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:29:21,115 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 5 states. [2018-11-23 10:29:22,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:22,496 INFO L93 Difference]: Finished difference Result 57 states and 75 transitions. [2018-11-23 10:29:22,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:29:22,497 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 10:29:22,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:22,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:29:22,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 75 transitions. [2018-11-23 10:29:22,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:29:22,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 75 transitions. [2018-11-23 10:29:22,518 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 75 transitions. [2018-11-23 10:29:22,986 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:22,999 INFO L225 Difference]: With dead ends: 57 [2018-11-23 10:29:22,999 INFO L226 Difference]: Without dead ends: 33 [2018-11-23 10:29:23,003 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:29:23,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-11-23 10:29:23,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2018-11-23 10:29:23,096 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:23,096 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand 32 states. [2018-11-23 10:29:23,097 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 32 states. [2018-11-23 10:29:23,097 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 32 states. [2018-11-23 10:29:23,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:23,102 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2018-11-23 10:29:23,102 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2018-11-23 10:29:23,103 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:23,103 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:23,103 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 33 states. [2018-11-23 10:29:23,104 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 33 states. [2018-11-23 10:29:23,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:23,108 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2018-11-23 10:29:23,109 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2018-11-23 10:29:23,109 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:23,109 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:23,110 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:23,110 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:23,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 10:29:23,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2018-11-23 10:29:23,115 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 39 transitions. Word has length 16 [2018-11-23 10:29:23,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:23,116 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 39 transitions. [2018-11-23 10:29:23,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:29:23,116 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 39 transitions. [2018-11-23 10:29:23,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 10:29:23,117 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:23,118 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:23,118 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:23,118 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:23,119 INFO L82 PathProgramCache]: Analyzing trace with hash 67503751, now seen corresponding path program 1 times [2018-11-23 10:29:23,119 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:23,119 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:23,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:23,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:23,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:23,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:23,674 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-23 10:29:23,712 INFO L256 TraceCheckUtils]: 0: Hoare triple {268#true} call ULTIMATE.init(); {268#true} is VALID [2018-11-23 10:29:23,713 INFO L273 TraceCheckUtils]: 1: Hoare triple {268#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {268#true} is VALID [2018-11-23 10:29:23,713 INFO L273 TraceCheckUtils]: 2: Hoare triple {268#true} assume true; {268#true} is VALID [2018-11-23 10:29:23,714 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {268#true} {268#true} #95#return; {268#true} is VALID [2018-11-23 10:29:23,714 INFO L256 TraceCheckUtils]: 4: Hoare triple {268#true} call #t~ret7 := main(); {268#true} is VALID [2018-11-23 10:29:23,714 INFO L273 TraceCheckUtils]: 5: Hoare triple {268#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {268#true} is VALID [2018-11-23 10:29:23,715 INFO L273 TraceCheckUtils]: 6: Hoare triple {268#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {291#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:29:23,716 INFO L273 TraceCheckUtils]: 7: Hoare triple {291#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {295#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv5 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:23,735 INFO L273 TraceCheckUtils]: 8: Hoare triple {295#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv5 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {269#false} is VALID [2018-11-23 10:29:23,735 INFO L273 TraceCheckUtils]: 9: Hoare triple {269#false} ~i~0 := 0bv32; {269#false} is VALID [2018-11-23 10:29:23,736 INFO L273 TraceCheckUtils]: 10: Hoare triple {269#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {269#false} is VALID [2018-11-23 10:29:23,736 INFO L273 TraceCheckUtils]: 11: Hoare triple {269#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {269#false} is VALID [2018-11-23 10:29:23,736 INFO L256 TraceCheckUtils]: 12: Hoare triple {269#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {269#false} is VALID [2018-11-23 10:29:23,736 INFO L273 TraceCheckUtils]: 13: Hoare triple {269#false} ~cond := #in~cond; {269#false} is VALID [2018-11-23 10:29:23,737 INFO L273 TraceCheckUtils]: 14: Hoare triple {269#false} assume 0bv32 == ~cond; {269#false} is VALID [2018-11-23 10:29:23,737 INFO L273 TraceCheckUtils]: 15: Hoare triple {269#false} assume !false; {269#false} is VALID [2018-11-23 10:29:23,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:23,739 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:29:23,741 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:29:23,741 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:29:23,743 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-23 10:29:23,743 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:23,744 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:29:23,795 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:23,796 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:29:23,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:29:23,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:29:23,797 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. Second operand 4 states. [2018-11-23 10:29:25,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:25,416 INFO L93 Difference]: Finished difference Result 56 states and 70 transitions. [2018-11-23 10:29:25,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:29:25,416 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-23 10:29:25,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:25,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:25,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 60 transitions. [2018-11-23 10:29:25,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:29:25,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 60 transitions. [2018-11-23 10:29:25,426 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 60 transitions. [2018-11-23 10:29:25,801 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:25,805 INFO L225 Difference]: With dead ends: 56 [2018-11-23 10:29:25,805 INFO L226 Difference]: Without dead ends: 39 [2018-11-23 10:29:25,806 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:29:25,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-23 10:29:25,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 33. [2018-11-23 10:29:25,827 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:25,827 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 33 states. [2018-11-23 10:29:25,827 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 33 states. [2018-11-23 10:29:25,827 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 33 states. [2018-11-23 10:29:25,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:25,831 INFO L93 Difference]: Finished difference Result 39 states and 51 transitions. [2018-11-23 10:29:25,831 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2018-11-23 10:29:25,832 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:25,832 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:25,832 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 39 states. [2018-11-23 10:29:25,833 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 39 states. [2018-11-23 10:29:25,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:25,836 INFO L93 Difference]: Finished difference Result 39 states and 51 transitions. [2018-11-23 10:29:25,836 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2018-11-23 10:29:25,837 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:25,837 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:25,837 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:25,837 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:25,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-23 10:29:25,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 40 transitions. [2018-11-23 10:29:25,840 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 40 transitions. Word has length 16 [2018-11-23 10:29:25,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:25,841 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 40 transitions. [2018-11-23 10:29:25,841 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:29:25,841 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2018-11-23 10:29:25,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 10:29:25,842 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:25,842 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:25,842 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:25,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:25,843 INFO L82 PathProgramCache]: Analyzing trace with hash -335534155, now seen corresponding path program 1 times [2018-11-23 10:29:25,844 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:25,844 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:25,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:26,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:26,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:26,102 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:26,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:29:26,261 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:29:26,266 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,271 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,294 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,294 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-11-23 10:29:26,363 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:29:26,435 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:26,440 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:29:26,443 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,456 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,493 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,494 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:29 [2018-11-23 10:29:26,506 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:26,507 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_26|, main_~CCCELVOL4~0]. (let ((.cse0 (select |v_#memory_int_26| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (store |v_#memory_int_26| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32)) main_~CCCELVOL4~0)) |#memory_int|) (= (_ bv1 32) main_~CCCELVOL1~0) (= (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:29:26,508 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (_ bv0 32) (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32))) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:29:26,573 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:29:26,593 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:26,601 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:29:26,603 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,614 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,659 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:29 [2018-11-23 10:29:26,672 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:26,673 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_27|, main_~CCCELVOL3~0]. (let ((.cse0 (select |v_#memory_int_27| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= |#memory_int| (store |v_#memory_int_27| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32)) main_~CCCELVOL3~0))) (= (_ bv0 32) (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967276 32))) (_ bv4294967294 32))) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:29:26,673 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (_ bv0 32) (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32))) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:29:26,743 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:29:26,771 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:26,779 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:29:26,788 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,806 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,843 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,844 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:29 [2018-11-23 10:29:26,858 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:26,859 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_28|, main_~CCCELVOL2~0]. (let ((.cse0 (select |v_#memory_int_28| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (store |v_#memory_int_28| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0)) |#memory_int|) (= (_ bv0 32) (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967276 32))) (_ bv4294967294 32))) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:29:26,859 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (_ bv0 32) (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32))) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:29:26,920 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-23 10:29:26,935 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:26,937 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:26,939 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 33 [2018-11-23 10:29:26,947 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,962 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:26,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-11-23 10:29:27,359 INFO L256 TraceCheckUtils]: 0: Hoare triple {513#true} call ULTIMATE.init(); {513#true} is VALID [2018-11-23 10:29:27,360 INFO L273 TraceCheckUtils]: 1: Hoare triple {513#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {513#true} is VALID [2018-11-23 10:29:27,360 INFO L273 TraceCheckUtils]: 2: Hoare triple {513#true} assume true; {513#true} is VALID [2018-11-23 10:29:27,360 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {513#true} {513#true} #95#return; {513#true} is VALID [2018-11-23 10:29:27,360 INFO L256 TraceCheckUtils]: 4: Hoare triple {513#true} call #t~ret7 := main(); {513#true} is VALID [2018-11-23 10:29:27,361 INFO L273 TraceCheckUtils]: 5: Hoare triple {513#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {513#true} is VALID [2018-11-23 10:29:27,361 INFO L273 TraceCheckUtils]: 6: Hoare triple {513#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {536#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:27,362 INFO L273 TraceCheckUtils]: 7: Hoare triple {536#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {540#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:27,363 INFO L273 TraceCheckUtils]: 8: Hoare triple {540#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {540#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:27,364 INFO L273 TraceCheckUtils]: 9: Hoare triple {540#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:27,375 INFO L273 TraceCheckUtils]: 10: Hoare triple {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:27,377 INFO L273 TraceCheckUtils]: 11: Hoare triple {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:27,379 INFO L273 TraceCheckUtils]: 12: Hoare triple {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:27,381 INFO L273 TraceCheckUtils]: 13: Hoare triple {547#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {560#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:29:27,383 INFO L273 TraceCheckUtils]: 14: Hoare triple {560#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {560#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:29:27,388 INFO L273 TraceCheckUtils]: 15: Hoare triple {560#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {560#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:29:27,389 INFO L273 TraceCheckUtils]: 16: Hoare triple {560#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {570#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:29:27,391 INFO L273 TraceCheckUtils]: 17: Hoare triple {570#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {574#|main_#t~short6|} is VALID [2018-11-23 10:29:27,392 INFO L273 TraceCheckUtils]: 18: Hoare triple {574#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {514#false} is VALID [2018-11-23 10:29:27,393 INFO L256 TraceCheckUtils]: 19: Hoare triple {514#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {514#false} is VALID [2018-11-23 10:29:27,393 INFO L273 TraceCheckUtils]: 20: Hoare triple {514#false} ~cond := #in~cond; {514#false} is VALID [2018-11-23 10:29:27,394 INFO L273 TraceCheckUtils]: 21: Hoare triple {514#false} assume 0bv32 == ~cond; {514#false} is VALID [2018-11-23 10:29:27,394 INFO L273 TraceCheckUtils]: 22: Hoare triple {514#false} assume !false; {514#false} is VALID [2018-11-23 10:29:27,399 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:27,399 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:28,098 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 45 [2018-11-23 10:29:28,108 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 49 [2018-11-23 10:29:28,126 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,137 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 65 [2018-11-23 10:29:28,159 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,159 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,160 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,178 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 94 [2018-11-23 10:29:28,218 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,219 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,220 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,220 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,221 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,221 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 136 [2018-11-23 10:29:28,415 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,421 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:28,422 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,581 WARN L670 Elim1Store]: solver failed to check if following equality is implied: (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) [2018-11-23 10:29:30,585 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,585 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,594 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,620 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,646 INFO L303 Elim1Store]: Index analysis took 2238 ms [2018-11-23 10:29:30,734 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 7 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 132 [2018-11-23 10:29:30,764 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 8 xjuncts. [2018-11-23 10:29:30,783 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,783 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,784 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,784 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,785 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,786 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:30,815 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 85 [2018-11-23 10:29:30,818 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:31,166 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 9 xjuncts. [2018-11-23 10:29:31,391 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 6 xjuncts. [2018-11-23 10:29:31,609 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 6 xjuncts. [2018-11-23 10:29:31,770 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 6 xjuncts. [2018-11-23 10:29:31,999 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 6 xjuncts. [2018-11-23 10:29:32,235 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 11 dim-0 vars, and 6 xjuncts. [2018-11-23 10:29:32,236 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 6 variables, input treesize:55, output treesize:232 [2018-11-23 10:29:32,256 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:32,257 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~CCCELVOL4~0, main_~CCCELVOL3~0, main_~CCCELVOL2~0, main_~MINVAL~0]. (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (select (let ((.cse0 (bvmul (_ bv20 32) main_~i~0))) (store (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967276 32)) main_~CCCELVOL5~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32)) (_ bv0 32))) |main_~#volArray~0.offset|) main_~MINVAL~0) (not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))) [2018-11-23 10:29:32,257 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_prenex_2, main_~CCCELVOL2~0, main_~MINVAL~0, v_prenex_6, v_arrayElimCell_7, v_prenex_4, v_prenex_1, v_prenex_3, main_~CCCELVOL4~0, v_prenex_5, main_~CCCELVOL3~0]. (let ((.cse5 (bvmul (_ bv20 32) main_~i~0))) (let ((.cse2 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967284 32)))) (.cse1 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967276 32)))) (.cse3 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967280 32)))) (.cse0 (= (_ bv4 32) .cse5)) (.cse4 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967288 32))))) (and (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (_ bv0 32) main_~MINVAL~0) (not .cse0) (not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))) (or (bvsge main_~CCCELVOL1~0 v_prenex_2) .cse1 .cse2 .cse3 .cse0 (bvsge main_~CCCELVOL2~0 v_prenex_2) (not (bvsge main_~CCCELVOL5~0 v_prenex_2))) (or (bvsge main_~CCCELVOL1~0 v_prenex_6) .cse1 .cse2 .cse3 .cse0 (bvsge v_arrayElimCell_7 v_prenex_6) .cse4 (not (bvsge main_~CCCELVOL5~0 v_prenex_6))) (or (bvsge main_~CCCELVOL1~0 v_prenex_4) .cse1 .cse2 .cse3 (bvsge v_prenex_1 v_prenex_4) (bvsge (_ bv0 32) v_prenex_4) .cse4 (not (bvsge main_~CCCELVOL5~0 v_prenex_4))) (or (bvsge main_~CCCELVOL1~0 v_prenex_3) .cse1 (bvsge main_~CCCELVOL4~0 v_prenex_3) .cse2 .cse0 .cse4 (not (bvsge main_~CCCELVOL5~0 v_prenex_3))) (or (bvsge main_~CCCELVOL1~0 v_prenex_5) .cse1 (bvsge main_~CCCELVOL3~0 v_prenex_5) .cse3 .cse0 .cse4 (not (bvsge main_~CCCELVOL5~0 v_prenex_5)))))) [2018-11-23 10:29:33,282 WARN L180 SmtUtils]: Spent 829.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 29 [2018-11-23 10:29:33,431 INFO L273 TraceCheckUtils]: 22: Hoare triple {514#false} assume !false; {514#false} is VALID [2018-11-23 10:29:33,432 INFO L273 TraceCheckUtils]: 21: Hoare triple {514#false} assume 0bv32 == ~cond; {514#false} is VALID [2018-11-23 10:29:33,432 INFO L273 TraceCheckUtils]: 20: Hoare triple {514#false} ~cond := #in~cond; {514#false} is VALID [2018-11-23 10:29:33,433 INFO L256 TraceCheckUtils]: 19: Hoare triple {514#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {514#false} is VALID [2018-11-23 10:29:33,434 INFO L273 TraceCheckUtils]: 18: Hoare triple {574#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {514#false} is VALID [2018-11-23 10:29:33,438 INFO L273 TraceCheckUtils]: 17: Hoare triple {605#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {574#|main_#t~short6|} is VALID [2018-11-23 10:29:33,439 INFO L273 TraceCheckUtils]: 16: Hoare triple {609#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 0bv32; {605#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is VALID [2018-11-23 10:29:33,442 INFO L273 TraceCheckUtils]: 15: Hoare triple {609#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {609#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:29:33,443 INFO L273 TraceCheckUtils]: 14: Hoare triple {609#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {609#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:29:33,471 INFO L273 TraceCheckUtils]: 13: Hoare triple {619#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {609#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:29:33,506 INFO L273 TraceCheckUtils]: 12: Hoare triple {623#(or (forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {619#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:29:33,553 INFO L273 TraceCheckUtils]: 11: Hoare triple {627#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {623#(or (forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:29:33,609 INFO L273 TraceCheckUtils]: 10: Hoare triple {631#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32)) (main_~CCCELVOL4~0 (_ BitVec 32))) (bvsge (select (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {627#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)))} is VALID [2018-11-23 10:29:34,552 INFO L273 TraceCheckUtils]: 9: Hoare triple {635#(and (or (forall ((v_prenex_4 (_ BitVec 32)) (v_prenex_1 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_4)) (bvsge (_ bv0 32) v_prenex_4) (bvsge main_~CCCELVOL1~0 v_prenex_4) (bvsge v_prenex_1 v_prenex_4))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (forall ((main_~CCCELVOL3~0 (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_5)) (bvsge main_~CCCELVOL1~0 v_prenex_5) (bvsge main_~CCCELVOL3~0 v_prenex_5))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {631#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32)) (main_~CCCELVOL4~0 (_ BitVec 32))) (bvsge (select (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)))} is VALID [2018-11-23 10:29:34,554 INFO L273 TraceCheckUtils]: 8: Hoare triple {635#(and (or (forall ((v_prenex_4 (_ BitVec 32)) (v_prenex_1 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_4)) (bvsge (_ bv0 32) v_prenex_4) (bvsge main_~CCCELVOL1~0 v_prenex_4) (bvsge v_prenex_1 v_prenex_4))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (forall ((main_~CCCELVOL3~0 (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_5)) (bvsge main_~CCCELVOL1~0 v_prenex_5) (bvsge main_~CCCELVOL3~0 v_prenex_5))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {635#(and (or (forall ((v_prenex_4 (_ BitVec 32)) (v_prenex_1 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_4)) (bvsge (_ bv0 32) v_prenex_4) (bvsge main_~CCCELVOL1~0 v_prenex_4) (bvsge v_prenex_1 v_prenex_4))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (forall ((main_~CCCELVOL3~0 (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_5)) (bvsge main_~CCCELVOL1~0 v_prenex_5) (bvsge main_~CCCELVOL3~0 v_prenex_5))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))))} is VALID [2018-11-23 10:29:34,554 INFO L273 TraceCheckUtils]: 7: Hoare triple {513#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {635#(and (or (forall ((v_prenex_4 (_ BitVec 32)) (v_prenex_1 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_4)) (bvsge (_ bv0 32) v_prenex_4) (bvsge main_~CCCELVOL1~0 v_prenex_4) (bvsge v_prenex_1 v_prenex_4))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (forall ((main_~CCCELVOL3~0 (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_5)) (bvsge main_~CCCELVOL1~0 v_prenex_5) (bvsge main_~CCCELVOL3~0 v_prenex_5))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))))} is VALID [2018-11-23 10:29:34,555 INFO L273 TraceCheckUtils]: 6: Hoare triple {513#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {513#true} is VALID [2018-11-23 10:29:34,555 INFO L273 TraceCheckUtils]: 5: Hoare triple {513#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {513#true} is VALID [2018-11-23 10:29:34,556 INFO L256 TraceCheckUtils]: 4: Hoare triple {513#true} call #t~ret7 := main(); {513#true} is VALID [2018-11-23 10:29:34,556 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {513#true} {513#true} #95#return; {513#true} is VALID [2018-11-23 10:29:34,557 INFO L273 TraceCheckUtils]: 2: Hoare triple {513#true} assume true; {513#true} is VALID [2018-11-23 10:29:34,557 INFO L273 TraceCheckUtils]: 1: Hoare triple {513#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {513#true} is VALID [2018-11-23 10:29:34,558 INFO L256 TraceCheckUtils]: 0: Hoare triple {513#true} call ULTIMATE.init(); {513#true} is VALID [2018-11-23 10:29:34,562 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:34,567 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:34,568 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10] total 15 [2018-11-23 10:29:34,568 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 23 [2018-11-23 10:29:34,569 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:34,569 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states. [2018-11-23 10:29:35,360 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:35,360 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-23 10:29:35,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-23 10:29:35,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=161, Unknown=0, NotChecked=0, Total=210 [2018-11-23 10:29:35,361 INFO L87 Difference]: Start difference. First operand 33 states and 40 transitions. Second operand 15 states. [2018-11-23 10:29:38,494 WARN L180 SmtUtils]: Spent 259.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 45 [2018-11-23 10:29:41,244 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-11-23 10:29:47,695 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 46 [2018-11-23 10:29:48,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:48,576 INFO L93 Difference]: Finished difference Result 152 states and 220 transitions. [2018-11-23 10:29:48,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 10:29:48,577 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 23 [2018-11-23 10:29:48,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:48,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 10:29:48,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 212 transitions. [2018-11-23 10:29:48,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 10:29:48,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 212 transitions. [2018-11-23 10:29:48,597 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 212 transitions. [2018-11-23 10:29:52,195 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 212 edges. 211 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:52,202 INFO L225 Difference]: With dead ends: 152 [2018-11-23 10:29:52,202 INFO L226 Difference]: Without dead ends: 128 [2018-11-23 10:29:52,203 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 29 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 291 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=344, Invalid=988, Unknown=0, NotChecked=0, Total=1332 [2018-11-23 10:29:52,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-11-23 10:29:52,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 69. [2018-11-23 10:29:52,310 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:52,310 INFO L82 GeneralOperation]: Start isEquivalent. First operand 128 states. Second operand 69 states. [2018-11-23 10:29:52,310 INFO L74 IsIncluded]: Start isIncluded. First operand 128 states. Second operand 69 states. [2018-11-23 10:29:52,310 INFO L87 Difference]: Start difference. First operand 128 states. Second operand 69 states. [2018-11-23 10:29:52,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:52,320 INFO L93 Difference]: Finished difference Result 128 states and 186 transitions. [2018-11-23 10:29:52,321 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 186 transitions. [2018-11-23 10:29:52,322 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:52,323 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:52,323 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand 128 states. [2018-11-23 10:29:52,323 INFO L87 Difference]: Start difference. First operand 69 states. Second operand 128 states. [2018-11-23 10:29:52,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:52,332 INFO L93 Difference]: Finished difference Result 128 states and 186 transitions. [2018-11-23 10:29:52,332 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 186 transitions. [2018-11-23 10:29:52,334 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:52,334 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:52,334 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:52,334 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:52,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-11-23 10:29:52,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 104 transitions. [2018-11-23 10:29:52,338 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 104 transitions. Word has length 23 [2018-11-23 10:29:52,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:52,339 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 104 transitions. [2018-11-23 10:29:52,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-23 10:29:52,339 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 104 transitions. [2018-11-23 10:29:52,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 10:29:52,340 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:52,340 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:52,340 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:52,341 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:52,341 INFO L82 PathProgramCache]: Analyzing trace with hash -1346651405, now seen corresponding path program 1 times [2018-11-23 10:29:52,341 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:52,341 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:52,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:29:52,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:52,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:52,607 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:52,677 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:29:52,696 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:29:52,698 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,704 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,724 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-11-23 10:29:52,808 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:29:52,817 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:52,822 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:29:52,825 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,836 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,863 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,863 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:21 [2018-11-23 10:29:52,876 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:52,877 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_36|, main_~CCCELVOL4~0]. (let ((.cse0 (select |v_#memory_int_36| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (store |v_#memory_int_36| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32)) main_~CCCELVOL4~0)) |#memory_int|) (= (_ bv0 32) (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967276 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:29:52,877 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:29:52,913 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:29:52,921 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:52,925 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:29:52,929 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,939 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:52,962 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:21 [2018-11-23 10:29:52,983 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:52,984 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_37|, main_~CCCELVOL3~0]. (let ((.cse0 (select |v_#memory_int_37| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (_ bv0 32) (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967276 32)))) (= |#memory_int| (store |v_#memory_int_37| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32)) main_~CCCELVOL3~0))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:29:52,984 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:29:53,013 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:29:53,020 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:53,023 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:29:53,026 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:53,036 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:53,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:53,109 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:21 [2018-11-23 10:29:53,123 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:53,123 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_38|, main_~CCCELVOL2~0]. (let ((.cse0 (select |v_#memory_int_38| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967276 32))) (_ bv0 32)) (= (store |v_#memory_int_38| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0)) |#memory_int|) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:29:53,123 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:29:53,142 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-23 10:29:53,188 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:29:53,189 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-23 10:29:53,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:29:53,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:53,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:29:53,234 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-11-23 10:29:53,476 INFO L256 TraceCheckUtils]: 0: Hoare triple {1242#true} call ULTIMATE.init(); {1242#true} is VALID [2018-11-23 10:29:53,477 INFO L273 TraceCheckUtils]: 1: Hoare triple {1242#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1242#true} is VALID [2018-11-23 10:29:53,477 INFO L273 TraceCheckUtils]: 2: Hoare triple {1242#true} assume true; {1242#true} is VALID [2018-11-23 10:29:53,477 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1242#true} {1242#true} #95#return; {1242#true} is VALID [2018-11-23 10:29:53,478 INFO L256 TraceCheckUtils]: 4: Hoare triple {1242#true} call #t~ret7 := main(); {1242#true} is VALID [2018-11-23 10:29:53,478 INFO L273 TraceCheckUtils]: 5: Hoare triple {1242#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1242#true} is VALID [2018-11-23 10:29:53,479 INFO L273 TraceCheckUtils]: 6: Hoare triple {1242#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1265#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:29:53,480 INFO L273 TraceCheckUtils]: 7: Hoare triple {1265#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:53,480 INFO L273 TraceCheckUtils]: 8: Hoare triple {1269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {1269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:53,483 INFO L273 TraceCheckUtils]: 9: Hoare triple {1269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:53,485 INFO L273 TraceCheckUtils]: 10: Hoare triple {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:53,488 INFO L273 TraceCheckUtils]: 11: Hoare triple {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:53,491 INFO L273 TraceCheckUtils]: 12: Hoare triple {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:53,495 INFO L273 TraceCheckUtils]: 13: Hoare triple {1276#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {1289#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:53,496 INFO L273 TraceCheckUtils]: 14: Hoare triple {1289#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1289#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:53,497 INFO L273 TraceCheckUtils]: 15: Hoare triple {1289#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {1289#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:53,497 INFO L273 TraceCheckUtils]: 16: Hoare triple {1289#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {1299#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:53,499 INFO L273 TraceCheckUtils]: 17: Hoare triple {1299#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1299#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:29:53,500 INFO L273 TraceCheckUtils]: 18: Hoare triple {1299#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {1306#|main_#t~short6|} is VALID [2018-11-23 10:29:53,501 INFO L256 TraceCheckUtils]: 19: Hoare triple {1306#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1310#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:53,502 INFO L273 TraceCheckUtils]: 20: Hoare triple {1310#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1314#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:29:53,502 INFO L273 TraceCheckUtils]: 21: Hoare triple {1314#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {1243#false} is VALID [2018-11-23 10:29:53,502 INFO L273 TraceCheckUtils]: 22: Hoare triple {1243#false} assume !false; {1243#false} is VALID [2018-11-23 10:29:53,504 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:53,504 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:53,844 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 45 [2018-11-23 10:29:53,850 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 49 [2018-11-23 10:29:53,857 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,860 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 65 [2018-11-23 10:29:53,871 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,872 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,872 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,882 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 94 [2018-11-23 10:29:53,930 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,930 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,931 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,931 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,932 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,932 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:53,955 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 136 [2018-11-23 10:29:54,085 WARN L180 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2018-11-23 10:29:54,100 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:54,103 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:54,104 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:54,104 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:54,105 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:54,112 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:29:54,165 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 129 [2018-11-23 10:29:54,183 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 8 xjuncts. [2018-11-23 10:29:54,348 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-23 10:29:54,433 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-23 10:29:54,515 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-23 10:29:54,590 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-23 10:29:54,691 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-23 10:29:54,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-23 10:29:54,773 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:47, output treesize:129 [2018-11-23 10:29:54,781 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:29:54,782 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~CCCELVOL4~0, main_~CCCELVOL3~0, main_~CCCELVOL2~0]. (= (select (let ((.cse0 (bvmul (_ bv20 32) main_~i~0))) (store (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967276 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32)) (_ bv0 32))) |main_~#volArray~0.offset|) (_ bv0 32)) [2018-11-23 10:29:54,782 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (let ((.cse5 (bvmul (_ bv20 32) main_~i~0))) (let ((.cse1 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967284 32)))) (.cse0 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967276 32)))) (.cse2 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967280 32)))) (.cse3 (= (_ bv4 32) .cse5)) (.cse4 (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse5 (_ bv4294967288 32))))) (and (or .cse0 .cse1 .cse2 .cse3 .cse4) (or .cse0 .cse1 .cse3 .cse4) (or .cse0 .cse1 .cse2 .cse3) (or .cse0 .cse2 .cse3 .cse4)))) [2018-11-23 10:29:54,918 INFO L273 TraceCheckUtils]: 22: Hoare triple {1243#false} assume !false; {1243#false} is VALID [2018-11-23 10:29:54,918 INFO L273 TraceCheckUtils]: 21: Hoare triple {1324#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {1243#false} is VALID [2018-11-23 10:29:54,919 INFO L273 TraceCheckUtils]: 20: Hoare triple {1328#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1324#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:29:54,921 INFO L256 TraceCheckUtils]: 19: Hoare triple {1306#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {1328#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:29:54,924 INFO L273 TraceCheckUtils]: 18: Hoare triple {1335#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {1306#|main_#t~short6|} is VALID [2018-11-23 10:29:54,929 INFO L273 TraceCheckUtils]: 17: Hoare triple {1335#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {1335#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:29:54,938 INFO L273 TraceCheckUtils]: 16: Hoare triple {1342#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|))} ~i~0 := 0bv32; {1335#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:29:54,952 INFO L273 TraceCheckUtils]: 15: Hoare triple {1342#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {1342#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|))} is VALID [2018-11-23 10:29:54,961 INFO L273 TraceCheckUtils]: 14: Hoare triple {1342#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1342#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|))} is VALID [2018-11-23 10:29:54,974 INFO L273 TraceCheckUtils]: 13: Hoare triple {1352#(= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {1342#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|))} is VALID [2018-11-23 10:29:54,988 INFO L273 TraceCheckUtils]: 12: Hoare triple {1356#(forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (= (_ bv0 32) (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {1352#(= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|))} is VALID [2018-11-23 10:29:55,008 INFO L273 TraceCheckUtils]: 11: Hoare triple {1360#(forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32))) (= (_ bv0 32) (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {1356#(forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (= (_ bv0 32) (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|)))} is VALID [2018-11-23 10:29:55,026 INFO L273 TraceCheckUtils]: 10: Hoare triple {1364#(forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32)) (main_~CCCELVOL4~0 (_ BitVec 32))) (= (_ bv0 32) (select (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {1360#(forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32))) (= (_ bv0 32) (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|)))} is VALID [2018-11-23 10:29:55,036 INFO L273 TraceCheckUtils]: 9: Hoare triple {1368#(or (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {1364#(forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32)) (main_~CCCELVOL4~0 (_ BitVec 32))) (= (_ bv0 32) (select (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|)))} is VALID [2018-11-23 10:29:55,037 INFO L273 TraceCheckUtils]: 8: Hoare triple {1368#(or (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {1368#(or (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} is VALID [2018-11-23 10:29:55,038 INFO L273 TraceCheckUtils]: 7: Hoare triple {1242#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1368#(or (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} is VALID [2018-11-23 10:29:55,038 INFO L273 TraceCheckUtils]: 6: Hoare triple {1242#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1242#true} is VALID [2018-11-23 10:29:55,038 INFO L273 TraceCheckUtils]: 5: Hoare triple {1242#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1242#true} is VALID [2018-11-23 10:29:55,038 INFO L256 TraceCheckUtils]: 4: Hoare triple {1242#true} call #t~ret7 := main(); {1242#true} is VALID [2018-11-23 10:29:55,038 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1242#true} {1242#true} #95#return; {1242#true} is VALID [2018-11-23 10:29:55,039 INFO L273 TraceCheckUtils]: 2: Hoare triple {1242#true} assume true; {1242#true} is VALID [2018-11-23 10:29:55,039 INFO L273 TraceCheckUtils]: 1: Hoare triple {1242#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1242#true} is VALID [2018-11-23 10:29:55,039 INFO L256 TraceCheckUtils]: 0: Hoare triple {1242#true} call ULTIMATE.init(); {1242#true} is VALID [2018-11-23 10:29:55,042 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:29:55,051 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:55,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-11-23 10:29:55,053 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 23 [2018-11-23 10:29:55,054 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:55,054 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 10:29:55,289 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:55,289 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 10:29:55,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 10:29:55,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2018-11-23 10:29:55,290 INFO L87 Difference]: Start difference. First operand 69 states and 104 transitions. Second operand 19 states. [2018-11-23 10:30:04,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:04,970 INFO L93 Difference]: Finished difference Result 159 states and 239 transitions. [2018-11-23 10:30:04,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-23 10:30:04,971 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 23 [2018-11-23 10:30:04,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:04,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:30:04,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 191 transitions. [2018-11-23 10:30:04,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:30:04,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 191 transitions. [2018-11-23 10:30:04,983 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 27 states and 191 transitions. [2018-11-23 10:30:09,724 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 191 edges. 189 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:09,730 INFO L225 Difference]: With dead ends: 159 [2018-11-23 10:30:09,730 INFO L226 Difference]: Without dead ends: 157 [2018-11-23 10:30:09,731 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 280 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=306, Invalid=1026, Unknown=0, NotChecked=0, Total=1332 [2018-11-23 10:30:09,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-11-23 10:30:10,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 85. [2018-11-23 10:30:10,036 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:10,036 INFO L82 GeneralOperation]: Start isEquivalent. First operand 157 states. Second operand 85 states. [2018-11-23 10:30:10,036 INFO L74 IsIncluded]: Start isIncluded. First operand 157 states. Second operand 85 states. [2018-11-23 10:30:10,036 INFO L87 Difference]: Start difference. First operand 157 states. Second operand 85 states. [2018-11-23 10:30:10,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:10,045 INFO L93 Difference]: Finished difference Result 157 states and 237 transitions. [2018-11-23 10:30:10,045 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 237 transitions. [2018-11-23 10:30:10,046 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:10,047 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:10,047 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand 157 states. [2018-11-23 10:30:10,047 INFO L87 Difference]: Start difference. First operand 85 states. Second operand 157 states. [2018-11-23 10:30:10,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:10,055 INFO L93 Difference]: Finished difference Result 157 states and 237 transitions. [2018-11-23 10:30:10,055 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 237 transitions. [2018-11-23 10:30:10,056 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:10,056 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:10,056 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:10,056 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:10,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-11-23 10:30:10,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 132 transitions. [2018-11-23 10:30:10,060 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 132 transitions. Word has length 23 [2018-11-23 10:30:10,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:10,060 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 132 transitions. [2018-11-23 10:30:10,060 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 10:30:10,060 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 132 transitions. [2018-11-23 10:30:10,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:10,061 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:10,061 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:10,062 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:10,062 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:10,062 INFO L82 PathProgramCache]: Analyzing trace with hash -381978101, now seen corresponding path program 1 times [2018-11-23 10:30:10,062 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:10,063 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:10,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:10,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:10,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:10,127 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:10,198 INFO L256 TraceCheckUtils]: 0: Hoare triple {2049#true} call ULTIMATE.init(); {2049#true} is VALID [2018-11-23 10:30:10,198 INFO L273 TraceCheckUtils]: 1: Hoare triple {2049#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2049#true} is VALID [2018-11-23 10:30:10,199 INFO L273 TraceCheckUtils]: 2: Hoare triple {2049#true} assume true; {2049#true} is VALID [2018-11-23 10:30:10,199 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2049#true} {2049#true} #95#return; {2049#true} is VALID [2018-11-23 10:30:10,200 INFO L256 TraceCheckUtils]: 4: Hoare triple {2049#true} call #t~ret7 := main(); {2049#true} is VALID [2018-11-23 10:30:10,200 INFO L273 TraceCheckUtils]: 5: Hoare triple {2049#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2049#true} is VALID [2018-11-23 10:30:10,201 INFO L273 TraceCheckUtils]: 6: Hoare triple {2049#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2049#true} is VALID [2018-11-23 10:30:10,201 INFO L273 TraceCheckUtils]: 7: Hoare triple {2049#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2049#true} is VALID [2018-11-23 10:30:10,201 INFO L273 TraceCheckUtils]: 8: Hoare triple {2049#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {2049#true} is VALID [2018-11-23 10:30:10,201 INFO L273 TraceCheckUtils]: 9: Hoare triple {2049#true} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {2049#true} is VALID [2018-11-23 10:30:10,201 INFO L273 TraceCheckUtils]: 10: Hoare triple {2049#true} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {2049#true} is VALID [2018-11-23 10:30:10,202 INFO L273 TraceCheckUtils]: 11: Hoare triple {2049#true} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {2049#true} is VALID [2018-11-23 10:30:10,202 INFO L273 TraceCheckUtils]: 12: Hoare triple {2049#true} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:10,202 INFO L273 TraceCheckUtils]: 13: Hoare triple {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:10,203 INFO L273 TraceCheckUtils]: 14: Hoare triple {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:10,204 INFO L273 TraceCheckUtils]: 15: Hoare triple {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:10,204 INFO L273 TraceCheckUtils]: 16: Hoare triple {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:10,204 INFO L273 TraceCheckUtils]: 17: Hoare triple {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:10,205 INFO L273 TraceCheckUtils]: 18: Hoare triple {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:10,205 INFO L273 TraceCheckUtils]: 19: Hoare triple {2090#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {2050#false} is VALID [2018-11-23 10:30:10,205 INFO L273 TraceCheckUtils]: 20: Hoare triple {2050#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {2050#false} is VALID [2018-11-23 10:30:10,206 INFO L273 TraceCheckUtils]: 21: Hoare triple {2050#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2050#false} is VALID [2018-11-23 10:30:10,206 INFO L273 TraceCheckUtils]: 22: Hoare triple {2050#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {2050#false} is VALID [2018-11-23 10:30:10,206 INFO L273 TraceCheckUtils]: 23: Hoare triple {2050#false} ~i~0 := 0bv32; {2050#false} is VALID [2018-11-23 10:30:10,207 INFO L273 TraceCheckUtils]: 24: Hoare triple {2050#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2050#false} is VALID [2018-11-23 10:30:10,207 INFO L273 TraceCheckUtils]: 25: Hoare triple {2050#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {2050#false} is VALID [2018-11-23 10:30:10,207 INFO L256 TraceCheckUtils]: 26: Hoare triple {2050#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2050#false} is VALID [2018-11-23 10:30:10,207 INFO L273 TraceCheckUtils]: 27: Hoare triple {2050#false} ~cond := #in~cond; {2050#false} is VALID [2018-11-23 10:30:10,208 INFO L273 TraceCheckUtils]: 28: Hoare triple {2050#false} assume 0bv32 == ~cond; {2050#false} is VALID [2018-11-23 10:30:10,208 INFO L273 TraceCheckUtils]: 29: Hoare triple {2050#false} assume !false; {2050#false} is VALID [2018-11-23 10:30:10,209 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:10,209 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:10,210 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:10,211 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:30:10,211 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:10,211 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:10,211 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:30:10,304 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:10,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:30:10,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:30:10,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:10,305 INFO L87 Difference]: Start difference. First operand 85 states and 132 transitions. Second operand 3 states. [2018-11-23 10:30:10,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:10,881 INFO L93 Difference]: Finished difference Result 187 states and 295 transitions. [2018-11-23 10:30:10,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:30:10,882 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:10,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:10,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:10,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:10,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:10,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:10,886 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 81 transitions. [2018-11-23 10:30:11,111 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:11,116 INFO L225 Difference]: With dead ends: 187 [2018-11-23 10:30:11,116 INFO L226 Difference]: Without dead ends: 142 [2018-11-23 10:30:11,117 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:11,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-11-23 10:30:11,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 125. [2018-11-23 10:30:11,238 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:11,238 INFO L82 GeneralOperation]: Start isEquivalent. First operand 142 states. Second operand 125 states. [2018-11-23 10:30:11,239 INFO L74 IsIncluded]: Start isIncluded. First operand 142 states. Second operand 125 states. [2018-11-23 10:30:11,239 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 125 states. [2018-11-23 10:30:11,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:11,246 INFO L93 Difference]: Finished difference Result 142 states and 223 transitions. [2018-11-23 10:30:11,246 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 223 transitions. [2018-11-23 10:30:11,246 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:11,247 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:11,247 INFO L74 IsIncluded]: Start isIncluded. First operand 125 states. Second operand 142 states. [2018-11-23 10:30:11,247 INFO L87 Difference]: Start difference. First operand 125 states. Second operand 142 states. [2018-11-23 10:30:11,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:11,253 INFO L93 Difference]: Finished difference Result 142 states and 223 transitions. [2018-11-23 10:30:11,253 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 223 transitions. [2018-11-23 10:30:11,253 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:11,254 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:11,254 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:11,254 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:11,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-11-23 10:30:11,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 199 transitions. [2018-11-23 10:30:11,258 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 199 transitions. Word has length 30 [2018-11-23 10:30:11,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:11,259 INFO L480 AbstractCegarLoop]: Abstraction has 125 states and 199 transitions. [2018-11-23 10:30:11,259 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:30:11,259 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 199 transitions. [2018-11-23 10:30:11,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:11,260 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:11,260 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:11,260 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:11,260 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:11,260 INFO L82 PathProgramCache]: Analyzing trace with hash -824877241, now seen corresponding path program 1 times [2018-11-23 10:30:11,260 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:11,260 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:11,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:11,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:11,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:11,317 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:11,364 INFO L256 TraceCheckUtils]: 0: Hoare triple {2804#true} call ULTIMATE.init(); {2804#true} is VALID [2018-11-23 10:30:11,365 INFO L273 TraceCheckUtils]: 1: Hoare triple {2804#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2804#true} is VALID [2018-11-23 10:30:11,365 INFO L273 TraceCheckUtils]: 2: Hoare triple {2804#true} assume true; {2804#true} is VALID [2018-11-23 10:30:11,365 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2804#true} {2804#true} #95#return; {2804#true} is VALID [2018-11-23 10:30:11,365 INFO L256 TraceCheckUtils]: 4: Hoare triple {2804#true} call #t~ret7 := main(); {2804#true} is VALID [2018-11-23 10:30:11,365 INFO L273 TraceCheckUtils]: 5: Hoare triple {2804#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2804#true} is VALID [2018-11-23 10:30:11,366 INFO L273 TraceCheckUtils]: 6: Hoare triple {2804#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2804#true} is VALID [2018-11-23 10:30:11,366 INFO L273 TraceCheckUtils]: 7: Hoare triple {2804#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2804#true} is VALID [2018-11-23 10:30:11,366 INFO L273 TraceCheckUtils]: 8: Hoare triple {2804#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {2804#true} is VALID [2018-11-23 10:30:11,366 INFO L273 TraceCheckUtils]: 9: Hoare triple {2804#true} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {2804#true} is VALID [2018-11-23 10:30:11,367 INFO L273 TraceCheckUtils]: 10: Hoare triple {2804#true} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {2804#true} is VALID [2018-11-23 10:30:11,367 INFO L273 TraceCheckUtils]: 11: Hoare triple {2804#true} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:11,369 INFO L273 TraceCheckUtils]: 12: Hoare triple {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:11,371 INFO L273 TraceCheckUtils]: 13: Hoare triple {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:11,371 INFO L273 TraceCheckUtils]: 14: Hoare triple {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:11,375 INFO L273 TraceCheckUtils]: 15: Hoare triple {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:11,375 INFO L273 TraceCheckUtils]: 16: Hoare triple {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:11,375 INFO L273 TraceCheckUtils]: 17: Hoare triple {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:11,376 INFO L273 TraceCheckUtils]: 18: Hoare triple {2842#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {2805#false} is VALID [2018-11-23 10:30:11,376 INFO L273 TraceCheckUtils]: 19: Hoare triple {2805#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {2805#false} is VALID [2018-11-23 10:30:11,376 INFO L273 TraceCheckUtils]: 20: Hoare triple {2805#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {2805#false} is VALID [2018-11-23 10:30:11,376 INFO L273 TraceCheckUtils]: 21: Hoare triple {2805#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2805#false} is VALID [2018-11-23 10:30:11,376 INFO L273 TraceCheckUtils]: 22: Hoare triple {2805#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {2805#false} is VALID [2018-11-23 10:30:11,377 INFO L273 TraceCheckUtils]: 23: Hoare triple {2805#false} ~i~0 := 0bv32; {2805#false} is VALID [2018-11-23 10:30:11,377 INFO L273 TraceCheckUtils]: 24: Hoare triple {2805#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {2805#false} is VALID [2018-11-23 10:30:11,377 INFO L273 TraceCheckUtils]: 25: Hoare triple {2805#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {2805#false} is VALID [2018-11-23 10:30:11,377 INFO L256 TraceCheckUtils]: 26: Hoare triple {2805#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {2805#false} is VALID [2018-11-23 10:30:11,377 INFO L273 TraceCheckUtils]: 27: Hoare triple {2805#false} ~cond := #in~cond; {2805#false} is VALID [2018-11-23 10:30:11,377 INFO L273 TraceCheckUtils]: 28: Hoare triple {2805#false} assume 0bv32 == ~cond; {2805#false} is VALID [2018-11-23 10:30:11,377 INFO L273 TraceCheckUtils]: 29: Hoare triple {2805#false} assume !false; {2805#false} is VALID [2018-11-23 10:30:11,378 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:11,378 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:11,380 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:11,380 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:30:11,380 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:11,381 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:11,381 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:30:11,493 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:11,494 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:30:11,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:30:11,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:11,494 INFO L87 Difference]: Start difference. First operand 125 states and 199 transitions. Second operand 3 states. [2018-11-23 10:30:12,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:12,523 INFO L93 Difference]: Finished difference Result 285 states and 460 transitions. [2018-11-23 10:30:12,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:30:12,523 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:12,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:12,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:12,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:12,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:12,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:12,528 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 81 transitions. [2018-11-23 10:30:12,804 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:12,809 INFO L225 Difference]: With dead ends: 285 [2018-11-23 10:30:12,810 INFO L226 Difference]: Without dead ends: 219 [2018-11-23 10:30:12,811 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:12,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-11-23 10:30:13,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 203. [2018-11-23 10:30:13,249 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:13,249 INFO L82 GeneralOperation]: Start isEquivalent. First operand 219 states. Second operand 203 states. [2018-11-23 10:30:13,249 INFO L74 IsIncluded]: Start isIncluded. First operand 219 states. Second operand 203 states. [2018-11-23 10:30:13,250 INFO L87 Difference]: Start difference. First operand 219 states. Second operand 203 states. [2018-11-23 10:30:13,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:13,259 INFO L93 Difference]: Finished difference Result 219 states and 348 transitions. [2018-11-23 10:30:13,259 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 348 transitions. [2018-11-23 10:30:13,260 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:13,261 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:13,261 INFO L74 IsIncluded]: Start isIncluded. First operand 203 states. Second operand 219 states. [2018-11-23 10:30:13,261 INFO L87 Difference]: Start difference. First operand 203 states. Second operand 219 states. [2018-11-23 10:30:13,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:13,271 INFO L93 Difference]: Finished difference Result 219 states and 348 transitions. [2018-11-23 10:30:13,271 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 348 transitions. [2018-11-23 10:30:13,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:13,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:13,272 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:13,273 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:13,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-23 10:30:13,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 326 transitions. [2018-11-23 10:30:13,281 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 326 transitions. Word has length 30 [2018-11-23 10:30:13,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:13,281 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 326 transitions. [2018-11-23 10:30:13,282 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:30:13,282 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 326 transitions. [2018-11-23 10:30:13,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:13,283 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:13,283 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:13,283 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:13,284 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:13,284 INFO L82 PathProgramCache]: Analyzing trace with hash -1669848693, now seen corresponding path program 1 times [2018-11-23 10:30:13,284 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:13,284 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:13,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:13,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:13,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:13,371 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:13,423 INFO L256 TraceCheckUtils]: 0: Hoare triple {3920#true} call ULTIMATE.init(); {3920#true} is VALID [2018-11-23 10:30:13,423 INFO L273 TraceCheckUtils]: 1: Hoare triple {3920#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3920#true} is VALID [2018-11-23 10:30:13,423 INFO L273 TraceCheckUtils]: 2: Hoare triple {3920#true} assume true; {3920#true} is VALID [2018-11-23 10:30:13,424 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3920#true} {3920#true} #95#return; {3920#true} is VALID [2018-11-23 10:30:13,424 INFO L256 TraceCheckUtils]: 4: Hoare triple {3920#true} call #t~ret7 := main(); {3920#true} is VALID [2018-11-23 10:30:13,424 INFO L273 TraceCheckUtils]: 5: Hoare triple {3920#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3920#true} is VALID [2018-11-23 10:30:13,424 INFO L273 TraceCheckUtils]: 6: Hoare triple {3920#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3920#true} is VALID [2018-11-23 10:30:13,425 INFO L273 TraceCheckUtils]: 7: Hoare triple {3920#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3920#true} is VALID [2018-11-23 10:30:13,425 INFO L273 TraceCheckUtils]: 8: Hoare triple {3920#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {3920#true} is VALID [2018-11-23 10:30:13,425 INFO L273 TraceCheckUtils]: 9: Hoare triple {3920#true} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {3920#true} is VALID [2018-11-23 10:30:13,432 INFO L273 TraceCheckUtils]: 10: Hoare triple {3920#true} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:13,435 INFO L273 TraceCheckUtils]: 11: Hoare triple {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:13,435 INFO L273 TraceCheckUtils]: 12: Hoare triple {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:13,437 INFO L273 TraceCheckUtils]: 13: Hoare triple {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:13,437 INFO L273 TraceCheckUtils]: 14: Hoare triple {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:13,440 INFO L273 TraceCheckUtils]: 15: Hoare triple {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:13,440 INFO L273 TraceCheckUtils]: 16: Hoare triple {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:13,442 INFO L273 TraceCheckUtils]: 17: Hoare triple {3955#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {3921#false} is VALID [2018-11-23 10:30:13,442 INFO L273 TraceCheckUtils]: 18: Hoare triple {3921#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {3921#false} is VALID [2018-11-23 10:30:13,442 INFO L273 TraceCheckUtils]: 19: Hoare triple {3921#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {3921#false} is VALID [2018-11-23 10:30:13,442 INFO L273 TraceCheckUtils]: 20: Hoare triple {3921#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {3921#false} is VALID [2018-11-23 10:30:13,442 INFO L273 TraceCheckUtils]: 21: Hoare triple {3921#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3921#false} is VALID [2018-11-23 10:30:13,443 INFO L273 TraceCheckUtils]: 22: Hoare triple {3921#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {3921#false} is VALID [2018-11-23 10:30:13,443 INFO L273 TraceCheckUtils]: 23: Hoare triple {3921#false} ~i~0 := 0bv32; {3921#false} is VALID [2018-11-23 10:30:13,443 INFO L273 TraceCheckUtils]: 24: Hoare triple {3921#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {3921#false} is VALID [2018-11-23 10:30:13,443 INFO L273 TraceCheckUtils]: 25: Hoare triple {3921#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {3921#false} is VALID [2018-11-23 10:30:13,443 INFO L256 TraceCheckUtils]: 26: Hoare triple {3921#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {3921#false} is VALID [2018-11-23 10:30:13,444 INFO L273 TraceCheckUtils]: 27: Hoare triple {3921#false} ~cond := #in~cond; {3921#false} is VALID [2018-11-23 10:30:13,444 INFO L273 TraceCheckUtils]: 28: Hoare triple {3921#false} assume 0bv32 == ~cond; {3921#false} is VALID [2018-11-23 10:30:13,444 INFO L273 TraceCheckUtils]: 29: Hoare triple {3921#false} assume !false; {3921#false} is VALID [2018-11-23 10:30:13,446 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:13,446 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:13,450 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:13,450 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:30:13,451 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:13,451 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:13,451 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:30:13,564 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:13,565 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:30:13,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:30:13,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:13,565 INFO L87 Difference]: Start difference. First operand 203 states and 326 transitions. Second operand 3 states. [2018-11-23 10:30:14,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:14,579 INFO L93 Difference]: Finished difference Result 478 states and 775 transitions. [2018-11-23 10:30:14,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:30:14,579 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:14,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:14,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:14,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:14,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:14,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:14,583 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 81 transitions. [2018-11-23 10:30:15,151 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:15,162 INFO L225 Difference]: With dead ends: 478 [2018-11-23 10:30:15,162 INFO L226 Difference]: Without dead ends: 368 [2018-11-23 10:30:15,164 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:15,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2018-11-23 10:30:15,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 353. [2018-11-23 10:30:15,915 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:15,915 INFO L82 GeneralOperation]: Start isEquivalent. First operand 368 states. Second operand 353 states. [2018-11-23 10:30:15,915 INFO L74 IsIncluded]: Start isIncluded. First operand 368 states. Second operand 353 states. [2018-11-23 10:30:15,915 INFO L87 Difference]: Start difference. First operand 368 states. Second operand 353 states. [2018-11-23 10:30:15,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:15,931 INFO L93 Difference]: Finished difference Result 368 states and 582 transitions. [2018-11-23 10:30:15,931 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 582 transitions. [2018-11-23 10:30:15,932 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:15,932 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:15,932 INFO L74 IsIncluded]: Start isIncluded. First operand 353 states. Second operand 368 states. [2018-11-23 10:30:15,932 INFO L87 Difference]: Start difference. First operand 353 states. Second operand 368 states. [2018-11-23 10:30:15,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:15,949 INFO L93 Difference]: Finished difference Result 368 states and 582 transitions. [2018-11-23 10:30:15,949 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 582 transitions. [2018-11-23 10:30:15,950 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:15,950 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:15,950 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:15,950 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:15,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 353 states. [2018-11-23 10:30:15,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 353 states to 353 states and 562 transitions. [2018-11-23 10:30:15,966 INFO L78 Accepts]: Start accepts. Automaton has 353 states and 562 transitions. Word has length 30 [2018-11-23 10:30:15,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:15,966 INFO L480 AbstractCegarLoop]: Abstraction has 353 states and 562 transitions. [2018-11-23 10:30:15,966 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:30:15,966 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 562 transitions. [2018-11-23 10:30:15,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:15,968 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:15,968 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:15,968 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:15,968 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:15,968 INFO L82 PathProgramCache]: Analyzing trace with hash -898839037, now seen corresponding path program 1 times [2018-11-23 10:30:15,969 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:15,969 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:16,004 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:16,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:16,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:16,055 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:16,124 INFO L256 TraceCheckUtils]: 0: Hoare triple {5739#true} call ULTIMATE.init(); {5739#true} is VALID [2018-11-23 10:30:16,124 INFO L273 TraceCheckUtils]: 1: Hoare triple {5739#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {5739#true} is VALID [2018-11-23 10:30:16,124 INFO L273 TraceCheckUtils]: 2: Hoare triple {5739#true} assume true; {5739#true} is VALID [2018-11-23 10:30:16,124 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5739#true} {5739#true} #95#return; {5739#true} is VALID [2018-11-23 10:30:16,125 INFO L256 TraceCheckUtils]: 4: Hoare triple {5739#true} call #t~ret7 := main(); {5739#true} is VALID [2018-11-23 10:30:16,125 INFO L273 TraceCheckUtils]: 5: Hoare triple {5739#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {5739#true} is VALID [2018-11-23 10:30:16,125 INFO L273 TraceCheckUtils]: 6: Hoare triple {5739#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {5739#true} is VALID [2018-11-23 10:30:16,125 INFO L273 TraceCheckUtils]: 7: Hoare triple {5739#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {5739#true} is VALID [2018-11-23 10:30:16,125 INFO L273 TraceCheckUtils]: 8: Hoare triple {5739#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {5739#true} is VALID [2018-11-23 10:30:16,125 INFO L273 TraceCheckUtils]: 9: Hoare triple {5739#true} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:16,131 INFO L273 TraceCheckUtils]: 10: Hoare triple {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:16,131 INFO L273 TraceCheckUtils]: 11: Hoare triple {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:16,132 INFO L273 TraceCheckUtils]: 12: Hoare triple {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:16,132 INFO L273 TraceCheckUtils]: 13: Hoare triple {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:16,132 INFO L273 TraceCheckUtils]: 14: Hoare triple {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:16,133 INFO L273 TraceCheckUtils]: 15: Hoare triple {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} is VALID [2018-11-23 10:30:16,133 INFO L273 TraceCheckUtils]: 16: Hoare triple {5771#(bvsge main_~CCCELVOL5~0 main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {5740#false} is VALID [2018-11-23 10:30:16,133 INFO L273 TraceCheckUtils]: 17: Hoare triple {5740#false} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {5740#false} is VALID [2018-11-23 10:30:16,133 INFO L273 TraceCheckUtils]: 18: Hoare triple {5740#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {5740#false} is VALID [2018-11-23 10:30:16,134 INFO L273 TraceCheckUtils]: 19: Hoare triple {5740#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {5740#false} is VALID [2018-11-23 10:30:16,134 INFO L273 TraceCheckUtils]: 20: Hoare triple {5740#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {5740#false} is VALID [2018-11-23 10:30:16,134 INFO L273 TraceCheckUtils]: 21: Hoare triple {5740#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5740#false} is VALID [2018-11-23 10:30:16,134 INFO L273 TraceCheckUtils]: 22: Hoare triple {5740#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {5740#false} is VALID [2018-11-23 10:30:16,134 INFO L273 TraceCheckUtils]: 23: Hoare triple {5740#false} ~i~0 := 0bv32; {5740#false} is VALID [2018-11-23 10:30:16,134 INFO L273 TraceCheckUtils]: 24: Hoare triple {5740#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {5740#false} is VALID [2018-11-23 10:30:16,135 INFO L273 TraceCheckUtils]: 25: Hoare triple {5740#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {5740#false} is VALID [2018-11-23 10:30:16,135 INFO L256 TraceCheckUtils]: 26: Hoare triple {5740#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {5740#false} is VALID [2018-11-23 10:30:16,135 INFO L273 TraceCheckUtils]: 27: Hoare triple {5740#false} ~cond := #in~cond; {5740#false} is VALID [2018-11-23 10:30:16,135 INFO L273 TraceCheckUtils]: 28: Hoare triple {5740#false} assume 0bv32 == ~cond; {5740#false} is VALID [2018-11-23 10:30:16,136 INFO L273 TraceCheckUtils]: 29: Hoare triple {5740#false} assume !false; {5740#false} is VALID [2018-11-23 10:30:16,137 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:16,137 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:16,139 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:16,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:30:16,140 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:16,140 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:16,140 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:30:16,267 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:16,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:30:16,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:30:16,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:16,268 INFO L87 Difference]: Start difference. First operand 353 states and 562 transitions. Second operand 3 states. [2018-11-23 10:30:17,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:17,060 INFO L93 Difference]: Finished difference Result 489 states and 774 transitions. [2018-11-23 10:30:17,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:30:17,061 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:17,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:17,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:17,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:17,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:17,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:17,065 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 81 transitions. [2018-11-23 10:30:17,309 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:17,322 INFO L225 Difference]: With dead ends: 489 [2018-11-23 10:30:17,322 INFO L226 Difference]: Without dead ends: 416 [2018-11-23 10:30:17,323 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:17,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states. [2018-11-23 10:30:17,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 385. [2018-11-23 10:30:17,884 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:17,884 INFO L82 GeneralOperation]: Start isEquivalent. First operand 416 states. Second operand 385 states. [2018-11-23 10:30:17,884 INFO L74 IsIncluded]: Start isIncluded. First operand 416 states. Second operand 385 states. [2018-11-23 10:30:17,885 INFO L87 Difference]: Start difference. First operand 416 states. Second operand 385 states. [2018-11-23 10:30:17,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:17,900 INFO L93 Difference]: Finished difference Result 416 states and 640 transitions. [2018-11-23 10:30:17,900 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 640 transitions. [2018-11-23 10:30:17,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:17,902 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:17,902 INFO L74 IsIncluded]: Start isIncluded. First operand 385 states. Second operand 416 states. [2018-11-23 10:30:17,902 INFO L87 Difference]: Start difference. First operand 385 states. Second operand 416 states. [2018-11-23 10:30:17,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:17,916 INFO L93 Difference]: Finished difference Result 416 states and 640 transitions. [2018-11-23 10:30:17,917 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 640 transitions. [2018-11-23 10:30:17,918 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:17,918 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:17,918 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:17,918 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:17,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2018-11-23 10:30:17,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 598 transitions. [2018-11-23 10:30:17,931 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 598 transitions. Word has length 30 [2018-11-23 10:30:17,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:17,931 INFO L480 AbstractCegarLoop]: Abstraction has 385 states and 598 transitions. [2018-11-23 10:30:17,931 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:30:17,931 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 598 transitions. [2018-11-23 10:30:17,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:17,933 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:17,933 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:17,933 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:17,933 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:17,933 INFO L82 PathProgramCache]: Analyzing trace with hash 1918844489, now seen corresponding path program 1 times [2018-11-23 10:30:17,934 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:17,934 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:17,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:17,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:18,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:18,026 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:18,365 INFO L256 TraceCheckUtils]: 0: Hoare triple {7697#true} call ULTIMATE.init(); {7697#true} is VALID [2018-11-23 10:30:18,366 INFO L273 TraceCheckUtils]: 1: Hoare triple {7697#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {7697#true} is VALID [2018-11-23 10:30:18,366 INFO L273 TraceCheckUtils]: 2: Hoare triple {7697#true} assume true; {7697#true} is VALID [2018-11-23 10:30:18,366 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7697#true} {7697#true} #95#return; {7697#true} is VALID [2018-11-23 10:30:18,367 INFO L256 TraceCheckUtils]: 4: Hoare triple {7697#true} call #t~ret7 := main(); {7697#true} is VALID [2018-11-23 10:30:18,367 INFO L273 TraceCheckUtils]: 5: Hoare triple {7697#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {7697#true} is VALID [2018-11-23 10:30:18,367 INFO L273 TraceCheckUtils]: 6: Hoare triple {7697#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {7697#true} is VALID [2018-11-23 10:30:18,367 INFO L273 TraceCheckUtils]: 7: Hoare triple {7697#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {7697#true} is VALID [2018-11-23 10:30:18,368 INFO L273 TraceCheckUtils]: 8: Hoare triple {7697#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {7697#true} is VALID [2018-11-23 10:30:18,368 INFO L273 TraceCheckUtils]: 9: Hoare triple {7697#true} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {7697#true} is VALID [2018-11-23 10:30:18,368 INFO L273 TraceCheckUtils]: 10: Hoare triple {7697#true} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {7697#true} is VALID [2018-11-23 10:30:18,368 INFO L273 TraceCheckUtils]: 11: Hoare triple {7697#true} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {7697#true} is VALID [2018-11-23 10:30:18,368 INFO L273 TraceCheckUtils]: 12: Hoare triple {7697#true} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {7697#true} is VALID [2018-11-23 10:30:18,370 INFO L273 TraceCheckUtils]: 13: Hoare triple {7697#true} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:18,370 INFO L273 TraceCheckUtils]: 14: Hoare triple {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:18,372 INFO L273 TraceCheckUtils]: 15: Hoare triple {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:18,372 INFO L273 TraceCheckUtils]: 16: Hoare triple {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:18,374 INFO L273 TraceCheckUtils]: 17: Hoare triple {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:18,383 INFO L273 TraceCheckUtils]: 18: Hoare triple {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:18,396 INFO L273 TraceCheckUtils]: 19: Hoare triple {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:18,408 INFO L273 TraceCheckUtils]: 20: Hoare triple {7741#(not (bvsge main_~CCCELVOL1~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {7698#false} is VALID [2018-11-23 10:30:18,409 INFO L273 TraceCheckUtils]: 21: Hoare triple {7698#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7698#false} is VALID [2018-11-23 10:30:18,409 INFO L273 TraceCheckUtils]: 22: Hoare triple {7698#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {7698#false} is VALID [2018-11-23 10:30:18,409 INFO L273 TraceCheckUtils]: 23: Hoare triple {7698#false} ~i~0 := 0bv32; {7698#false} is VALID [2018-11-23 10:30:18,409 INFO L273 TraceCheckUtils]: 24: Hoare triple {7698#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {7698#false} is VALID [2018-11-23 10:30:18,410 INFO L273 TraceCheckUtils]: 25: Hoare triple {7698#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {7698#false} is VALID [2018-11-23 10:30:18,410 INFO L256 TraceCheckUtils]: 26: Hoare triple {7698#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {7698#false} is VALID [2018-11-23 10:30:18,410 INFO L273 TraceCheckUtils]: 27: Hoare triple {7698#false} ~cond := #in~cond; {7698#false} is VALID [2018-11-23 10:30:18,410 INFO L273 TraceCheckUtils]: 28: Hoare triple {7698#false} assume 0bv32 == ~cond; {7698#false} is VALID [2018-11-23 10:30:18,410 INFO L273 TraceCheckUtils]: 29: Hoare triple {7698#false} assume !false; {7698#false} is VALID [2018-11-23 10:30:18,412 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:18,412 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:18,416 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:18,416 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:30:18,416 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:18,417 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:18,417 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:30:18,545 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:18,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:30:18,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:30:18,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:18,546 INFO L87 Difference]: Start difference. First operand 385 states and 598 transitions. Second operand 3 states. [2018-11-23 10:30:19,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:19,934 INFO L93 Difference]: Finished difference Result 744 states and 1142 transitions. [2018-11-23 10:30:19,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:30:19,934 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:19,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:19,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:19,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:19,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:19,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 81 transitions. [2018-11-23 10:30:19,938 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 81 transitions. [2018-11-23 10:30:20,399 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:20,422 INFO L225 Difference]: With dead ends: 744 [2018-11-23 10:30:20,423 INFO L226 Difference]: Without dead ends: 605 [2018-11-23 10:30:20,424 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:20,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2018-11-23 10:30:21,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 569. [2018-11-23 10:30:21,163 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:21,163 INFO L82 GeneralOperation]: Start isEquivalent. First operand 605 states. Second operand 569 states. [2018-11-23 10:30:21,163 INFO L74 IsIncluded]: Start isIncluded. First operand 605 states. Second operand 569 states. [2018-11-23 10:30:21,163 INFO L87 Difference]: Start difference. First operand 605 states. Second operand 569 states. [2018-11-23 10:30:21,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:21,187 INFO L93 Difference]: Finished difference Result 605 states and 903 transitions. [2018-11-23 10:30:21,187 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 903 transitions. [2018-11-23 10:30:21,189 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:21,189 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:21,189 INFO L74 IsIncluded]: Start isIncluded. First operand 569 states. Second operand 605 states. [2018-11-23 10:30:21,189 INFO L87 Difference]: Start difference. First operand 569 states. Second operand 605 states. [2018-11-23 10:30:21,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:21,214 INFO L93 Difference]: Finished difference Result 605 states and 903 transitions. [2018-11-23 10:30:21,214 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 903 transitions. [2018-11-23 10:30:21,216 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:21,216 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:21,216 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:21,216 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:21,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 569 states. [2018-11-23 10:30:21,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 569 states to 569 states and 856 transitions. [2018-11-23 10:30:21,240 INFO L78 Accepts]: Start accepts. Automaton has 569 states and 856 transitions. Word has length 30 [2018-11-23 10:30:21,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:21,241 INFO L480 AbstractCegarLoop]: Abstraction has 569 states and 856 transitions. [2018-11-23 10:30:21,241 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:30:21,241 INFO L276 IsEmpty]: Start isEmpty. Operand 569 states and 856 transitions. [2018-11-23 10:30:21,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:21,243 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:21,243 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:21,243 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:21,243 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:21,243 INFO L82 PathProgramCache]: Analyzing trace with hash -787774905, now seen corresponding path program 1 times [2018-11-23 10:30:21,244 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:21,244 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:21,272 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:21,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:21,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:21,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:21,872 INFO L256 TraceCheckUtils]: 0: Hoare triple {10526#true} call ULTIMATE.init(); {10526#true} is VALID [2018-11-23 10:30:21,873 INFO L273 TraceCheckUtils]: 1: Hoare triple {10526#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {10526#true} is VALID [2018-11-23 10:30:21,873 INFO L273 TraceCheckUtils]: 2: Hoare triple {10526#true} assume true; {10526#true} is VALID [2018-11-23 10:30:21,873 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10526#true} {10526#true} #95#return; {10526#true} is VALID [2018-11-23 10:30:21,873 INFO L256 TraceCheckUtils]: 4: Hoare triple {10526#true} call #t~ret7 := main(); {10526#true} is VALID [2018-11-23 10:30:21,874 INFO L273 TraceCheckUtils]: 5: Hoare triple {10526#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {10526#true} is VALID [2018-11-23 10:30:21,875 INFO L273 TraceCheckUtils]: 6: Hoare triple {10526#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {10549#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:21,875 INFO L273 TraceCheckUtils]: 7: Hoare triple {10549#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {10549#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:21,876 INFO L273 TraceCheckUtils]: 8: Hoare triple {10549#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {10549#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:21,879 INFO L273 TraceCheckUtils]: 9: Hoare triple {10549#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {10559#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:21,879 INFO L273 TraceCheckUtils]: 10: Hoare triple {10559#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {10559#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:21,880 INFO L273 TraceCheckUtils]: 11: Hoare triple {10559#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {10559#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:21,882 INFO L273 TraceCheckUtils]: 12: Hoare triple {10559#(and (= (_ bv3 32) main_~CCCELVOL2~0) (bvsge (_ bv2 32) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {10527#false} is VALID [2018-11-23 10:30:21,883 INFO L273 TraceCheckUtils]: 13: Hoare triple {10527#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {10527#false} is VALID [2018-11-23 10:30:21,883 INFO L273 TraceCheckUtils]: 14: Hoare triple {10527#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {10527#false} is VALID [2018-11-23 10:30:21,883 INFO L273 TraceCheckUtils]: 15: Hoare triple {10527#false} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {10527#false} is VALID [2018-11-23 10:30:21,883 INFO L273 TraceCheckUtils]: 16: Hoare triple {10527#false} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {10527#false} is VALID [2018-11-23 10:30:21,883 INFO L273 TraceCheckUtils]: 17: Hoare triple {10527#false} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {10527#false} is VALID [2018-11-23 10:30:21,884 INFO L273 TraceCheckUtils]: 18: Hoare triple {10527#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {10527#false} is VALID [2018-11-23 10:30:21,884 INFO L273 TraceCheckUtils]: 19: Hoare triple {10527#false} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {10527#false} is VALID [2018-11-23 10:30:21,884 INFO L273 TraceCheckUtils]: 20: Hoare triple {10527#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {10527#false} is VALID [2018-11-23 10:30:21,884 INFO L273 TraceCheckUtils]: 21: Hoare triple {10527#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {10527#false} is VALID [2018-11-23 10:30:21,884 INFO L273 TraceCheckUtils]: 22: Hoare triple {10527#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {10527#false} is VALID [2018-11-23 10:30:21,884 INFO L273 TraceCheckUtils]: 23: Hoare triple {10527#false} ~i~0 := 0bv32; {10527#false} is VALID [2018-11-23 10:30:21,884 INFO L273 TraceCheckUtils]: 24: Hoare triple {10527#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {10527#false} is VALID [2018-11-23 10:30:21,885 INFO L273 TraceCheckUtils]: 25: Hoare triple {10527#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {10527#false} is VALID [2018-11-23 10:30:21,885 INFO L256 TraceCheckUtils]: 26: Hoare triple {10527#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {10527#false} is VALID [2018-11-23 10:30:21,885 INFO L273 TraceCheckUtils]: 27: Hoare triple {10527#false} ~cond := #in~cond; {10527#false} is VALID [2018-11-23 10:30:21,885 INFO L273 TraceCheckUtils]: 28: Hoare triple {10527#false} assume 0bv32 == ~cond; {10527#false} is VALID [2018-11-23 10:30:21,885 INFO L273 TraceCheckUtils]: 29: Hoare triple {10527#false} assume !false; {10527#false} is VALID [2018-11-23 10:30:21,887 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 10:30:21,887 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:21,889 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:21,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:30:21,890 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:30:21,890 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:21,891 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:30:21,985 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:21,985 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:30:21,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:30:21,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:30:21,985 INFO L87 Difference]: Start difference. First operand 569 states and 856 transitions. Second operand 4 states. [2018-11-23 10:30:23,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:23,085 INFO L93 Difference]: Finished difference Result 704 states and 1045 transitions. [2018-11-23 10:30:23,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:30:23,086 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:30:23,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:23,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:30:23,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 79 transitions. [2018-11-23 10:30:23,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:30:23,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 79 transitions. [2018-11-23 10:30:23,089 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 79 transitions. [2018-11-23 10:30:23,924 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:23,940 INFO L225 Difference]: With dead ends: 704 [2018-11-23 10:30:23,940 INFO L226 Difference]: Without dead ends: 481 [2018-11-23 10:30:23,941 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:30:23,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states. [2018-11-23 10:30:24,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 438. [2018-11-23 10:30:24,924 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:24,924 INFO L82 GeneralOperation]: Start isEquivalent. First operand 481 states. Second operand 438 states. [2018-11-23 10:30:24,924 INFO L74 IsIncluded]: Start isIncluded. First operand 481 states. Second operand 438 states. [2018-11-23 10:30:24,924 INFO L87 Difference]: Start difference. First operand 481 states. Second operand 438 states. [2018-11-23 10:30:24,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:24,942 INFO L93 Difference]: Finished difference Result 481 states and 711 transitions. [2018-11-23 10:30:24,942 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 711 transitions. [2018-11-23 10:30:24,943 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:24,944 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:24,944 INFO L74 IsIncluded]: Start isIncluded. First operand 438 states. Second operand 481 states. [2018-11-23 10:30:24,944 INFO L87 Difference]: Start difference. First operand 438 states. Second operand 481 states. [2018-11-23 10:30:24,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:24,963 INFO L93 Difference]: Finished difference Result 481 states and 711 transitions. [2018-11-23 10:30:24,964 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 711 transitions. [2018-11-23 10:30:24,965 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:24,965 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:24,966 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:24,966 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:24,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 438 states. [2018-11-23 10:30:24,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 653 transitions. [2018-11-23 10:30:24,982 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 653 transitions. Word has length 30 [2018-11-23 10:30:24,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:24,982 INFO L480 AbstractCegarLoop]: Abstraction has 438 states and 653 transitions. [2018-11-23 10:30:24,982 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:30:24,983 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 653 transitions. [2018-11-23 10:30:24,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:24,984 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:24,984 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:24,985 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:24,985 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:24,985 INFO L82 PathProgramCache]: Analyzing trace with hash -925473081, now seen corresponding path program 1 times [2018-11-23 10:30:24,985 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:24,986 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:25,017 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:25,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:25,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:25,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:25,641 INFO L256 TraceCheckUtils]: 0: Hoare triple {12913#true} call ULTIMATE.init(); {12913#true} is VALID [2018-11-23 10:30:25,642 INFO L273 TraceCheckUtils]: 1: Hoare triple {12913#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {12913#true} is VALID [2018-11-23 10:30:25,642 INFO L273 TraceCheckUtils]: 2: Hoare triple {12913#true} assume true; {12913#true} is VALID [2018-11-23 10:30:25,642 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {12913#true} {12913#true} #95#return; {12913#true} is VALID [2018-11-23 10:30:25,643 INFO L256 TraceCheckUtils]: 4: Hoare triple {12913#true} call #t~ret7 := main(); {12913#true} is VALID [2018-11-23 10:30:25,643 INFO L273 TraceCheckUtils]: 5: Hoare triple {12913#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {12913#true} is VALID [2018-11-23 10:30:25,651 INFO L273 TraceCheckUtils]: 6: Hoare triple {12913#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {12936#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:25,652 INFO L273 TraceCheckUtils]: 7: Hoare triple {12936#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {12936#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:25,653 INFO L273 TraceCheckUtils]: 8: Hoare triple {12936#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {12936#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:25,655 INFO L273 TraceCheckUtils]: 9: Hoare triple {12936#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {12946#(and (= (_ bv7 32) main_~CCCELVOL3~0) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:25,656 INFO L273 TraceCheckUtils]: 10: Hoare triple {12946#(and (= (_ bv7 32) main_~CCCELVOL3~0) (bvsge (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {12946#(and (= (_ bv7 32) main_~CCCELVOL3~0) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:25,659 INFO L273 TraceCheckUtils]: 11: Hoare triple {12946#(and (= (_ bv7 32) main_~CCCELVOL3~0) (bvsge (_ bv2 32) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,659 INFO L273 TraceCheckUtils]: 12: Hoare triple {12914#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,660 INFO L273 TraceCheckUtils]: 13: Hoare triple {12914#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,660 INFO L273 TraceCheckUtils]: 14: Hoare triple {12914#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {12914#false} is VALID [2018-11-23 10:30:25,660 INFO L273 TraceCheckUtils]: 15: Hoare triple {12914#false} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {12914#false} is VALID [2018-11-23 10:30:25,660 INFO L273 TraceCheckUtils]: 16: Hoare triple {12914#false} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,661 INFO L273 TraceCheckUtils]: 17: Hoare triple {12914#false} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,661 INFO L273 TraceCheckUtils]: 18: Hoare triple {12914#false} assume !~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,661 INFO L273 TraceCheckUtils]: 19: Hoare triple {12914#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,661 INFO L273 TraceCheckUtils]: 20: Hoare triple {12914#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {12914#false} is VALID [2018-11-23 10:30:25,661 INFO L273 TraceCheckUtils]: 21: Hoare triple {12914#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {12914#false} is VALID [2018-11-23 10:30:25,662 INFO L273 TraceCheckUtils]: 22: Hoare triple {12914#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {12914#false} is VALID [2018-11-23 10:30:25,662 INFO L273 TraceCheckUtils]: 23: Hoare triple {12914#false} ~i~0 := 0bv32; {12914#false} is VALID [2018-11-23 10:30:25,662 INFO L273 TraceCheckUtils]: 24: Hoare triple {12914#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {12914#false} is VALID [2018-11-23 10:30:25,662 INFO L273 TraceCheckUtils]: 25: Hoare triple {12914#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {12914#false} is VALID [2018-11-23 10:30:25,662 INFO L256 TraceCheckUtils]: 26: Hoare triple {12914#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {12914#false} is VALID [2018-11-23 10:30:25,662 INFO L273 TraceCheckUtils]: 27: Hoare triple {12914#false} ~cond := #in~cond; {12914#false} is VALID [2018-11-23 10:30:25,662 INFO L273 TraceCheckUtils]: 28: Hoare triple {12914#false} assume 0bv32 == ~cond; {12914#false} is VALID [2018-11-23 10:30:25,663 INFO L273 TraceCheckUtils]: 29: Hoare triple {12914#false} assume !false; {12914#false} is VALID [2018-11-23 10:30:25,663 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:30:25,663 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:25,665 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:25,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:30:25,665 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:30:25,666 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:25,666 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:30:25,772 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:25,772 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:30:25,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:30:25,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:30:25,773 INFO L87 Difference]: Start difference. First operand 438 states and 653 transitions. Second operand 4 states. [2018-11-23 10:30:26,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:26,763 INFO L93 Difference]: Finished difference Result 521 states and 761 transitions. [2018-11-23 10:30:26,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:30:26,763 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:30:26,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:26,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:30:26,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 77 transitions. [2018-11-23 10:30:26,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:30:26,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 77 transitions. [2018-11-23 10:30:26,766 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 77 transitions. [2018-11-23 10:30:27,020 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:27,031 INFO L225 Difference]: With dead ends: 521 [2018-11-23 10:30:27,031 INFO L226 Difference]: Without dead ends: 390 [2018-11-23 10:30:27,032 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:30:27,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2018-11-23 10:30:27,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 371. [2018-11-23 10:30:27,710 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:27,710 INFO L82 GeneralOperation]: Start isEquivalent. First operand 390 states. Second operand 371 states. [2018-11-23 10:30:27,710 INFO L74 IsIncluded]: Start isIncluded. First operand 390 states. Second operand 371 states. [2018-11-23 10:30:27,711 INFO L87 Difference]: Start difference. First operand 390 states. Second operand 371 states. [2018-11-23 10:30:27,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:27,729 INFO L93 Difference]: Finished difference Result 390 states and 579 transitions. [2018-11-23 10:30:27,729 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 579 transitions. [2018-11-23 10:30:27,730 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:27,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:27,730 INFO L74 IsIncluded]: Start isIncluded. First operand 371 states. Second operand 390 states. [2018-11-23 10:30:27,731 INFO L87 Difference]: Start difference. First operand 371 states. Second operand 390 states. [2018-11-23 10:30:27,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:27,746 INFO L93 Difference]: Finished difference Result 390 states and 579 transitions. [2018-11-23 10:30:27,746 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 579 transitions. [2018-11-23 10:30:27,747 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:27,748 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:27,748 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:27,748 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:27,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371 states. [2018-11-23 10:30:27,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371 states to 371 states and 554 transitions. [2018-11-23 10:30:27,758 INFO L78 Accepts]: Start accepts. Automaton has 371 states and 554 transitions. Word has length 30 [2018-11-23 10:30:27,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:27,759 INFO L480 AbstractCegarLoop]: Abstraction has 371 states and 554 transitions. [2018-11-23 10:30:27,759 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:30:27,759 INFO L276 IsEmpty]: Start isEmpty. Operand 371 states and 554 transitions. [2018-11-23 10:30:27,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:27,760 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:27,761 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:27,761 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:27,761 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:27,761 INFO L82 PathProgramCache]: Analyzing trace with hash -899149241, now seen corresponding path program 1 times [2018-11-23 10:30:27,761 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:27,762 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:27,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:27,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:27,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:27,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:28,052 INFO L256 TraceCheckUtils]: 0: Hoare triple {14832#true} call ULTIMATE.init(); {14832#true} is VALID [2018-11-23 10:30:28,052 INFO L273 TraceCheckUtils]: 1: Hoare triple {14832#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {14832#true} is VALID [2018-11-23 10:30:28,053 INFO L273 TraceCheckUtils]: 2: Hoare triple {14832#true} assume true; {14832#true} is VALID [2018-11-23 10:30:28,053 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {14832#true} {14832#true} #95#return; {14832#true} is VALID [2018-11-23 10:30:28,053 INFO L256 TraceCheckUtils]: 4: Hoare triple {14832#true} call #t~ret7 := main(); {14832#true} is VALID [2018-11-23 10:30:28,053 INFO L273 TraceCheckUtils]: 5: Hoare triple {14832#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {14832#true} is VALID [2018-11-23 10:30:28,054 INFO L273 TraceCheckUtils]: 6: Hoare triple {14832#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {14855#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:28,054 INFO L273 TraceCheckUtils]: 7: Hoare triple {14855#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {14855#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:28,055 INFO L273 TraceCheckUtils]: 8: Hoare triple {14855#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {14855#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:28,057 INFO L273 TraceCheckUtils]: 9: Hoare triple {14855#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {14865#(and (= (_ bv5 32) main_~CCCELVOL4~0) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:28,060 INFO L273 TraceCheckUtils]: 10: Hoare triple {14865#(and (= (_ bv5 32) main_~CCCELVOL4~0) (bvsge (_ bv2 32) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,061 INFO L273 TraceCheckUtils]: 11: Hoare triple {14833#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,061 INFO L273 TraceCheckUtils]: 12: Hoare triple {14833#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,061 INFO L273 TraceCheckUtils]: 13: Hoare triple {14833#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,061 INFO L273 TraceCheckUtils]: 14: Hoare triple {14833#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {14833#false} is VALID [2018-11-23 10:30:28,061 INFO L273 TraceCheckUtils]: 15: Hoare triple {14833#false} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {14833#false} is VALID [2018-11-23 10:30:28,061 INFO L273 TraceCheckUtils]: 16: Hoare triple {14833#false} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,062 INFO L273 TraceCheckUtils]: 17: Hoare triple {14833#false} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,062 INFO L273 TraceCheckUtils]: 18: Hoare triple {14833#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,062 INFO L273 TraceCheckUtils]: 19: Hoare triple {14833#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,062 INFO L273 TraceCheckUtils]: 20: Hoare triple {14833#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {14833#false} is VALID [2018-11-23 10:30:28,062 INFO L273 TraceCheckUtils]: 21: Hoare triple {14833#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {14833#false} is VALID [2018-11-23 10:30:28,062 INFO L273 TraceCheckUtils]: 22: Hoare triple {14833#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {14833#false} is VALID [2018-11-23 10:30:28,062 INFO L273 TraceCheckUtils]: 23: Hoare triple {14833#false} ~i~0 := 0bv32; {14833#false} is VALID [2018-11-23 10:30:28,063 INFO L273 TraceCheckUtils]: 24: Hoare triple {14833#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {14833#false} is VALID [2018-11-23 10:30:28,063 INFO L273 TraceCheckUtils]: 25: Hoare triple {14833#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {14833#false} is VALID [2018-11-23 10:30:28,063 INFO L256 TraceCheckUtils]: 26: Hoare triple {14833#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {14833#false} is VALID [2018-11-23 10:30:28,063 INFO L273 TraceCheckUtils]: 27: Hoare triple {14833#false} ~cond := #in~cond; {14833#false} is VALID [2018-11-23 10:30:28,063 INFO L273 TraceCheckUtils]: 28: Hoare triple {14833#false} assume 0bv32 == ~cond; {14833#false} is VALID [2018-11-23 10:30:28,063 INFO L273 TraceCheckUtils]: 29: Hoare triple {14833#false} assume !false; {14833#false} is VALID [2018-11-23 10:30:28,064 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:30:28,064 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:28,066 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:28,066 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:30:28,066 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:30:28,067 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:28,067 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:30:28,162 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:28,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:30:28,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:30:28,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:30:28,163 INFO L87 Difference]: Start difference. First operand 371 states and 554 transitions. Second operand 4 states. [2018-11-23 10:30:29,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:29,227 INFO L93 Difference]: Finished difference Result 429 states and 625 transitions. [2018-11-23 10:30:29,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:30:29,227 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:30:29,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:29,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:30:29,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 75 transitions. [2018-11-23 10:30:29,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:30:29,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 75 transitions. [2018-11-23 10:30:29,229 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 75 transitions. [2018-11-23 10:30:29,443 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:29,452 INFO L225 Difference]: With dead ends: 429 [2018-11-23 10:30:29,452 INFO L226 Difference]: Without dead ends: 347 [2018-11-23 10:30:29,452 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:30:29,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-11-23 10:30:29,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 337. [2018-11-23 10:30:29,919 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:29,919 INFO L82 GeneralOperation]: Start isEquivalent. First operand 347 states. Second operand 337 states. [2018-11-23 10:30:29,919 INFO L74 IsIncluded]: Start isIncluded. First operand 347 states. Second operand 337 states. [2018-11-23 10:30:29,919 INFO L87 Difference]: Start difference. First operand 347 states. Second operand 337 states. [2018-11-23 10:30:29,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:29,927 INFO L93 Difference]: Finished difference Result 347 states and 519 transitions. [2018-11-23 10:30:29,928 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 519 transitions. [2018-11-23 10:30:29,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:29,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:29,928 INFO L74 IsIncluded]: Start isIncluded. First operand 337 states. Second operand 347 states. [2018-11-23 10:30:29,928 INFO L87 Difference]: Start difference. First operand 337 states. Second operand 347 states. [2018-11-23 10:30:29,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:29,936 INFO L93 Difference]: Finished difference Result 347 states and 519 transitions. [2018-11-23 10:30:29,936 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 519 transitions. [2018-11-23 10:30:29,937 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:29,937 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:29,937 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:29,937 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:29,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2018-11-23 10:30:29,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 506 transitions. [2018-11-23 10:30:29,945 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 506 transitions. Word has length 30 [2018-11-23 10:30:29,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:29,945 INFO L480 AbstractCegarLoop]: Abstraction has 337 states and 506 transitions. [2018-11-23 10:30:29,945 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:30:29,945 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 506 transitions. [2018-11-23 10:30:29,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:29,946 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:29,946 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:29,946 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:29,947 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:29,947 INFO L82 PathProgramCache]: Analyzing trace with hash -1053367863, now seen corresponding path program 1 times [2018-11-23 10:30:29,947 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:29,947 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:29,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:29,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:30,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:30,020 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:30,062 INFO L256 TraceCheckUtils]: 0: Hoare triple {16521#true} call ULTIMATE.init(); {16521#true} is VALID [2018-11-23 10:30:30,063 INFO L273 TraceCheckUtils]: 1: Hoare triple {16521#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {16521#true} is VALID [2018-11-23 10:30:30,063 INFO L273 TraceCheckUtils]: 2: Hoare triple {16521#true} assume true; {16521#true} is VALID [2018-11-23 10:30:30,063 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {16521#true} {16521#true} #95#return; {16521#true} is VALID [2018-11-23 10:30:30,064 INFO L256 TraceCheckUtils]: 4: Hoare triple {16521#true} call #t~ret7 := main(); {16521#true} is VALID [2018-11-23 10:30:30,064 INFO L273 TraceCheckUtils]: 5: Hoare triple {16521#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {16521#true} is VALID [2018-11-23 10:30:30,064 INFO L273 TraceCheckUtils]: 6: Hoare triple {16521#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {16521#true} is VALID [2018-11-23 10:30:30,064 INFO L273 TraceCheckUtils]: 7: Hoare triple {16521#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {16521#true} is VALID [2018-11-23 10:30:30,065 INFO L273 TraceCheckUtils]: 8: Hoare triple {16521#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {16521#true} is VALID [2018-11-23 10:30:30,065 INFO L273 TraceCheckUtils]: 9: Hoare triple {16521#true} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:30,066 INFO L273 TraceCheckUtils]: 10: Hoare triple {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:30,066 INFO L273 TraceCheckUtils]: 11: Hoare triple {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:30,066 INFO L273 TraceCheckUtils]: 12: Hoare triple {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:30,067 INFO L273 TraceCheckUtils]: 13: Hoare triple {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:30,067 INFO L273 TraceCheckUtils]: 14: Hoare triple {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:30,067 INFO L273 TraceCheckUtils]: 15: Hoare triple {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} is VALID [2018-11-23 10:30:30,071 INFO L273 TraceCheckUtils]: 16: Hoare triple {16553#(not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {16522#false} is VALID [2018-11-23 10:30:30,071 INFO L273 TraceCheckUtils]: 17: Hoare triple {16522#false} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {16522#false} is VALID [2018-11-23 10:30:30,071 INFO L273 TraceCheckUtils]: 18: Hoare triple {16522#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {16522#false} is VALID [2018-11-23 10:30:30,071 INFO L273 TraceCheckUtils]: 19: Hoare triple {16522#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {16522#false} is VALID [2018-11-23 10:30:30,072 INFO L273 TraceCheckUtils]: 20: Hoare triple {16522#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {16522#false} is VALID [2018-11-23 10:30:30,072 INFO L273 TraceCheckUtils]: 21: Hoare triple {16522#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {16522#false} is VALID [2018-11-23 10:30:30,072 INFO L273 TraceCheckUtils]: 22: Hoare triple {16522#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {16522#false} is VALID [2018-11-23 10:30:30,072 INFO L273 TraceCheckUtils]: 23: Hoare triple {16522#false} ~i~0 := 0bv32; {16522#false} is VALID [2018-11-23 10:30:30,072 INFO L273 TraceCheckUtils]: 24: Hoare triple {16522#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {16522#false} is VALID [2018-11-23 10:30:30,073 INFO L273 TraceCheckUtils]: 25: Hoare triple {16522#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {16522#false} is VALID [2018-11-23 10:30:30,073 INFO L256 TraceCheckUtils]: 26: Hoare triple {16522#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {16522#false} is VALID [2018-11-23 10:30:30,073 INFO L273 TraceCheckUtils]: 27: Hoare triple {16522#false} ~cond := #in~cond; {16522#false} is VALID [2018-11-23 10:30:30,073 INFO L273 TraceCheckUtils]: 28: Hoare triple {16522#false} assume 0bv32 == ~cond; {16522#false} is VALID [2018-11-23 10:30:30,073 INFO L273 TraceCheckUtils]: 29: Hoare triple {16522#false} assume !false; {16522#false} is VALID [2018-11-23 10:30:30,074 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:30,075 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:30,078 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:30,078 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:30:30,078 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:30,078 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:30,078 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:30:30,184 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:30,184 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:30:30,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:30:30,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:30,185 INFO L87 Difference]: Start difference. First operand 337 states and 506 transitions. Second operand 3 states. [2018-11-23 10:30:30,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:30,994 INFO L93 Difference]: Finished difference Result 373 states and 548 transitions. [2018-11-23 10:30:30,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:30:30,994 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:30:30,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:30,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:30,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 74 transitions. [2018-11-23 10:30:30,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:30:30,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 74 transitions. [2018-11-23 10:30:30,997 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 74 transitions. [2018-11-23 10:30:31,285 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:31,292 INFO L225 Difference]: With dead ends: 373 [2018-11-23 10:30:31,292 INFO L226 Difference]: Without dead ends: 333 [2018-11-23 10:30:31,292 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:30:31,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-11-23 10:30:32,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 326. [2018-11-23 10:30:32,213 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:32,213 INFO L82 GeneralOperation]: Start isEquivalent. First operand 333 states. Second operand 326 states. [2018-11-23 10:30:32,213 INFO L74 IsIncluded]: Start isIncluded. First operand 333 states. Second operand 326 states. [2018-11-23 10:30:32,213 INFO L87 Difference]: Start difference. First operand 333 states. Second operand 326 states. [2018-11-23 10:30:32,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:32,220 INFO L93 Difference]: Finished difference Result 333 states and 469 transitions. [2018-11-23 10:30:32,220 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 469 transitions. [2018-11-23 10:30:32,221 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:32,221 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:32,221 INFO L74 IsIncluded]: Start isIncluded. First operand 326 states. Second operand 333 states. [2018-11-23 10:30:32,221 INFO L87 Difference]: Start difference. First operand 326 states. Second operand 333 states. [2018-11-23 10:30:32,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:32,229 INFO L93 Difference]: Finished difference Result 333 states and 469 transitions. [2018-11-23 10:30:32,229 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 469 transitions. [2018-11-23 10:30:32,230 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:32,230 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:32,230 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:32,231 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:32,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-11-23 10:30:32,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 459 transitions. [2018-11-23 10:30:32,239 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 459 transitions. Word has length 30 [2018-11-23 10:30:32,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:32,239 INFO L480 AbstractCegarLoop]: Abstraction has 326 states and 459 transitions. [2018-11-23 10:30:32,239 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:30:32,239 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 459 transitions. [2018-11-23 10:30:32,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:30:32,240 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:32,240 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:32,240 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:32,241 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:32,241 INFO L82 PathProgramCache]: Analyzing trace with hash -83110201, now seen corresponding path program 1 times [2018-11-23 10:30:32,241 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:32,241 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:32,260 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:32,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:32,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:32,413 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:32,591 INFO L256 TraceCheckUtils]: 0: Hoare triple {18104#true} call ULTIMATE.init(); {18104#true} is VALID [2018-11-23 10:30:32,591 INFO L273 TraceCheckUtils]: 1: Hoare triple {18104#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {18104#true} is VALID [2018-11-23 10:30:32,592 INFO L273 TraceCheckUtils]: 2: Hoare triple {18104#true} assume true; {18104#true} is VALID [2018-11-23 10:30:32,592 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {18104#true} {18104#true} #95#return; {18104#true} is VALID [2018-11-23 10:30:32,592 INFO L256 TraceCheckUtils]: 4: Hoare triple {18104#true} call #t~ret7 := main(); {18104#true} is VALID [2018-11-23 10:30:32,592 INFO L273 TraceCheckUtils]: 5: Hoare triple {18104#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {18104#true} is VALID [2018-11-23 10:30:32,593 INFO L273 TraceCheckUtils]: 6: Hoare triple {18104#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {18127#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:32,593 INFO L273 TraceCheckUtils]: 7: Hoare triple {18127#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {18127#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:32,594 INFO L273 TraceCheckUtils]: 8: Hoare triple {18127#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {18127#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:30:32,594 INFO L273 TraceCheckUtils]: 9: Hoare triple {18127#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {18137#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:30:32,595 INFO L273 TraceCheckUtils]: 10: Hoare triple {18137#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {18141#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:30:32,596 INFO L273 TraceCheckUtils]: 11: Hoare triple {18141#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {18141#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:30:32,596 INFO L273 TraceCheckUtils]: 12: Hoare triple {18141#(and (bvsge (_ bv5 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {18148#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:30:32,600 INFO L273 TraceCheckUtils]: 13: Hoare triple {18148#(and (bvsge (_ bv3 32) main_~MINVAL~0) (= (_ bv1 32) main_~CCCELVOL1~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {18105#false} is VALID [2018-11-23 10:30:32,600 INFO L273 TraceCheckUtils]: 14: Hoare triple {18105#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {18105#false} is VALID [2018-11-23 10:30:32,601 INFO L273 TraceCheckUtils]: 15: Hoare triple {18105#false} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {18105#false} is VALID [2018-11-23 10:30:32,601 INFO L273 TraceCheckUtils]: 16: Hoare triple {18105#false} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {18105#false} is VALID [2018-11-23 10:30:32,601 INFO L273 TraceCheckUtils]: 17: Hoare triple {18105#false} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {18105#false} is VALID [2018-11-23 10:30:32,601 INFO L273 TraceCheckUtils]: 18: Hoare triple {18105#false} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {18105#false} is VALID [2018-11-23 10:30:32,602 INFO L273 TraceCheckUtils]: 19: Hoare triple {18105#false} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {18105#false} is VALID [2018-11-23 10:30:32,602 INFO L273 TraceCheckUtils]: 20: Hoare triple {18105#false} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {18105#false} is VALID [2018-11-23 10:30:32,602 INFO L273 TraceCheckUtils]: 21: Hoare triple {18105#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {18105#false} is VALID [2018-11-23 10:30:32,602 INFO L273 TraceCheckUtils]: 22: Hoare triple {18105#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {18105#false} is VALID [2018-11-23 10:30:32,602 INFO L273 TraceCheckUtils]: 23: Hoare triple {18105#false} ~i~0 := 0bv32; {18105#false} is VALID [2018-11-23 10:30:32,603 INFO L273 TraceCheckUtils]: 24: Hoare triple {18105#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {18105#false} is VALID [2018-11-23 10:30:32,603 INFO L273 TraceCheckUtils]: 25: Hoare triple {18105#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {18105#false} is VALID [2018-11-23 10:30:32,603 INFO L256 TraceCheckUtils]: 26: Hoare triple {18105#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {18105#false} is VALID [2018-11-23 10:30:32,603 INFO L273 TraceCheckUtils]: 27: Hoare triple {18105#false} ~cond := #in~cond; {18105#false} is VALID [2018-11-23 10:30:32,603 INFO L273 TraceCheckUtils]: 28: Hoare triple {18105#false} assume 0bv32 == ~cond; {18105#false} is VALID [2018-11-23 10:30:32,603 INFO L273 TraceCheckUtils]: 29: Hoare triple {18105#false} assume !false; {18105#false} is VALID [2018-11-23 10:30:32,604 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:30:32,604 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:30:32,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:30:32,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 10:30:32,607 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-11-23 10:30:32,607 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:32,607 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:30:32,708 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:32,708 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:30:32,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:30:32,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:30:32,709 INFO L87 Difference]: Start difference. First operand 326 states and 459 transitions. Second operand 6 states. [2018-11-23 10:30:34,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:34,669 INFO L93 Difference]: Finished difference Result 441 states and 613 transitions. [2018-11-23 10:30:34,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:30:34,669 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-11-23 10:30:34,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:34,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:30:34,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 114 transitions. [2018-11-23 10:30:34,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:30:34,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 114 transitions. [2018-11-23 10:30:34,672 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 114 transitions. [2018-11-23 10:30:35,038 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:35,043 INFO L225 Difference]: With dead ends: 441 [2018-11-23 10:30:35,044 INFO L226 Difference]: Without dead ends: 226 [2018-11-23 10:30:35,044 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 10:30:35,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-11-23 10:30:35,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 173. [2018-11-23 10:30:35,452 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:30:35,452 INFO L82 GeneralOperation]: Start isEquivalent. First operand 226 states. Second operand 173 states. [2018-11-23 10:30:35,452 INFO L74 IsIncluded]: Start isIncluded. First operand 226 states. Second operand 173 states. [2018-11-23 10:30:35,452 INFO L87 Difference]: Start difference. First operand 226 states. Second operand 173 states. [2018-11-23 10:30:35,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:35,459 INFO L93 Difference]: Finished difference Result 226 states and 296 transitions. [2018-11-23 10:30:35,459 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 296 transitions. [2018-11-23 10:30:35,459 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:35,460 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:35,460 INFO L74 IsIncluded]: Start isIncluded. First operand 173 states. Second operand 226 states. [2018-11-23 10:30:35,460 INFO L87 Difference]: Start difference. First operand 173 states. Second operand 226 states. [2018-11-23 10:30:35,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:35,465 INFO L93 Difference]: Finished difference Result 226 states and 296 transitions. [2018-11-23 10:30:35,466 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 296 transitions. [2018-11-23 10:30:35,466 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:30:35,466 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:30:35,467 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:30:35,467 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:30:35,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-11-23 10:30:35,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 226 transitions. [2018-11-23 10:30:35,470 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 226 transitions. Word has length 30 [2018-11-23 10:30:35,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:30:35,471 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 226 transitions. [2018-11-23 10:30:35,471 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:30:35,471 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 226 transitions. [2018-11-23 10:30:35,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:30:35,472 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:30:35,472 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:30:35,472 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:30:35,472 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:30:35,473 INFO L82 PathProgramCache]: Analyzing trace with hash 290616554, now seen corresponding path program 1 times [2018-11-23 10:30:35,473 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:30:35,473 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:30:35,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:30:35,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:35,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:30:35,755 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:30:35,910 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:30:35,917 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:30:35,920 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:35,926 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:35,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:35,952 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-11-23 10:30:36,041 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:30:36,055 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:36,060 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:30:36,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,084 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:29 [2018-11-23 10:30:36,127 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:30:36,128 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_46|, main_~CCCELVOL3~0]. (let ((.cse0 (select |v_#memory_int_46| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (store |v_#memory_int_46| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32)) main_~CCCELVOL3~0)) |#memory_int|) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv0 32) (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32))) (_ bv4294967291 32))) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:30:36,128 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:30:36,159 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:30:36,172 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:36,176 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:30:36,181 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,195 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,259 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,260 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:29 [2018-11-23 10:30:36,273 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:30:36,274 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_47|, main_~CCCELVOL2~0]. (let ((.cse0 (select |v_#memory_int_47| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (store |v_#memory_int_47| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0)) |#memory_int|) (= (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:30:36,274 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:30:36,291 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-23 10:30:36,298 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:36,300 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:30:36,302 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 39 [2018-11-23 10:30:36,305 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,317 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:30:36,338 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-11-23 10:30:36,619 INFO L256 TraceCheckUtils]: 0: Hoare triple {19394#true} call ULTIMATE.init(); {19394#true} is VALID [2018-11-23 10:30:36,619 INFO L273 TraceCheckUtils]: 1: Hoare triple {19394#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {19394#true} is VALID [2018-11-23 10:30:36,619 INFO L273 TraceCheckUtils]: 2: Hoare triple {19394#true} assume true; {19394#true} is VALID [2018-11-23 10:30:36,620 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {19394#true} {19394#true} #95#return; {19394#true} is VALID [2018-11-23 10:30:36,620 INFO L256 TraceCheckUtils]: 4: Hoare triple {19394#true} call #t~ret7 := main(); {19394#true} is VALID [2018-11-23 10:30:36,620 INFO L273 TraceCheckUtils]: 5: Hoare triple {19394#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {19394#true} is VALID [2018-11-23 10:30:36,621 INFO L273 TraceCheckUtils]: 6: Hoare triple {19394#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {19417#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:30:36,622 INFO L273 TraceCheckUtils]: 7: Hoare triple {19417#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {19421#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:36,622 INFO L273 TraceCheckUtils]: 8: Hoare triple {19421#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {19421#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:36,623 INFO L273 TraceCheckUtils]: 9: Hoare triple {19421#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {19428#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:36,627 INFO L273 TraceCheckUtils]: 10: Hoare triple {19428#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {19432#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:36,633 INFO L273 TraceCheckUtils]: 11: Hoare triple {19432#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {19432#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:36,636 INFO L273 TraceCheckUtils]: 12: Hoare triple {19432#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {19432#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:36,640 INFO L273 TraceCheckUtils]: 13: Hoare triple {19432#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv1 32) main_~CCCELVOL1~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {19442#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,642 INFO L273 TraceCheckUtils]: 14: Hoare triple {19442#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {19442#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,643 INFO L273 TraceCheckUtils]: 15: Hoare triple {19442#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {19442#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,644 INFO L273 TraceCheckUtils]: 16: Hoare triple {19442#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,646 INFO L273 TraceCheckUtils]: 17: Hoare triple {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,647 INFO L273 TraceCheckUtils]: 18: Hoare triple {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} assume #t~short6; {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,650 INFO L256 TraceCheckUtils]: 19: Hoare triple {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:30:36,651 INFO L273 TraceCheckUtils]: 20: Hoare triple {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} ~cond := #in~cond; {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:30:36,651 INFO L273 TraceCheckUtils]: 21: Hoare triple {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:30:36,652 INFO L273 TraceCheckUtils]: 22: Hoare triple {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} assume true; {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:30:36,653 INFO L268 TraceCheckUtils]: 23: Hoare quadruple {19462#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv16 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967291 32)) (_ bv0 32))))} {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} #99#return; {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,654 INFO L273 TraceCheckUtils]: 24: Hoare triple {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:30:36,654 INFO L273 TraceCheckUtils]: 25: Hoare triple {19452#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {19481#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:30:36,664 INFO L273 TraceCheckUtils]: 26: Hoare triple {19481#(and (not (bvsge (_ bv1 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967291 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (bvsge (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {19485#|main_#t~short6|} is VALID [2018-11-23 10:30:36,665 INFO L273 TraceCheckUtils]: 27: Hoare triple {19485#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {19395#false} is VALID [2018-11-23 10:30:36,665 INFO L256 TraceCheckUtils]: 28: Hoare triple {19395#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {19395#false} is VALID [2018-11-23 10:30:36,665 INFO L273 TraceCheckUtils]: 29: Hoare triple {19395#false} ~cond := #in~cond; {19395#false} is VALID [2018-11-23 10:30:36,665 INFO L273 TraceCheckUtils]: 30: Hoare triple {19395#false} assume 0bv32 == ~cond; {19395#false} is VALID [2018-11-23 10:30:36,666 INFO L273 TraceCheckUtils]: 31: Hoare triple {19395#false} assume !false; {19395#false} is VALID [2018-11-23 10:30:36,671 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:36,671 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:30:37,275 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 39 [2018-11-23 10:30:37,285 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 43 [2018-11-23 10:30:37,298 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,305 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 59 [2018-11-23 10:30:37,319 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,320 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,320 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,337 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 88 [2018-11-23 10:30:37,467 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,468 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,478 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,540 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 88 [2018-11-23 10:30:37,551 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 8 xjuncts. [2018-11-23 10:30:37,562 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,563 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,563 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:30:37,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 46 [2018-11-23 10:30:37,579 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-23 10:30:37,772 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 9 xjuncts. [2018-11-23 10:30:37,943 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 6 xjuncts. [2018-11-23 10:30:38,090 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 6 xjuncts. [2018-11-23 10:30:38,222 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 6 xjuncts. [2018-11-23 10:30:38,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 6 xjuncts. [2018-11-23 10:30:38,380 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:45, output treesize:192 [2018-11-23 10:30:38,411 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:30:38,411 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~CCCELVOL3~0, main_~CCCELVOL2~0]. (or (bvsge (select (let ((.cse0 (bvmul (_ bv20 32) main_~i~0))) (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967280 32)) main_~CCCELVOL4~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32)) (_ bv0 32))) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) [2018-11-23 10:30:38,411 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_20, main_~CCCELVOL3~0, v_prenex_7, main_~CCCELVOL2~0]. (let ((.cse6 (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (.cse7 (bvmul (_ bv20 32) main_~i~0))) (let ((.cse3 (bvsge (_ bv0 32) main_~MINVAL~0)) (.cse1 (= .cse6 (bvadd |main_~#volArray~0.offset| .cse7 (_ bv4294967280 32)))) (.cse5 (= (_ bv8 32) .cse7)) (.cse0 (bvsge main_~CCCELVOL1~0 main_~MINVAL~0)) (.cse2 (= .cse6 (bvadd |main_~#volArray~0.offset| .cse7 (_ bv4294967284 32)))) (.cse4 (= .cse6 (bvadd |main_~#volArray~0.offset| .cse7 (_ bv4294967288 32))))) (and (or .cse0 .cse1 (bvsge v_arrayElimCell_20 main_~MINVAL~0) .cse2 .cse3 .cse4) (or .cse5 .cse1 .cse0 (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) .cse4) (or (not .cse5) .cse0 .cse3) (or .cse5 .cse0 .cse1 (bvsge v_prenex_7 main_~MINVAL~0) .cse2 .cse4) (or .cse5 .cse0 .cse1 .cse2 (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (or .cse5 .cse0 (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) .cse2 .cse4)))) [2018-11-23 10:30:38,682 WARN L180 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 18 [2018-11-23 10:30:38,997 INFO L273 TraceCheckUtils]: 31: Hoare triple {19395#false} assume !false; {19395#false} is VALID [2018-11-23 10:30:38,997 INFO L273 TraceCheckUtils]: 30: Hoare triple {19395#false} assume 0bv32 == ~cond; {19395#false} is VALID [2018-11-23 10:30:38,997 INFO L273 TraceCheckUtils]: 29: Hoare triple {19395#false} ~cond := #in~cond; {19395#false} is VALID [2018-11-23 10:30:38,998 INFO L256 TraceCheckUtils]: 28: Hoare triple {19395#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {19395#false} is VALID [2018-11-23 10:30:38,998 INFO L273 TraceCheckUtils]: 27: Hoare triple {19485#|main_#t~short6|} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {19395#false} is VALID [2018-11-23 10:30:38,998 INFO L273 TraceCheckUtils]: 26: Hoare triple {19516#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {19485#|main_#t~short6|} is VALID [2018-11-23 10:30:41,003 INFO L273 TraceCheckUtils]: 25: Hoare triple {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {19516#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:30:41,003 INFO L273 TraceCheckUtils]: 24: Hoare triple {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,004 INFO L268 TraceCheckUtils]: 23: Hoare quadruple {19394#true} {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #99#return; {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,004 INFO L273 TraceCheckUtils]: 22: Hoare triple {19394#true} assume true; {19394#true} is VALID [2018-11-23 10:30:41,004 INFO L273 TraceCheckUtils]: 21: Hoare triple {19394#true} assume !(0bv32 == ~cond); {19394#true} is VALID [2018-11-23 10:30:41,005 INFO L273 TraceCheckUtils]: 20: Hoare triple {19394#true} ~cond := #in~cond; {19394#true} is VALID [2018-11-23 10:30:41,005 INFO L256 TraceCheckUtils]: 19: Hoare triple {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {19394#true} is VALID [2018-11-23 10:30:41,005 INFO L273 TraceCheckUtils]: 18: Hoare triple {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short6; {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,005 INFO L273 TraceCheckUtils]: 17: Hoare triple {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,006 INFO L273 TraceCheckUtils]: 16: Hoare triple {19548#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {19520#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,006 INFO L273 TraceCheckUtils]: 15: Hoare triple {19548#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {19548#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,007 INFO L273 TraceCheckUtils]: 14: Hoare triple {19548#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {19548#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,054 INFO L273 TraceCheckUtils]: 13: Hoare triple {19558#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {19548#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:30:41,103 INFO L273 TraceCheckUtils]: 12: Hoare triple {19562#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {19558#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:30:41,159 INFO L273 TraceCheckUtils]: 11: Hoare triple {19566#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {19562#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)))} is VALID [2018-11-23 10:30:41,185 INFO L273 TraceCheckUtils]: 10: Hoare triple {19570#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (not (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0))) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (_ bv0 32) main_~MINVAL~0)) (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {19566#(or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (forall ((main_~CCCELVOL2~0 (_ BitVec 32)) (main_~CCCELVOL3~0 (_ BitVec 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)))} is VALID [2018-11-23 10:30:41,282 INFO L273 TraceCheckUtils]: 9: Hoare triple {19574#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_9 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 v_prenex_9) (not (bvsge main_~CCCELVOL5~0 v_prenex_9)))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_8 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_8)) (bvsge main_~CCCELVOL1~0 v_prenex_8) (bvsge main_~CCCELVOL4~0 v_prenex_8)))) (or (not (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (_ bv0 32) main_~MINVAL~0) (not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))))))} assume ~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL5~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {19570#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (not (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0))) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (_ bv0 32) main_~MINVAL~0)) (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0)))} is VALID [2018-11-23 10:30:41,283 INFO L273 TraceCheckUtils]: 8: Hoare triple {19574#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_9 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 v_prenex_9) (not (bvsge main_~CCCELVOL5~0 v_prenex_9)))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_8 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_8)) (bvsge main_~CCCELVOL1~0 v_prenex_8) (bvsge main_~CCCELVOL4~0 v_prenex_8)))) (or (not (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (_ bv0 32) main_~MINVAL~0) (not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {19574#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_9 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 v_prenex_9) (not (bvsge main_~CCCELVOL5~0 v_prenex_9)))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_8 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_8)) (bvsge main_~CCCELVOL1~0 v_prenex_8) (bvsge main_~CCCELVOL4~0 v_prenex_8)))) (or (not (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (_ bv0 32) main_~MINVAL~0) (not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))))))} is VALID [2018-11-23 10:30:41,284 INFO L273 TraceCheckUtils]: 7: Hoare triple {19581#(forall ((v_prenex_8 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_8)) (bvsge main_~CCCELVOL1~0 v_prenex_8) (bvsge main_~CCCELVOL4~0 v_prenex_8)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {19574#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_9 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 v_prenex_9) (not (bvsge main_~CCCELVOL5~0 v_prenex_9)))) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0))) (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((v_prenex_8 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_8)) (bvsge main_~CCCELVOL1~0 v_prenex_8) (bvsge main_~CCCELVOL4~0 v_prenex_8)))) (or (not (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL1~0 main_~MINVAL~0) (bvsge (_ bv0 32) main_~MINVAL~0) (not (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))))))} is VALID [2018-11-23 10:30:41,286 INFO L273 TraceCheckUtils]: 6: Hoare triple {19394#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {19581#(forall ((v_prenex_8 (_ BitVec 32))) (or (not (bvsge main_~CCCELVOL5~0 v_prenex_8)) (bvsge main_~CCCELVOL1~0 v_prenex_8) (bvsge main_~CCCELVOL4~0 v_prenex_8)))} is VALID [2018-11-23 10:30:41,286 INFO L273 TraceCheckUtils]: 5: Hoare triple {19394#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {19394#true} is VALID [2018-11-23 10:30:41,286 INFO L256 TraceCheckUtils]: 4: Hoare triple {19394#true} call #t~ret7 := main(); {19394#true} is VALID [2018-11-23 10:30:41,287 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {19394#true} {19394#true} #95#return; {19394#true} is VALID [2018-11-23 10:30:41,287 INFO L273 TraceCheckUtils]: 2: Hoare triple {19394#true} assume true; {19394#true} is VALID [2018-11-23 10:30:41,287 INFO L273 TraceCheckUtils]: 1: Hoare triple {19394#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {19394#true} is VALID [2018-11-23 10:30:41,287 INFO L256 TraceCheckUtils]: 0: Hoare triple {19394#true} call ULTIMATE.init(); {19394#true} is VALID [2018-11-23 10:30:41,290 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:30:41,292 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:30:41,292 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 20 [2018-11-23 10:30:41,293 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-11-23 10:30:41,293 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:30:41,293 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 10:30:44,055 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 52 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:30:44,055 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 10:30:44,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 10:30:44,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=314, Unknown=0, NotChecked=0, Total=380 [2018-11-23 10:30:44,056 INFO L87 Difference]: Start difference. First operand 173 states and 226 transitions. Second operand 20 states. [2018-11-23 10:30:45,380 WARN L180 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 26 [2018-11-23 10:30:45,917 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 30 [2018-11-23 10:30:47,812 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 51 [2018-11-23 10:30:53,421 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 32 [2018-11-23 10:30:56,134 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 28 [2018-11-23 10:30:56,955 WARN L180 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 47 [2018-11-23 10:30:57,190 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2018-11-23 10:30:58,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:30:58,318 INFO L93 Difference]: Finished difference Result 276 states and 352 transitions. [2018-11-23 10:30:58,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-11-23 10:30:58,318 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-11-23 10:30:58,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:30:58,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:30:58,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 192 transitions. [2018-11-23 10:30:58,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:30:58,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 192 transitions. [2018-11-23 10:30:58,324 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 33 states and 192 transitions. [2018-11-23 10:31:04,409 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 192 edges. 190 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:04,414 INFO L225 Difference]: With dead ends: 276 [2018-11-23 10:31:04,414 INFO L226 Difference]: Without dead ends: 260 [2018-11-23 10:31:04,415 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 516 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=505, Invalid=1751, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 10:31:04,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states. [2018-11-23 10:31:04,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 215. [2018-11-23 10:31:04,756 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:31:04,757 INFO L82 GeneralOperation]: Start isEquivalent. First operand 260 states. Second operand 215 states. [2018-11-23 10:31:04,757 INFO L74 IsIncluded]: Start isIncluded. First operand 260 states. Second operand 215 states. [2018-11-23 10:31:04,757 INFO L87 Difference]: Start difference. First operand 260 states. Second operand 215 states. [2018-11-23 10:31:04,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:04,764 INFO L93 Difference]: Finished difference Result 260 states and 333 transitions. [2018-11-23 10:31:04,764 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 333 transitions. [2018-11-23 10:31:04,765 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:04,765 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:04,765 INFO L74 IsIncluded]: Start isIncluded. First operand 215 states. Second operand 260 states. [2018-11-23 10:31:04,765 INFO L87 Difference]: Start difference. First operand 215 states. Second operand 260 states. [2018-11-23 10:31:04,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:04,772 INFO L93 Difference]: Finished difference Result 260 states and 333 transitions. [2018-11-23 10:31:04,773 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 333 transitions. [2018-11-23 10:31:04,773 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:04,773 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:04,774 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:31:04,774 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:31:04,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2018-11-23 10:31:04,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 278 transitions. [2018-11-23 10:31:04,779 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 278 transitions. Word has length 32 [2018-11-23 10:31:04,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:31:04,779 INFO L480 AbstractCegarLoop]: Abstraction has 215 states and 278 transitions. [2018-11-23 10:31:04,779 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 10:31:04,780 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 278 transitions. [2018-11-23 10:31:04,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:31:04,780 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:31:04,780 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:31:04,781 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:31:04,781 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:31:04,781 INFO L82 PathProgramCache]: Analyzing trace with hash -1295967062, now seen corresponding path program 1 times [2018-11-23 10:31:04,781 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:31:04,781 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:31:04,809 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:31:04,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:04,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:04,948 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:31:05,077 INFO L256 TraceCheckUtils]: 0: Hoare triple {20787#true} call ULTIMATE.init(); {20787#true} is VALID [2018-11-23 10:31:05,078 INFO L273 TraceCheckUtils]: 1: Hoare triple {20787#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {20787#true} is VALID [2018-11-23 10:31:05,078 INFO L273 TraceCheckUtils]: 2: Hoare triple {20787#true} assume true; {20787#true} is VALID [2018-11-23 10:31:05,078 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {20787#true} {20787#true} #95#return; {20787#true} is VALID [2018-11-23 10:31:05,078 INFO L256 TraceCheckUtils]: 4: Hoare triple {20787#true} call #t~ret7 := main(); {20787#true} is VALID [2018-11-23 10:31:05,079 INFO L273 TraceCheckUtils]: 5: Hoare triple {20787#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {20787#true} is VALID [2018-11-23 10:31:05,080 INFO L273 TraceCheckUtils]: 6: Hoare triple {20787#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {20810#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:31:05,080 INFO L273 TraceCheckUtils]: 7: Hoare triple {20810#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {20810#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:31:05,081 INFO L273 TraceCheckUtils]: 8: Hoare triple {20810#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {20810#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} is VALID [2018-11-23 10:31:05,081 INFO L273 TraceCheckUtils]: 9: Hoare triple {20810#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {20820#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:31:05,084 INFO L273 TraceCheckUtils]: 10: Hoare triple {20820#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv5 32) main_~CCCELVOL4~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)))} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {20824#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (not (bvsge (_ bv5 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:31:05,085 INFO L273 TraceCheckUtils]: 11: Hoare triple {20824#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv3 32) main_~CCCELVOL2~0) (not (bvsge (_ bv5 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {20828#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (not (bvsge (_ bv5 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:31:05,087 INFO L273 TraceCheckUtils]: 12: Hoare triple {20828#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv3 32) main_~CCCELVOL2~0) (not (bvsge (_ bv5 32) main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {20788#false} is VALID [2018-11-23 10:31:05,087 INFO L273 TraceCheckUtils]: 13: Hoare triple {20788#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {20788#false} is VALID [2018-11-23 10:31:05,088 INFO L273 TraceCheckUtils]: 14: Hoare triple {20788#false} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {20788#false} is VALID [2018-11-23 10:31:05,088 INFO L273 TraceCheckUtils]: 15: Hoare triple {20788#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {20788#false} is VALID [2018-11-23 10:31:05,088 INFO L273 TraceCheckUtils]: 16: Hoare triple {20788#false} ~i~0 := 0bv32; {20788#false} is VALID [2018-11-23 10:31:05,088 INFO L273 TraceCheckUtils]: 17: Hoare triple {20788#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {20788#false} is VALID [2018-11-23 10:31:05,088 INFO L273 TraceCheckUtils]: 18: Hoare triple {20788#false} assume #t~short6; {20788#false} is VALID [2018-11-23 10:31:05,088 INFO L256 TraceCheckUtils]: 19: Hoare triple {20788#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {20788#false} is VALID [2018-11-23 10:31:05,088 INFO L273 TraceCheckUtils]: 20: Hoare triple {20788#false} ~cond := #in~cond; {20788#false} is VALID [2018-11-23 10:31:05,089 INFO L273 TraceCheckUtils]: 21: Hoare triple {20788#false} assume !(0bv32 == ~cond); {20788#false} is VALID [2018-11-23 10:31:05,089 INFO L273 TraceCheckUtils]: 22: Hoare triple {20788#false} assume true; {20788#false} is VALID [2018-11-23 10:31:05,089 INFO L268 TraceCheckUtils]: 23: Hoare quadruple {20788#false} {20788#false} #99#return; {20788#false} is VALID [2018-11-23 10:31:05,089 INFO L273 TraceCheckUtils]: 24: Hoare triple {20788#false} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {20788#false} is VALID [2018-11-23 10:31:05,089 INFO L273 TraceCheckUtils]: 25: Hoare triple {20788#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {20788#false} is VALID [2018-11-23 10:31:05,090 INFO L273 TraceCheckUtils]: 26: Hoare triple {20788#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {20788#false} is VALID [2018-11-23 10:31:05,090 INFO L273 TraceCheckUtils]: 27: Hoare triple {20788#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {20788#false} is VALID [2018-11-23 10:31:05,090 INFO L256 TraceCheckUtils]: 28: Hoare triple {20788#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {20788#false} is VALID [2018-11-23 10:31:05,090 INFO L273 TraceCheckUtils]: 29: Hoare triple {20788#false} ~cond := #in~cond; {20788#false} is VALID [2018-11-23 10:31:05,090 INFO L273 TraceCheckUtils]: 30: Hoare triple {20788#false} assume 0bv32 == ~cond; {20788#false} is VALID [2018-11-23 10:31:05,091 INFO L273 TraceCheckUtils]: 31: Hoare triple {20788#false} assume !false; {20788#false} is VALID [2018-11-23 10:31:05,092 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:31:05,092 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:31:05,095 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:31:05,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 10:31:05,096 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-11-23 10:31:05,096 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:31:05,096 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:31:05,183 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:05,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:31:05,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:31:05,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:31:05,184 INFO L87 Difference]: Start difference. First operand 215 states and 278 transitions. Second operand 6 states. [2018-11-23 10:31:07,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:07,730 INFO L93 Difference]: Finished difference Result 308 states and 395 transitions. [2018-11-23 10:31:07,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:31:07,730 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-11-23 10:31:07,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:31:07,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:31:07,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 110 transitions. [2018-11-23 10:31:07,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:31:07,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 110 transitions. [2018-11-23 10:31:07,733 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 110 transitions. [2018-11-23 10:31:08,097 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:08,101 INFO L225 Difference]: With dead ends: 308 [2018-11-23 10:31:08,101 INFO L226 Difference]: Without dead ends: 217 [2018-11-23 10:31:08,101 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 10:31:08,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-11-23 10:31:08,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 177. [2018-11-23 10:31:08,419 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:31:08,419 INFO L82 GeneralOperation]: Start isEquivalent. First operand 217 states. Second operand 177 states. [2018-11-23 10:31:08,419 INFO L74 IsIncluded]: Start isIncluded. First operand 217 states. Second operand 177 states. [2018-11-23 10:31:08,419 INFO L87 Difference]: Start difference. First operand 217 states. Second operand 177 states. [2018-11-23 10:31:08,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:08,425 INFO L93 Difference]: Finished difference Result 217 states and 269 transitions. [2018-11-23 10:31:08,425 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 269 transitions. [2018-11-23 10:31:08,426 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:08,426 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:08,426 INFO L74 IsIncluded]: Start isIncluded. First operand 177 states. Second operand 217 states. [2018-11-23 10:31:08,426 INFO L87 Difference]: Start difference. First operand 177 states. Second operand 217 states. [2018-11-23 10:31:08,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:08,431 INFO L93 Difference]: Finished difference Result 217 states and 269 transitions. [2018-11-23 10:31:08,431 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 269 transitions. [2018-11-23 10:31:08,432 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:08,432 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:08,432 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:31:08,432 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:31:08,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-11-23 10:31:08,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 215 transitions. [2018-11-23 10:31:08,436 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 215 transitions. Word has length 32 [2018-11-23 10:31:08,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:31:08,436 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 215 transitions. [2018-11-23 10:31:08,436 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:31:08,437 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 215 transitions. [2018-11-23 10:31:08,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:31:08,437 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:31:08,437 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:31:08,438 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:31:08,438 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:31:08,438 INFO L82 PathProgramCache]: Analyzing trace with hash -2113615512, now seen corresponding path program 1 times [2018-11-23 10:31:08,438 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:31:08,439 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:31:08,465 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:31:08,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:08,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:08,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:31:08,785 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:31:08,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:31:08,793 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:08,798 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:08,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:08,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-11-23 10:31:08,886 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:31:08,894 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:08,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:31:08,899 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:08,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:08,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:08,945 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:48, output treesize:40 [2018-11-23 10:31:09,032 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 34 [2018-11-23 10:31:09,043 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,044 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,046 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,050 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,051 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 92 [2018-11-23 10:31:09,054 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,110 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,110 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-11-23 10:31:09,234 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 44 [2018-11-23 10:31:09,255 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,261 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,265 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,268 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,271 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,274 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,278 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,280 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 155 [2018-11-23 10:31:09,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,326 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,377 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,377 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:68, output treesize:64 [2018-11-23 10:31:09,548 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-11-23 10:31:09,572 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,576 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,579 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,581 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,585 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,591 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,595 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,598 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,603 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,605 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,609 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:09,610 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 11 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 132 [2018-11-23 10:31:09,614 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,654 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,686 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:09,686 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-11-23 10:31:09,905 INFO L256 TraceCheckUtils]: 0: Hoare triple {21935#true} call ULTIMATE.init(); {21935#true} is VALID [2018-11-23 10:31:09,906 INFO L273 TraceCheckUtils]: 1: Hoare triple {21935#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {21935#true} is VALID [2018-11-23 10:31:09,906 INFO L273 TraceCheckUtils]: 2: Hoare triple {21935#true} assume true; {21935#true} is VALID [2018-11-23 10:31:09,906 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {21935#true} {21935#true} #95#return; {21935#true} is VALID [2018-11-23 10:31:09,906 INFO L256 TraceCheckUtils]: 4: Hoare triple {21935#true} call #t~ret7 := main(); {21935#true} is VALID [2018-11-23 10:31:09,907 INFO L273 TraceCheckUtils]: 5: Hoare triple {21935#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {21935#true} is VALID [2018-11-23 10:31:09,908 INFO L273 TraceCheckUtils]: 6: Hoare triple {21935#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {21958#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:31:09,908 INFO L273 TraceCheckUtils]: 7: Hoare triple {21958#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {21962#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,909 INFO L273 TraceCheckUtils]: 8: Hoare triple {21962#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {21962#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,910 INFO L273 TraceCheckUtils]: 9: Hoare triple {21962#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (= (_ bv2 32) main_~CCCELVOL5~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {21969#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,914 INFO L273 TraceCheckUtils]: 10: Hoare triple {21969#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= (_ bv7 32) main_~CCCELVOL3~0) (= (_ bv5 32) main_~CCCELVOL4~0) (not (bvsge (_ bv2 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {21973#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= (_ bv7 32) main_~CCCELVOL3~0) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,919 INFO L273 TraceCheckUtils]: 11: Hoare triple {21973#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (= (_ bv7 32) main_~CCCELVOL3~0) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {21977#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,924 INFO L273 TraceCheckUtils]: 12: Hoare triple {21977#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {21981#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,932 INFO L273 TraceCheckUtils]: 13: Hoare triple {21981#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967276 32))) (_ bv0 32)) (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)))) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {21985#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,934 INFO L273 TraceCheckUtils]: 14: Hoare triple {21985#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {21985#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,950 INFO L273 TraceCheckUtils]: 15: Hoare triple {21985#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {21985#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,951 INFO L273 TraceCheckUtils]: 16: Hoare triple {21985#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} ~i~0 := 0bv32; {21995#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:09,953 INFO L273 TraceCheckUtils]: 17: Hoare triple {21995#(and (bvsge (_ bv7 32) main_~MINVAL~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (not (bvsge (_ bv5 32) main_~MINVAL~0)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {21999#(not |main_#t~short6|)} is VALID [2018-11-23 10:31:09,953 INFO L273 TraceCheckUtils]: 18: Hoare triple {21999#(not |main_#t~short6|)} assume #t~short6; {21936#false} is VALID [2018-11-23 10:31:09,954 INFO L256 TraceCheckUtils]: 19: Hoare triple {21936#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {21936#false} is VALID [2018-11-23 10:31:09,954 INFO L273 TraceCheckUtils]: 20: Hoare triple {21936#false} ~cond := #in~cond; {21936#false} is VALID [2018-11-23 10:31:09,954 INFO L273 TraceCheckUtils]: 21: Hoare triple {21936#false} assume !(0bv32 == ~cond); {21936#false} is VALID [2018-11-23 10:31:09,954 INFO L273 TraceCheckUtils]: 22: Hoare triple {21936#false} assume true; {21936#false} is VALID [2018-11-23 10:31:09,954 INFO L268 TraceCheckUtils]: 23: Hoare quadruple {21936#false} {21936#false} #99#return; {21936#false} is VALID [2018-11-23 10:31:09,954 INFO L273 TraceCheckUtils]: 24: Hoare triple {21936#false} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {21936#false} is VALID [2018-11-23 10:31:09,955 INFO L273 TraceCheckUtils]: 25: Hoare triple {21936#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {21936#false} is VALID [2018-11-23 10:31:09,955 INFO L273 TraceCheckUtils]: 26: Hoare triple {21936#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {21936#false} is VALID [2018-11-23 10:31:09,955 INFO L273 TraceCheckUtils]: 27: Hoare triple {21936#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {21936#false} is VALID [2018-11-23 10:31:09,955 INFO L256 TraceCheckUtils]: 28: Hoare triple {21936#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {21936#false} is VALID [2018-11-23 10:31:09,956 INFO L273 TraceCheckUtils]: 29: Hoare triple {21936#false} ~cond := #in~cond; {21936#false} is VALID [2018-11-23 10:31:09,956 INFO L273 TraceCheckUtils]: 30: Hoare triple {21936#false} assume 0bv32 == ~cond; {21936#false} is VALID [2018-11-23 10:31:09,956 INFO L273 TraceCheckUtils]: 31: Hoare triple {21936#false} assume !false; {21936#false} is VALID [2018-11-23 10:31:09,960 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 10:31:09,960 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:31:10,648 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-11-23 10:31:10,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 50 [2018-11-23 10:31:10,679 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,680 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 66 [2018-11-23 10:31:10,692 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,692 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,693 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 95 [2018-11-23 10:31:10,717 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,718 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,718 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,719 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,719 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,720 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,734 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 137 [2018-11-23 10:31:10,864 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,868 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,868 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,873 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,874 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,884 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:10,946 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 56 treesize of output 140 [2018-11-23 10:31:10,957 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-11-23 10:31:11,045 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:11,059 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:11,068 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:11,082 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:11,093 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:11,106 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:11,174 INFO L303 Elim1Store]: Index analysis took 156 ms [2018-11-23 10:31:11,175 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 89 [2018-11-23 10:31:11,201 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:11,542 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:11,580 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:11,618 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:11,646 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:11,675 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:11,725 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:31:11,726 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 3 variables, input treesize:59, output treesize:56 [2018-11-23 10:31:12,018 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:31:12,019 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~MINVAL~0]. (or (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (not (bvsge (select (let ((.cse0 (bvmul (_ bv20 32) main_~i~0))) (store (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967276 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967280 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32)) (_ bv0 32))) |main_~#volArray~0.offset|) main_~MINVAL~0)) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL5~0 main_~MINVAL~0)) [2018-11-23 10:31:12,019 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [main_~MINVAL~0, v_prenex_10]. (and (or (bvsge main_~CCCELVOL4~0 v_prenex_10) (bvsge main_~CCCELVOL5~0 v_prenex_10) (not (bvsge main_~CCCELVOL3~0 v_prenex_10)) (not (bvsge (_ bv0 32) v_prenex_10))) (let ((.cse0 (bvmul (_ bv20 32) main_~i~0))) (or (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967276 32))) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967280 32))) (bvsge main_~CCCELVOL5~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (= (_ bv4 32) .cse0) (= |main_~#volArray~0.offset| (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)))))) [2018-11-23 10:31:12,736 INFO L273 TraceCheckUtils]: 31: Hoare triple {21936#false} assume !false; {21936#false} is VALID [2018-11-23 10:31:12,736 INFO L273 TraceCheckUtils]: 30: Hoare triple {21936#false} assume 0bv32 == ~cond; {21936#false} is VALID [2018-11-23 10:31:12,736 INFO L273 TraceCheckUtils]: 29: Hoare triple {21936#false} ~cond := #in~cond; {21936#false} is VALID [2018-11-23 10:31:12,736 INFO L256 TraceCheckUtils]: 28: Hoare triple {21936#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {21936#false} is VALID [2018-11-23 10:31:12,737 INFO L273 TraceCheckUtils]: 27: Hoare triple {21936#false} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {21936#false} is VALID [2018-11-23 10:31:12,737 INFO L273 TraceCheckUtils]: 26: Hoare triple {21936#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {21936#false} is VALID [2018-11-23 10:31:12,737 INFO L273 TraceCheckUtils]: 25: Hoare triple {21936#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {21936#false} is VALID [2018-11-23 10:31:12,737 INFO L273 TraceCheckUtils]: 24: Hoare triple {21936#false} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {21936#false} is VALID [2018-11-23 10:31:12,737 INFO L268 TraceCheckUtils]: 23: Hoare quadruple {21935#true} {21936#false} #99#return; {21936#false} is VALID [2018-11-23 10:31:12,737 INFO L273 TraceCheckUtils]: 22: Hoare triple {21935#true} assume true; {21935#true} is VALID [2018-11-23 10:31:12,737 INFO L273 TraceCheckUtils]: 21: Hoare triple {21935#true} assume !(0bv32 == ~cond); {21935#true} is VALID [2018-11-23 10:31:12,737 INFO L273 TraceCheckUtils]: 20: Hoare triple {21935#true} ~cond := #in~cond; {21935#true} is VALID [2018-11-23 10:31:12,738 INFO L256 TraceCheckUtils]: 19: Hoare triple {21936#false} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {21935#true} is VALID [2018-11-23 10:31:12,738 INFO L273 TraceCheckUtils]: 18: Hoare triple {21999#(not |main_#t~short6|)} assume #t~short6; {21936#false} is VALID [2018-11-23 10:31:12,739 INFO L273 TraceCheckUtils]: 17: Hoare triple {22084#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {21999#(not |main_#t~short6|)} is VALID [2018-11-23 10:31:12,739 INFO L273 TraceCheckUtils]: 16: Hoare triple {22088#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} ~i~0 := 0bv32; {22084#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} is VALID [2018-11-23 10:31:12,739 INFO L273 TraceCheckUtils]: 15: Hoare triple {22088#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {22088#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:31:12,740 INFO L273 TraceCheckUtils]: 14: Hoare triple {22088#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {22088#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:31:12,775 INFO L273 TraceCheckUtils]: 13: Hoare triple {22098#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {22088#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:31:12,814 INFO L273 TraceCheckUtils]: 12: Hoare triple {22102#(not (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {22098#(not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:31:12,850 INFO L273 TraceCheckUtils]: 11: Hoare triple {22106#(or (not (bvsge (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {22102#(not (bvsge (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:31:12,898 INFO L273 TraceCheckUtils]: 10: Hoare triple {22110#(or (not (bvsge (select (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)))} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {22106#(or (not (bvsge (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)))} is VALID [2018-11-23 10:31:12,994 INFO L273 TraceCheckUtils]: 9: Hoare triple {22114#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv16 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((v_prenex_10 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 v_prenex_10) (bvsge main_~CCCELVOL5~0 v_prenex_10) (not (bvsge main_~CCCELVOL3~0 v_prenex_10)) (not (bvsge (_ bv0 32) v_prenex_10)))))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {22110#(or (not (bvsge (select (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)))} is VALID [2018-11-23 10:31:12,995 INFO L273 TraceCheckUtils]: 8: Hoare triple {22114#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv16 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((v_prenex_10 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 v_prenex_10) (bvsge main_~CCCELVOL5~0 v_prenex_10) (not (bvsge main_~CCCELVOL3~0 v_prenex_10)) (not (bvsge (_ bv0 32) v_prenex_10)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {22114#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv16 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((v_prenex_10 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 v_prenex_10) (bvsge main_~CCCELVOL5~0 v_prenex_10) (not (bvsge main_~CCCELVOL3~0 v_prenex_10)) (not (bvsge (_ bv0 32) v_prenex_10)))))} is VALID [2018-11-23 10:31:12,996 INFO L273 TraceCheckUtils]: 7: Hoare triple {22121#(forall ((v_prenex_10 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 v_prenex_10) (bvsge main_~CCCELVOL5~0 v_prenex_10) (not (bvsge main_~CCCELVOL3~0 v_prenex_10)) (not (bvsge (_ bv0 32) v_prenex_10))))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {22114#(and (or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (forall ((main_~MINVAL~0 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 main_~MINVAL~0) (not (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (bvsge main_~CCCELVOL5~0 main_~MINVAL~0))) (= (_ bv4 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv16 32) (bvmul (_ bv20 32) main_~i~0))) (forall ((v_prenex_10 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 v_prenex_10) (bvsge main_~CCCELVOL5~0 v_prenex_10) (not (bvsge main_~CCCELVOL3~0 v_prenex_10)) (not (bvsge (_ bv0 32) v_prenex_10)))))} is VALID [2018-11-23 10:31:12,998 INFO L273 TraceCheckUtils]: 6: Hoare triple {21935#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {22121#(forall ((v_prenex_10 (_ BitVec 32))) (or (bvsge main_~CCCELVOL4~0 v_prenex_10) (bvsge main_~CCCELVOL5~0 v_prenex_10) (not (bvsge main_~CCCELVOL3~0 v_prenex_10)) (not (bvsge (_ bv0 32) v_prenex_10))))} is VALID [2018-11-23 10:31:12,998 INFO L273 TraceCheckUtils]: 5: Hoare triple {21935#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {21935#true} is VALID [2018-11-23 10:31:12,998 INFO L256 TraceCheckUtils]: 4: Hoare triple {21935#true} call #t~ret7 := main(); {21935#true} is VALID [2018-11-23 10:31:12,998 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {21935#true} {21935#true} #95#return; {21935#true} is VALID [2018-11-23 10:31:12,998 INFO L273 TraceCheckUtils]: 2: Hoare triple {21935#true} assume true; {21935#true} is VALID [2018-11-23 10:31:12,998 INFO L273 TraceCheckUtils]: 1: Hoare triple {21935#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {21935#true} is VALID [2018-11-23 10:31:12,999 INFO L256 TraceCheckUtils]: 0: Hoare triple {21935#true} call ULTIMATE.init(); {21935#true} is VALID [2018-11-23 10:31:13,002 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:31:13,004 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:31:13,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-23 10:31:13,004 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 32 [2018-11-23 10:31:13,004 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:31:13,004 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 10:31:14,248 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:14,248 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 10:31:14,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 10:31:14,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=266, Unknown=0, NotChecked=0, Total=342 [2018-11-23 10:31:14,249 INFO L87 Difference]: Start difference. First operand 177 states and 215 transitions. Second operand 19 states. [2018-11-23 10:31:16,800 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 42 [2018-11-23 10:31:17,446 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 46 [2018-11-23 10:31:18,050 WARN L180 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 35 [2018-11-23 10:31:18,342 WARN L180 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 53 [2018-11-23 10:31:20,768 WARN L180 SmtUtils]: Spent 218.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 41 [2018-11-23 10:31:21,775 WARN L180 SmtUtils]: Spent 244.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 43 [2018-11-23 10:31:27,529 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 48 [2018-11-23 10:31:28,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:28,909 INFO L93 Difference]: Finished difference Result 243 states and 299 transitions. [2018-11-23 10:31:28,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-23 10:31:28,909 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 32 [2018-11-23 10:31:28,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:31:28,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:31:28,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 143 transitions. [2018-11-23 10:31:28,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:31:28,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 143 transitions. [2018-11-23 10:31:28,913 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states and 143 transitions. [2018-11-23 10:31:33,031 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 142 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:33,038 INFO L225 Difference]: With dead ends: 243 [2018-11-23 10:31:33,038 INFO L226 Difference]: Without dead ends: 222 [2018-11-23 10:31:33,039 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=357, Invalid=903, Unknown=0, NotChecked=0, Total=1260 [2018-11-23 10:31:33,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-11-23 10:31:33,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 188. [2018-11-23 10:31:33,501 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:31:33,501 INFO L82 GeneralOperation]: Start isEquivalent. First operand 222 states. Second operand 188 states. [2018-11-23 10:31:33,501 INFO L74 IsIncluded]: Start isIncluded. First operand 222 states. Second operand 188 states. [2018-11-23 10:31:33,502 INFO L87 Difference]: Start difference. First operand 222 states. Second operand 188 states. [2018-11-23 10:31:33,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:33,508 INFO L93 Difference]: Finished difference Result 222 states and 272 transitions. [2018-11-23 10:31:33,508 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 272 transitions. [2018-11-23 10:31:33,508 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:33,509 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:33,509 INFO L74 IsIncluded]: Start isIncluded. First operand 188 states. Second operand 222 states. [2018-11-23 10:31:33,509 INFO L87 Difference]: Start difference. First operand 188 states. Second operand 222 states. [2018-11-23 10:31:33,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:31:33,514 INFO L93 Difference]: Finished difference Result 222 states and 272 transitions. [2018-11-23 10:31:33,515 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 272 transitions. [2018-11-23 10:31:33,515 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:31:33,515 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:31:33,516 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:31:33,516 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:31:33,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-11-23 10:31:33,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 226 transitions. [2018-11-23 10:31:33,520 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 226 transitions. Word has length 32 [2018-11-23 10:31:33,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:31:33,520 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 226 transitions. [2018-11-23 10:31:33,520 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 10:31:33,520 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 226 transitions. [2018-11-23 10:31:33,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:31:33,521 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:31:33,521 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:31:33,522 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:31:33,522 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:31:33,522 INFO L82 PathProgramCache]: Analyzing trace with hash 1170234534, now seen corresponding path program 1 times [2018-11-23 10:31:33,522 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:31:33,522 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:31:33,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:31:33,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:33,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:31:33,778 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:31:33,852 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:31:33,858 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:31:33,860 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:33,863 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:33,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:33,881 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-11-23 10:31:33,933 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:31:33,942 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:33,945 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:31:33,949 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:33,959 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:33,985 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:33,985 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:21 [2018-11-23 10:31:33,998 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:31:33,999 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_65|, main_~CCCELVOL3~0]. (let ((.cse0 (select |v_#memory_int_65| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv20 32) main_~i~0))) (and (= (store |v_#memory_int_65| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32)) main_~CCCELVOL3~0)) |#memory_int|) (= (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:31:33,999 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32))) [2018-11-23 10:31:34,014 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:31:34,021 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:34,022 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:31:34,024 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:34,035 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:34,056 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:34,056 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:37, output treesize:33 [2018-11-23 10:31:34,195 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-23 10:31:34,203 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:34,204 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:34,206 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:31:34,207 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-23 10:31:34,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:31:34,232 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:34,250 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:31:34,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-11-23 10:31:34,625 INFO L256 TraceCheckUtils]: 0: Hoare triple {23168#true} call ULTIMATE.init(); {23168#true} is VALID [2018-11-23 10:31:34,625 INFO L273 TraceCheckUtils]: 1: Hoare triple {23168#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {23168#true} is VALID [2018-11-23 10:31:34,626 INFO L273 TraceCheckUtils]: 2: Hoare triple {23168#true} assume true; {23168#true} is VALID [2018-11-23 10:31:34,626 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {23168#true} {23168#true} #95#return; {23168#true} is VALID [2018-11-23 10:31:34,626 INFO L256 TraceCheckUtils]: 4: Hoare triple {23168#true} call #t~ret7 := main(); {23168#true} is VALID [2018-11-23 10:31:34,626 INFO L273 TraceCheckUtils]: 5: Hoare triple {23168#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {23168#true} is VALID [2018-11-23 10:31:34,627 INFO L273 TraceCheckUtils]: 6: Hoare triple {23168#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {23191#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:31:34,628 INFO L273 TraceCheckUtils]: 7: Hoare triple {23191#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {23195#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,628 INFO L273 TraceCheckUtils]: 8: Hoare triple {23195#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {23195#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,629 INFO L273 TraceCheckUtils]: 9: Hoare triple {23195#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {23195#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,632 INFO L273 TraceCheckUtils]: 10: Hoare triple {23195#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {23205#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,634 INFO L273 TraceCheckUtils]: 11: Hoare triple {23205#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {23205#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,637 INFO L273 TraceCheckUtils]: 12: Hoare triple {23205#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {23212#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,642 INFO L273 TraceCheckUtils]: 13: Hoare triple {23212#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {23216#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,642 INFO L273 TraceCheckUtils]: 14: Hoare triple {23216#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {23216#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,643 INFO L273 TraceCheckUtils]: 15: Hoare triple {23216#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {23216#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,643 INFO L273 TraceCheckUtils]: 16: Hoare triple {23216#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} ~i~0 := 0bv32; {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,644 INFO L273 TraceCheckUtils]: 17: Hoare triple {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,645 INFO L273 TraceCheckUtils]: 18: Hoare triple {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,647 INFO L256 TraceCheckUtils]: 19: Hoare triple {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:34,648 INFO L273 TraceCheckUtils]: 20: Hoare triple {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} ~cond := #in~cond; {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:34,648 INFO L273 TraceCheckUtils]: 21: Hoare triple {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} assume !(0bv32 == ~cond); {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:34,649 INFO L273 TraceCheckUtils]: 22: Hoare triple {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} assume true; {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} is VALID [2018-11-23 10:31:34,650 INFO L268 TraceCheckUtils]: 23: Hoare quadruple {23236#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv16 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv4 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv12 32)))))} {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #99#return; {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,651 INFO L273 TraceCheckUtils]: 24: Hoare triple {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,652 INFO L273 TraceCheckUtils]: 25: Hoare triple {23226#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {23255#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,654 INFO L273 TraceCheckUtils]: 26: Hoare triple {23255#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {23255#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:31:34,655 INFO L273 TraceCheckUtils]: 27: Hoare triple {23255#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv16 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {23262#|main_#t~short6|} is VALID [2018-11-23 10:31:34,656 INFO L256 TraceCheckUtils]: 28: Hoare triple {23262#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {23266#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:34,657 INFO L273 TraceCheckUtils]: 29: Hoare triple {23266#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {23270#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:31:34,658 INFO L273 TraceCheckUtils]: 30: Hoare triple {23270#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {23169#false} is VALID [2018-11-23 10:31:34,658 INFO L273 TraceCheckUtils]: 31: Hoare triple {23169#false} assume !false; {23169#false} is VALID [2018-11-23 10:31:34,662 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:31:34,663 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:31:35,135 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 39 [2018-11-23 10:31:35,141 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 43 [2018-11-23 10:31:35,150 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:35,161 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 59 [2018-11-23 10:31:35,173 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:35,174 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:35,174 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:35,182 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 88 [2018-11-23 10:31:35,309 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:35,310 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:35,314 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:31:35,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 78 [2018-11-23 10:31:35,336 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-23 10:31:35,387 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:35,453 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:35,488 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:35,523 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:35,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:31:35,560 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:41, output treesize:63 [2018-11-23 10:31:35,568 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:31:35,568 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|, main_~CCCELVOL3~0]. (= (_ bv0 32) (select (let ((.cse0 (bvmul (_ bv20 32) main_~i~0))) (store (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967280 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967292 32)) (_ bv0 32))) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) [2018-11-23 10:31:35,568 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (let ((.cse2 (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (.cse3 (bvmul (_ bv20 32) main_~i~0))) (let ((.cse0 (= (_ bv8 32) .cse3)) (.cse1 (= .cse2 (bvadd |main_~#volArray~0.offset| .cse3 (_ bv4294967280 32)))) (.cse4 (= .cse2 (bvadd |main_~#volArray~0.offset| .cse3 (_ bv4294967288 32))))) (and (or .cse0 .cse1 (= .cse2 (bvadd |main_~#volArray~0.offset| .cse3 (_ bv4294967284 32))) .cse4) (or .cse0 .cse1 .cse4)))) [2018-11-23 10:31:35,660 INFO L273 TraceCheckUtils]: 31: Hoare triple {23169#false} assume !false; {23169#false} is VALID [2018-11-23 10:31:35,660 INFO L273 TraceCheckUtils]: 30: Hoare triple {23280#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {23169#false} is VALID [2018-11-23 10:31:35,661 INFO L273 TraceCheckUtils]: 29: Hoare triple {23284#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {23280#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:31:35,662 INFO L256 TraceCheckUtils]: 28: Hoare triple {23262#|main_#t~short6|} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {23284#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:31:35,663 INFO L273 TraceCheckUtils]: 27: Hoare triple {23291#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {23262#|main_#t~short6|} is VALID [2018-11-23 10:31:35,663 INFO L273 TraceCheckUtils]: 26: Hoare triple {23291#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {23291#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:31:35,905 INFO L273 TraceCheckUtils]: 25: Hoare triple {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {23291#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:31:35,906 INFO L273 TraceCheckUtils]: 24: Hoare triple {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} havoc #t~mem4;havoc #t~mem5;havoc #t~short6; {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:35,907 INFO L268 TraceCheckUtils]: 23: Hoare quadruple {23168#true} {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #99#return; {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:35,908 INFO L273 TraceCheckUtils]: 22: Hoare triple {23168#true} assume true; {23168#true} is VALID [2018-11-23 10:31:35,908 INFO L273 TraceCheckUtils]: 21: Hoare triple {23168#true} assume !(0bv32 == ~cond); {23168#true} is VALID [2018-11-23 10:31:35,908 INFO L273 TraceCheckUtils]: 20: Hoare triple {23168#true} ~cond := #in~cond; {23168#true} is VALID [2018-11-23 10:31:35,908 INFO L256 TraceCheckUtils]: 19: Hoare triple {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} call __VERIFIER_assert((if #t~short6 then 1bv32 else 0bv32)); {23168#true} is VALID [2018-11-23 10:31:35,909 INFO L273 TraceCheckUtils]: 18: Hoare triple {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !#t~short6;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := 0bv32 == #t~mem5; {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:35,909 INFO L273 TraceCheckUtils]: 17: Hoare triple {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short6 := ~bvsge32(#t~mem4, ~MINVAL~0); {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:35,911 INFO L273 TraceCheckUtils]: 16: Hoare triple {23326#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} ~i~0 := 0bv32; {23298#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:31:35,912 INFO L273 TraceCheckUtils]: 15: Hoare triple {23326#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {23326#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} is VALID [2018-11-23 10:31:35,912 INFO L273 TraceCheckUtils]: 14: Hoare triple {23326#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {23326#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} is VALID [2018-11-23 10:31:35,930 INFO L273 TraceCheckUtils]: 13: Hoare triple {23336#(= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 1bv32))), 4bv32); {23326#(= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32))} is VALID [2018-11-23 10:31:35,944 INFO L273 TraceCheckUtils]: 12: Hoare triple {23340#(= (_ bv0 32) (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 2bv32))), 4bv32); {23336#(= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))))} is VALID [2018-11-23 10:31:35,974 INFO L273 TraceCheckUtils]: 11: Hoare triple {23344#(forall ((main_~CCCELVOL3~0 (_ BitVec 32))) (= (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 3bv32))), 4bv32); {23340#(= (_ bv0 32) (select (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))))} is VALID [2018-11-23 10:31:35,992 INFO L273 TraceCheckUtils]: 10: Hoare triple {23348#(or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv12 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} assume !~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 4bv32))), 4bv32); {23344#(forall ((main_~CCCELVOL3~0 (_ BitVec 32))) (= (select (store (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967288 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv20 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv0 32)))} is VALID [2018-11-23 10:31:35,992 INFO L273 TraceCheckUtils]: 9: Hoare triple {23348#(or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv12 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} assume !~bvsge32(~CCCELVOL5~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(5bv32, ~i~0), 5bv32))), 4bv32); {23348#(or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv12 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} is VALID [2018-11-23 10:31:35,993 INFO L273 TraceCheckUtils]: 8: Hoare triple {23348#(or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv12 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 5bv32)); {23348#(or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv12 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} is VALID [2018-11-23 10:31:35,994 INFO L273 TraceCheckUtils]: 7: Hoare triple {23168#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 5bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 5bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {23348#(or (= (_ bv8 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv12 32) (bvmul (_ bv20 32) main_~i~0)) (= (_ bv20 32) (bvmul (_ bv20 32) main_~i~0)))} is VALID [2018-11-23 10:31:35,994 INFO L273 TraceCheckUtils]: 6: Hoare triple {23168#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);havoc ~MINVAL~0;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL5~0 := 2bv32;~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {23168#true} is VALID [2018-11-23 10:31:35,995 INFO L273 TraceCheckUtils]: 5: Hoare triple {23168#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {23168#true} is VALID [2018-11-23 10:31:35,995 INFO L256 TraceCheckUtils]: 4: Hoare triple {23168#true} call #t~ret7 := main(); {23168#true} is VALID [2018-11-23 10:31:35,995 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {23168#true} {23168#true} #95#return; {23168#true} is VALID [2018-11-23 10:31:35,996 INFO L273 TraceCheckUtils]: 2: Hoare triple {23168#true} assume true; {23168#true} is VALID [2018-11-23 10:31:35,996 INFO L273 TraceCheckUtils]: 1: Hoare triple {23168#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {23168#true} is VALID [2018-11-23 10:31:35,996 INFO L256 TraceCheckUtils]: 0: Hoare triple {23168#true} call ULTIMATE.init(); {23168#true} is VALID [2018-11-23 10:31:35,998 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:31:36,000 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:31:36,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 22 [2018-11-23 10:31:36,001 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2018-11-23 10:31:36,001 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:31:36,002 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states. [2018-11-23 10:31:36,473 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:31:36,473 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-23 10:31:36,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-23 10:31:36,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=371, Unknown=0, NotChecked=0, Total=462 [2018-11-23 10:31:36,474 INFO L87 Difference]: Start difference. First operand 188 states and 226 transitions. Second operand 22 states. [2018-11-23 10:32:41,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:41,190 INFO L93 Difference]: Finished difference Result 280 states and 335 transitions. [2018-11-23 10:32:41,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-11-23 10:32:41,190 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2018-11-23 10:32:41,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:41,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 10:32:41,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 176 transitions. [2018-11-23 10:32:41,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 10:32:41,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 176 transitions. [2018-11-23 10:32:41,196 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 36 states and 176 transitions.