java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-tiling/rewrev_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:32:33,152 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:32:33,155 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:32:33,167 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:32:33,167 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:32:33,168 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:32:33,170 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:32:33,172 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:32:33,173 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:32:33,174 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:32:33,175 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:32:33,175 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:32:33,177 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:32:33,178 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:32:33,179 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:32:33,180 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:32:33,181 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:32:33,183 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:32:33,185 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:32:33,187 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:32:33,188 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:32:33,189 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:32:33,192 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-23 10:32:33,199 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:32:33,200 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:32:33,201 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:32:33,201 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:32:33,202 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:32:33,218 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:32:33,218 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:32:33,219 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:32:33,219 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:32:33,220 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:32:33,220 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:32:33,221 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:32:33,221 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:32:33,221 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:32:33,221 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:32:33,221 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:32:33,222 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:32:33,222 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:32:33,222 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:32:33,222 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:32:33,222 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:32:33,223 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:32:33,223 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:32:33,223 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:32:33,223 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:32:33,223 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:32:33,223 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:32:33,224 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:32:33,224 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:32:33,224 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:32:33,224 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:32:33,224 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:32:33,225 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:32:33,225 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:32:33,225 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:32:33,225 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:32:33,225 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:32:33,226 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:32:33,289 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:32:33,309 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:32:33,313 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:32:33,315 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:32:33,315 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:32:33,316 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/rewrev_true-unreach-call.i [2018-11-23 10:32:33,384 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/04781bd8f/b0e5215df3e84b92a843a0ade3a5b256/FLAG733c69167 [2018-11-23 10:32:33,863 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:32:33,864 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/rewrev_true-unreach-call.i [2018-11-23 10:32:33,870 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/04781bd8f/b0e5215df3e84b92a843a0ade3a5b256/FLAG733c69167 [2018-11-23 10:32:34,192 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/04781bd8f/b0e5215df3e84b92a843a0ade3a5b256 [2018-11-23 10:32:34,205 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:32:34,207 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:32:34,208 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:32:34,208 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:32:34,212 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:32:34,214 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,217 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@28c7f1f4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34, skipping insertion in model container [2018-11-23 10:32:34,217 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,229 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:32:34,255 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:32:34,533 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:32:34,539 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:32:34,566 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:32:34,594 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:32:34,595 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34 WrapperNode [2018-11-23 10:32:34,595 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:32:34,596 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:32:34,596 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:32:34,597 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:32:34,607 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,617 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,624 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:32:34,624 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:32:34,624 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:32:34,624 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:32:34,635 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,635 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,638 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,638 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,653 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,670 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,672 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... [2018-11-23 10:32:34,675 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:32:34,676 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:32:34,676 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:32:34,676 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:32:34,677 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:32:34,808 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:32:34,809 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:32:34,809 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:32:34,809 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:32:34,809 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:32:34,809 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:32:34,809 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:32:34,809 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:32:34,810 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:32:34,810 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:32:34,810 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:32:34,811 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:32:35,401 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:32:35,402 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-11-23 10:32:35,402 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:32:35 BoogieIcfgContainer [2018-11-23 10:32:35,402 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:32:35,403 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:32:35,404 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:32:35,407 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:32:35,407 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:32:34" (1/3) ... [2018-11-23 10:32:35,408 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22ec5785 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:32:35, skipping insertion in model container [2018-11-23 10:32:35,409 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:34" (2/3) ... [2018-11-23 10:32:35,409 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22ec5785 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:32:35, skipping insertion in model container [2018-11-23 10:32:35,409 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:32:35" (3/3) ... [2018-11-23 10:32:35,411 INFO L112 eAbstractionObserver]: Analyzing ICFG rewrev_true-unreach-call.i [2018-11-23 10:32:35,422 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:32:35,431 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:32:35,451 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:32:35,490 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:32:35,491 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:32:35,491 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:32:35,491 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:32:35,492 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:32:35,492 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:32:35,492 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:32:35,492 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:32:35,492 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:32:35,511 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states. [2018-11-23 10:32:35,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 10:32:35,519 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:35,520 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:35,522 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:35,529 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:35,529 INFO L82 PathProgramCache]: Analyzing trace with hash -1204506220, now seen corresponding path program 1 times [2018-11-23 10:32:35,534 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:35,534 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:35,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:35,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:35,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:35,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:35,761 INFO L256 TraceCheckUtils]: 0: Hoare triple {31#true} call ULTIMATE.init(); {31#true} is VALID [2018-11-23 10:32:35,765 INFO L273 TraceCheckUtils]: 1: Hoare triple {31#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {31#true} is VALID [2018-11-23 10:32:35,766 INFO L273 TraceCheckUtils]: 2: Hoare triple {31#true} assume true; {31#true} is VALID [2018-11-23 10:32:35,766 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {31#true} {31#true} #63#return; {31#true} is VALID [2018-11-23 10:32:35,766 INFO L256 TraceCheckUtils]: 4: Hoare triple {31#true} call #t~ret5 := main(); {31#true} is VALID [2018-11-23 10:32:35,767 INFO L273 TraceCheckUtils]: 5: Hoare triple {31#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {31#true} is VALID [2018-11-23 10:32:35,767 INFO L273 TraceCheckUtils]: 6: Hoare triple {31#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {31#true} is VALID [2018-11-23 10:32:35,768 INFO L273 TraceCheckUtils]: 7: Hoare triple {31#true} assume !true; {32#false} is VALID [2018-11-23 10:32:35,768 INFO L273 TraceCheckUtils]: 8: Hoare triple {32#false} ~i~0 := 0bv32; {32#false} is VALID [2018-11-23 10:32:35,768 INFO L273 TraceCheckUtils]: 9: Hoare triple {32#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {32#false} is VALID [2018-11-23 10:32:35,769 INFO L256 TraceCheckUtils]: 10: Hoare triple {32#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {32#false} is VALID [2018-11-23 10:32:35,769 INFO L273 TraceCheckUtils]: 11: Hoare triple {32#false} ~cond := #in~cond; {32#false} is VALID [2018-11-23 10:32:35,769 INFO L273 TraceCheckUtils]: 12: Hoare triple {32#false} assume 0bv32 == ~cond; {32#false} is VALID [2018-11-23 10:32:35,769 INFO L273 TraceCheckUtils]: 13: Hoare triple {32#false} assume !false; {32#false} is VALID [2018-11-23 10:32:35,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:35,772 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:35,777 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:35,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:32:35,782 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 10:32:35,785 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:35,788 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:32:35,919 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:35,919 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:32:35,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:32:35,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:32:35,933 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 2 states. [2018-11-23 10:32:36,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:36,170 INFO L93 Difference]: Finished difference Result 45 states and 54 transitions. [2018-11-23 10:32:36,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:32:36,171 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 10:32:36,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:36,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:32:36,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 54 transitions. [2018-11-23 10:32:36,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:32:36,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 54 transitions. [2018-11-23 10:32:36,189 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 54 transitions. [2018-11-23 10:32:36,473 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:36,485 INFO L225 Difference]: With dead ends: 45 [2018-11-23 10:32:36,485 INFO L226 Difference]: Without dead ends: 22 [2018-11-23 10:32:36,489 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:32:36,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-11-23 10:32:36,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-11-23 10:32:36,550 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:36,551 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand 22 states. [2018-11-23 10:32:36,551 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-23 10:32:36,552 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-23 10:32:36,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:36,556 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2018-11-23 10:32:36,556 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2018-11-23 10:32:36,557 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:36,557 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:36,558 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-23 10:32:36,558 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-23 10:32:36,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:36,562 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2018-11-23 10:32:36,562 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2018-11-23 10:32:36,563 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:36,563 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:36,563 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:36,564 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:36,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 10:32:36,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2018-11-23 10:32:36,569 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 14 [2018-11-23 10:32:36,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:36,569 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2018-11-23 10:32:36,569 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:32:36,570 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2018-11-23 10:32:36,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 10:32:36,570 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:36,571 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:36,571 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:36,572 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:36,572 INFO L82 PathProgramCache]: Analyzing trace with hash 142847815, now seen corresponding path program 1 times [2018-11-23 10:32:36,572 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:36,572 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:36,599 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:36,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:36,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:36,653 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:36,742 INFO L256 TraceCheckUtils]: 0: Hoare triple {204#true} call ULTIMATE.init(); {204#true} is VALID [2018-11-23 10:32:36,742 INFO L273 TraceCheckUtils]: 1: Hoare triple {204#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {204#true} is VALID [2018-11-23 10:32:36,743 INFO L273 TraceCheckUtils]: 2: Hoare triple {204#true} assume true; {204#true} is VALID [2018-11-23 10:32:36,743 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {204#true} {204#true} #63#return; {204#true} is VALID [2018-11-23 10:32:36,743 INFO L256 TraceCheckUtils]: 4: Hoare triple {204#true} call #t~ret5 := main(); {204#true} is VALID [2018-11-23 10:32:36,744 INFO L273 TraceCheckUtils]: 5: Hoare triple {204#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {204#true} is VALID [2018-11-23 10:32:36,748 INFO L273 TraceCheckUtils]: 6: Hoare triple {204#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {227#(bvsgt (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32))} is VALID [2018-11-23 10:32:36,765 INFO L273 TraceCheckUtils]: 7: Hoare triple {227#(bvsgt (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32))} assume !~bvsge32(~i~0, 4294967295bv32); {205#false} is VALID [2018-11-23 10:32:36,766 INFO L273 TraceCheckUtils]: 8: Hoare triple {205#false} ~i~0 := 0bv32; {205#false} is VALID [2018-11-23 10:32:36,766 INFO L273 TraceCheckUtils]: 9: Hoare triple {205#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {205#false} is VALID [2018-11-23 10:32:36,766 INFO L256 TraceCheckUtils]: 10: Hoare triple {205#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {205#false} is VALID [2018-11-23 10:32:36,767 INFO L273 TraceCheckUtils]: 11: Hoare triple {205#false} ~cond := #in~cond; {205#false} is VALID [2018-11-23 10:32:36,767 INFO L273 TraceCheckUtils]: 12: Hoare triple {205#false} assume 0bv32 == ~cond; {205#false} is VALID [2018-11-23 10:32:36,768 INFO L273 TraceCheckUtils]: 13: Hoare triple {205#false} assume !false; {205#false} is VALID [2018-11-23 10:32:36,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:36,769 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:36,776 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:36,776 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:32:36,778 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 10:32:36,778 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:36,778 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:32:36,842 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:36,842 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:32:36,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:32:36,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:36,843 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand 3 states. [2018-11-23 10:32:37,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:37,352 INFO L93 Difference]: Finished difference Result 45 states and 52 transitions. [2018-11-23 10:32:37,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:32:37,352 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 10:32:37,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:37,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:37,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 52 transitions. [2018-11-23 10:32:37,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:37,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 52 transitions. [2018-11-23 10:32:37,361 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 52 transitions. [2018-11-23 10:32:37,564 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:37,567 INFO L225 Difference]: With dead ends: 45 [2018-11-23 10:32:37,567 INFO L226 Difference]: Without dead ends: 30 [2018-11-23 10:32:37,569 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:37,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-11-23 10:32:37,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 24. [2018-11-23 10:32:37,585 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:37,585 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand 24 states. [2018-11-23 10:32:37,585 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 24 states. [2018-11-23 10:32:37,586 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 24 states. [2018-11-23 10:32:37,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:37,590 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2018-11-23 10:32:37,590 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2018-11-23 10:32:37,591 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:37,591 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:37,591 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 30 states. [2018-11-23 10:32:37,591 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 30 states. [2018-11-23 10:32:37,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:37,595 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2018-11-23 10:32:37,595 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2018-11-23 10:32:37,596 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:37,596 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:37,596 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:37,596 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:37,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:32:37,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2018-11-23 10:32:37,601 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 14 [2018-11-23 10:32:37,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:37,602 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2018-11-23 10:32:37,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:32:37,603 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-11-23 10:32:37,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-23 10:32:37,604 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:37,604 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:37,604 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:37,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:37,605 INFO L82 PathProgramCache]: Analyzing trace with hash -1002652542, now seen corresponding path program 1 times [2018-11-23 10:32:37,605 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:37,605 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:37,626 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:37,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:37,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:37,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:37,749 INFO L256 TraceCheckUtils]: 0: Hoare triple {401#true} call ULTIMATE.init(); {401#true} is VALID [2018-11-23 10:32:37,750 INFO L273 TraceCheckUtils]: 1: Hoare triple {401#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {401#true} is VALID [2018-11-23 10:32:37,750 INFO L273 TraceCheckUtils]: 2: Hoare triple {401#true} assume true; {401#true} is VALID [2018-11-23 10:32:37,750 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {401#true} {401#true} #63#return; {401#true} is VALID [2018-11-23 10:32:37,751 INFO L256 TraceCheckUtils]: 4: Hoare triple {401#true} call #t~ret5 := main(); {401#true} is VALID [2018-11-23 10:32:37,751 INFO L273 TraceCheckUtils]: 5: Hoare triple {401#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {401#true} is VALID [2018-11-23 10:32:37,752 INFO L273 TraceCheckUtils]: 6: Hoare triple {401#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {401#true} is VALID [2018-11-23 10:32:37,752 INFO L273 TraceCheckUtils]: 7: Hoare triple {401#true} assume !!~bvsge32(~i~0, 4294967295bv32); {401#true} is VALID [2018-11-23 10:32:37,755 INFO L273 TraceCheckUtils]: 8: Hoare triple {401#true} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {430#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:37,755 INFO L273 TraceCheckUtils]: 9: Hoare triple {430#(bvsge main_~i~0 (_ bv0 32))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {430#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:37,757 INFO L273 TraceCheckUtils]: 10: Hoare triple {430#(bvsge main_~i~0 (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {437#(bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:37,759 INFO L273 TraceCheckUtils]: 11: Hoare triple {437#(bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32))} assume !~bvsge32(~i~0, 4294967295bv32); {402#false} is VALID [2018-11-23 10:32:37,759 INFO L273 TraceCheckUtils]: 12: Hoare triple {402#false} ~i~0 := 0bv32; {402#false} is VALID [2018-11-23 10:32:37,759 INFO L273 TraceCheckUtils]: 13: Hoare triple {402#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {402#false} is VALID [2018-11-23 10:32:37,760 INFO L256 TraceCheckUtils]: 14: Hoare triple {402#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {402#false} is VALID [2018-11-23 10:32:37,760 INFO L273 TraceCheckUtils]: 15: Hoare triple {402#false} ~cond := #in~cond; {402#false} is VALID [2018-11-23 10:32:37,760 INFO L273 TraceCheckUtils]: 16: Hoare triple {402#false} assume 0bv32 == ~cond; {402#false} is VALID [2018-11-23 10:32:37,761 INFO L273 TraceCheckUtils]: 17: Hoare triple {402#false} assume !false; {402#false} is VALID [2018-11-23 10:32:37,762 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:37,762 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (4)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 10:32:37,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:37,765 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:32:37,765 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-11-23 10:32:37,765 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:37,766 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:32:37,867 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:37,867 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:32:37,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:32:37,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:32:37,868 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand 4 states. [2018-11-23 10:32:38,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:38,158 INFO L93 Difference]: Finished difference Result 44 states and 48 transitions. [2018-11-23 10:32:38,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:32:38,158 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-11-23 10:32:38,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:38,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:32:38,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 48 transitions. [2018-11-23 10:32:38,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:32:38,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 48 transitions. [2018-11-23 10:32:38,165 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 48 transitions. [2018-11-23 10:32:38,345 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:38,347 INFO L225 Difference]: With dead ends: 44 [2018-11-23 10:32:38,347 INFO L226 Difference]: Without dead ends: 33 [2018-11-23 10:32:38,348 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:32:38,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-11-23 10:32:38,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 27. [2018-11-23 10:32:38,366 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:38,366 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand 27 states. [2018-11-23 10:32:38,366 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 27 states. [2018-11-23 10:32:38,366 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 27 states. [2018-11-23 10:32:38,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:38,369 INFO L93 Difference]: Finished difference Result 33 states and 36 transitions. [2018-11-23 10:32:38,369 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 36 transitions. [2018-11-23 10:32:38,370 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:38,370 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:38,370 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 33 states. [2018-11-23 10:32:38,370 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 33 states. [2018-11-23 10:32:38,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:38,373 INFO L93 Difference]: Finished difference Result 33 states and 36 transitions. [2018-11-23 10:32:38,373 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 36 transitions. [2018-11-23 10:32:38,374 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:38,374 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:38,374 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:38,374 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:38,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 10:32:38,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 29 transitions. [2018-11-23 10:32:38,377 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 29 transitions. Word has length 18 [2018-11-23 10:32:38,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:38,377 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 29 transitions. [2018-11-23 10:32:38,377 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:32:38,377 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 29 transitions. [2018-11-23 10:32:38,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 10:32:38,378 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:38,378 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:38,379 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:38,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:38,379 INFO L82 PathProgramCache]: Analyzing trace with hash -1636198789, now seen corresponding path program 1 times [2018-11-23 10:32:38,380 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:38,380 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:38,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:38,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:38,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:38,486 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:38,858 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:32:38,867 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:32:38,874 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:38,904 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:38,927 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:32:38,928 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:30 [2018-11-23 10:32:38,944 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:38,944 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_8|, main_~i~0]. (and (= (store |v_#memory_int_8| |main_~#a~0.base| (store (select |v_#memory_int_8| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv3 32))) |#memory_int|) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32))) [2018-11-23 10:32:38,944 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [main_~i~0]. (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv3 32)) (= |main_~#a~0.offset| (_ bv0 32))) [2018-11-23 10:32:39,364 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-11-23 10:32:39,376 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:32:39,378 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-23 10:32:39,381 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:39,388 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:39,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:39,410 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:11 [2018-11-23 10:32:39,415 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:39,416 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#a~0.base|, v_prenex_1]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge v_prenex_1 (_ bv0 32))) (bvsge (bvadd v_prenex_1 (_ bv1 32)) (_ bv0 32)) (= (select .cse0 (_ bv0 32)) |main_#t~mem4|) (= (_ bv0 32) (bvadd (select .cse0 (bvadd (bvmul (_ bv4 32) v_prenex_1) (_ bv4 32))) (_ bv4294967293 32))))) [2018-11-23 10:32:39,416 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv0 32) (bvadd |main_#t~mem4| (_ bv4294967293 32)))) [2018-11-23 10:32:39,535 INFO L256 TraceCheckUtils]: 0: Hoare triple {622#true} call ULTIMATE.init(); {622#true} is VALID [2018-11-23 10:32:39,536 INFO L273 TraceCheckUtils]: 1: Hoare triple {622#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {622#true} is VALID [2018-11-23 10:32:39,536 INFO L273 TraceCheckUtils]: 2: Hoare triple {622#true} assume true; {622#true} is VALID [2018-11-23 10:32:39,537 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {622#true} {622#true} #63#return; {622#true} is VALID [2018-11-23 10:32:39,537 INFO L256 TraceCheckUtils]: 4: Hoare triple {622#true} call #t~ret5 := main(); {622#true} is VALID [2018-11-23 10:32:39,537 INFO L273 TraceCheckUtils]: 5: Hoare triple {622#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {622#true} is VALID [2018-11-23 10:32:39,541 INFO L273 TraceCheckUtils]: 6: Hoare triple {622#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {645#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,542 INFO L273 TraceCheckUtils]: 7: Hoare triple {645#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {645#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,543 INFO L273 TraceCheckUtils]: 8: Hoare triple {645#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {652#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,544 INFO L273 TraceCheckUtils]: 9: Hoare triple {652#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {652#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,552 INFO L273 TraceCheckUtils]: 10: Hoare triple {652#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {659#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,553 INFO L273 TraceCheckUtils]: 11: Hoare triple {659#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {659#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,554 INFO L273 TraceCheckUtils]: 12: Hoare triple {659#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvsge32(~i~0, 0bv32); {666#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,567 INFO L273 TraceCheckUtils]: 13: Hoare triple {666#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {670#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,572 INFO L273 TraceCheckUtils]: 14: Hoare triple {670#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {670#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,581 INFO L273 TraceCheckUtils]: 15: Hoare triple {670#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvsge32(~i~0, 4294967295bv32); {670#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:39,585 INFO L273 TraceCheckUtils]: 16: Hoare triple {670#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {680#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (not (bvsge v_prenex_1 (_ bv0 32))) (bvsge (bvadd v_prenex_1 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_1) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:32:39,589 INFO L273 TraceCheckUtils]: 17: Hoare triple {680#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (not (bvsge v_prenex_1 (_ bv0 32))) (bvsge (bvadd v_prenex_1 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_1) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {684#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} is VALID [2018-11-23 10:32:39,594 INFO L256 TraceCheckUtils]: 18: Hoare triple {684#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {688#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:39,594 INFO L273 TraceCheckUtils]: 19: Hoare triple {688#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {692#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:39,598 INFO L273 TraceCheckUtils]: 20: Hoare triple {692#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {623#false} is VALID [2018-11-23 10:32:39,598 INFO L273 TraceCheckUtils]: 21: Hoare triple {623#false} assume !false; {623#false} is VALID [2018-11-23 10:32:39,602 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:39,602 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:39,805 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-11-23 10:32:39,868 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2018-11-23 10:32:39,870 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:32:39,894 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:32:39,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:32:39,933 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:31 [2018-11-23 10:32:39,944 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:39,944 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#a~0.base|]. (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0) [2018-11-23 10:32:39,945 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_prenex_2, v_arrayElimCell_4]. (let ((.cse0 (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (.cse1 (bvsge main_~val2~0 main_~low~0))) (and (or (bvsge v_prenex_2 main_~low~0) .cse0) (or (bvsge v_arrayElimCell_4 main_~low~0) .cse1) (or (not .cse0) .cse1))) [2018-11-23 10:32:40,391 INFO L273 TraceCheckUtils]: 21: Hoare triple {623#false} assume !false; {623#false} is VALID [2018-11-23 10:32:40,392 INFO L273 TraceCheckUtils]: 20: Hoare triple {702#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {623#false} is VALID [2018-11-23 10:32:40,393 INFO L273 TraceCheckUtils]: 19: Hoare triple {706#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {702#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:32:40,396 INFO L256 TraceCheckUtils]: 18: Hoare triple {710#(bvsge |main_#t~mem4| main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {706#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:32:40,398 INFO L273 TraceCheckUtils]: 17: Hoare triple {714#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {710#(bvsge |main_#t~mem4| main_~low~0)} is VALID [2018-11-23 10:32:40,399 INFO L273 TraceCheckUtils]: 16: Hoare triple {718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} ~i~0 := 0bv32; {714#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is VALID [2018-11-23 10:32:40,400 INFO L273 TraceCheckUtils]: 15: Hoare triple {718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} assume !~bvsge32(~i~0, 4294967295bv32); {718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-23 10:32:40,400 INFO L273 TraceCheckUtils]: 14: Hoare triple {718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-23 10:32:40,421 INFO L273 TraceCheckUtils]: 13: Hoare triple {728#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge main_~val2~0 main_~low~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-23 10:32:40,424 INFO L273 TraceCheckUtils]: 12: Hoare triple {732#(and (or (bvsge main_~i~0 (_ bv0 32)) (bvsge main_~val2~0 main_~low~0)) (or (bvsge main_~i~0 (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} assume !~bvsge32(~i~0, 0bv32); {728#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-23 10:32:40,425 INFO L273 TraceCheckUtils]: 11: Hoare triple {732#(and (or (bvsge main_~i~0 (_ bv0 32)) (bvsge main_~val2~0 main_~low~0)) (or (bvsge main_~i~0 (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} assume !!~bvsge32(~i~0, 4294967295bv32); {732#(and (or (bvsge main_~i~0 (_ bv0 32)) (bvsge main_~val2~0 main_~low~0)) (or (bvsge main_~i~0 (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:40,431 INFO L273 TraceCheckUtils]: 10: Hoare triple {739#(and (or (bvsge main_~val2~0 main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {732#(and (or (bvsge main_~i~0 (_ bv0 32)) (bvsge main_~val2~0 main_~low~0)) (or (bvsge main_~i~0 (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:40,432 INFO L273 TraceCheckUtils]: 9: Hoare triple {739#(and (or (bvsge main_~val2~0 main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {739#(and (or (bvsge main_~val2~0 main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:40,434 INFO L273 TraceCheckUtils]: 8: Hoare triple {746#(bvsge main_~val2~0 main_~low~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {739#(and (or (bvsge main_~val2~0 main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~low~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:40,435 INFO L273 TraceCheckUtils]: 7: Hoare triple {746#(bvsge main_~val2~0 main_~low~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {746#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:32:40,436 INFO L273 TraceCheckUtils]: 6: Hoare triple {622#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {746#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:32:40,436 INFO L273 TraceCheckUtils]: 5: Hoare triple {622#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {622#true} is VALID [2018-11-23 10:32:40,436 INFO L256 TraceCheckUtils]: 4: Hoare triple {622#true} call #t~ret5 := main(); {622#true} is VALID [2018-11-23 10:32:40,436 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {622#true} {622#true} #63#return; {622#true} is VALID [2018-11-23 10:32:40,437 INFO L273 TraceCheckUtils]: 2: Hoare triple {622#true} assume true; {622#true} is VALID [2018-11-23 10:32:40,437 INFO L273 TraceCheckUtils]: 1: Hoare triple {622#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {622#true} is VALID [2018-11-23 10:32:40,438 INFO L256 TraceCheckUtils]: 0: Hoare triple {622#true} call ULTIMATE.init(); {622#true} is VALID [2018-11-23 10:32:40,440 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:40,443 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:40,444 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-23 10:32:40,444 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 22 [2018-11-23 10:32:40,445 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:40,445 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 10:32:40,622 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:40,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 10:32:40,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 10:32:40,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=320, Unknown=0, NotChecked=0, Total=380 [2018-11-23 10:32:40,623 INFO L87 Difference]: Start difference. First operand 27 states and 29 transitions. Second operand 20 states. [2018-11-23 10:32:43,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:43,635 INFO L93 Difference]: Finished difference Result 43 states and 46 transitions. [2018-11-23 10:32:43,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 10:32:43,636 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 22 [2018-11-23 10:32:43,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:43,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:32:43,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 46 transitions. [2018-11-23 10:32:43,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:32:43,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 46 transitions. [2018-11-23 10:32:43,643 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 46 transitions. [2018-11-23 10:32:43,771 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:43,773 INFO L225 Difference]: With dead ends: 43 [2018-11-23 10:32:43,773 INFO L226 Difference]: Without dead ends: 41 [2018-11-23 10:32:43,774 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=173, Invalid=697, Unknown=0, NotChecked=0, Total=870 [2018-11-23 10:32:43,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-11-23 10:32:43,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 33. [2018-11-23 10:32:43,865 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:43,865 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand 33 states. [2018-11-23 10:32:43,865 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 33 states. [2018-11-23 10:32:43,866 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 33 states. [2018-11-23 10:32:43,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:43,870 INFO L93 Difference]: Finished difference Result 41 states and 44 transitions. [2018-11-23 10:32:43,870 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 44 transitions. [2018-11-23 10:32:43,871 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:43,871 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:43,871 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 41 states. [2018-11-23 10:32:43,871 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 41 states. [2018-11-23 10:32:43,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:43,874 INFO L93 Difference]: Finished difference Result 41 states and 44 transitions. [2018-11-23 10:32:43,874 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 44 transitions. [2018-11-23 10:32:43,875 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:43,875 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:43,875 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:43,875 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:43,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-23 10:32:43,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 35 transitions. [2018-11-23 10:32:43,878 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 35 transitions. Word has length 22 [2018-11-23 10:32:43,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:43,878 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 35 transitions. [2018-11-23 10:32:43,878 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 10:32:43,878 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 35 transitions. [2018-11-23 10:32:43,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:32:43,880 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:43,880 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:43,880 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:43,880 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:43,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1656033490, now seen corresponding path program 1 times [2018-11-23 10:32:43,881 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:43,881 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:43,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:43,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:43,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:43,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:44,081 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:32:44,090 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:32:44,092 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:44,099 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:44,124 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:44,124 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-11-23 10:32:44,391 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:32:44,401 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:44,402 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:32:44,404 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:44,420 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:44,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:32:44,486 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:42 [2018-11-23 10:32:44,505 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:44,505 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_13|, main_~i~0]. (let ((.cse0 (select |v_#memory_int_13| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (store |v_#memory_int_13| |main_~#a~0.base| (store .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32)) (_ bv3 32))) |#memory_int|) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32))) (_ bv3 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))) [2018-11-23 10:32:44,506 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [main_~i~0]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (_ bv3 32)) (= |main_~#a~0.offset| (_ bv0 32)))) [2018-11-23 10:32:45,428 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-11-23 10:32:45,451 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:32:45,452 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:32:45,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2018-11-23 10:32:45,456 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:45,465 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:45,481 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:32:45,481 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:46, output treesize:11 [2018-11-23 10:32:45,487 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:45,487 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#a~0.base|, v_prenex_3]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) v_prenex_3))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv0 32) (bvadd (select .cse0 (bvadd .cse1 (_ bv4 32))) (_ bv4294967293 32))) (= |main_#t~mem4| (select .cse0 (_ bv4 32))) (not (bvsge v_prenex_3 (_ bv0 32))) (= (select .cse0 (bvadd .cse1 (_ bv8 32))) (_ bv3 32)))) [2018-11-23 10:32:45,487 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv0 32) (bvadd |main_#t~mem4| (_ bv4294967293 32)))) [2018-11-23 10:32:45,573 INFO L256 TraceCheckUtils]: 0: Hoare triple {978#true} call ULTIMATE.init(); {978#true} is VALID [2018-11-23 10:32:45,573 INFO L273 TraceCheckUtils]: 1: Hoare triple {978#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {978#true} is VALID [2018-11-23 10:32:45,573 INFO L273 TraceCheckUtils]: 2: Hoare triple {978#true} assume true; {978#true} is VALID [2018-11-23 10:32:45,574 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {978#true} {978#true} #63#return; {978#true} is VALID [2018-11-23 10:32:45,574 INFO L256 TraceCheckUtils]: 4: Hoare triple {978#true} call #t~ret5 := main(); {978#true} is VALID [2018-11-23 10:32:45,574 INFO L273 TraceCheckUtils]: 5: Hoare triple {978#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {978#true} is VALID [2018-11-23 10:32:45,575 INFO L273 TraceCheckUtils]: 6: Hoare triple {978#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {1001#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:45,575 INFO L273 TraceCheckUtils]: 7: Hoare triple {1001#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {1001#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:45,576 INFO L273 TraceCheckUtils]: 8: Hoare triple {1001#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1008#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:45,577 INFO L273 TraceCheckUtils]: 9: Hoare triple {1008#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1012#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} is VALID [2018-11-23 10:32:47,586 INFO L273 TraceCheckUtils]: 10: Hoare triple {1012#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1016#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is UNKNOWN [2018-11-23 10:32:47,588 INFO L273 TraceCheckUtils]: 11: Hoare triple {1016#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !!~bvsge32(~i~0, 4294967295bv32); {1016#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:32:47,588 INFO L273 TraceCheckUtils]: 12: Hoare triple {1016#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !~bvsge32(~i~0, 0bv32); {1023#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:32:47,594 INFO L273 TraceCheckUtils]: 13: Hoare triple {1023#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1027#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:47,595 INFO L273 TraceCheckUtils]: 14: Hoare triple {1027#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1027#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:47,613 INFO L273 TraceCheckUtils]: 15: Hoare triple {1027#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvsge32(~i~0, 4294967295bv32); {1027#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:32:47,627 INFO L273 TraceCheckUtils]: 16: Hoare triple {1027#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} is VALID [2018-11-23 10:32:47,642 INFO L273 TraceCheckUtils]: 17: Hoare triple {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} is VALID [2018-11-23 10:32:47,657 INFO L256 TraceCheckUtils]: 18: Hoare triple {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} is VALID [2018-11-23 10:32:47,667 INFO L273 TraceCheckUtils]: 19: Hoare triple {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} ~cond := #in~cond; {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} is VALID [2018-11-23 10:32:47,678 INFO L273 TraceCheckUtils]: 20: Hoare triple {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} assume !(0bv32 == ~cond); {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} is VALID [2018-11-23 10:32:47,678 INFO L273 TraceCheckUtils]: 21: Hoare triple {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} assume true; {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} is VALID [2018-11-23 10:32:47,679 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {1044#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32)))) (not (bvsge v_prenex_3 (_ bv0 32)))))} {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} #67#return; {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} is VALID [2018-11-23 10:32:47,690 INFO L273 TraceCheckUtils]: 23: Hoare triple {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} havoc #t~mem4; {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} is VALID [2018-11-23 10:32:47,691 INFO L273 TraceCheckUtils]: 24: Hoare triple {1037#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1063#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:47,694 INFO L273 TraceCheckUtils]: 25: Hoare triple {1063#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_3 (_ BitVec 32))) (and (bvsge (bvadd v_prenex_3 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_3 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_3) (_ bv8 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1067#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} is VALID [2018-11-23 10:32:47,695 INFO L256 TraceCheckUtils]: 26: Hoare triple {1067#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1071#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:47,696 INFO L273 TraceCheckUtils]: 27: Hoare triple {1071#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1075#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:47,696 INFO L273 TraceCheckUtils]: 28: Hoare triple {1075#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {979#false} is VALID [2018-11-23 10:32:47,697 INFO L273 TraceCheckUtils]: 29: Hoare triple {979#false} assume !false; {979#false} is VALID [2018-11-23 10:32:47,703 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:47,704 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:48,325 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-11-23 10:32:48,332 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 26 [2018-11-23 10:32:48,424 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 6 [2018-11-23 10:32:48,427 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:32:48,448 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-11-23 10:32:48,451 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:48,487 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:48,509 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:48,542 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:32:48,543 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:34 [2018-11-23 10:32:48,556 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:32:48,556 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#a~0.base|]. (or (bvsge (select (let ((.cse0 (bvmul (_ bv4 32) main_~i~0))) (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| .cse0 (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| .cse0) main_~val2~0)) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:32:48,556 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_9]. (let ((.cse0 (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) (and (or .cse0 (bvsge main_~val2~0 main_~low~0)) (let ((.cse1 (bvmul (_ bv4 32) main_~i~0))) (or (bvsge v_arrayElimCell_9 main_~low~0) (= (_ bv4 32) .cse1) (= (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32)) (bvadd |main_~#a~0.offset| (_ bv4 32))) .cse0)))) [2018-11-23 10:32:48,827 INFO L273 TraceCheckUtils]: 29: Hoare triple {979#false} assume !false; {979#false} is VALID [2018-11-23 10:32:48,843 INFO L273 TraceCheckUtils]: 28: Hoare triple {1085#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {979#false} is VALID [2018-11-23 10:32:48,846 INFO L273 TraceCheckUtils]: 27: Hoare triple {1089#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1085#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:32:48,847 INFO L256 TraceCheckUtils]: 26: Hoare triple {1093#(bvsge |main_#t~mem4| main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1089#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:32:48,849 INFO L273 TraceCheckUtils]: 25: Hoare triple {1097#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1093#(bvsge |main_#t~mem4| main_~low~0)} is VALID [2018-11-23 10:32:50,873 INFO L273 TraceCheckUtils]: 24: Hoare triple {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1097#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is UNKNOWN [2018-11-23 10:32:50,874 INFO L273 TraceCheckUtils]: 23: Hoare triple {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} havoc #t~mem4; {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,875 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {978#true} {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #67#return; {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,875 INFO L273 TraceCheckUtils]: 21: Hoare triple {978#true} assume true; {978#true} is VALID [2018-11-23 10:32:50,875 INFO L273 TraceCheckUtils]: 20: Hoare triple {978#true} assume !(0bv32 == ~cond); {978#true} is VALID [2018-11-23 10:32:50,876 INFO L273 TraceCheckUtils]: 19: Hoare triple {978#true} ~cond := #in~cond; {978#true} is VALID [2018-11-23 10:32:50,876 INFO L256 TraceCheckUtils]: 18: Hoare triple {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {978#true} is VALID [2018-11-23 10:32:50,878 INFO L273 TraceCheckUtils]: 17: Hoare triple {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,879 INFO L273 TraceCheckUtils]: 16: Hoare triple {1126#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} ~i~0 := 0bv32; {1101#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,879 INFO L273 TraceCheckUtils]: 15: Hoare triple {1126#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} assume !~bvsge32(~i~0, 4294967295bv32); {1126#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,880 INFO L273 TraceCheckUtils]: 14: Hoare triple {1126#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1126#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,915 INFO L273 TraceCheckUtils]: 13: Hoare triple {1136#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1126#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,916 INFO L273 TraceCheckUtils]: 12: Hoare triple {1140#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0) (bvsge main_~i~0 (_ bv0 32)))} assume !~bvsge32(~i~0, 0bv32); {1136#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:32:50,917 INFO L273 TraceCheckUtils]: 11: Hoare triple {1140#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0) (bvsge main_~i~0 (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {1140#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:32:50,929 INFO L273 TraceCheckUtils]: 10: Hoare triple {1147#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1140#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:32:50,970 INFO L273 TraceCheckUtils]: 9: Hoare triple {1151#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_9 (_ BitVec 32))) (bvsge v_arrayElimCell_9 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (or (bvsge main_~val2~0 main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1147#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:50,972 INFO L273 TraceCheckUtils]: 8: Hoare triple {1155#(bvsge main_~val2~0 main_~low~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1151#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_9 (_ BitVec 32))) (bvsge v_arrayElimCell_9 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (or (bvsge main_~val2~0 main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-23 10:32:50,974 INFO L273 TraceCheckUtils]: 7: Hoare triple {1155#(bvsge main_~val2~0 main_~low~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {1155#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:32:50,974 INFO L273 TraceCheckUtils]: 6: Hoare triple {978#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {1155#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:32:50,975 INFO L273 TraceCheckUtils]: 5: Hoare triple {978#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {978#true} is VALID [2018-11-23 10:32:50,975 INFO L256 TraceCheckUtils]: 4: Hoare triple {978#true} call #t~ret5 := main(); {978#true} is VALID [2018-11-23 10:32:50,975 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {978#true} {978#true} #63#return; {978#true} is VALID [2018-11-23 10:32:50,975 INFO L273 TraceCheckUtils]: 2: Hoare triple {978#true} assume true; {978#true} is VALID [2018-11-23 10:32:50,975 INFO L273 TraceCheckUtils]: 1: Hoare triple {978#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {978#true} is VALID [2018-11-23 10:32:50,975 INFO L256 TraceCheckUtils]: 0: Hoare triple {978#true} call ULTIMATE.init(); {978#true} is VALID [2018-11-23 10:32:50,977 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:50,979 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:50,979 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 25 [2018-11-23 10:32:50,980 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 30 [2018-11-23 10:32:50,981 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:50,981 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states. [2018-11-23 10:32:55,200 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 51 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:55,200 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-23 10:32:55,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-23 10:32:55,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=510, Unknown=0, NotChecked=0, Total=600 [2018-11-23 10:32:55,201 INFO L87 Difference]: Start difference. First operand 33 states and 35 transitions. Second operand 25 states. [2018-11-23 10:33:01,404 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 40 [2018-11-23 10:33:02,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:02,253 INFO L93 Difference]: Finished difference Result 59 states and 64 transitions. [2018-11-23 10:33:02,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-23 10:33:02,254 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 30 [2018-11-23 10:33:02,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:02,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 10:33:02,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 61 transitions. [2018-11-23 10:33:02,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 10:33:02,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 61 transitions. [2018-11-23 10:33:02,261 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states and 61 transitions. [2018-11-23 10:33:06,550 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 59 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:06,553 INFO L225 Difference]: With dead ends: 59 [2018-11-23 10:33:06,553 INFO L226 Difference]: Without dead ends: 57 [2018-11-23 10:33:06,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 313 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=286, Invalid=1274, Unknown=0, NotChecked=0, Total=1560 [2018-11-23 10:33:06,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-11-23 10:33:06,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 41. [2018-11-23 10:33:06,647 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:06,647 INFO L82 GeneralOperation]: Start isEquivalent. First operand 57 states. Second operand 41 states. [2018-11-23 10:33:06,647 INFO L74 IsIncluded]: Start isIncluded. First operand 57 states. Second operand 41 states. [2018-11-23 10:33:06,648 INFO L87 Difference]: Start difference. First operand 57 states. Second operand 41 states. [2018-11-23 10:33:06,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:06,652 INFO L93 Difference]: Finished difference Result 57 states and 62 transitions. [2018-11-23 10:33:06,652 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 62 transitions. [2018-11-23 10:33:06,653 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:06,653 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:06,653 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 57 states. [2018-11-23 10:33:06,653 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 57 states. [2018-11-23 10:33:06,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:06,657 INFO L93 Difference]: Finished difference Result 57 states and 62 transitions. [2018-11-23 10:33:06,657 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 62 transitions. [2018-11-23 10:33:06,658 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:06,658 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:06,658 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:06,659 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:06,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-23 10:33:06,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 43 transitions. [2018-11-23 10:33:06,661 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 43 transitions. Word has length 30 [2018-11-23 10:33:06,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:06,661 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 43 transitions. [2018-11-23 10:33:06,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-23 10:33:06,662 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 43 transitions. [2018-11-23 10:33:06,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 10:33:06,663 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:06,663 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:06,663 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:06,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:06,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1830675681, now seen corresponding path program 2 times [2018-11-23 10:33:06,664 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:06,664 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:06,697 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:33:06,762 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:33:06,763 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:06,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:06,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:07,143 INFO L256 TraceCheckUtils]: 0: Hoare triple {1463#true} call ULTIMATE.init(); {1463#true} is VALID [2018-11-23 10:33:07,143 INFO L273 TraceCheckUtils]: 1: Hoare triple {1463#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1463#true} is VALID [2018-11-23 10:33:07,143 INFO L273 TraceCheckUtils]: 2: Hoare triple {1463#true} assume true; {1463#true} is VALID [2018-11-23 10:33:07,144 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1463#true} {1463#true} #63#return; {1463#true} is VALID [2018-11-23 10:33:07,144 INFO L256 TraceCheckUtils]: 4: Hoare triple {1463#true} call #t~ret5 := main(); {1463#true} is VALID [2018-11-23 10:33:07,144 INFO L273 TraceCheckUtils]: 5: Hoare triple {1463#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1463#true} is VALID [2018-11-23 10:33:07,157 INFO L273 TraceCheckUtils]: 6: Hoare triple {1463#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {1486#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:33:07,161 INFO L273 TraceCheckUtils]: 7: Hoare triple {1486#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {1486#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:33:07,163 INFO L273 TraceCheckUtils]: 8: Hoare triple {1486#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1493#(and (= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:33:07,163 INFO L273 TraceCheckUtils]: 9: Hoare triple {1493#(and (= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0) (bvsge main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1493#(and (= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:33:07,195 INFO L273 TraceCheckUtils]: 10: Hoare triple {1493#(and (= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0) (bvsge main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1500#(and (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,198 INFO L273 TraceCheckUtils]: 11: Hoare triple {1500#(and (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {1500#(and (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,200 INFO L273 TraceCheckUtils]: 12: Hoare triple {1500#(and (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !~bvsge32(~i~0, 0bv32); {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,202 INFO L273 TraceCheckUtils]: 13: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,202 INFO L273 TraceCheckUtils]: 14: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,204 INFO L273 TraceCheckUtils]: 15: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !~bvsge32(~i~0, 4294967295bv32); {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,204 INFO L273 TraceCheckUtils]: 16: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} ~i~0 := 0bv32; {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,206 INFO L273 TraceCheckUtils]: 17: Hoare triple {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,208 INFO L256 TraceCheckUtils]: 18: Hoare triple {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,209 INFO L273 TraceCheckUtils]: 19: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} ~cond := #in~cond; {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,210 INFO L273 TraceCheckUtils]: 20: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,210 INFO L273 TraceCheckUtils]: 21: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,211 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} #67#return; {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,211 INFO L273 TraceCheckUtils]: 23: Hoare triple {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} havoc #t~mem4; {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,213 INFO L273 TraceCheckUtils]: 24: Hoare triple {1520#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,215 INFO L273 TraceCheckUtils]: 25: Hoare triple {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,218 INFO L256 TraceCheckUtils]: 26: Hoare triple {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,218 INFO L273 TraceCheckUtils]: 27: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} ~cond := #in~cond; {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,220 INFO L273 TraceCheckUtils]: 28: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,220 INFO L273 TraceCheckUtils]: 29: Hoare triple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,221 INFO L268 TraceCheckUtils]: 30: Hoare quadruple {1507#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)))} {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #67#return; {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,222 INFO L273 TraceCheckUtils]: 31: Hoare triple {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4; {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,222 INFO L273 TraceCheckUtils]: 32: Hoare triple {1545#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1570#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:07,225 INFO L273 TraceCheckUtils]: 33: Hoare triple {1570#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1464#false} is VALID [2018-11-23 10:33:07,225 INFO L256 TraceCheckUtils]: 34: Hoare triple {1464#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1464#false} is VALID [2018-11-23 10:33:07,226 INFO L273 TraceCheckUtils]: 35: Hoare triple {1464#false} ~cond := #in~cond; {1464#false} is VALID [2018-11-23 10:33:07,226 INFO L273 TraceCheckUtils]: 36: Hoare triple {1464#false} assume 0bv32 == ~cond; {1464#false} is VALID [2018-11-23 10:33:07,226 INFO L273 TraceCheckUtils]: 37: Hoare triple {1464#false} assume !false; {1464#false} is VALID [2018-11-23 10:33:07,231 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:33:07,231 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:07,627 INFO L273 TraceCheckUtils]: 37: Hoare triple {1464#false} assume !false; {1464#false} is VALID [2018-11-23 10:33:07,627 INFO L273 TraceCheckUtils]: 36: Hoare triple {1464#false} assume 0bv32 == ~cond; {1464#false} is VALID [2018-11-23 10:33:07,627 INFO L273 TraceCheckUtils]: 35: Hoare triple {1464#false} ~cond := #in~cond; {1464#false} is VALID [2018-11-23 10:33:07,627 INFO L256 TraceCheckUtils]: 34: Hoare triple {1464#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1464#false} is VALID [2018-11-23 10:33:07,629 INFO L273 TraceCheckUtils]: 33: Hoare triple {1598#(not (bvslt main_~i~0 ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1464#false} is VALID [2018-11-23 10:33:07,631 INFO L273 TraceCheckUtils]: 32: Hoare triple {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1598#(not (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-23 10:33:07,631 INFO L273 TraceCheckUtils]: 31: Hoare triple {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} havoc #t~mem4; {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,632 INFO L268 TraceCheckUtils]: 30: Hoare quadruple {1463#true} {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #67#return; {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,632 INFO L273 TraceCheckUtils]: 29: Hoare triple {1463#true} assume true; {1463#true} is VALID [2018-11-23 10:33:07,632 INFO L273 TraceCheckUtils]: 28: Hoare triple {1463#true} assume !(0bv32 == ~cond); {1463#true} is VALID [2018-11-23 10:33:07,632 INFO L273 TraceCheckUtils]: 27: Hoare triple {1463#true} ~cond := #in~cond; {1463#true} is VALID [2018-11-23 10:33:07,633 INFO L256 TraceCheckUtils]: 26: Hoare triple {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1463#true} is VALID [2018-11-23 10:33:07,633 INFO L273 TraceCheckUtils]: 25: Hoare triple {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,656 INFO L273 TraceCheckUtils]: 24: Hoare triple {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1602#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,657 INFO L273 TraceCheckUtils]: 23: Hoare triple {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} havoc #t~mem4; {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,663 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {1463#true} {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #67#return; {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,663 INFO L273 TraceCheckUtils]: 21: Hoare triple {1463#true} assume true; {1463#true} is VALID [2018-11-23 10:33:07,664 INFO L273 TraceCheckUtils]: 20: Hoare triple {1463#true} assume !(0bv32 == ~cond); {1463#true} is VALID [2018-11-23 10:33:07,664 INFO L273 TraceCheckUtils]: 19: Hoare triple {1463#true} ~cond := #in~cond; {1463#true} is VALID [2018-11-23 10:33:07,664 INFO L256 TraceCheckUtils]: 18: Hoare triple {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1463#true} is VALID [2018-11-23 10:33:07,665 INFO L273 TraceCheckUtils]: 17: Hoare triple {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,666 INFO L273 TraceCheckUtils]: 16: Hoare triple {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} ~i~0 := 0bv32; {1627#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:33:07,666 INFO L273 TraceCheckUtils]: 15: Hoare triple {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} assume !~bvsge32(~i~0, 4294967295bv32); {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:33:07,667 INFO L273 TraceCheckUtils]: 14: Hoare triple {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:33:07,667 INFO L273 TraceCheckUtils]: 13: Hoare triple {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:33:07,668 INFO L273 TraceCheckUtils]: 12: Hoare triple {1665#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} assume !~bvsge32(~i~0, 0bv32); {1652#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:33:07,668 INFO L273 TraceCheckUtils]: 11: Hoare triple {1665#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {1665#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:33:07,669 INFO L273 TraceCheckUtils]: 10: Hoare triple {1672#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {1665#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:33:07,669 INFO L273 TraceCheckUtils]: 9: Hoare triple {1672#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1672#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,670 INFO L273 TraceCheckUtils]: 8: Hoare triple {1679#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1672#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,671 INFO L273 TraceCheckUtils]: 7: Hoare triple {1679#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {1679#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,675 INFO L273 TraceCheckUtils]: 6: Hoare triple {1463#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {1679#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:07,676 INFO L273 TraceCheckUtils]: 5: Hoare triple {1463#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1463#true} is VALID [2018-11-23 10:33:07,676 INFO L256 TraceCheckUtils]: 4: Hoare triple {1463#true} call #t~ret5 := main(); {1463#true} is VALID [2018-11-23 10:33:07,676 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1463#true} {1463#true} #63#return; {1463#true} is VALID [2018-11-23 10:33:07,676 INFO L273 TraceCheckUtils]: 2: Hoare triple {1463#true} assume true; {1463#true} is VALID [2018-11-23 10:33:07,677 INFO L273 TraceCheckUtils]: 1: Hoare triple {1463#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1463#true} is VALID [2018-11-23 10:33:07,677 INFO L256 TraceCheckUtils]: 0: Hoare triple {1463#true} call ULTIMATE.init(); {1463#true} is VALID [2018-11-23 10:33:07,680 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 10 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:33:07,682 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:07,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-11-23 10:33:07,683 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-11-23 10:33:07,684 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:07,684 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:33:07,885 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:07,885 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:33:07,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:33:07,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=161, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:33:07,886 INFO L87 Difference]: Start difference. First operand 41 states and 43 transitions. Second operand 16 states. [2018-11-23 10:33:10,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:10,074 INFO L93 Difference]: Finished difference Result 90 states and 96 transitions. [2018-11-23 10:33:10,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 10:33:10,074 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-11-23 10:33:10,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:10,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:33:10,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 83 transitions. [2018-11-23 10:33:10,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:33:10,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 83 transitions. [2018-11-23 10:33:10,083 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 83 transitions. [2018-11-23 10:33:10,287 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:10,288 INFO L225 Difference]: With dead ends: 90 [2018-11-23 10:33:10,289 INFO L226 Difference]: Without dead ends: 53 [2018-11-23 10:33:10,289 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=87, Invalid=185, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:33:10,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-23 10:33:10,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 45. [2018-11-23 10:33:10,382 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:10,382 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 45 states. [2018-11-23 10:33:10,383 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 45 states. [2018-11-23 10:33:10,383 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 45 states. [2018-11-23 10:33:10,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:10,387 INFO L93 Difference]: Finished difference Result 53 states and 56 transitions. [2018-11-23 10:33:10,387 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 56 transitions. [2018-11-23 10:33:10,387 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:10,388 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:10,388 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 53 states. [2018-11-23 10:33:10,388 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 53 states. [2018-11-23 10:33:10,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:10,391 INFO L93 Difference]: Finished difference Result 53 states and 56 transitions. [2018-11-23 10:33:10,391 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 56 transitions. [2018-11-23 10:33:10,391 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:10,392 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:10,392 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:10,392 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:10,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-11-23 10:33:10,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2018-11-23 10:33:10,394 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 47 transitions. Word has length 38 [2018-11-23 10:33:10,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:10,394 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 47 transitions. [2018-11-23 10:33:10,395 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:33:10,395 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 47 transitions. [2018-11-23 10:33:10,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-23 10:33:10,396 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:10,396 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:10,396 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:10,397 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:10,397 INFO L82 PathProgramCache]: Analyzing trace with hash -1193168612, now seen corresponding path program 3 times [2018-11-23 10:33:10,397 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:10,397 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:10,421 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:33:10,702 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:33:10,702 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:10,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:10,747 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:10,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:33:10,870 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:33:10,895 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:33:10,939 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:10,985 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:10,985 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:30, output treesize:26 [2018-11-23 10:33:11,105 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-23 10:33:11,178 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:11,191 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-11-23 10:33:11,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,209 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,237 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:26 [2018-11-23 10:33:11,249 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:33:11,250 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_21|, main_~val1~0]. (let ((.cse0 (select |v_#memory_int_21| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (store |v_#memory_int_21| |main_~#a~0.base| (store .cse0 (bvadd |main_~#a~0.offset| .cse1) main_~val1~0)) |#memory_int|))) [2018-11-23 10:33:11,250 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))) [2018-11-23 10:33:11,283 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:33:11,295 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:11,296 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:33:11,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,318 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,348 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,349 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-11-23 10:33:11,683 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 34 [2018-11-23 10:33:11,694 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:11,696 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:11,699 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:11,700 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 79 [2018-11-23 10:33:11,724 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,749 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:11,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:33:11,795 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:56, output treesize:52 [2018-11-23 10:33:11,814 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:33:11,814 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_23|, main_~i~0]. (let ((.cse0 (select |v_#memory_int_23| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= |#memory_int| (store |v_#memory_int_23| |main_~#a~0.base| (store .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32)) (_ bv3 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32))) (_ bv3 32)))) [2018-11-23 10:33:11,815 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [main_~i~0]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32))) (_ bv3 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (_ bv3 32)) (= |main_~#a~0.offset| (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)))) [2018-11-23 10:33:13,057 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-11-23 10:33:13,066 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:13,067 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:33:13,068 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:13,069 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:13,071 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 44 [2018-11-23 10:33:13,101 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:33:13,117 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:13,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:13,130 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:57, output treesize:11 [2018-11-23 10:33:13,139 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:33:13,139 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#a~0.base|, v_prenex_5]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) v_prenex_5))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= |main_#t~mem4| (select .cse0 (_ bv8 32))) (= (_ bv0 32) (bvadd (select .cse0 (bvadd .cse1 (_ bv4 32))) (_ bv4294967293 32))) (= (_ bv0 32) (bvadd (select .cse0 (bvadd .cse1 (_ bv12 32))) (_ bv4294967293 32))) (= (select .cse0 (bvadd .cse1 (_ bv8 32))) (_ bv3 32)))) [2018-11-23 10:33:13,139 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv0 32) (bvadd |main_#t~mem4| (_ bv4294967293 32)))) [2018-11-23 10:33:13,296 INFO L256 TraceCheckUtils]: 0: Hoare triple {1997#true} call ULTIMATE.init(); {1997#true} is VALID [2018-11-23 10:33:13,297 INFO L273 TraceCheckUtils]: 1: Hoare triple {1997#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1997#true} is VALID [2018-11-23 10:33:13,297 INFO L273 TraceCheckUtils]: 2: Hoare triple {1997#true} assume true; {1997#true} is VALID [2018-11-23 10:33:13,297 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1997#true} {1997#true} #63#return; {1997#true} is VALID [2018-11-23 10:33:13,297 INFO L256 TraceCheckUtils]: 4: Hoare triple {1997#true} call #t~ret5 := main(); {1997#true} is VALID [2018-11-23 10:33:13,297 INFO L273 TraceCheckUtils]: 5: Hoare triple {1997#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1997#true} is VALID [2018-11-23 10:33:13,307 INFO L273 TraceCheckUtils]: 6: Hoare triple {1997#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {2020#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:33:13,308 INFO L273 TraceCheckUtils]: 7: Hoare triple {2020#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {2020#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:33:13,309 INFO L273 TraceCheckUtils]: 8: Hoare triple {2020#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2020#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:33:13,311 INFO L273 TraceCheckUtils]: 9: Hoare triple {2020#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2030#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} is VALID [2018-11-23 10:33:15,328 INFO L273 TraceCheckUtils]: 10: Hoare triple {2030#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2034#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is UNKNOWN [2018-11-23 10:33:15,329 INFO L273 TraceCheckUtils]: 11: Hoare triple {2034#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !!~bvsge32(~i~0, 4294967295bv32); {2034#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:33:15,331 INFO L273 TraceCheckUtils]: 12: Hoare triple {2034#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2034#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:33:15,333 INFO L273 TraceCheckUtils]: 13: Hoare triple {2034#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2044#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} is VALID [2018-11-23 10:33:15,897 INFO L273 TraceCheckUtils]: 14: Hoare triple {2044#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2048#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:33:15,898 INFO L273 TraceCheckUtils]: 15: Hoare triple {2048#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !!~bvsge32(~i~0, 4294967295bv32); {2052#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:33:15,899 INFO L273 TraceCheckUtils]: 16: Hoare triple {2052#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !~bvsge32(~i~0, 0bv32); {2056#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:33:15,902 INFO L273 TraceCheckUtils]: 17: Hoare triple {2056#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2060#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:33:15,903 INFO L273 TraceCheckUtils]: 18: Hoare triple {2060#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2060#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:33:15,904 INFO L273 TraceCheckUtils]: 19: Hoare triple {2060#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvsge32(~i~0, 4294967295bv32); {2060#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:33:15,908 INFO L273 TraceCheckUtils]: 20: Hoare triple {2060#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv4294967295 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} is VALID [2018-11-23 10:33:15,912 INFO L273 TraceCheckUtils]: 21: Hoare triple {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} is VALID [2018-11-23 10:33:15,917 INFO L256 TraceCheckUtils]: 22: Hoare triple {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,919 INFO L273 TraceCheckUtils]: 23: Hoare triple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} ~cond := #in~cond; {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,920 INFO L273 TraceCheckUtils]: 24: Hoare triple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,920 INFO L273 TraceCheckUtils]: 25: Hoare triple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} assume true; {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,921 INFO L268 TraceCheckUtils]: 26: Hoare quadruple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} #67#return; {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} is VALID [2018-11-23 10:33:15,925 INFO L273 TraceCheckUtils]: 27: Hoare triple {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} havoc #t~mem4; {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} is VALID [2018-11-23 10:33:15,929 INFO L273 TraceCheckUtils]: 28: Hoare triple {2070#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:15,933 INFO L273 TraceCheckUtils]: 29: Hoare triple {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:15,938 INFO L256 TraceCheckUtils]: 30: Hoare triple {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,938 INFO L273 TraceCheckUtils]: 31: Hoare triple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} ~cond := #in~cond; {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,939 INFO L273 TraceCheckUtils]: 32: Hoare triple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,939 INFO L273 TraceCheckUtils]: 33: Hoare triple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} assume true; {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:33:15,948 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {2077#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32)) (v_prenex_5 (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32))) (_ bv4294967293 32)) (_ bv0 32))))} {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #67#return; {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:15,949 INFO L273 TraceCheckUtils]: 35: Hoare triple {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4; {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:15,950 INFO L273 TraceCheckUtils]: 36: Hoare triple {2096#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2121#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:15,954 INFO L273 TraceCheckUtils]: 37: Hoare triple {2121#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_5 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv8 32)))) (bvsge v_prenex_5 (_ bv4294967295 32)) (not (bvsge v_prenex_5 (_ bv0 32))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_5) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2125#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} is VALID [2018-11-23 10:33:15,955 INFO L256 TraceCheckUtils]: 38: Hoare triple {2125#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2129#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:15,955 INFO L273 TraceCheckUtils]: 39: Hoare triple {2129#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {2133#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:15,956 INFO L273 TraceCheckUtils]: 40: Hoare triple {2133#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {1998#false} is VALID [2018-11-23 10:33:15,956 INFO L273 TraceCheckUtils]: 41: Hoare triple {1998#false} assume !false; {1998#false} is VALID [2018-11-23 10:33:15,968 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:33:15,968 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:23,447 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-23 10:33:23,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 27 [2018-11-23 10:33:23,533 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-23 10:33:23,534 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:33:23,542 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:33:23,543 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-23 10:33:23,545 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:33:23,557 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:23,562 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:23,576 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:33:23,576 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:37, output treesize:3 [2018-11-23 10:33:23,591 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:33:23,591 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#a~0.base|, main_~i~0]. (let ((.cse1 (bvadd main_~i~0 (_ bv4294967294 32)))) (or (bvsge (select (let ((.cse0 (bvmul (_ bv4 32) main_~i~0))) (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| .cse0 (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| .cse0 (_ bv4294967292 32)) main_~val2~0)) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge .cse1 (_ bv0 32)) (not (bvsge .cse1 (_ bv4294967295 32))))) [2018-11-23 10:33:23,592 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (bvsge main_~val2~0 main_~low~0) [2018-11-23 10:33:23,667 INFO L273 TraceCheckUtils]: 41: Hoare triple {1998#false} assume !false; {1998#false} is VALID [2018-11-23 10:33:23,668 INFO L273 TraceCheckUtils]: 40: Hoare triple {2143#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {1998#false} is VALID [2018-11-23 10:33:23,669 INFO L273 TraceCheckUtils]: 39: Hoare triple {2147#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {2143#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:33:23,670 INFO L256 TraceCheckUtils]: 38: Hoare triple {2151#(bvsge |main_#t~mem4| main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2147#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:33:23,670 INFO L273 TraceCheckUtils]: 37: Hoare triple {2155#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2151#(bvsge |main_#t~mem4| main_~low~0)} is VALID [2018-11-23 10:33:25,694 INFO L273 TraceCheckUtils]: 36: Hoare triple {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2155#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is UNKNOWN [2018-11-23 10:33:25,694 INFO L273 TraceCheckUtils]: 35: Hoare triple {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} havoc #t~mem4; {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:33:25,695 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {1997#true} {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #67#return; {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:33:25,695 INFO L273 TraceCheckUtils]: 33: Hoare triple {1997#true} assume true; {1997#true} is VALID [2018-11-23 10:33:25,695 INFO L273 TraceCheckUtils]: 32: Hoare triple {1997#true} assume !(0bv32 == ~cond); {1997#true} is VALID [2018-11-23 10:33:25,696 INFO L273 TraceCheckUtils]: 31: Hoare triple {1997#true} ~cond := #in~cond; {1997#true} is VALID [2018-11-23 10:33:25,696 INFO L256 TraceCheckUtils]: 30: Hoare triple {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1997#true} is VALID [2018-11-23 10:33:25,697 INFO L273 TraceCheckUtils]: 29: Hoare triple {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,714 INFO L273 TraceCheckUtils]: 28: Hoare triple {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2159#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is UNKNOWN [2018-11-23 10:33:27,714 INFO L273 TraceCheckUtils]: 27: Hoare triple {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} havoc #t~mem4; {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,715 INFO L268 TraceCheckUtils]: 26: Hoare quadruple {1997#true} {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} #67#return; {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,715 INFO L273 TraceCheckUtils]: 25: Hoare triple {1997#true} assume true; {1997#true} is VALID [2018-11-23 10:33:27,716 INFO L273 TraceCheckUtils]: 24: Hoare triple {1997#true} assume !(0bv32 == ~cond); {1997#true} is VALID [2018-11-23 10:33:27,716 INFO L273 TraceCheckUtils]: 23: Hoare triple {1997#true} ~cond := #in~cond; {1997#true} is VALID [2018-11-23 10:33:27,716 INFO L256 TraceCheckUtils]: 22: Hoare triple {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1997#true} is VALID [2018-11-23 10:33:27,716 INFO L273 TraceCheckUtils]: 21: Hoare triple {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,717 INFO L273 TraceCheckUtils]: 20: Hoare triple {2209#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} ~i~0 := 0bv32; {2184#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,717 INFO L273 TraceCheckUtils]: 19: Hoare triple {2209#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} assume !~bvsge32(~i~0, 4294967295bv32); {2209#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,717 INFO L273 TraceCheckUtils]: 18: Hoare triple {2209#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2209#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,762 INFO L273 TraceCheckUtils]: 17: Hoare triple {2219#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2209#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,762 INFO L273 TraceCheckUtils]: 16: Hoare triple {2223#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0))} assume !~bvsge32(~i~0, 0bv32); {2219#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:33:27,763 INFO L273 TraceCheckUtils]: 15: Hoare triple {2227#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (not (bvsge main_~i~0 (_ bv4294967295 32))))} assume !!~bvsge32(~i~0, 4294967295bv32); {2223#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0))} is VALID [2018-11-23 10:33:27,774 INFO L273 TraceCheckUtils]: 14: Hoare triple {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2227#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (not (bvsge main_~i~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:33:27,784 INFO L273 TraceCheckUtils]: 13: Hoare triple {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:27,795 INFO L273 TraceCheckUtils]: 12: Hoare triple {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:27,796 INFO L273 TraceCheckUtils]: 11: Hoare triple {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:27,806 INFO L273 TraceCheckUtils]: 10: Hoare triple {2244#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv4294967295 32))))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2231#(or (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv4294967295 32))) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:27,830 INFO L273 TraceCheckUtils]: 9: Hoare triple {2248#(bvsge main_~val2~0 main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2244#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv8 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv4294967295 32))))} is VALID [2018-11-23 10:33:27,830 INFO L273 TraceCheckUtils]: 8: Hoare triple {2248#(bvsge main_~val2~0 main_~low~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2248#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:33:27,831 INFO L273 TraceCheckUtils]: 7: Hoare triple {2248#(bvsge main_~val2~0 main_~low~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {2248#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:33:27,832 INFO L273 TraceCheckUtils]: 6: Hoare triple {1997#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {2248#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:33:27,832 INFO L273 TraceCheckUtils]: 5: Hoare triple {1997#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1997#true} is VALID [2018-11-23 10:33:27,832 INFO L256 TraceCheckUtils]: 4: Hoare triple {1997#true} call #t~ret5 := main(); {1997#true} is VALID [2018-11-23 10:33:27,832 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1997#true} {1997#true} #63#return; {1997#true} is VALID [2018-11-23 10:33:27,833 INFO L273 TraceCheckUtils]: 2: Hoare triple {1997#true} assume true; {1997#true} is VALID [2018-11-23 10:33:27,833 INFO L273 TraceCheckUtils]: 1: Hoare triple {1997#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1997#true} is VALID [2018-11-23 10:33:27,833 INFO L256 TraceCheckUtils]: 0: Hoare triple {1997#true} call ULTIMATE.init(); {1997#true} is VALID [2018-11-23 10:33:27,838 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:33:27,839 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:27,840 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15] total 30 [2018-11-23 10:33:27,840 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-11-23 10:33:27,841 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:27,841 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 30 states. [2018-11-23 10:33:34,625 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 68 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:34,625 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-11-23 10:33:34,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-11-23 10:33:34,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=144, Invalid=724, Unknown=2, NotChecked=0, Total=870 [2018-11-23 10:33:34,626 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. Second operand 30 states. [2018-11-23 10:33:45,511 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 37 [2018-11-23 10:33:50,540 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2018-11-23 10:33:50,969 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2018-11-23 10:33:51,633 WARN L180 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 37 [2018-11-23 10:33:56,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:56,850 INFO L93 Difference]: Finished difference Result 62 states and 65 transitions. [2018-11-23 10:33:56,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 10:33:56,851 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-11-23 10:33:56,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:56,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 10:33:56,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 59 transitions. [2018-11-23 10:33:56,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 10:33:56,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 59 transitions. [2018-11-23 10:33:56,856 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 59 transitions. [2018-11-23 10:33:59,811 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 58 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:59,813 INFO L225 Difference]: With dead ends: 62 [2018-11-23 10:33:59,813 INFO L226 Difference]: Without dead ends: 60 [2018-11-23 10:33:59,814 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 52 SyntacticMatches, 4 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 577 ImplicationChecksByTransitivity, 11.3s TimeCoverageRelationStatistics Valid=470, Invalid=1978, Unknown=2, NotChecked=0, Total=2450 [2018-11-23 10:33:59,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-11-23 10:33:59,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 53. [2018-11-23 10:33:59,936 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:59,936 INFO L82 GeneralOperation]: Start isEquivalent. First operand 60 states. Second operand 53 states. [2018-11-23 10:33:59,936 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand 53 states. [2018-11-23 10:33:59,937 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 53 states. [2018-11-23 10:33:59,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:59,940 INFO L93 Difference]: Finished difference Result 60 states and 63 transitions. [2018-11-23 10:33:59,940 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 63 transitions. [2018-11-23 10:33:59,941 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:59,941 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:59,941 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 60 states. [2018-11-23 10:33:59,941 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 60 states. [2018-11-23 10:33:59,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:59,944 INFO L93 Difference]: Finished difference Result 60 states and 63 transitions. [2018-11-23 10:33:59,944 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 63 transitions. [2018-11-23 10:33:59,944 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:59,944 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:59,945 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:59,945 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:59,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-11-23 10:33:59,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 55 transitions. [2018-11-23 10:33:59,947 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 55 transitions. Word has length 42 [2018-11-23 10:33:59,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:59,947 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 55 transitions. [2018-11-23 10:33:59,947 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-11-23 10:33:59,948 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 55 transitions. [2018-11-23 10:33:59,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-23 10:33:59,949 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:59,949 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:59,949 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:59,949 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:59,949 INFO L82 PathProgramCache]: Analyzing trace with hash 33741007, now seen corresponding path program 4 times [2018-11-23 10:33:59,950 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:59,950 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:59,970 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:34:00,023 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:34:00,023 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:34:00,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:34:00,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:34:00,392 INFO L256 TraceCheckUtils]: 0: Hoare triple {2594#true} call ULTIMATE.init(); {2594#true} is VALID [2018-11-23 10:34:00,392 INFO L273 TraceCheckUtils]: 1: Hoare triple {2594#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2594#true} is VALID [2018-11-23 10:34:00,392 INFO L273 TraceCheckUtils]: 2: Hoare triple {2594#true} assume true; {2594#true} is VALID [2018-11-23 10:34:00,393 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2594#true} {2594#true} #63#return; {2594#true} is VALID [2018-11-23 10:34:00,393 INFO L256 TraceCheckUtils]: 4: Hoare triple {2594#true} call #t~ret5 := main(); {2594#true} is VALID [2018-11-23 10:34:00,393 INFO L273 TraceCheckUtils]: 5: Hoare triple {2594#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2594#true} is VALID [2018-11-23 10:34:00,403 INFO L273 TraceCheckUtils]: 6: Hoare triple {2594#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:34:00,403 INFO L273 TraceCheckUtils]: 7: Hoare triple {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:34:00,404 INFO L273 TraceCheckUtils]: 8: Hoare triple {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:34:00,404 INFO L273 TraceCheckUtils]: 9: Hoare triple {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:34:00,429 INFO L273 TraceCheckUtils]: 10: Hoare triple {2617#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2630#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} is VALID [2018-11-23 10:34:00,430 INFO L273 TraceCheckUtils]: 11: Hoare triple {2630#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {2630#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} is VALID [2018-11-23 10:34:00,430 INFO L273 TraceCheckUtils]: 12: Hoare triple {2630#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2637#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:34:00,433 INFO L273 TraceCheckUtils]: 13: Hoare triple {2637#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2637#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:34:00,461 INFO L273 TraceCheckUtils]: 14: Hoare triple {2637#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2644#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:34:00,461 INFO L273 TraceCheckUtils]: 15: Hoare triple {2644#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} assume !!~bvsge32(~i~0, 4294967295bv32); {2644#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:34:00,464 INFO L273 TraceCheckUtils]: 16: Hoare triple {2644#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} assume !~bvsge32(~i~0, 0bv32); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,465 INFO L273 TraceCheckUtils]: 17: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,466 INFO L273 TraceCheckUtils]: 18: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,466 INFO L273 TraceCheckUtils]: 19: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !~bvsge32(~i~0, 4294967295bv32); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,467 INFO L273 TraceCheckUtils]: 20: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} ~i~0 := 0bv32; {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,467 INFO L273 TraceCheckUtils]: 21: Hoare triple {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,468 INFO L256 TraceCheckUtils]: 22: Hoare triple {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,468 INFO L273 TraceCheckUtils]: 23: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} ~cond := #in~cond; {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,469 INFO L273 TraceCheckUtils]: 24: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,470 INFO L273 TraceCheckUtils]: 25: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume true; {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,470 INFO L268 TraceCheckUtils]: 26: Hoare quadruple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} #67#return; {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,471 INFO L273 TraceCheckUtils]: 27: Hoare triple {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} havoc #t~mem4; {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,472 INFO L273 TraceCheckUtils]: 28: Hoare triple {2664#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,473 INFO L273 TraceCheckUtils]: 29: Hoare triple {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,474 INFO L256 TraceCheckUtils]: 30: Hoare triple {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,475 INFO L273 TraceCheckUtils]: 31: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} ~cond := #in~cond; {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,476 INFO L273 TraceCheckUtils]: 32: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,477 INFO L273 TraceCheckUtils]: 33: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume true; {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,477 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #67#return; {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,478 INFO L273 TraceCheckUtils]: 35: Hoare triple {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4; {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,479 INFO L273 TraceCheckUtils]: 36: Hoare triple {2689#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:00,480 INFO L273 TraceCheckUtils]: 37: Hoare triple {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:00,481 INFO L256 TraceCheckUtils]: 38: Hoare triple {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,482 INFO L273 TraceCheckUtils]: 39: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} ~cond := #in~cond; {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,483 INFO L273 TraceCheckUtils]: 40: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,484 INFO L273 TraceCheckUtils]: 41: Hoare triple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume true; {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,484 INFO L268 TraceCheckUtils]: 42: Hoare quadruple {2651#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #67#return; {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:00,485 INFO L273 TraceCheckUtils]: 43: Hoare triple {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} havoc #t~mem4; {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:00,488 INFO L273 TraceCheckUtils]: 44: Hoare triple {2714#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2739#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:00,490 INFO L273 TraceCheckUtils]: 45: Hoare triple {2739#(and (not (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd ~SIZE~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2595#false} is VALID [2018-11-23 10:34:00,491 INFO L256 TraceCheckUtils]: 46: Hoare triple {2595#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2595#false} is VALID [2018-11-23 10:34:00,491 INFO L273 TraceCheckUtils]: 47: Hoare triple {2595#false} ~cond := #in~cond; {2595#false} is VALID [2018-11-23 10:34:00,491 INFO L273 TraceCheckUtils]: 48: Hoare triple {2595#false} assume 0bv32 == ~cond; {2595#false} is VALID [2018-11-23 10:34:00,491 INFO L273 TraceCheckUtils]: 49: Hoare triple {2595#false} assume !false; {2595#false} is VALID [2018-11-23 10:34:00,499 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 9 proven. 30 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:34:00,499 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:34:01,066 INFO L273 TraceCheckUtils]: 49: Hoare triple {2595#false} assume !false; {2595#false} is VALID [2018-11-23 10:34:01,067 INFO L273 TraceCheckUtils]: 48: Hoare triple {2595#false} assume 0bv32 == ~cond; {2595#false} is VALID [2018-11-23 10:34:01,067 INFO L273 TraceCheckUtils]: 47: Hoare triple {2595#false} ~cond := #in~cond; {2595#false} is VALID [2018-11-23 10:34:01,067 INFO L256 TraceCheckUtils]: 46: Hoare triple {2595#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2595#false} is VALID [2018-11-23 10:34:01,067 INFO L273 TraceCheckUtils]: 45: Hoare triple {2767#(not (bvslt main_~i~0 ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2595#false} is VALID [2018-11-23 10:34:01,068 INFO L273 TraceCheckUtils]: 44: Hoare triple {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2767#(not (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-23 10:34:01,069 INFO L273 TraceCheckUtils]: 43: Hoare triple {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} havoc #t~mem4; {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,069 INFO L268 TraceCheckUtils]: 42: Hoare quadruple {2594#true} {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #67#return; {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,069 INFO L273 TraceCheckUtils]: 41: Hoare triple {2594#true} assume true; {2594#true} is VALID [2018-11-23 10:34:01,070 INFO L273 TraceCheckUtils]: 40: Hoare triple {2594#true} assume !(0bv32 == ~cond); {2594#true} is VALID [2018-11-23 10:34:01,070 INFO L273 TraceCheckUtils]: 39: Hoare triple {2594#true} ~cond := #in~cond; {2594#true} is VALID [2018-11-23 10:34:01,070 INFO L256 TraceCheckUtils]: 38: Hoare triple {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2594#true} is VALID [2018-11-23 10:34:01,070 INFO L273 TraceCheckUtils]: 37: Hoare triple {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,095 INFO L273 TraceCheckUtils]: 36: Hoare triple {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2771#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,096 INFO L273 TraceCheckUtils]: 35: Hoare triple {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} havoc #t~mem4; {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,096 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {2594#true} {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #67#return; {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,097 INFO L273 TraceCheckUtils]: 33: Hoare triple {2594#true} assume true; {2594#true} is VALID [2018-11-23 10:34:01,097 INFO L273 TraceCheckUtils]: 32: Hoare triple {2594#true} assume !(0bv32 == ~cond); {2594#true} is VALID [2018-11-23 10:34:01,097 INFO L273 TraceCheckUtils]: 31: Hoare triple {2594#true} ~cond := #in~cond; {2594#true} is VALID [2018-11-23 10:34:01,097 INFO L256 TraceCheckUtils]: 30: Hoare triple {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2594#true} is VALID [2018-11-23 10:34:01,098 INFO L273 TraceCheckUtils]: 29: Hoare triple {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,130 INFO L273 TraceCheckUtils]: 28: Hoare triple {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2796#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,131 INFO L273 TraceCheckUtils]: 27: Hoare triple {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} havoc #t~mem4; {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,131 INFO L268 TraceCheckUtils]: 26: Hoare quadruple {2594#true} {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} #67#return; {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,132 INFO L273 TraceCheckUtils]: 25: Hoare triple {2594#true} assume true; {2594#true} is VALID [2018-11-23 10:34:01,132 INFO L273 TraceCheckUtils]: 24: Hoare triple {2594#true} assume !(0bv32 == ~cond); {2594#true} is VALID [2018-11-23 10:34:01,132 INFO L273 TraceCheckUtils]: 23: Hoare triple {2594#true} ~cond := #in~cond; {2594#true} is VALID [2018-11-23 10:34:01,132 INFO L256 TraceCheckUtils]: 22: Hoare triple {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2594#true} is VALID [2018-11-23 10:34:01,134 INFO L273 TraceCheckUtils]: 21: Hoare triple {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,135 INFO L273 TraceCheckUtils]: 20: Hoare triple {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} ~i~0 := 0bv32; {2821#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:34:01,135 INFO L273 TraceCheckUtils]: 19: Hoare triple {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} assume !~bvsge32(~i~0, 4294967295bv32); {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-23 10:34:01,135 INFO L273 TraceCheckUtils]: 18: Hoare triple {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-23 10:34:01,136 INFO L273 TraceCheckUtils]: 17: Hoare triple {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-23 10:34:01,136 INFO L273 TraceCheckUtils]: 16: Hoare triple {2859#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} assume !~bvsge32(~i~0, 0bv32); {2846#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-23 10:34:01,136 INFO L273 TraceCheckUtils]: 15: Hoare triple {2859#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {2859#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:34:01,138 INFO L273 TraceCheckUtils]: 14: Hoare triple {2866#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2859#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:34:01,138 INFO L273 TraceCheckUtils]: 13: Hoare triple {2866#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2866#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,139 INFO L273 TraceCheckUtils]: 12: Hoare triple {2873#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2866#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,139 INFO L273 TraceCheckUtils]: 11: Hoare triple {2873#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {2873#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,143 INFO L273 TraceCheckUtils]: 10: Hoare triple {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {2873#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,143 INFO L273 TraceCheckUtils]: 9: Hoare triple {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,144 INFO L273 TraceCheckUtils]: 8: Hoare triple {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,144 INFO L273 TraceCheckUtils]: 7: Hoare triple {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,147 INFO L273 TraceCheckUtils]: 6: Hoare triple {2594#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {2880#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:01,148 INFO L273 TraceCheckUtils]: 5: Hoare triple {2594#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2594#true} is VALID [2018-11-23 10:34:01,148 INFO L256 TraceCheckUtils]: 4: Hoare triple {2594#true} call #t~ret5 := main(); {2594#true} is VALID [2018-11-23 10:34:01,148 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2594#true} {2594#true} #63#return; {2594#true} is VALID [2018-11-23 10:34:01,148 INFO L273 TraceCheckUtils]: 2: Hoare triple {2594#true} assume true; {2594#true} is VALID [2018-11-23 10:34:01,148 INFO L273 TraceCheckUtils]: 1: Hoare triple {2594#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2594#true} is VALID [2018-11-23 10:34:01,148 INFO L256 TraceCheckUtils]: 0: Hoare triple {2594#true} call ULTIMATE.init(); {2594#true} is VALID [2018-11-23 10:34:01,152 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 16 proven. 23 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:34:01,153 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:34:01,153 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-23 10:34:01,154 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 50 [2018-11-23 10:34:01,154 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:34:01,154 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 10:34:01,409 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:34:01,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 10:34:01,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 10:34:01,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=266, Unknown=0, NotChecked=0, Total=380 [2018-11-23 10:34:01,410 INFO L87 Difference]: Start difference. First operand 53 states and 55 transitions. Second operand 20 states. [2018-11-23 10:34:06,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:06,345 INFO L93 Difference]: Finished difference Result 148 states and 158 transitions. [2018-11-23 10:34:06,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 10:34:06,345 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 50 [2018-11-23 10:34:06,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:34:06,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:34:06,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 131 transitions. [2018-11-23 10:34:06,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:34:06,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 131 transitions. [2018-11-23 10:34:06,365 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 131 transitions. [2018-11-23 10:34:06,862 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:34:06,864 INFO L225 Difference]: With dead ends: 148 [2018-11-23 10:34:06,864 INFO L226 Difference]: Without dead ends: 70 [2018-11-23 10:34:06,865 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=268, Invalid=602, Unknown=0, NotChecked=0, Total=870 [2018-11-23 10:34:06,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-11-23 10:34:07,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 58. [2018-11-23 10:34:07,014 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:34:07,015 INFO L82 GeneralOperation]: Start isEquivalent. First operand 70 states. Second operand 58 states. [2018-11-23 10:34:07,015 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand 58 states. [2018-11-23 10:34:07,015 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 58 states. [2018-11-23 10:34:07,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:07,019 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2018-11-23 10:34:07,019 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 74 transitions. [2018-11-23 10:34:07,019 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:34:07,020 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:34:07,020 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand 70 states. [2018-11-23 10:34:07,020 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 70 states. [2018-11-23 10:34:07,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:07,022 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2018-11-23 10:34:07,022 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 74 transitions. [2018-11-23 10:34:07,023 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:34:07,023 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:34:07,023 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:34:07,023 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:34:07,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-11-23 10:34:07,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 61 transitions. [2018-11-23 10:34:07,024 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 61 transitions. Word has length 50 [2018-11-23 10:34:07,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:34:07,025 INFO L480 AbstractCegarLoop]: Abstraction has 58 states and 61 transitions. [2018-11-23 10:34:07,025 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 10:34:07,025 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 61 transitions. [2018-11-23 10:34:07,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-23 10:34:07,026 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:34:07,026 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:34:07,026 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:34:07,026 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:34:07,027 INFO L82 PathProgramCache]: Analyzing trace with hash 581379210, now seen corresponding path program 5 times [2018-11-23 10:34:07,027 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:34:07,027 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:34:07,045 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2018-11-23 10:34:07,440 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-11-23 10:34:07,440 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:34:07,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:34:07,507 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:34:07,551 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:34:07,561 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:34:07,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,569 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,593 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:30, output treesize:26 [2018-11-23 10:34:07,702 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-23 10:34:07,714 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:07,719 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-11-23 10:34:07,723 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,740 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,769 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,769 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:41, output treesize:37 [2018-11-23 10:34:07,853 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-11-23 10:34:07,869 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:07,872 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:07,874 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:07,881 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-11-23 10:34:07,886 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,913 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,949 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:07,950 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-11-23 10:34:08,169 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-11-23 10:34:08,185 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,187 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,191 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,193 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,195 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,197 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,215 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 126 [2018-11-23 10:34:08,222 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:08,262 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:08,314 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:08,315 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-11-23 10:34:08,476 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-11-23 10:34:08,507 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,512 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,516 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,521 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,525 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,528 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:08,571 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 129 [2018-11-23 10:34:08,576 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:08,629 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:08,678 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:08,678 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:77, output treesize:53 [2018-11-23 10:34:08,706 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:34:08,706 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_38|]. (let ((.cse2 (bvmul (_ bv4 32) main_~i~0))) (let ((.cse1 (bvadd |main_~#a~0.offset| .cse2 (_ bv4 32))) (.cse0 (select |v_#memory_int_38| |main_~#a~0.base|))) (and (= (store |v_#memory_int_38| |main_~#a~0.base| (store .cse0 .cse1 main_~val2~0)) |#memory_int|) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse2)) (select .cse0 .cse1)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse2 (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse2 (_ bv12 32))))))) [2018-11-23 10:34:08,706 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) main_~val2~0))) [2018-11-23 10:34:09,110 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 44 [2018-11-23 10:34:09,126 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:09,128 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:09,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:09,132 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:09,134 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:09,136 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:09,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 133 [2018-11-23 10:34:09,142 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:09,188 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:09,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:34:09,239 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:70, output treesize:66 [2018-11-23 10:34:09,266 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:34:09,267 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_39|, main_~i~0]. (let ((.cse0 (select |v_#memory_int_39| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32))) (_ bv3 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (store |v_#memory_int_39| |main_~#a~0.base| (store .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32)) (_ bv3 32))) |#memory_int|) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= (_ bv3 32) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv16 32)))))) [2018-11-23 10:34:09,267 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [main_~i~0]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv16 32))) (_ bv3 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32))) (_ bv3 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (_ bv3 32)) (= |main_~#a~0.offset| (_ bv0 32)))) [2018-11-23 10:34:11,437 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 48 [2018-11-23 10:34:11,452 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,453 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,455 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,456 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,458 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,459 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,461 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,463 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,464 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:11,465 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:11,468 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 112 [2018-11-23 10:34:11,475 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:11,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:11,545 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:11,546 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:72, output treesize:11 [2018-11-23 10:34:11,555 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:34:11,555 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#a~0.base|, v_prenex_8]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) v_prenex_8))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv0 32) (bvadd (select .cse0 (bvadd .cse1 (_ bv4 32))) (_ bv4294967293 32))) (= (select .cse0 (bvadd .cse1 (_ bv8 32))) (_ bv3 32)) (= (bvadd (select .cse0 (bvadd .cse1 (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (select .cse0 (_ bv12 32)) |main_#t~mem4|) (not (bvsge v_prenex_8 (_ bv0 32))) (= (bvadd (select .cse0 (bvadd .cse1 (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)))) [2018-11-23 10:34:11,555 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv0 32) (bvadd |main_#t~mem4| (_ bv4294967293 32)))) [2018-11-23 10:34:11,731 INFO L256 TraceCheckUtils]: 0: Hoare triple {3351#true} call ULTIMATE.init(); {3351#true} is VALID [2018-11-23 10:34:11,732 INFO L273 TraceCheckUtils]: 1: Hoare triple {3351#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3351#true} is VALID [2018-11-23 10:34:11,732 INFO L273 TraceCheckUtils]: 2: Hoare triple {3351#true} assume true; {3351#true} is VALID [2018-11-23 10:34:11,732 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3351#true} {3351#true} #63#return; {3351#true} is VALID [2018-11-23 10:34:11,732 INFO L256 TraceCheckUtils]: 4: Hoare triple {3351#true} call #t~ret5 := main(); {3351#true} is VALID [2018-11-23 10:34:11,732 INFO L273 TraceCheckUtils]: 5: Hoare triple {3351#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3351#true} is VALID [2018-11-23 10:34:11,733 INFO L273 TraceCheckUtils]: 6: Hoare triple {3351#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {3374#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:34:11,733 INFO L273 TraceCheckUtils]: 7: Hoare triple {3374#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {3374#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:34:11,734 INFO L273 TraceCheckUtils]: 8: Hoare triple {3374#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3374#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:34:11,736 INFO L273 TraceCheckUtils]: 9: Hoare triple {3374#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3384#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} is VALID [2018-11-23 10:34:13,745 INFO L273 TraceCheckUtils]: 10: Hoare triple {3384#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3388#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is UNKNOWN [2018-11-23 10:34:13,746 INFO L273 TraceCheckUtils]: 11: Hoare triple {3388#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !!~bvsge32(~i~0, 4294967295bv32); {3388#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:13,749 INFO L273 TraceCheckUtils]: 12: Hoare triple {3388#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3395#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:13,752 INFO L273 TraceCheckUtils]: 13: Hoare triple {3395#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3399#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} is VALID [2018-11-23 10:34:13,955 INFO L273 TraceCheckUtils]: 14: Hoare triple {3399#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3403#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:13,957 INFO L273 TraceCheckUtils]: 15: Hoare triple {3403#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !!~bvsge32(~i~0, 4294967295bv32); {3403#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:13,961 INFO L273 TraceCheckUtils]: 16: Hoare triple {3403#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3410#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:13,964 INFO L273 TraceCheckUtils]: 17: Hoare triple {3410#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3414#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} is VALID [2018-11-23 10:34:14,349 INFO L273 TraceCheckUtils]: 18: Hoare triple {3414#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val2~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3418#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:14,351 INFO L273 TraceCheckUtils]: 19: Hoare triple {3418#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !!~bvsge32(~i~0, 4294967295bv32); {3418#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:14,353 INFO L273 TraceCheckUtils]: 20: Hoare triple {3418#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} assume !~bvsge32(~i~0, 0bv32); {3425#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} is VALID [2018-11-23 10:34:14,359 INFO L273 TraceCheckUtils]: 21: Hoare triple {3425#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3429#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:34:14,365 INFO L273 TraceCheckUtils]: 22: Hoare triple {3429#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3429#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:34:14,369 INFO L273 TraceCheckUtils]: 23: Hoare triple {3429#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvsge32(~i~0, 4294967295bv32); {3429#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:34:14,373 INFO L273 TraceCheckUtils]: 24: Hoare triple {3429#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (and (not (bvsge main_~i~0 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} is VALID [2018-11-23 10:34:14,375 INFO L273 TraceCheckUtils]: 25: Hoare triple {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} is VALID [2018-11-23 10:34:14,380 INFO L256 TraceCheckUtils]: 26: Hoare triple {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,381 INFO L273 TraceCheckUtils]: 27: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} ~cond := #in~cond; {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,381 INFO L273 TraceCheckUtils]: 28: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} assume !(0bv32 == ~cond); {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,381 INFO L273 TraceCheckUtils]: 29: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} assume true; {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,382 INFO L268 TraceCheckUtils]: 30: Hoare quadruple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} #67#return; {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} is VALID [2018-11-23 10:34:14,383 INFO L273 TraceCheckUtils]: 31: Hoare triple {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} havoc #t~mem4; {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} is VALID [2018-11-23 10:34:14,384 INFO L273 TraceCheckUtils]: 32: Hoare triple {3439#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:14,388 INFO L273 TraceCheckUtils]: 33: Hoare triple {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:14,393 INFO L256 TraceCheckUtils]: 34: Hoare triple {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,394 INFO L273 TraceCheckUtils]: 35: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} ~cond := #in~cond; {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,394 INFO L273 TraceCheckUtils]: 36: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} assume !(0bv32 == ~cond); {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,394 INFO L273 TraceCheckUtils]: 37: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} assume true; {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,402 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #67#return; {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:14,407 INFO L273 TraceCheckUtils]: 39: Hoare triple {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4; {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:14,408 INFO L273 TraceCheckUtils]: 40: Hoare triple {3465#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:14,409 INFO L273 TraceCheckUtils]: 41: Hoare triple {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:14,413 INFO L256 TraceCheckUtils]: 42: Hoare triple {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,414 INFO L273 TraceCheckUtils]: 43: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} ~cond := #in~cond; {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,414 INFO L273 TraceCheckUtils]: 44: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} assume !(0bv32 == ~cond); {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,414 INFO L273 TraceCheckUtils]: 45: Hoare triple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} assume true; {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} is VALID [2018-11-23 10:34:14,415 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {3446#(exists ((v_prenex_8 (_ BitVec 32)) (|v_main_~#a~0.base_BEFORE_CALL_7| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32)))) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_7|) (bvadd (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))))))} {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} #67#return; {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:14,416 INFO L273 TraceCheckUtils]: 47: Hoare triple {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} havoc #t~mem4; {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:34:14,420 INFO L273 TraceCheckUtils]: 48: Hoare triple {3490#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))) (= (_ bv2 32) main_~i~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3515#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} is VALID [2018-11-23 10:34:14,424 INFO L273 TraceCheckUtils]: 49: Hoare triple {3515#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (exists ((v_prenex_8 (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv8 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv12 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_8 (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) v_prenex_8) (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge v_prenex_8 (_ bv0 32))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3519#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} is VALID [2018-11-23 10:34:14,425 INFO L256 TraceCheckUtils]: 50: Hoare triple {3519#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3523#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:34:14,426 INFO L273 TraceCheckUtils]: 51: Hoare triple {3523#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {3527#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:34:14,426 INFO L273 TraceCheckUtils]: 52: Hoare triple {3527#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {3352#false} is VALID [2018-11-23 10:34:14,427 INFO L273 TraceCheckUtils]: 53: Hoare triple {3352#false} assume !false; {3352#false} is VALID [2018-11-23 10:34:14,449 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 15 proven. 37 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:34:14,449 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:34:29,515 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 39 [2018-11-23 10:34:29,522 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 43 [2018-11-23 10:34:29,533 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 59 [2018-11-23 10:34:29,560 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,560 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,561 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,573 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 88 [2018-11-23 10:34:29,715 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-23 10:34:29,716 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:29,733 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,734 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,734 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,738 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:34:29,738 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:34:29,755 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 61 [2018-11-23 10:34:29,758 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-23 10:34:29,777 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:29,787 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:29,793 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:29,799 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:29,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:34:29,820 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:53, output treesize:3 [2018-11-23 10:34:29,849 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:34:29,849 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#a~0.base|, main_~i~0, main_~val1~0]. (or (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))) (bvsge (select (let ((.cse0 (bvmul (_ bv4 32) main_~i~0))) (let ((.cse1 (bvadd |main_~#a~0.offset| .cse0 (_ bv4294967288 32)))) (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| .cse0 (_ bv4 32)) main_~val2~0) .cse1 main_~val1~0) (bvadd |main_~#a~0.offset| .cse0 (_ bv4294967292 32)) main_~val2~0) .cse1 main_~val2~0))) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)) [2018-11-23 10:34:29,849 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (bvsge main_~val2~0 main_~low~0) [2018-11-23 10:34:29,939 INFO L273 TraceCheckUtils]: 53: Hoare triple {3352#false} assume !false; {3352#false} is VALID [2018-11-23 10:34:29,940 INFO L273 TraceCheckUtils]: 52: Hoare triple {3537#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {3352#false} is VALID [2018-11-23 10:34:29,941 INFO L273 TraceCheckUtils]: 51: Hoare triple {3541#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {3537#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:34:29,942 INFO L256 TraceCheckUtils]: 50: Hoare triple {3545#(bvsge |main_#t~mem4| main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3541#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:34:29,943 INFO L273 TraceCheckUtils]: 49: Hoare triple {3549#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3545#(bvsge |main_#t~mem4| main_~low~0)} is VALID [2018-11-23 10:34:31,967 INFO L273 TraceCheckUtils]: 48: Hoare triple {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3549#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is UNKNOWN [2018-11-23 10:34:31,967 INFO L273 TraceCheckUtils]: 47: Hoare triple {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} havoc #t~mem4; {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:34:31,968 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {3351#true} {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #67#return; {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:34:31,968 INFO L273 TraceCheckUtils]: 45: Hoare triple {3351#true} assume true; {3351#true} is VALID [2018-11-23 10:34:31,968 INFO L273 TraceCheckUtils]: 44: Hoare triple {3351#true} assume !(0bv32 == ~cond); {3351#true} is VALID [2018-11-23 10:34:31,968 INFO L273 TraceCheckUtils]: 43: Hoare triple {3351#true} ~cond := #in~cond; {3351#true} is VALID [2018-11-23 10:34:31,969 INFO L256 TraceCheckUtils]: 42: Hoare triple {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3351#true} is VALID [2018-11-23 10:34:31,969 INFO L273 TraceCheckUtils]: 41: Hoare triple {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-23 10:34:33,994 INFO L273 TraceCheckUtils]: 40: Hoare triple {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3553#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is UNKNOWN [2018-11-23 10:34:33,995 INFO L273 TraceCheckUtils]: 39: Hoare triple {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} havoc #t~mem4; {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:34:33,997 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {3351#true} {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} #67#return; {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:34:33,997 INFO L273 TraceCheckUtils]: 37: Hoare triple {3351#true} assume true; {3351#true} is VALID [2018-11-23 10:34:33,997 INFO L273 TraceCheckUtils]: 36: Hoare triple {3351#true} assume !(0bv32 == ~cond); {3351#true} is VALID [2018-11-23 10:34:33,997 INFO L273 TraceCheckUtils]: 35: Hoare triple {3351#true} ~cond := #in~cond; {3351#true} is VALID [2018-11-23 10:34:33,997 INFO L256 TraceCheckUtils]: 34: Hoare triple {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3351#true} is VALID [2018-11-23 10:34:33,998 INFO L273 TraceCheckUtils]: 33: Hoare triple {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,029 INFO L273 TraceCheckUtils]: 32: Hoare triple {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3578#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~low~0)} is UNKNOWN [2018-11-23 10:34:36,047 INFO L273 TraceCheckUtils]: 31: Hoare triple {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} havoc #t~mem4; {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,062 INFO L268 TraceCheckUtils]: 30: Hoare quadruple {3351#true} {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} #67#return; {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,062 INFO L273 TraceCheckUtils]: 29: Hoare triple {3351#true} assume true; {3351#true} is VALID [2018-11-23 10:34:36,062 INFO L273 TraceCheckUtils]: 28: Hoare triple {3351#true} assume !(0bv32 == ~cond); {3351#true} is VALID [2018-11-23 10:34:36,063 INFO L273 TraceCheckUtils]: 27: Hoare triple {3351#true} ~cond := #in~cond; {3351#true} is VALID [2018-11-23 10:34:36,063 INFO L256 TraceCheckUtils]: 26: Hoare triple {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {3351#true} is VALID [2018-11-23 10:34:36,071 INFO L273 TraceCheckUtils]: 25: Hoare triple {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,072 INFO L273 TraceCheckUtils]: 24: Hoare triple {3628#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} ~i~0 := 0bv32; {3603#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,072 INFO L273 TraceCheckUtils]: 23: Hoare triple {3628#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} assume !~bvsge32(~i~0, 4294967295bv32); {3628#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,073 INFO L273 TraceCheckUtils]: 22: Hoare triple {3628#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3628#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,119 INFO L273 TraceCheckUtils]: 21: Hoare triple {3638#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3628#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,120 INFO L273 TraceCheckUtils]: 20: Hoare triple {3642#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0))} assume !~bvsge32(~i~0, 0bv32); {3638#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)} is VALID [2018-11-23 10:34:36,121 INFO L273 TraceCheckUtils]: 19: Hoare triple {3642#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0))} assume !!~bvsge32(~i~0, 4294967295bv32); {3642#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0))} is VALID [2018-11-23 10:34:36,136 INFO L273 TraceCheckUtils]: 18: Hoare triple {3649#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3642#(or (bvsge main_~i~0 (_ bv0 32)) (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0))} is VALID [2018-11-23 10:34:36,205 INFO L273 TraceCheckUtils]: 17: Hoare triple {3653#(or (bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3649#(or (bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,221 INFO L273 TraceCheckUtils]: 16: Hoare triple {3657#(or (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3653#(or (bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,221 INFO L273 TraceCheckUtils]: 15: Hoare triple {3657#(or (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {3657#(or (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,235 INFO L273 TraceCheckUtils]: 14: Hoare triple {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3657#(or (not (bvsge main_~i~0 (_ bv0 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,252 INFO L273 TraceCheckUtils]: 13: Hoare triple {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,263 INFO L273 TraceCheckUtils]: 12: Hoare triple {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,264 INFO L273 TraceCheckUtils]: 11: Hoare triple {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,285 INFO L273 TraceCheckUtils]: 10: Hoare triple {3677#(or (forall ((main_~val1~0 (_ BitVec 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {3664#(or (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:34:36,318 INFO L273 TraceCheckUtils]: 9: Hoare triple {3681#(bvsge main_~val2~0 main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3677#(or (forall ((main_~val1~0 (_ BitVec 32))) (bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)) main_~val1~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv12 32))) main_~low~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-23 10:34:36,319 INFO L273 TraceCheckUtils]: 8: Hoare triple {3681#(bvsge main_~val2~0 main_~low~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3681#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:34:36,319 INFO L273 TraceCheckUtils]: 7: Hoare triple {3681#(bvsge main_~val2~0 main_~low~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {3681#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:34:36,320 INFO L273 TraceCheckUtils]: 6: Hoare triple {3351#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {3681#(bvsge main_~val2~0 main_~low~0)} is VALID [2018-11-23 10:34:36,320 INFO L273 TraceCheckUtils]: 5: Hoare triple {3351#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3351#true} is VALID [2018-11-23 10:34:36,320 INFO L256 TraceCheckUtils]: 4: Hoare triple {3351#true} call #t~ret5 := main(); {3351#true} is VALID [2018-11-23 10:34:36,320 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3351#true} {3351#true} #63#return; {3351#true} is VALID [2018-11-23 10:34:36,321 INFO L273 TraceCheckUtils]: 2: Hoare triple {3351#true} assume true; {3351#true} is VALID [2018-11-23 10:34:36,321 INFO L273 TraceCheckUtils]: 1: Hoare triple {3351#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3351#true} is VALID [2018-11-23 10:34:36,321 INFO L256 TraceCheckUtils]: 0: Hoare triple {3351#true} call ULTIMATE.init(); {3351#true} is VALID [2018-11-23 10:34:36,331 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 41 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-23 10:34:36,337 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:34:36,337 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 18] total 37 [2018-11-23 10:34:36,338 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 54 [2018-11-23 10:34:36,338 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:34:36,338 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 37 states. [2018-11-23 10:34:45,393 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 85 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2018-11-23 10:34:45,393 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-11-23 10:34:45,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-11-23 10:34:45,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=1116, Unknown=3, NotChecked=0, Total=1332 [2018-11-23 10:34:45,394 INFO L87 Difference]: Start difference. First operand 58 states and 61 transitions. Second operand 37 states. [2018-11-23 10:35:00,455 WARN L180 SmtUtils]: Spent 4.12 s on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2018-11-23 10:35:09,930 WARN L180 SmtUtils]: Spent 4.17 s on a formula simplification. DAG size of input: 42 DAG size of output: 41 [2018-11-23 10:35:11,278 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 43 [2018-11-23 10:35:16,172 WARN L180 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 46 [2018-11-23 10:35:17,801 WARN L180 SmtUtils]: Spent 471.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 51 [2018-11-23 10:35:18,455 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 48 [2018-11-23 10:35:19,253 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 39 [2018-11-23 10:35:20,162 WARN L180 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 47 [2018-11-23 10:35:20,559 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 50 [2018-11-23 10:35:25,029 WARN L180 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2018-11-23 10:35:29,507 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 45 [2018-11-23 10:35:31,096 WARN L180 SmtUtils]: Spent 331.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 54 [2018-11-23 10:35:31,817 WARN L180 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2018-11-23 10:35:32,315 WARN L180 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 46 [2018-11-23 10:35:41,839 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 52 [2018-11-23 10:35:43,384 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 51 [2018-11-23 10:35:46,046 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 44 [2018-11-23 10:35:47,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:35:47,111 INFO L93 Difference]: Finished difference Result 85 states and 90 transitions. [2018-11-23 10:35:47,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-11-23 10:35:47,111 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 54 [2018-11-23 10:35:47,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:35:47,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-23 10:35:47,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 81 transitions. [2018-11-23 10:35:47,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-23 10:35:47,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 81 transitions. [2018-11-23 10:35:47,119 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 37 states and 81 transitions. [2018-11-23 10:35:55,357 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 78 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2018-11-23 10:35:55,359 INFO L225 Difference]: With dead ends: 85 [2018-11-23 10:35:55,359 INFO L226 Difference]: Without dead ends: 83 [2018-11-23 10:35:55,361 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 69 SyntacticMatches, 8 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1254 ImplicationChecksByTransitivity, 33.4s TimeCoverageRelationStatistics Valid=825, Invalid=3864, Unknown=3, NotChecked=0, Total=4692 [2018-11-23 10:35:55,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-11-23 10:35:55,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 66. [2018-11-23 10:35:55,594 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:35:55,595 INFO L82 GeneralOperation]: Start isEquivalent. First operand 83 states. Second operand 66 states. [2018-11-23 10:35:55,595 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand 66 states. [2018-11-23 10:35:55,595 INFO L87 Difference]: Start difference. First operand 83 states. Second operand 66 states. [2018-11-23 10:35:55,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:35:55,599 INFO L93 Difference]: Finished difference Result 83 states and 88 transitions. [2018-11-23 10:35:55,599 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 88 transitions. [2018-11-23 10:35:55,599 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:35:55,599 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:35:55,599 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand 83 states. [2018-11-23 10:35:55,599 INFO L87 Difference]: Start difference. First operand 66 states. Second operand 83 states. [2018-11-23 10:35:55,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:35:55,601 INFO L93 Difference]: Finished difference Result 83 states and 88 transitions. [2018-11-23 10:35:55,601 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 88 transitions. [2018-11-23 10:35:55,602 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:35:55,602 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:35:55,602 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:35:55,602 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:35:55,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-11-23 10:35:55,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 69 transitions. [2018-11-23 10:35:55,604 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 69 transitions. Word has length 54 [2018-11-23 10:35:55,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:35:55,605 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 69 transitions. [2018-11-23 10:35:55,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-11-23 10:35:55,605 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 69 transitions. [2018-11-23 10:35:55,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-23 10:35:55,606 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:35:55,606 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:35:55,606 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:35:55,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:35:55,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1242365501, now seen corresponding path program 6 times [2018-11-23 10:35:55,607 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:35:55,607 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:35:55,627 INFO L101 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2018-11-23 10:35:55,867 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-11-23 10:35:55,867 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:35:55,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:35:55,899 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:35:56,495 INFO L256 TraceCheckUtils]: 0: Hoare triple {4147#true} call ULTIMATE.init(); {4147#true} is VALID [2018-11-23 10:35:56,495 INFO L273 TraceCheckUtils]: 1: Hoare triple {4147#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {4147#true} is VALID [2018-11-23 10:35:56,495 INFO L273 TraceCheckUtils]: 2: Hoare triple {4147#true} assume true; {4147#true} is VALID [2018-11-23 10:35:56,496 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4147#true} {4147#true} #63#return; {4147#true} is VALID [2018-11-23 10:35:56,496 INFO L256 TraceCheckUtils]: 4: Hoare triple {4147#true} call #t~ret5 := main(); {4147#true} is VALID [2018-11-23 10:35:56,496 INFO L273 TraceCheckUtils]: 5: Hoare triple {4147#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {4147#true} is VALID [2018-11-23 10:35:56,507 INFO L273 TraceCheckUtils]: 6: Hoare triple {4147#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,508 INFO L273 TraceCheckUtils]: 7: Hoare triple {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,508 INFO L273 TraceCheckUtils]: 8: Hoare triple {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,509 INFO L273 TraceCheckUtils]: 9: Hoare triple {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,528 INFO L273 TraceCheckUtils]: 10: Hoare triple {4170#(= (bvadd ~SIZE~0 (_ bv4294967294 32)) main_~i~0)} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,528 INFO L273 TraceCheckUtils]: 11: Hoare triple {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,529 INFO L273 TraceCheckUtils]: 12: Hoare triple {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,529 INFO L273 TraceCheckUtils]: 13: Hoare triple {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,555 INFO L273 TraceCheckUtils]: 14: Hoare triple {4183#(= (bvadd ~SIZE~0 (_ bv4294967293 32)) main_~i~0)} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4196#(= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,555 INFO L273 TraceCheckUtils]: 15: Hoare triple {4196#(= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0)} assume !!~bvsge32(~i~0, 4294967295bv32); {4196#(= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0)} is VALID [2018-11-23 10:35:56,556 INFO L273 TraceCheckUtils]: 16: Hoare triple {4196#(= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0)} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4203#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:35:56,556 INFO L273 TraceCheckUtils]: 17: Hoare triple {4203#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4203#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:35:56,572 INFO L273 TraceCheckUtils]: 18: Hoare triple {4203#(and (bvsge main_~i~0 (_ bv0 32)) (= (bvadd ~SIZE~0 (_ bv4294967292 32)) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4210#(and (= (bvadd main_~i~0 (_ bv5 32)) ~SIZE~0) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:56,573 INFO L273 TraceCheckUtils]: 19: Hoare triple {4210#(and (= (bvadd main_~i~0 (_ bv5 32)) ~SIZE~0) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {4210#(and (= (bvadd main_~i~0 (_ bv5 32)) ~SIZE~0) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:56,575 INFO L273 TraceCheckUtils]: 20: Hoare triple {4210#(and (= (bvadd main_~i~0 (_ bv5 32)) ~SIZE~0) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)))} assume !~bvsge32(~i~0, 0bv32); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,576 INFO L273 TraceCheckUtils]: 21: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,576 INFO L273 TraceCheckUtils]: 22: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,577 INFO L273 TraceCheckUtils]: 23: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !~bvsge32(~i~0, 4294967295bv32); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,577 INFO L273 TraceCheckUtils]: 24: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} ~i~0 := 0bv32; {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:35:56,578 INFO L273 TraceCheckUtils]: 25: Hoare triple {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:35:56,579 INFO L256 TraceCheckUtils]: 26: Hoare triple {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,580 INFO L273 TraceCheckUtils]: 27: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} ~cond := #in~cond; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,580 INFO L273 TraceCheckUtils]: 28: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,581 INFO L273 TraceCheckUtils]: 29: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume true; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,582 INFO L268 TraceCheckUtils]: 30: Hoare quadruple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} #67#return; {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:35:56,583 INFO L273 TraceCheckUtils]: 31: Hoare triple {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} havoc #t~mem4; {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:35:56,584 INFO L273 TraceCheckUtils]: 32: Hoare triple {4230#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:56,584 INFO L273 TraceCheckUtils]: 33: Hoare triple {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:56,586 INFO L256 TraceCheckUtils]: 34: Hoare triple {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,586 INFO L273 TraceCheckUtils]: 35: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} ~cond := #in~cond; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,587 INFO L273 TraceCheckUtils]: 36: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,588 INFO L273 TraceCheckUtils]: 37: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume true; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,589 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #67#return; {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:56,590 INFO L273 TraceCheckUtils]: 39: Hoare triple {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4; {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:56,590 INFO L273 TraceCheckUtils]: 40: Hoare triple {4255#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:35:56,591 INFO L273 TraceCheckUtils]: 41: Hoare triple {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:35:56,593 INFO L256 TraceCheckUtils]: 42: Hoare triple {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,593 INFO L273 TraceCheckUtils]: 43: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} ~cond := #in~cond; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,594 INFO L273 TraceCheckUtils]: 44: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,595 INFO L273 TraceCheckUtils]: 45: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume true; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,596 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} #67#return; {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:35:56,596 INFO L273 TraceCheckUtils]: 47: Hoare triple {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} havoc #t~mem4; {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:35:56,599 INFO L273 TraceCheckUtils]: 48: Hoare triple {4280#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))) (= (_ bv2 32) main_~i~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,600 INFO L273 TraceCheckUtils]: 49: Hoare triple {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,601 INFO L256 TraceCheckUtils]: 50: Hoare triple {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,601 INFO L273 TraceCheckUtils]: 51: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} ~cond := #in~cond; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,601 INFO L273 TraceCheckUtils]: 52: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,602 INFO L273 TraceCheckUtils]: 53: Hoare triple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume true; {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,603 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {4217#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} #67#return; {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,604 INFO L273 TraceCheckUtils]: 55: Hoare triple {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} havoc #t~mem4; {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,605 INFO L273 TraceCheckUtils]: 56: Hoare triple {4305#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4330#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:56,608 INFO L273 TraceCheckUtils]: 57: Hoare triple {4330#(and (bvsge (bvadd ~SIZE~0 (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (not (bvsge (bvadd ~SIZE~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4148#false} is VALID [2018-11-23 10:35:56,608 INFO L256 TraceCheckUtils]: 58: Hoare triple {4148#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4148#false} is VALID [2018-11-23 10:35:56,608 INFO L273 TraceCheckUtils]: 59: Hoare triple {4148#false} ~cond := #in~cond; {4148#false} is VALID [2018-11-23 10:35:56,609 INFO L273 TraceCheckUtils]: 60: Hoare triple {4148#false} assume 0bv32 == ~cond; {4148#false} is VALID [2018-11-23 10:35:56,609 INFO L273 TraceCheckUtils]: 61: Hoare triple {4148#false} assume !false; {4148#false} is VALID [2018-11-23 10:35:56,618 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 12 proven. 56 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-23 10:35:56,618 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:35:57,374 INFO L273 TraceCheckUtils]: 61: Hoare triple {4148#false} assume !false; {4148#false} is VALID [2018-11-23 10:35:57,375 INFO L273 TraceCheckUtils]: 60: Hoare triple {4148#false} assume 0bv32 == ~cond; {4148#false} is VALID [2018-11-23 10:35:57,375 INFO L273 TraceCheckUtils]: 59: Hoare triple {4148#false} ~cond := #in~cond; {4148#false} is VALID [2018-11-23 10:35:57,375 INFO L256 TraceCheckUtils]: 58: Hoare triple {4148#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4148#false} is VALID [2018-11-23 10:35:57,376 INFO L273 TraceCheckUtils]: 57: Hoare triple {4358#(not (bvslt main_~i~0 ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4148#false} is VALID [2018-11-23 10:35:57,378 INFO L273 TraceCheckUtils]: 56: Hoare triple {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4358#(not (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-23 10:35:57,378 INFO L273 TraceCheckUtils]: 55: Hoare triple {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} havoc #t~mem4; {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,379 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {4147#true} {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #67#return; {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,379 INFO L273 TraceCheckUtils]: 53: Hoare triple {4147#true} assume true; {4147#true} is VALID [2018-11-23 10:35:57,380 INFO L273 TraceCheckUtils]: 52: Hoare triple {4147#true} assume !(0bv32 == ~cond); {4147#true} is VALID [2018-11-23 10:35:57,380 INFO L273 TraceCheckUtils]: 51: Hoare triple {4147#true} ~cond := #in~cond; {4147#true} is VALID [2018-11-23 10:35:57,380 INFO L256 TraceCheckUtils]: 50: Hoare triple {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4147#true} is VALID [2018-11-23 10:35:57,381 INFO L273 TraceCheckUtils]: 49: Hoare triple {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,405 INFO L273 TraceCheckUtils]: 48: Hoare triple {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4362#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,405 INFO L273 TraceCheckUtils]: 47: Hoare triple {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} havoc #t~mem4; {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,406 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {4147#true} {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #67#return; {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,406 INFO L273 TraceCheckUtils]: 45: Hoare triple {4147#true} assume true; {4147#true} is VALID [2018-11-23 10:35:57,406 INFO L273 TraceCheckUtils]: 44: Hoare triple {4147#true} assume !(0bv32 == ~cond); {4147#true} is VALID [2018-11-23 10:35:57,406 INFO L273 TraceCheckUtils]: 43: Hoare triple {4147#true} ~cond := #in~cond; {4147#true} is VALID [2018-11-23 10:35:57,407 INFO L256 TraceCheckUtils]: 42: Hoare triple {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4147#true} is VALID [2018-11-23 10:35:57,407 INFO L273 TraceCheckUtils]: 41: Hoare triple {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,433 INFO L273 TraceCheckUtils]: 40: Hoare triple {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4387#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,434 INFO L273 TraceCheckUtils]: 39: Hoare triple {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} havoc #t~mem4; {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,434 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {4147#true} {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} #67#return; {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,434 INFO L273 TraceCheckUtils]: 37: Hoare triple {4147#true} assume true; {4147#true} is VALID [2018-11-23 10:35:57,435 INFO L273 TraceCheckUtils]: 36: Hoare triple {4147#true} assume !(0bv32 == ~cond); {4147#true} is VALID [2018-11-23 10:35:57,435 INFO L273 TraceCheckUtils]: 35: Hoare triple {4147#true} ~cond := #in~cond; {4147#true} is VALID [2018-11-23 10:35:57,435 INFO L256 TraceCheckUtils]: 34: Hoare triple {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4147#true} is VALID [2018-11-23 10:35:57,435 INFO L273 TraceCheckUtils]: 33: Hoare triple {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,458 INFO L273 TraceCheckUtils]: 32: Hoare triple {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4412#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,458 INFO L273 TraceCheckUtils]: 31: Hoare triple {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} havoc #t~mem4; {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,459 INFO L268 TraceCheckUtils]: 30: Hoare quadruple {4147#true} {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} #67#return; {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,459 INFO L273 TraceCheckUtils]: 29: Hoare triple {4147#true} assume true; {4147#true} is VALID [2018-11-23 10:35:57,459 INFO L273 TraceCheckUtils]: 28: Hoare triple {4147#true} assume !(0bv32 == ~cond); {4147#true} is VALID [2018-11-23 10:35:57,459 INFO L273 TraceCheckUtils]: 27: Hoare triple {4147#true} ~cond := #in~cond; {4147#true} is VALID [2018-11-23 10:35:57,459 INFO L256 TraceCheckUtils]: 26: Hoare triple {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {4147#true} is VALID [2018-11-23 10:35:57,460 INFO L273 TraceCheckUtils]: 25: Hoare triple {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,460 INFO L273 TraceCheckUtils]: 24: Hoare triple {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} ~i~0 := 0bv32; {4437#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~SIZE~0))} is VALID [2018-11-23 10:35:57,461 INFO L273 TraceCheckUtils]: 23: Hoare triple {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} assume !~bvsge32(~i~0, 4294967295bv32); {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} is VALID [2018-11-23 10:35:57,461 INFO L273 TraceCheckUtils]: 22: Hoare triple {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} is VALID [2018-11-23 10:35:57,461 INFO L273 TraceCheckUtils]: 21: Hoare triple {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} is VALID [2018-11-23 10:35:57,462 INFO L273 TraceCheckUtils]: 20: Hoare triple {4475#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} assume !~bvsge32(~i~0, 0bv32); {4462#(not (bvslt (_ bv4 32) ~SIZE~0))} is VALID [2018-11-23 10:35:57,462 INFO L273 TraceCheckUtils]: 19: Hoare triple {4475#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {4475#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:35:57,464 INFO L273 TraceCheckUtils]: 18: Hoare triple {4482#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4475#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:35:57,465 INFO L273 TraceCheckUtils]: 17: Hoare triple {4482#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4482#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,465 INFO L273 TraceCheckUtils]: 16: Hoare triple {4489#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4482#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,466 INFO L273 TraceCheckUtils]: 15: Hoare triple {4489#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {4489#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,468 INFO L273 TraceCheckUtils]: 14: Hoare triple {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4489#(or (not (bvsge main_~i~0 (_ bv0 32))) (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,469 INFO L273 TraceCheckUtils]: 13: Hoare triple {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,469 INFO L273 TraceCheckUtils]: 12: Hoare triple {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,470 INFO L273 TraceCheckUtils]: 11: Hoare triple {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvsge32(~i~0, 4294967295bv32); {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,475 INFO L273 TraceCheckUtils]: 10: Hoare triple {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} #t~post2 := ~i~0;~i~0 := ~bvsub32(#t~post2, 1bv32);havoc #t~post2; {4496#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (not (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:35:57,475 INFO L273 TraceCheckUtils]: 9: Hoare triple {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:57,476 INFO L273 TraceCheckUtils]: 8: Hoare triple {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} assume ~bvsge32(~i~0, 0bv32);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:57,476 INFO L273 TraceCheckUtils]: 7: Hoare triple {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} assume !!~bvsge32(~i~0, 4294967295bv32); {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:57,479 INFO L273 TraceCheckUtils]: 6: Hoare triple {4147#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 7bv32;~low~0 := 2bv32;~i~0 := ~bvsub32(~SIZE~0, 2bv32); {4509#(or (not (bvslt (_ bv4 32) ~SIZE~0)) (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-23 10:35:57,480 INFO L273 TraceCheckUtils]: 5: Hoare triple {4147#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {4147#true} is VALID [2018-11-23 10:35:57,480 INFO L256 TraceCheckUtils]: 4: Hoare triple {4147#true} call #t~ret5 := main(); {4147#true} is VALID [2018-11-23 10:35:57,480 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4147#true} {4147#true} #63#return; {4147#true} is VALID [2018-11-23 10:35:57,480 INFO L273 TraceCheckUtils]: 2: Hoare triple {4147#true} assume true; {4147#true} is VALID [2018-11-23 10:35:57,481 INFO L273 TraceCheckUtils]: 1: Hoare triple {4147#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {4147#true} is VALID [2018-11-23 10:35:57,481 INFO L256 TraceCheckUtils]: 0: Hoare triple {4147#true} call ULTIMATE.init(); {4147#true} is VALID [2018-11-23 10:35:57,486 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 22 proven. 46 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-23 10:35:57,489 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:35:57,489 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 10:35:57,489 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 62 [2018-11-23 10:35:57,490 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:35:57,490 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 10:35:57,873 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 96 edges. 96 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:35:57,874 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 10:35:57,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 10:35:57,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=398, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:35:57,874 INFO L87 Difference]: Start difference. First operand 66 states and 69 transitions. Second operand 24 states. [2018-11-23 10:36:05,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:36:05,071 INFO L93 Difference]: Finished difference Result 190 states and 202 transitions. [2018-11-23 10:36:05,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-23 10:36:05,071 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 62 [2018-11-23 10:36:05,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:36:05,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:36:05,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 154 transitions. [2018-11-23 10:36:05,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:36:05,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 154 transitions. [2018-11-23 10:36:05,080 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 32 states and 154 transitions. [2018-11-23 10:36:05,913 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:36:05,915 INFO L225 Difference]: With dead ends: 190 [2018-11-23 10:36:05,915 INFO L226 Difference]: Without dead ends: 86 [2018-11-23 10:36:05,916 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 324 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=478, Invalid=1082, Unknown=0, NotChecked=0, Total=1560 [2018-11-23 10:36:05,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-11-23 10:36:06,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 70. [2018-11-23 10:36:06,275 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:36:06,276 INFO L82 GeneralOperation]: Start isEquivalent. First operand 86 states. Second operand 70 states. [2018-11-23 10:36:06,276 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand 70 states. [2018-11-23 10:36:06,276 INFO L87 Difference]: Start difference. First operand 86 states. Second operand 70 states. [2018-11-23 10:36:06,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:36:06,278 INFO L93 Difference]: Finished difference Result 86 states and 90 transitions. [2018-11-23 10:36:06,279 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 90 transitions. [2018-11-23 10:36:06,279 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:36:06,279 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:36:06,279 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand 86 states. [2018-11-23 10:36:06,279 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 86 states. [2018-11-23 10:36:06,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:36:06,282 INFO L93 Difference]: Finished difference Result 86 states and 90 transitions. [2018-11-23 10:36:06,282 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 90 transitions. [2018-11-23 10:36:06,282 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:36:06,282 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:36:06,283 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:36:06,283 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:36:06,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-11-23 10:36:06,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 73 transitions. [2018-11-23 10:36:06,284 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 73 transitions. Word has length 62 [2018-11-23 10:36:06,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:36:06,285 INFO L480 AbstractCegarLoop]: Abstraction has 70 states and 73 transitions. [2018-11-23 10:36:06,285 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 10:36:06,285 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 73 transitions. [2018-11-23 10:36:06,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-23 10:36:06,286 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:36:06,286 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:36:06,286 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:36:06,286 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:36:06,287 INFO L82 PathProgramCache]: Analyzing trace with hash 827230584, now seen corresponding path program 7 times [2018-11-23 10:36:06,287 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:36:06,287 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:36:06,304 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 10:36:06,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:36:06,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:36:06,589 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:36:06,684 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:36:06,697 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:36:06,699 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:06,706 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:06,728 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:06,729 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:30, output treesize:26 [2018-11-23 10:36:07,038 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-23 10:36:07,109 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-11-23 10:36:07,166 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,278 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,380 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,381 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:41, output treesize:37 [2018-11-23 10:36:07,460 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-11-23 10:36:07,474 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,476 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,479 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,487 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-11-23 10:36:07,490 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,517 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,551 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,551 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-11-23 10:36:07,745 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-11-23 10:36:07,763 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,766 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,768 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,772 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,775 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,777 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:07,795 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-11-23 10:36:07,799 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,850 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,904 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:07,905 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-11-23 10:36:08,046 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-11-23 10:36:08,068 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,072 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,075 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,078 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,081 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,084 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,119 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 129 [2018-11-23 10:36:08,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:08,169 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:08,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:08,222 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:77, output treesize:61 [2018-11-23 10:36:08,252 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:36:08,252 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_58|]. (let ((.cse1 (bvmul (_ bv4 32) main_~i~0))) (let ((.cse0 (select |v_#memory_int_58| |main_~#a~0.base|)) (.cse2 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32)))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val1~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32)))) (= main_~val1~0 (select .cse0 .cse2)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32))) main_~val2~0) (= |#memory_int| (store |v_#memory_int_58| |main_~#a~0.base| (store .cse0 .cse2 main_~val2~0)))))) [2018-11-23 10:36:08,252 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= main_~val1~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) main_~val2~0))) [2018-11-23 10:36:08,530 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-11-23 10:36:08,544 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,548 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,551 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,553 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,556 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,558 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,561 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,563 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,567 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,570 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,596 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 193 [2018-11-23 10:36:08,601 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:08,665 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:08,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:08,724 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:77, output treesize:73 [2018-11-23 10:36:08,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 60 [2018-11-23 10:36:08,920 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,924 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,928 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,931 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,934 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,937 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,941 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,944 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,976 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:08,980 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,028 INFO L303 Elim1Store]: Index analysis took 115 ms [2018-11-23 10:36:09,029 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 196 [2018-11-23 10:36:09,040 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:09,101 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:09,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:09,157 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:89, output treesize:65 [2018-11-23 10:36:09,202 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:36:09,202 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_60|]. (let ((.cse1 (bvmul (_ bv4 32) main_~i~0))) (let ((.cse2 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (.cse0 (select |v_#memory_int_60| |main_~#a~0.base|))) (and (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select .cse0 .cse2) (select .cse0 (bvadd |main_~#a~0.offset| .cse1))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32))) main_~val2~0) (= (store |v_#memory_int_60| |main_~#a~0.base| (store .cse0 .cse2 main_~val2~0)) |#memory_int|) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv16 32))))))) [2018-11-23 10:36:09,202 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32)))) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~i~0 (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv16 32))) main_~val2~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) main_~val2~0))) [2018-11-23 10:36:09,708 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 54 [2018-11-23 10:36:09,725 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,728 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,730 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,733 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,736 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,738 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,740 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,743 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,746 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,749 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:09,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 201 [2018-11-23 10:36:09,770 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:09,826 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:09,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:36:09,885 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:82, output treesize:78 [2018-11-23 10:36:09,920 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:36:09,920 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_61|, main_~i~0]. (let ((.cse0 (select |v_#memory_int_61| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv16 32))) (_ bv3 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32))) (_ bv3 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv20 32))) (_ bv3 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32))) (_ bv3 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (store |v_#memory_int_61| |main_~#a~0.base| (store .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32)) (_ bv3 32))) |#memory_int|))) [2018-11-23 10:36:09,920 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [main_~i~0]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) main_~i~0))) (and (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv16 32))) (_ bv3 32)) (not (bvsge main_~i~0 (_ bv0 32))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv8 32)))) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv12 32))) (_ bv3 32)) (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (_ bv3 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv20 32))) (_ bv3 32)))) [2018-11-23 10:36:13,491 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 59 [2018-11-23 10:36:13,513 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,515 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,516 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,517 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,520 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,521 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,522 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,523 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,524 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,526 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,527 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:36:13,528 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,530 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:36:13,533 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 144 [2018-11-23 10:36:13,536 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:36:13,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:13,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:36:13,577 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:85, output treesize:11 [2018-11-23 10:36:13,588 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:36:13,589 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#a~0.base|, v_prenex_12]. (let ((.cse0 (select |#memory_int| |main_~#a~0.base|)) (.cse1 (bvmul (_ bv4 32) v_prenex_12))) (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select .cse0 (bvadd .cse1 (_ bv8 32))) (_ bv3 32)) (= (_ bv0 32) (bvadd (select .cse0 (bvadd .cse1 (_ bv12 32))) (_ bv4294967293 32))) (= (bvadd (select .cse0 (bvadd .cse1 (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select .cse0 (bvadd .cse1 (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd v_prenex_12 (_ bv1 32)) (_ bv0 32)) (= (select .cse0 (_ bv16 32)) |main_#t~mem4|) (= (_ bv0 32) (bvadd (select .cse0 (bvadd .cse1 (_ bv20 32))) (_ bv4294967293 32))) (not (bvsge v_prenex_12 (_ bv0 32))))) [2018-11-23 10:36:13,589 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv0 32) (bvadd |main_#t~mem4| (_ bv4294967293 32))))