java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-examples/sanfoundry_10_true-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:02:11,117 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:02:11,119 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:02:11,135 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:02:11,135 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:02:11,136 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:02:11,137 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:02:11,139 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:02:11,141 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:02:11,142 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:02:11,143 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:02:11,143 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:02:11,144 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:02:11,145 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:02:11,146 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:02:11,147 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:02:11,148 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:02:11,150 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:02:11,152 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:02:11,154 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:02:11,155 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:02:11,156 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:02:11,159 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-23 10:02:11,166 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:02:11,166 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:02:11,167 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:02:11,168 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:02:11,168 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:02:11,184 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:02:11,184 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:02:11,185 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:02:11,186 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:02:11,186 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:02:11,186 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:02:11,187 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:02:11,187 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:02:11,187 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:02:11,187 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:02:11,188 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:02:11,188 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:02:11,188 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:02:11,188 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:02:11,188 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:02:11,189 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:02:11,189 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:02:11,189 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:02:11,189 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:02:11,189 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:02:11,190 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:02:11,190 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:02:11,190 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:02:11,190 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:02:11,190 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:02:11,191 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:02:11,191 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:02:11,191 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:02:11,191 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:02:11,191 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:02:11,192 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:02:11,192 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:02:11,192 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:02:11,254 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:02:11,273 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:02:11,279 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:02:11,280 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:02:11,281 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:02:11,282 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/sanfoundry_10_true-unreach-call_ground.i [2018-11-23 10:02:11,352 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/807484005/688a9d32b2fd4a82986c99ad9945c26e/FLAG2124878e7 [2018-11-23 10:02:11,815 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:02:11,815 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-examples/sanfoundry_10_true-unreach-call_ground.i [2018-11-23 10:02:11,821 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/807484005/688a9d32b2fd4a82986c99ad9945c26e/FLAG2124878e7 [2018-11-23 10:02:12,153 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/807484005/688a9d32b2fd4a82986c99ad9945c26e [2018-11-23 10:02:12,168 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:02:12,170 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:02:12,171 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:02:12,171 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:02:12,178 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:02:12,179 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,182 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@50669a04 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12, skipping insertion in model container [2018-11-23 10:02:12,182 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,193 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:02:12,217 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:02:12,499 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:02:12,511 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:02:12,541 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:02:12,566 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:02:12,567 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12 WrapperNode [2018-11-23 10:02:12,567 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:02:12,568 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:02:12,568 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:02:12,568 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:02:12,578 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,588 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,595 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:02:12,595 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:02:12,595 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:02:12,596 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:02:12,606 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,607 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,609 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,610 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,622 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,630 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,631 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... [2018-11-23 10:02:12,634 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:02:12,635 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:02:12,635 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:02:12,635 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:02:12,636 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:02:12,772 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:02:12,772 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:02:12,772 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:02:12,773 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:02:12,773 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:02:12,773 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:02:12,773 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:02:12,773 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:02:12,773 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:02:12,774 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:02:12,774 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:02:12,774 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:02:13,370 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:02:13,371 INFO L280 CfgBuilder]: Removed 3 assue(true) statements. [2018-11-23 10:02:13,371 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:02:13 BoogieIcfgContainer [2018-11-23 10:02:13,372 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:02:13,373 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:02:13,373 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:02:13,376 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:02:13,377 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:02:12" (1/3) ... [2018-11-23 10:02:13,378 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e5881b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:02:13, skipping insertion in model container [2018-11-23 10:02:13,378 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:12" (2/3) ... [2018-11-23 10:02:13,379 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e5881b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:02:13, skipping insertion in model container [2018-11-23 10:02:13,379 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:02:13" (3/3) ... [2018-11-23 10:02:13,381 INFO L112 eAbstractionObserver]: Analyzing ICFG sanfoundry_10_true-unreach-call_ground.i [2018-11-23 10:02:13,392 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:02:13,400 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:02:13,420 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:02:13,459 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:02:13,460 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:02:13,460 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:02:13,460 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:02:13,461 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:02:13,461 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:02:13,461 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:02:13,461 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:02:13,462 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:02:13,483 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states. [2018-11-23 10:02:13,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 10:02:13,491 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:13,492 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:13,494 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:13,501 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:13,501 INFO L82 PathProgramCache]: Analyzing trace with hash -1392157819, now seen corresponding path program 1 times [2018-11-23 10:02:13,505 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:13,506 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:13,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:13,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:13,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:13,603 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:13,673 INFO L256 TraceCheckUtils]: 0: Hoare triple {31#true} call ULTIMATE.init(); {31#true} is VALID [2018-11-23 10:02:13,677 INFO L273 TraceCheckUtils]: 1: Hoare triple {31#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {31#true} is VALID [2018-11-23 10:02:13,677 INFO L273 TraceCheckUtils]: 2: Hoare triple {31#true} assume true; {31#true} is VALID [2018-11-23 10:02:13,678 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {31#true} {31#true} #78#return; {31#true} is VALID [2018-11-23 10:02:13,678 INFO L256 TraceCheckUtils]: 4: Hoare triple {31#true} call #t~ret7 := main(); {31#true} is VALID [2018-11-23 10:02:13,678 INFO L273 TraceCheckUtils]: 5: Hoare triple {31#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {31#true} is VALID [2018-11-23 10:02:13,679 INFO L273 TraceCheckUtils]: 6: Hoare triple {31#true} assume !true; {32#false} is VALID [2018-11-23 10:02:13,680 INFO L273 TraceCheckUtils]: 7: Hoare triple {32#false} assume !(0bv32 != ~found~0); {32#false} is VALID [2018-11-23 10:02:13,680 INFO L273 TraceCheckUtils]: 8: Hoare triple {32#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {32#false} is VALID [2018-11-23 10:02:13,680 INFO L273 TraceCheckUtils]: 9: Hoare triple {32#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {32#false} is VALID [2018-11-23 10:02:13,681 INFO L256 TraceCheckUtils]: 10: Hoare triple {32#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {32#false} is VALID [2018-11-23 10:02:13,681 INFO L273 TraceCheckUtils]: 11: Hoare triple {32#false} ~cond := #in~cond; {32#false} is VALID [2018-11-23 10:02:13,681 INFO L273 TraceCheckUtils]: 12: Hoare triple {32#false} assume 0bv32 == ~cond; {32#false} is VALID [2018-11-23 10:02:13,682 INFO L273 TraceCheckUtils]: 13: Hoare triple {32#false} assume !false; {32#false} is VALID [2018-11-23 10:02:13,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:13,685 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:02:13,692 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:13,692 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:02:13,699 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 10:02:13,703 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:13,707 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:02:13,914 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:13,915 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:02:13,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:02:13,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:02:13,932 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 2 states. [2018-11-23 10:02:14,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:14,182 INFO L93 Difference]: Finished difference Result 47 states and 63 transitions. [2018-11-23 10:02:14,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:02:14,183 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 10:02:14,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:14,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:02:14,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 63 transitions. [2018-11-23 10:02:14,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:02:14,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 63 transitions. [2018-11-23 10:02:14,202 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 63 transitions. [2018-11-23 10:02:14,531 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:14,544 INFO L225 Difference]: With dead ends: 47 [2018-11-23 10:02:14,545 INFO L226 Difference]: Without dead ends: 23 [2018-11-23 10:02:14,549 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:02:14,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-11-23 10:02:14,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-11-23 10:02:14,593 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:14,593 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand 23 states. [2018-11-23 10:02:14,594 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand 23 states. [2018-11-23 10:02:14,594 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 23 states. [2018-11-23 10:02:14,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:14,598 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2018-11-23 10:02:14,598 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2018-11-23 10:02:14,599 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:14,599 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:14,600 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand 23 states. [2018-11-23 10:02:14,600 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 23 states. [2018-11-23 10:02:14,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:14,605 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2018-11-23 10:02:14,605 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2018-11-23 10:02:14,605 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:14,606 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:14,606 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:14,606 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:14,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 10:02:14,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2018-11-23 10:02:14,611 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 27 transitions. Word has length 14 [2018-11-23 10:02:14,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:14,611 INFO L480 AbstractCegarLoop]: Abstraction has 23 states and 27 transitions. [2018-11-23 10:02:14,612 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:02:14,612 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2018-11-23 10:02:14,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 10:02:14,613 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:14,613 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:14,613 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:14,614 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:14,614 INFO L82 PathProgramCache]: Analyzing trace with hash 911764976, now seen corresponding path program 1 times [2018-11-23 10:02:14,615 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:14,615 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:14,638 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:14,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:14,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:14,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:14,738 INFO L256 TraceCheckUtils]: 0: Hoare triple {212#true} call ULTIMATE.init(); {212#true} is VALID [2018-11-23 10:02:14,738 INFO L273 TraceCheckUtils]: 1: Hoare triple {212#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {212#true} is VALID [2018-11-23 10:02:14,739 INFO L273 TraceCheckUtils]: 2: Hoare triple {212#true} assume true; {212#true} is VALID [2018-11-23 10:02:14,739 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {212#true} {212#true} #78#return; {212#true} is VALID [2018-11-23 10:02:14,739 INFO L256 TraceCheckUtils]: 4: Hoare triple {212#true} call #t~ret7 := main(); {212#true} is VALID [2018-11-23 10:02:14,740 INFO L273 TraceCheckUtils]: 5: Hoare triple {212#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {212#true} is VALID [2018-11-23 10:02:14,740 INFO L273 TraceCheckUtils]: 6: Hoare triple {212#true} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {212#true} is VALID [2018-11-23 10:02:14,741 INFO L273 TraceCheckUtils]: 7: Hoare triple {212#true} assume !(0bv32 != ~found~0); {238#(= (_ bv0 32) main_~found~0)} is VALID [2018-11-23 10:02:14,742 INFO L273 TraceCheckUtils]: 8: Hoare triple {238#(= (_ bv0 32) main_~found~0)} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {213#false} is VALID [2018-11-23 10:02:14,742 INFO L273 TraceCheckUtils]: 9: Hoare triple {213#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {213#false} is VALID [2018-11-23 10:02:14,742 INFO L256 TraceCheckUtils]: 10: Hoare triple {213#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {213#false} is VALID [2018-11-23 10:02:14,743 INFO L273 TraceCheckUtils]: 11: Hoare triple {213#false} ~cond := #in~cond; {213#false} is VALID [2018-11-23 10:02:14,743 INFO L273 TraceCheckUtils]: 12: Hoare triple {213#false} assume 0bv32 == ~cond; {213#false} is VALID [2018-11-23 10:02:14,743 INFO L273 TraceCheckUtils]: 13: Hoare triple {213#false} assume !false; {213#false} is VALID [2018-11-23 10:02:14,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:14,745 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:02:14,748 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:14,749 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:02:14,750 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 10:02:14,751 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:14,751 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:02:14,788 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:14,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:02:14,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:02:14,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:14,790 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. Second operand 3 states. [2018-11-23 10:02:15,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:15,299 INFO L93 Difference]: Finished difference Result 40 states and 47 transitions. [2018-11-23 10:02:15,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:02:15,299 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 10:02:15,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:15,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:02:15,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 47 transitions. [2018-11-23 10:02:15,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:02:15,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 47 transitions. [2018-11-23 10:02:15,308 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 47 transitions. [2018-11-23 10:02:15,440 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:15,442 INFO L225 Difference]: With dead ends: 40 [2018-11-23 10:02:15,442 INFO L226 Difference]: Without dead ends: 25 [2018-11-23 10:02:15,443 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:15,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-11-23 10:02:15,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-11-23 10:02:15,456 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:15,457 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand 25 states. [2018-11-23 10:02:15,457 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand 25 states. [2018-11-23 10:02:15,457 INFO L87 Difference]: Start difference. First operand 25 states. Second operand 25 states. [2018-11-23 10:02:15,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:15,459 INFO L93 Difference]: Finished difference Result 25 states and 28 transitions. [2018-11-23 10:02:15,460 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2018-11-23 10:02:15,460 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:15,460 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:15,461 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand 25 states. [2018-11-23 10:02:15,461 INFO L87 Difference]: Start difference. First operand 25 states. Second operand 25 states. [2018-11-23 10:02:15,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:15,464 INFO L93 Difference]: Finished difference Result 25 states and 28 transitions. [2018-11-23 10:02:15,464 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2018-11-23 10:02:15,464 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:15,465 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:15,465 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:15,465 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:15,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 10:02:15,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2018-11-23 10:02:15,468 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 14 [2018-11-23 10:02:15,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:15,468 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2018-11-23 10:02:15,469 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:02:15,469 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2018-11-23 10:02:15,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-23 10:02:15,470 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:15,470 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:15,470 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:15,471 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:15,471 INFO L82 PathProgramCache]: Analyzing trace with hash 745989010, now seen corresponding path program 1 times [2018-11-23 10:02:15,471 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:15,472 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:15,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:15,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:15,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:15,547 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:15,684 INFO L256 TraceCheckUtils]: 0: Hoare triple {395#true} call ULTIMATE.init(); {395#true} is VALID [2018-11-23 10:02:15,685 INFO L273 TraceCheckUtils]: 1: Hoare triple {395#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {395#true} is VALID [2018-11-23 10:02:15,685 INFO L273 TraceCheckUtils]: 2: Hoare triple {395#true} assume true; {395#true} is VALID [2018-11-23 10:02:15,686 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {395#true} {395#true} #78#return; {395#true} is VALID [2018-11-23 10:02:15,686 INFO L256 TraceCheckUtils]: 4: Hoare triple {395#true} call #t~ret7 := main(); {395#true} is VALID [2018-11-23 10:02:15,704 INFO L273 TraceCheckUtils]: 5: Hoare triple {395#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {415#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:15,705 INFO L273 TraceCheckUtils]: 6: Hoare triple {415#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {415#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:15,710 INFO L273 TraceCheckUtils]: 7: Hoare triple {415#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {422#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:15,730 INFO L273 TraceCheckUtils]: 8: Hoare triple {422#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {422#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:15,746 INFO L273 TraceCheckUtils]: 9: Hoare triple {422#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {422#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:15,761 INFO L273 TraceCheckUtils]: 10: Hoare triple {422#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {415#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:15,775 INFO L273 TraceCheckUtils]: 11: Hoare triple {415#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {396#false} is VALID [2018-11-23 10:02:15,775 INFO L273 TraceCheckUtils]: 12: Hoare triple {396#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {396#false} is VALID [2018-11-23 10:02:15,776 INFO L273 TraceCheckUtils]: 13: Hoare triple {396#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {396#false} is VALID [2018-11-23 10:02:15,776 INFO L256 TraceCheckUtils]: 14: Hoare triple {396#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {396#false} is VALID [2018-11-23 10:02:15,777 INFO L273 TraceCheckUtils]: 15: Hoare triple {396#false} ~cond := #in~cond; {396#false} is VALID [2018-11-23 10:02:15,777 INFO L273 TraceCheckUtils]: 16: Hoare triple {396#false} assume 0bv32 == ~cond; {396#false} is VALID [2018-11-23 10:02:15,777 INFO L273 TraceCheckUtils]: 17: Hoare triple {396#false} assume !false; {396#false} is VALID [2018-11-23 10:02:15,780 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:15,786 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:02:15,924 INFO L273 TraceCheckUtils]: 17: Hoare triple {396#false} assume !false; {396#false} is VALID [2018-11-23 10:02:15,924 INFO L273 TraceCheckUtils]: 16: Hoare triple {396#false} assume 0bv32 == ~cond; {396#false} is VALID [2018-11-23 10:02:15,924 INFO L273 TraceCheckUtils]: 15: Hoare triple {396#false} ~cond := #in~cond; {396#false} is VALID [2018-11-23 10:02:15,925 INFO L256 TraceCheckUtils]: 14: Hoare triple {396#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {396#false} is VALID [2018-11-23 10:02:15,925 INFO L273 TraceCheckUtils]: 13: Hoare triple {396#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {396#false} is VALID [2018-11-23 10:02:15,925 INFO L273 TraceCheckUtils]: 12: Hoare triple {396#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {396#false} is VALID [2018-11-23 10:02:15,930 INFO L273 TraceCheckUtils]: 11: Hoare triple {471#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {396#false} is VALID [2018-11-23 10:02:15,935 INFO L273 TraceCheckUtils]: 10: Hoare triple {475#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {471#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:15,936 INFO L273 TraceCheckUtils]: 9: Hoare triple {475#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {475#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:15,936 INFO L273 TraceCheckUtils]: 8: Hoare triple {475#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {475#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:15,938 INFO L273 TraceCheckUtils]: 7: Hoare triple {471#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {475#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:15,938 INFO L273 TraceCheckUtils]: 6: Hoare triple {471#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {471#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:15,940 INFO L273 TraceCheckUtils]: 5: Hoare triple {395#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {471#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:15,940 INFO L256 TraceCheckUtils]: 4: Hoare triple {395#true} call #t~ret7 := main(); {395#true} is VALID [2018-11-23 10:02:15,941 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {395#true} {395#true} #78#return; {395#true} is VALID [2018-11-23 10:02:15,941 INFO L273 TraceCheckUtils]: 2: Hoare triple {395#true} assume true; {395#true} is VALID [2018-11-23 10:02:15,942 INFO L273 TraceCheckUtils]: 1: Hoare triple {395#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {395#true} is VALID [2018-11-23 10:02:15,942 INFO L256 TraceCheckUtils]: 0: Hoare triple {395#true} call ULTIMATE.init(); {395#true} is VALID [2018-11-23 10:02:15,944 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:15,946 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:02:15,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 10:02:15,947 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-11-23 10:02:15,947 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:15,947 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:02:16,017 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:16,017 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:16,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:16,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:16,018 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand 6 states. [2018-11-23 10:02:17,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:17,111 INFO L93 Difference]: Finished difference Result 74 states and 91 transitions. [2018-11-23 10:02:17,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 10:02:17,111 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-11-23 10:02:17,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:17,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:02:17,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 88 transitions. [2018-11-23 10:02:17,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:02:17,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 88 transitions. [2018-11-23 10:02:17,121 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 88 transitions. [2018-11-23 10:02:17,347 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:17,350 INFO L225 Difference]: With dead ends: 74 [2018-11-23 10:02:17,350 INFO L226 Difference]: Without dead ends: 63 [2018-11-23 10:02:17,351 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2018-11-23 10:02:17,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-11-23 10:02:17,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 39. [2018-11-23 10:02:17,401 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:17,401 INFO L82 GeneralOperation]: Start isEquivalent. First operand 63 states. Second operand 39 states. [2018-11-23 10:02:17,402 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand 39 states. [2018-11-23 10:02:17,402 INFO L87 Difference]: Start difference. First operand 63 states. Second operand 39 states. [2018-11-23 10:02:17,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:17,409 INFO L93 Difference]: Finished difference Result 63 states and 77 transitions. [2018-11-23 10:02:17,409 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 77 transitions. [2018-11-23 10:02:17,410 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:17,410 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:17,410 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 63 states. [2018-11-23 10:02:17,411 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 63 states. [2018-11-23 10:02:17,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:17,416 INFO L93 Difference]: Finished difference Result 63 states and 77 transitions. [2018-11-23 10:02:17,416 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 77 transitions. [2018-11-23 10:02:17,417 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:17,417 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:17,417 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:17,418 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:17,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-11-23 10:02:17,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 46 transitions. [2018-11-23 10:02:17,420 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 46 transitions. Word has length 18 [2018-11-23 10:02:17,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:17,421 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 46 transitions. [2018-11-23 10:02:17,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:17,421 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-23 10:02:17,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 10:02:17,422 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:17,423 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:17,423 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:17,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:17,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1484647538, now seen corresponding path program 1 times [2018-11-23 10:02:17,424 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:17,424 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:17,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:17,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:17,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:17,510 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:17,704 INFO L256 TraceCheckUtils]: 0: Hoare triple {797#true} call ULTIMATE.init(); {797#true} is VALID [2018-11-23 10:02:17,705 INFO L273 TraceCheckUtils]: 1: Hoare triple {797#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {797#true} is VALID [2018-11-23 10:02:17,705 INFO L273 TraceCheckUtils]: 2: Hoare triple {797#true} assume true; {797#true} is VALID [2018-11-23 10:02:17,706 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {797#true} {797#true} #78#return; {797#true} is VALID [2018-11-23 10:02:17,706 INFO L256 TraceCheckUtils]: 4: Hoare triple {797#true} call #t~ret7 := main(); {797#true} is VALID [2018-11-23 10:02:17,708 INFO L273 TraceCheckUtils]: 5: Hoare triple {797#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,708 INFO L273 TraceCheckUtils]: 6: Hoare triple {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,709 INFO L273 TraceCheckUtils]: 7: Hoare triple {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {824#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,710 INFO L273 TraceCheckUtils]: 8: Hoare triple {824#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {824#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,711 INFO L273 TraceCheckUtils]: 9: Hoare triple {824#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {824#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,712 INFO L273 TraceCheckUtils]: 10: Hoare triple {824#(and (= main_~pos~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,713 INFO L273 TraceCheckUtils]: 11: Hoare triple {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,714 INFO L273 TraceCheckUtils]: 12: Hoare triple {817#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {840#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,715 INFO L273 TraceCheckUtils]: 13: Hoare triple {840#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {840#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,717 INFO L273 TraceCheckUtils]: 14: Hoare triple {840#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {847#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:17,718 INFO L273 TraceCheckUtils]: 15: Hoare triple {847#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {798#false} is VALID [2018-11-23 10:02:17,718 INFO L273 TraceCheckUtils]: 16: Hoare triple {798#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {798#false} is VALID [2018-11-23 10:02:17,718 INFO L273 TraceCheckUtils]: 17: Hoare triple {798#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {798#false} is VALID [2018-11-23 10:02:17,719 INFO L256 TraceCheckUtils]: 18: Hoare triple {798#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {798#false} is VALID [2018-11-23 10:02:17,719 INFO L273 TraceCheckUtils]: 19: Hoare triple {798#false} ~cond := #in~cond; {798#false} is VALID [2018-11-23 10:02:17,720 INFO L273 TraceCheckUtils]: 20: Hoare triple {798#false} assume 0bv32 == ~cond; {798#false} is VALID [2018-11-23 10:02:17,720 INFO L273 TraceCheckUtils]: 21: Hoare triple {798#false} assume !false; {798#false} is VALID [2018-11-23 10:02:17,723 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:17,723 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:02:17,999 INFO L273 TraceCheckUtils]: 21: Hoare triple {798#false} assume !false; {798#false} is VALID [2018-11-23 10:02:18,000 INFO L273 TraceCheckUtils]: 20: Hoare triple {798#false} assume 0bv32 == ~cond; {798#false} is VALID [2018-11-23 10:02:18,000 INFO L273 TraceCheckUtils]: 19: Hoare triple {798#false} ~cond := #in~cond; {798#false} is VALID [2018-11-23 10:02:18,001 INFO L256 TraceCheckUtils]: 18: Hoare triple {798#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {798#false} is VALID [2018-11-23 10:02:18,001 INFO L273 TraceCheckUtils]: 17: Hoare triple {798#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {798#false} is VALID [2018-11-23 10:02:18,002 INFO L273 TraceCheckUtils]: 16: Hoare triple {798#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {798#false} is VALID [2018-11-23 10:02:18,003 INFO L273 TraceCheckUtils]: 15: Hoare triple {887#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {798#false} is VALID [2018-11-23 10:02:18,003 INFO L273 TraceCheckUtils]: 14: Hoare triple {891#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {887#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,004 INFO L273 TraceCheckUtils]: 13: Hoare triple {891#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {891#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,026 INFO L273 TraceCheckUtils]: 12: Hoare triple {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {891#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,027 INFO L273 TraceCheckUtils]: 11: Hoare triple {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,028 INFO L273 TraceCheckUtils]: 10: Hoare triple {905#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,034 INFO L273 TraceCheckUtils]: 9: Hoare triple {905#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {905#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,036 INFO L273 TraceCheckUtils]: 8: Hoare triple {905#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {905#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,038 INFO L273 TraceCheckUtils]: 7: Hoare triple {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {905#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,038 INFO L273 TraceCheckUtils]: 6: Hoare triple {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,039 INFO L273 TraceCheckUtils]: 5: Hoare triple {797#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {898#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:18,040 INFO L256 TraceCheckUtils]: 4: Hoare triple {797#true} call #t~ret7 := main(); {797#true} is VALID [2018-11-23 10:02:18,040 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {797#true} {797#true} #78#return; {797#true} is VALID [2018-11-23 10:02:18,040 INFO L273 TraceCheckUtils]: 2: Hoare triple {797#true} assume true; {797#true} is VALID [2018-11-23 10:02:18,040 INFO L273 TraceCheckUtils]: 1: Hoare triple {797#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {797#true} is VALID [2018-11-23 10:02:18,041 INFO L256 TraceCheckUtils]: 0: Hoare triple {797#true} call ULTIMATE.init(); {797#true} is VALID [2018-11-23 10:02:18,042 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:18,047 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:02:18,047 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-23 10:02:18,048 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-11-23 10:02:18,048 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:18,048 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 10:02:18,159 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:18,159 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 10:02:18,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 10:02:18,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-23 10:02:18,160 INFO L87 Difference]: Start difference. First operand 39 states and 46 transitions. Second operand 10 states. [2018-11-23 10:02:22,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:22,062 INFO L93 Difference]: Finished difference Result 142 states and 180 transitions. [2018-11-23 10:02:22,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 10:02:22,062 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-11-23 10:02:22,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:22,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:02:22,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 170 transitions. [2018-11-23 10:02:22,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:02:22,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 170 transitions. [2018-11-23 10:02:22,078 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 170 transitions. [2018-11-23 10:02:22,650 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:22,657 INFO L225 Difference]: With dead ends: 142 [2018-11-23 10:02:22,658 INFO L226 Difference]: Without dead ends: 131 [2018-11-23 10:02:22,659 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=206, Invalid=444, Unknown=0, NotChecked=0, Total=650 [2018-11-23 10:02:22,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-11-23 10:02:22,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 62. [2018-11-23 10:02:22,812 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:22,812 INFO L82 GeneralOperation]: Start isEquivalent. First operand 131 states. Second operand 62 states. [2018-11-23 10:02:22,813 INFO L74 IsIncluded]: Start isIncluded. First operand 131 states. Second operand 62 states. [2018-11-23 10:02:22,813 INFO L87 Difference]: Start difference. First operand 131 states. Second operand 62 states. [2018-11-23 10:02:22,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:22,821 INFO L93 Difference]: Finished difference Result 131 states and 164 transitions. [2018-11-23 10:02:22,821 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 164 transitions. [2018-11-23 10:02:22,823 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:22,824 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:22,824 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 131 states. [2018-11-23 10:02:22,824 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 131 states. [2018-11-23 10:02:22,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:22,832 INFO L93 Difference]: Finished difference Result 131 states and 164 transitions. [2018-11-23 10:02:22,832 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 164 transitions. [2018-11-23 10:02:22,834 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:22,834 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:22,834 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:22,835 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:22,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-11-23 10:02:22,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 75 transitions. [2018-11-23 10:02:22,838 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 75 transitions. Word has length 22 [2018-11-23 10:02:22,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:22,839 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 75 transitions. [2018-11-23 10:02:22,839 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 10:02:22,839 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 75 transitions. [2018-11-23 10:02:22,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 10:02:22,840 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:22,840 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:22,841 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:22,841 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:22,842 INFO L82 PathProgramCache]: Analyzing trace with hash -618272301, now seen corresponding path program 2 times [2018-11-23 10:02:22,842 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:22,842 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:22,875 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:02:22,924 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:02:22,924 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:02:22,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:22,940 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:22,993 INFO L256 TraceCheckUtils]: 0: Hoare triple {1516#true} call ULTIMATE.init(); {1516#true} is VALID [2018-11-23 10:02:22,993 INFO L273 TraceCheckUtils]: 1: Hoare triple {1516#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1516#true} is VALID [2018-11-23 10:02:22,994 INFO L273 TraceCheckUtils]: 2: Hoare triple {1516#true} assume true; {1516#true} is VALID [2018-11-23 10:02:22,994 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1516#true} {1516#true} #78#return; {1516#true} is VALID [2018-11-23 10:02:22,994 INFO L256 TraceCheckUtils]: 4: Hoare triple {1516#true} call #t~ret7 := main(); {1516#true} is VALID [2018-11-23 10:02:22,995 INFO L273 TraceCheckUtils]: 5: Hoare triple {1516#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {1516#true} is VALID [2018-11-23 10:02:22,995 INFO L273 TraceCheckUtils]: 6: Hoare triple {1516#true} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1516#true} is VALID [2018-11-23 10:02:22,995 INFO L273 TraceCheckUtils]: 7: Hoare triple {1516#true} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {1542#(= (_ bv1 32) main_~found~0)} is VALID [2018-11-23 10:02:22,997 INFO L273 TraceCheckUtils]: 8: Hoare triple {1542#(= (_ bv1 32) main_~found~0)} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1542#(= (_ bv1 32) main_~found~0)} is VALID [2018-11-23 10:02:22,997 INFO L273 TraceCheckUtils]: 9: Hoare triple {1542#(= (_ bv1 32) main_~found~0)} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1517#false} is VALID [2018-11-23 10:02:22,998 INFO L273 TraceCheckUtils]: 10: Hoare triple {1517#false} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {1517#false} is VALID [2018-11-23 10:02:22,998 INFO L273 TraceCheckUtils]: 11: Hoare triple {1517#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1517#false} is VALID [2018-11-23 10:02:22,998 INFO L273 TraceCheckUtils]: 12: Hoare triple {1517#false} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {1517#false} is VALID [2018-11-23 10:02:22,998 INFO L273 TraceCheckUtils]: 13: Hoare triple {1517#false} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {1517#false} is VALID [2018-11-23 10:02:22,998 INFO L273 TraceCheckUtils]: 14: Hoare triple {1517#false} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1517#false} is VALID [2018-11-23 10:02:22,999 INFO L273 TraceCheckUtils]: 15: Hoare triple {1517#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1517#false} is VALID [2018-11-23 10:02:22,999 INFO L273 TraceCheckUtils]: 16: Hoare triple {1517#false} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {1517#false} is VALID [2018-11-23 10:02:22,999 INFO L273 TraceCheckUtils]: 17: Hoare triple {1517#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {1517#false} is VALID [2018-11-23 10:02:23,000 INFO L273 TraceCheckUtils]: 18: Hoare triple {1517#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1517#false} is VALID [2018-11-23 10:02:23,000 INFO L256 TraceCheckUtils]: 19: Hoare triple {1517#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {1517#false} is VALID [2018-11-23 10:02:23,001 INFO L273 TraceCheckUtils]: 20: Hoare triple {1517#false} ~cond := #in~cond; {1517#false} is VALID [2018-11-23 10:02:23,001 INFO L273 TraceCheckUtils]: 21: Hoare triple {1517#false} assume 0bv32 == ~cond; {1517#false} is VALID [2018-11-23 10:02:23,001 INFO L273 TraceCheckUtils]: 22: Hoare triple {1517#false} assume !false; {1517#false} is VALID [2018-11-23 10:02:23,002 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:02:23,003 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:02:23,007 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:23,007 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:02:23,008 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 23 [2018-11-23 10:02:23,008 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:23,008 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:02:23,125 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:23,125 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:02:23,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:02:23,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:23,126 INFO L87 Difference]: Start difference. First operand 62 states and 75 transitions. Second operand 3 states. [2018-11-23 10:02:23,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:23,347 INFO L93 Difference]: Finished difference Result 102 states and 126 transitions. [2018-11-23 10:02:23,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:02:23,347 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 23 [2018-11-23 10:02:23,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:23,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:02:23,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2018-11-23 10:02:23,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:02:23,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2018-11-23 10:02:23,351 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 48 transitions. [2018-11-23 10:02:23,490 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:23,493 INFO L225 Difference]: With dead ends: 102 [2018-11-23 10:02:23,493 INFO L226 Difference]: Without dead ends: 62 [2018-11-23 10:02:23,494 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:23,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-11-23 10:02:23,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 60. [2018-11-23 10:02:23,599 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:23,599 INFO L82 GeneralOperation]: Start isEquivalent. First operand 62 states. Second operand 60 states. [2018-11-23 10:02:23,600 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 60 states. [2018-11-23 10:02:23,600 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 60 states. [2018-11-23 10:02:23,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:23,604 INFO L93 Difference]: Finished difference Result 62 states and 70 transitions. [2018-11-23 10:02:23,604 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 70 transitions. [2018-11-23 10:02:23,605 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:23,605 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:23,605 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand 62 states. [2018-11-23 10:02:23,605 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 62 states. [2018-11-23 10:02:23,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:23,608 INFO L93 Difference]: Finished difference Result 62 states and 70 transitions. [2018-11-23 10:02:23,609 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 70 transitions. [2018-11-23 10:02:23,609 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:23,610 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:23,610 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:23,610 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:23,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-11-23 10:02:23,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 68 transitions. [2018-11-23 10:02:23,613 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 68 transitions. Word has length 23 [2018-11-23 10:02:23,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:23,613 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 68 transitions. [2018-11-23 10:02:23,614 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:02:23,614 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 68 transitions. [2018-11-23 10:02:23,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 10:02:23,615 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:23,615 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:23,615 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:23,615 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:23,616 INFO L82 PathProgramCache]: Analyzing trace with hash -1639340655, now seen corresponding path program 1 times [2018-11-23 10:02:23,616 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:23,616 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:23,651 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 10:02:23,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:23,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:23,702 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:23,961 INFO L256 TraceCheckUtils]: 0: Hoare triple {1941#true} call ULTIMATE.init(); {1941#true} is VALID [2018-11-23 10:02:23,961 INFO L273 TraceCheckUtils]: 1: Hoare triple {1941#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1941#true} is VALID [2018-11-23 10:02:23,962 INFO L273 TraceCheckUtils]: 2: Hoare triple {1941#true} assume true; {1941#true} is VALID [2018-11-23 10:02:23,962 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1941#true} {1941#true} #78#return; {1941#true} is VALID [2018-11-23 10:02:23,962 INFO L256 TraceCheckUtils]: 4: Hoare triple {1941#true} call #t~ret7 := main(); {1941#true} is VALID [2018-11-23 10:02:23,968 INFO L273 TraceCheckUtils]: 5: Hoare triple {1941#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {1961#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,973 INFO L273 TraceCheckUtils]: 6: Hoare triple {1961#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1961#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,975 INFO L273 TraceCheckUtils]: 7: Hoare triple {1961#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {1961#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,978 INFO L273 TraceCheckUtils]: 8: Hoare triple {1961#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,983 INFO L273 TraceCheckUtils]: 9: Hoare triple {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,992 INFO L273 TraceCheckUtils]: 10: Hoare triple {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {1978#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,993 INFO L273 TraceCheckUtils]: 11: Hoare triple {1978#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1978#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,994 INFO L273 TraceCheckUtils]: 12: Hoare triple {1978#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {1978#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:23,998 INFO L273 TraceCheckUtils]: 13: Hoare triple {1978#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:24,001 INFO L273 TraceCheckUtils]: 14: Hoare triple {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:24,002 INFO L273 TraceCheckUtils]: 15: Hoare triple {1971#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1994#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:24,003 INFO L273 TraceCheckUtils]: 16: Hoare triple {1994#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {1942#false} is VALID [2018-11-23 10:02:24,003 INFO L273 TraceCheckUtils]: 17: Hoare triple {1942#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {1942#false} is VALID [2018-11-23 10:02:24,003 INFO L273 TraceCheckUtils]: 18: Hoare triple {1942#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1942#false} is VALID [2018-11-23 10:02:24,004 INFO L256 TraceCheckUtils]: 19: Hoare triple {1942#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {1942#false} is VALID [2018-11-23 10:02:24,004 INFO L273 TraceCheckUtils]: 20: Hoare triple {1942#false} ~cond := #in~cond; {1942#false} is VALID [2018-11-23 10:02:24,005 INFO L273 TraceCheckUtils]: 21: Hoare triple {1942#false} assume 0bv32 == ~cond; {1942#false} is VALID [2018-11-23 10:02:24,005 INFO L273 TraceCheckUtils]: 22: Hoare triple {1942#false} assume !false; {1942#false} is VALID [2018-11-23 10:02:24,008 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:24,008 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:02:24,243 INFO L273 TraceCheckUtils]: 22: Hoare triple {1942#false} assume !false; {1942#false} is VALID [2018-11-23 10:02:24,244 INFO L273 TraceCheckUtils]: 21: Hoare triple {1942#false} assume 0bv32 == ~cond; {1942#false} is VALID [2018-11-23 10:02:24,244 INFO L273 TraceCheckUtils]: 20: Hoare triple {1942#false} ~cond := #in~cond; {1942#false} is VALID [2018-11-23 10:02:24,244 INFO L256 TraceCheckUtils]: 19: Hoare triple {1942#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {1942#false} is VALID [2018-11-23 10:02:24,244 INFO L273 TraceCheckUtils]: 18: Hoare triple {1942#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1942#false} is VALID [2018-11-23 10:02:24,244 INFO L273 TraceCheckUtils]: 17: Hoare triple {1942#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {1942#false} is VALID [2018-11-23 10:02:24,245 INFO L273 TraceCheckUtils]: 16: Hoare triple {2034#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {1942#false} is VALID [2018-11-23 10:02:24,245 INFO L273 TraceCheckUtils]: 15: Hoare triple {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2034#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,246 INFO L273 TraceCheckUtils]: 14: Hoare triple {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,246 INFO L273 TraceCheckUtils]: 13: Hoare triple {2045#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,247 INFO L273 TraceCheckUtils]: 12: Hoare triple {2045#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {2045#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,247 INFO L273 TraceCheckUtils]: 11: Hoare triple {2045#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2045#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,250 INFO L273 TraceCheckUtils]: 10: Hoare triple {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {2045#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,250 INFO L273 TraceCheckUtils]: 9: Hoare triple {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,274 INFO L273 TraceCheckUtils]: 8: Hoare triple {2061#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2038#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,274 INFO L273 TraceCheckUtils]: 7: Hoare triple {2061#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {2061#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,275 INFO L273 TraceCheckUtils]: 6: Hoare triple {2061#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2061#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,276 INFO L273 TraceCheckUtils]: 5: Hoare triple {1941#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {2061#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:24,276 INFO L256 TraceCheckUtils]: 4: Hoare triple {1941#true} call #t~ret7 := main(); {1941#true} is VALID [2018-11-23 10:02:24,276 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1941#true} {1941#true} #78#return; {1941#true} is VALID [2018-11-23 10:02:24,276 INFO L273 TraceCheckUtils]: 2: Hoare triple {1941#true} assume true; {1941#true} is VALID [2018-11-23 10:02:24,276 INFO L273 TraceCheckUtils]: 1: Hoare triple {1941#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1941#true} is VALID [2018-11-23 10:02:24,277 INFO L256 TraceCheckUtils]: 0: Hoare triple {1941#true} call ULTIMATE.init(); {1941#true} is VALID [2018-11-23 10:02:24,278 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:24,279 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:02:24,280 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-23 10:02:24,280 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-11-23 10:02:24,280 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:24,280 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 10:02:24,376 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:24,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 10:02:24,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 10:02:24,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-23 10:02:24,377 INFO L87 Difference]: Start difference. First operand 60 states and 68 transitions. Second operand 10 states. [2018-11-23 10:02:26,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:26,764 INFO L93 Difference]: Finished difference Result 115 states and 135 transitions. [2018-11-23 10:02:26,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-23 10:02:26,764 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-11-23 10:02:26,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:26,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:02:26,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 117 transitions. [2018-11-23 10:02:26,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:02:26,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 117 transitions. [2018-11-23 10:02:26,773 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states and 117 transitions. [2018-11-23 10:02:27,078 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 117 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:27,081 INFO L225 Difference]: With dead ends: 115 [2018-11-23 10:02:27,081 INFO L226 Difference]: Without dead ends: 104 [2018-11-23 10:02:27,082 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=177, Invalid=375, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:02:27,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-11-23 10:02:27,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 64. [2018-11-23 10:02:27,212 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:27,212 INFO L82 GeneralOperation]: Start isEquivalent. First operand 104 states. Second operand 64 states. [2018-11-23 10:02:27,212 INFO L74 IsIncluded]: Start isIncluded. First operand 104 states. Second operand 64 states. [2018-11-23 10:02:27,212 INFO L87 Difference]: Start difference. First operand 104 states. Second operand 64 states. [2018-11-23 10:02:27,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:27,216 INFO L93 Difference]: Finished difference Result 104 states and 119 transitions. [2018-11-23 10:02:27,216 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 119 transitions. [2018-11-23 10:02:27,216 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:27,217 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:27,217 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand 104 states. [2018-11-23 10:02:27,217 INFO L87 Difference]: Start difference. First operand 64 states. Second operand 104 states. [2018-11-23 10:02:27,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:27,221 INFO L93 Difference]: Finished difference Result 104 states and 119 transitions. [2018-11-23 10:02:27,221 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 119 transitions. [2018-11-23 10:02:27,222 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:27,222 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:27,222 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:27,222 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:27,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-11-23 10:02:27,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 73 transitions. [2018-11-23 10:02:27,225 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 73 transitions. Word has length 23 [2018-11-23 10:02:27,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:27,225 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 73 transitions. [2018-11-23 10:02:27,225 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 10:02:27,225 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 73 transitions. [2018-11-23 10:02:27,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:02:27,226 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:27,226 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:27,227 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:27,227 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:27,227 INFO L82 PathProgramCache]: Analyzing trace with hash 675629042, now seen corresponding path program 1 times [2018-11-23 10:02:27,227 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:27,227 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:27,259 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:27,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:27,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:27,311 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:27,525 INFO L256 TraceCheckUtils]: 0: Hoare triple {2577#true} call ULTIMATE.init(); {2577#true} is VALID [2018-11-23 10:02:27,526 INFO L273 TraceCheckUtils]: 1: Hoare triple {2577#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2577#true} is VALID [2018-11-23 10:02:27,526 INFO L273 TraceCheckUtils]: 2: Hoare triple {2577#true} assume true; {2577#true} is VALID [2018-11-23 10:02:27,526 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2577#true} {2577#true} #78#return; {2577#true} is VALID [2018-11-23 10:02:27,526 INFO L256 TraceCheckUtils]: 4: Hoare triple {2577#true} call #t~ret7 := main(); {2577#true} is VALID [2018-11-23 10:02:27,527 INFO L273 TraceCheckUtils]: 5: Hoare triple {2577#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {2597#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,527 INFO L273 TraceCheckUtils]: 6: Hoare triple {2597#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2597#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,528 INFO L273 TraceCheckUtils]: 7: Hoare triple {2597#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {2597#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,528 INFO L273 TraceCheckUtils]: 8: Hoare triple {2597#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2607#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,529 INFO L273 TraceCheckUtils]: 9: Hoare triple {2607#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2607#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,531 INFO L273 TraceCheckUtils]: 10: Hoare triple {2607#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {2607#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,532 INFO L273 TraceCheckUtils]: 11: Hoare triple {2607#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2617#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,532 INFO L273 TraceCheckUtils]: 12: Hoare triple {2617#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2617#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,533 INFO L273 TraceCheckUtils]: 13: Hoare triple {2617#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {2624#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,533 INFO L273 TraceCheckUtils]: 14: Hoare triple {2624#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2624#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,538 INFO L273 TraceCheckUtils]: 15: Hoare triple {2624#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {2624#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,539 INFO L273 TraceCheckUtils]: 16: Hoare triple {2624#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {2617#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:27,539 INFO L273 TraceCheckUtils]: 17: Hoare triple {2617#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {2578#false} is VALID [2018-11-23 10:02:27,539 INFO L273 TraceCheckUtils]: 18: Hoare triple {2578#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {2578#false} is VALID [2018-11-23 10:02:27,540 INFO L273 TraceCheckUtils]: 19: Hoare triple {2578#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2578#false} is VALID [2018-11-23 10:02:27,540 INFO L256 TraceCheckUtils]: 20: Hoare triple {2578#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {2578#false} is VALID [2018-11-23 10:02:27,540 INFO L273 TraceCheckUtils]: 21: Hoare triple {2578#false} ~cond := #in~cond; {2578#false} is VALID [2018-11-23 10:02:27,540 INFO L273 TraceCheckUtils]: 22: Hoare triple {2578#false} assume 0bv32 == ~cond; {2578#false} is VALID [2018-11-23 10:02:27,540 INFO L273 TraceCheckUtils]: 23: Hoare triple {2578#false} assume !false; {2578#false} is VALID [2018-11-23 10:02:27,542 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:27,542 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:02:27,733 INFO L273 TraceCheckUtils]: 23: Hoare triple {2578#false} assume !false; {2578#false} is VALID [2018-11-23 10:02:27,733 INFO L273 TraceCheckUtils]: 22: Hoare triple {2578#false} assume 0bv32 == ~cond; {2578#false} is VALID [2018-11-23 10:02:27,734 INFO L273 TraceCheckUtils]: 21: Hoare triple {2578#false} ~cond := #in~cond; {2578#false} is VALID [2018-11-23 10:02:27,734 INFO L256 TraceCheckUtils]: 20: Hoare triple {2578#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {2578#false} is VALID [2018-11-23 10:02:27,734 INFO L273 TraceCheckUtils]: 19: Hoare triple {2578#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2578#false} is VALID [2018-11-23 10:02:27,734 INFO L273 TraceCheckUtils]: 18: Hoare triple {2578#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {2578#false} is VALID [2018-11-23 10:02:27,740 INFO L273 TraceCheckUtils]: 17: Hoare triple {2673#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {2578#false} is VALID [2018-11-23 10:02:27,741 INFO L273 TraceCheckUtils]: 16: Hoare triple {2677#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {2673#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,741 INFO L273 TraceCheckUtils]: 15: Hoare triple {2677#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {2677#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,742 INFO L273 TraceCheckUtils]: 14: Hoare triple {2677#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2677#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,743 INFO L273 TraceCheckUtils]: 13: Hoare triple {2673#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {2677#(bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,743 INFO L273 TraceCheckUtils]: 12: Hoare triple {2673#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2673#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,745 INFO L273 TraceCheckUtils]: 11: Hoare triple {2693#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2673#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,745 INFO L273 TraceCheckUtils]: 10: Hoare triple {2693#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {2693#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,746 INFO L273 TraceCheckUtils]: 9: Hoare triple {2693#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2693#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,774 INFO L273 TraceCheckUtils]: 8: Hoare triple {2703#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2693#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,774 INFO L273 TraceCheckUtils]: 7: Hoare triple {2703#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {2703#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,775 INFO L273 TraceCheckUtils]: 6: Hoare triple {2703#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2703#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,775 INFO L273 TraceCheckUtils]: 5: Hoare triple {2577#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {2703#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:27,776 INFO L256 TraceCheckUtils]: 4: Hoare triple {2577#true} call #t~ret7 := main(); {2577#true} is VALID [2018-11-23 10:02:27,776 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2577#true} {2577#true} #78#return; {2577#true} is VALID [2018-11-23 10:02:27,776 INFO L273 TraceCheckUtils]: 2: Hoare triple {2577#true} assume true; {2577#true} is VALID [2018-11-23 10:02:27,776 INFO L273 TraceCheckUtils]: 1: Hoare triple {2577#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2577#true} is VALID [2018-11-23 10:02:27,777 INFO L256 TraceCheckUtils]: 0: Hoare triple {2577#true} call ULTIMATE.init(); {2577#true} is VALID [2018-11-23 10:02:27,777 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:27,779 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:02:27,779 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-23 10:02:27,779 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 24 [2018-11-23 10:02:27,780 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:27,780 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 10:02:27,860 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:27,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 10:02:27,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 10:02:27,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-23 10:02:27,861 INFO L87 Difference]: Start difference. First operand 64 states and 73 transitions. Second operand 10 states. [2018-11-23 10:02:29,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:29,764 INFO L93 Difference]: Finished difference Result 108 states and 125 transitions. [2018-11-23 10:02:29,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 10:02:29,765 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 24 [2018-11-23 10:02:29,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:29,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:02:29,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 108 transitions. [2018-11-23 10:02:29,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:02:29,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 108 transitions. [2018-11-23 10:02:29,771 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states and 108 transitions. [2018-11-23 10:02:30,092 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:30,094 INFO L225 Difference]: With dead ends: 108 [2018-11-23 10:02:30,094 INFO L226 Difference]: Without dead ends: 97 [2018-11-23 10:02:30,095 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=147, Invalid=315, Unknown=0, NotChecked=0, Total=462 [2018-11-23 10:02:30,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-11-23 10:02:30,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 71. [2018-11-23 10:02:30,237 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:30,237 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand 71 states. [2018-11-23 10:02:30,237 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand 71 states. [2018-11-23 10:02:30,237 INFO L87 Difference]: Start difference. First operand 97 states. Second operand 71 states. [2018-11-23 10:02:30,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:30,241 INFO L93 Difference]: Finished difference Result 97 states and 109 transitions. [2018-11-23 10:02:30,241 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 109 transitions. [2018-11-23 10:02:30,242 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:30,242 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:30,242 INFO L74 IsIncluded]: Start isIncluded. First operand 71 states. Second operand 97 states. [2018-11-23 10:02:30,242 INFO L87 Difference]: Start difference. First operand 71 states. Second operand 97 states. [2018-11-23 10:02:30,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:30,245 INFO L93 Difference]: Finished difference Result 97 states and 109 transitions. [2018-11-23 10:02:30,245 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 109 transitions. [2018-11-23 10:02:30,245 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:30,246 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:30,246 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:30,246 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:30,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-11-23 10:02:30,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 79 transitions. [2018-11-23 10:02:30,248 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 79 transitions. Word has length 24 [2018-11-23 10:02:30,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:30,248 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 79 transitions. [2018-11-23 10:02:30,248 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 10:02:30,248 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 79 transitions. [2018-11-23 10:02:30,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:02:30,249 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:30,249 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:30,249 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:30,249 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:30,249 INFO L82 PathProgramCache]: Analyzing trace with hash 218519942, now seen corresponding path program 3 times [2018-11-23 10:02:30,250 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:30,250 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:30,265 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:02:30,325 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-23 10:02:30,326 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:02:30,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:30,353 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:30,486 INFO L256 TraceCheckUtils]: 0: Hoare triple {3200#true} call ULTIMATE.init(); {3200#true} is VALID [2018-11-23 10:02:30,487 INFO L273 TraceCheckUtils]: 1: Hoare triple {3200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3200#true} is VALID [2018-11-23 10:02:30,487 INFO L273 TraceCheckUtils]: 2: Hoare triple {3200#true} assume true; {3200#true} is VALID [2018-11-23 10:02:30,487 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3200#true} {3200#true} #78#return; {3200#true} is VALID [2018-11-23 10:02:30,487 INFO L256 TraceCheckUtils]: 4: Hoare triple {3200#true} call #t~ret7 := main(); {3200#true} is VALID [2018-11-23 10:02:30,488 INFO L273 TraceCheckUtils]: 5: Hoare triple {3200#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {3220#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,488 INFO L273 TraceCheckUtils]: 6: Hoare triple {3220#(= main_~i~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3220#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,489 INFO L273 TraceCheckUtils]: 7: Hoare triple {3220#(= main_~i~0 (_ bv0 32))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,489 INFO L273 TraceCheckUtils]: 8: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,489 INFO L273 TraceCheckUtils]: 9: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,490 INFO L273 TraceCheckUtils]: 10: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,490 INFO L273 TraceCheckUtils]: 11: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,491 INFO L273 TraceCheckUtils]: 12: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,491 INFO L273 TraceCheckUtils]: 13: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,491 INFO L273 TraceCheckUtils]: 14: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,492 INFO L273 TraceCheckUtils]: 15: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,493 INFO L273 TraceCheckUtils]: 16: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,493 INFO L273 TraceCheckUtils]: 17: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,494 INFO L273 TraceCheckUtils]: 18: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,495 INFO L273 TraceCheckUtils]: 19: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,495 INFO L273 TraceCheckUtils]: 20: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,496 INFO L273 TraceCheckUtils]: 21: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,496 INFO L273 TraceCheckUtils]: 22: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,497 INFO L273 TraceCheckUtils]: 23: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {3227#(= main_~pos~0 (_ bv0 32))} is VALID [2018-11-23 10:02:30,498 INFO L273 TraceCheckUtils]: 24: Hoare triple {3227#(= main_~pos~0 (_ bv0 32))} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {3279#(and (= main_~x~0 (_ bv0 32)) (= main_~pos~0 (_ bv0 32)))} is VALID [2018-11-23 10:02:30,499 INFO L273 TraceCheckUtils]: 25: Hoare triple {3279#(and (= main_~x~0 (_ bv0 32)) (= main_~pos~0 (_ bv0 32)))} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3201#false} is VALID [2018-11-23 10:02:30,499 INFO L256 TraceCheckUtils]: 26: Hoare triple {3201#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {3201#false} is VALID [2018-11-23 10:02:30,499 INFO L273 TraceCheckUtils]: 27: Hoare triple {3201#false} ~cond := #in~cond; {3201#false} is VALID [2018-11-23 10:02:30,500 INFO L273 TraceCheckUtils]: 28: Hoare triple {3201#false} assume 0bv32 == ~cond; {3201#false} is VALID [2018-11-23 10:02:30,500 INFO L273 TraceCheckUtils]: 29: Hoare triple {3201#false} assume !false; {3201#false} is VALID [2018-11-23 10:02:30,502 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 10:02:30,502 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:02:30,573 INFO L273 TraceCheckUtils]: 29: Hoare triple {3201#false} assume !false; {3201#false} is VALID [2018-11-23 10:02:30,574 INFO L273 TraceCheckUtils]: 28: Hoare triple {3201#false} assume 0bv32 == ~cond; {3201#false} is VALID [2018-11-23 10:02:30,574 INFO L273 TraceCheckUtils]: 27: Hoare triple {3201#false} ~cond := #in~cond; {3201#false} is VALID [2018-11-23 10:02:30,575 INFO L256 TraceCheckUtils]: 26: Hoare triple {3201#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {3201#false} is VALID [2018-11-23 10:02:30,578 INFO L273 TraceCheckUtils]: 25: Hoare triple {3307#(not (bvslt main_~x~0 main_~pos~0))} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3201#false} is VALID [2018-11-23 10:02:30,579 INFO L273 TraceCheckUtils]: 24: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {3307#(not (bvslt main_~x~0 main_~pos~0))} is VALID [2018-11-23 10:02:30,579 INFO L273 TraceCheckUtils]: 23: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,580 INFO L273 TraceCheckUtils]: 22: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,580 INFO L273 TraceCheckUtils]: 21: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,580 INFO L273 TraceCheckUtils]: 20: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,581 INFO L273 TraceCheckUtils]: 19: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,588 INFO L273 TraceCheckUtils]: 18: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,588 INFO L273 TraceCheckUtils]: 17: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,589 INFO L273 TraceCheckUtils]: 16: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,589 INFO L273 TraceCheckUtils]: 15: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,590 INFO L273 TraceCheckUtils]: 14: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,590 INFO L273 TraceCheckUtils]: 13: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,590 INFO L273 TraceCheckUtils]: 12: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,591 INFO L273 TraceCheckUtils]: 11: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,591 INFO L273 TraceCheckUtils]: 10: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,592 INFO L273 TraceCheckUtils]: 9: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,592 INFO L273 TraceCheckUtils]: 8: Hoare triple {3311#(not (bvslt (_ bv0 32) main_~pos~0))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,593 INFO L273 TraceCheckUtils]: 7: Hoare triple {3363#(not (bvslt (_ bv0 32) main_~i~0))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {3311#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:30,594 INFO L273 TraceCheckUtils]: 6: Hoare triple {3363#(not (bvslt (_ bv0 32) main_~i~0))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3363#(not (bvslt (_ bv0 32) main_~i~0))} is VALID [2018-11-23 10:02:30,595 INFO L273 TraceCheckUtils]: 5: Hoare triple {3200#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {3363#(not (bvslt (_ bv0 32) main_~i~0))} is VALID [2018-11-23 10:02:30,596 INFO L256 TraceCheckUtils]: 4: Hoare triple {3200#true} call #t~ret7 := main(); {3200#true} is VALID [2018-11-23 10:02:30,596 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3200#true} {3200#true} #78#return; {3200#true} is VALID [2018-11-23 10:02:30,596 INFO L273 TraceCheckUtils]: 2: Hoare triple {3200#true} assume true; {3200#true} is VALID [2018-11-23 10:02:30,597 INFO L273 TraceCheckUtils]: 1: Hoare triple {3200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3200#true} is VALID [2018-11-23 10:02:30,597 INFO L256 TraceCheckUtils]: 0: Hoare triple {3200#true} call ULTIMATE.init(); {3200#true} is VALID [2018-11-23 10:02:30,598 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 10:02:30,604 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:02:30,604 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-23 10:02:30,605 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 30 [2018-11-23 10:02:30,605 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:30,605 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 10:02:30,713 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:30,714 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 10:02:30,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 10:02:30,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-23 10:02:30,714 INFO L87 Difference]: Start difference. First operand 71 states and 79 transitions. Second operand 8 states. [2018-11-23 10:02:31,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:31,471 INFO L93 Difference]: Finished difference Result 94 states and 103 transitions. [2018-11-23 10:02:31,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:31,471 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 30 [2018-11-23 10:02:31,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:31,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 10:02:31,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 50 transitions. [2018-11-23 10:02:31,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 10:02:31,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 50 transitions. [2018-11-23 10:02:31,476 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 50 transitions. [2018-11-23 10:02:31,579 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:31,580 INFO L225 Difference]: With dead ends: 94 [2018-11-23 10:02:31,581 INFO L226 Difference]: Without dead ends: 66 [2018-11-23 10:02:31,581 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-11-23 10:02:31,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-11-23 10:02:31,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-11-23 10:02:31,679 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:31,679 INFO L82 GeneralOperation]: Start isEquivalent. First operand 66 states. Second operand 66 states. [2018-11-23 10:02:31,679 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand 66 states. [2018-11-23 10:02:31,680 INFO L87 Difference]: Start difference. First operand 66 states. Second operand 66 states. [2018-11-23 10:02:31,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:31,682 INFO L93 Difference]: Finished difference Result 66 states and 73 transitions. [2018-11-23 10:02:31,682 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 73 transitions. [2018-11-23 10:02:31,682 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:31,682 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:31,683 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand 66 states. [2018-11-23 10:02:31,683 INFO L87 Difference]: Start difference. First operand 66 states. Second operand 66 states. [2018-11-23 10:02:31,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:31,685 INFO L93 Difference]: Finished difference Result 66 states and 73 transitions. [2018-11-23 10:02:31,685 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 73 transitions. [2018-11-23 10:02:31,685 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:31,686 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:31,686 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:31,686 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:31,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-11-23 10:02:31,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 73 transitions. [2018-11-23 10:02:31,688 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 73 transitions. Word has length 30 [2018-11-23 10:02:31,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:31,688 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 73 transitions. [2018-11-23 10:02:31,688 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 10:02:31,689 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 73 transitions. [2018-11-23 10:02:31,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 10:02:31,689 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:31,690 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:31,690 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:31,690 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:31,690 INFO L82 PathProgramCache]: Analyzing trace with hash 283719817, now seen corresponding path program 2 times [2018-11-23 10:02:31,690 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:31,691 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:31,714 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:02:31,780 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:02:31,780 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:02:31,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:31,798 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:32,039 INFO L256 TraceCheckUtils]: 0: Hoare triple {3745#true} call ULTIMATE.init(); {3745#true} is VALID [2018-11-23 10:02:32,039 INFO L273 TraceCheckUtils]: 1: Hoare triple {3745#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3745#true} is VALID [2018-11-23 10:02:32,039 INFO L273 TraceCheckUtils]: 2: Hoare triple {3745#true} assume true; {3745#true} is VALID [2018-11-23 10:02:32,040 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3745#true} {3745#true} #78#return; {3745#true} is VALID [2018-11-23 10:02:32,040 INFO L256 TraceCheckUtils]: 4: Hoare triple {3745#true} call #t~ret7 := main(); {3745#true} is VALID [2018-11-23 10:02:32,040 INFO L273 TraceCheckUtils]: 5: Hoare triple {3745#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {3765#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,041 INFO L273 TraceCheckUtils]: 6: Hoare triple {3765#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3765#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,042 INFO L273 TraceCheckUtils]: 7: Hoare triple {3765#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {3765#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,042 INFO L273 TraceCheckUtils]: 8: Hoare triple {3765#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,043 INFO L273 TraceCheckUtils]: 9: Hoare triple {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,043 INFO L273 TraceCheckUtils]: 10: Hoare triple {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {3782#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,044 INFO L273 TraceCheckUtils]: 11: Hoare triple {3782#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3782#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,044 INFO L273 TraceCheckUtils]: 12: Hoare triple {3782#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {3782#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,045 INFO L273 TraceCheckUtils]: 13: Hoare triple {3782#(and (= (_ bv1 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,046 INFO L273 TraceCheckUtils]: 14: Hoare triple {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,047 INFO L273 TraceCheckUtils]: 15: Hoare triple {3775#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3798#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,048 INFO L273 TraceCheckUtils]: 16: Hoare triple {3798#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3798#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,049 INFO L273 TraceCheckUtils]: 17: Hoare triple {3798#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3805#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,050 INFO L273 TraceCheckUtils]: 18: Hoare triple {3805#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3805#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,051 INFO L273 TraceCheckUtils]: 19: Hoare triple {3805#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3812#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,052 INFO L273 TraceCheckUtils]: 20: Hoare triple {3812#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3812#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,053 INFO L273 TraceCheckUtils]: 21: Hoare triple {3812#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3819#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,054 INFO L273 TraceCheckUtils]: 22: Hoare triple {3819#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3819#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,057 INFO L273 TraceCheckUtils]: 23: Hoare triple {3819#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3826#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:32,058 INFO L273 TraceCheckUtils]: 24: Hoare triple {3826#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {3746#false} is VALID [2018-11-23 10:02:32,058 INFO L273 TraceCheckUtils]: 25: Hoare triple {3746#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {3746#false} is VALID [2018-11-23 10:02:32,058 INFO L273 TraceCheckUtils]: 26: Hoare triple {3746#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3746#false} is VALID [2018-11-23 10:02:32,059 INFO L256 TraceCheckUtils]: 27: Hoare triple {3746#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {3746#false} is VALID [2018-11-23 10:02:32,059 INFO L273 TraceCheckUtils]: 28: Hoare triple {3746#false} ~cond := #in~cond; {3746#false} is VALID [2018-11-23 10:02:32,059 INFO L273 TraceCheckUtils]: 29: Hoare triple {3746#false} assume 0bv32 == ~cond; {3746#false} is VALID [2018-11-23 10:02:32,059 INFO L273 TraceCheckUtils]: 30: Hoare triple {3746#false} assume !false; {3746#false} is VALID [2018-11-23 10:02:32,061 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:32,062 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:02:32,780 INFO L273 TraceCheckUtils]: 30: Hoare triple {3746#false} assume !false; {3746#false} is VALID [2018-11-23 10:02:32,780 INFO L273 TraceCheckUtils]: 29: Hoare triple {3746#false} assume 0bv32 == ~cond; {3746#false} is VALID [2018-11-23 10:02:32,781 INFO L273 TraceCheckUtils]: 28: Hoare triple {3746#false} ~cond := #in~cond; {3746#false} is VALID [2018-11-23 10:02:32,781 INFO L256 TraceCheckUtils]: 27: Hoare triple {3746#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {3746#false} is VALID [2018-11-23 10:02:32,781 INFO L273 TraceCheckUtils]: 26: Hoare triple {3746#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3746#false} is VALID [2018-11-23 10:02:32,781 INFO L273 TraceCheckUtils]: 25: Hoare triple {3746#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {3746#false} is VALID [2018-11-23 10:02:32,782 INFO L273 TraceCheckUtils]: 24: Hoare triple {3866#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {3746#false} is VALID [2018-11-23 10:02:32,782 INFO L273 TraceCheckUtils]: 23: Hoare triple {3870#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3866#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,783 INFO L273 TraceCheckUtils]: 22: Hoare triple {3870#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3870#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,804 INFO L273 TraceCheckUtils]: 21: Hoare triple {3877#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3870#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,805 INFO L273 TraceCheckUtils]: 20: Hoare triple {3877#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3877#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,831 INFO L273 TraceCheckUtils]: 19: Hoare triple {3884#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3877#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,831 INFO L273 TraceCheckUtils]: 18: Hoare triple {3884#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3884#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,854 INFO L273 TraceCheckUtils]: 17: Hoare triple {3891#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3884#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,855 INFO L273 TraceCheckUtils]: 16: Hoare triple {3891#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3891#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,889 INFO L273 TraceCheckUtils]: 15: Hoare triple {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3891#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,890 INFO L273 TraceCheckUtils]: 14: Hoare triple {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,890 INFO L273 TraceCheckUtils]: 13: Hoare triple {3905#(bvslt (bvadd main_~pos~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,891 INFO L273 TraceCheckUtils]: 12: Hoare triple {3905#(bvslt (bvadd main_~pos~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {3905#(bvslt (bvadd main_~pos~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,891 INFO L273 TraceCheckUtils]: 11: Hoare triple {3905#(bvslt (bvadd main_~pos~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3905#(bvslt (bvadd main_~pos~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,891 INFO L273 TraceCheckUtils]: 10: Hoare triple {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {3905#(bvslt (bvadd main_~pos~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,892 INFO L273 TraceCheckUtils]: 9: Hoare triple {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,925 INFO L273 TraceCheckUtils]: 8: Hoare triple {3921#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3898#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,926 INFO L273 TraceCheckUtils]: 7: Hoare triple {3921#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {3921#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,926 INFO L273 TraceCheckUtils]: 6: Hoare triple {3921#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3921#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,932 INFO L273 TraceCheckUtils]: 5: Hoare triple {3745#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {3921#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:02:32,933 INFO L256 TraceCheckUtils]: 4: Hoare triple {3745#true} call #t~ret7 := main(); {3745#true} is VALID [2018-11-23 10:02:32,933 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3745#true} {3745#true} #78#return; {3745#true} is VALID [2018-11-23 10:02:32,933 INFO L273 TraceCheckUtils]: 2: Hoare triple {3745#true} assume true; {3745#true} is VALID [2018-11-23 10:02:32,933 INFO L273 TraceCheckUtils]: 1: Hoare triple {3745#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3745#true} is VALID [2018-11-23 10:02:32,934 INFO L256 TraceCheckUtils]: 0: Hoare triple {3745#true} call ULTIMATE.init(); {3745#true} is VALID [2018-11-23 10:02:32,935 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:32,937 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:02:32,938 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-23 10:02:32,938 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 31 [2018-11-23 10:02:32,938 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:32,938 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 10:02:33,174 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:33,175 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 10:02:33,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 10:02:33,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:02:33,176 INFO L87 Difference]: Start difference. First operand 66 states and 73 transitions. Second operand 18 states. [2018-11-23 10:02:38,901 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-11-23 10:02:39,133 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2018-11-23 10:02:41,203 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2018-11-23 10:02:46,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:46,676 INFO L93 Difference]: Finished difference Result 206 states and 244 transitions. [2018-11-23 10:02:46,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-11-23 10:02:46,676 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 31 [2018-11-23 10:02:46,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:46,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:02:46,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 222 transitions. [2018-11-23 10:02:46,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:02:46,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 222 transitions. [2018-11-23 10:02:46,700 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 50 states and 222 transitions. [2018-11-23 10:02:48,664 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 222 edges. 222 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:48,668 INFO L225 Difference]: With dead ends: 206 [2018-11-23 10:02:48,668 INFO L226 Difference]: Without dead ends: 195 [2018-11-23 10:02:48,670 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 717 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=860, Invalid=2220, Unknown=0, NotChecked=0, Total=3080 [2018-11-23 10:02:48,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-11-23 10:02:49,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 119. [2018-11-23 10:02:49,532 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:02:49,532 INFO L82 GeneralOperation]: Start isEquivalent. First operand 195 states. Second operand 119 states. [2018-11-23 10:02:49,532 INFO L74 IsIncluded]: Start isIncluded. First operand 195 states. Second operand 119 states. [2018-11-23 10:02:49,533 INFO L87 Difference]: Start difference. First operand 195 states. Second operand 119 states. [2018-11-23 10:02:49,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:49,539 INFO L93 Difference]: Finished difference Result 195 states and 224 transitions. [2018-11-23 10:02:49,539 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 224 transitions. [2018-11-23 10:02:49,540 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:49,540 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:49,540 INFO L74 IsIncluded]: Start isIncluded. First operand 119 states. Second operand 195 states. [2018-11-23 10:02:49,540 INFO L87 Difference]: Start difference. First operand 119 states. Second operand 195 states. [2018-11-23 10:02:49,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:49,546 INFO L93 Difference]: Finished difference Result 195 states and 224 transitions. [2018-11-23 10:02:49,546 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 224 transitions. [2018-11-23 10:02:49,547 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:02:49,547 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:02:49,547 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:02:49,547 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:02:49,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-23 10:02:49,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 134 transitions. [2018-11-23 10:02:49,550 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 134 transitions. Word has length 31 [2018-11-23 10:02:49,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:49,550 INFO L480 AbstractCegarLoop]: Abstraction has 119 states and 134 transitions. [2018-11-23 10:02:49,551 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 10:02:49,551 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 134 transitions. [2018-11-23 10:02:49,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:02:49,551 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:49,552 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:49,552 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:49,552 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:49,552 INFO L82 PathProgramCache]: Analyzing trace with hash -334435862, now seen corresponding path program 3 times [2018-11-23 10:02:49,553 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:02:49,553 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:02:49,583 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:02:49,771 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-11-23 10:02:49,771 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:02:49,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:49,795 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:50,035 INFO L256 TraceCheckUtils]: 0: Hoare triple {4876#true} call ULTIMATE.init(); {4876#true} is VALID [2018-11-23 10:02:50,036 INFO L273 TraceCheckUtils]: 1: Hoare triple {4876#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4876#true} is VALID [2018-11-23 10:02:50,036 INFO L273 TraceCheckUtils]: 2: Hoare triple {4876#true} assume true; {4876#true} is VALID [2018-11-23 10:02:50,036 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4876#true} {4876#true} #78#return; {4876#true} is VALID [2018-11-23 10:02:50,036 INFO L256 TraceCheckUtils]: 4: Hoare triple {4876#true} call #t~ret7 := main(); {4876#true} is VALID [2018-11-23 10:02:50,037 INFO L273 TraceCheckUtils]: 5: Hoare triple {4876#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {4896#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,038 INFO L273 TraceCheckUtils]: 6: Hoare triple {4896#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4896#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,039 INFO L273 TraceCheckUtils]: 7: Hoare triple {4896#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {4896#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,040 INFO L273 TraceCheckUtils]: 8: Hoare triple {4896#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {4906#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,040 INFO L273 TraceCheckUtils]: 9: Hoare triple {4906#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4906#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,041 INFO L273 TraceCheckUtils]: 10: Hoare triple {4906#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {4906#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,042 INFO L273 TraceCheckUtils]: 11: Hoare triple {4906#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {4916#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,043 INFO L273 TraceCheckUtils]: 12: Hoare triple {4916#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4916#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,043 INFO L273 TraceCheckUtils]: 13: Hoare triple {4916#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {4923#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,044 INFO L273 TraceCheckUtils]: 14: Hoare triple {4923#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {4923#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,045 INFO L273 TraceCheckUtils]: 15: Hoare triple {4923#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {4923#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,046 INFO L273 TraceCheckUtils]: 16: Hoare triple {4923#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {4933#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,047 INFO L273 TraceCheckUtils]: 17: Hoare triple {4933#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4933#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,048 INFO L273 TraceCheckUtils]: 18: Hoare triple {4933#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4940#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,049 INFO L273 TraceCheckUtils]: 19: Hoare triple {4940#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4940#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,049 INFO L273 TraceCheckUtils]: 20: Hoare triple {4940#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4947#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~pos~0 (_ bv2 32)) main_~i~0))} is VALID [2018-11-23 10:02:50,050 INFO L273 TraceCheckUtils]: 21: Hoare triple {4947#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~pos~0 (_ bv2 32)) main_~i~0))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4947#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~pos~0 (_ bv2 32)) main_~i~0))} is VALID [2018-11-23 10:02:50,051 INFO L273 TraceCheckUtils]: 22: Hoare triple {4947#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~pos~0 (_ bv2 32)) main_~i~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4954#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,052 INFO L273 TraceCheckUtils]: 23: Hoare triple {4954#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4954#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,053 INFO L273 TraceCheckUtils]: 24: Hoare triple {4954#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967293 32)) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4961#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~pos~0 (_ bv4 32)) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:02:50,054 INFO L273 TraceCheckUtils]: 25: Hoare triple {4961#(and (= (bvadd main_~pos~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~pos~0 (_ bv4 32)) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {4877#false} is VALID [2018-11-23 10:02:50,054 INFO L273 TraceCheckUtils]: 26: Hoare triple {4877#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {4877#false} is VALID [2018-11-23 10:02:50,054 INFO L273 TraceCheckUtils]: 27: Hoare triple {4877#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4877#false} is VALID [2018-11-23 10:02:50,055 INFO L256 TraceCheckUtils]: 28: Hoare triple {4877#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {4877#false} is VALID [2018-11-23 10:02:50,055 INFO L273 TraceCheckUtils]: 29: Hoare triple {4877#false} ~cond := #in~cond; {4877#false} is VALID [2018-11-23 10:02:50,055 INFO L273 TraceCheckUtils]: 30: Hoare triple {4877#false} assume 0bv32 == ~cond; {4877#false} is VALID [2018-11-23 10:02:50,055 INFO L273 TraceCheckUtils]: 31: Hoare triple {4877#false} assume !false; {4877#false} is VALID [2018-11-23 10:02:50,059 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:50,060 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:02:51,171 INFO L273 TraceCheckUtils]: 31: Hoare triple {4877#false} assume !false; {4877#false} is VALID [2018-11-23 10:02:51,171 INFO L273 TraceCheckUtils]: 30: Hoare triple {4877#false} assume 0bv32 == ~cond; {4877#false} is VALID [2018-11-23 10:02:51,171 INFO L273 TraceCheckUtils]: 29: Hoare triple {4877#false} ~cond := #in~cond; {4877#false} is VALID [2018-11-23 10:02:51,171 INFO L256 TraceCheckUtils]: 28: Hoare triple {4877#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {4877#false} is VALID [2018-11-23 10:02:51,174 INFO L273 TraceCheckUtils]: 27: Hoare triple {4995#(not (bvslt main_~x~0 main_~pos~0))} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4877#false} is VALID [2018-11-23 10:02:51,177 INFO L273 TraceCheckUtils]: 26: Hoare triple {4999#(not (bvslt (_ bv0 32) main_~pos~0))} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {4995#(not (bvslt main_~x~0 main_~pos~0))} is VALID [2018-11-23 10:02:51,178 INFO L273 TraceCheckUtils]: 25: Hoare triple {5003#(or (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {4999#(not (bvslt (_ bv0 32) main_~pos~0))} is VALID [2018-11-23 10:02:51,179 INFO L273 TraceCheckUtils]: 24: Hoare triple {5007#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5003#(or (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:02:51,180 INFO L273 TraceCheckUtils]: 23: Hoare triple {5007#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5007#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:02:51,204 INFO L273 TraceCheckUtils]: 22: Hoare triple {5014#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5007#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:02:51,204 INFO L273 TraceCheckUtils]: 21: Hoare triple {5014#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5014#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,233 INFO L273 TraceCheckUtils]: 20: Hoare triple {5021#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5014#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,234 INFO L273 TraceCheckUtils]: 19: Hoare triple {5021#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5021#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,264 INFO L273 TraceCheckUtils]: 18: Hoare triple {5028#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5021#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,265 INFO L273 TraceCheckUtils]: 17: Hoare triple {5032#(or (not (bvslt (_ bv0 32) main_~pos~0)) (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5028#(or (not (bvslt (_ bv0 32) main_~pos~0)) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,266 INFO L273 TraceCheckUtils]: 16: Hoare triple {5036#(or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~pos~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {5032#(or (not (bvslt (_ bv0 32) main_~pos~0)) (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,266 INFO L273 TraceCheckUtils]: 15: Hoare triple {5036#(or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~pos~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {5036#(or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~pos~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:02:51,267 INFO L273 TraceCheckUtils]: 14: Hoare triple {5036#(or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~pos~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5036#(or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~pos~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:02:51,268 INFO L273 TraceCheckUtils]: 13: Hoare triple {5046#(or (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) main_~i~0)) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {5036#(or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (bvslt (bvadd main_~pos~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:02:51,269 INFO L273 TraceCheckUtils]: 12: Hoare triple {5046#(or (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) main_~i~0)) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5046#(or (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) main_~i~0)) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,300 INFO L273 TraceCheckUtils]: 11: Hoare triple {5053#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv1 32)))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5046#(or (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) main_~i~0)) (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,301 INFO L273 TraceCheckUtils]: 10: Hoare triple {5053#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv1 32)))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {5053#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv1 32)))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,301 INFO L273 TraceCheckUtils]: 9: Hoare triple {5053#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv1 32)))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5053#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv1 32)))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,372 INFO L273 TraceCheckUtils]: 8: Hoare triple {5063#(or (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv2 32)))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5053#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv1 32)))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32))))} is VALID [2018-11-23 10:02:51,373 INFO L273 TraceCheckUtils]: 7: Hoare triple {5063#(or (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv2 32)))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {5063#(or (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv2 32)))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))))} is VALID [2018-11-23 10:02:51,373 INFO L273 TraceCheckUtils]: 6: Hoare triple {5063#(or (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv2 32)))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5063#(or (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv2 32)))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))))} is VALID [2018-11-23 10:02:51,374 INFO L273 TraceCheckUtils]: 5: Hoare triple {4876#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {5063#(or (not (bvslt (_ bv0 32) (bvadd main_~i~0 (_ bv2 32)))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))))} is VALID [2018-11-23 10:02:51,374 INFO L256 TraceCheckUtils]: 4: Hoare triple {4876#true} call #t~ret7 := main(); {4876#true} is VALID [2018-11-23 10:02:51,374 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4876#true} {4876#true} #78#return; {4876#true} is VALID [2018-11-23 10:02:51,374 INFO L273 TraceCheckUtils]: 2: Hoare triple {4876#true} assume true; {4876#true} is VALID [2018-11-23 10:02:51,374 INFO L273 TraceCheckUtils]: 1: Hoare triple {4876#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4876#true} is VALID [2018-11-23 10:02:51,375 INFO L256 TraceCheckUtils]: 0: Hoare triple {4876#true} call ULTIMATE.init(); {4876#true} is VALID [2018-11-23 10:02:51,378 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:51,385 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:02:51,386 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 14] total 23 [2018-11-23 10:02:51,386 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 32 [2018-11-23 10:02:51,386 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:02:51,387 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states. [2018-11-23 10:02:51,674 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:02:51,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-23 10:02:51,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-23 10:02:51,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=371, Unknown=0, NotChecked=0, Total=506 [2018-11-23 10:02:51,675 INFO L87 Difference]: Start difference. First operand 119 states and 134 transitions. Second operand 23 states. [2018-11-23 10:02:53,405 WARN L180 SmtUtils]: Spent 250.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-23 10:02:54,903 WARN L180 SmtUtils]: Spent 157.00 ms on a formula simplification that was a NOOP. DAG size: 43 [2018-11-23 10:02:56,313 WARN L180 SmtUtils]: Spent 163.00 ms on a formula simplification that was a NOOP. DAG size: 37 [2018-11-23 10:02:59,946 WARN L180 SmtUtils]: Spent 199.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-11-23 10:03:00,801 WARN L180 SmtUtils]: Spent 309.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-11-23 10:03:02,051 WARN L180 SmtUtils]: Spent 208.00 ms on a formula simplification that was a NOOP. DAG size: 47 [2018-11-23 10:03:02,410 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-23 10:03:06,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:06,756 INFO L93 Difference]: Finished difference Result 187 states and 220 transitions. [2018-11-23 10:03:06,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-11-23 10:03:06,756 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 32 [2018-11-23 10:03:06,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:03:06,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 10:03:06,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 164 transitions. [2018-11-23 10:03:06,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 10:03:06,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 164 transitions. [2018-11-23 10:03:06,763 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 46 states and 164 transitions. [2018-11-23 10:03:09,081 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 164 edges. 164 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:03:09,085 INFO L225 Difference]: With dead ends: 187 [2018-11-23 10:03:09,085 INFO L226 Difference]: Without dead ends: 174 [2018-11-23 10:03:09,087 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 40 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 700 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=779, Invalid=2301, Unknown=0, NotChecked=0, Total=3080 [2018-11-23 10:03:09,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-11-23 10:03:09,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 118. [2018-11-23 10:03:09,291 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:03:09,292 INFO L82 GeneralOperation]: Start isEquivalent. First operand 174 states. Second operand 118 states. [2018-11-23 10:03:09,292 INFO L74 IsIncluded]: Start isIncluded. First operand 174 states. Second operand 118 states. [2018-11-23 10:03:09,292 INFO L87 Difference]: Start difference. First operand 174 states. Second operand 118 states. [2018-11-23 10:03:09,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:09,297 INFO L93 Difference]: Finished difference Result 174 states and 199 transitions. [2018-11-23 10:03:09,298 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 199 transitions. [2018-11-23 10:03:09,298 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:03:09,298 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:03:09,299 INFO L74 IsIncluded]: Start isIncluded. First operand 118 states. Second operand 174 states. [2018-11-23 10:03:09,299 INFO L87 Difference]: Start difference. First operand 118 states. Second operand 174 states. [2018-11-23 10:03:09,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:09,303 INFO L93 Difference]: Finished difference Result 174 states and 199 transitions. [2018-11-23 10:03:09,303 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 199 transitions. [2018-11-23 10:03:09,304 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:03:09,304 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:03:09,304 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:03:09,304 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:03:09,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-11-23 10:03:09,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 136 transitions. [2018-11-23 10:03:09,307 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 136 transitions. Word has length 32 [2018-11-23 10:03:09,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:03:09,307 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 136 transitions. [2018-11-23 10:03:09,308 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-23 10:03:09,308 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 136 transitions. [2018-11-23 10:03:09,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 10:03:09,308 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:03:09,309 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:03:09,309 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:03:09,309 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:03:09,309 INFO L82 PathProgramCache]: Analyzing trace with hash 1170359725, now seen corresponding path program 4 times [2018-11-23 10:03:09,309 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:03:09,310 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:03:09,327 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:03:09,381 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:03:09,381 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:03:09,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:03:09,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:03:09,583 INFO L256 TraceCheckUtils]: 0: Hoare triple {5943#true} call ULTIMATE.init(); {5943#true} is VALID [2018-11-23 10:03:09,583 INFO L273 TraceCheckUtils]: 1: Hoare triple {5943#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {5943#true} is VALID [2018-11-23 10:03:09,583 INFO L273 TraceCheckUtils]: 2: Hoare triple {5943#true} assume true; {5943#true} is VALID [2018-11-23 10:03:09,583 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5943#true} {5943#true} #78#return; {5943#true} is VALID [2018-11-23 10:03:09,584 INFO L256 TraceCheckUtils]: 4: Hoare triple {5943#true} call #t~ret7 := main(); {5943#true} is VALID [2018-11-23 10:03:09,584 INFO L273 TraceCheckUtils]: 5: Hoare triple {5943#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {5963#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,585 INFO L273 TraceCheckUtils]: 6: Hoare triple {5963#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5963#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,585 INFO L273 TraceCheckUtils]: 7: Hoare triple {5963#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {5963#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,586 INFO L273 TraceCheckUtils]: 8: Hoare triple {5963#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5973#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,586 INFO L273 TraceCheckUtils]: 9: Hoare triple {5973#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5973#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,586 INFO L273 TraceCheckUtils]: 10: Hoare triple {5973#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {5973#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,587 INFO L273 TraceCheckUtils]: 11: Hoare triple {5973#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5983#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,588 INFO L273 TraceCheckUtils]: 12: Hoare triple {5983#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5983#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,588 INFO L273 TraceCheckUtils]: 13: Hoare triple {5983#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {5983#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,589 INFO L273 TraceCheckUtils]: 14: Hoare triple {5983#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,590 INFO L273 TraceCheckUtils]: 15: Hoare triple {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,591 INFO L273 TraceCheckUtils]: 16: Hoare triple {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {6000#(and (= (_ bv3 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,592 INFO L273 TraceCheckUtils]: 17: Hoare triple {6000#(and (= (_ bv3 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6000#(and (= (_ bv3 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,592 INFO L273 TraceCheckUtils]: 18: Hoare triple {6000#(and (= (_ bv3 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {6000#(and (= (_ bv3 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,593 INFO L273 TraceCheckUtils]: 19: Hoare triple {6000#(and (= (_ bv3 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,594 INFO L273 TraceCheckUtils]: 20: Hoare triple {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,595 INFO L273 TraceCheckUtils]: 21: Hoare triple {5993#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6016#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,596 INFO L273 TraceCheckUtils]: 22: Hoare triple {6016#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {6016#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,597 INFO L273 TraceCheckUtils]: 23: Hoare triple {6016#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6023#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,615 INFO L273 TraceCheckUtils]: 24: Hoare triple {6023#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {6023#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,624 INFO L273 TraceCheckUtils]: 25: Hoare triple {6023#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6030#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:09,639 INFO L273 TraceCheckUtils]: 26: Hoare triple {6030#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {5944#false} is VALID [2018-11-23 10:03:09,639 INFO L273 TraceCheckUtils]: 27: Hoare triple {5944#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {5944#false} is VALID [2018-11-23 10:03:09,639 INFO L273 TraceCheckUtils]: 28: Hoare triple {5944#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {5944#false} is VALID [2018-11-23 10:03:09,640 INFO L256 TraceCheckUtils]: 29: Hoare triple {5944#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {5944#false} is VALID [2018-11-23 10:03:09,640 INFO L273 TraceCheckUtils]: 30: Hoare triple {5944#false} ~cond := #in~cond; {5944#false} is VALID [2018-11-23 10:03:09,640 INFO L273 TraceCheckUtils]: 31: Hoare triple {5944#false} assume 0bv32 == ~cond; {5944#false} is VALID [2018-11-23 10:03:09,640 INFO L273 TraceCheckUtils]: 32: Hoare triple {5944#false} assume !false; {5944#false} is VALID [2018-11-23 10:03:09,642 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:03:09,643 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:03:10,204 INFO L273 TraceCheckUtils]: 32: Hoare triple {5944#false} assume !false; {5944#false} is VALID [2018-11-23 10:03:10,204 INFO L273 TraceCheckUtils]: 31: Hoare triple {5944#false} assume 0bv32 == ~cond; {5944#false} is VALID [2018-11-23 10:03:10,204 INFO L273 TraceCheckUtils]: 30: Hoare triple {5944#false} ~cond := #in~cond; {5944#false} is VALID [2018-11-23 10:03:10,205 INFO L256 TraceCheckUtils]: 29: Hoare triple {5944#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {5944#false} is VALID [2018-11-23 10:03:10,205 INFO L273 TraceCheckUtils]: 28: Hoare triple {5944#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {5944#false} is VALID [2018-11-23 10:03:10,205 INFO L273 TraceCheckUtils]: 27: Hoare triple {5944#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {5944#false} is VALID [2018-11-23 10:03:10,205 INFO L273 TraceCheckUtils]: 26: Hoare triple {6070#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {5944#false} is VALID [2018-11-23 10:03:10,206 INFO L273 TraceCheckUtils]: 25: Hoare triple {6074#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6070#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,206 INFO L273 TraceCheckUtils]: 24: Hoare triple {6074#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {6074#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,231 INFO L273 TraceCheckUtils]: 23: Hoare triple {6081#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6074#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,232 INFO L273 TraceCheckUtils]: 22: Hoare triple {6081#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {6081#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,258 INFO L273 TraceCheckUtils]: 21: Hoare triple {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6081#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,259 INFO L273 TraceCheckUtils]: 20: Hoare triple {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,259 INFO L273 TraceCheckUtils]: 19: Hoare triple {6095#(bvslt (bvadd main_~pos~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,260 INFO L273 TraceCheckUtils]: 18: Hoare triple {6095#(bvslt (bvadd main_~pos~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {6095#(bvslt (bvadd main_~pos~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,260 INFO L273 TraceCheckUtils]: 17: Hoare triple {6095#(bvslt (bvadd main_~pos~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6095#(bvslt (bvadd main_~pos~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,262 INFO L273 TraceCheckUtils]: 16: Hoare triple {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {6095#(bvslt (bvadd main_~pos~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,263 INFO L273 TraceCheckUtils]: 15: Hoare triple {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,294 INFO L273 TraceCheckUtils]: 14: Hoare triple {6111#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6088#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,295 INFO L273 TraceCheckUtils]: 13: Hoare triple {6111#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {6111#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,295 INFO L273 TraceCheckUtils]: 12: Hoare triple {6111#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6111#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,318 INFO L273 TraceCheckUtils]: 11: Hoare triple {6121#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6111#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,319 INFO L273 TraceCheckUtils]: 10: Hoare triple {6121#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {6121#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,319 INFO L273 TraceCheckUtils]: 9: Hoare triple {6121#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6121#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,353 INFO L273 TraceCheckUtils]: 8: Hoare triple {6131#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6121#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,354 INFO L273 TraceCheckUtils]: 7: Hoare triple {6131#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {6131#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,354 INFO L273 TraceCheckUtils]: 6: Hoare triple {6131#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6131#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,355 INFO L273 TraceCheckUtils]: 5: Hoare triple {5943#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {6131#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:10,355 INFO L256 TraceCheckUtils]: 4: Hoare triple {5943#true} call #t~ret7 := main(); {5943#true} is VALID [2018-11-23 10:03:10,355 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5943#true} {5943#true} #78#return; {5943#true} is VALID [2018-11-23 10:03:10,355 INFO L273 TraceCheckUtils]: 2: Hoare triple {5943#true} assume true; {5943#true} is VALID [2018-11-23 10:03:10,355 INFO L273 TraceCheckUtils]: 1: Hoare triple {5943#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {5943#true} is VALID [2018-11-23 10:03:10,356 INFO L256 TraceCheckUtils]: 0: Hoare triple {5943#true} call ULTIMATE.init(); {5943#true} is VALID [2018-11-23 10:03:10,358 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:03:10,360 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:03:10,360 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-23 10:03:10,360 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 33 [2018-11-23 10:03:10,360 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:03:10,361 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 10:03:10,587 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:03:10,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 10:03:10,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 10:03:10,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:03:10,588 INFO L87 Difference]: Start difference. First operand 118 states and 136 transitions. Second operand 18 states. [2018-11-23 10:03:14,367 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-11-23 10:03:14,584 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2018-11-23 10:03:16,234 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2018-11-23 10:03:21,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:21,828 INFO L93 Difference]: Finished difference Result 223 states and 263 transitions. [2018-11-23 10:03:21,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-11-23 10:03:21,829 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 33 [2018-11-23 10:03:21,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:03:21,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:03:21,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 200 transitions. [2018-11-23 10:03:21,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:03:21,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 200 transitions. [2018-11-23 10:03:21,839 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 47 states and 200 transitions. [2018-11-23 10:03:24,300 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 200 edges. 200 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:03:24,304 INFO L225 Difference]: With dead ends: 223 [2018-11-23 10:03:24,304 INFO L226 Difference]: Without dead ends: 212 [2018-11-23 10:03:24,306 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 596 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=796, Invalid=1960, Unknown=0, NotChecked=0, Total=2756 [2018-11-23 10:03:24,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-11-23 10:03:24,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 123. [2018-11-23 10:03:24,518 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:03:24,518 INFO L82 GeneralOperation]: Start isEquivalent. First operand 212 states. Second operand 123 states. [2018-11-23 10:03:24,518 INFO L74 IsIncluded]: Start isIncluded. First operand 212 states. Second operand 123 states. [2018-11-23 10:03:24,518 INFO L87 Difference]: Start difference. First operand 212 states. Second operand 123 states. [2018-11-23 10:03:24,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:24,525 INFO L93 Difference]: Finished difference Result 212 states and 243 transitions. [2018-11-23 10:03:24,525 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 243 transitions. [2018-11-23 10:03:24,526 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:03:24,526 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:03:24,526 INFO L74 IsIncluded]: Start isIncluded. First operand 123 states. Second operand 212 states. [2018-11-23 10:03:24,526 INFO L87 Difference]: Start difference. First operand 123 states. Second operand 212 states. [2018-11-23 10:03:24,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:24,532 INFO L93 Difference]: Finished difference Result 212 states and 243 transitions. [2018-11-23 10:03:24,532 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 243 transitions. [2018-11-23 10:03:24,533 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:03:24,533 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:03:24,533 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:03:24,534 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:03:24,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-11-23 10:03:24,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 143 transitions. [2018-11-23 10:03:24,537 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 143 transitions. Word has length 33 [2018-11-23 10:03:24,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:03:24,537 INFO L480 AbstractCegarLoop]: Abstraction has 123 states and 143 transitions. [2018-11-23 10:03:24,537 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 10:03:24,537 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 143 transitions. [2018-11-23 10:03:24,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-23 10:03:24,538 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:03:24,538 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:03:24,538 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:03:24,539 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:03:24,539 INFO L82 PathProgramCache]: Analyzing trace with hash -794053554, now seen corresponding path program 5 times [2018-11-23 10:03:24,539 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:03:24,539 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:03:24,568 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2018-11-23 10:03:24,782 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-11-23 10:03:24,783 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:03:24,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:03:24,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:03:25,888 INFO L256 TraceCheckUtils]: 0: Hoare triple {7145#true} call ULTIMATE.init(); {7145#true} is VALID [2018-11-23 10:03:25,888 INFO L273 TraceCheckUtils]: 1: Hoare triple {7145#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {7145#true} is VALID [2018-11-23 10:03:25,888 INFO L273 TraceCheckUtils]: 2: Hoare triple {7145#true} assume true; {7145#true} is VALID [2018-11-23 10:03:25,888 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7145#true} {7145#true} #78#return; {7145#true} is VALID [2018-11-23 10:03:25,888 INFO L256 TraceCheckUtils]: 4: Hoare triple {7145#true} call #t~ret7 := main(); {7145#true} is VALID [2018-11-23 10:03:25,889 INFO L273 TraceCheckUtils]: 5: Hoare triple {7145#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {7165#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,890 INFO L273 TraceCheckUtils]: 6: Hoare triple {7165#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7165#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,890 INFO L273 TraceCheckUtils]: 7: Hoare triple {7165#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7165#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,890 INFO L273 TraceCheckUtils]: 8: Hoare triple {7165#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7175#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,891 INFO L273 TraceCheckUtils]: 9: Hoare triple {7175#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7175#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,891 INFO L273 TraceCheckUtils]: 10: Hoare triple {7175#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7175#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,892 INFO L273 TraceCheckUtils]: 11: Hoare triple {7175#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7185#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,892 INFO L273 TraceCheckUtils]: 12: Hoare triple {7185#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7185#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,893 INFO L273 TraceCheckUtils]: 13: Hoare triple {7185#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7185#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,894 INFO L273 TraceCheckUtils]: 14: Hoare triple {7185#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7195#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,895 INFO L273 TraceCheckUtils]: 15: Hoare triple {7195#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7195#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,896 INFO L273 TraceCheckUtils]: 16: Hoare triple {7195#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7195#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,897 INFO L273 TraceCheckUtils]: 17: Hoare triple {7195#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,897 INFO L273 TraceCheckUtils]: 18: Hoare triple {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,898 INFO L273 TraceCheckUtils]: 19: Hoare triple {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {7212#(and (= (bvadd main_~pos~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,899 INFO L273 TraceCheckUtils]: 20: Hoare triple {7212#(and (= (bvadd main_~pos~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7212#(and (= (bvadd main_~pos~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,900 INFO L273 TraceCheckUtils]: 21: Hoare triple {7212#(and (= (bvadd main_~pos~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {7212#(and (= (bvadd main_~pos~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,901 INFO L273 TraceCheckUtils]: 22: Hoare triple {7212#(and (= (bvadd main_~pos~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,901 INFO L273 TraceCheckUtils]: 23: Hoare triple {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,903 INFO L273 TraceCheckUtils]: 24: Hoare triple {7205#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7228#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,904 INFO L273 TraceCheckUtils]: 25: Hoare triple {7228#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {7228#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,905 INFO L273 TraceCheckUtils]: 26: Hoare triple {7228#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7235#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:03:25,905 INFO L273 TraceCheckUtils]: 27: Hoare triple {7235#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {7146#false} is VALID [2018-11-23 10:03:25,906 INFO L273 TraceCheckUtils]: 28: Hoare triple {7146#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {7146#false} is VALID [2018-11-23 10:03:25,906 INFO L273 TraceCheckUtils]: 29: Hoare triple {7146#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {7146#false} is VALID [2018-11-23 10:03:25,906 INFO L256 TraceCheckUtils]: 30: Hoare triple {7146#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {7146#false} is VALID [2018-11-23 10:03:25,906 INFO L273 TraceCheckUtils]: 31: Hoare triple {7146#false} ~cond := #in~cond; {7146#false} is VALID [2018-11-23 10:03:25,907 INFO L273 TraceCheckUtils]: 32: Hoare triple {7146#false} assume 0bv32 == ~cond; {7146#false} is VALID [2018-11-23 10:03:25,907 INFO L273 TraceCheckUtils]: 33: Hoare triple {7146#false} assume !false; {7146#false} is VALID [2018-11-23 10:03:25,910 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:03:25,910 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:03:26,510 INFO L273 TraceCheckUtils]: 33: Hoare triple {7146#false} assume !false; {7146#false} is VALID [2018-11-23 10:03:26,511 INFO L273 TraceCheckUtils]: 32: Hoare triple {7146#false} assume 0bv32 == ~cond; {7146#false} is VALID [2018-11-23 10:03:26,511 INFO L273 TraceCheckUtils]: 31: Hoare triple {7146#false} ~cond := #in~cond; {7146#false} is VALID [2018-11-23 10:03:26,511 INFO L256 TraceCheckUtils]: 30: Hoare triple {7146#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {7146#false} is VALID [2018-11-23 10:03:26,511 INFO L273 TraceCheckUtils]: 29: Hoare triple {7146#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {7146#false} is VALID [2018-11-23 10:03:26,511 INFO L273 TraceCheckUtils]: 28: Hoare triple {7146#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {7146#false} is VALID [2018-11-23 10:03:26,525 INFO L273 TraceCheckUtils]: 27: Hoare triple {7275#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {7146#false} is VALID [2018-11-23 10:03:26,526 INFO L273 TraceCheckUtils]: 26: Hoare triple {7279#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7275#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,526 INFO L273 TraceCheckUtils]: 25: Hoare triple {7279#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {7279#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,547 INFO L273 TraceCheckUtils]: 24: Hoare triple {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {7279#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,548 INFO L273 TraceCheckUtils]: 23: Hoare triple {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,548 INFO L273 TraceCheckUtils]: 22: Hoare triple {7293#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,549 INFO L273 TraceCheckUtils]: 21: Hoare triple {7293#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {7293#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,549 INFO L273 TraceCheckUtils]: 20: Hoare triple {7293#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7293#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,550 INFO L273 TraceCheckUtils]: 19: Hoare triple {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {7293#(bvslt (bvadd main_~pos~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,550 INFO L273 TraceCheckUtils]: 18: Hoare triple {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,578 INFO L273 TraceCheckUtils]: 17: Hoare triple {7309#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7286#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,579 INFO L273 TraceCheckUtils]: 16: Hoare triple {7309#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7309#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,579 INFO L273 TraceCheckUtils]: 15: Hoare triple {7309#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7309#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,611 INFO L273 TraceCheckUtils]: 14: Hoare triple {7319#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7309#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,612 INFO L273 TraceCheckUtils]: 13: Hoare triple {7319#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7319#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,612 INFO L273 TraceCheckUtils]: 12: Hoare triple {7319#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7319#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,642 INFO L273 TraceCheckUtils]: 11: Hoare triple {7329#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7319#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,643 INFO L273 TraceCheckUtils]: 10: Hoare triple {7329#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7329#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,643 INFO L273 TraceCheckUtils]: 9: Hoare triple {7329#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7329#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,668 INFO L273 TraceCheckUtils]: 8: Hoare triple {7339#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {7329#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,668 INFO L273 TraceCheckUtils]: 7: Hoare triple {7339#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {7339#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,668 INFO L273 TraceCheckUtils]: 6: Hoare triple {7339#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7339#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,669 INFO L273 TraceCheckUtils]: 5: Hoare triple {7145#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {7339#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:03:26,669 INFO L256 TraceCheckUtils]: 4: Hoare triple {7145#true} call #t~ret7 := main(); {7145#true} is VALID [2018-11-23 10:03:26,669 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7145#true} {7145#true} #78#return; {7145#true} is VALID [2018-11-23 10:03:26,669 INFO L273 TraceCheckUtils]: 2: Hoare triple {7145#true} assume true; {7145#true} is VALID [2018-11-23 10:03:26,670 INFO L273 TraceCheckUtils]: 1: Hoare triple {7145#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {7145#true} is VALID [2018-11-23 10:03:26,670 INFO L256 TraceCheckUtils]: 0: Hoare triple {7145#true} call ULTIMATE.init(); {7145#true} is VALID [2018-11-23 10:03:26,671 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:03:26,673 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:03:26,673 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-23 10:03:26,673 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 34 [2018-11-23 10:03:26,674 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:03:26,674 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 10:03:26,906 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:03:26,906 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 10:03:26,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 10:03:26,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:03:26,907 INFO L87 Difference]: Start difference. First operand 123 states and 143 transitions. Second operand 18 states. [2018-11-23 10:03:30,132 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-11-23 10:03:36,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:36,353 INFO L93 Difference]: Finished difference Result 217 states and 255 transitions. [2018-11-23 10:03:36,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-11-23 10:03:36,353 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 34 [2018-11-23 10:03:36,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:03:36,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:03:36,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 189 transitions. [2018-11-23 10:03:36,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 10:03:36,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 189 transitions. [2018-11-23 10:03:36,360 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 44 states and 189 transitions. [2018-11-23 10:03:39,089 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:03:39,095 INFO L225 Difference]: With dead ends: 217 [2018-11-23 10:03:39,095 INFO L226 Difference]: Without dead ends: 206 [2018-11-23 10:03:39,096 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 518 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=713, Invalid=1737, Unknown=0, NotChecked=0, Total=2450 [2018-11-23 10:03:39,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-11-23 10:03:39,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 125. [2018-11-23 10:03:39,545 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:03:39,545 INFO L82 GeneralOperation]: Start isEquivalent. First operand 206 states. Second operand 125 states. [2018-11-23 10:03:39,545 INFO L74 IsIncluded]: Start isIncluded. First operand 206 states. Second operand 125 states. [2018-11-23 10:03:39,545 INFO L87 Difference]: Start difference. First operand 206 states. Second operand 125 states. [2018-11-23 10:03:39,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:39,552 INFO L93 Difference]: Finished difference Result 206 states and 235 transitions. [2018-11-23 10:03:39,552 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 235 transitions. [2018-11-23 10:03:39,553 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:03:39,553 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:03:39,553 INFO L74 IsIncluded]: Start isIncluded. First operand 125 states. Second operand 206 states. [2018-11-23 10:03:39,554 INFO L87 Difference]: Start difference. First operand 125 states. Second operand 206 states. [2018-11-23 10:03:39,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:03:39,560 INFO L93 Difference]: Finished difference Result 206 states and 235 transitions. [2018-11-23 10:03:39,560 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 235 transitions. [2018-11-23 10:03:39,561 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:03:39,561 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:03:39,561 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:03:39,562 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:03:39,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-11-23 10:03:39,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 145 transitions. [2018-11-23 10:03:39,565 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 145 transitions. Word has length 34 [2018-11-23 10:03:39,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:03:39,565 INFO L480 AbstractCegarLoop]: Abstraction has 125 states and 145 transitions. [2018-11-23 10:03:39,566 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 10:03:39,566 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 145 transitions. [2018-11-23 10:03:39,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-23 10:03:39,566 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:03:39,567 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:03:39,567 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:03:39,567 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:03:39,568 INFO L82 PathProgramCache]: Analyzing trace with hash -1705763631, now seen corresponding path program 6 times [2018-11-23 10:03:39,568 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:03:39,568 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:03:39,598 INFO L101 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2018-11-23 10:03:39,830 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-11-23 10:03:39,831 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:03:39,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:03:39,876 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:03:40,212 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-11-23 10:03:41,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 35 [2018-11-23 10:03:41,123 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:03:41,478 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 6 case distinctions, treesize of input 35 treesize of output 84 [2018-11-23 10:03:41,487 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-11-23 10:03:41,576 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-23 10:03:41,678 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-11-23 10:03:41,678 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:50, output treesize:154 [2018-11-23 10:03:41,768 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:03:41,769 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_30|, v_prenex_1]. (let ((.cse0 (select |v_#memory_int_30| |main_~#vectorx~0.base|))) (and (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (select .cse0 (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0) (not (= (select .cse0 |main_~#vectorx~0.offset|) main_~element~0)) (= |#memory_int| (store |v_#memory_int_30| |main_~#vectorx~0.base| (let ((.cse1 (bvmul (_ bv4 32) main_~pos~0))) (store .cse0 (bvadd |main_~#vectorx~0.offset| .cse1) (select .cse0 (bvadd |main_~#vectorx~0.offset| .cse1 (_ bv4 32))))))) (bvslt main_~pos~0 (_ bv99999 32)))) [2018-11-23 10:03:41,769 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [v_prenex_3, v_prenex_2, v_prenex_1]. (let ((.cse8 (bvmul (_ bv4 32) main_~pos~0))) (let ((.cse0 (bvadd |main_~#vectorx~0.offset| .cse8)) (.cse6 (select |#memory_int| |main_~#vectorx~0.base|))) (let ((.cse2 (= (select .cse6 .cse0) (select .cse6 (bvadd |main_~#vectorx~0.offset| .cse8 (_ bv4 32))))) (.cse3 (not (= (select .cse6 |main_~#vectorx~0.offset|) main_~element~0))) (.cse4 (= (_ bv0 32) |main_~#vectorx~0.offset|)) (.cse5 (bvslt main_~pos~0 (_ bv99999 32)))) (or (let ((.cse1 (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_3)))) (and (= .cse0 .cse1) .cse2 .cse3 .cse4 .cse5 (not (= |main_~#vectorx~0.offset| .cse1)))) (let ((.cse7 (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2)))) (and .cse2 (= |main_~#vectorx~0.offset| .cse0) .cse4 .cse5 (= (select .cse6 .cse7) main_~element~0) (not (= |main_~#vectorx~0.offset| .cse7)))) (and .cse2 .cse3 .cse4 .cse5 (= (select .cse6 (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0)))))) [2018-11-23 10:03:54,090 WARN L180 SmtUtils]: Spent 12.25 s on a formula simplification that was a NOOP. DAG size: 47 [2018-11-23 10:04:08,550 WARN L180 SmtUtils]: Spent 14.28 s on a formula simplification that was a NOOP. DAG size: 49 [2018-11-23 10:04:08,636 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 38 [2018-11-23 10:04:08,655 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:04:08,661 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:04:08,667 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:04:08,708 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 32 treesize of output 64 [2018-11-23 10:04:08,714 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-11-23 10:04:08,783 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:04:08,882 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 38 [2018-11-23 10:04:08,894 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:04:08,896 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:04:08,898 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:04:08,905 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 32 [2018-11-23 10:04:08,908 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:04:08,936 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:04:09,030 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:04:09,031 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 12 variables, input treesize:152, output treesize:4 [2018-11-23 10:04:09,053 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:04:09,054 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#vectorx~0.base|, v_prenex_1, main_~pos~0, v_prenex_8, v_prenex_7, v_prenex_2, v_prenex_9, v_prenex_5, v_prenex_4, v_prenex_6, v_prenex_3]. (or (let ((.cse1 (select |#memory_int| |main_~#vectorx~0.base|))) (let ((.cse0 (select .cse1 (_ bv0 32)))) (and (not (= main_~element~0 .cse0)) (let ((.cse2 (bvmul (_ bv4 32) main_~pos~0))) (= (select .cse1 .cse2) (select .cse1 (bvadd .cse2 (_ bv4 32))))) (= |main_#t~mem6| .cse0) (bvslt main_~pos~0 (_ bv99999 32)) (bvslt (_ bv0 32) main_~pos~0) (= main_~element~0 (select .cse1 (bvmul (_ bv4 32) v_prenex_1)))))) (let ((.cse3 (bvmul (_ bv4 32) v_prenex_2)) (.cse4 (select v_prenex_8 v_prenex_7)) (.cse5 (bvmul (_ bv4 32) v_prenex_9))) (and (not (= (_ bv0 32) .cse3)) (bvslt (_ bv0 32) v_prenex_9) (= (select .cse4 .cse3) main_~element~0) (= |main_#t~mem6| (select .cse4 (_ bv0 32))) (= (_ bv0 32) .cse5) (bvslt v_prenex_9 (_ bv99999 32)) (= (select .cse4 .cse5) (select .cse4 (bvadd .cse5 (_ bv4 32)))))) (let ((.cse6 (select v_prenex_5 v_prenex_4))) (let ((.cse7 (bvmul (_ bv4 32) v_prenex_6)) (.cse8 (bvmul (_ bv4 32) v_prenex_3)) (.cse9 (select .cse6 (_ bv0 32)))) (and (= (select .cse6 .cse7) (select .cse6 (bvadd .cse7 (_ bv4 32)))) (bvslt v_prenex_6 (_ bv99999 32)) (= .cse7 .cse8) (not (= (_ bv0 32) .cse8)) (= |main_#t~mem6| .cse9) (not (= main_~element~0 .cse9)) (bvslt (_ bv0 32) v_prenex_6))))) [2018-11-23 10:04:09,054 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (not (= |main_#t~mem6| main_~element~0)) [2018-11-23 10:04:09,162 INFO L256 TraceCheckUtils]: 0: Hoare triple {8329#true} call ULTIMATE.init(); {8329#true} is VALID [2018-11-23 10:04:09,163 INFO L273 TraceCheckUtils]: 1: Hoare triple {8329#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {8329#true} is VALID [2018-11-23 10:04:09,163 INFO L273 TraceCheckUtils]: 2: Hoare triple {8329#true} assume true; {8329#true} is VALID [2018-11-23 10:04:09,163 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8329#true} {8329#true} #78#return; {8329#true} is VALID [2018-11-23 10:04:09,163 INFO L256 TraceCheckUtils]: 4: Hoare triple {8329#true} call #t~ret7 := main(); {8329#true} is VALID [2018-11-23 10:04:09,183 INFO L273 TraceCheckUtils]: 5: Hoare triple {8329#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {8349#(and (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,201 INFO L273 TraceCheckUtils]: 6: Hoare triple {8349#(and (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8353#(and (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) |main_#t~mem2|))} is VALID [2018-11-23 10:04:09,216 INFO L273 TraceCheckUtils]: 7: Hoare triple {8353#(and (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) |main_#t~mem2|))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,230 INFO L273 TraceCheckUtils]: 8: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,231 INFO L273 TraceCheckUtils]: 9: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,232 INFO L273 TraceCheckUtils]: 10: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,232 INFO L273 TraceCheckUtils]: 11: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,233 INFO L273 TraceCheckUtils]: 12: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,233 INFO L273 TraceCheckUtils]: 13: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,234 INFO L273 TraceCheckUtils]: 14: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,234 INFO L273 TraceCheckUtils]: 15: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,235 INFO L273 TraceCheckUtils]: 16: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,236 INFO L273 TraceCheckUtils]: 17: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,237 INFO L273 TraceCheckUtils]: 18: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,238 INFO L273 TraceCheckUtils]: 19: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,239 INFO L273 TraceCheckUtils]: 20: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,241 INFO L273 TraceCheckUtils]: 21: Hoare triple {8357#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8400#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (exists ((main_~i~0 (_ BitVec 32))) (= |main_#t~mem2| (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,244 INFO L273 TraceCheckUtils]: 22: Hoare triple {8400#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (exists ((main_~i~0 (_ BitVec 32))) (= |main_#t~mem2| (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {8404#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((main_~i~0 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,245 INFO L273 TraceCheckUtils]: 23: Hoare triple {8404#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((main_~i~0 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8404#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((main_~i~0 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,246 INFO L273 TraceCheckUtils]: 24: Hoare triple {8404#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((main_~i~0 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {8404#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((main_~i~0 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,249 INFO L273 TraceCheckUtils]: 25: Hoare triple {8404#(and (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((main_~i~0 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {8414#(and (exists ((v_prenex_1 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~i~0 main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:04:09,255 INFO L273 TraceCheckUtils]: 26: Hoare triple {8414#(and (exists ((v_prenex_1 (_ BitVec 32))) (= main_~element~0 (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~i~0 main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {8418#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (bvslt main_~pos~0 (_ bv99999 32))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))))} is VALID [2018-11-23 10:04:09,256 INFO L273 TraceCheckUtils]: 27: Hoare triple {8418#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (bvslt main_~pos~0 (_ bv99999 32))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8418#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (bvslt main_~pos~0 (_ bv99999 32))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))))} is VALID [2018-11-23 10:04:09,257 INFO L273 TraceCheckUtils]: 28: Hoare triple {8418#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (bvslt main_~pos~0 (_ bv99999 32))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {8418#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (bvslt main_~pos~0 (_ bv99999 32))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))))} is VALID [2018-11-23 10:04:09,258 INFO L273 TraceCheckUtils]: 29: Hoare triple {8418#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (bvslt main_~pos~0 (_ bv99999 32))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))))} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {8428#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~x~0 (_ bv0 32)) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~x~0 (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (= main_~x~0 (_ bv0 32)) (bvslt main_~pos~0 (_ bv99999 32))))} is VALID [2018-11-23 10:04:09,266 INFO L273 TraceCheckUtils]: 30: Hoare triple {8428#(or (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~x~0 (_ bv0 32)) (bvslt main_~pos~0 (_ bv99999 32)) (exists ((v_prenex_1 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_1))) main_~element~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (= (_ bv0 32) |main_~#vectorx~0.offset|) (= main_~x~0 (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_2))) (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) v_prenex_2))) main_~element~0))) (bvslt main_~pos~0 (_ bv99999 32)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (and (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0))) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (= (_ bv0 32) |main_~#vectorx~0.offset|) (exists ((v_prenex_3 (_ BitVec 32))) (and (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_3))) (= (bvmul (_ bv4 32) main_~pos~0) (bvmul (_ bv4 32) v_prenex_3)))) (= main_~x~0 (_ bv0 32)) (bvslt main_~pos~0 (_ bv99999 32))))} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {8432#(not (= |main_#t~mem6| main_~element~0))} is VALID [2018-11-23 10:04:09,267 INFO L256 TraceCheckUtils]: 31: Hoare triple {8432#(not (= |main_#t~mem6| main_~element~0))} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {8436#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:04:09,268 INFO L273 TraceCheckUtils]: 32: Hoare triple {8436#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {8440#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:04:09,269 INFO L273 TraceCheckUtils]: 33: Hoare triple {8440#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {8330#false} is VALID [2018-11-23 10:04:09,269 INFO L273 TraceCheckUtils]: 34: Hoare triple {8330#false} assume !false; {8330#false} is VALID [2018-11-23 10:04:09,277 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 14 proven. 12 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-23 10:04:09,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:04:10,764 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-11-23 10:04:10,858 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-23 10:04:10,895 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:04:10,937 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22 [2018-11-23 10:04:10,945 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:04:10,969 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 10:04:11,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:04:11,012 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:46, output treesize:53 [2018-11-23 10:04:11,025 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:04:11,026 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#vectorx~0.base|, main_~pos~0]. (let ((.cse0 (select |#memory_int| |main_~#vectorx~0.base|))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (let ((.cse1 (bvmul (_ bv4 32) main_~pos~0))) (store .cse0 (bvadd |main_~#vectorx~0.offset| .cse1) (select .cse0 (bvadd |main_~#vectorx~0.offset| .cse1 (_ bv4 32))))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)) (= main_~element~0 (select .cse0 (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0)))))) [2018-11-23 10:04:11,026 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [main_~pos~0, v_prenex_10]. (let ((.cse0 (bvadd main_~n~0 (_ bv4294967295 32))) (.cse1 (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (and (or (not (bvslt main_~pos~0 .cse0)) (= |main_~#vectorx~0.offset| .cse1) (not (bvslt (_ bv0 32) main_~pos~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))) (let ((.cse2 (bvmul (_ bv4 32) v_prenex_10))) (or (not (bvslt v_prenex_10 .cse0)) (not (= (_ bv0 32) .cse2)) (= (bvadd |main_~#vectorx~0.offset| .cse2 (_ bv4 32)) .cse1) (not (bvslt (_ bv0 32) v_prenex_10)))))) [2018-11-23 10:04:11,354 INFO L273 TraceCheckUtils]: 34: Hoare triple {8330#false} assume !false; {8330#false} is VALID [2018-11-23 10:04:11,354 INFO L273 TraceCheckUtils]: 33: Hoare triple {8450#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {8330#false} is VALID [2018-11-23 10:04:11,356 INFO L273 TraceCheckUtils]: 32: Hoare triple {8454#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {8450#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:04:11,358 INFO L256 TraceCheckUtils]: 31: Hoare triple {8432#(not (= |main_#t~mem6| main_~element~0))} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {8454#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:04:11,358 INFO L273 TraceCheckUtils]: 30: Hoare triple {8461#(or (not (bvslt main_~x~0 main_~pos~0)) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~x~0))) main_~element~0)))} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {8432#(not (= |main_#t~mem6| main_~element~0))} is VALID [2018-11-23 10:04:11,360 INFO L273 TraceCheckUtils]: 29: Hoare triple {8465#(or (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {8461#(or (not (bvslt main_~x~0 main_~pos~0)) (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~x~0))) main_~element~0)))} is VALID [2018-11-23 10:04:11,360 INFO L273 TraceCheckUtils]: 28: Hoare triple {8465#(or (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {8465#(or (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:04:11,362 INFO L273 TraceCheckUtils]: 27: Hoare triple {8465#(or (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {8465#(or (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:04:11,374 INFO L273 TraceCheckUtils]: 26: Hoare triple {8475#(or (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)) (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {8465#(or (not (= (select (select |#memory_int| |main_~#vectorx~0.base|) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))} is VALID [2018-11-23 10:04:11,378 INFO L273 TraceCheckUtils]: 25: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {8475#(or (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)) (not (bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))))} is VALID [2018-11-23 10:04:11,379 INFO L273 TraceCheckUtils]: 24: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,379 INFO L273 TraceCheckUtils]: 23: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,381 INFO L273 TraceCheckUtils]: 22: Hoare triple {8489#(or (forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))) (not (= |main_#t~mem2| main_~element~0)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,382 INFO L273 TraceCheckUtils]: 21: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8489#(or (forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))) (not (= |main_#t~mem2| main_~element~0)))} is VALID [2018-11-23 10:04:11,383 INFO L273 TraceCheckUtils]: 20: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,383 INFO L273 TraceCheckUtils]: 19: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,385 INFO L273 TraceCheckUtils]: 18: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,385 INFO L273 TraceCheckUtils]: 17: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,387 INFO L273 TraceCheckUtils]: 16: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,387 INFO L273 TraceCheckUtils]: 15: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,389 INFO L273 TraceCheckUtils]: 14: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,389 INFO L273 TraceCheckUtils]: 13: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,391 INFO L273 TraceCheckUtils]: 12: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,391 INFO L273 TraceCheckUtils]: 11: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,393 INFO L273 TraceCheckUtils]: 10: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,393 INFO L273 TraceCheckUtils]: 9: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,395 INFO L273 TraceCheckUtils]: 8: Hoare triple {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,396 INFO L273 TraceCheckUtils]: 7: Hoare triple {8535#(or (= |main_#t~mem2| main_~element~0) (forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {8479#(forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0))))} is VALID [2018-11-23 10:04:11,501 INFO L273 TraceCheckUtils]: 6: Hoare triple {8539#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) main_~pos~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))))) (forall ((v_prenex_10 (_ BitVec 32))) (or (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_10))) (= (bvadd (bvmul (_ bv4 32) v_prenex_10) (_ bv4 32)) (bvmul (_ bv4 32) main_~i~0)) (not (bvslt v_prenex_10 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) v_prenex_10)))))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8535#(or (= |main_#t~mem2| main_~element~0) (forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (= (select (store (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0)) (select (select |#memory_int| |main_~#vectorx~0.base|) (bvadd |main_~#vectorx~0.offset| (bvmul (_ bv4 32) main_~pos~0) (_ bv4 32)))) |main_~#vectorx~0.offset|) main_~element~0)) (not (bvslt (_ bv0 32) main_~pos~0)))))} is VALID [2018-11-23 10:04:11,504 INFO L273 TraceCheckUtils]: 5: Hoare triple {8329#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {8539#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((main_~pos~0 (_ BitVec 32))) (or (not (bvslt main_~pos~0 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) main_~pos~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~pos~0))))) (forall ((v_prenex_10 (_ BitVec 32))) (or (not (= (_ bv0 32) (bvmul (_ bv4 32) v_prenex_10))) (= (bvadd (bvmul (_ bv4 32) v_prenex_10) (_ bv4 32)) (bvmul (_ bv4 32) main_~i~0)) (not (bvslt v_prenex_10 (bvadd main_~n~0 (_ bv4294967295 32)))) (not (bvslt (_ bv0 32) v_prenex_10)))))} is VALID [2018-11-23 10:04:11,504 INFO L256 TraceCheckUtils]: 4: Hoare triple {8329#true} call #t~ret7 := main(); {8329#true} is VALID [2018-11-23 10:04:11,504 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8329#true} {8329#true} #78#return; {8329#true} is VALID [2018-11-23 10:04:11,504 INFO L273 TraceCheckUtils]: 2: Hoare triple {8329#true} assume true; {8329#true} is VALID [2018-11-23 10:04:11,504 INFO L273 TraceCheckUtils]: 1: Hoare triple {8329#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {8329#true} is VALID [2018-11-23 10:04:11,505 INFO L256 TraceCheckUtils]: 0: Hoare triple {8329#true} call ULTIMATE.init(); {8329#true} is VALID [2018-11-23 10:04:11,510 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 10:04:11,512 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:04:11,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 22 [2018-11-23 10:04:11,513 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 35 [2018-11-23 10:04:11,514 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:04:11,514 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states. [2018-11-23 10:04:15,997 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 41 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:04:15,997 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-23 10:04:15,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-23 10:04:15,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-11-23 10:04:15,998 INFO L87 Difference]: Start difference. First operand 125 states and 145 transitions. Second operand 22 states. [2018-11-23 10:04:17,523 WARN L180 SmtUtils]: Spent 215.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-23 10:04:33,838 WARN L180 SmtUtils]: Spent 12.94 s on a formula simplification that was a NOOP. DAG size: 65 [2018-11-23 10:04:56,907 WARN L180 SmtUtils]: Spent 14.60 s on a formula simplification that was a NOOP. DAG size: 67 [2018-11-23 10:05:11,781 WARN L180 SmtUtils]: Spent 14.47 s on a formula simplification that was a NOOP. DAG size: 70 [2018-11-23 10:05:14,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:05:14,668 INFO L93 Difference]: Finished difference Result 163 states and 189 transitions. [2018-11-23 10:05:14,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-23 10:05:14,668 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 35 [2018-11-23 10:05:14,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:05:14,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 10:05:14,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 66 transitions. [2018-11-23 10:05:14,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 10:05:14,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 66 transitions. [2018-11-23 10:05:14,672 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states and 66 transitions. [2018-11-23 10:05:22,995 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 62 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2018-11-23 10:05:22,998 INFO L225 Difference]: With dead ends: 163 [2018-11-23 10:05:22,998 INFO L226 Difference]: Without dead ends: 161 [2018-11-23 10:05:22,999 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 72.4s TimeCoverageRelationStatistics Valid=161, Invalid=831, Unknown=0, NotChecked=0, Total=992 [2018-11-23 10:05:23,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-11-23 10:05:23,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 137. [2018-11-23 10:05:23,959 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:05:23,959 INFO L82 GeneralOperation]: Start isEquivalent. First operand 161 states. Second operand 137 states. [2018-11-23 10:05:23,959 INFO L74 IsIncluded]: Start isIncluded. First operand 161 states. Second operand 137 states. [2018-11-23 10:05:23,960 INFO L87 Difference]: Start difference. First operand 161 states. Second operand 137 states. [2018-11-23 10:05:23,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:05:23,964 INFO L93 Difference]: Finished difference Result 161 states and 187 transitions. [2018-11-23 10:05:23,964 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 187 transitions. [2018-11-23 10:05:23,965 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:05:23,965 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:05:23,965 INFO L74 IsIncluded]: Start isIncluded. First operand 137 states. Second operand 161 states. [2018-11-23 10:05:23,966 INFO L87 Difference]: Start difference. First operand 137 states. Second operand 161 states. [2018-11-23 10:05:23,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:05:23,970 INFO L93 Difference]: Finished difference Result 161 states and 187 transitions. [2018-11-23 10:05:23,970 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 187 transitions. [2018-11-23 10:05:23,971 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:05:23,971 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:05:23,971 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:05:23,971 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:05:23,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-11-23 10:05:23,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 160 transitions. [2018-11-23 10:05:23,974 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 160 transitions. Word has length 35 [2018-11-23 10:05:23,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:05:23,975 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 160 transitions. [2018-11-23 10:05:23,975 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-23 10:05:23,975 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 160 transitions. [2018-11-23 10:05:23,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-23 10:05:23,976 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:05:23,976 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:05:23,976 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:05:23,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:05:23,977 INFO L82 PathProgramCache]: Analyzing trace with hash 1091052133, now seen corresponding path program 1 times [2018-11-23 10:05:23,977 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:05:23,977 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:05:24,010 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 10:05:24,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:05:24,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:05:24,100 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:05:24,329 INFO L256 TraceCheckUtils]: 0: Hoare triple {9332#true} call ULTIMATE.init(); {9332#true} is VALID [2018-11-23 10:05:24,330 INFO L273 TraceCheckUtils]: 1: Hoare triple {9332#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {9332#true} is VALID [2018-11-23 10:05:24,330 INFO L273 TraceCheckUtils]: 2: Hoare triple {9332#true} assume true; {9332#true} is VALID [2018-11-23 10:05:24,330 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9332#true} {9332#true} #78#return; {9332#true} is VALID [2018-11-23 10:05:24,330 INFO L256 TraceCheckUtils]: 4: Hoare triple {9332#true} call #t~ret7 := main(); {9332#true} is VALID [2018-11-23 10:05:24,332 INFO L273 TraceCheckUtils]: 5: Hoare triple {9332#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {9352#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,332 INFO L273 TraceCheckUtils]: 6: Hoare triple {9352#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9352#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,332 INFO L273 TraceCheckUtils]: 7: Hoare triple {9352#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9352#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,333 INFO L273 TraceCheckUtils]: 8: Hoare triple {9352#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9362#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,333 INFO L273 TraceCheckUtils]: 9: Hoare triple {9362#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9362#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,334 INFO L273 TraceCheckUtils]: 10: Hoare triple {9362#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9362#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,334 INFO L273 TraceCheckUtils]: 11: Hoare triple {9362#(and (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9372#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,335 INFO L273 TraceCheckUtils]: 12: Hoare triple {9372#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9372#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,336 INFO L273 TraceCheckUtils]: 13: Hoare triple {9372#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9372#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,337 INFO L273 TraceCheckUtils]: 14: Hoare triple {9372#(and (= (_ bv2 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9382#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,338 INFO L273 TraceCheckUtils]: 15: Hoare triple {9382#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9382#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,338 INFO L273 TraceCheckUtils]: 16: Hoare triple {9382#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9382#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,339 INFO L273 TraceCheckUtils]: 17: Hoare triple {9382#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9392#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,340 INFO L273 TraceCheckUtils]: 18: Hoare triple {9392#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9392#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,341 INFO L273 TraceCheckUtils]: 19: Hoare triple {9392#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9392#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,342 INFO L273 TraceCheckUtils]: 20: Hoare triple {9392#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,343 INFO L273 TraceCheckUtils]: 21: Hoare triple {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,343 INFO L273 TraceCheckUtils]: 22: Hoare triple {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {9409#(and (= (_ bv5 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,344 INFO L273 TraceCheckUtils]: 23: Hoare triple {9409#(and (= (_ bv5 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9409#(and (= (_ bv5 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,358 INFO L273 TraceCheckUtils]: 24: Hoare triple {9409#(and (= (_ bv5 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {9409#(and (= (_ bv5 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,359 INFO L273 TraceCheckUtils]: 25: Hoare triple {9409#(and (= (_ bv5 32) main_~pos~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,359 INFO L273 TraceCheckUtils]: 26: Hoare triple {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,360 INFO L273 TraceCheckUtils]: 27: Hoare triple {9402#(and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {9425#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:05:24,360 INFO L273 TraceCheckUtils]: 28: Hoare triple {9425#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~n~0 (_ bv4294867296 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {9333#false} is VALID [2018-11-23 10:05:24,360 INFO L273 TraceCheckUtils]: 29: Hoare triple {9333#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {9333#false} is VALID [2018-11-23 10:05:24,361 INFO L273 TraceCheckUtils]: 30: Hoare triple {9333#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {9333#false} is VALID [2018-11-23 10:05:24,361 INFO L256 TraceCheckUtils]: 31: Hoare triple {9333#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {9333#false} is VALID [2018-11-23 10:05:24,361 INFO L273 TraceCheckUtils]: 32: Hoare triple {9333#false} ~cond := #in~cond; {9333#false} is VALID [2018-11-23 10:05:24,361 INFO L273 TraceCheckUtils]: 33: Hoare triple {9333#false} assume !(0bv32 == ~cond); {9333#false} is VALID [2018-11-23 10:05:24,362 INFO L273 TraceCheckUtils]: 34: Hoare triple {9333#false} assume true; {9333#false} is VALID [2018-11-23 10:05:24,362 INFO L268 TraceCheckUtils]: 35: Hoare quadruple {9333#false} {9333#false} #82#return; {9333#false} is VALID [2018-11-23 10:05:24,362 INFO L273 TraceCheckUtils]: 36: Hoare triple {9333#false} havoc #t~mem6; {9333#false} is VALID [2018-11-23 10:05:24,362 INFO L273 TraceCheckUtils]: 37: Hoare triple {9333#false} #t~post5 := ~x~0;~x~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {9333#false} is VALID [2018-11-23 10:05:24,363 INFO L273 TraceCheckUtils]: 38: Hoare triple {9333#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {9333#false} is VALID [2018-11-23 10:05:24,363 INFO L256 TraceCheckUtils]: 39: Hoare triple {9333#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {9333#false} is VALID [2018-11-23 10:05:24,363 INFO L273 TraceCheckUtils]: 40: Hoare triple {9333#false} ~cond := #in~cond; {9333#false} is VALID [2018-11-23 10:05:24,363 INFO L273 TraceCheckUtils]: 41: Hoare triple {9333#false} assume 0bv32 == ~cond; {9333#false} is VALID [2018-11-23 10:05:24,363 INFO L273 TraceCheckUtils]: 42: Hoare triple {9333#false} assume !false; {9333#false} is VALID [2018-11-23 10:05:24,367 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:05:24,367 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:05:24,950 INFO L273 TraceCheckUtils]: 42: Hoare triple {9333#false} assume !false; {9333#false} is VALID [2018-11-23 10:05:24,951 INFO L273 TraceCheckUtils]: 41: Hoare triple {9333#false} assume 0bv32 == ~cond; {9333#false} is VALID [2018-11-23 10:05:24,951 INFO L273 TraceCheckUtils]: 40: Hoare triple {9333#false} ~cond := #in~cond; {9333#false} is VALID [2018-11-23 10:05:24,951 INFO L256 TraceCheckUtils]: 39: Hoare triple {9333#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {9333#false} is VALID [2018-11-23 10:05:24,951 INFO L273 TraceCheckUtils]: 38: Hoare triple {9333#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {9333#false} is VALID [2018-11-23 10:05:24,951 INFO L273 TraceCheckUtils]: 37: Hoare triple {9333#false} #t~post5 := ~x~0;~x~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {9333#false} is VALID [2018-11-23 10:05:24,951 INFO L273 TraceCheckUtils]: 36: Hoare triple {9333#false} havoc #t~mem6; {9333#false} is VALID [2018-11-23 10:05:24,952 INFO L268 TraceCheckUtils]: 35: Hoare quadruple {9332#true} {9333#false} #82#return; {9333#false} is VALID [2018-11-23 10:05:24,952 INFO L273 TraceCheckUtils]: 34: Hoare triple {9332#true} assume true; {9332#true} is VALID [2018-11-23 10:05:24,952 INFO L273 TraceCheckUtils]: 33: Hoare triple {9332#true} assume !(0bv32 == ~cond); {9332#true} is VALID [2018-11-23 10:05:24,952 INFO L273 TraceCheckUtils]: 32: Hoare triple {9332#true} ~cond := #in~cond; {9332#true} is VALID [2018-11-23 10:05:24,952 INFO L256 TraceCheckUtils]: 31: Hoare triple {9333#false} call __VERIFIER_assert((if #t~mem6 != ~element~0 then 1bv32 else 0bv32)); {9332#true} is VALID [2018-11-23 10:05:24,953 INFO L273 TraceCheckUtils]: 30: Hoare triple {9333#false} assume !!~bvslt32(~x~0, ~pos~0);call #t~mem6 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {9333#false} is VALID [2018-11-23 10:05:24,953 INFO L273 TraceCheckUtils]: 29: Hoare triple {9333#false} assume 0bv32 != ~found~0;havoc ~x~0;~x~0 := 0bv32; {9333#false} is VALID [2018-11-23 10:05:24,968 INFO L273 TraceCheckUtils]: 28: Hoare triple {9513#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} assume !~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32)); {9333#false} is VALID [2018-11-23 10:05:24,977 INFO L273 TraceCheckUtils]: 27: Hoare triple {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {9513#(bvslt main_~i~0 (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:24,978 INFO L273 TraceCheckUtils]: 26: Hoare triple {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!~bvslt32(~i~0, ~bvsub32(~n~0, 1bv32));call #t~mem4 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:24,978 INFO L273 TraceCheckUtils]: 25: Hoare triple {9524#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume 0bv32 != ~found~0;~i~0 := ~pos~0; {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:24,979 INFO L273 TraceCheckUtils]: 24: Hoare triple {9524#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0); {9524#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:24,979 INFO L273 TraceCheckUtils]: 23: Hoare triple {9524#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9524#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:24,981 INFO L273 TraceCheckUtils]: 22: Hoare triple {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume #t~mem2 == ~element~0;havoc #t~mem2;~found~0 := 1bv32;~pos~0 := ~i~0; {9524#(bvslt (bvadd main_~pos~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:24,982 INFO L273 TraceCheckUtils]: 21: Hoare triple {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,005 INFO L273 TraceCheckUtils]: 20: Hoare triple {9540#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9517#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,006 INFO L273 TraceCheckUtils]: 19: Hoare triple {9540#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9540#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,006 INFO L273 TraceCheckUtils]: 18: Hoare triple {9540#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9540#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,030 INFO L273 TraceCheckUtils]: 17: Hoare triple {9550#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9540#(bvslt (bvadd main_~i~0 (_ bv2 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,030 INFO L273 TraceCheckUtils]: 16: Hoare triple {9550#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9550#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,031 INFO L273 TraceCheckUtils]: 15: Hoare triple {9550#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9550#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,057 INFO L273 TraceCheckUtils]: 14: Hoare triple {9560#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9550#(bvslt (bvadd main_~i~0 (_ bv3 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,058 INFO L273 TraceCheckUtils]: 13: Hoare triple {9560#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9560#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,058 INFO L273 TraceCheckUtils]: 12: Hoare triple {9560#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9560#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,086 INFO L273 TraceCheckUtils]: 11: Hoare triple {9570#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9560#(bvslt (bvadd main_~i~0 (_ bv4 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,086 INFO L273 TraceCheckUtils]: 10: Hoare triple {9570#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9570#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,086 INFO L273 TraceCheckUtils]: 9: Hoare triple {9570#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9570#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,113 INFO L273 TraceCheckUtils]: 8: Hoare triple {9580#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {9570#(bvslt (bvadd main_~i~0 (_ bv5 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,114 INFO L273 TraceCheckUtils]: 7: Hoare triple {9580#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !(#t~mem2 == ~element~0);havoc #t~mem2; {9580#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,114 INFO L273 TraceCheckUtils]: 6: Hoare triple {9580#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} assume !!(~bvslt32(~i~0, ~n~0) && 0bv32 == ~found~0);call #t~mem2 := read~intINTTYPE4(~#vectorx~0.base, ~bvadd32(~#vectorx~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9580#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,115 INFO L273 TraceCheckUtils]: 5: Hoare triple {9332#true} havoc ~i~0;~n~0 := 100000bv32;havoc ~pos~0;~element~0 := #t~nondet0;havoc #t~nondet0;~found~0 := 0bv32;call ~#vectorx~0.base, ~#vectorx~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~n~0));~i~0 := 0bv32; {9580#(bvslt (bvadd main_~i~0 (_ bv6 32)) (bvadd main_~n~0 (_ bv4294967295 32)))} is VALID [2018-11-23 10:05:25,115 INFO L256 TraceCheckUtils]: 4: Hoare triple {9332#true} call #t~ret7 := main(); {9332#true} is VALID [2018-11-23 10:05:25,115 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9332#true} {9332#true} #78#return; {9332#true} is VALID [2018-11-23 10:05:25,115 INFO L273 TraceCheckUtils]: 2: Hoare triple {9332#true} assume true; {9332#true} is VALID [2018-11-23 10:05:25,116 INFO L273 TraceCheckUtils]: 1: Hoare triple {9332#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {9332#true} is VALID [2018-11-23 10:05:25,116 INFO L256 TraceCheckUtils]: 0: Hoare triple {9332#true} call ULTIMATE.init(); {9332#true} is VALID [2018-11-23 10:05:25,118 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 2 proven. 52 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:05:25,120 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:05:25,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-23 10:05:25,120 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 43 [2018-11-23 10:05:25,121 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:05:25,121 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 10:05:25,377 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:05:25,377 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 10:05:25,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 10:05:25,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:05:25,378 INFO L87 Difference]: Start difference. First operand 137 states and 160 transitions. Second operand 18 states. [2018-11-23 10:05:34,690 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-11-23 10:05:34,911 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2018-11-23 10:05:35,735 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 24