java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-examples/standard_copy6_false-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 09:54:54,562 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 09:54:54,564 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 09:54:54,576 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 09:54:54,576 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 09:54:54,578 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 09:54:54,579 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 09:54:54,581 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 09:54:54,583 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 09:54:54,584 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 09:54:54,585 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 09:54:54,585 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 09:54:54,586 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 09:54:54,587 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 09:54:54,589 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 09:54:54,589 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 09:54:54,590 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 09:54:54,592 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 09:54:54,595 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 09:54:54,596 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 09:54:54,598 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 09:54:54,599 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 09:54:54,601 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 09:54:54,602 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 09:54:54,602 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 09:54:54,603 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 09:54:54,604 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 09:54:54,606 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 09:54:54,607 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 09:54:54,608 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 09:54:54,609 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 09:54:54,609 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 09:54:54,610 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 09:54:54,610 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 09:54:54,611 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 09:54:54,612 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 09:54:54,612 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 09:54:54,638 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 09:54:54,638 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 09:54:54,640 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 09:54:54,640 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 09:54:54,641 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 09:54:54,641 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 09:54:54,641 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 09:54:54,641 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 09:54:54,641 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 09:54:54,642 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 09:54:54,642 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 09:54:54,642 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 09:54:54,642 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 09:54:54,642 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 09:54:54,643 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 09:54:54,643 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 09:54:54,644 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 09:54:54,644 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 09:54:54,644 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 09:54:54,644 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 09:54:54,645 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 09:54:54,645 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 09:54:54,645 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 09:54:54,645 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 09:54:54,645 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 09:54:54,646 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 09:54:54,647 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 09:54:54,647 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 09:54:54,647 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 09:54:54,647 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 09:54:54,648 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 09:54:54,648 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 09:54:54,648 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 09:54:54,720 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 09:54:54,737 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 09:54:54,742 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 09:54:54,744 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 09:54:54,744 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 09:54:54,745 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_copy6_false-unreach-call_ground.i [2018-11-23 09:54:54,800 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/841e03f86/9d34814499b2475ba1877aa6a2118701/FLAGb66d1518e [2018-11-23 09:54:55,274 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 09:54:55,274 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-examples/standard_copy6_false-unreach-call_ground.i [2018-11-23 09:54:55,282 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/841e03f86/9d34814499b2475ba1877aa6a2118701/FLAGb66d1518e [2018-11-23 09:54:55,608 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/841e03f86/9d34814499b2475ba1877aa6a2118701 [2018-11-23 09:54:55,617 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 09:54:55,618 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 09:54:55,619 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 09:54:55,619 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 09:54:55,627 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 09:54:55,629 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:54:55" (1/1) ... [2018-11-23 09:54:55,632 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@44acf0ea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:55, skipping insertion in model container [2018-11-23 09:54:55,632 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:54:55" (1/1) ... [2018-11-23 09:54:55,641 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 09:54:55,664 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 09:54:55,931 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:54:55,938 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 09:54:55,998 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:54:56,033 INFO L195 MainTranslator]: Completed translation [2018-11-23 09:54:56,034 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56 WrapperNode [2018-11-23 09:54:56,034 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 09:54:56,035 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 09:54:56,035 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 09:54:56,035 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 09:54:56,046 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,058 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,068 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 09:54:56,068 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 09:54:56,068 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 09:54:56,068 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 09:54:56,080 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,080 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,084 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,085 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,105 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,116 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,119 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,123 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 09:54:56,124 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 09:54:56,124 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 09:54:56,124 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 09:54:56,125 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 09:54:56,302 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 09:54:56,303 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 09:54:56,303 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 09:54:56,303 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 09:54:56,303 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 09:54:56,303 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 09:54:56,304 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 09:54:56,305 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 09:54:56,305 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 09:54:56,305 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 09:54:56,305 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 09:54:56,306 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 09:54:57,439 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 09:54:57,439 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 09:54:57,440 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:54:57 BoogieIcfgContainer [2018-11-23 09:54:57,440 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 09:54:57,441 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 09:54:57,441 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 09:54:57,445 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 09:54:57,445 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 09:54:55" (1/3) ... [2018-11-23 09:54:57,446 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f5a0c2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 09:54:57, skipping insertion in model container [2018-11-23 09:54:57,446 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (2/3) ... [2018-11-23 09:54:57,447 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f5a0c2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 09:54:57, skipping insertion in model container [2018-11-23 09:54:57,447 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:54:57" (3/3) ... [2018-11-23 09:54:57,449 INFO L112 eAbstractionObserver]: Analyzing ICFG standard_copy6_false-unreach-call_ground.i [2018-11-23 09:54:57,461 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 09:54:57,470 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 09:54:57,491 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 09:54:57,527 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 09:54:57,528 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 09:54:57,528 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 09:54:57,528 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 09:54:57,529 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 09:54:57,529 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 09:54:57,529 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 09:54:57,529 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 09:54:57,530 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 09:54:57,551 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states. [2018-11-23 09:54:57,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 09:54:57,559 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:54:57,561 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:54:57,563 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:54:57,571 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:54:57,571 INFO L82 PathProgramCache]: Analyzing trace with hash 772526198, now seen corresponding path program 1 times [2018-11-23 09:54:57,577 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:54:57,578 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:54:57,610 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:54:57,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:57,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:57,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:54:57,863 INFO L256 TraceCheckUtils]: 0: Hoare triple {45#true} call ULTIMATE.init(); {45#true} is VALID [2018-11-23 09:54:57,867 INFO L273 TraceCheckUtils]: 1: Hoare triple {45#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {45#true} is VALID [2018-11-23 09:54:57,867 INFO L273 TraceCheckUtils]: 2: Hoare triple {45#true} assume true; {45#true} is VALID [2018-11-23 09:54:57,868 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {45#true} {45#true} #133#return; {45#true} is VALID [2018-11-23 09:54:57,868 INFO L256 TraceCheckUtils]: 4: Hoare triple {45#true} call #t~ret18 := main(); {45#true} is VALID [2018-11-23 09:54:57,868 INFO L273 TraceCheckUtils]: 5: Hoare triple {45#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {45#true} is VALID [2018-11-23 09:54:57,871 INFO L273 TraceCheckUtils]: 6: Hoare triple {45#true} assume !true; {46#false} is VALID [2018-11-23 09:54:57,871 INFO L273 TraceCheckUtils]: 7: Hoare triple {46#false} havoc ~i~0;~i~0 := 0bv32; {46#false} is VALID [2018-11-23 09:54:57,872 INFO L273 TraceCheckUtils]: 8: Hoare triple {46#false} assume !~bvslt32(~i~0, 100000bv32); {46#false} is VALID [2018-11-23 09:54:57,872 INFO L273 TraceCheckUtils]: 9: Hoare triple {46#false} ~i~0 := 0bv32; {46#false} is VALID [2018-11-23 09:54:57,872 INFO L273 TraceCheckUtils]: 10: Hoare triple {46#false} assume !~bvslt32(~i~0, 100000bv32); {46#false} is VALID [2018-11-23 09:54:57,873 INFO L273 TraceCheckUtils]: 11: Hoare triple {46#false} ~i~0 := 0bv32; {46#false} is VALID [2018-11-23 09:54:57,873 INFO L273 TraceCheckUtils]: 12: Hoare triple {46#false} assume !~bvslt32(~i~0, 100000bv32); {46#false} is VALID [2018-11-23 09:54:57,873 INFO L273 TraceCheckUtils]: 13: Hoare triple {46#false} ~i~0 := 0bv32; {46#false} is VALID [2018-11-23 09:54:57,874 INFO L273 TraceCheckUtils]: 14: Hoare triple {46#false} assume !~bvslt32(~i~0, 100000bv32); {46#false} is VALID [2018-11-23 09:54:57,874 INFO L273 TraceCheckUtils]: 15: Hoare triple {46#false} ~i~0 := 0bv32; {46#false} is VALID [2018-11-23 09:54:57,874 INFO L273 TraceCheckUtils]: 16: Hoare triple {46#false} assume !~bvslt32(~i~0, 100000bv32); {46#false} is VALID [2018-11-23 09:54:57,875 INFO L273 TraceCheckUtils]: 17: Hoare triple {46#false} ~i~0 := 0bv32; {46#false} is VALID [2018-11-23 09:54:57,875 INFO L273 TraceCheckUtils]: 18: Hoare triple {46#false} assume !true; {46#false} is VALID [2018-11-23 09:54:57,875 INFO L273 TraceCheckUtils]: 19: Hoare triple {46#false} havoc ~x~0;~x~0 := 0bv32; {46#false} is VALID [2018-11-23 09:54:57,876 INFO L273 TraceCheckUtils]: 20: Hoare triple {46#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {46#false} is VALID [2018-11-23 09:54:57,876 INFO L256 TraceCheckUtils]: 21: Hoare triple {46#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {46#false} is VALID [2018-11-23 09:54:57,876 INFO L273 TraceCheckUtils]: 22: Hoare triple {46#false} ~cond := #in~cond; {46#false} is VALID [2018-11-23 09:54:57,877 INFO L273 TraceCheckUtils]: 23: Hoare triple {46#false} assume 0bv32 == ~cond; {46#false} is VALID [2018-11-23 09:54:57,877 INFO L273 TraceCheckUtils]: 24: Hoare triple {46#false} assume !false; {46#false} is VALID [2018-11-23 09:54:57,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:54:57,882 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (2)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 09:54:57,890 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:54:57,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 09:54:57,896 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 25 [2018-11-23 09:54:57,899 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:54:57,903 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 09:54:58,009 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:58,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 09:54:58,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 09:54:58,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 09:54:58,023 INFO L87 Difference]: Start difference. First operand 42 states. Second operand 2 states. [2018-11-23 09:54:58,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:58,266 INFO L93 Difference]: Finished difference Result 76 states and 107 transitions. [2018-11-23 09:54:58,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 09:54:58,267 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 25 [2018-11-23 09:54:58,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:54:58,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 09:54:58,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 107 transitions. [2018-11-23 09:54:58,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 09:54:58,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 107 transitions. [2018-11-23 09:54:58,298 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 107 transitions. [2018-11-23 09:54:59,096 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:59,109 INFO L225 Difference]: With dead ends: 76 [2018-11-23 09:54:59,109 INFO L226 Difference]: Without dead ends: 37 [2018-11-23 09:54:59,113 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 09:54:59,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-11-23 09:54:59,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-11-23 09:54:59,174 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:54:59,175 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand 37 states. [2018-11-23 09:54:59,175 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 37 states. [2018-11-23 09:54:59,175 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 37 states. [2018-11-23 09:54:59,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:59,181 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2018-11-23 09:54:59,181 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 44 transitions. [2018-11-23 09:54:59,182 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:54:59,182 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:54:59,183 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 37 states. [2018-11-23 09:54:59,183 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 37 states. [2018-11-23 09:54:59,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:59,188 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2018-11-23 09:54:59,188 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 44 transitions. [2018-11-23 09:54:59,189 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:54:59,189 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:54:59,190 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:54:59,190 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:54:59,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-23 09:54:59,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 44 transitions. [2018-11-23 09:54:59,195 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 44 transitions. Word has length 25 [2018-11-23 09:54:59,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:54:59,196 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 44 transitions. [2018-11-23 09:54:59,196 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 09:54:59,196 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 44 transitions. [2018-11-23 09:54:59,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 09:54:59,200 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:54:59,200 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:54:59,200 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:54:59,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:54:59,201 INFO L82 PathProgramCache]: Analyzing trace with hash 514335338, now seen corresponding path program 1 times [2018-11-23 09:54:59,202 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:54:59,202 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:54:59,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:54:59,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:59,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:59,317 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:54:59,437 INFO L256 TraceCheckUtils]: 0: Hoare triple {345#true} call ULTIMATE.init(); {345#true} is VALID [2018-11-23 09:54:59,437 INFO L273 TraceCheckUtils]: 1: Hoare triple {345#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {345#true} is VALID [2018-11-23 09:54:59,438 INFO L273 TraceCheckUtils]: 2: Hoare triple {345#true} assume true; {345#true} is VALID [2018-11-23 09:54:59,438 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {345#true} {345#true} #133#return; {345#true} is VALID [2018-11-23 09:54:59,438 INFO L256 TraceCheckUtils]: 4: Hoare triple {345#true} call #t~ret18 := main(); {345#true} is VALID [2018-11-23 09:54:59,439 INFO L273 TraceCheckUtils]: 5: Hoare triple {345#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {365#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:54:59,439 INFO L273 TraceCheckUtils]: 6: Hoare triple {365#(= main_~a~0 (_ bv0 32))} assume !~bvslt32(~a~0, 100000bv32); {346#false} is VALID [2018-11-23 09:54:59,440 INFO L273 TraceCheckUtils]: 7: Hoare triple {346#false} havoc ~i~0;~i~0 := 0bv32; {346#false} is VALID [2018-11-23 09:54:59,440 INFO L273 TraceCheckUtils]: 8: Hoare triple {346#false} assume !~bvslt32(~i~0, 100000bv32); {346#false} is VALID [2018-11-23 09:54:59,440 INFO L273 TraceCheckUtils]: 9: Hoare triple {346#false} ~i~0 := 0bv32; {346#false} is VALID [2018-11-23 09:54:59,440 INFO L273 TraceCheckUtils]: 10: Hoare triple {346#false} assume !~bvslt32(~i~0, 100000bv32); {346#false} is VALID [2018-11-23 09:54:59,441 INFO L273 TraceCheckUtils]: 11: Hoare triple {346#false} ~i~0 := 0bv32; {346#false} is VALID [2018-11-23 09:54:59,441 INFO L273 TraceCheckUtils]: 12: Hoare triple {346#false} assume !~bvslt32(~i~0, 100000bv32); {346#false} is VALID [2018-11-23 09:54:59,441 INFO L273 TraceCheckUtils]: 13: Hoare triple {346#false} ~i~0 := 0bv32; {346#false} is VALID [2018-11-23 09:54:59,441 INFO L273 TraceCheckUtils]: 14: Hoare triple {346#false} assume !~bvslt32(~i~0, 100000bv32); {346#false} is VALID [2018-11-23 09:54:59,442 INFO L273 TraceCheckUtils]: 15: Hoare triple {346#false} ~i~0 := 0bv32; {346#false} is VALID [2018-11-23 09:54:59,442 INFO L273 TraceCheckUtils]: 16: Hoare triple {346#false} assume !~bvslt32(~i~0, 100000bv32); {346#false} is VALID [2018-11-23 09:54:59,442 INFO L273 TraceCheckUtils]: 17: Hoare triple {346#false} ~i~0 := 0bv32; {346#false} is VALID [2018-11-23 09:54:59,442 INFO L273 TraceCheckUtils]: 18: Hoare triple {346#false} assume !~bvslt32(~i~0, 100000bv32); {346#false} is VALID [2018-11-23 09:54:59,443 INFO L273 TraceCheckUtils]: 19: Hoare triple {346#false} havoc ~x~0;~x~0 := 0bv32; {346#false} is VALID [2018-11-23 09:54:59,443 INFO L273 TraceCheckUtils]: 20: Hoare triple {346#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {346#false} is VALID [2018-11-23 09:54:59,443 INFO L256 TraceCheckUtils]: 21: Hoare triple {346#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {346#false} is VALID [2018-11-23 09:54:59,443 INFO L273 TraceCheckUtils]: 22: Hoare triple {346#false} ~cond := #in~cond; {346#false} is VALID [2018-11-23 09:54:59,444 INFO L273 TraceCheckUtils]: 23: Hoare triple {346#false} assume 0bv32 == ~cond; {346#false} is VALID [2018-11-23 09:54:59,444 INFO L273 TraceCheckUtils]: 24: Hoare triple {346#false} assume !false; {346#false} is VALID [2018-11-23 09:54:59,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:54:59,446 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:54:59,448 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:54:59,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 09:54:59,450 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-11-23 09:54:59,451 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:54:59,451 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 09:54:59,527 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:59,527 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 09:54:59,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 09:54:59,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:54:59,528 INFO L87 Difference]: Start difference. First operand 37 states and 44 transitions. Second operand 3 states. [2018-11-23 09:54:59,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:59,806 INFO L93 Difference]: Finished difference Result 68 states and 82 transitions. [2018-11-23 09:54:59,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 09:54:59,806 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-11-23 09:54:59,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:54:59,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:54:59,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 82 transitions. [2018-11-23 09:54:59,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:54:59,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 82 transitions. [2018-11-23 09:54:59,814 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 82 transitions. [2018-11-23 09:55:00,008 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:00,011 INFO L225 Difference]: With dead ends: 68 [2018-11-23 09:55:00,012 INFO L226 Difference]: Without dead ends: 39 [2018-11-23 09:55:00,013 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:00,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-23 09:55:00,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 38. [2018-11-23 09:55:00,043 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:00,044 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 38 states. [2018-11-23 09:55:00,044 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 38 states. [2018-11-23 09:55:00,044 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 38 states. [2018-11-23 09:55:00,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,048 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-23 09:55:00,048 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-23 09:55:00,049 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:00,049 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:00,049 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand 39 states. [2018-11-23 09:55:00,050 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 39 states. [2018-11-23 09:55:00,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,053 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-23 09:55:00,053 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-23 09:55:00,054 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:00,054 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:00,054 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:00,055 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:00,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-11-23 09:55:00,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 45 transitions. [2018-11-23 09:55:00,057 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 45 transitions. Word has length 25 [2018-11-23 09:55:00,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:00,058 INFO L480 AbstractCegarLoop]: Abstraction has 38 states and 45 transitions. [2018-11-23 09:55:00,058 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 09:55:00,058 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 45 transitions. [2018-11-23 09:55:00,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 09:55:00,059 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:00,059 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:00,060 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:00,060 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:00,060 INFO L82 PathProgramCache]: Analyzing trace with hash 1148318088, now seen corresponding path program 1 times [2018-11-23 09:55:00,061 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:00,061 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:00,080 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:55:00,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:00,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:00,153 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:00,240 INFO L256 TraceCheckUtils]: 0: Hoare triple {645#true} call ULTIMATE.init(); {645#true} is VALID [2018-11-23 09:55:00,240 INFO L273 TraceCheckUtils]: 1: Hoare triple {645#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {645#true} is VALID [2018-11-23 09:55:00,241 INFO L273 TraceCheckUtils]: 2: Hoare triple {645#true} assume true; {645#true} is VALID [2018-11-23 09:55:00,242 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {645#true} {645#true} #133#return; {645#true} is VALID [2018-11-23 09:55:00,242 INFO L256 TraceCheckUtils]: 4: Hoare triple {645#true} call #t~ret18 := main(); {645#true} is VALID [2018-11-23 09:55:00,250 INFO L273 TraceCheckUtils]: 5: Hoare triple {645#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {665#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:00,250 INFO L273 TraceCheckUtils]: 6: Hoare triple {665#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {665#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:00,251 INFO L273 TraceCheckUtils]: 7: Hoare triple {665#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {672#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:00,252 INFO L273 TraceCheckUtils]: 8: Hoare triple {672#(= (_ bv1 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,252 INFO L273 TraceCheckUtils]: 9: Hoare triple {646#false} havoc ~i~0;~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,252 INFO L273 TraceCheckUtils]: 10: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,252 INFO L273 TraceCheckUtils]: 11: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,253 INFO L273 TraceCheckUtils]: 12: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,253 INFO L273 TraceCheckUtils]: 13: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,253 INFO L273 TraceCheckUtils]: 14: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,254 INFO L273 TraceCheckUtils]: 15: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,254 INFO L273 TraceCheckUtils]: 16: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,255 INFO L273 TraceCheckUtils]: 17: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,255 INFO L273 TraceCheckUtils]: 18: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,256 INFO L273 TraceCheckUtils]: 19: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,256 INFO L273 TraceCheckUtils]: 20: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,257 INFO L273 TraceCheckUtils]: 21: Hoare triple {646#false} havoc ~x~0;~x~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,257 INFO L273 TraceCheckUtils]: 22: Hoare triple {646#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {646#false} is VALID [2018-11-23 09:55:00,257 INFO L256 TraceCheckUtils]: 23: Hoare triple {646#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {646#false} is VALID [2018-11-23 09:55:00,258 INFO L273 TraceCheckUtils]: 24: Hoare triple {646#false} ~cond := #in~cond; {646#false} is VALID [2018-11-23 09:55:00,258 INFO L273 TraceCheckUtils]: 25: Hoare triple {646#false} assume 0bv32 == ~cond; {646#false} is VALID [2018-11-23 09:55:00,258 INFO L273 TraceCheckUtils]: 26: Hoare triple {646#false} assume !false; {646#false} is VALID [2018-11-23 09:55:00,260 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:55:00,260 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:00,662 INFO L273 TraceCheckUtils]: 26: Hoare triple {646#false} assume !false; {646#false} is VALID [2018-11-23 09:55:00,663 INFO L273 TraceCheckUtils]: 25: Hoare triple {646#false} assume 0bv32 == ~cond; {646#false} is VALID [2018-11-23 09:55:00,663 INFO L273 TraceCheckUtils]: 24: Hoare triple {646#false} ~cond := #in~cond; {646#false} is VALID [2018-11-23 09:55:00,664 INFO L256 TraceCheckUtils]: 23: Hoare triple {646#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {646#false} is VALID [2018-11-23 09:55:00,664 INFO L273 TraceCheckUtils]: 22: Hoare triple {646#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {646#false} is VALID [2018-11-23 09:55:00,664 INFO L273 TraceCheckUtils]: 21: Hoare triple {646#false} havoc ~x~0;~x~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,665 INFO L273 TraceCheckUtils]: 20: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,665 INFO L273 TraceCheckUtils]: 19: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,666 INFO L273 TraceCheckUtils]: 18: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,666 INFO L273 TraceCheckUtils]: 17: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,667 INFO L273 TraceCheckUtils]: 16: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,667 INFO L273 TraceCheckUtils]: 15: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,667 INFO L273 TraceCheckUtils]: 14: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,668 INFO L273 TraceCheckUtils]: 13: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,668 INFO L273 TraceCheckUtils]: 12: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,668 INFO L273 TraceCheckUtils]: 11: Hoare triple {646#false} ~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,668 INFO L273 TraceCheckUtils]: 10: Hoare triple {646#false} assume !~bvslt32(~i~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,669 INFO L273 TraceCheckUtils]: 9: Hoare triple {646#false} havoc ~i~0;~i~0 := 0bv32; {646#false} is VALID [2018-11-23 09:55:00,674 INFO L273 TraceCheckUtils]: 8: Hoare triple {784#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {646#false} is VALID [2018-11-23 09:55:00,675 INFO L273 TraceCheckUtils]: 7: Hoare triple {788#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {784#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:00,679 INFO L273 TraceCheckUtils]: 6: Hoare triple {788#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {788#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:00,681 INFO L273 TraceCheckUtils]: 5: Hoare triple {645#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {788#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:00,681 INFO L256 TraceCheckUtils]: 4: Hoare triple {645#true} call #t~ret18 := main(); {645#true} is VALID [2018-11-23 09:55:00,681 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {645#true} {645#true} #133#return; {645#true} is VALID [2018-11-23 09:55:00,681 INFO L273 TraceCheckUtils]: 2: Hoare triple {645#true} assume true; {645#true} is VALID [2018-11-23 09:55:00,682 INFO L273 TraceCheckUtils]: 1: Hoare triple {645#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {645#true} is VALID [2018-11-23 09:55:00,682 INFO L256 TraceCheckUtils]: 0: Hoare triple {645#true} call ULTIMATE.init(); {645#true} is VALID [2018-11-23 09:55:00,683 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:55:00,685 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:00,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 09:55:00,686 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-11-23 09:55:00,686 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:00,686 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 09:55:00,801 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:00,801 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 09:55:00,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 09:55:00,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 09:55:00,802 INFO L87 Difference]: Start difference. First operand 38 states and 45 transitions. Second operand 6 states. [2018-11-23 09:55:01,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:01,390 INFO L93 Difference]: Finished difference Result 73 states and 89 transitions. [2018-11-23 09:55:01,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 09:55:01,390 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-11-23 09:55:01,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:01,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:01,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 89 transitions. [2018-11-23 09:55:01,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:01,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 89 transitions. [2018-11-23 09:55:01,398 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 89 transitions. [2018-11-23 09:55:01,652 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:01,655 INFO L225 Difference]: With dead ends: 73 [2018-11-23 09:55:01,655 INFO L226 Difference]: Without dead ends: 44 [2018-11-23 09:55:01,656 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 09:55:01,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-11-23 09:55:01,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-11-23 09:55:01,674 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:01,674 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand 44 states. [2018-11-23 09:55:01,674 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 44 states. [2018-11-23 09:55:01,674 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 44 states. [2018-11-23 09:55:01,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:01,677 INFO L93 Difference]: Finished difference Result 44 states and 51 transitions. [2018-11-23 09:55:01,677 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 51 transitions. [2018-11-23 09:55:01,678 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:01,678 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:01,678 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 44 states. [2018-11-23 09:55:01,678 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 44 states. [2018-11-23 09:55:01,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:01,681 INFO L93 Difference]: Finished difference Result 44 states and 51 transitions. [2018-11-23 09:55:01,682 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 51 transitions. [2018-11-23 09:55:01,682 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:01,683 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:01,683 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:01,683 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:01,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-23 09:55:01,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 51 transitions. [2018-11-23 09:55:01,685 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 51 transitions. Word has length 27 [2018-11-23 09:55:01,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:01,686 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 51 transitions. [2018-11-23 09:55:01,686 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 09:55:01,686 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 51 transitions. [2018-11-23 09:55:01,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 09:55:01,687 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:01,688 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:01,688 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:01,688 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:01,688 INFO L82 PathProgramCache]: Analyzing trace with hash -421330462, now seen corresponding path program 2 times [2018-11-23 09:55:01,692 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:01,692 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:01,716 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 09:55:01,757 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 09:55:01,758 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:01,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:01,781 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:01,844 INFO L256 TraceCheckUtils]: 0: Hoare triple {1064#true} call ULTIMATE.init(); {1064#true} is VALID [2018-11-23 09:55:01,845 INFO L273 TraceCheckUtils]: 1: Hoare triple {1064#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1064#true} is VALID [2018-11-23 09:55:01,845 INFO L273 TraceCheckUtils]: 2: Hoare triple {1064#true} assume true; {1064#true} is VALID [2018-11-23 09:55:01,846 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1064#true} {1064#true} #133#return; {1064#true} is VALID [2018-11-23 09:55:01,846 INFO L256 TraceCheckUtils]: 4: Hoare triple {1064#true} call #t~ret18 := main(); {1064#true} is VALID [2018-11-23 09:55:01,847 INFO L273 TraceCheckUtils]: 5: Hoare triple {1064#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1064#true} is VALID [2018-11-23 09:55:01,847 INFO L273 TraceCheckUtils]: 6: Hoare triple {1064#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1064#true} is VALID [2018-11-23 09:55:01,847 INFO L273 TraceCheckUtils]: 7: Hoare triple {1064#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1064#true} is VALID [2018-11-23 09:55:01,848 INFO L273 TraceCheckUtils]: 8: Hoare triple {1064#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1064#true} is VALID [2018-11-23 09:55:01,848 INFO L273 TraceCheckUtils]: 9: Hoare triple {1064#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1064#true} is VALID [2018-11-23 09:55:01,848 INFO L273 TraceCheckUtils]: 10: Hoare triple {1064#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1064#true} is VALID [2018-11-23 09:55:01,849 INFO L273 TraceCheckUtils]: 11: Hoare triple {1064#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1064#true} is VALID [2018-11-23 09:55:01,849 INFO L273 TraceCheckUtils]: 12: Hoare triple {1064#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1064#true} is VALID [2018-11-23 09:55:01,849 INFO L273 TraceCheckUtils]: 13: Hoare triple {1064#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1064#true} is VALID [2018-11-23 09:55:01,849 INFO L273 TraceCheckUtils]: 14: Hoare triple {1064#true} assume !~bvslt32(~a~0, 100000bv32); {1064#true} is VALID [2018-11-23 09:55:01,856 INFO L273 TraceCheckUtils]: 15: Hoare triple {1064#true} havoc ~i~0;~i~0 := 0bv32; {1114#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:01,856 INFO L273 TraceCheckUtils]: 16: Hoare triple {1114#(= main_~i~0 (_ bv0 32))} assume !~bvslt32(~i~0, 100000bv32); {1065#false} is VALID [2018-11-23 09:55:01,857 INFO L273 TraceCheckUtils]: 17: Hoare triple {1065#false} ~i~0 := 0bv32; {1065#false} is VALID [2018-11-23 09:55:01,857 INFO L273 TraceCheckUtils]: 18: Hoare triple {1065#false} assume !~bvslt32(~i~0, 100000bv32); {1065#false} is VALID [2018-11-23 09:55:01,857 INFO L273 TraceCheckUtils]: 19: Hoare triple {1065#false} ~i~0 := 0bv32; {1065#false} is VALID [2018-11-23 09:55:01,858 INFO L273 TraceCheckUtils]: 20: Hoare triple {1065#false} assume !~bvslt32(~i~0, 100000bv32); {1065#false} is VALID [2018-11-23 09:55:01,858 INFO L273 TraceCheckUtils]: 21: Hoare triple {1065#false} ~i~0 := 0bv32; {1065#false} is VALID [2018-11-23 09:55:01,858 INFO L273 TraceCheckUtils]: 22: Hoare triple {1065#false} assume !~bvslt32(~i~0, 100000bv32); {1065#false} is VALID [2018-11-23 09:55:01,859 INFO L273 TraceCheckUtils]: 23: Hoare triple {1065#false} ~i~0 := 0bv32; {1065#false} is VALID [2018-11-23 09:55:01,859 INFO L273 TraceCheckUtils]: 24: Hoare triple {1065#false} assume !~bvslt32(~i~0, 100000bv32); {1065#false} is VALID [2018-11-23 09:55:01,859 INFO L273 TraceCheckUtils]: 25: Hoare triple {1065#false} ~i~0 := 0bv32; {1065#false} is VALID [2018-11-23 09:55:01,859 INFO L273 TraceCheckUtils]: 26: Hoare triple {1065#false} assume !~bvslt32(~i~0, 100000bv32); {1065#false} is VALID [2018-11-23 09:55:01,860 INFO L273 TraceCheckUtils]: 27: Hoare triple {1065#false} havoc ~x~0;~x~0 := 0bv32; {1065#false} is VALID [2018-11-23 09:55:01,860 INFO L273 TraceCheckUtils]: 28: Hoare triple {1065#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1065#false} is VALID [2018-11-23 09:55:01,860 INFO L256 TraceCheckUtils]: 29: Hoare triple {1065#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {1065#false} is VALID [2018-11-23 09:55:01,861 INFO L273 TraceCheckUtils]: 30: Hoare triple {1065#false} ~cond := #in~cond; {1065#false} is VALID [2018-11-23 09:55:01,861 INFO L273 TraceCheckUtils]: 31: Hoare triple {1065#false} assume 0bv32 == ~cond; {1065#false} is VALID [2018-11-23 09:55:01,861 INFO L273 TraceCheckUtils]: 32: Hoare triple {1065#false} assume !false; {1065#false} is VALID [2018-11-23 09:55:01,863 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 09:55:01,864 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:55:01,866 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:55:01,867 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 09:55:01,867 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2018-11-23 09:55:01,867 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:01,869 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 09:55:01,915 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:01,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 09:55:01,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 09:55:01,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:01,918 INFO L87 Difference]: Start difference. First operand 44 states and 51 transitions. Second operand 3 states. [2018-11-23 09:55:02,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,259 INFO L93 Difference]: Finished difference Result 82 states and 100 transitions. [2018-11-23 09:55:02,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 09:55:02,259 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2018-11-23 09:55:02,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:02,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:02,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 93 transitions. [2018-11-23 09:55:02,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:02,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 93 transitions. [2018-11-23 09:55:02,265 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 93 transitions. [2018-11-23 09:55:02,404 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 93 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:02,407 INFO L225 Difference]: With dead ends: 82 [2018-11-23 09:55:02,407 INFO L226 Difference]: Without dead ends: 56 [2018-11-23 09:55:02,408 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:02,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-11-23 09:55:02,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 50. [2018-11-23 09:55:02,454 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:02,454 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand 50 states. [2018-11-23 09:55:02,454 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand 50 states. [2018-11-23 09:55:02,454 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 50 states. [2018-11-23 09:55:02,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,457 INFO L93 Difference]: Finished difference Result 56 states and 63 transitions. [2018-11-23 09:55:02,458 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 63 transitions. [2018-11-23 09:55:02,458 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,459 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,459 INFO L74 IsIncluded]: Start isIncluded. First operand 50 states. Second operand 56 states. [2018-11-23 09:55:02,459 INFO L87 Difference]: Start difference. First operand 50 states. Second operand 56 states. [2018-11-23 09:55:02,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,462 INFO L93 Difference]: Finished difference Result 56 states and 63 transitions. [2018-11-23 09:55:02,462 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 63 transitions. [2018-11-23 09:55:02,463 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,463 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,463 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:02,463 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:02,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-11-23 09:55:02,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 57 transitions. [2018-11-23 09:55:02,466 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 57 transitions. Word has length 33 [2018-11-23 09:55:02,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:02,467 INFO L480 AbstractCegarLoop]: Abstraction has 50 states and 57 transitions. [2018-11-23 09:55:02,467 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 09:55:02,467 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 57 transitions. [2018-11-23 09:55:02,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-23 09:55:02,468 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:02,469 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:02,469 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:02,469 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:02,469 INFO L82 PathProgramCache]: Analyzing trace with hash -1613227306, now seen corresponding path program 1 times [2018-11-23 09:55:02,470 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:02,470 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:02,499 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 09:55:02,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:02,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:02,597 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:02,710 INFO L256 TraceCheckUtils]: 0: Hoare triple {1465#true} call ULTIMATE.init(); {1465#true} is VALID [2018-11-23 09:55:02,711 INFO L273 TraceCheckUtils]: 1: Hoare triple {1465#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1465#true} is VALID [2018-11-23 09:55:02,711 INFO L273 TraceCheckUtils]: 2: Hoare triple {1465#true} assume true; {1465#true} is VALID [2018-11-23 09:55:02,712 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1465#true} {1465#true} #133#return; {1465#true} is VALID [2018-11-23 09:55:02,712 INFO L256 TraceCheckUtils]: 4: Hoare triple {1465#true} call #t~ret18 := main(); {1465#true} is VALID [2018-11-23 09:55:02,713 INFO L273 TraceCheckUtils]: 5: Hoare triple {1465#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1485#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:02,714 INFO L273 TraceCheckUtils]: 6: Hoare triple {1485#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1485#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:02,714 INFO L273 TraceCheckUtils]: 7: Hoare triple {1485#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1492#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:02,715 INFO L273 TraceCheckUtils]: 8: Hoare triple {1492#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1492#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:02,715 INFO L273 TraceCheckUtils]: 9: Hoare triple {1492#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1499#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:02,716 INFO L273 TraceCheckUtils]: 10: Hoare triple {1499#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1499#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:02,716 INFO L273 TraceCheckUtils]: 11: Hoare triple {1499#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1506#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:02,717 INFO L273 TraceCheckUtils]: 12: Hoare triple {1506#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1506#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:02,719 INFO L273 TraceCheckUtils]: 13: Hoare triple {1506#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1513#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:02,719 INFO L273 TraceCheckUtils]: 14: Hoare triple {1513#(= (_ bv4 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,720 INFO L273 TraceCheckUtils]: 15: Hoare triple {1466#false} havoc ~i~0;~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,720 INFO L273 TraceCheckUtils]: 16: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1466#false} is VALID [2018-11-23 09:55:02,721 INFO L273 TraceCheckUtils]: 17: Hoare triple {1466#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1466#false} is VALID [2018-11-23 09:55:02,721 INFO L273 TraceCheckUtils]: 18: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,721 INFO L273 TraceCheckUtils]: 19: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,722 INFO L273 TraceCheckUtils]: 20: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {1466#false} is VALID [2018-11-23 09:55:02,722 INFO L273 TraceCheckUtils]: 21: Hoare triple {1466#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1466#false} is VALID [2018-11-23 09:55:02,723 INFO L273 TraceCheckUtils]: 22: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,723 INFO L273 TraceCheckUtils]: 23: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,724 INFO L273 TraceCheckUtils]: 24: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {1466#false} is VALID [2018-11-23 09:55:02,724 INFO L273 TraceCheckUtils]: 25: Hoare triple {1466#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1466#false} is VALID [2018-11-23 09:55:02,724 INFO L273 TraceCheckUtils]: 26: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,724 INFO L273 TraceCheckUtils]: 27: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,725 INFO L273 TraceCheckUtils]: 28: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {1466#false} is VALID [2018-11-23 09:55:02,725 INFO L273 TraceCheckUtils]: 29: Hoare triple {1466#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1466#false} is VALID [2018-11-23 09:55:02,725 INFO L273 TraceCheckUtils]: 30: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,726 INFO L273 TraceCheckUtils]: 31: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,726 INFO L273 TraceCheckUtils]: 32: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {1466#false} is VALID [2018-11-23 09:55:02,726 INFO L273 TraceCheckUtils]: 33: Hoare triple {1466#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1466#false} is VALID [2018-11-23 09:55:02,726 INFO L273 TraceCheckUtils]: 34: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,727 INFO L273 TraceCheckUtils]: 35: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,727 INFO L273 TraceCheckUtils]: 36: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {1466#false} is VALID [2018-11-23 09:55:02,727 INFO L273 TraceCheckUtils]: 37: Hoare triple {1466#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1466#false} is VALID [2018-11-23 09:55:02,727 INFO L273 TraceCheckUtils]: 38: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,727 INFO L273 TraceCheckUtils]: 39: Hoare triple {1466#false} havoc ~x~0;~x~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,728 INFO L273 TraceCheckUtils]: 40: Hoare triple {1466#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1466#false} is VALID [2018-11-23 09:55:02,728 INFO L256 TraceCheckUtils]: 41: Hoare triple {1466#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {1466#false} is VALID [2018-11-23 09:55:02,728 INFO L273 TraceCheckUtils]: 42: Hoare triple {1466#false} ~cond := #in~cond; {1466#false} is VALID [2018-11-23 09:55:02,728 INFO L273 TraceCheckUtils]: 43: Hoare triple {1466#false} assume 0bv32 == ~cond; {1466#false} is VALID [2018-11-23 09:55:02,728 INFO L273 TraceCheckUtils]: 44: Hoare triple {1466#false} assume !false; {1466#false} is VALID [2018-11-23 09:55:02,732 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 09:55:02,732 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:02,985 INFO L273 TraceCheckUtils]: 44: Hoare triple {1466#false} assume !false; {1466#false} is VALID [2018-11-23 09:55:02,986 INFO L273 TraceCheckUtils]: 43: Hoare triple {1466#false} assume 0bv32 == ~cond; {1466#false} is VALID [2018-11-23 09:55:02,986 INFO L273 TraceCheckUtils]: 42: Hoare triple {1466#false} ~cond := #in~cond; {1466#false} is VALID [2018-11-23 09:55:02,986 INFO L256 TraceCheckUtils]: 41: Hoare triple {1466#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {1466#false} is VALID [2018-11-23 09:55:02,987 INFO L273 TraceCheckUtils]: 40: Hoare triple {1466#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1466#false} is VALID [2018-11-23 09:55:02,987 INFO L273 TraceCheckUtils]: 39: Hoare triple {1466#false} havoc ~x~0;~x~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,987 INFO L273 TraceCheckUtils]: 38: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,988 INFO L273 TraceCheckUtils]: 37: Hoare triple {1466#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1466#false} is VALID [2018-11-23 09:55:02,988 INFO L273 TraceCheckUtils]: 36: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {1466#false} is VALID [2018-11-23 09:55:02,989 INFO L273 TraceCheckUtils]: 35: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,989 INFO L273 TraceCheckUtils]: 34: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,989 INFO L273 TraceCheckUtils]: 33: Hoare triple {1466#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1466#false} is VALID [2018-11-23 09:55:02,990 INFO L273 TraceCheckUtils]: 32: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {1466#false} is VALID [2018-11-23 09:55:02,990 INFO L273 TraceCheckUtils]: 31: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,990 INFO L273 TraceCheckUtils]: 30: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,991 INFO L273 TraceCheckUtils]: 29: Hoare triple {1466#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1466#false} is VALID [2018-11-23 09:55:02,991 INFO L273 TraceCheckUtils]: 28: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {1466#false} is VALID [2018-11-23 09:55:02,991 INFO L273 TraceCheckUtils]: 27: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,992 INFO L273 TraceCheckUtils]: 26: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,992 INFO L273 TraceCheckUtils]: 25: Hoare triple {1466#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1466#false} is VALID [2018-11-23 09:55:02,992 INFO L273 TraceCheckUtils]: 24: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {1466#false} is VALID [2018-11-23 09:55:02,992 INFO L273 TraceCheckUtils]: 23: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,992 INFO L273 TraceCheckUtils]: 22: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,993 INFO L273 TraceCheckUtils]: 21: Hoare triple {1466#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1466#false} is VALID [2018-11-23 09:55:02,993 INFO L273 TraceCheckUtils]: 20: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {1466#false} is VALID [2018-11-23 09:55:02,993 INFO L273 TraceCheckUtils]: 19: Hoare triple {1466#false} ~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,994 INFO L273 TraceCheckUtils]: 18: Hoare triple {1466#false} assume !~bvslt32(~i~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:02,994 INFO L273 TraceCheckUtils]: 17: Hoare triple {1466#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1466#false} is VALID [2018-11-23 09:55:02,994 INFO L273 TraceCheckUtils]: 16: Hoare triple {1466#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1466#false} is VALID [2018-11-23 09:55:02,994 INFO L273 TraceCheckUtils]: 15: Hoare triple {1466#false} havoc ~i~0;~i~0 := 0bv32; {1466#false} is VALID [2018-11-23 09:55:02,998 INFO L273 TraceCheckUtils]: 14: Hoare triple {1697#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {1466#false} is VALID [2018-11-23 09:55:03,000 INFO L273 TraceCheckUtils]: 13: Hoare triple {1701#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1697#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:03,000 INFO L273 TraceCheckUtils]: 12: Hoare triple {1701#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1701#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,005 INFO L273 TraceCheckUtils]: 11: Hoare triple {1708#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1701#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,006 INFO L273 TraceCheckUtils]: 10: Hoare triple {1708#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1708#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,010 INFO L273 TraceCheckUtils]: 9: Hoare triple {1715#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1708#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,010 INFO L273 TraceCheckUtils]: 8: Hoare triple {1715#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1715#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,014 INFO L273 TraceCheckUtils]: 7: Hoare triple {1722#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1715#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,015 INFO L273 TraceCheckUtils]: 6: Hoare triple {1722#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1722#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,016 INFO L273 TraceCheckUtils]: 5: Hoare triple {1465#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1722#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,016 INFO L256 TraceCheckUtils]: 4: Hoare triple {1465#true} call #t~ret18 := main(); {1465#true} is VALID [2018-11-23 09:55:03,017 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1465#true} {1465#true} #133#return; {1465#true} is VALID [2018-11-23 09:55:03,017 INFO L273 TraceCheckUtils]: 2: Hoare triple {1465#true} assume true; {1465#true} is VALID [2018-11-23 09:55:03,017 INFO L273 TraceCheckUtils]: 1: Hoare triple {1465#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1465#true} is VALID [2018-11-23 09:55:03,017 INFO L256 TraceCheckUtils]: 0: Hoare triple {1465#true} call ULTIMATE.init(); {1465#true} is VALID [2018-11-23 09:55:03,021 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 09:55:03,023 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:03,023 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 09:55:03,024 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 45 [2018-11-23 09:55:03,025 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:03,025 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 09:55:03,160 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:03,161 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 09:55:03,161 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 09:55:03,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-23 09:55:03,162 INFO L87 Difference]: Start difference. First operand 50 states and 57 transitions. Second operand 12 states. [2018-11-23 09:55:04,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:04,426 INFO L93 Difference]: Finished difference Result 97 states and 116 transitions. [2018-11-23 09:55:04,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 09:55:04,426 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 45 [2018-11-23 09:55:04,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:04,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 09:55:04,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 104 transitions. [2018-11-23 09:55:04,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 09:55:04,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 104 transitions. [2018-11-23 09:55:04,433 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 104 transitions. [2018-11-23 09:55:04,681 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:04,682 INFO L225 Difference]: With dead ends: 97 [2018-11-23 09:55:04,683 INFO L226 Difference]: Without dead ends: 62 [2018-11-23 09:55:04,683 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2018-11-23 09:55:04,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-11-23 09:55:04,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-11-23 09:55:04,720 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:04,720 INFO L82 GeneralOperation]: Start isEquivalent. First operand 62 states. Second operand 62 states. [2018-11-23 09:55:04,720 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 62 states. [2018-11-23 09:55:04,720 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 62 states. [2018-11-23 09:55:04,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:04,723 INFO L93 Difference]: Finished difference Result 62 states and 69 transitions. [2018-11-23 09:55:04,723 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 69 transitions. [2018-11-23 09:55:04,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:04,724 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:04,724 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 62 states. [2018-11-23 09:55:04,724 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 62 states. [2018-11-23 09:55:04,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:04,726 INFO L93 Difference]: Finished difference Result 62 states and 69 transitions. [2018-11-23 09:55:04,727 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 69 transitions. [2018-11-23 09:55:04,727 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:04,727 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:04,727 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:04,728 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:04,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-11-23 09:55:04,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 69 transitions. [2018-11-23 09:55:04,730 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 69 transitions. Word has length 45 [2018-11-23 09:55:04,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:04,730 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 69 transitions. [2018-11-23 09:55:04,730 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 09:55:04,731 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 69 transitions. [2018-11-23 09:55:04,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-23 09:55:04,732 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:04,732 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:04,733 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:04,733 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:04,733 INFO L82 PathProgramCache]: Analyzing trace with hash -112743670, now seen corresponding path program 2 times [2018-11-23 09:55:04,733 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:04,734 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:04,754 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 09:55:04,902 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 09:55:04,902 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:04,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:04,957 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:05,224 INFO L256 TraceCheckUtils]: 0: Hoare triple {2112#true} call ULTIMATE.init(); {2112#true} is VALID [2018-11-23 09:55:05,225 INFO L273 TraceCheckUtils]: 1: Hoare triple {2112#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2112#true} is VALID [2018-11-23 09:55:05,225 INFO L273 TraceCheckUtils]: 2: Hoare triple {2112#true} assume true; {2112#true} is VALID [2018-11-23 09:55:05,225 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2112#true} {2112#true} #133#return; {2112#true} is VALID [2018-11-23 09:55:05,226 INFO L256 TraceCheckUtils]: 4: Hoare triple {2112#true} call #t~ret18 := main(); {2112#true} is VALID [2018-11-23 09:55:05,227 INFO L273 TraceCheckUtils]: 5: Hoare triple {2112#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2132#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:05,227 INFO L273 TraceCheckUtils]: 6: Hoare triple {2132#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2132#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:05,228 INFO L273 TraceCheckUtils]: 7: Hoare triple {2132#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2139#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:05,228 INFO L273 TraceCheckUtils]: 8: Hoare triple {2139#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2139#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:05,229 INFO L273 TraceCheckUtils]: 9: Hoare triple {2139#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2146#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:05,229 INFO L273 TraceCheckUtils]: 10: Hoare triple {2146#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2146#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:05,230 INFO L273 TraceCheckUtils]: 11: Hoare triple {2146#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2153#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:05,231 INFO L273 TraceCheckUtils]: 12: Hoare triple {2153#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2153#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:05,232 INFO L273 TraceCheckUtils]: 13: Hoare triple {2153#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2160#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:05,233 INFO L273 TraceCheckUtils]: 14: Hoare triple {2160#(= (_ bv4 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2160#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:05,233 INFO L273 TraceCheckUtils]: 15: Hoare triple {2160#(= (_ bv4 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2167#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:05,234 INFO L273 TraceCheckUtils]: 16: Hoare triple {2167#(= (_ bv5 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2167#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:05,235 INFO L273 TraceCheckUtils]: 17: Hoare triple {2167#(= (_ bv5 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2174#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:05,236 INFO L273 TraceCheckUtils]: 18: Hoare triple {2174#(= (_ bv6 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2174#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:05,237 INFO L273 TraceCheckUtils]: 19: Hoare triple {2174#(= (_ bv6 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2181#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:05,237 INFO L273 TraceCheckUtils]: 20: Hoare triple {2181#(= (_ bv7 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2181#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:05,238 INFO L273 TraceCheckUtils]: 21: Hoare triple {2181#(= (_ bv7 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2188#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:05,239 INFO L273 TraceCheckUtils]: 22: Hoare triple {2188#(= (_ bv8 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2188#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:05,240 INFO L273 TraceCheckUtils]: 23: Hoare triple {2188#(= (_ bv8 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2195#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:05,240 INFO L273 TraceCheckUtils]: 24: Hoare triple {2195#(= (_ bv9 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2195#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:05,242 INFO L273 TraceCheckUtils]: 25: Hoare triple {2195#(= (_ bv9 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2202#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:05,244 INFO L273 TraceCheckUtils]: 26: Hoare triple {2202#(= (_ bv10 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,244 INFO L273 TraceCheckUtils]: 27: Hoare triple {2113#false} havoc ~i~0;~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,244 INFO L273 TraceCheckUtils]: 28: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2113#false} is VALID [2018-11-23 09:55:05,244 INFO L273 TraceCheckUtils]: 29: Hoare triple {2113#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2113#false} is VALID [2018-11-23 09:55:05,245 INFO L273 TraceCheckUtils]: 30: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,245 INFO L273 TraceCheckUtils]: 31: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,246 INFO L273 TraceCheckUtils]: 32: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2113#false} is VALID [2018-11-23 09:55:05,246 INFO L273 TraceCheckUtils]: 33: Hoare triple {2113#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2113#false} is VALID [2018-11-23 09:55:05,246 INFO L273 TraceCheckUtils]: 34: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,247 INFO L273 TraceCheckUtils]: 35: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,247 INFO L273 TraceCheckUtils]: 36: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2113#false} is VALID [2018-11-23 09:55:05,248 INFO L273 TraceCheckUtils]: 37: Hoare triple {2113#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2113#false} is VALID [2018-11-23 09:55:05,248 INFO L273 TraceCheckUtils]: 38: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,248 INFO L273 TraceCheckUtils]: 39: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,248 INFO L273 TraceCheckUtils]: 40: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {2113#false} is VALID [2018-11-23 09:55:05,249 INFO L273 TraceCheckUtils]: 41: Hoare triple {2113#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2113#false} is VALID [2018-11-23 09:55:05,249 INFO L273 TraceCheckUtils]: 42: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,249 INFO L273 TraceCheckUtils]: 43: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,249 INFO L273 TraceCheckUtils]: 44: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2113#false} is VALID [2018-11-23 09:55:05,250 INFO L273 TraceCheckUtils]: 45: Hoare triple {2113#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2113#false} is VALID [2018-11-23 09:55:05,250 INFO L273 TraceCheckUtils]: 46: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,250 INFO L273 TraceCheckUtils]: 47: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,250 INFO L273 TraceCheckUtils]: 48: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2113#false} is VALID [2018-11-23 09:55:05,251 INFO L273 TraceCheckUtils]: 49: Hoare triple {2113#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2113#false} is VALID [2018-11-23 09:55:05,251 INFO L273 TraceCheckUtils]: 50: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,251 INFO L273 TraceCheckUtils]: 51: Hoare triple {2113#false} havoc ~x~0;~x~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,251 INFO L273 TraceCheckUtils]: 52: Hoare triple {2113#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2113#false} is VALID [2018-11-23 09:55:05,252 INFO L256 TraceCheckUtils]: 53: Hoare triple {2113#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {2113#false} is VALID [2018-11-23 09:55:05,252 INFO L273 TraceCheckUtils]: 54: Hoare triple {2113#false} ~cond := #in~cond; {2113#false} is VALID [2018-11-23 09:55:05,252 INFO L273 TraceCheckUtils]: 55: Hoare triple {2113#false} assume 0bv32 == ~cond; {2113#false} is VALID [2018-11-23 09:55:05,252 INFO L273 TraceCheckUtils]: 56: Hoare triple {2113#false} assume !false; {2113#false} is VALID [2018-11-23 09:55:05,257 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 09:55:05,257 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:05,981 INFO L273 TraceCheckUtils]: 56: Hoare triple {2113#false} assume !false; {2113#false} is VALID [2018-11-23 09:55:05,981 INFO L273 TraceCheckUtils]: 55: Hoare triple {2113#false} assume 0bv32 == ~cond; {2113#false} is VALID [2018-11-23 09:55:05,982 INFO L273 TraceCheckUtils]: 54: Hoare triple {2113#false} ~cond := #in~cond; {2113#false} is VALID [2018-11-23 09:55:05,982 INFO L256 TraceCheckUtils]: 53: Hoare triple {2113#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {2113#false} is VALID [2018-11-23 09:55:05,982 INFO L273 TraceCheckUtils]: 52: Hoare triple {2113#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2113#false} is VALID [2018-11-23 09:55:05,983 INFO L273 TraceCheckUtils]: 51: Hoare triple {2113#false} havoc ~x~0;~x~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,983 INFO L273 TraceCheckUtils]: 50: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,984 INFO L273 TraceCheckUtils]: 49: Hoare triple {2113#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2113#false} is VALID [2018-11-23 09:55:05,984 INFO L273 TraceCheckUtils]: 48: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2113#false} is VALID [2018-11-23 09:55:05,984 INFO L273 TraceCheckUtils]: 47: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,984 INFO L273 TraceCheckUtils]: 46: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,985 INFO L273 TraceCheckUtils]: 45: Hoare triple {2113#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2113#false} is VALID [2018-11-23 09:55:05,985 INFO L273 TraceCheckUtils]: 44: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2113#false} is VALID [2018-11-23 09:55:05,985 INFO L273 TraceCheckUtils]: 43: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,986 INFO L273 TraceCheckUtils]: 42: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,986 INFO L273 TraceCheckUtils]: 41: Hoare triple {2113#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2113#false} is VALID [2018-11-23 09:55:05,986 INFO L273 TraceCheckUtils]: 40: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {2113#false} is VALID [2018-11-23 09:55:05,986 INFO L273 TraceCheckUtils]: 39: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,987 INFO L273 TraceCheckUtils]: 38: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,987 INFO L273 TraceCheckUtils]: 37: Hoare triple {2113#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2113#false} is VALID [2018-11-23 09:55:05,987 INFO L273 TraceCheckUtils]: 36: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2113#false} is VALID [2018-11-23 09:55:05,988 INFO L273 TraceCheckUtils]: 35: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,988 INFO L273 TraceCheckUtils]: 34: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,988 INFO L273 TraceCheckUtils]: 33: Hoare triple {2113#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2113#false} is VALID [2018-11-23 09:55:05,988 INFO L273 TraceCheckUtils]: 32: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2113#false} is VALID [2018-11-23 09:55:05,989 INFO L273 TraceCheckUtils]: 31: Hoare triple {2113#false} ~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,989 INFO L273 TraceCheckUtils]: 30: Hoare triple {2113#false} assume !~bvslt32(~i~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,989 INFO L273 TraceCheckUtils]: 29: Hoare triple {2113#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2113#false} is VALID [2018-11-23 09:55:05,990 INFO L273 TraceCheckUtils]: 28: Hoare triple {2113#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2113#false} is VALID [2018-11-23 09:55:05,990 INFO L273 TraceCheckUtils]: 27: Hoare triple {2113#false} havoc ~i~0;~i~0 := 0bv32; {2113#false} is VALID [2018-11-23 09:55:05,991 INFO L273 TraceCheckUtils]: 26: Hoare triple {2386#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {2113#false} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 25: Hoare triple {2390#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2386#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 24: Hoare triple {2390#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2390#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:05,998 INFO L273 TraceCheckUtils]: 23: Hoare triple {2397#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2390#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:05,998 INFO L273 TraceCheckUtils]: 22: Hoare triple {2397#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2397#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,002 INFO L273 TraceCheckUtils]: 21: Hoare triple {2404#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2397#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,003 INFO L273 TraceCheckUtils]: 20: Hoare triple {2404#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2404#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,007 INFO L273 TraceCheckUtils]: 19: Hoare triple {2411#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2404#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,007 INFO L273 TraceCheckUtils]: 18: Hoare triple {2411#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2411#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,013 INFO L273 TraceCheckUtils]: 17: Hoare triple {2418#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2411#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,014 INFO L273 TraceCheckUtils]: 16: Hoare triple {2418#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2418#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,018 INFO L273 TraceCheckUtils]: 15: Hoare triple {2425#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2418#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,019 INFO L273 TraceCheckUtils]: 14: Hoare triple {2425#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2425#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,025 INFO L273 TraceCheckUtils]: 13: Hoare triple {2432#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2425#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,025 INFO L273 TraceCheckUtils]: 12: Hoare triple {2432#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2432#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,030 INFO L273 TraceCheckUtils]: 11: Hoare triple {2439#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2432#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,031 INFO L273 TraceCheckUtils]: 10: Hoare triple {2439#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2439#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,036 INFO L273 TraceCheckUtils]: 9: Hoare triple {2446#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2439#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,037 INFO L273 TraceCheckUtils]: 8: Hoare triple {2446#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2446#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,043 INFO L273 TraceCheckUtils]: 7: Hoare triple {2453#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2446#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,044 INFO L273 TraceCheckUtils]: 6: Hoare triple {2453#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2453#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,045 INFO L273 TraceCheckUtils]: 5: Hoare triple {2112#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2453#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,046 INFO L256 TraceCheckUtils]: 4: Hoare triple {2112#true} call #t~ret18 := main(); {2112#true} is VALID [2018-11-23 09:55:06,046 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2112#true} {2112#true} #133#return; {2112#true} is VALID [2018-11-23 09:55:06,046 INFO L273 TraceCheckUtils]: 2: Hoare triple {2112#true} assume true; {2112#true} is VALID [2018-11-23 09:55:06,046 INFO L273 TraceCheckUtils]: 1: Hoare triple {2112#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2112#true} is VALID [2018-11-23 09:55:06,046 INFO L256 TraceCheckUtils]: 0: Hoare triple {2112#true} call ULTIMATE.init(); {2112#true} is VALID [2018-11-23 09:55:06,051 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 09:55:06,053 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:06,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 09:55:06,053 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 57 [2018-11-23 09:55:06,054 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:06,054 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 09:55:06,341 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:06,341 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 09:55:06,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 09:55:06,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-11-23 09:55:06,342 INFO L87 Difference]: Start difference. First operand 62 states and 69 transitions. Second operand 24 states. [2018-11-23 09:55:10,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:10,999 INFO L93 Difference]: Finished difference Result 121 states and 146 transitions. [2018-11-23 09:55:10,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 09:55:11,000 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 57 [2018-11-23 09:55:11,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:11,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 09:55:11,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 134 transitions. [2018-11-23 09:55:11,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 09:55:11,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 134 transitions. [2018-11-23 09:55:11,006 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 134 transitions. [2018-11-23 09:55:11,267 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:11,269 INFO L225 Difference]: With dead ends: 121 [2018-11-23 09:55:11,270 INFO L226 Difference]: Without dead ends: 86 [2018-11-23 09:55:11,271 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2018-11-23 09:55:11,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-11-23 09:55:11,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-11-23 09:55:11,483 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:11,483 INFO L82 GeneralOperation]: Start isEquivalent. First operand 86 states. Second operand 86 states. [2018-11-23 09:55:11,483 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand 86 states. [2018-11-23 09:55:11,483 INFO L87 Difference]: Start difference. First operand 86 states. Second operand 86 states. [2018-11-23 09:55:11,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:11,488 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions. [2018-11-23 09:55:11,488 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 93 transitions. [2018-11-23 09:55:11,488 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:11,489 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:11,489 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand 86 states. [2018-11-23 09:55:11,489 INFO L87 Difference]: Start difference. First operand 86 states. Second operand 86 states. [2018-11-23 09:55:11,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:11,492 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions. [2018-11-23 09:55:11,492 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 93 transitions. [2018-11-23 09:55:11,493 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:11,493 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:11,493 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:11,493 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:11,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-11-23 09:55:11,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 93 transitions. [2018-11-23 09:55:11,496 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 93 transitions. Word has length 57 [2018-11-23 09:55:11,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:11,497 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 93 transitions. [2018-11-23 09:55:11,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 09:55:11,497 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 93 transitions. [2018-11-23 09:55:11,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-23 09:55:11,498 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:11,498 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:11,498 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:11,498 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:11,499 INFO L82 PathProgramCache]: Analyzing trace with hash -1945386638, now seen corresponding path program 3 times [2018-11-23 09:55:11,499 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:11,499 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:11,524 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 09:55:11,643 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-23 09:55:11,643 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:11,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:11,675 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:11,818 INFO L256 TraceCheckUtils]: 0: Hoare triple {2975#true} call ULTIMATE.init(); {2975#true} is VALID [2018-11-23 09:55:11,818 INFO L273 TraceCheckUtils]: 1: Hoare triple {2975#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2975#true} is VALID [2018-11-23 09:55:11,819 INFO L273 TraceCheckUtils]: 2: Hoare triple {2975#true} assume true; {2975#true} is VALID [2018-11-23 09:55:11,819 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2975#true} {2975#true} #133#return; {2975#true} is VALID [2018-11-23 09:55:11,819 INFO L256 TraceCheckUtils]: 4: Hoare triple {2975#true} call #t~ret18 := main(); {2975#true} is VALID [2018-11-23 09:55:11,820 INFO L273 TraceCheckUtils]: 5: Hoare triple {2975#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:11,820 INFO L273 TraceCheckUtils]: 6: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,820 INFO L273 TraceCheckUtils]: 7: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,821 INFO L273 TraceCheckUtils]: 8: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,821 INFO L273 TraceCheckUtils]: 9: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,821 INFO L273 TraceCheckUtils]: 10: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,821 INFO L273 TraceCheckUtils]: 11: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,822 INFO L273 TraceCheckUtils]: 12: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,822 INFO L273 TraceCheckUtils]: 13: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,822 INFO L273 TraceCheckUtils]: 14: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,822 INFO L273 TraceCheckUtils]: 15: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,823 INFO L273 TraceCheckUtils]: 16: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,823 INFO L273 TraceCheckUtils]: 17: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,823 INFO L273 TraceCheckUtils]: 18: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,823 INFO L273 TraceCheckUtils]: 19: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,824 INFO L273 TraceCheckUtils]: 20: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,824 INFO L273 TraceCheckUtils]: 21: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,824 INFO L273 TraceCheckUtils]: 22: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,824 INFO L273 TraceCheckUtils]: 23: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,825 INFO L273 TraceCheckUtils]: 24: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,825 INFO L273 TraceCheckUtils]: 25: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,825 INFO L273 TraceCheckUtils]: 26: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,825 INFO L273 TraceCheckUtils]: 27: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,826 INFO L273 TraceCheckUtils]: 28: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,826 INFO L273 TraceCheckUtils]: 29: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,826 INFO L273 TraceCheckUtils]: 30: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,826 INFO L273 TraceCheckUtils]: 31: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,827 INFO L273 TraceCheckUtils]: 32: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,827 INFO L273 TraceCheckUtils]: 33: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,827 INFO L273 TraceCheckUtils]: 34: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,828 INFO L273 TraceCheckUtils]: 35: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,828 INFO L273 TraceCheckUtils]: 36: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,828 INFO L273 TraceCheckUtils]: 37: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,828 INFO L273 TraceCheckUtils]: 38: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,828 INFO L273 TraceCheckUtils]: 39: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,829 INFO L273 TraceCheckUtils]: 40: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,829 INFO L273 TraceCheckUtils]: 41: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,829 INFO L273 TraceCheckUtils]: 42: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,829 INFO L273 TraceCheckUtils]: 43: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,830 INFO L273 TraceCheckUtils]: 44: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,830 INFO L273 TraceCheckUtils]: 45: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,830 INFO L273 TraceCheckUtils]: 46: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,830 INFO L273 TraceCheckUtils]: 47: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,830 INFO L273 TraceCheckUtils]: 48: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,831 INFO L273 TraceCheckUtils]: 49: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,831 INFO L273 TraceCheckUtils]: 50: Hoare triple {2975#true} assume !~bvslt32(~a~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,831 INFO L273 TraceCheckUtils]: 51: Hoare triple {2975#true} havoc ~i~0;~i~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:11,831 INFO L273 TraceCheckUtils]: 52: Hoare triple {2975#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2975#true} is VALID [2018-11-23 09:55:11,831 INFO L273 TraceCheckUtils]: 53: Hoare triple {2975#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2975#true} is VALID [2018-11-23 09:55:11,832 INFO L273 TraceCheckUtils]: 54: Hoare triple {2975#true} assume !~bvslt32(~i~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,832 INFO L273 TraceCheckUtils]: 55: Hoare triple {2975#true} ~i~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:11,832 INFO L273 TraceCheckUtils]: 56: Hoare triple {2975#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2975#true} is VALID [2018-11-23 09:55:11,832 INFO L273 TraceCheckUtils]: 57: Hoare triple {2975#true} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2975#true} is VALID [2018-11-23 09:55:11,832 INFO L273 TraceCheckUtils]: 58: Hoare triple {2975#true} assume !~bvslt32(~i~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,833 INFO L273 TraceCheckUtils]: 59: Hoare triple {2975#true} ~i~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:11,833 INFO L273 TraceCheckUtils]: 60: Hoare triple {2975#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2975#true} is VALID [2018-11-23 09:55:11,833 INFO L273 TraceCheckUtils]: 61: Hoare triple {2975#true} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2975#true} is VALID [2018-11-23 09:55:11,833 INFO L273 TraceCheckUtils]: 62: Hoare triple {2975#true} assume !~bvslt32(~i~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,846 INFO L273 TraceCheckUtils]: 63: Hoare triple {2975#true} ~i~0 := 0bv32; {3169#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:11,861 INFO L273 TraceCheckUtils]: 64: Hoare triple {3169#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {3169#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:11,870 INFO L273 TraceCheckUtils]: 65: Hoare triple {3169#(= main_~i~0 (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3176#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 09:55:11,876 INFO L273 TraceCheckUtils]: 66: Hoare triple {3176#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 100000bv32); {2976#false} is VALID [2018-11-23 09:55:11,876 INFO L273 TraceCheckUtils]: 67: Hoare triple {2976#false} ~i~0 := 0bv32; {2976#false} is VALID [2018-11-23 09:55:11,876 INFO L273 TraceCheckUtils]: 68: Hoare triple {2976#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2976#false} is VALID [2018-11-23 09:55:11,877 INFO L273 TraceCheckUtils]: 69: Hoare triple {2976#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2976#false} is VALID [2018-11-23 09:55:11,877 INFO L273 TraceCheckUtils]: 70: Hoare triple {2976#false} assume !~bvslt32(~i~0, 100000bv32); {2976#false} is VALID [2018-11-23 09:55:11,877 INFO L273 TraceCheckUtils]: 71: Hoare triple {2976#false} ~i~0 := 0bv32; {2976#false} is VALID [2018-11-23 09:55:11,877 INFO L273 TraceCheckUtils]: 72: Hoare triple {2976#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2976#false} is VALID [2018-11-23 09:55:11,877 INFO L273 TraceCheckUtils]: 73: Hoare triple {2976#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2976#false} is VALID [2018-11-23 09:55:11,877 INFO L273 TraceCheckUtils]: 74: Hoare triple {2976#false} assume !~bvslt32(~i~0, 100000bv32); {2976#false} is VALID [2018-11-23 09:55:11,878 INFO L273 TraceCheckUtils]: 75: Hoare triple {2976#false} havoc ~x~0;~x~0 := 0bv32; {2976#false} is VALID [2018-11-23 09:55:11,878 INFO L273 TraceCheckUtils]: 76: Hoare triple {2976#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2976#false} is VALID [2018-11-23 09:55:11,878 INFO L256 TraceCheckUtils]: 77: Hoare triple {2976#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {2976#false} is VALID [2018-11-23 09:55:11,878 INFO L273 TraceCheckUtils]: 78: Hoare triple {2976#false} ~cond := #in~cond; {2976#false} is VALID [2018-11-23 09:55:11,878 INFO L273 TraceCheckUtils]: 79: Hoare triple {2976#false} assume 0bv32 == ~cond; {2976#false} is VALID [2018-11-23 09:55:11,878 INFO L273 TraceCheckUtils]: 80: Hoare triple {2976#false} assume !false; {2976#false} is VALID [2018-11-23 09:55:11,881 INFO L134 CoverageAnalysis]: Checked inductivity of 490 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 489 trivial. 0 not checked. [2018-11-23 09:55:11,881 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:11,988 INFO L273 TraceCheckUtils]: 80: Hoare triple {2976#false} assume !false; {2976#false} is VALID [2018-11-23 09:55:11,988 INFO L273 TraceCheckUtils]: 79: Hoare triple {2976#false} assume 0bv32 == ~cond; {2976#false} is VALID [2018-11-23 09:55:11,988 INFO L273 TraceCheckUtils]: 78: Hoare triple {2976#false} ~cond := #in~cond; {2976#false} is VALID [2018-11-23 09:55:11,988 INFO L256 TraceCheckUtils]: 77: Hoare triple {2976#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {2976#false} is VALID [2018-11-23 09:55:11,989 INFO L273 TraceCheckUtils]: 76: Hoare triple {2976#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2976#false} is VALID [2018-11-23 09:55:11,989 INFO L273 TraceCheckUtils]: 75: Hoare triple {2976#false} havoc ~x~0;~x~0 := 0bv32; {2976#false} is VALID [2018-11-23 09:55:11,989 INFO L273 TraceCheckUtils]: 74: Hoare triple {2976#false} assume !~bvslt32(~i~0, 100000bv32); {2976#false} is VALID [2018-11-23 09:55:11,989 INFO L273 TraceCheckUtils]: 73: Hoare triple {2976#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2976#false} is VALID [2018-11-23 09:55:11,989 INFO L273 TraceCheckUtils]: 72: Hoare triple {2976#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2976#false} is VALID [2018-11-23 09:55:11,989 INFO L273 TraceCheckUtils]: 71: Hoare triple {2976#false} ~i~0 := 0bv32; {2976#false} is VALID [2018-11-23 09:55:11,989 INFO L273 TraceCheckUtils]: 70: Hoare triple {2976#false} assume !~bvslt32(~i~0, 100000bv32); {2976#false} is VALID [2018-11-23 09:55:11,990 INFO L273 TraceCheckUtils]: 69: Hoare triple {2976#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2976#false} is VALID [2018-11-23 09:55:11,990 INFO L273 TraceCheckUtils]: 68: Hoare triple {2976#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2976#false} is VALID [2018-11-23 09:55:11,990 INFO L273 TraceCheckUtils]: 67: Hoare triple {2976#false} ~i~0 := 0bv32; {2976#false} is VALID [2018-11-23 09:55:11,990 INFO L273 TraceCheckUtils]: 66: Hoare triple {3264#(bvslt main_~i~0 (_ bv100000 32))} assume !~bvslt32(~i~0, 100000bv32); {2976#false} is VALID [2018-11-23 09:55:11,991 INFO L273 TraceCheckUtils]: 65: Hoare triple {3268#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3264#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:11,991 INFO L273 TraceCheckUtils]: 64: Hoare triple {3268#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {3268#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:11,991 INFO L273 TraceCheckUtils]: 63: Hoare triple {2975#true} ~i~0 := 0bv32; {3268#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:11,992 INFO L273 TraceCheckUtils]: 62: Hoare triple {2975#true} assume !~bvslt32(~i~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,992 INFO L273 TraceCheckUtils]: 61: Hoare triple {2975#true} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2975#true} is VALID [2018-11-23 09:55:11,992 INFO L273 TraceCheckUtils]: 60: Hoare triple {2975#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2975#true} is VALID [2018-11-23 09:55:11,992 INFO L273 TraceCheckUtils]: 59: Hoare triple {2975#true} ~i~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:11,992 INFO L273 TraceCheckUtils]: 58: Hoare triple {2975#true} assume !~bvslt32(~i~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,992 INFO L273 TraceCheckUtils]: 57: Hoare triple {2975#true} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2975#true} is VALID [2018-11-23 09:55:11,992 INFO L273 TraceCheckUtils]: 56: Hoare triple {2975#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2975#true} is VALID [2018-11-23 09:55:11,993 INFO L273 TraceCheckUtils]: 55: Hoare triple {2975#true} ~i~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:11,993 INFO L273 TraceCheckUtils]: 54: Hoare triple {2975#true} assume !~bvslt32(~i~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,993 INFO L273 TraceCheckUtils]: 53: Hoare triple {2975#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2975#true} is VALID [2018-11-23 09:55:11,993 INFO L273 TraceCheckUtils]: 52: Hoare triple {2975#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2975#true} is VALID [2018-11-23 09:55:11,993 INFO L273 TraceCheckUtils]: 51: Hoare triple {2975#true} havoc ~i~0;~i~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:11,993 INFO L273 TraceCheckUtils]: 50: Hoare triple {2975#true} assume !~bvslt32(~a~0, 100000bv32); {2975#true} is VALID [2018-11-23 09:55:11,993 INFO L273 TraceCheckUtils]: 49: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,994 INFO L273 TraceCheckUtils]: 48: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,994 INFO L273 TraceCheckUtils]: 47: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,994 INFO L273 TraceCheckUtils]: 46: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,994 INFO L273 TraceCheckUtils]: 45: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,994 INFO L273 TraceCheckUtils]: 44: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,994 INFO L273 TraceCheckUtils]: 43: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,994 INFO L273 TraceCheckUtils]: 42: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,995 INFO L273 TraceCheckUtils]: 41: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,995 INFO L273 TraceCheckUtils]: 40: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,995 INFO L273 TraceCheckUtils]: 39: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,995 INFO L273 TraceCheckUtils]: 38: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,995 INFO L273 TraceCheckUtils]: 37: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,995 INFO L273 TraceCheckUtils]: 36: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,995 INFO L273 TraceCheckUtils]: 35: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,996 INFO L273 TraceCheckUtils]: 34: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,996 INFO L273 TraceCheckUtils]: 33: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,996 INFO L273 TraceCheckUtils]: 32: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,996 INFO L273 TraceCheckUtils]: 31: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,996 INFO L273 TraceCheckUtils]: 30: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,996 INFO L273 TraceCheckUtils]: 29: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,996 INFO L273 TraceCheckUtils]: 28: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,997 INFO L273 TraceCheckUtils]: 27: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,997 INFO L273 TraceCheckUtils]: 26: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,997 INFO L273 TraceCheckUtils]: 25: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,997 INFO L273 TraceCheckUtils]: 24: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,997 INFO L273 TraceCheckUtils]: 23: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,997 INFO L273 TraceCheckUtils]: 22: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,998 INFO L273 TraceCheckUtils]: 21: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,998 INFO L273 TraceCheckUtils]: 20: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,998 INFO L273 TraceCheckUtils]: 19: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,998 INFO L273 TraceCheckUtils]: 18: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,998 INFO L273 TraceCheckUtils]: 17: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,998 INFO L273 TraceCheckUtils]: 16: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,999 INFO L273 TraceCheckUtils]: 15: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,999 INFO L273 TraceCheckUtils]: 14: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,999 INFO L273 TraceCheckUtils]: 13: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,999 INFO L273 TraceCheckUtils]: 12: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:11,999 INFO L273 TraceCheckUtils]: 11: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:11,999 INFO L273 TraceCheckUtils]: 10: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:12,000 INFO L273 TraceCheckUtils]: 9: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:12,000 INFO L273 TraceCheckUtils]: 8: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:12,000 INFO L273 TraceCheckUtils]: 7: Hoare triple {2975#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#true} is VALID [2018-11-23 09:55:12,000 INFO L273 TraceCheckUtils]: 6: Hoare triple {2975#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#true} is VALID [2018-11-23 09:55:12,000 INFO L273 TraceCheckUtils]: 5: Hoare triple {2975#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2975#true} is VALID [2018-11-23 09:55:12,001 INFO L256 TraceCheckUtils]: 4: Hoare triple {2975#true} call #t~ret18 := main(); {2975#true} is VALID [2018-11-23 09:55:12,001 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2975#true} {2975#true} #133#return; {2975#true} is VALID [2018-11-23 09:55:12,001 INFO L273 TraceCheckUtils]: 2: Hoare triple {2975#true} assume true; {2975#true} is VALID [2018-11-23 09:55:12,001 INFO L273 TraceCheckUtils]: 1: Hoare triple {2975#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2975#true} is VALID [2018-11-23 09:55:12,001 INFO L256 TraceCheckUtils]: 0: Hoare triple {2975#true} call ULTIMATE.init(); {2975#true} is VALID [2018-11-23 09:55:12,004 INFO L134 CoverageAnalysis]: Checked inductivity of 490 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 489 trivial. 0 not checked. [2018-11-23 09:55:12,006 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:12,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 09:55:12,007 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2018-11-23 09:55:12,007 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:12,007 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 09:55:12,074 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:12,074 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 09:55:12,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 09:55:12,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 09:55:12,075 INFO L87 Difference]: Start difference. First operand 86 states and 93 transitions. Second operand 6 states. [2018-11-23 09:55:12,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:12,808 INFO L93 Difference]: Finished difference Result 153 states and 183 transitions. [2018-11-23 09:55:12,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 09:55:12,809 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2018-11-23 09:55:12,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:12,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:12,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 135 transitions. [2018-11-23 09:55:12,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:12,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 135 transitions. [2018-11-23 09:55:12,820 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 135 transitions. [2018-11-23 09:55:13,087 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:13,090 INFO L225 Difference]: With dead ends: 153 [2018-11-23 09:55:13,090 INFO L226 Difference]: Without dead ends: 122 [2018-11-23 09:55:13,091 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 158 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 09:55:13,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-23 09:55:13,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-11-23 09:55:13,169 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:13,169 INFO L82 GeneralOperation]: Start isEquivalent. First operand 122 states. Second operand 122 states. [2018-11-23 09:55:13,170 INFO L74 IsIncluded]: Start isIncluded. First operand 122 states. Second operand 122 states. [2018-11-23 09:55:13,170 INFO L87 Difference]: Start difference. First operand 122 states. Second operand 122 states. [2018-11-23 09:55:13,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:13,174 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. [2018-11-23 09:55:13,174 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-11-23 09:55:13,174 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:13,175 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:13,175 INFO L74 IsIncluded]: Start isIncluded. First operand 122 states. Second operand 122 states. [2018-11-23 09:55:13,175 INFO L87 Difference]: Start difference. First operand 122 states. Second operand 122 states. [2018-11-23 09:55:13,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:13,179 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. [2018-11-23 09:55:13,179 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-11-23 09:55:13,179 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:13,179 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:13,180 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:13,180 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:13,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-11-23 09:55:13,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 129 transitions. [2018-11-23 09:55:13,184 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 129 transitions. Word has length 81 [2018-11-23 09:55:13,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:13,184 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 129 transitions. [2018-11-23 09:55:13,184 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 09:55:13,184 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-11-23 09:55:13,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-11-23 09:55:13,186 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:13,186 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:13,186 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:13,186 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:13,186 INFO L82 PathProgramCache]: Analyzing trace with hash 538114638, now seen corresponding path program 4 times [2018-11-23 09:55:13,187 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:13,187 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:13,214 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 09:55:13,429 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 09:55:13,429 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:13,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:13,506 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:14,467 INFO L256 TraceCheckUtils]: 0: Hoare triple {4121#true} call ULTIMATE.init(); {4121#true} is VALID [2018-11-23 09:55:14,468 INFO L273 TraceCheckUtils]: 1: Hoare triple {4121#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4121#true} is VALID [2018-11-23 09:55:14,468 INFO L273 TraceCheckUtils]: 2: Hoare triple {4121#true} assume true; {4121#true} is VALID [2018-11-23 09:55:14,468 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4121#true} {4121#true} #133#return; {4121#true} is VALID [2018-11-23 09:55:14,469 INFO L256 TraceCheckUtils]: 4: Hoare triple {4121#true} call #t~ret18 := main(); {4121#true} is VALID [2018-11-23 09:55:14,469 INFO L273 TraceCheckUtils]: 5: Hoare triple {4121#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {4141#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:14,470 INFO L273 TraceCheckUtils]: 6: Hoare triple {4141#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4141#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:14,470 INFO L273 TraceCheckUtils]: 7: Hoare triple {4141#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4148#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:14,474 INFO L273 TraceCheckUtils]: 8: Hoare triple {4148#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4148#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:14,477 INFO L273 TraceCheckUtils]: 9: Hoare triple {4148#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4155#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:14,479 INFO L273 TraceCheckUtils]: 10: Hoare triple {4155#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4155#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:14,480 INFO L273 TraceCheckUtils]: 11: Hoare triple {4155#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4162#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:14,481 INFO L273 TraceCheckUtils]: 12: Hoare triple {4162#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4162#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:14,485 INFO L273 TraceCheckUtils]: 13: Hoare triple {4162#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4169#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:14,485 INFO L273 TraceCheckUtils]: 14: Hoare triple {4169#(= (_ bv4 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4169#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:14,486 INFO L273 TraceCheckUtils]: 15: Hoare triple {4169#(= (_ bv4 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4176#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:14,486 INFO L273 TraceCheckUtils]: 16: Hoare triple {4176#(= (_ bv5 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4176#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:14,487 INFO L273 TraceCheckUtils]: 17: Hoare triple {4176#(= (_ bv5 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4183#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:14,487 INFO L273 TraceCheckUtils]: 18: Hoare triple {4183#(= (_ bv6 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4183#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:14,487 INFO L273 TraceCheckUtils]: 19: Hoare triple {4183#(= (_ bv6 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4190#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:14,488 INFO L273 TraceCheckUtils]: 20: Hoare triple {4190#(= (_ bv7 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4190#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:14,488 INFO L273 TraceCheckUtils]: 21: Hoare triple {4190#(= (_ bv7 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4197#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:14,488 INFO L273 TraceCheckUtils]: 22: Hoare triple {4197#(= (_ bv8 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4197#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:14,489 INFO L273 TraceCheckUtils]: 23: Hoare triple {4197#(= (_ bv8 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4204#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:14,490 INFO L273 TraceCheckUtils]: 24: Hoare triple {4204#(= (_ bv9 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4204#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:14,490 INFO L273 TraceCheckUtils]: 25: Hoare triple {4204#(= (_ bv9 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4211#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:14,491 INFO L273 TraceCheckUtils]: 26: Hoare triple {4211#(= (_ bv10 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4211#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:14,492 INFO L273 TraceCheckUtils]: 27: Hoare triple {4211#(= (_ bv10 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4218#(= (_ bv11 32) main_~a~0)} is VALID [2018-11-23 09:55:14,492 INFO L273 TraceCheckUtils]: 28: Hoare triple {4218#(= (_ bv11 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4218#(= (_ bv11 32) main_~a~0)} is VALID [2018-11-23 09:55:14,493 INFO L273 TraceCheckUtils]: 29: Hoare triple {4218#(= (_ bv11 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4225#(= (_ bv12 32) main_~a~0)} is VALID [2018-11-23 09:55:14,493 INFO L273 TraceCheckUtils]: 30: Hoare triple {4225#(= (_ bv12 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4225#(= (_ bv12 32) main_~a~0)} is VALID [2018-11-23 09:55:14,493 INFO L273 TraceCheckUtils]: 31: Hoare triple {4225#(= (_ bv12 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4232#(= (_ bv13 32) main_~a~0)} is VALID [2018-11-23 09:55:14,494 INFO L273 TraceCheckUtils]: 32: Hoare triple {4232#(= (_ bv13 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4232#(= (_ bv13 32) main_~a~0)} is VALID [2018-11-23 09:55:14,494 INFO L273 TraceCheckUtils]: 33: Hoare triple {4232#(= (_ bv13 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4239#(= (_ bv14 32) main_~a~0)} is VALID [2018-11-23 09:55:14,494 INFO L273 TraceCheckUtils]: 34: Hoare triple {4239#(= (_ bv14 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4239#(= (_ bv14 32) main_~a~0)} is VALID [2018-11-23 09:55:14,495 INFO L273 TraceCheckUtils]: 35: Hoare triple {4239#(= (_ bv14 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4246#(= (_ bv15 32) main_~a~0)} is VALID [2018-11-23 09:55:14,496 INFO L273 TraceCheckUtils]: 36: Hoare triple {4246#(= (_ bv15 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4246#(= (_ bv15 32) main_~a~0)} is VALID [2018-11-23 09:55:14,496 INFO L273 TraceCheckUtils]: 37: Hoare triple {4246#(= (_ bv15 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4253#(= (_ bv16 32) main_~a~0)} is VALID [2018-11-23 09:55:14,497 INFO L273 TraceCheckUtils]: 38: Hoare triple {4253#(= (_ bv16 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4253#(= (_ bv16 32) main_~a~0)} is VALID [2018-11-23 09:55:14,497 INFO L273 TraceCheckUtils]: 39: Hoare triple {4253#(= (_ bv16 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4260#(= (_ bv17 32) main_~a~0)} is VALID [2018-11-23 09:55:14,498 INFO L273 TraceCheckUtils]: 40: Hoare triple {4260#(= (_ bv17 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4260#(= (_ bv17 32) main_~a~0)} is VALID [2018-11-23 09:55:14,499 INFO L273 TraceCheckUtils]: 41: Hoare triple {4260#(= (_ bv17 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4267#(= (_ bv18 32) main_~a~0)} is VALID [2018-11-23 09:55:14,499 INFO L273 TraceCheckUtils]: 42: Hoare triple {4267#(= (_ bv18 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4267#(= (_ bv18 32) main_~a~0)} is VALID [2018-11-23 09:55:14,500 INFO L273 TraceCheckUtils]: 43: Hoare triple {4267#(= (_ bv18 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4274#(= (_ bv19 32) main_~a~0)} is VALID [2018-11-23 09:55:14,500 INFO L273 TraceCheckUtils]: 44: Hoare triple {4274#(= (_ bv19 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4274#(= (_ bv19 32) main_~a~0)} is VALID [2018-11-23 09:55:14,501 INFO L273 TraceCheckUtils]: 45: Hoare triple {4274#(= (_ bv19 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4281#(= (_ bv20 32) main_~a~0)} is VALID [2018-11-23 09:55:14,502 INFO L273 TraceCheckUtils]: 46: Hoare triple {4281#(= (_ bv20 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4281#(= (_ bv20 32) main_~a~0)} is VALID [2018-11-23 09:55:14,502 INFO L273 TraceCheckUtils]: 47: Hoare triple {4281#(= (_ bv20 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4288#(= (_ bv21 32) main_~a~0)} is VALID [2018-11-23 09:55:14,503 INFO L273 TraceCheckUtils]: 48: Hoare triple {4288#(= (_ bv21 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4288#(= (_ bv21 32) main_~a~0)} is VALID [2018-11-23 09:55:14,504 INFO L273 TraceCheckUtils]: 49: Hoare triple {4288#(= (_ bv21 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4295#(= (_ bv22 32) main_~a~0)} is VALID [2018-11-23 09:55:14,504 INFO L273 TraceCheckUtils]: 50: Hoare triple {4295#(= (_ bv22 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:14,505 INFO L273 TraceCheckUtils]: 51: Hoare triple {4122#false} havoc ~i~0;~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:14,505 INFO L273 TraceCheckUtils]: 52: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:14,505 INFO L273 TraceCheckUtils]: 53: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:14,505 INFO L273 TraceCheckUtils]: 54: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:14,505 INFO L273 TraceCheckUtils]: 55: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:14,506 INFO L273 TraceCheckUtils]: 56: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:14,506 INFO L273 TraceCheckUtils]: 57: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:14,506 INFO L273 TraceCheckUtils]: 58: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:14,506 INFO L273 TraceCheckUtils]: 59: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:14,507 INFO L273 TraceCheckUtils]: 60: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:14,507 INFO L273 TraceCheckUtils]: 61: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:14,507 INFO L273 TraceCheckUtils]: 62: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:14,507 INFO L273 TraceCheckUtils]: 63: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:14,508 INFO L273 TraceCheckUtils]: 64: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:14,508 INFO L273 TraceCheckUtils]: 65: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:14,508 INFO L273 TraceCheckUtils]: 66: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:14,508 INFO L273 TraceCheckUtils]: 67: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:14,508 INFO L273 TraceCheckUtils]: 68: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:14,509 INFO L273 TraceCheckUtils]: 69: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:14,509 INFO L273 TraceCheckUtils]: 70: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:14,509 INFO L273 TraceCheckUtils]: 71: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:14,509 INFO L273 TraceCheckUtils]: 72: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:14,509 INFO L273 TraceCheckUtils]: 73: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:14,509 INFO L273 TraceCheckUtils]: 74: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:14,509 INFO L273 TraceCheckUtils]: 75: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 76: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 77: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 78: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 79: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 80: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 81: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 82: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:14,510 INFO L273 TraceCheckUtils]: 83: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 84: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 85: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 86: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 87: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 88: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 89: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 90: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:14,511 INFO L273 TraceCheckUtils]: 91: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:14,512 INFO L273 TraceCheckUtils]: 92: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:14,512 INFO L273 TraceCheckUtils]: 93: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:14,512 INFO L273 TraceCheckUtils]: 94: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:14,512 INFO L273 TraceCheckUtils]: 95: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:14,512 INFO L273 TraceCheckUtils]: 96: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:14,512 INFO L273 TraceCheckUtils]: 97: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:14,512 INFO L273 TraceCheckUtils]: 98: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 99: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 100: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 101: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 102: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 103: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 104: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 105: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:14,513 INFO L273 TraceCheckUtils]: 106: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:14,514 INFO L273 TraceCheckUtils]: 107: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:14,514 INFO L273 TraceCheckUtils]: 108: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:14,514 INFO L273 TraceCheckUtils]: 109: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:14,514 INFO L273 TraceCheckUtils]: 110: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:14,514 INFO L273 TraceCheckUtils]: 111: Hoare triple {4122#false} havoc ~x~0;~x~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:14,514 INFO L273 TraceCheckUtils]: 112: Hoare triple {4122#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4122#false} is VALID [2018-11-23 09:55:14,514 INFO L256 TraceCheckUtils]: 113: Hoare triple {4122#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {4122#false} is VALID [2018-11-23 09:55:14,515 INFO L273 TraceCheckUtils]: 114: Hoare triple {4122#false} ~cond := #in~cond; {4122#false} is VALID [2018-11-23 09:55:14,515 INFO L273 TraceCheckUtils]: 115: Hoare triple {4122#false} assume 0bv32 == ~cond; {4122#false} is VALID [2018-11-23 09:55:14,515 INFO L273 TraceCheckUtils]: 116: Hoare triple {4122#false} assume !false; {4122#false} is VALID [2018-11-23 09:55:14,522 INFO L134 CoverageAnalysis]: Checked inductivity of 580 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2018-11-23 09:55:14,522 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:16,576 INFO L273 TraceCheckUtils]: 116: Hoare triple {4122#false} assume !false; {4122#false} is VALID [2018-11-23 09:55:16,577 INFO L273 TraceCheckUtils]: 115: Hoare triple {4122#false} assume 0bv32 == ~cond; {4122#false} is VALID [2018-11-23 09:55:16,577 INFO L273 TraceCheckUtils]: 114: Hoare triple {4122#false} ~cond := #in~cond; {4122#false} is VALID [2018-11-23 09:55:16,578 INFO L256 TraceCheckUtils]: 113: Hoare triple {4122#false} call __VERIFIER_assert((if #t~mem16 == #t~mem17 then 1bv32 else 0bv32)); {4122#false} is VALID [2018-11-23 09:55:16,578 INFO L273 TraceCheckUtils]: 112: Hoare triple {4122#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem17 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4122#false} is VALID [2018-11-23 09:55:16,578 INFO L273 TraceCheckUtils]: 111: Hoare triple {4122#false} havoc ~x~0;~x~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:16,578 INFO L273 TraceCheckUtils]: 110: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:16,579 INFO L273 TraceCheckUtils]: 109: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:16,579 INFO L273 TraceCheckUtils]: 108: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:16,579 INFO L273 TraceCheckUtils]: 107: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:16,579 INFO L273 TraceCheckUtils]: 106: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:16,579 INFO L273 TraceCheckUtils]: 105: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:16,579 INFO L273 TraceCheckUtils]: 104: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:16,580 INFO L273 TraceCheckUtils]: 103: Hoare triple {4122#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4122#false} is VALID [2018-11-23 09:55:16,580 INFO L273 TraceCheckUtils]: 102: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4122#false} is VALID [2018-11-23 09:55:16,580 INFO L273 TraceCheckUtils]: 101: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:16,580 INFO L273 TraceCheckUtils]: 100: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:16,580 INFO L273 TraceCheckUtils]: 99: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:16,580 INFO L273 TraceCheckUtils]: 98: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:16,581 INFO L273 TraceCheckUtils]: 97: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:16,581 INFO L273 TraceCheckUtils]: 96: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:16,581 INFO L273 TraceCheckUtils]: 95: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:16,581 INFO L273 TraceCheckUtils]: 94: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:16,581 INFO L273 TraceCheckUtils]: 93: Hoare triple {4122#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4122#false} is VALID [2018-11-23 09:55:16,582 INFO L273 TraceCheckUtils]: 92: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4122#false} is VALID [2018-11-23 09:55:16,582 INFO L273 TraceCheckUtils]: 91: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:16,582 INFO L273 TraceCheckUtils]: 90: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:16,582 INFO L273 TraceCheckUtils]: 89: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:16,583 INFO L273 TraceCheckUtils]: 88: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:16,583 INFO L273 TraceCheckUtils]: 87: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:16,583 INFO L273 TraceCheckUtils]: 86: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:16,583 INFO L273 TraceCheckUtils]: 85: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:16,584 INFO L273 TraceCheckUtils]: 84: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:16,584 INFO L273 TraceCheckUtils]: 83: Hoare triple {4122#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4122#false} is VALID [2018-11-23 09:55:16,584 INFO L273 TraceCheckUtils]: 82: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4122#false} is VALID [2018-11-23 09:55:16,584 INFO L273 TraceCheckUtils]: 81: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:16,584 INFO L273 TraceCheckUtils]: 80: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:16,585 INFO L273 TraceCheckUtils]: 79: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:16,585 INFO L273 TraceCheckUtils]: 78: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:16,585 INFO L273 TraceCheckUtils]: 77: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:16,585 INFO L273 TraceCheckUtils]: 76: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:16,585 INFO L273 TraceCheckUtils]: 75: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:16,586 INFO L273 TraceCheckUtils]: 74: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:16,586 INFO L273 TraceCheckUtils]: 73: Hoare triple {4122#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4122#false} is VALID [2018-11-23 09:55:16,586 INFO L273 TraceCheckUtils]: 72: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4122#false} is VALID [2018-11-23 09:55:16,586 INFO L273 TraceCheckUtils]: 71: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:16,587 INFO L273 TraceCheckUtils]: 70: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:16,587 INFO L273 TraceCheckUtils]: 69: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:16,587 INFO L273 TraceCheckUtils]: 68: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:16,587 INFO L273 TraceCheckUtils]: 67: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:16,587 INFO L273 TraceCheckUtils]: 66: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:16,588 INFO L273 TraceCheckUtils]: 65: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:16,588 INFO L273 TraceCheckUtils]: 64: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:16,588 INFO L273 TraceCheckUtils]: 63: Hoare triple {4122#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4122#false} is VALID [2018-11-23 09:55:16,588 INFO L273 TraceCheckUtils]: 62: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4122#false} is VALID [2018-11-23 09:55:16,589 INFO L273 TraceCheckUtils]: 61: Hoare triple {4122#false} ~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:16,589 INFO L273 TraceCheckUtils]: 60: Hoare triple {4122#false} assume !~bvslt32(~i~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:16,589 INFO L273 TraceCheckUtils]: 59: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:16,589 INFO L273 TraceCheckUtils]: 58: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:16,590 INFO L273 TraceCheckUtils]: 57: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:16,590 INFO L273 TraceCheckUtils]: 56: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:16,590 INFO L273 TraceCheckUtils]: 55: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:16,590 INFO L273 TraceCheckUtils]: 54: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:16,590 INFO L273 TraceCheckUtils]: 53: Hoare triple {4122#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4122#false} is VALID [2018-11-23 09:55:16,591 INFO L273 TraceCheckUtils]: 52: Hoare triple {4122#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4122#false} is VALID [2018-11-23 09:55:16,591 INFO L273 TraceCheckUtils]: 51: Hoare triple {4122#false} havoc ~i~0;~i~0 := 0bv32; {4122#false} is VALID [2018-11-23 09:55:16,617 INFO L273 TraceCheckUtils]: 50: Hoare triple {4695#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {4122#false} is VALID [2018-11-23 09:55:16,619 INFO L273 TraceCheckUtils]: 49: Hoare triple {4699#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4695#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:16,620 INFO L273 TraceCheckUtils]: 48: Hoare triple {4699#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4699#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,624 INFO L273 TraceCheckUtils]: 47: Hoare triple {4706#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4699#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,625 INFO L273 TraceCheckUtils]: 46: Hoare triple {4706#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4706#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,631 INFO L273 TraceCheckUtils]: 45: Hoare triple {4713#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4706#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,631 INFO L273 TraceCheckUtils]: 44: Hoare triple {4713#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4713#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,636 INFO L273 TraceCheckUtils]: 43: Hoare triple {4720#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4713#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,636 INFO L273 TraceCheckUtils]: 42: Hoare triple {4720#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4720#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,641 INFO L273 TraceCheckUtils]: 41: Hoare triple {4727#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4720#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,641 INFO L273 TraceCheckUtils]: 40: Hoare triple {4727#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4727#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,647 INFO L273 TraceCheckUtils]: 39: Hoare triple {4734#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4727#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,648 INFO L273 TraceCheckUtils]: 38: Hoare triple {4734#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4734#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,654 INFO L273 TraceCheckUtils]: 37: Hoare triple {4741#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4734#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,655 INFO L273 TraceCheckUtils]: 36: Hoare triple {4741#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4741#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,662 INFO L273 TraceCheckUtils]: 35: Hoare triple {4748#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4741#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,662 INFO L273 TraceCheckUtils]: 34: Hoare triple {4748#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4748#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,666 INFO L273 TraceCheckUtils]: 33: Hoare triple {4755#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4748#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,667 INFO L273 TraceCheckUtils]: 32: Hoare triple {4755#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4755#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,674 INFO L273 TraceCheckUtils]: 31: Hoare triple {4762#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4755#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,674 INFO L273 TraceCheckUtils]: 30: Hoare triple {4762#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4762#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,681 INFO L273 TraceCheckUtils]: 29: Hoare triple {4769#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4762#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,682 INFO L273 TraceCheckUtils]: 28: Hoare triple {4769#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4769#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,689 INFO L273 TraceCheckUtils]: 27: Hoare triple {4776#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4769#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,689 INFO L273 TraceCheckUtils]: 26: Hoare triple {4776#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4776#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,694 INFO L273 TraceCheckUtils]: 25: Hoare triple {4783#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4776#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,695 INFO L273 TraceCheckUtils]: 24: Hoare triple {4783#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4783#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,701 INFO L273 TraceCheckUtils]: 23: Hoare triple {4790#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4783#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,701 INFO L273 TraceCheckUtils]: 22: Hoare triple {4790#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4790#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,707 INFO L273 TraceCheckUtils]: 21: Hoare triple {4797#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4790#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,708 INFO L273 TraceCheckUtils]: 20: Hoare triple {4797#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4797#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,714 INFO L273 TraceCheckUtils]: 19: Hoare triple {4804#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4797#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,714 INFO L273 TraceCheckUtils]: 18: Hoare triple {4804#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4804#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,718 INFO L273 TraceCheckUtils]: 17: Hoare triple {4811#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4804#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,719 INFO L273 TraceCheckUtils]: 16: Hoare triple {4811#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4811#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,726 INFO L273 TraceCheckUtils]: 15: Hoare triple {4818#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4811#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,727 INFO L273 TraceCheckUtils]: 14: Hoare triple {4818#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4818#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,733 INFO L273 TraceCheckUtils]: 13: Hoare triple {4825#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4818#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,733 INFO L273 TraceCheckUtils]: 12: Hoare triple {4825#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4825#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,740 INFO L273 TraceCheckUtils]: 11: Hoare triple {4832#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4825#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,740 INFO L273 TraceCheckUtils]: 10: Hoare triple {4832#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4832#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,746 INFO L273 TraceCheckUtils]: 9: Hoare triple {4839#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4832#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,747 INFO L273 TraceCheckUtils]: 8: Hoare triple {4839#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4839#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,753 INFO L273 TraceCheckUtils]: 7: Hoare triple {4846#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4839#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,754 INFO L273 TraceCheckUtils]: 6: Hoare triple {4846#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4846#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,755 INFO L273 TraceCheckUtils]: 5: Hoare triple {4121#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {4846#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:16,756 INFO L256 TraceCheckUtils]: 4: Hoare triple {4121#true} call #t~ret18 := main(); {4121#true} is VALID [2018-11-23 09:55:16,756 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4121#true} {4121#true} #133#return; {4121#true} is VALID [2018-11-23 09:55:16,756 INFO L273 TraceCheckUtils]: 2: Hoare triple {4121#true} assume true; {4121#true} is VALID [2018-11-23 09:55:16,756 INFO L273 TraceCheckUtils]: 1: Hoare triple {4121#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4121#true} is VALID [2018-11-23 09:55:16,757 INFO L256 TraceCheckUtils]: 0: Hoare triple {4121#true} call ULTIMATE.init(); {4121#true} is VALID [2018-11-23 09:55:16,786 INFO L134 CoverageAnalysis]: Checked inductivity of 580 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2018-11-23 09:55:16,792 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:16,793 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-11-23 09:55:16,793 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 117 [2018-11-23 09:55:16,794 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:16,794 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states. [2018-11-23 09:55:17,123 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:17,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-23 09:55:17,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-23 09:55:17,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 09:55:17,124 INFO L87 Difference]: Start difference. First operand 122 states and 129 transitions. Second operand 48 states. [2018-11-23 09:55:25,235 WARN L180 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 7 [2018-11-23 09:55:25,710 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 7 [2018-11-23 09:55:26,216 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 7 [2018-11-23 09:55:26,744 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 7 [2018-11-23 09:55:27,300 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 7 [2018-11-23 09:55:27,904 WARN L180 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 7 [2018-11-23 09:55:29,085 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 7 [2018-11-23 09:55:37,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:37,053 INFO L93 Difference]: Finished difference Result 241 states and 278 transitions. [2018-11-23 09:55:37,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-23 09:55:37,053 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 117 [2018-11-23 09:55:37,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:37,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 09:55:37,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 194 transitions. [2018-11-23 09:55:37,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 09:55:37,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 194 transitions. [2018-11-23 09:55:37,063 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states and 194 transitions. [2018-11-23 09:55:37,529 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 194 edges. 194 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:37,534 INFO L225 Difference]: With dead ends: 241 [2018-11-23 09:55:37,534 INFO L226 Difference]: Without dead ends: 170 [2018-11-23 09:55:37,537 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 187 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 12.1s TimeCoverageRelationStatistics Valid=1678, Invalid=3152, Unknown=0, NotChecked=0, Total=4830 [2018-11-23 09:55:37,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-11-23 09:55:37,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2018-11-23 09:55:37,647 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:37,647 INFO L82 GeneralOperation]: Start isEquivalent. First operand 170 states. Second operand 170 states. [2018-11-23 09:55:37,648 INFO L74 IsIncluded]: Start isIncluded. First operand 170 states. Second operand 170 states. [2018-11-23 09:55:37,648 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 170 states. [2018-11-23 09:55:37,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:37,654 INFO L93 Difference]: Finished difference Result 170 states and 177 transitions. [2018-11-23 09:55:37,655 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 177 transitions. [2018-11-23 09:55:37,655 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:37,655 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:37,656 INFO L74 IsIncluded]: Start isIncluded. First operand 170 states. Second operand 170 states. [2018-11-23 09:55:37,656 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 170 states. [2018-11-23 09:55:37,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:37,661 INFO L93 Difference]: Finished difference Result 170 states and 177 transitions. [2018-11-23 09:55:37,662 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 177 transitions. [2018-11-23 09:55:37,662 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:37,662 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:37,663 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:37,663 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:37,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-11-23 09:55:37,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 177 transitions. [2018-11-23 09:55:37,669 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 177 transitions. Word has length 117 [2018-11-23 09:55:37,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:37,669 INFO L480 AbstractCegarLoop]: Abstraction has 170 states and 177 transitions. [2018-11-23 09:55:37,669 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-23 09:55:37,670 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 177 transitions. [2018-11-23 09:55:37,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2018-11-23 09:55:37,672 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:37,672 INFO L402 BasicCegarLoop]: trace histogram [46, 46, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:37,673 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:37,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:37,673 INFO L82 PathProgramCache]: Analyzing trace with hash -492513506, now seen corresponding path program 5 times [2018-11-23 09:55:37,674 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:37,674 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:37,701 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1