java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-examples/standard_copy7_false-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 09:54:54,911 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 09:54:54,913 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 09:54:54,926 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 09:54:54,926 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 09:54:54,928 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 09:54:54,929 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 09:54:54,931 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 09:54:54,933 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 09:54:54,934 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 09:54:54,935 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 09:54:54,936 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 09:54:54,937 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 09:54:54,938 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 09:54:54,939 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 09:54:54,941 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 09:54:54,943 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 09:54:54,946 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 09:54:54,950 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 09:54:54,951 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 09:54:54,954 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 09:54:54,956 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 09:54:54,959 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 09:54:54,960 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 09:54:54,960 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 09:54:54,961 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 09:54:54,962 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 09:54:54,962 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 09:54:54,966 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 09:54:54,967 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 09:54:54,967 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 09:54:54,969 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 09:54:54,970 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 09:54:54,970 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 09:54:54,972 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 09:54:54,973 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 09:54:54,973 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 09:54:55,000 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 09:54:55,000 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 09:54:55,002 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 09:54:55,002 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 09:54:55,003 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 09:54:55,006 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 09:54:55,006 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 09:54:55,006 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 09:54:55,007 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 09:54:55,007 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 09:54:55,007 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 09:54:55,007 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 09:54:55,007 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 09:54:55,007 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 09:54:55,008 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 09:54:55,008 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 09:54:55,008 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 09:54:55,008 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 09:54:55,008 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 09:54:55,009 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 09:54:55,009 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 09:54:55,009 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 09:54:55,009 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 09:54:55,010 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 09:54:55,010 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 09:54:55,010 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 09:54:55,010 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 09:54:55,010 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 09:54:55,010 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 09:54:55,011 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 09:54:55,011 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 09:54:55,011 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 09:54:55,011 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 09:54:55,058 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 09:54:55,074 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 09:54:55,078 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 09:54:55,079 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 09:54:55,080 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 09:54:55,081 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_copy7_false-unreach-call_ground.i [2018-11-23 09:54:55,141 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4eb5e7ad5/ddbe5b166fbb49fb94bee875168c015f/FLAG6c103ac05 [2018-11-23 09:54:55,563 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 09:54:55,564 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-examples/standard_copy7_false-unreach-call_ground.i [2018-11-23 09:54:55,570 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4eb5e7ad5/ddbe5b166fbb49fb94bee875168c015f/FLAG6c103ac05 [2018-11-23 09:54:55,943 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4eb5e7ad5/ddbe5b166fbb49fb94bee875168c015f [2018-11-23 09:54:55,953 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 09:54:55,954 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 09:54:55,955 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 09:54:55,956 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 09:54:55,959 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 09:54:55,961 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:54:55" (1/1) ... [2018-11-23 09:54:55,964 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6bc74a0e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:55, skipping insertion in model container [2018-11-23 09:54:55,964 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:54:55" (1/1) ... [2018-11-23 09:54:55,975 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 09:54:56,005 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 09:54:56,296 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:54:56,301 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 09:54:56,352 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:54:56,383 INFO L195 MainTranslator]: Completed translation [2018-11-23 09:54:56,383 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56 WrapperNode [2018-11-23 09:54:56,384 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 09:54:56,385 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 09:54:56,385 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 09:54:56,385 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 09:54:56,395 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,407 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,414 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 09:54:56,415 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 09:54:56,415 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 09:54:56,415 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 09:54:56,424 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,424 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,428 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,429 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,450 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,460 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,463 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,467 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 09:54:56,467 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 09:54:56,468 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 09:54:56,468 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 09:54:56,469 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 09:54:56,595 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 09:54:56,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 09:54:56,595 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 09:54:56,595 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 09:54:56,595 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 09:54:56,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 09:54:56,596 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 09:54:56,596 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 09:54:56,596 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 09:54:56,596 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 09:54:56,596 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 09:54:56,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 09:54:57,689 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 09:54:57,689 INFO L280 CfgBuilder]: Removed 9 assue(true) statements. [2018-11-23 09:54:57,690 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:54:57 BoogieIcfgContainer [2018-11-23 09:54:57,690 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 09:54:57,691 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 09:54:57,691 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 09:54:57,695 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 09:54:57,695 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 09:54:55" (1/3) ... [2018-11-23 09:54:57,696 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a01c3e4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 09:54:57, skipping insertion in model container [2018-11-23 09:54:57,697 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (2/3) ... [2018-11-23 09:54:57,697 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a01c3e4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 09:54:57, skipping insertion in model container [2018-11-23 09:54:57,697 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:54:57" (3/3) ... [2018-11-23 09:54:57,699 INFO L112 eAbstractionObserver]: Analyzing ICFG standard_copy7_false-unreach-call_ground.i [2018-11-23 09:54:57,708 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 09:54:57,716 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 09:54:57,735 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 09:54:57,777 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 09:54:57,778 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 09:54:57,778 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 09:54:57,778 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 09:54:57,779 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 09:54:57,779 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 09:54:57,779 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 09:54:57,779 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 09:54:57,780 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 09:54:57,798 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states. [2018-11-23 09:54:57,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 09:54:57,805 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:54:57,806 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:54:57,808 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:54:57,814 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:54:57,814 INFO L82 PathProgramCache]: Analyzing trace with hash -2029657296, now seen corresponding path program 1 times [2018-11-23 09:54:57,818 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:54:57,819 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:54:57,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:54:57,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:57,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:57,921 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:54:58,205 INFO L256 TraceCheckUtils]: 0: Hoare triple {48#true} call ULTIMATE.init(); {48#true} is VALID [2018-11-23 09:54:58,208 INFO L273 TraceCheckUtils]: 1: Hoare triple {48#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {48#true} is VALID [2018-11-23 09:54:58,209 INFO L273 TraceCheckUtils]: 2: Hoare triple {48#true} assume true; {48#true} is VALID [2018-11-23 09:54:58,209 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {48#true} {48#true} #147#return; {48#true} is VALID [2018-11-23 09:54:58,210 INFO L256 TraceCheckUtils]: 4: Hoare triple {48#true} call #t~ret20 := main(); {48#true} is VALID [2018-11-23 09:54:58,210 INFO L273 TraceCheckUtils]: 5: Hoare triple {48#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {48#true} is VALID [2018-11-23 09:54:58,213 INFO L273 TraceCheckUtils]: 6: Hoare triple {48#true} assume !true; {49#false} is VALID [2018-11-23 09:54:58,214 INFO L273 TraceCheckUtils]: 7: Hoare triple {49#false} havoc ~i~0;~i~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,214 INFO L273 TraceCheckUtils]: 8: Hoare triple {49#false} assume !~bvslt32(~i~0, 100000bv32); {49#false} is VALID [2018-11-23 09:54:58,214 INFO L273 TraceCheckUtils]: 9: Hoare triple {49#false} ~i~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,215 INFO L273 TraceCheckUtils]: 10: Hoare triple {49#false} assume !~bvslt32(~i~0, 100000bv32); {49#false} is VALID [2018-11-23 09:54:58,215 INFO L273 TraceCheckUtils]: 11: Hoare triple {49#false} ~i~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,215 INFO L273 TraceCheckUtils]: 12: Hoare triple {49#false} assume !~bvslt32(~i~0, 100000bv32); {49#false} is VALID [2018-11-23 09:54:58,215 INFO L273 TraceCheckUtils]: 13: Hoare triple {49#false} ~i~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,216 INFO L273 TraceCheckUtils]: 14: Hoare triple {49#false} assume !~bvslt32(~i~0, 100000bv32); {49#false} is VALID [2018-11-23 09:54:58,216 INFO L273 TraceCheckUtils]: 15: Hoare triple {49#false} ~i~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,216 INFO L273 TraceCheckUtils]: 16: Hoare triple {49#false} assume !~bvslt32(~i~0, 100000bv32); {49#false} is VALID [2018-11-23 09:54:58,217 INFO L273 TraceCheckUtils]: 17: Hoare triple {49#false} ~i~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,217 INFO L273 TraceCheckUtils]: 18: Hoare triple {49#false} assume !true; {49#false} is VALID [2018-11-23 09:54:58,218 INFO L273 TraceCheckUtils]: 19: Hoare triple {49#false} ~i~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,218 INFO L273 TraceCheckUtils]: 20: Hoare triple {49#false} assume !true; {49#false} is VALID [2018-11-23 09:54:58,218 INFO L273 TraceCheckUtils]: 21: Hoare triple {49#false} havoc ~x~0;~x~0 := 0bv32; {49#false} is VALID [2018-11-23 09:54:58,219 INFO L273 TraceCheckUtils]: 22: Hoare triple {49#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {49#false} is VALID [2018-11-23 09:54:58,219 INFO L256 TraceCheckUtils]: 23: Hoare triple {49#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {49#false} is VALID [2018-11-23 09:54:58,220 INFO L273 TraceCheckUtils]: 24: Hoare triple {49#false} ~cond := #in~cond; {49#false} is VALID [2018-11-23 09:54:58,220 INFO L273 TraceCheckUtils]: 25: Hoare triple {49#false} assume 0bv32 == ~cond; {49#false} is VALID [2018-11-23 09:54:58,220 INFO L273 TraceCheckUtils]: 26: Hoare triple {49#false} assume !false; {49#false} is VALID [2018-11-23 09:54:58,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:54:58,226 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:54:58,233 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:54:58,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 09:54:58,243 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 27 [2018-11-23 09:54:58,247 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:54:58,253 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 09:54:58,336 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:58,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 09:54:58,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 09:54:58,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 09:54:58,348 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 2 states. [2018-11-23 09:54:58,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:58,560 INFO L93 Difference]: Finished difference Result 82 states and 117 transitions. [2018-11-23 09:54:58,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 09:54:58,561 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 27 [2018-11-23 09:54:58,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:54:58,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 09:54:58,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 117 transitions. [2018-11-23 09:54:58,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 09:54:58,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 117 transitions. [2018-11-23 09:54:58,584 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 117 transitions. [2018-11-23 09:54:59,408 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 117 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:59,421 INFO L225 Difference]: With dead ends: 82 [2018-11-23 09:54:59,421 INFO L226 Difference]: Without dead ends: 40 [2018-11-23 09:54:59,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 09:54:59,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-23 09:54:59,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-11-23 09:54:59,528 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:54:59,528 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 40 states. [2018-11-23 09:54:59,529 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-23 09:54:59,529 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-23 09:54:59,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:59,534 INFO L93 Difference]: Finished difference Result 40 states and 48 transitions. [2018-11-23 09:54:59,534 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 48 transitions. [2018-11-23 09:54:59,535 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:54:59,535 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:54:59,536 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-23 09:54:59,536 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-23 09:54:59,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:59,541 INFO L93 Difference]: Finished difference Result 40 states and 48 transitions. [2018-11-23 09:54:59,541 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 48 transitions. [2018-11-23 09:54:59,542 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:54:59,542 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:54:59,542 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:54:59,543 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:54:59,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-11-23 09:54:59,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 48 transitions. [2018-11-23 09:54:59,548 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 48 transitions. Word has length 27 [2018-11-23 09:54:59,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:54:59,549 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 48 transitions. [2018-11-23 09:54:59,549 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 09:54:59,549 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 48 transitions. [2018-11-23 09:54:59,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 09:54:59,550 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:54:59,550 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:54:59,551 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:54:59,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:54:59,551 INFO L82 PathProgramCache]: Analyzing trace with hash -2073025378, now seen corresponding path program 1 times [2018-11-23 09:54:59,552 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:54:59,552 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:54:59,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:54:59,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:59,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:59,665 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:54:59,771 INFO L256 TraceCheckUtils]: 0: Hoare triple {372#true} call ULTIMATE.init(); {372#true} is VALID [2018-11-23 09:54:59,772 INFO L273 TraceCheckUtils]: 1: Hoare triple {372#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {372#true} is VALID [2018-11-23 09:54:59,772 INFO L273 TraceCheckUtils]: 2: Hoare triple {372#true} assume true; {372#true} is VALID [2018-11-23 09:54:59,772 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {372#true} {372#true} #147#return; {372#true} is VALID [2018-11-23 09:54:59,773 INFO L256 TraceCheckUtils]: 4: Hoare triple {372#true} call #t~ret20 := main(); {372#true} is VALID [2018-11-23 09:54:59,785 INFO L273 TraceCheckUtils]: 5: Hoare triple {372#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {392#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:54:59,789 INFO L273 TraceCheckUtils]: 6: Hoare triple {392#(= main_~a~0 (_ bv0 32))} assume !~bvslt32(~a~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,789 INFO L273 TraceCheckUtils]: 7: Hoare triple {373#false} havoc ~i~0;~i~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,790 INFO L273 TraceCheckUtils]: 8: Hoare triple {373#false} assume !~bvslt32(~i~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,790 INFO L273 TraceCheckUtils]: 9: Hoare triple {373#false} ~i~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,790 INFO L273 TraceCheckUtils]: 10: Hoare triple {373#false} assume !~bvslt32(~i~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,790 INFO L273 TraceCheckUtils]: 11: Hoare triple {373#false} ~i~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,791 INFO L273 TraceCheckUtils]: 12: Hoare triple {373#false} assume !~bvslt32(~i~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,791 INFO L273 TraceCheckUtils]: 13: Hoare triple {373#false} ~i~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,791 INFO L273 TraceCheckUtils]: 14: Hoare triple {373#false} assume !~bvslt32(~i~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,792 INFO L273 TraceCheckUtils]: 15: Hoare triple {373#false} ~i~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,792 INFO L273 TraceCheckUtils]: 16: Hoare triple {373#false} assume !~bvslt32(~i~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,792 INFO L273 TraceCheckUtils]: 17: Hoare triple {373#false} ~i~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,793 INFO L273 TraceCheckUtils]: 18: Hoare triple {373#false} assume !~bvslt32(~i~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,793 INFO L273 TraceCheckUtils]: 19: Hoare triple {373#false} ~i~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,793 INFO L273 TraceCheckUtils]: 20: Hoare triple {373#false} assume !~bvslt32(~i~0, 100000bv32); {373#false} is VALID [2018-11-23 09:54:59,793 INFO L273 TraceCheckUtils]: 21: Hoare triple {373#false} havoc ~x~0;~x~0 := 0bv32; {373#false} is VALID [2018-11-23 09:54:59,794 INFO L273 TraceCheckUtils]: 22: Hoare triple {373#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {373#false} is VALID [2018-11-23 09:54:59,794 INFO L256 TraceCheckUtils]: 23: Hoare triple {373#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {373#false} is VALID [2018-11-23 09:54:59,794 INFO L273 TraceCheckUtils]: 24: Hoare triple {373#false} ~cond := #in~cond; {373#false} is VALID [2018-11-23 09:54:59,795 INFO L273 TraceCheckUtils]: 25: Hoare triple {373#false} assume 0bv32 == ~cond; {373#false} is VALID [2018-11-23 09:54:59,795 INFO L273 TraceCheckUtils]: 26: Hoare triple {373#false} assume !false; {373#false} is VALID [2018-11-23 09:54:59,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:54:59,797 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:54:59,800 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:54:59,800 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 09:54:59,802 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2018-11-23 09:54:59,802 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:54:59,803 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 09:54:59,883 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:59,883 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 09:54:59,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 09:54:59,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:54:59,884 INFO L87 Difference]: Start difference. First operand 40 states and 48 transitions. Second operand 3 states. [2018-11-23 09:55:00,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,183 INFO L93 Difference]: Finished difference Result 74 states and 90 transitions. [2018-11-23 09:55:00,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 09:55:00,183 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2018-11-23 09:55:00,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:00,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:00,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 90 transitions. [2018-11-23 09:55:00,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:00,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 90 transitions. [2018-11-23 09:55:00,192 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 90 transitions. [2018-11-23 09:55:00,539 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:00,543 INFO L225 Difference]: With dead ends: 74 [2018-11-23 09:55:00,543 INFO L226 Difference]: Without dead ends: 42 [2018-11-23 09:55:00,545 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:00,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-11-23 09:55:00,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2018-11-23 09:55:00,584 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:00,585 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand 41 states. [2018-11-23 09:55:00,585 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand 41 states. [2018-11-23 09:55:00,585 INFO L87 Difference]: Start difference. First operand 42 states. Second operand 41 states. [2018-11-23 09:55:00,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,588 INFO L93 Difference]: Finished difference Result 42 states and 50 transitions. [2018-11-23 09:55:00,588 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 50 transitions. [2018-11-23 09:55:00,589 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:00,589 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:00,589 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 42 states. [2018-11-23 09:55:00,589 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 42 states. [2018-11-23 09:55:00,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,593 INFO L93 Difference]: Finished difference Result 42 states and 50 transitions. [2018-11-23 09:55:00,593 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 50 transitions. [2018-11-23 09:55:00,594 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:00,594 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:00,594 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:00,594 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:00,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-23 09:55:00,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 49 transitions. [2018-11-23 09:55:00,597 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 49 transitions. Word has length 27 [2018-11-23 09:55:00,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:00,598 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 49 transitions. [2018-11-23 09:55:00,598 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 09:55:00,598 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 49 transitions. [2018-11-23 09:55:00,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 09:55:00,599 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:00,599 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:00,600 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:00,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:00,600 INFO L82 PathProgramCache]: Analyzing trace with hash -55785284, now seen corresponding path program 1 times [2018-11-23 09:55:00,601 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:00,601 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:00,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:55:00,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:00,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:00,681 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:00,751 INFO L256 TraceCheckUtils]: 0: Hoare triple {696#true} call ULTIMATE.init(); {696#true} is VALID [2018-11-23 09:55:00,751 INFO L273 TraceCheckUtils]: 1: Hoare triple {696#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {696#true} is VALID [2018-11-23 09:55:00,752 INFO L273 TraceCheckUtils]: 2: Hoare triple {696#true} assume true; {696#true} is VALID [2018-11-23 09:55:00,752 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {696#true} {696#true} #147#return; {696#true} is VALID [2018-11-23 09:55:00,752 INFO L256 TraceCheckUtils]: 4: Hoare triple {696#true} call #t~ret20 := main(); {696#true} is VALID [2018-11-23 09:55:00,758 INFO L273 TraceCheckUtils]: 5: Hoare triple {696#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {716#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:00,762 INFO L273 TraceCheckUtils]: 6: Hoare triple {716#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {716#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:00,763 INFO L273 TraceCheckUtils]: 7: Hoare triple {716#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {723#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:00,766 INFO L273 TraceCheckUtils]: 8: Hoare triple {723#(= (_ bv1 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,766 INFO L273 TraceCheckUtils]: 9: Hoare triple {697#false} havoc ~i~0;~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,766 INFO L273 TraceCheckUtils]: 10: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,767 INFO L273 TraceCheckUtils]: 11: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,767 INFO L273 TraceCheckUtils]: 12: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,767 INFO L273 TraceCheckUtils]: 13: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,768 INFO L273 TraceCheckUtils]: 14: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,768 INFO L273 TraceCheckUtils]: 15: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,768 INFO L273 TraceCheckUtils]: 16: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,768 INFO L273 TraceCheckUtils]: 17: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,769 INFO L273 TraceCheckUtils]: 18: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,769 INFO L273 TraceCheckUtils]: 19: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,769 INFO L273 TraceCheckUtils]: 20: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,770 INFO L273 TraceCheckUtils]: 21: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,770 INFO L273 TraceCheckUtils]: 22: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:00,770 INFO L273 TraceCheckUtils]: 23: Hoare triple {697#false} havoc ~x~0;~x~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:00,770 INFO L273 TraceCheckUtils]: 24: Hoare triple {697#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {697#false} is VALID [2018-11-23 09:55:00,771 INFO L256 TraceCheckUtils]: 25: Hoare triple {697#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {697#false} is VALID [2018-11-23 09:55:00,771 INFO L273 TraceCheckUtils]: 26: Hoare triple {697#false} ~cond := #in~cond; {697#false} is VALID [2018-11-23 09:55:00,771 INFO L273 TraceCheckUtils]: 27: Hoare triple {697#false} assume 0bv32 == ~cond; {697#false} is VALID [2018-11-23 09:55:00,772 INFO L273 TraceCheckUtils]: 28: Hoare triple {697#false} assume !false; {697#false} is VALID [2018-11-23 09:55:00,774 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:55:00,775 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:01,089 INFO L273 TraceCheckUtils]: 28: Hoare triple {697#false} assume !false; {697#false} is VALID [2018-11-23 09:55:01,089 INFO L273 TraceCheckUtils]: 27: Hoare triple {697#false} assume 0bv32 == ~cond; {697#false} is VALID [2018-11-23 09:55:01,090 INFO L273 TraceCheckUtils]: 26: Hoare triple {697#false} ~cond := #in~cond; {697#false} is VALID [2018-11-23 09:55:01,090 INFO L256 TraceCheckUtils]: 25: Hoare triple {697#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {697#false} is VALID [2018-11-23 09:55:01,090 INFO L273 TraceCheckUtils]: 24: Hoare triple {697#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {697#false} is VALID [2018-11-23 09:55:01,091 INFO L273 TraceCheckUtils]: 23: Hoare triple {697#false} havoc ~x~0;~x~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,091 INFO L273 TraceCheckUtils]: 22: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,091 INFO L273 TraceCheckUtils]: 21: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,092 INFO L273 TraceCheckUtils]: 20: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,092 INFO L273 TraceCheckUtils]: 19: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,092 INFO L273 TraceCheckUtils]: 18: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,093 INFO L273 TraceCheckUtils]: 17: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,093 INFO L273 TraceCheckUtils]: 16: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,093 INFO L273 TraceCheckUtils]: 15: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,094 INFO L273 TraceCheckUtils]: 14: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,094 INFO L273 TraceCheckUtils]: 13: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,094 INFO L273 TraceCheckUtils]: 12: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,094 INFO L273 TraceCheckUtils]: 11: Hoare triple {697#false} ~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,095 INFO L273 TraceCheckUtils]: 10: Hoare triple {697#false} assume !~bvslt32(~i~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,095 INFO L273 TraceCheckUtils]: 9: Hoare triple {697#false} havoc ~i~0;~i~0 := 0bv32; {697#false} is VALID [2018-11-23 09:55:01,108 INFO L273 TraceCheckUtils]: 8: Hoare triple {847#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {697#false} is VALID [2018-11-23 09:55:01,121 INFO L273 TraceCheckUtils]: 7: Hoare triple {851#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {847#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:01,134 INFO L273 TraceCheckUtils]: 6: Hoare triple {851#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {851#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:01,153 INFO L273 TraceCheckUtils]: 5: Hoare triple {696#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {851#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:01,153 INFO L256 TraceCheckUtils]: 4: Hoare triple {696#true} call #t~ret20 := main(); {696#true} is VALID [2018-11-23 09:55:01,154 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {696#true} {696#true} #147#return; {696#true} is VALID [2018-11-23 09:55:01,154 INFO L273 TraceCheckUtils]: 2: Hoare triple {696#true} assume true; {696#true} is VALID [2018-11-23 09:55:01,154 INFO L273 TraceCheckUtils]: 1: Hoare triple {696#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {696#true} is VALID [2018-11-23 09:55:01,155 INFO L256 TraceCheckUtils]: 0: Hoare triple {696#true} call ULTIMATE.init(); {696#true} is VALID [2018-11-23 09:55:01,157 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:55:01,161 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:01,162 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 09:55:01,162 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2018-11-23 09:55:01,163 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:01,163 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 09:55:01,289 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:01,289 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 09:55:01,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 09:55:01,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 09:55:01,290 INFO L87 Difference]: Start difference. First operand 41 states and 49 transitions. Second operand 6 states. [2018-11-23 09:55:01,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:01,844 INFO L93 Difference]: Finished difference Result 79 states and 97 transitions. [2018-11-23 09:55:01,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 09:55:01,844 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2018-11-23 09:55:01,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:01,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:01,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 97 transitions. [2018-11-23 09:55:01,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:01,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 97 transitions. [2018-11-23 09:55:01,851 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 97 transitions. [2018-11-23 09:55:02,046 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 97 edges. 97 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:02,049 INFO L225 Difference]: With dead ends: 79 [2018-11-23 09:55:02,050 INFO L226 Difference]: Without dead ends: 47 [2018-11-23 09:55:02,050 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 09:55:02,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-23 09:55:02,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-11-23 09:55:02,079 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:02,080 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand 47 states. [2018-11-23 09:55:02,080 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 47 states. [2018-11-23 09:55:02,080 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 47 states. [2018-11-23 09:55:02,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,083 INFO L93 Difference]: Finished difference Result 47 states and 55 transitions. [2018-11-23 09:55:02,083 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 55 transitions. [2018-11-23 09:55:02,084 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,084 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,084 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 47 states. [2018-11-23 09:55:02,085 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 47 states. [2018-11-23 09:55:02,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,088 INFO L93 Difference]: Finished difference Result 47 states and 55 transitions. [2018-11-23 09:55:02,088 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 55 transitions. [2018-11-23 09:55:02,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,089 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,089 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:02,089 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:02,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-11-23 09:55:02,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 55 transitions. [2018-11-23 09:55:02,092 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 55 transitions. Word has length 29 [2018-11-23 09:55:02,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:02,092 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 55 transitions. [2018-11-23 09:55:02,092 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 09:55:02,092 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 55 transitions. [2018-11-23 09:55:02,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-23 09:55:02,094 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:02,094 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:02,094 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:02,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:02,095 INFO L82 PathProgramCache]: Analyzing trace with hash 1735317526, now seen corresponding path program 2 times [2018-11-23 09:55:02,095 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:02,095 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:02,127 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 09:55:02,172 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 09:55:02,172 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:02,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:02,192 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:02,263 INFO L256 TraceCheckUtils]: 0: Hoare triple {1145#true} call ULTIMATE.init(); {1145#true} is VALID [2018-11-23 09:55:02,263 INFO L273 TraceCheckUtils]: 1: Hoare triple {1145#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1145#true} is VALID [2018-11-23 09:55:02,263 INFO L273 TraceCheckUtils]: 2: Hoare triple {1145#true} assume true; {1145#true} is VALID [2018-11-23 09:55:02,264 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1145#true} {1145#true} #147#return; {1145#true} is VALID [2018-11-23 09:55:02,264 INFO L256 TraceCheckUtils]: 4: Hoare triple {1145#true} call #t~ret20 := main(); {1145#true} is VALID [2018-11-23 09:55:02,264 INFO L273 TraceCheckUtils]: 5: Hoare triple {1145#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1145#true} is VALID [2018-11-23 09:55:02,264 INFO L273 TraceCheckUtils]: 6: Hoare triple {1145#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1145#true} is VALID [2018-11-23 09:55:02,265 INFO L273 TraceCheckUtils]: 7: Hoare triple {1145#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1145#true} is VALID [2018-11-23 09:55:02,265 INFO L273 TraceCheckUtils]: 8: Hoare triple {1145#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1145#true} is VALID [2018-11-23 09:55:02,265 INFO L273 TraceCheckUtils]: 9: Hoare triple {1145#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1145#true} is VALID [2018-11-23 09:55:02,265 INFO L273 TraceCheckUtils]: 10: Hoare triple {1145#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1145#true} is VALID [2018-11-23 09:55:02,266 INFO L273 TraceCheckUtils]: 11: Hoare triple {1145#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1145#true} is VALID [2018-11-23 09:55:02,266 INFO L273 TraceCheckUtils]: 12: Hoare triple {1145#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1145#true} is VALID [2018-11-23 09:55:02,266 INFO L273 TraceCheckUtils]: 13: Hoare triple {1145#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1145#true} is VALID [2018-11-23 09:55:02,267 INFO L273 TraceCheckUtils]: 14: Hoare triple {1145#true} assume !~bvslt32(~a~0, 100000bv32); {1145#true} is VALID [2018-11-23 09:55:02,279 INFO L273 TraceCheckUtils]: 15: Hoare triple {1145#true} havoc ~i~0;~i~0 := 0bv32; {1195#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:02,283 INFO L273 TraceCheckUtils]: 16: Hoare triple {1195#(= main_~i~0 (_ bv0 32))} assume !~bvslt32(~i~0, 100000bv32); {1146#false} is VALID [2018-11-23 09:55:02,283 INFO L273 TraceCheckUtils]: 17: Hoare triple {1146#false} ~i~0 := 0bv32; {1146#false} is VALID [2018-11-23 09:55:02,283 INFO L273 TraceCheckUtils]: 18: Hoare triple {1146#false} assume !~bvslt32(~i~0, 100000bv32); {1146#false} is VALID [2018-11-23 09:55:02,284 INFO L273 TraceCheckUtils]: 19: Hoare triple {1146#false} ~i~0 := 0bv32; {1146#false} is VALID [2018-11-23 09:55:02,284 INFO L273 TraceCheckUtils]: 20: Hoare triple {1146#false} assume !~bvslt32(~i~0, 100000bv32); {1146#false} is VALID [2018-11-23 09:55:02,284 INFO L273 TraceCheckUtils]: 21: Hoare triple {1146#false} ~i~0 := 0bv32; {1146#false} is VALID [2018-11-23 09:55:02,284 INFO L273 TraceCheckUtils]: 22: Hoare triple {1146#false} assume !~bvslt32(~i~0, 100000bv32); {1146#false} is VALID [2018-11-23 09:55:02,284 INFO L273 TraceCheckUtils]: 23: Hoare triple {1146#false} ~i~0 := 0bv32; {1146#false} is VALID [2018-11-23 09:55:02,285 INFO L273 TraceCheckUtils]: 24: Hoare triple {1146#false} assume !~bvslt32(~i~0, 100000bv32); {1146#false} is VALID [2018-11-23 09:55:02,285 INFO L273 TraceCheckUtils]: 25: Hoare triple {1146#false} ~i~0 := 0bv32; {1146#false} is VALID [2018-11-23 09:55:02,285 INFO L273 TraceCheckUtils]: 26: Hoare triple {1146#false} assume !~bvslt32(~i~0, 100000bv32); {1146#false} is VALID [2018-11-23 09:55:02,285 INFO L273 TraceCheckUtils]: 27: Hoare triple {1146#false} ~i~0 := 0bv32; {1146#false} is VALID [2018-11-23 09:55:02,285 INFO L273 TraceCheckUtils]: 28: Hoare triple {1146#false} assume !~bvslt32(~i~0, 100000bv32); {1146#false} is VALID [2018-11-23 09:55:02,286 INFO L273 TraceCheckUtils]: 29: Hoare triple {1146#false} havoc ~x~0;~x~0 := 0bv32; {1146#false} is VALID [2018-11-23 09:55:02,286 INFO L273 TraceCheckUtils]: 30: Hoare triple {1146#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1146#false} is VALID [2018-11-23 09:55:02,286 INFO L256 TraceCheckUtils]: 31: Hoare triple {1146#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {1146#false} is VALID [2018-11-23 09:55:02,287 INFO L273 TraceCheckUtils]: 32: Hoare triple {1146#false} ~cond := #in~cond; {1146#false} is VALID [2018-11-23 09:55:02,287 INFO L273 TraceCheckUtils]: 33: Hoare triple {1146#false} assume 0bv32 == ~cond; {1146#false} is VALID [2018-11-23 09:55:02,287 INFO L273 TraceCheckUtils]: 34: Hoare triple {1146#false} assume !false; {1146#false} is VALID [2018-11-23 09:55:02,289 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 09:55:02,291 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:55:02,294 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:55:02,294 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 09:55:02,294 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2018-11-23 09:55:02,294 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:02,295 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 09:55:02,329 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:02,329 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 09:55:02,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 09:55:02,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:02,330 INFO L87 Difference]: Start difference. First operand 47 states and 55 transitions. Second operand 3 states. [2018-11-23 09:55:02,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,693 INFO L93 Difference]: Finished difference Result 90 states and 111 transitions. [2018-11-23 09:55:02,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 09:55:02,693 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2018-11-23 09:55:02,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:02,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:02,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 104 transitions. [2018-11-23 09:55:02,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:02,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 104 transitions. [2018-11-23 09:55:02,699 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 104 transitions. [2018-11-23 09:55:02,895 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:02,897 INFO L225 Difference]: With dead ends: 90 [2018-11-23 09:55:02,897 INFO L226 Difference]: Without dead ends: 61 [2018-11-23 09:55:02,898 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:02,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-11-23 09:55:02,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 54. [2018-11-23 09:55:02,923 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:02,924 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand 54 states. [2018-11-23 09:55:02,924 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 54 states. [2018-11-23 09:55:02,924 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 54 states. [2018-11-23 09:55:02,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,927 INFO L93 Difference]: Finished difference Result 61 states and 69 transitions. [2018-11-23 09:55:02,927 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 69 transitions. [2018-11-23 09:55:02,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,929 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 61 states. [2018-11-23 09:55:02,929 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 61 states. [2018-11-23 09:55:02,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,932 INFO L93 Difference]: Finished difference Result 61 states and 69 transitions. [2018-11-23 09:55:02,932 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 69 transitions. [2018-11-23 09:55:02,933 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,933 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,933 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:02,933 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:02,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-11-23 09:55:02,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 62 transitions. [2018-11-23 09:55:02,936 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 62 transitions. Word has length 35 [2018-11-23 09:55:02,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:02,937 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 62 transitions. [2018-11-23 09:55:02,937 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 09:55:02,937 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 62 transitions. [2018-11-23 09:55:02,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 09:55:02,938 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:02,939 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:02,939 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:02,939 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:02,939 INFO L82 PathProgramCache]: Analyzing trace with hash 622720616, now seen corresponding path program 1 times [2018-11-23 09:55:02,940 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:02,940 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:02,961 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 09:55:03,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:03,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:03,078 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:03,198 INFO L256 TraceCheckUtils]: 0: Hoare triple {1579#true} call ULTIMATE.init(); {1579#true} is VALID [2018-11-23 09:55:03,198 INFO L273 TraceCheckUtils]: 1: Hoare triple {1579#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1579#true} is VALID [2018-11-23 09:55:03,198 INFO L273 TraceCheckUtils]: 2: Hoare triple {1579#true} assume true; {1579#true} is VALID [2018-11-23 09:55:03,199 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1579#true} {1579#true} #147#return; {1579#true} is VALID [2018-11-23 09:55:03,199 INFO L256 TraceCheckUtils]: 4: Hoare triple {1579#true} call #t~ret20 := main(); {1579#true} is VALID [2018-11-23 09:55:03,199 INFO L273 TraceCheckUtils]: 5: Hoare triple {1579#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1599#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:03,200 INFO L273 TraceCheckUtils]: 6: Hoare triple {1599#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1599#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:03,200 INFO L273 TraceCheckUtils]: 7: Hoare triple {1599#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1606#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:03,201 INFO L273 TraceCheckUtils]: 8: Hoare triple {1606#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1606#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:03,202 INFO L273 TraceCheckUtils]: 9: Hoare triple {1606#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1613#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:03,202 INFO L273 TraceCheckUtils]: 10: Hoare triple {1613#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1613#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:03,203 INFO L273 TraceCheckUtils]: 11: Hoare triple {1613#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1620#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:03,204 INFO L273 TraceCheckUtils]: 12: Hoare triple {1620#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1620#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:03,205 INFO L273 TraceCheckUtils]: 13: Hoare triple {1620#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1627#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:03,206 INFO L273 TraceCheckUtils]: 14: Hoare triple {1627#(= (_ bv4 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,206 INFO L273 TraceCheckUtils]: 15: Hoare triple {1580#false} havoc ~i~0;~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,206 INFO L273 TraceCheckUtils]: 16: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1580#false} is VALID [2018-11-23 09:55:03,207 INFO L273 TraceCheckUtils]: 17: Hoare triple {1580#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1580#false} is VALID [2018-11-23 09:55:03,207 INFO L273 TraceCheckUtils]: 18: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,208 INFO L273 TraceCheckUtils]: 19: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,208 INFO L273 TraceCheckUtils]: 20: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {1580#false} is VALID [2018-11-23 09:55:03,208 INFO L273 TraceCheckUtils]: 21: Hoare triple {1580#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1580#false} is VALID [2018-11-23 09:55:03,209 INFO L273 TraceCheckUtils]: 22: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,209 INFO L273 TraceCheckUtils]: 23: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,209 INFO L273 TraceCheckUtils]: 24: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {1580#false} is VALID [2018-11-23 09:55:03,210 INFO L273 TraceCheckUtils]: 25: Hoare triple {1580#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1580#false} is VALID [2018-11-23 09:55:03,210 INFO L273 TraceCheckUtils]: 26: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,210 INFO L273 TraceCheckUtils]: 27: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,211 INFO L273 TraceCheckUtils]: 28: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {1580#false} is VALID [2018-11-23 09:55:03,211 INFO L273 TraceCheckUtils]: 29: Hoare triple {1580#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1580#false} is VALID [2018-11-23 09:55:03,211 INFO L273 TraceCheckUtils]: 30: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,212 INFO L273 TraceCheckUtils]: 31: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,212 INFO L273 TraceCheckUtils]: 32: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {1580#false} is VALID [2018-11-23 09:55:03,212 INFO L273 TraceCheckUtils]: 33: Hoare triple {1580#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1580#false} is VALID [2018-11-23 09:55:03,213 INFO L273 TraceCheckUtils]: 34: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,213 INFO L273 TraceCheckUtils]: 35: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,213 INFO L273 TraceCheckUtils]: 36: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {1580#false} is VALID [2018-11-23 09:55:03,213 INFO L273 TraceCheckUtils]: 37: Hoare triple {1580#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1580#false} is VALID [2018-11-23 09:55:03,214 INFO L273 TraceCheckUtils]: 38: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,214 INFO L273 TraceCheckUtils]: 39: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,214 INFO L273 TraceCheckUtils]: 40: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {1580#false} is VALID [2018-11-23 09:55:03,214 INFO L273 TraceCheckUtils]: 41: Hoare triple {1580#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {1580#false} is VALID [2018-11-23 09:55:03,215 INFO L273 TraceCheckUtils]: 42: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,215 INFO L273 TraceCheckUtils]: 43: Hoare triple {1580#false} havoc ~x~0;~x~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,215 INFO L273 TraceCheckUtils]: 44: Hoare triple {1580#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1580#false} is VALID [2018-11-23 09:55:03,216 INFO L256 TraceCheckUtils]: 45: Hoare triple {1580#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {1580#false} is VALID [2018-11-23 09:55:03,216 INFO L273 TraceCheckUtils]: 46: Hoare triple {1580#false} ~cond := #in~cond; {1580#false} is VALID [2018-11-23 09:55:03,216 INFO L273 TraceCheckUtils]: 47: Hoare triple {1580#false} assume 0bv32 == ~cond; {1580#false} is VALID [2018-11-23 09:55:03,216 INFO L273 TraceCheckUtils]: 48: Hoare triple {1580#false} assume !false; {1580#false} is VALID [2018-11-23 09:55:03,220 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 09:55:03,221 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:03,500 INFO L273 TraceCheckUtils]: 48: Hoare triple {1580#false} assume !false; {1580#false} is VALID [2018-11-23 09:55:03,500 INFO L273 TraceCheckUtils]: 47: Hoare triple {1580#false} assume 0bv32 == ~cond; {1580#false} is VALID [2018-11-23 09:55:03,501 INFO L273 TraceCheckUtils]: 46: Hoare triple {1580#false} ~cond := #in~cond; {1580#false} is VALID [2018-11-23 09:55:03,501 INFO L256 TraceCheckUtils]: 45: Hoare triple {1580#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {1580#false} is VALID [2018-11-23 09:55:03,501 INFO L273 TraceCheckUtils]: 44: Hoare triple {1580#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1580#false} is VALID [2018-11-23 09:55:03,501 INFO L273 TraceCheckUtils]: 43: Hoare triple {1580#false} havoc ~x~0;~x~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,502 INFO L273 TraceCheckUtils]: 42: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,502 INFO L273 TraceCheckUtils]: 41: Hoare triple {1580#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {1580#false} is VALID [2018-11-23 09:55:03,502 INFO L273 TraceCheckUtils]: 40: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {1580#false} is VALID [2018-11-23 09:55:03,502 INFO L273 TraceCheckUtils]: 39: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,503 INFO L273 TraceCheckUtils]: 38: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,503 INFO L273 TraceCheckUtils]: 37: Hoare triple {1580#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1580#false} is VALID [2018-11-23 09:55:03,503 INFO L273 TraceCheckUtils]: 36: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {1580#false} is VALID [2018-11-23 09:55:03,504 INFO L273 TraceCheckUtils]: 35: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,504 INFO L273 TraceCheckUtils]: 34: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,504 INFO L273 TraceCheckUtils]: 33: Hoare triple {1580#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1580#false} is VALID [2018-11-23 09:55:03,504 INFO L273 TraceCheckUtils]: 32: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {1580#false} is VALID [2018-11-23 09:55:03,505 INFO L273 TraceCheckUtils]: 31: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,505 INFO L273 TraceCheckUtils]: 30: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,505 INFO L273 TraceCheckUtils]: 29: Hoare triple {1580#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1580#false} is VALID [2018-11-23 09:55:03,506 INFO L273 TraceCheckUtils]: 28: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {1580#false} is VALID [2018-11-23 09:55:03,506 INFO L273 TraceCheckUtils]: 27: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,506 INFO L273 TraceCheckUtils]: 26: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,506 INFO L273 TraceCheckUtils]: 25: Hoare triple {1580#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1580#false} is VALID [2018-11-23 09:55:03,507 INFO L273 TraceCheckUtils]: 24: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {1580#false} is VALID [2018-11-23 09:55:03,507 INFO L273 TraceCheckUtils]: 23: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,507 INFO L273 TraceCheckUtils]: 22: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,507 INFO L273 TraceCheckUtils]: 21: Hoare triple {1580#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1580#false} is VALID [2018-11-23 09:55:03,508 INFO L273 TraceCheckUtils]: 20: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {1580#false} is VALID [2018-11-23 09:55:03,508 INFO L273 TraceCheckUtils]: 19: Hoare triple {1580#false} ~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,508 INFO L273 TraceCheckUtils]: 18: Hoare triple {1580#false} assume !~bvslt32(~i~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,508 INFO L273 TraceCheckUtils]: 17: Hoare triple {1580#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1580#false} is VALID [2018-11-23 09:55:03,509 INFO L273 TraceCheckUtils]: 16: Hoare triple {1580#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1580#false} is VALID [2018-11-23 09:55:03,509 INFO L273 TraceCheckUtils]: 15: Hoare triple {1580#false} havoc ~i~0;~i~0 := 0bv32; {1580#false} is VALID [2018-11-23 09:55:03,510 INFO L273 TraceCheckUtils]: 14: Hoare triple {1835#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {1580#false} is VALID [2018-11-23 09:55:03,512 INFO L273 TraceCheckUtils]: 13: Hoare triple {1839#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1835#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:03,515 INFO L273 TraceCheckUtils]: 12: Hoare triple {1839#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1839#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,520 INFO L273 TraceCheckUtils]: 11: Hoare triple {1846#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1839#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,521 INFO L273 TraceCheckUtils]: 10: Hoare triple {1846#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1846#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,525 INFO L273 TraceCheckUtils]: 9: Hoare triple {1853#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1846#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,526 INFO L273 TraceCheckUtils]: 8: Hoare triple {1853#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1853#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,532 INFO L273 TraceCheckUtils]: 7: Hoare triple {1860#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1853#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,532 INFO L273 TraceCheckUtils]: 6: Hoare triple {1860#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1860#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,537 INFO L273 TraceCheckUtils]: 5: Hoare triple {1579#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1860#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,537 INFO L256 TraceCheckUtils]: 4: Hoare triple {1579#true} call #t~ret20 := main(); {1579#true} is VALID [2018-11-23 09:55:03,538 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1579#true} {1579#true} #147#return; {1579#true} is VALID [2018-11-23 09:55:03,538 INFO L273 TraceCheckUtils]: 2: Hoare triple {1579#true} assume true; {1579#true} is VALID [2018-11-23 09:55:03,538 INFO L273 TraceCheckUtils]: 1: Hoare triple {1579#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1579#true} is VALID [2018-11-23 09:55:03,538 INFO L256 TraceCheckUtils]: 0: Hoare triple {1579#true} call ULTIMATE.init(); {1579#true} is VALID [2018-11-23 09:55:03,542 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 09:55:03,554 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:03,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 09:55:03,555 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 49 [2018-11-23 09:55:03,555 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:03,555 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 09:55:03,712 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:03,712 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 09:55:03,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 09:55:03,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-23 09:55:03,713 INFO L87 Difference]: Start difference. First operand 54 states and 62 transitions. Second operand 12 states. [2018-11-23 09:55:05,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:05,138 INFO L93 Difference]: Finished difference Result 105 states and 126 transitions. [2018-11-23 09:55:05,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 09:55:05,139 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 49 [2018-11-23 09:55:05,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:05,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 09:55:05,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 112 transitions. [2018-11-23 09:55:05,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 09:55:05,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 112 transitions. [2018-11-23 09:55:05,145 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 112 transitions. [2018-11-23 09:55:05,388 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:05,390 INFO L225 Difference]: With dead ends: 105 [2018-11-23 09:55:05,390 INFO L226 Difference]: Without dead ends: 66 [2018-11-23 09:55:05,391 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2018-11-23 09:55:05,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-11-23 09:55:05,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-11-23 09:55:05,430 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:05,430 INFO L82 GeneralOperation]: Start isEquivalent. First operand 66 states. Second operand 66 states. [2018-11-23 09:55:05,430 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand 66 states. [2018-11-23 09:55:05,430 INFO L87 Difference]: Start difference. First operand 66 states. Second operand 66 states. [2018-11-23 09:55:05,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:05,433 INFO L93 Difference]: Finished difference Result 66 states and 74 transitions. [2018-11-23 09:55:05,434 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2018-11-23 09:55:05,434 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:05,434 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:05,435 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand 66 states. [2018-11-23 09:55:05,435 INFO L87 Difference]: Start difference. First operand 66 states. Second operand 66 states. [2018-11-23 09:55:05,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:05,438 INFO L93 Difference]: Finished difference Result 66 states and 74 transitions. [2018-11-23 09:55:05,438 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2018-11-23 09:55:05,438 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:05,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:05,439 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:05,439 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:05,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-11-23 09:55:05,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 74 transitions. [2018-11-23 09:55:05,442 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 74 transitions. Word has length 49 [2018-11-23 09:55:05,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:05,442 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 74 transitions. [2018-11-23 09:55:05,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 09:55:05,442 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2018-11-23 09:55:05,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-23 09:55:05,444 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:05,444 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:05,444 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:05,445 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:05,445 INFO L82 PathProgramCache]: Analyzing trace with hash -2117728356, now seen corresponding path program 2 times [2018-11-23 09:55:05,445 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:05,445 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:05,466 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 09:55:05,638 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 09:55:05,639 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:05,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:05,699 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:05,930 INFO L256 TraceCheckUtils]: 0: Hoare triple {2276#true} call ULTIMATE.init(); {2276#true} is VALID [2018-11-23 09:55:05,931 INFO L273 TraceCheckUtils]: 1: Hoare triple {2276#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2276#true} is VALID [2018-11-23 09:55:05,931 INFO L273 TraceCheckUtils]: 2: Hoare triple {2276#true} assume true; {2276#true} is VALID [2018-11-23 09:55:05,932 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2276#true} {2276#true} #147#return; {2276#true} is VALID [2018-11-23 09:55:05,932 INFO L256 TraceCheckUtils]: 4: Hoare triple {2276#true} call #t~ret20 := main(); {2276#true} is VALID [2018-11-23 09:55:05,933 INFO L273 TraceCheckUtils]: 5: Hoare triple {2276#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2296#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:05,934 INFO L273 TraceCheckUtils]: 6: Hoare triple {2296#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2296#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:05,934 INFO L273 TraceCheckUtils]: 7: Hoare triple {2296#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2303#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:05,936 INFO L273 TraceCheckUtils]: 8: Hoare triple {2303#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2303#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:05,938 INFO L273 TraceCheckUtils]: 9: Hoare triple {2303#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2310#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:05,948 INFO L273 TraceCheckUtils]: 10: Hoare triple {2310#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2310#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:05,950 INFO L273 TraceCheckUtils]: 11: Hoare triple {2310#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2317#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:05,951 INFO L273 TraceCheckUtils]: 12: Hoare triple {2317#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2317#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:05,952 INFO L273 TraceCheckUtils]: 13: Hoare triple {2317#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2324#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:05,952 INFO L273 TraceCheckUtils]: 14: Hoare triple {2324#(= (_ bv4 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2324#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:05,953 INFO L273 TraceCheckUtils]: 15: Hoare triple {2324#(= (_ bv4 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2331#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:05,953 INFO L273 TraceCheckUtils]: 16: Hoare triple {2331#(= (_ bv5 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2331#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:05,954 INFO L273 TraceCheckUtils]: 17: Hoare triple {2331#(= (_ bv5 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2338#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:05,954 INFO L273 TraceCheckUtils]: 18: Hoare triple {2338#(= (_ bv6 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2338#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:05,955 INFO L273 TraceCheckUtils]: 19: Hoare triple {2338#(= (_ bv6 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2345#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:05,955 INFO L273 TraceCheckUtils]: 20: Hoare triple {2345#(= (_ bv7 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2345#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:05,956 INFO L273 TraceCheckUtils]: 21: Hoare triple {2345#(= (_ bv7 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2352#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:05,957 INFO L273 TraceCheckUtils]: 22: Hoare triple {2352#(= (_ bv8 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2352#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:05,958 INFO L273 TraceCheckUtils]: 23: Hoare triple {2352#(= (_ bv8 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2359#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:05,958 INFO L273 TraceCheckUtils]: 24: Hoare triple {2359#(= (_ bv9 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2359#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:05,959 INFO L273 TraceCheckUtils]: 25: Hoare triple {2359#(= (_ bv9 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2366#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:05,960 INFO L273 TraceCheckUtils]: 26: Hoare triple {2366#(= (_ bv10 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,960 INFO L273 TraceCheckUtils]: 27: Hoare triple {2277#false} havoc ~i~0;~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,961 INFO L273 TraceCheckUtils]: 28: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2277#false} is VALID [2018-11-23 09:55:05,961 INFO L273 TraceCheckUtils]: 29: Hoare triple {2277#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2277#false} is VALID [2018-11-23 09:55:05,961 INFO L273 TraceCheckUtils]: 30: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,962 INFO L273 TraceCheckUtils]: 31: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,962 INFO L273 TraceCheckUtils]: 32: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2277#false} is VALID [2018-11-23 09:55:05,962 INFO L273 TraceCheckUtils]: 33: Hoare triple {2277#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2277#false} is VALID [2018-11-23 09:55:05,963 INFO L273 TraceCheckUtils]: 34: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,963 INFO L273 TraceCheckUtils]: 35: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,963 INFO L273 TraceCheckUtils]: 36: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2277#false} is VALID [2018-11-23 09:55:05,963 INFO L273 TraceCheckUtils]: 37: Hoare triple {2277#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2277#false} is VALID [2018-11-23 09:55:05,963 INFO L273 TraceCheckUtils]: 38: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,964 INFO L273 TraceCheckUtils]: 39: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,964 INFO L273 TraceCheckUtils]: 40: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {2277#false} is VALID [2018-11-23 09:55:05,964 INFO L273 TraceCheckUtils]: 41: Hoare triple {2277#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2277#false} is VALID [2018-11-23 09:55:05,964 INFO L273 TraceCheckUtils]: 42: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,964 INFO L273 TraceCheckUtils]: 43: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,965 INFO L273 TraceCheckUtils]: 44: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2277#false} is VALID [2018-11-23 09:55:05,965 INFO L273 TraceCheckUtils]: 45: Hoare triple {2277#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2277#false} is VALID [2018-11-23 09:55:05,965 INFO L273 TraceCheckUtils]: 46: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,965 INFO L273 TraceCheckUtils]: 47: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,966 INFO L273 TraceCheckUtils]: 48: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2277#false} is VALID [2018-11-23 09:55:05,966 INFO L273 TraceCheckUtils]: 49: Hoare triple {2277#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2277#false} is VALID [2018-11-23 09:55:05,966 INFO L273 TraceCheckUtils]: 50: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,966 INFO L273 TraceCheckUtils]: 51: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,967 INFO L273 TraceCheckUtils]: 52: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {2277#false} is VALID [2018-11-23 09:55:05,967 INFO L273 TraceCheckUtils]: 53: Hoare triple {2277#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2277#false} is VALID [2018-11-23 09:55:05,967 INFO L273 TraceCheckUtils]: 54: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:05,967 INFO L273 TraceCheckUtils]: 55: Hoare triple {2277#false} havoc ~x~0;~x~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:05,967 INFO L273 TraceCheckUtils]: 56: Hoare triple {2277#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2277#false} is VALID [2018-11-23 09:55:05,968 INFO L256 TraceCheckUtils]: 57: Hoare triple {2277#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {2277#false} is VALID [2018-11-23 09:55:05,968 INFO L273 TraceCheckUtils]: 58: Hoare triple {2277#false} ~cond := #in~cond; {2277#false} is VALID [2018-11-23 09:55:05,968 INFO L273 TraceCheckUtils]: 59: Hoare triple {2277#false} assume 0bv32 == ~cond; {2277#false} is VALID [2018-11-23 09:55:05,968 INFO L273 TraceCheckUtils]: 60: Hoare triple {2277#false} assume !false; {2277#false} is VALID [2018-11-23 09:55:05,973 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 09:55:05,973 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:06,693 INFO L273 TraceCheckUtils]: 60: Hoare triple {2277#false} assume !false; {2277#false} is VALID [2018-11-23 09:55:06,694 INFO L273 TraceCheckUtils]: 59: Hoare triple {2277#false} assume 0bv32 == ~cond; {2277#false} is VALID [2018-11-23 09:55:06,694 INFO L273 TraceCheckUtils]: 58: Hoare triple {2277#false} ~cond := #in~cond; {2277#false} is VALID [2018-11-23 09:55:06,694 INFO L256 TraceCheckUtils]: 57: Hoare triple {2277#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {2277#false} is VALID [2018-11-23 09:55:06,695 INFO L273 TraceCheckUtils]: 56: Hoare triple {2277#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2277#false} is VALID [2018-11-23 09:55:06,695 INFO L273 TraceCheckUtils]: 55: Hoare triple {2277#false} havoc ~x~0;~x~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,695 INFO L273 TraceCheckUtils]: 54: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,695 INFO L273 TraceCheckUtils]: 53: Hoare triple {2277#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2277#false} is VALID [2018-11-23 09:55:06,695 INFO L273 TraceCheckUtils]: 52: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {2277#false} is VALID [2018-11-23 09:55:06,696 INFO L273 TraceCheckUtils]: 51: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,696 INFO L273 TraceCheckUtils]: 50: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,696 INFO L273 TraceCheckUtils]: 49: Hoare triple {2277#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2277#false} is VALID [2018-11-23 09:55:06,696 INFO L273 TraceCheckUtils]: 48: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2277#false} is VALID [2018-11-23 09:55:06,697 INFO L273 TraceCheckUtils]: 47: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,697 INFO L273 TraceCheckUtils]: 46: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,697 INFO L273 TraceCheckUtils]: 45: Hoare triple {2277#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2277#false} is VALID [2018-11-23 09:55:06,697 INFO L273 TraceCheckUtils]: 44: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2277#false} is VALID [2018-11-23 09:55:06,697 INFO L273 TraceCheckUtils]: 43: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,697 INFO L273 TraceCheckUtils]: 42: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,698 INFO L273 TraceCheckUtils]: 41: Hoare triple {2277#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2277#false} is VALID [2018-11-23 09:55:06,698 INFO L273 TraceCheckUtils]: 40: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {2277#false} is VALID [2018-11-23 09:55:06,698 INFO L273 TraceCheckUtils]: 39: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,698 INFO L273 TraceCheckUtils]: 38: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,698 INFO L273 TraceCheckUtils]: 37: Hoare triple {2277#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2277#false} is VALID [2018-11-23 09:55:06,699 INFO L273 TraceCheckUtils]: 36: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2277#false} is VALID [2018-11-23 09:55:06,699 INFO L273 TraceCheckUtils]: 35: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,699 INFO L273 TraceCheckUtils]: 34: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,699 INFO L273 TraceCheckUtils]: 33: Hoare triple {2277#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2277#false} is VALID [2018-11-23 09:55:06,699 INFO L273 TraceCheckUtils]: 32: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2277#false} is VALID [2018-11-23 09:55:06,700 INFO L273 TraceCheckUtils]: 31: Hoare triple {2277#false} ~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,700 INFO L273 TraceCheckUtils]: 30: Hoare triple {2277#false} assume !~bvslt32(~i~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,700 INFO L273 TraceCheckUtils]: 29: Hoare triple {2277#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2277#false} is VALID [2018-11-23 09:55:06,700 INFO L273 TraceCheckUtils]: 28: Hoare triple {2277#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2277#false} is VALID [2018-11-23 09:55:06,700 INFO L273 TraceCheckUtils]: 27: Hoare triple {2277#false} havoc ~i~0;~i~0 := 0bv32; {2277#false} is VALID [2018-11-23 09:55:06,701 INFO L273 TraceCheckUtils]: 26: Hoare triple {2574#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {2277#false} is VALID [2018-11-23 09:55:06,702 INFO L273 TraceCheckUtils]: 25: Hoare triple {2578#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2574#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:06,702 INFO L273 TraceCheckUtils]: 24: Hoare triple {2578#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2578#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,706 INFO L273 TraceCheckUtils]: 23: Hoare triple {2585#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2578#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,707 INFO L273 TraceCheckUtils]: 22: Hoare triple {2585#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2585#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,711 INFO L273 TraceCheckUtils]: 21: Hoare triple {2592#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2585#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,712 INFO L273 TraceCheckUtils]: 20: Hoare triple {2592#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2592#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,715 INFO L273 TraceCheckUtils]: 19: Hoare triple {2599#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2592#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,716 INFO L273 TraceCheckUtils]: 18: Hoare triple {2599#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2599#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,722 INFO L273 TraceCheckUtils]: 17: Hoare triple {2606#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2599#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,722 INFO L273 TraceCheckUtils]: 16: Hoare triple {2606#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2606#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,726 INFO L273 TraceCheckUtils]: 15: Hoare triple {2613#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2606#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,727 INFO L273 TraceCheckUtils]: 14: Hoare triple {2613#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2613#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,738 INFO L273 TraceCheckUtils]: 13: Hoare triple {2620#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2613#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,739 INFO L273 TraceCheckUtils]: 12: Hoare triple {2620#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2620#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,744 INFO L273 TraceCheckUtils]: 11: Hoare triple {2627#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2620#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,745 INFO L273 TraceCheckUtils]: 10: Hoare triple {2627#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2627#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,750 INFO L273 TraceCheckUtils]: 9: Hoare triple {2634#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2627#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,750 INFO L273 TraceCheckUtils]: 8: Hoare triple {2634#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2634#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,758 INFO L273 TraceCheckUtils]: 7: Hoare triple {2641#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2634#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,758 INFO L273 TraceCheckUtils]: 6: Hoare triple {2641#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2641#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,759 INFO L273 TraceCheckUtils]: 5: Hoare triple {2276#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2641#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,760 INFO L256 TraceCheckUtils]: 4: Hoare triple {2276#true} call #t~ret20 := main(); {2276#true} is VALID [2018-11-23 09:55:06,760 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2276#true} {2276#true} #147#return; {2276#true} is VALID [2018-11-23 09:55:06,760 INFO L273 TraceCheckUtils]: 2: Hoare triple {2276#true} assume true; {2276#true} is VALID [2018-11-23 09:55:06,760 INFO L273 TraceCheckUtils]: 1: Hoare triple {2276#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2276#true} is VALID [2018-11-23 09:55:06,760 INFO L256 TraceCheckUtils]: 0: Hoare triple {2276#true} call ULTIMATE.init(); {2276#true} is VALID [2018-11-23 09:55:06,764 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 09:55:06,766 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:06,766 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 09:55:06,767 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 61 [2018-11-23 09:55:06,769 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:06,769 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 09:55:06,953 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:06,953 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 09:55:06,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 09:55:06,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-11-23 09:55:06,955 INFO L87 Difference]: Start difference. First operand 66 states and 74 transitions. Second operand 24 states. [2018-11-23 09:55:11,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:11,663 INFO L93 Difference]: Finished difference Result 129 states and 156 transitions. [2018-11-23 09:55:11,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 09:55:11,663 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 61 [2018-11-23 09:55:11,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:11,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 09:55:11,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 142 transitions. [2018-11-23 09:55:11,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 09:55:11,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 142 transitions. [2018-11-23 09:55:11,675 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 142 transitions. [2018-11-23 09:55:11,933 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:11,935 INFO L225 Difference]: With dead ends: 129 [2018-11-23 09:55:11,935 INFO L226 Difference]: Without dead ends: 90 [2018-11-23 09:55:11,936 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2018-11-23 09:55:11,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-11-23 09:55:11,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-11-23 09:55:11,979 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:11,979 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand 90 states. [2018-11-23 09:55:11,979 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand 90 states. [2018-11-23 09:55:11,979 INFO L87 Difference]: Start difference. First operand 90 states. Second operand 90 states. [2018-11-23 09:55:11,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:11,982 INFO L93 Difference]: Finished difference Result 90 states and 98 transitions. [2018-11-23 09:55:11,982 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 98 transitions. [2018-11-23 09:55:11,983 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:11,983 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:11,983 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand 90 states. [2018-11-23 09:55:11,983 INFO L87 Difference]: Start difference. First operand 90 states. Second operand 90 states. [2018-11-23 09:55:11,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:11,987 INFO L93 Difference]: Finished difference Result 90 states and 98 transitions. [2018-11-23 09:55:11,987 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 98 transitions. [2018-11-23 09:55:11,987 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:11,987 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:11,987 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:11,987 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:11,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-11-23 09:55:11,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 98 transitions. [2018-11-23 09:55:11,991 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 98 transitions. Word has length 61 [2018-11-23 09:55:11,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:11,991 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 98 transitions. [2018-11-23 09:55:11,991 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 09:55:11,991 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 98 transitions. [2018-11-23 09:55:11,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-23 09:55:11,992 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:11,992 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:11,993 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:11,993 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:11,993 INFO L82 PathProgramCache]: Analyzing trace with hash 1007591428, now seen corresponding path program 3 times [2018-11-23 09:55:11,994 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:11,994 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:12,019 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 09:55:12,173 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-23 09:55:12,173 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:12,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:12,210 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:12,313 INFO L256 TraceCheckUtils]: 0: Hoare triple {3189#true} call ULTIMATE.init(); {3189#true} is VALID [2018-11-23 09:55:12,314 INFO L273 TraceCheckUtils]: 1: Hoare triple {3189#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3189#true} is VALID [2018-11-23 09:55:12,314 INFO L273 TraceCheckUtils]: 2: Hoare triple {3189#true} assume true; {3189#true} is VALID [2018-11-23 09:55:12,314 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3189#true} {3189#true} #147#return; {3189#true} is VALID [2018-11-23 09:55:12,314 INFO L256 TraceCheckUtils]: 4: Hoare triple {3189#true} call #t~ret20 := main(); {3189#true} is VALID [2018-11-23 09:55:12,315 INFO L273 TraceCheckUtils]: 5: Hoare triple {3189#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,315 INFO L273 TraceCheckUtils]: 6: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,315 INFO L273 TraceCheckUtils]: 7: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,315 INFO L273 TraceCheckUtils]: 8: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,316 INFO L273 TraceCheckUtils]: 9: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,316 INFO L273 TraceCheckUtils]: 10: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,316 INFO L273 TraceCheckUtils]: 11: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,316 INFO L273 TraceCheckUtils]: 12: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,317 INFO L273 TraceCheckUtils]: 13: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,317 INFO L273 TraceCheckUtils]: 14: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,317 INFO L273 TraceCheckUtils]: 15: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,317 INFO L273 TraceCheckUtils]: 16: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,317 INFO L273 TraceCheckUtils]: 17: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,317 INFO L273 TraceCheckUtils]: 18: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,318 INFO L273 TraceCheckUtils]: 19: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,318 INFO L273 TraceCheckUtils]: 20: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,318 INFO L273 TraceCheckUtils]: 21: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,318 INFO L273 TraceCheckUtils]: 22: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,318 INFO L273 TraceCheckUtils]: 23: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,319 INFO L273 TraceCheckUtils]: 24: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,319 INFO L273 TraceCheckUtils]: 25: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,319 INFO L273 TraceCheckUtils]: 26: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,319 INFO L273 TraceCheckUtils]: 27: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,319 INFO L273 TraceCheckUtils]: 28: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,320 INFO L273 TraceCheckUtils]: 29: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,320 INFO L273 TraceCheckUtils]: 30: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,320 INFO L273 TraceCheckUtils]: 31: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,320 INFO L273 TraceCheckUtils]: 32: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,320 INFO L273 TraceCheckUtils]: 33: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,320 INFO L273 TraceCheckUtils]: 34: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,320 INFO L273 TraceCheckUtils]: 35: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 36: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 37: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 38: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 39: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 40: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 41: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 42: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,321 INFO L273 TraceCheckUtils]: 43: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 44: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 45: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 46: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 47: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 48: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 49: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 50: Hoare triple {3189#true} assume !~bvslt32(~a~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,322 INFO L273 TraceCheckUtils]: 51: Hoare triple {3189#true} havoc ~i~0;~i~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,323 INFO L273 TraceCheckUtils]: 52: Hoare triple {3189#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3189#true} is VALID [2018-11-23 09:55:12,323 INFO L273 TraceCheckUtils]: 53: Hoare triple {3189#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3189#true} is VALID [2018-11-23 09:55:12,323 INFO L273 TraceCheckUtils]: 54: Hoare triple {3189#true} assume !~bvslt32(~i~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,323 INFO L273 TraceCheckUtils]: 55: Hoare triple {3189#true} ~i~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,323 INFO L273 TraceCheckUtils]: 56: Hoare triple {3189#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {3189#true} is VALID [2018-11-23 09:55:12,323 INFO L273 TraceCheckUtils]: 57: Hoare triple {3189#true} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3189#true} is VALID [2018-11-23 09:55:12,323 INFO L273 TraceCheckUtils]: 58: Hoare triple {3189#true} assume !~bvslt32(~i~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,324 INFO L273 TraceCheckUtils]: 59: Hoare triple {3189#true} ~i~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,324 INFO L273 TraceCheckUtils]: 60: Hoare triple {3189#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {3189#true} is VALID [2018-11-23 09:55:12,324 INFO L273 TraceCheckUtils]: 61: Hoare triple {3189#true} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3189#true} is VALID [2018-11-23 09:55:12,324 INFO L273 TraceCheckUtils]: 62: Hoare triple {3189#true} assume !~bvslt32(~i~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,324 INFO L273 TraceCheckUtils]: 63: Hoare triple {3189#true} ~i~0 := 0bv32; {3383#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:12,327 INFO L273 TraceCheckUtils]: 64: Hoare triple {3383#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {3383#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:12,327 INFO L273 TraceCheckUtils]: 65: Hoare triple {3383#(= main_~i~0 (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3390#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 66: Hoare triple {3390#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 67: Hoare triple {3190#false} ~i~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 68: Hoare triple {3190#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {3190#false} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 69: Hoare triple {3190#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3190#false} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 70: Hoare triple {3190#false} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 71: Hoare triple {3190#false} ~i~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 72: Hoare triple {3190#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {3190#false} is VALID [2018-11-23 09:55:12,328 INFO L273 TraceCheckUtils]: 73: Hoare triple {3190#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3190#false} is VALID [2018-11-23 09:55:12,329 INFO L273 TraceCheckUtils]: 74: Hoare triple {3190#false} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,329 INFO L273 TraceCheckUtils]: 75: Hoare triple {3190#false} ~i~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,329 INFO L273 TraceCheckUtils]: 76: Hoare triple {3190#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {3190#false} is VALID [2018-11-23 09:55:12,329 INFO L273 TraceCheckUtils]: 77: Hoare triple {3190#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3190#false} is VALID [2018-11-23 09:55:12,329 INFO L273 TraceCheckUtils]: 78: Hoare triple {3190#false} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,329 INFO L273 TraceCheckUtils]: 79: Hoare triple {3190#false} havoc ~x~0;~x~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,329 INFO L273 TraceCheckUtils]: 80: Hoare triple {3190#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3190#false} is VALID [2018-11-23 09:55:12,330 INFO L256 TraceCheckUtils]: 81: Hoare triple {3190#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {3190#false} is VALID [2018-11-23 09:55:12,330 INFO L273 TraceCheckUtils]: 82: Hoare triple {3190#false} ~cond := #in~cond; {3190#false} is VALID [2018-11-23 09:55:12,330 INFO L273 TraceCheckUtils]: 83: Hoare triple {3190#false} assume 0bv32 == ~cond; {3190#false} is VALID [2018-11-23 09:55:12,330 INFO L273 TraceCheckUtils]: 84: Hoare triple {3190#false} assume !false; {3190#false} is VALID [2018-11-23 09:55:12,333 INFO L134 CoverageAnalysis]: Checked inductivity of 491 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 490 trivial. 0 not checked. [2018-11-23 09:55:12,333 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:12,451 INFO L273 TraceCheckUtils]: 84: Hoare triple {3190#false} assume !false; {3190#false} is VALID [2018-11-23 09:55:12,451 INFO L273 TraceCheckUtils]: 83: Hoare triple {3190#false} assume 0bv32 == ~cond; {3190#false} is VALID [2018-11-23 09:55:12,452 INFO L273 TraceCheckUtils]: 82: Hoare triple {3190#false} ~cond := #in~cond; {3190#false} is VALID [2018-11-23 09:55:12,452 INFO L256 TraceCheckUtils]: 81: Hoare triple {3190#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {3190#false} is VALID [2018-11-23 09:55:12,452 INFO L273 TraceCheckUtils]: 80: Hoare triple {3190#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3190#false} is VALID [2018-11-23 09:55:12,452 INFO L273 TraceCheckUtils]: 79: Hoare triple {3190#false} havoc ~x~0;~x~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,453 INFO L273 TraceCheckUtils]: 78: Hoare triple {3190#false} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,453 INFO L273 TraceCheckUtils]: 77: Hoare triple {3190#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3190#false} is VALID [2018-11-23 09:55:12,453 INFO L273 TraceCheckUtils]: 76: Hoare triple {3190#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {3190#false} is VALID [2018-11-23 09:55:12,454 INFO L273 TraceCheckUtils]: 75: Hoare triple {3190#false} ~i~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,454 INFO L273 TraceCheckUtils]: 74: Hoare triple {3190#false} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,454 INFO L273 TraceCheckUtils]: 73: Hoare triple {3190#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3190#false} is VALID [2018-11-23 09:55:12,454 INFO L273 TraceCheckUtils]: 72: Hoare triple {3190#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {3190#false} is VALID [2018-11-23 09:55:12,455 INFO L273 TraceCheckUtils]: 71: Hoare triple {3190#false} ~i~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,455 INFO L273 TraceCheckUtils]: 70: Hoare triple {3190#false} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,455 INFO L273 TraceCheckUtils]: 69: Hoare triple {3190#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3190#false} is VALID [2018-11-23 09:55:12,455 INFO L273 TraceCheckUtils]: 68: Hoare triple {3190#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {3190#false} is VALID [2018-11-23 09:55:12,455 INFO L273 TraceCheckUtils]: 67: Hoare triple {3190#false} ~i~0 := 0bv32; {3190#false} is VALID [2018-11-23 09:55:12,478 INFO L273 TraceCheckUtils]: 66: Hoare triple {3502#(bvslt main_~i~0 (_ bv100000 32))} assume !~bvslt32(~i~0, 100000bv32); {3190#false} is VALID [2018-11-23 09:55:12,491 INFO L273 TraceCheckUtils]: 65: Hoare triple {3506#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3502#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:12,500 INFO L273 TraceCheckUtils]: 64: Hoare triple {3506#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {3506#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:12,501 INFO L273 TraceCheckUtils]: 63: Hoare triple {3189#true} ~i~0 := 0bv32; {3506#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:12,501 INFO L273 TraceCheckUtils]: 62: Hoare triple {3189#true} assume !~bvslt32(~i~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,501 INFO L273 TraceCheckUtils]: 61: Hoare triple {3189#true} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3189#true} is VALID [2018-11-23 09:55:12,501 INFO L273 TraceCheckUtils]: 60: Hoare triple {3189#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {3189#true} is VALID [2018-11-23 09:55:12,501 INFO L273 TraceCheckUtils]: 59: Hoare triple {3189#true} ~i~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,502 INFO L273 TraceCheckUtils]: 58: Hoare triple {3189#true} assume !~bvslt32(~i~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,502 INFO L273 TraceCheckUtils]: 57: Hoare triple {3189#true} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3189#true} is VALID [2018-11-23 09:55:12,502 INFO L273 TraceCheckUtils]: 56: Hoare triple {3189#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {3189#true} is VALID [2018-11-23 09:55:12,502 INFO L273 TraceCheckUtils]: 55: Hoare triple {3189#true} ~i~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,502 INFO L273 TraceCheckUtils]: 54: Hoare triple {3189#true} assume !~bvslt32(~i~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,502 INFO L273 TraceCheckUtils]: 53: Hoare triple {3189#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3189#true} is VALID [2018-11-23 09:55:12,503 INFO L273 TraceCheckUtils]: 52: Hoare triple {3189#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3189#true} is VALID [2018-11-23 09:55:12,503 INFO L273 TraceCheckUtils]: 51: Hoare triple {3189#true} havoc ~i~0;~i~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,503 INFO L273 TraceCheckUtils]: 50: Hoare triple {3189#true} assume !~bvslt32(~a~0, 100000bv32); {3189#true} is VALID [2018-11-23 09:55:12,503 INFO L273 TraceCheckUtils]: 49: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,503 INFO L273 TraceCheckUtils]: 48: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,503 INFO L273 TraceCheckUtils]: 47: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 46: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 45: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 44: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 43: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 42: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 41: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 40: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,504 INFO L273 TraceCheckUtils]: 39: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,505 INFO L273 TraceCheckUtils]: 38: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,505 INFO L273 TraceCheckUtils]: 37: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,505 INFO L273 TraceCheckUtils]: 36: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,505 INFO L273 TraceCheckUtils]: 35: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,505 INFO L273 TraceCheckUtils]: 34: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,505 INFO L273 TraceCheckUtils]: 33: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,505 INFO L273 TraceCheckUtils]: 32: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,506 INFO L273 TraceCheckUtils]: 31: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,506 INFO L273 TraceCheckUtils]: 30: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,506 INFO L273 TraceCheckUtils]: 29: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,506 INFO L273 TraceCheckUtils]: 28: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,506 INFO L273 TraceCheckUtils]: 27: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,506 INFO L273 TraceCheckUtils]: 26: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,507 INFO L273 TraceCheckUtils]: 25: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,507 INFO L273 TraceCheckUtils]: 24: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,507 INFO L273 TraceCheckUtils]: 23: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,507 INFO L273 TraceCheckUtils]: 22: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,508 INFO L273 TraceCheckUtils]: 21: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,508 INFO L273 TraceCheckUtils]: 20: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,508 INFO L273 TraceCheckUtils]: 19: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,508 INFO L273 TraceCheckUtils]: 18: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,508 INFO L273 TraceCheckUtils]: 17: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,508 INFO L273 TraceCheckUtils]: 16: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,509 INFO L273 TraceCheckUtils]: 15: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,509 INFO L273 TraceCheckUtils]: 14: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,509 INFO L273 TraceCheckUtils]: 13: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,509 INFO L273 TraceCheckUtils]: 12: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,509 INFO L273 TraceCheckUtils]: 11: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,510 INFO L273 TraceCheckUtils]: 10: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,510 INFO L273 TraceCheckUtils]: 9: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,510 INFO L273 TraceCheckUtils]: 8: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,510 INFO L273 TraceCheckUtils]: 7: Hoare triple {3189#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3189#true} is VALID [2018-11-23 09:55:12,510 INFO L273 TraceCheckUtils]: 6: Hoare triple {3189#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3189#true} is VALID [2018-11-23 09:55:12,511 INFO L273 TraceCheckUtils]: 5: Hoare triple {3189#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {3189#true} is VALID [2018-11-23 09:55:12,511 INFO L256 TraceCheckUtils]: 4: Hoare triple {3189#true} call #t~ret20 := main(); {3189#true} is VALID [2018-11-23 09:55:12,511 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3189#true} {3189#true} #147#return; {3189#true} is VALID [2018-11-23 09:55:12,511 INFO L273 TraceCheckUtils]: 2: Hoare triple {3189#true} assume true; {3189#true} is VALID [2018-11-23 09:55:12,511 INFO L273 TraceCheckUtils]: 1: Hoare triple {3189#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3189#true} is VALID [2018-11-23 09:55:12,511 INFO L256 TraceCheckUtils]: 0: Hoare triple {3189#true} call ULTIMATE.init(); {3189#true} is VALID [2018-11-23 09:55:12,516 INFO L134 CoverageAnalysis]: Checked inductivity of 491 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 490 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (8)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 09:55:12,522 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:12,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 09:55:12,523 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 85 [2018-11-23 09:55:12,523 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:12,523 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 09:55:12,648 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:12,649 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 09:55:12,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 09:55:12,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 09:55:12,650 INFO L87 Difference]: Start difference. First operand 90 states and 98 transitions. Second operand 6 states. [2018-11-23 09:55:13,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:13,517 INFO L93 Difference]: Finished difference Result 167 states and 202 transitions. [2018-11-23 09:55:13,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 09:55:13,517 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 85 [2018-11-23 09:55:13,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:13,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:13,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 153 transitions. [2018-11-23 09:55:13,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:13,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 153 transitions. [2018-11-23 09:55:13,524 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 153 transitions. [2018-11-23 09:55:13,885 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 153 edges. 153 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:13,887 INFO L225 Difference]: With dead ends: 167 [2018-11-23 09:55:13,888 INFO L226 Difference]: Without dead ends: 132 [2018-11-23 09:55:13,888 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 166 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 09:55:13,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-11-23 09:55:14,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-11-23 09:55:14,031 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:14,032 INFO L82 GeneralOperation]: Start isEquivalent. First operand 132 states. Second operand 132 states. [2018-11-23 09:55:14,032 INFO L74 IsIncluded]: Start isIncluded. First operand 132 states. Second operand 132 states. [2018-11-23 09:55:14,032 INFO L87 Difference]: Start difference. First operand 132 states. Second operand 132 states. [2018-11-23 09:55:14,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:14,036 INFO L93 Difference]: Finished difference Result 132 states and 140 transitions. [2018-11-23 09:55:14,036 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-11-23 09:55:14,037 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:14,037 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:14,037 INFO L74 IsIncluded]: Start isIncluded. First operand 132 states. Second operand 132 states. [2018-11-23 09:55:14,037 INFO L87 Difference]: Start difference. First operand 132 states. Second operand 132 states. [2018-11-23 09:55:14,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:14,041 INFO L93 Difference]: Finished difference Result 132 states and 140 transitions. [2018-11-23 09:55:14,041 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-11-23 09:55:14,041 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:14,041 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:14,041 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:14,041 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:14,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-11-23 09:55:14,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 140 transitions. [2018-11-23 09:55:14,045 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 140 transitions. Word has length 85 [2018-11-23 09:55:14,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:14,045 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 140 transitions. [2018-11-23 09:55:14,046 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 09:55:14,046 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-11-23 09:55:14,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-23 09:55:14,047 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:14,047 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:14,048 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:14,048 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:14,048 INFO L82 PathProgramCache]: Analyzing trace with hash 1182591738, now seen corresponding path program 4 times [2018-11-23 09:55:14,049 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:14,049 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:14,072 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 09:55:14,290 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 09:55:14,291 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:14,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:14,371 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:15,021 INFO L256 TraceCheckUtils]: 0: Hoare triple {4415#true} call ULTIMATE.init(); {4415#true} is VALID [2018-11-23 09:55:15,021 INFO L273 TraceCheckUtils]: 1: Hoare triple {4415#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4415#true} is VALID [2018-11-23 09:55:15,022 INFO L273 TraceCheckUtils]: 2: Hoare triple {4415#true} assume true; {4415#true} is VALID [2018-11-23 09:55:15,022 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4415#true} {4415#true} #147#return; {4415#true} is VALID [2018-11-23 09:55:15,022 INFO L256 TraceCheckUtils]: 4: Hoare triple {4415#true} call #t~ret20 := main(); {4415#true} is VALID [2018-11-23 09:55:15,023 INFO L273 TraceCheckUtils]: 5: Hoare triple {4415#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {4435#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:15,023 INFO L273 TraceCheckUtils]: 6: Hoare triple {4435#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4435#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:15,024 INFO L273 TraceCheckUtils]: 7: Hoare triple {4435#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4442#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:15,024 INFO L273 TraceCheckUtils]: 8: Hoare triple {4442#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4442#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:15,025 INFO L273 TraceCheckUtils]: 9: Hoare triple {4442#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4449#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:15,025 INFO L273 TraceCheckUtils]: 10: Hoare triple {4449#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4449#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:15,025 INFO L273 TraceCheckUtils]: 11: Hoare triple {4449#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4456#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:15,026 INFO L273 TraceCheckUtils]: 12: Hoare triple {4456#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4456#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:15,026 INFO L273 TraceCheckUtils]: 13: Hoare triple {4456#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4463#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:15,027 INFO L273 TraceCheckUtils]: 14: Hoare triple {4463#(= (_ bv4 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4463#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:15,027 INFO L273 TraceCheckUtils]: 15: Hoare triple {4463#(= (_ bv4 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4470#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:15,028 INFO L273 TraceCheckUtils]: 16: Hoare triple {4470#(= (_ bv5 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4470#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:15,029 INFO L273 TraceCheckUtils]: 17: Hoare triple {4470#(= (_ bv5 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4477#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:15,029 INFO L273 TraceCheckUtils]: 18: Hoare triple {4477#(= (_ bv6 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4477#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:15,030 INFO L273 TraceCheckUtils]: 19: Hoare triple {4477#(= (_ bv6 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4484#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:15,030 INFO L273 TraceCheckUtils]: 20: Hoare triple {4484#(= (_ bv7 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4484#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:15,031 INFO L273 TraceCheckUtils]: 21: Hoare triple {4484#(= (_ bv7 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4491#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:15,032 INFO L273 TraceCheckUtils]: 22: Hoare triple {4491#(= (_ bv8 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4491#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:15,032 INFO L273 TraceCheckUtils]: 23: Hoare triple {4491#(= (_ bv8 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4498#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:15,033 INFO L273 TraceCheckUtils]: 24: Hoare triple {4498#(= (_ bv9 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4498#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:15,033 INFO L273 TraceCheckUtils]: 25: Hoare triple {4498#(= (_ bv9 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4505#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:15,034 INFO L273 TraceCheckUtils]: 26: Hoare triple {4505#(= (_ bv10 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4505#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:15,035 INFO L273 TraceCheckUtils]: 27: Hoare triple {4505#(= (_ bv10 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4512#(= (_ bv11 32) main_~a~0)} is VALID [2018-11-23 09:55:15,035 INFO L273 TraceCheckUtils]: 28: Hoare triple {4512#(= (_ bv11 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4512#(= (_ bv11 32) main_~a~0)} is VALID [2018-11-23 09:55:15,036 INFO L273 TraceCheckUtils]: 29: Hoare triple {4512#(= (_ bv11 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4519#(= (_ bv12 32) main_~a~0)} is VALID [2018-11-23 09:55:15,036 INFO L273 TraceCheckUtils]: 30: Hoare triple {4519#(= (_ bv12 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4519#(= (_ bv12 32) main_~a~0)} is VALID [2018-11-23 09:55:15,037 INFO L273 TraceCheckUtils]: 31: Hoare triple {4519#(= (_ bv12 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4526#(= (_ bv13 32) main_~a~0)} is VALID [2018-11-23 09:55:15,038 INFO L273 TraceCheckUtils]: 32: Hoare triple {4526#(= (_ bv13 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4526#(= (_ bv13 32) main_~a~0)} is VALID [2018-11-23 09:55:15,038 INFO L273 TraceCheckUtils]: 33: Hoare triple {4526#(= (_ bv13 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4533#(= (_ bv14 32) main_~a~0)} is VALID [2018-11-23 09:55:15,039 INFO L273 TraceCheckUtils]: 34: Hoare triple {4533#(= (_ bv14 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4533#(= (_ bv14 32) main_~a~0)} is VALID [2018-11-23 09:55:15,039 INFO L273 TraceCheckUtils]: 35: Hoare triple {4533#(= (_ bv14 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4540#(= (_ bv15 32) main_~a~0)} is VALID [2018-11-23 09:55:15,040 INFO L273 TraceCheckUtils]: 36: Hoare triple {4540#(= (_ bv15 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4540#(= (_ bv15 32) main_~a~0)} is VALID [2018-11-23 09:55:15,041 INFO L273 TraceCheckUtils]: 37: Hoare triple {4540#(= (_ bv15 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4547#(= (_ bv16 32) main_~a~0)} is VALID [2018-11-23 09:55:15,041 INFO L273 TraceCheckUtils]: 38: Hoare triple {4547#(= (_ bv16 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4547#(= (_ bv16 32) main_~a~0)} is VALID [2018-11-23 09:55:15,042 INFO L273 TraceCheckUtils]: 39: Hoare triple {4547#(= (_ bv16 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4554#(= (_ bv17 32) main_~a~0)} is VALID [2018-11-23 09:55:15,042 INFO L273 TraceCheckUtils]: 40: Hoare triple {4554#(= (_ bv17 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4554#(= (_ bv17 32) main_~a~0)} is VALID [2018-11-23 09:55:15,043 INFO L273 TraceCheckUtils]: 41: Hoare triple {4554#(= (_ bv17 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4561#(= (_ bv18 32) main_~a~0)} is VALID [2018-11-23 09:55:15,043 INFO L273 TraceCheckUtils]: 42: Hoare triple {4561#(= (_ bv18 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4561#(= (_ bv18 32) main_~a~0)} is VALID [2018-11-23 09:55:15,044 INFO L273 TraceCheckUtils]: 43: Hoare triple {4561#(= (_ bv18 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4568#(= (_ bv19 32) main_~a~0)} is VALID [2018-11-23 09:55:15,045 INFO L273 TraceCheckUtils]: 44: Hoare triple {4568#(= (_ bv19 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4568#(= (_ bv19 32) main_~a~0)} is VALID [2018-11-23 09:55:15,045 INFO L273 TraceCheckUtils]: 45: Hoare triple {4568#(= (_ bv19 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4575#(= (_ bv20 32) main_~a~0)} is VALID [2018-11-23 09:55:15,046 INFO L273 TraceCheckUtils]: 46: Hoare triple {4575#(= (_ bv20 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4575#(= (_ bv20 32) main_~a~0)} is VALID [2018-11-23 09:55:15,046 INFO L273 TraceCheckUtils]: 47: Hoare triple {4575#(= (_ bv20 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4582#(= (_ bv21 32) main_~a~0)} is VALID [2018-11-23 09:55:15,047 INFO L273 TraceCheckUtils]: 48: Hoare triple {4582#(= (_ bv21 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {4582#(= (_ bv21 32) main_~a~0)} is VALID [2018-11-23 09:55:15,048 INFO L273 TraceCheckUtils]: 49: Hoare triple {4582#(= (_ bv21 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4589#(= (_ bv22 32) main_~a~0)} is VALID [2018-11-23 09:55:15,048 INFO L273 TraceCheckUtils]: 50: Hoare triple {4589#(= (_ bv22 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,048 INFO L273 TraceCheckUtils]: 51: Hoare triple {4416#false} havoc ~i~0;~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,049 INFO L273 TraceCheckUtils]: 52: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:15,049 INFO L273 TraceCheckUtils]: 53: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:15,049 INFO L273 TraceCheckUtils]: 54: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:15,049 INFO L273 TraceCheckUtils]: 55: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:15,050 INFO L273 TraceCheckUtils]: 56: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:15,050 INFO L273 TraceCheckUtils]: 57: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:15,050 INFO L273 TraceCheckUtils]: 58: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:15,051 INFO L273 TraceCheckUtils]: 59: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:15,051 INFO L273 TraceCheckUtils]: 60: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,051 INFO L273 TraceCheckUtils]: 61: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,052 INFO L273 TraceCheckUtils]: 62: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:15,052 INFO L273 TraceCheckUtils]: 63: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:15,052 INFO L273 TraceCheckUtils]: 64: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:15,052 INFO L273 TraceCheckUtils]: 65: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:15,052 INFO L273 TraceCheckUtils]: 66: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:15,052 INFO L273 TraceCheckUtils]: 67: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:15,053 INFO L273 TraceCheckUtils]: 68: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:15,053 INFO L273 TraceCheckUtils]: 69: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:15,053 INFO L273 TraceCheckUtils]: 70: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,053 INFO L273 TraceCheckUtils]: 71: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,053 INFO L273 TraceCheckUtils]: 72: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:15,053 INFO L273 TraceCheckUtils]: 73: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:15,054 INFO L273 TraceCheckUtils]: 74: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:15,054 INFO L273 TraceCheckUtils]: 75: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:15,054 INFO L273 TraceCheckUtils]: 76: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:15,054 INFO L273 TraceCheckUtils]: 77: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:15,054 INFO L273 TraceCheckUtils]: 78: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:15,054 INFO L273 TraceCheckUtils]: 79: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:15,055 INFO L273 TraceCheckUtils]: 80: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,055 INFO L273 TraceCheckUtils]: 81: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,055 INFO L273 TraceCheckUtils]: 82: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:15,055 INFO L273 TraceCheckUtils]: 83: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:15,055 INFO L273 TraceCheckUtils]: 84: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:15,055 INFO L273 TraceCheckUtils]: 85: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:15,056 INFO L273 TraceCheckUtils]: 86: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:15,056 INFO L273 TraceCheckUtils]: 87: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:15,056 INFO L273 TraceCheckUtils]: 88: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:15,056 INFO L273 TraceCheckUtils]: 89: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:15,056 INFO L273 TraceCheckUtils]: 90: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,057 INFO L273 TraceCheckUtils]: 91: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,057 INFO L273 TraceCheckUtils]: 92: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:15,057 INFO L273 TraceCheckUtils]: 93: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:15,057 INFO L273 TraceCheckUtils]: 94: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:15,057 INFO L273 TraceCheckUtils]: 95: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:15,057 INFO L273 TraceCheckUtils]: 96: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:15,058 INFO L273 TraceCheckUtils]: 97: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:15,058 INFO L273 TraceCheckUtils]: 98: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:15,058 INFO L273 TraceCheckUtils]: 99: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:15,058 INFO L273 TraceCheckUtils]: 100: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,058 INFO L273 TraceCheckUtils]: 101: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,058 INFO L273 TraceCheckUtils]: 102: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:15,059 INFO L273 TraceCheckUtils]: 103: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:15,059 INFO L273 TraceCheckUtils]: 104: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:15,059 INFO L273 TraceCheckUtils]: 105: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:15,059 INFO L273 TraceCheckUtils]: 106: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:15,060 INFO L273 TraceCheckUtils]: 107: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:15,060 INFO L273 TraceCheckUtils]: 108: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:15,060 INFO L273 TraceCheckUtils]: 109: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:15,060 INFO L273 TraceCheckUtils]: 110: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,060 INFO L273 TraceCheckUtils]: 111: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,060 INFO L273 TraceCheckUtils]: 112: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:15,061 INFO L273 TraceCheckUtils]: 113: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:15,061 INFO L273 TraceCheckUtils]: 114: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:15,061 INFO L273 TraceCheckUtils]: 115: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:15,061 INFO L273 TraceCheckUtils]: 116: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:15,061 INFO L273 TraceCheckUtils]: 117: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:15,061 INFO L273 TraceCheckUtils]: 118: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:15,062 INFO L273 TraceCheckUtils]: 119: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:15,062 INFO L273 TraceCheckUtils]: 120: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:15,062 INFO L273 TraceCheckUtils]: 121: Hoare triple {4416#false} havoc ~x~0;~x~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:15,062 INFO L273 TraceCheckUtils]: 122: Hoare triple {4416#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4416#false} is VALID [2018-11-23 09:55:15,062 INFO L256 TraceCheckUtils]: 123: Hoare triple {4416#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {4416#false} is VALID [2018-11-23 09:55:15,062 INFO L273 TraceCheckUtils]: 124: Hoare triple {4416#false} ~cond := #in~cond; {4416#false} is VALID [2018-11-23 09:55:15,063 INFO L273 TraceCheckUtils]: 125: Hoare triple {4416#false} assume 0bv32 == ~cond; {4416#false} is VALID [2018-11-23 09:55:15,063 INFO L273 TraceCheckUtils]: 126: Hoare triple {4416#false} assume !false; {4416#false} is VALID [2018-11-23 09:55:15,079 INFO L134 CoverageAnalysis]: Checked inductivity of 596 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-11-23 09:55:15,079 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:17,276 INFO L273 TraceCheckUtils]: 126: Hoare triple {4416#false} assume !false; {4416#false} is VALID [2018-11-23 09:55:17,277 INFO L273 TraceCheckUtils]: 125: Hoare triple {4416#false} assume 0bv32 == ~cond; {4416#false} is VALID [2018-11-23 09:55:17,277 INFO L273 TraceCheckUtils]: 124: Hoare triple {4416#false} ~cond := #in~cond; {4416#false} is VALID [2018-11-23 09:55:17,277 INFO L256 TraceCheckUtils]: 123: Hoare triple {4416#false} call __VERIFIER_assert((if #t~mem18 == #t~mem19 then 1bv32 else 0bv32)); {4416#false} is VALID [2018-11-23 09:55:17,278 INFO L273 TraceCheckUtils]: 122: Hoare triple {4416#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem19 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4416#false} is VALID [2018-11-23 09:55:17,278 INFO L273 TraceCheckUtils]: 121: Hoare triple {4416#false} havoc ~x~0;~x~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,278 INFO L273 TraceCheckUtils]: 120: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,278 INFO L273 TraceCheckUtils]: 119: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:17,278 INFO L273 TraceCheckUtils]: 118: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:17,279 INFO L273 TraceCheckUtils]: 117: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:17,279 INFO L273 TraceCheckUtils]: 116: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:17,279 INFO L273 TraceCheckUtils]: 115: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:17,279 INFO L273 TraceCheckUtils]: 114: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:17,279 INFO L273 TraceCheckUtils]: 113: Hoare triple {4416#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4416#false} is VALID [2018-11-23 09:55:17,279 INFO L273 TraceCheckUtils]: 112: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {4416#false} is VALID [2018-11-23 09:55:17,279 INFO L273 TraceCheckUtils]: 111: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 110: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 109: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 108: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 107: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 106: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 105: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 104: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:17,280 INFO L273 TraceCheckUtils]: 103: Hoare triple {4416#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 102: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 101: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 100: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 99: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 98: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 97: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 96: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 95: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:17,281 INFO L273 TraceCheckUtils]: 94: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 93: Hoare triple {4416#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 92: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 91: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 90: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 89: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 88: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 87: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:17,282 INFO L273 TraceCheckUtils]: 86: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 85: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 84: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 83: Hoare triple {4416#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 82: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 81: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 80: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 79: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:17,283 INFO L273 TraceCheckUtils]: 78: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:17,284 INFO L273 TraceCheckUtils]: 77: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:17,284 INFO L273 TraceCheckUtils]: 76: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:17,284 INFO L273 TraceCheckUtils]: 75: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:17,284 INFO L273 TraceCheckUtils]: 74: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:17,284 INFO L273 TraceCheckUtils]: 73: Hoare triple {4416#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4416#false} is VALID [2018-11-23 09:55:17,284 INFO L273 TraceCheckUtils]: 72: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {4416#false} is VALID [2018-11-23 09:55:17,285 INFO L273 TraceCheckUtils]: 71: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,285 INFO L273 TraceCheckUtils]: 70: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,285 INFO L273 TraceCheckUtils]: 69: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:17,285 INFO L273 TraceCheckUtils]: 68: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:17,285 INFO L273 TraceCheckUtils]: 67: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:17,285 INFO L273 TraceCheckUtils]: 66: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:17,286 INFO L273 TraceCheckUtils]: 65: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:17,286 INFO L273 TraceCheckUtils]: 64: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:17,286 INFO L273 TraceCheckUtils]: 63: Hoare triple {4416#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4416#false} is VALID [2018-11-23 09:55:17,286 INFO L273 TraceCheckUtils]: 62: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {4416#false} is VALID [2018-11-23 09:55:17,286 INFO L273 TraceCheckUtils]: 61: Hoare triple {4416#false} ~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,287 INFO L273 TraceCheckUtils]: 60: Hoare triple {4416#false} assume !~bvslt32(~i~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,287 INFO L273 TraceCheckUtils]: 59: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:17,287 INFO L273 TraceCheckUtils]: 58: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:17,287 INFO L273 TraceCheckUtils]: 57: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:17,287 INFO L273 TraceCheckUtils]: 56: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:17,287 INFO L273 TraceCheckUtils]: 55: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:17,288 INFO L273 TraceCheckUtils]: 54: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:17,288 INFO L273 TraceCheckUtils]: 53: Hoare triple {4416#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4416#false} is VALID [2018-11-23 09:55:17,288 INFO L273 TraceCheckUtils]: 52: Hoare triple {4416#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {4416#false} is VALID [2018-11-23 09:55:17,288 INFO L273 TraceCheckUtils]: 51: Hoare triple {4416#false} havoc ~i~0;~i~0 := 0bv32; {4416#false} is VALID [2018-11-23 09:55:17,303 INFO L273 TraceCheckUtils]: 50: Hoare triple {5049#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {4416#false} is VALID [2018-11-23 09:55:17,308 INFO L273 TraceCheckUtils]: 49: Hoare triple {5053#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5049#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:17,308 INFO L273 TraceCheckUtils]: 48: Hoare triple {5053#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5053#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,313 INFO L273 TraceCheckUtils]: 47: Hoare triple {5060#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5053#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,314 INFO L273 TraceCheckUtils]: 46: Hoare triple {5060#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5060#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,318 INFO L273 TraceCheckUtils]: 45: Hoare triple {5067#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5060#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,319 INFO L273 TraceCheckUtils]: 44: Hoare triple {5067#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5067#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,322 INFO L273 TraceCheckUtils]: 43: Hoare triple {5074#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5067#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,323 INFO L273 TraceCheckUtils]: 42: Hoare triple {5074#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5074#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,328 INFO L273 TraceCheckUtils]: 41: Hoare triple {5081#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5074#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,329 INFO L273 TraceCheckUtils]: 40: Hoare triple {5081#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5081#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,333 INFO L273 TraceCheckUtils]: 39: Hoare triple {5088#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5081#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,334 INFO L273 TraceCheckUtils]: 38: Hoare triple {5088#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5088#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,340 INFO L273 TraceCheckUtils]: 37: Hoare triple {5095#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5088#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,340 INFO L273 TraceCheckUtils]: 36: Hoare triple {5095#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5095#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,348 INFO L273 TraceCheckUtils]: 35: Hoare triple {5102#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5095#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,348 INFO L273 TraceCheckUtils]: 34: Hoare triple {5102#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5102#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,353 INFO L273 TraceCheckUtils]: 33: Hoare triple {5109#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5102#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,354 INFO L273 TraceCheckUtils]: 32: Hoare triple {5109#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5109#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,363 INFO L273 TraceCheckUtils]: 31: Hoare triple {5116#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5109#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,363 INFO L273 TraceCheckUtils]: 30: Hoare triple {5116#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5116#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,368 INFO L273 TraceCheckUtils]: 29: Hoare triple {5123#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5116#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,368 INFO L273 TraceCheckUtils]: 28: Hoare triple {5123#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5123#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,375 INFO L273 TraceCheckUtils]: 27: Hoare triple {5130#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5123#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,376 INFO L273 TraceCheckUtils]: 26: Hoare triple {5130#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5130#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,381 INFO L273 TraceCheckUtils]: 25: Hoare triple {5137#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5130#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,381 INFO L273 TraceCheckUtils]: 24: Hoare triple {5137#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5137#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,389 INFO L273 TraceCheckUtils]: 23: Hoare triple {5144#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5137#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,390 INFO L273 TraceCheckUtils]: 22: Hoare triple {5144#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5144#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,395 INFO L273 TraceCheckUtils]: 21: Hoare triple {5151#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5144#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,395 INFO L273 TraceCheckUtils]: 20: Hoare triple {5151#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5151#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,401 INFO L273 TraceCheckUtils]: 19: Hoare triple {5158#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5151#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,401 INFO L273 TraceCheckUtils]: 18: Hoare triple {5158#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5158#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,406 INFO L273 TraceCheckUtils]: 17: Hoare triple {5165#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5158#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,406 INFO L273 TraceCheckUtils]: 16: Hoare triple {5165#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5165#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,414 INFO L273 TraceCheckUtils]: 15: Hoare triple {5172#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5165#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,414 INFO L273 TraceCheckUtils]: 14: Hoare triple {5172#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5172#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,431 INFO L273 TraceCheckUtils]: 13: Hoare triple {5179#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5172#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,445 INFO L273 TraceCheckUtils]: 12: Hoare triple {5179#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5179#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,460 INFO L273 TraceCheckUtils]: 11: Hoare triple {5186#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5179#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,474 INFO L273 TraceCheckUtils]: 10: Hoare triple {5186#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5186#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,486 INFO L273 TraceCheckUtils]: 9: Hoare triple {5193#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5186#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,490 INFO L273 TraceCheckUtils]: 8: Hoare triple {5193#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5193#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,496 INFO L273 TraceCheckUtils]: 7: Hoare triple {5200#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5193#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,497 INFO L273 TraceCheckUtils]: 6: Hoare triple {5200#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5200#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,498 INFO L273 TraceCheckUtils]: 5: Hoare triple {4415#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {5200#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,498 INFO L256 TraceCheckUtils]: 4: Hoare triple {4415#true} call #t~ret20 := main(); {4415#true} is VALID [2018-11-23 09:55:17,498 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4415#true} {4415#true} #147#return; {4415#true} is VALID [2018-11-23 09:55:17,498 INFO L273 TraceCheckUtils]: 2: Hoare triple {4415#true} assume true; {4415#true} is VALID [2018-11-23 09:55:17,499 INFO L273 TraceCheckUtils]: 1: Hoare triple {4415#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4415#true} is VALID [2018-11-23 09:55:17,499 INFO L256 TraceCheckUtils]: 0: Hoare triple {4415#true} call ULTIMATE.init(); {4415#true} is VALID [2018-11-23 09:55:17,514 INFO L134 CoverageAnalysis]: Checked inductivity of 596 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (9)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 09:55:17,523 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:17,523 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-11-23 09:55:17,524 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 127 [2018-11-23 09:55:17,524 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:17,524 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states. [2018-11-23 09:55:17,888 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:17,888 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-23 09:55:17,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-23 09:55:17,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 09:55:17,890 INFO L87 Difference]: Start difference. First operand 132 states and 140 transitions. Second operand 48 states. [2018-11-23 09:55:26,079 WARN L180 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 7 [2018-11-23 09:55:26,560 WARN L180 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 7 [2018-11-23 09:55:27,067 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 7 [2018-11-23 09:55:27,590 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 7 [2018-11-23 09:55:28,169 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 7 [2018-11-23 09:55:28,749 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 7 [2018-11-23 09:55:29,328 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 7 [2018-11-23 09:55:29,904 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 7 [2018-11-23 09:55:37,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:37,969 INFO L93 Difference]: Finished difference Result 261 states and 300 transitions. [2018-11-23 09:55:37,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-23 09:55:37,969 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 127 [2018-11-23 09:55:37,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:37,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 09:55:37,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 202 transitions. [2018-11-23 09:55:37,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 09:55:37,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 202 transitions. [2018-11-23 09:55:37,982 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states and 202 transitions. [2018-11-23 09:55:38,461 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 202 edges. 202 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:38,466 INFO L225 Difference]: With dead ends: 261 [2018-11-23 09:55:38,466 INFO L226 Difference]: Without dead ends: 180 [2018-11-23 09:55:38,468 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 207 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 11.8s TimeCoverageRelationStatistics Valid=1678, Invalid=3152, Unknown=0, NotChecked=0, Total=4830 [2018-11-23 09:55:38,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-11-23 09:55:38,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-11-23 09:55:38,548 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:38,548 INFO L82 GeneralOperation]: Start isEquivalent. First operand 180 states. Second operand 180 states. [2018-11-23 09:55:38,548 INFO L74 IsIncluded]: Start isIncluded. First operand 180 states. Second operand 180 states. [2018-11-23 09:55:38,548 INFO L87 Difference]: Start difference. First operand 180 states. Second operand 180 states. [2018-11-23 09:55:38,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:38,553 INFO L93 Difference]: Finished difference Result 180 states and 188 transitions. [2018-11-23 09:55:38,554 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 188 transitions. [2018-11-23 09:55:38,554 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:38,554 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:38,554 INFO L74 IsIncluded]: Start isIncluded. First operand 180 states. Second operand 180 states. [2018-11-23 09:55:38,555 INFO L87 Difference]: Start difference. First operand 180 states. Second operand 180 states. [2018-11-23 09:55:38,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:38,560 INFO L93 Difference]: Finished difference Result 180 states and 188 transitions. [2018-11-23 09:55:38,561 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 188 transitions. [2018-11-23 09:55:38,561 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:38,561 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:38,561 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:38,562 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:38,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-11-23 09:55:38,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 188 transitions. [2018-11-23 09:55:38,568 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 188 transitions. Word has length 127 [2018-11-23 09:55:38,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:38,568 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 188 transitions. [2018-11-23 09:55:38,568 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-23 09:55:38,568 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 188 transitions. [2018-11-23 09:55:38,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-23 09:55:38,571 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:38,571 INFO L402 BasicCegarLoop]: trace histogram [46, 46, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:38,571 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:38,571 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:38,572 INFO L82 PathProgramCache]: Analyzing trace with hash -375656502, now seen corresponding path program 5 times [2018-11-23 09:55:38,574 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:38,574 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:38,603 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1