java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-examples/standard_copy9_false-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 09:54:54,642 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 09:54:54,644 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 09:54:54,656 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 09:54:54,657 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 09:54:54,658 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 09:54:54,659 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 09:54:54,661 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 09:54:54,663 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 09:54:54,664 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 09:54:54,665 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 09:54:54,665 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 09:54:54,666 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 09:54:54,668 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 09:54:54,669 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 09:54:54,670 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 09:54:54,671 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 09:54:54,673 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 09:54:54,675 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 09:54:54,676 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 09:54:54,678 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 09:54:54,679 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 09:54:54,681 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 09:54:54,682 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 09:54:54,682 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 09:54:54,683 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 09:54:54,684 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 09:54:54,685 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 09:54:54,686 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 09:54:54,687 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 09:54:54,687 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 09:54:54,688 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 09:54:54,688 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 09:54:54,688 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 09:54:54,690 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 09:54:54,690 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 09:54:54,691 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 09:54:54,716 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 09:54:54,716 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 09:54:54,718 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 09:54:54,718 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 09:54:54,718 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 09:54:54,719 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 09:54:54,719 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 09:54:54,719 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 09:54:54,719 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 09:54:54,719 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 09:54:54,722 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 09:54:54,722 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 09:54:54,722 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 09:54:54,723 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 09:54:54,723 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 09:54:54,723 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 09:54:54,724 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 09:54:54,724 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 09:54:54,724 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 09:54:54,724 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 09:54:54,725 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 09:54:54,725 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 09:54:54,725 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 09:54:54,725 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 09:54:54,725 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 09:54:54,726 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 09:54:54,727 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 09:54:54,727 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 09:54:54,727 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 09:54:54,727 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 09:54:54,728 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 09:54:54,728 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 09:54:54,728 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 09:54:54,780 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 09:54:54,793 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 09:54:54,797 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 09:54:54,798 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 09:54:54,798 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 09:54:54,800 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_copy9_false-unreach-call_ground.i [2018-11-23 09:54:54,867 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/710c1d3c6/ebc5014440c749b4860fecf189f57b19/FLAG7e96d1b98 [2018-11-23 09:54:55,291 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 09:54:55,292 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-examples/standard_copy9_false-unreach-call_ground.i [2018-11-23 09:54:55,299 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/710c1d3c6/ebc5014440c749b4860fecf189f57b19/FLAG7e96d1b98 [2018-11-23 09:54:55,678 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/710c1d3c6/ebc5014440c749b4860fecf189f57b19 [2018-11-23 09:54:55,688 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 09:54:55,689 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 09:54:55,690 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 09:54:55,690 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 09:54:55,694 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 09:54:55,695 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:54:55" (1/1) ... [2018-11-23 09:54:55,698 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@122db15f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:55, skipping insertion in model container [2018-11-23 09:54:55,698 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:54:55" (1/1) ... [2018-11-23 09:54:55,708 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 09:54:55,734 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 09:54:55,970 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:54:55,975 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 09:54:56,032 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:54:56,067 INFO L195 MainTranslator]: Completed translation [2018-11-23 09:54:56,068 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56 WrapperNode [2018-11-23 09:54:56,068 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 09:54:56,069 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 09:54:56,069 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 09:54:56,069 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 09:54:56,082 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,097 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,107 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 09:54:56,107 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 09:54:56,107 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 09:54:56,107 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 09:54:56,119 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,119 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,131 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,132 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,175 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,287 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,291 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... [2018-11-23 09:54:56,301 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 09:54:56,302 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 09:54:56,302 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 09:54:56,302 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 09:54:56,303 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 09:54:56,357 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 09:54:56,357 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 09:54:56,357 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 09:54:56,358 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 09:54:56,358 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 09:54:56,358 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 09:54:56,358 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 09:54:56,358 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 09:54:56,358 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 09:54:56,359 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 09:54:56,359 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 09:54:56,359 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 09:54:57,679 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 09:54:57,679 INFO L280 CfgBuilder]: Removed 11 assue(true) statements. [2018-11-23 09:54:57,680 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:54:57 BoogieIcfgContainer [2018-11-23 09:54:57,680 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 09:54:57,681 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 09:54:57,681 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 09:54:57,683 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 09:54:57,684 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 09:54:55" (1/3) ... [2018-11-23 09:54:57,684 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9bfe669 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 09:54:57, skipping insertion in model container [2018-11-23 09:54:57,684 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:54:56" (2/3) ... [2018-11-23 09:54:57,685 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9bfe669 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 09:54:57, skipping insertion in model container [2018-11-23 09:54:57,685 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:54:57" (3/3) ... [2018-11-23 09:54:57,686 INFO L112 eAbstractionObserver]: Analyzing ICFG standard_copy9_false-unreach-call_ground.i [2018-11-23 09:54:57,694 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 09:54:57,701 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 09:54:57,717 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 09:54:57,746 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 09:54:57,747 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 09:54:57,747 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 09:54:57,747 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 09:54:57,747 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 09:54:57,747 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 09:54:57,748 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 09:54:57,748 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 09:54:57,748 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 09:54:57,765 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states. [2018-11-23 09:54:57,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 09:54:57,772 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:54:57,772 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:54:57,774 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:54:57,780 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:54:57,780 INFO L82 PathProgramCache]: Analyzing trace with hash -178932642, now seen corresponding path program 1 times [2018-11-23 09:54:57,784 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:54:57,785 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:54:57,803 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:54:57,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:57,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:57,885 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:54:58,064 INFO L256 TraceCheckUtils]: 0: Hoare triple {54#true} call ULTIMATE.init(); {54#true} is VALID [2018-11-23 09:54:58,068 INFO L273 TraceCheckUtils]: 1: Hoare triple {54#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {54#true} is VALID [2018-11-23 09:54:58,069 INFO L273 TraceCheckUtils]: 2: Hoare triple {54#true} assume true; {54#true} is VALID [2018-11-23 09:54:58,069 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {54#true} {54#true} #175#return; {54#true} is VALID [2018-11-23 09:54:58,069 INFO L256 TraceCheckUtils]: 4: Hoare triple {54#true} call #t~ret24 := main(); {54#true} is VALID [2018-11-23 09:54:58,070 INFO L273 TraceCheckUtils]: 5: Hoare triple {54#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {54#true} is VALID [2018-11-23 09:54:58,078 INFO L273 TraceCheckUtils]: 6: Hoare triple {54#true} assume !true; {55#false} is VALID [2018-11-23 09:54:58,079 INFO L273 TraceCheckUtils]: 7: Hoare triple {55#false} havoc ~i~0;~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,079 INFO L273 TraceCheckUtils]: 8: Hoare triple {55#false} assume !~bvslt32(~i~0, 100000bv32); {55#false} is VALID [2018-11-23 09:54:58,079 INFO L273 TraceCheckUtils]: 9: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,080 INFO L273 TraceCheckUtils]: 10: Hoare triple {55#false} assume !~bvslt32(~i~0, 100000bv32); {55#false} is VALID [2018-11-23 09:54:58,080 INFO L273 TraceCheckUtils]: 11: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,080 INFO L273 TraceCheckUtils]: 12: Hoare triple {55#false} assume !~bvslt32(~i~0, 100000bv32); {55#false} is VALID [2018-11-23 09:54:58,080 INFO L273 TraceCheckUtils]: 13: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,081 INFO L273 TraceCheckUtils]: 14: Hoare triple {55#false} assume !~bvslt32(~i~0, 100000bv32); {55#false} is VALID [2018-11-23 09:54:58,081 INFO L273 TraceCheckUtils]: 15: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,081 INFO L273 TraceCheckUtils]: 16: Hoare triple {55#false} assume !~bvslt32(~i~0, 100000bv32); {55#false} is VALID [2018-11-23 09:54:58,082 INFO L273 TraceCheckUtils]: 17: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,082 INFO L273 TraceCheckUtils]: 18: Hoare triple {55#false} assume !true; {55#false} is VALID [2018-11-23 09:54:58,083 INFO L273 TraceCheckUtils]: 19: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,083 INFO L273 TraceCheckUtils]: 20: Hoare triple {55#false} assume !true; {55#false} is VALID [2018-11-23 09:54:58,083 INFO L273 TraceCheckUtils]: 21: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,084 INFO L273 TraceCheckUtils]: 22: Hoare triple {55#false} assume !true; {55#false} is VALID [2018-11-23 09:54:58,084 INFO L273 TraceCheckUtils]: 23: Hoare triple {55#false} ~i~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,084 INFO L273 TraceCheckUtils]: 24: Hoare triple {55#false} assume !~bvslt32(~i~0, 100000bv32); {55#false} is VALID [2018-11-23 09:54:58,085 INFO L273 TraceCheckUtils]: 25: Hoare triple {55#false} havoc ~x~0;~x~0 := 0bv32; {55#false} is VALID [2018-11-23 09:54:58,085 INFO L273 TraceCheckUtils]: 26: Hoare triple {55#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {55#false} is VALID [2018-11-23 09:54:58,086 INFO L256 TraceCheckUtils]: 27: Hoare triple {55#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {55#false} is VALID [2018-11-23 09:54:58,086 INFO L273 TraceCheckUtils]: 28: Hoare triple {55#false} ~cond := #in~cond; {55#false} is VALID [2018-11-23 09:54:58,086 INFO L273 TraceCheckUtils]: 29: Hoare triple {55#false} assume 0bv32 == ~cond; {55#false} is VALID [2018-11-23 09:54:58,087 INFO L273 TraceCheckUtils]: 30: Hoare triple {55#false} assume !false; {55#false} is VALID [2018-11-23 09:54:58,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:54:58,093 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:54:58,103 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:54:58,103 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 09:54:58,110 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 31 [2018-11-23 09:54:58,116 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:54:58,121 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 09:54:58,192 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:58,192 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 09:54:58,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 09:54:58,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 09:54:58,203 INFO L87 Difference]: Start difference. First operand 51 states. Second operand 2 states. [2018-11-23 09:54:58,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:58,476 INFO L93 Difference]: Finished difference Result 94 states and 137 transitions. [2018-11-23 09:54:58,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 09:54:58,476 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 31 [2018-11-23 09:54:58,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:54:58,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 09:54:58,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 137 transitions. [2018-11-23 09:54:58,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 09:54:58,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 137 transitions. [2018-11-23 09:54:58,497 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 137 transitions. [2018-11-23 09:54:59,379 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 137 edges. 137 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:59,393 INFO L225 Difference]: With dead ends: 94 [2018-11-23 09:54:59,393 INFO L226 Difference]: Without dead ends: 46 [2018-11-23 09:54:59,397 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 09:54:59,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-11-23 09:54:59,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-11-23 09:54:59,508 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:54:59,509 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand 46 states. [2018-11-23 09:54:59,509 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand 46 states. [2018-11-23 09:54:59,509 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 46 states. [2018-11-23 09:54:59,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:59,515 INFO L93 Difference]: Finished difference Result 46 states and 56 transitions. [2018-11-23 09:54:59,515 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 56 transitions. [2018-11-23 09:54:59,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:54:59,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:54:59,517 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand 46 states. [2018-11-23 09:54:59,517 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 46 states. [2018-11-23 09:54:59,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:54:59,522 INFO L93 Difference]: Finished difference Result 46 states and 56 transitions. [2018-11-23 09:54:59,522 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 56 transitions. [2018-11-23 09:54:59,523 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:54:59,523 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:54:59,523 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:54:59,524 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:54:59,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-11-23 09:54:59,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 56 transitions. [2018-11-23 09:54:59,529 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 56 transitions. Word has length 31 [2018-11-23 09:54:59,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:54:59,530 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 56 transitions. [2018-11-23 09:54:59,530 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 09:54:59,530 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 56 transitions. [2018-11-23 09:54:59,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 09:54:59,531 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:54:59,532 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:54:59,532 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:54:59,532 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:54:59,533 INFO L82 PathProgramCache]: Analyzing trace with hash 1311438022, now seen corresponding path program 1 times [2018-11-23 09:54:59,533 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:54:59,534 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:54:59,560 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:54:59,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:59,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:54:59,625 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:54:59,740 INFO L256 TraceCheckUtils]: 0: Hoare triple {426#true} call ULTIMATE.init(); {426#true} is VALID [2018-11-23 09:54:59,741 INFO L273 TraceCheckUtils]: 1: Hoare triple {426#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {426#true} is VALID [2018-11-23 09:54:59,741 INFO L273 TraceCheckUtils]: 2: Hoare triple {426#true} assume true; {426#true} is VALID [2018-11-23 09:54:59,741 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {426#true} {426#true} #175#return; {426#true} is VALID [2018-11-23 09:54:59,742 INFO L256 TraceCheckUtils]: 4: Hoare triple {426#true} call #t~ret24 := main(); {426#true} is VALID [2018-11-23 09:54:59,742 INFO L273 TraceCheckUtils]: 5: Hoare triple {426#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {446#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:54:59,743 INFO L273 TraceCheckUtils]: 6: Hoare triple {446#(= main_~a~0 (_ bv0 32))} assume !~bvslt32(~a~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,743 INFO L273 TraceCheckUtils]: 7: Hoare triple {427#false} havoc ~i~0;~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,743 INFO L273 TraceCheckUtils]: 8: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,744 INFO L273 TraceCheckUtils]: 9: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,744 INFO L273 TraceCheckUtils]: 10: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,744 INFO L273 TraceCheckUtils]: 11: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,744 INFO L273 TraceCheckUtils]: 12: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,745 INFO L273 TraceCheckUtils]: 13: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,745 INFO L273 TraceCheckUtils]: 14: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,745 INFO L273 TraceCheckUtils]: 15: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,746 INFO L273 TraceCheckUtils]: 16: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,746 INFO L273 TraceCheckUtils]: 17: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,747 INFO L273 TraceCheckUtils]: 18: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,747 INFO L273 TraceCheckUtils]: 19: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,748 INFO L273 TraceCheckUtils]: 20: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,748 INFO L273 TraceCheckUtils]: 21: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,748 INFO L273 TraceCheckUtils]: 22: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,749 INFO L273 TraceCheckUtils]: 23: Hoare triple {427#false} ~i~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,749 INFO L273 TraceCheckUtils]: 24: Hoare triple {427#false} assume !~bvslt32(~i~0, 100000bv32); {427#false} is VALID [2018-11-23 09:54:59,749 INFO L273 TraceCheckUtils]: 25: Hoare triple {427#false} havoc ~x~0;~x~0 := 0bv32; {427#false} is VALID [2018-11-23 09:54:59,750 INFO L273 TraceCheckUtils]: 26: Hoare triple {427#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {427#false} is VALID [2018-11-23 09:54:59,750 INFO L256 TraceCheckUtils]: 27: Hoare triple {427#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {427#false} is VALID [2018-11-23 09:54:59,750 INFO L273 TraceCheckUtils]: 28: Hoare triple {427#false} ~cond := #in~cond; {427#false} is VALID [2018-11-23 09:54:59,751 INFO L273 TraceCheckUtils]: 29: Hoare triple {427#false} assume 0bv32 == ~cond; {427#false} is VALID [2018-11-23 09:54:59,751 INFO L273 TraceCheckUtils]: 30: Hoare triple {427#false} assume !false; {427#false} is VALID [2018-11-23 09:54:59,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:54:59,753 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:54:59,755 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:54:59,755 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 09:54:59,757 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2018-11-23 09:54:59,757 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:54:59,757 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 09:54:59,823 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:54:59,823 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 09:54:59,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 09:54:59,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:54:59,824 INFO L87 Difference]: Start difference. First operand 46 states and 56 transitions. Second operand 3 states. [2018-11-23 09:55:00,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,126 INFO L93 Difference]: Finished difference Result 86 states and 106 transitions. [2018-11-23 09:55:00,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 09:55:00,127 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2018-11-23 09:55:00,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:00,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:00,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 106 transitions. [2018-11-23 09:55:00,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:00,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 106 transitions. [2018-11-23 09:55:00,135 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 106 transitions. [2018-11-23 09:55:00,477 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:00,483 INFO L225 Difference]: With dead ends: 86 [2018-11-23 09:55:00,483 INFO L226 Difference]: Without dead ends: 48 [2018-11-23 09:55:00,486 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:00,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-11-23 09:55:00,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 47. [2018-11-23 09:55:00,510 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:00,510 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand 47 states. [2018-11-23 09:55:00,510 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand 47 states. [2018-11-23 09:55:00,511 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 47 states. [2018-11-23 09:55:00,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,515 INFO L93 Difference]: Finished difference Result 48 states and 58 transitions. [2018-11-23 09:55:00,515 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 58 transitions. [2018-11-23 09:55:00,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:00,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:00,516 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 48 states. [2018-11-23 09:55:00,516 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 48 states. [2018-11-23 09:55:00,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:00,520 INFO L93 Difference]: Finished difference Result 48 states and 58 transitions. [2018-11-23 09:55:00,520 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 58 transitions. [2018-11-23 09:55:00,521 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:00,521 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:00,521 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:00,521 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:00,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-11-23 09:55:00,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 57 transitions. [2018-11-23 09:55:00,524 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 57 transitions. Word has length 31 [2018-11-23 09:55:00,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:00,524 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 57 transitions. [2018-11-23 09:55:00,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 09:55:00,525 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 57 transitions. [2018-11-23 09:55:00,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 09:55:00,526 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:00,526 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:00,526 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:00,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:00,527 INFO L82 PathProgramCache]: Analyzing trace with hash -953933084, now seen corresponding path program 1 times [2018-11-23 09:55:00,527 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:00,528 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:00,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 09:55:00,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:00,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:00,616 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:00,690 INFO L256 TraceCheckUtils]: 0: Hoare triple {798#true} call ULTIMATE.init(); {798#true} is VALID [2018-11-23 09:55:00,691 INFO L273 TraceCheckUtils]: 1: Hoare triple {798#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {798#true} is VALID [2018-11-23 09:55:00,691 INFO L273 TraceCheckUtils]: 2: Hoare triple {798#true} assume true; {798#true} is VALID [2018-11-23 09:55:00,692 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {798#true} {798#true} #175#return; {798#true} is VALID [2018-11-23 09:55:00,692 INFO L256 TraceCheckUtils]: 4: Hoare triple {798#true} call #t~ret24 := main(); {798#true} is VALID [2018-11-23 09:55:00,693 INFO L273 TraceCheckUtils]: 5: Hoare triple {798#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {818#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:00,694 INFO L273 TraceCheckUtils]: 6: Hoare triple {818#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {818#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:00,694 INFO L273 TraceCheckUtils]: 7: Hoare triple {818#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {825#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:00,695 INFO L273 TraceCheckUtils]: 8: Hoare triple {825#(= (_ bv1 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,695 INFO L273 TraceCheckUtils]: 9: Hoare triple {799#false} havoc ~i~0;~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,695 INFO L273 TraceCheckUtils]: 10: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,696 INFO L273 TraceCheckUtils]: 11: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,697 INFO L273 TraceCheckUtils]: 12: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,697 INFO L273 TraceCheckUtils]: 13: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,698 INFO L273 TraceCheckUtils]: 14: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,698 INFO L273 TraceCheckUtils]: 15: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,699 INFO L273 TraceCheckUtils]: 16: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,699 INFO L273 TraceCheckUtils]: 17: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,700 INFO L273 TraceCheckUtils]: 18: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,700 INFO L273 TraceCheckUtils]: 19: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,701 INFO L273 TraceCheckUtils]: 20: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,701 INFO L273 TraceCheckUtils]: 21: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,701 INFO L273 TraceCheckUtils]: 22: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,702 INFO L273 TraceCheckUtils]: 23: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,702 INFO L273 TraceCheckUtils]: 24: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,703 INFO L273 TraceCheckUtils]: 25: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,703 INFO L273 TraceCheckUtils]: 26: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,703 INFO L273 TraceCheckUtils]: 27: Hoare triple {799#false} havoc ~x~0;~x~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,704 INFO L273 TraceCheckUtils]: 28: Hoare triple {799#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {799#false} is VALID [2018-11-23 09:55:00,704 INFO L256 TraceCheckUtils]: 29: Hoare triple {799#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {799#false} is VALID [2018-11-23 09:55:00,704 INFO L273 TraceCheckUtils]: 30: Hoare triple {799#false} ~cond := #in~cond; {799#false} is VALID [2018-11-23 09:55:00,705 INFO L273 TraceCheckUtils]: 31: Hoare triple {799#false} assume 0bv32 == ~cond; {799#false} is VALID [2018-11-23 09:55:00,705 INFO L273 TraceCheckUtils]: 32: Hoare triple {799#false} assume !false; {799#false} is VALID [2018-11-23 09:55:00,707 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:55:00,707 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:00,857 INFO L273 TraceCheckUtils]: 32: Hoare triple {799#false} assume !false; {799#false} is VALID [2018-11-23 09:55:00,858 INFO L273 TraceCheckUtils]: 31: Hoare triple {799#false} assume 0bv32 == ~cond; {799#false} is VALID [2018-11-23 09:55:00,858 INFO L273 TraceCheckUtils]: 30: Hoare triple {799#false} ~cond := #in~cond; {799#false} is VALID [2018-11-23 09:55:00,858 INFO L256 TraceCheckUtils]: 29: Hoare triple {799#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {799#false} is VALID [2018-11-23 09:55:00,859 INFO L273 TraceCheckUtils]: 28: Hoare triple {799#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {799#false} is VALID [2018-11-23 09:55:00,859 INFO L273 TraceCheckUtils]: 27: Hoare triple {799#false} havoc ~x~0;~x~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,859 INFO L273 TraceCheckUtils]: 26: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,860 INFO L273 TraceCheckUtils]: 25: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,860 INFO L273 TraceCheckUtils]: 24: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,861 INFO L273 TraceCheckUtils]: 23: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,861 INFO L273 TraceCheckUtils]: 22: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,861 INFO L273 TraceCheckUtils]: 21: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,862 INFO L273 TraceCheckUtils]: 20: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,862 INFO L273 TraceCheckUtils]: 19: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,862 INFO L273 TraceCheckUtils]: 18: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,862 INFO L273 TraceCheckUtils]: 17: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,863 INFO L273 TraceCheckUtils]: 16: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,863 INFO L273 TraceCheckUtils]: 15: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,863 INFO L273 TraceCheckUtils]: 14: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,864 INFO L273 TraceCheckUtils]: 13: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,864 INFO L273 TraceCheckUtils]: 12: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,864 INFO L273 TraceCheckUtils]: 11: Hoare triple {799#false} ~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,865 INFO L273 TraceCheckUtils]: 10: Hoare triple {799#false} assume !~bvslt32(~i~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,865 INFO L273 TraceCheckUtils]: 9: Hoare triple {799#false} havoc ~i~0;~i~0 := 0bv32; {799#false} is VALID [2018-11-23 09:55:00,868 INFO L273 TraceCheckUtils]: 8: Hoare triple {973#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {799#false} is VALID [2018-11-23 09:55:00,874 INFO L273 TraceCheckUtils]: 7: Hoare triple {977#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {973#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:00,883 INFO L273 TraceCheckUtils]: 6: Hoare triple {977#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {977#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:00,889 INFO L273 TraceCheckUtils]: 5: Hoare triple {798#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {977#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:00,889 INFO L256 TraceCheckUtils]: 4: Hoare triple {798#true} call #t~ret24 := main(); {798#true} is VALID [2018-11-23 09:55:00,890 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {798#true} {798#true} #175#return; {798#true} is VALID [2018-11-23 09:55:00,890 INFO L273 TraceCheckUtils]: 2: Hoare triple {798#true} assume true; {798#true} is VALID [2018-11-23 09:55:00,890 INFO L273 TraceCheckUtils]: 1: Hoare triple {798#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {798#true} is VALID [2018-11-23 09:55:00,891 INFO L256 TraceCheckUtils]: 0: Hoare triple {798#true} call ULTIMATE.init(); {798#true} is VALID [2018-11-23 09:55:00,893 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:55:00,895 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:00,895 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 09:55:00,895 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-11-23 09:55:00,896 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:00,896 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 09:55:00,970 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:00,970 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 09:55:00,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 09:55:00,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 09:55:00,971 INFO L87 Difference]: Start difference. First operand 47 states and 57 transitions. Second operand 6 states. [2018-11-23 09:55:01,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:01,449 INFO L93 Difference]: Finished difference Result 91 states and 113 transitions. [2018-11-23 09:55:01,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 09:55:01,449 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-11-23 09:55:01,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:01,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:01,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 113 transitions. [2018-11-23 09:55:01,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:01,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 113 transitions. [2018-11-23 09:55:01,455 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 113 transitions. [2018-11-23 09:55:01,714 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:01,716 INFO L225 Difference]: With dead ends: 91 [2018-11-23 09:55:01,717 INFO L226 Difference]: Without dead ends: 53 [2018-11-23 09:55:01,718 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 09:55:01,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-23 09:55:01,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-11-23 09:55:01,758 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:01,758 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 53 states. [2018-11-23 09:55:01,758 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-23 09:55:01,758 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-23 09:55:01,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:01,761 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-11-23 09:55:01,761 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-23 09:55:01,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:01,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:01,762 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-23 09:55:01,763 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-23 09:55:01,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:01,766 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-11-23 09:55:01,766 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-23 09:55:01,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:01,767 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:01,767 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:01,767 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:01,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-11-23 09:55:01,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 63 transitions. [2018-11-23 09:55:01,770 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 63 transitions. Word has length 33 [2018-11-23 09:55:01,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:01,770 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 63 transitions. [2018-11-23 09:55:01,771 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 09:55:01,771 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-23 09:55:01,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-23 09:55:01,772 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:01,772 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:01,772 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:01,773 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:01,773 INFO L82 PathProgramCache]: Analyzing trace with hash 1891422270, now seen corresponding path program 2 times [2018-11-23 09:55:01,773 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:01,774 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:01,800 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 09:55:01,851 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 09:55:01,851 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:01,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:01,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:01,921 INFO L256 TraceCheckUtils]: 0: Hoare triple {1307#true} call ULTIMATE.init(); {1307#true} is VALID [2018-11-23 09:55:01,922 INFO L273 TraceCheckUtils]: 1: Hoare triple {1307#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1307#true} is VALID [2018-11-23 09:55:01,922 INFO L273 TraceCheckUtils]: 2: Hoare triple {1307#true} assume true; {1307#true} is VALID [2018-11-23 09:55:01,922 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1307#true} {1307#true} #175#return; {1307#true} is VALID [2018-11-23 09:55:01,923 INFO L256 TraceCheckUtils]: 4: Hoare triple {1307#true} call #t~ret24 := main(); {1307#true} is VALID [2018-11-23 09:55:01,923 INFO L273 TraceCheckUtils]: 5: Hoare triple {1307#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1307#true} is VALID [2018-11-23 09:55:01,923 INFO L273 TraceCheckUtils]: 6: Hoare triple {1307#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1307#true} is VALID [2018-11-23 09:55:01,924 INFO L273 TraceCheckUtils]: 7: Hoare triple {1307#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1307#true} is VALID [2018-11-23 09:55:01,924 INFO L273 TraceCheckUtils]: 8: Hoare triple {1307#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1307#true} is VALID [2018-11-23 09:55:01,924 INFO L273 TraceCheckUtils]: 9: Hoare triple {1307#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1307#true} is VALID [2018-11-23 09:55:01,925 INFO L273 TraceCheckUtils]: 10: Hoare triple {1307#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1307#true} is VALID [2018-11-23 09:55:01,925 INFO L273 TraceCheckUtils]: 11: Hoare triple {1307#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1307#true} is VALID [2018-11-23 09:55:01,925 INFO L273 TraceCheckUtils]: 12: Hoare triple {1307#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1307#true} is VALID [2018-11-23 09:55:01,926 INFO L273 TraceCheckUtils]: 13: Hoare triple {1307#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1307#true} is VALID [2018-11-23 09:55:01,926 INFO L273 TraceCheckUtils]: 14: Hoare triple {1307#true} assume !~bvslt32(~a~0, 100000bv32); {1307#true} is VALID [2018-11-23 09:55:01,926 INFO L273 TraceCheckUtils]: 15: Hoare triple {1307#true} havoc ~i~0;~i~0 := 0bv32; {1357#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:01,931 INFO L273 TraceCheckUtils]: 16: Hoare triple {1357#(= main_~i~0 (_ bv0 32))} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,931 INFO L273 TraceCheckUtils]: 17: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,931 INFO L273 TraceCheckUtils]: 18: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,931 INFO L273 TraceCheckUtils]: 19: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,932 INFO L273 TraceCheckUtils]: 20: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,932 INFO L273 TraceCheckUtils]: 21: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,932 INFO L273 TraceCheckUtils]: 22: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,933 INFO L273 TraceCheckUtils]: 23: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,933 INFO L273 TraceCheckUtils]: 24: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,933 INFO L273 TraceCheckUtils]: 25: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,933 INFO L273 TraceCheckUtils]: 26: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,934 INFO L273 TraceCheckUtils]: 27: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,934 INFO L273 TraceCheckUtils]: 28: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,934 INFO L273 TraceCheckUtils]: 29: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,935 INFO L273 TraceCheckUtils]: 30: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,935 INFO L273 TraceCheckUtils]: 31: Hoare triple {1308#false} ~i~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,935 INFO L273 TraceCheckUtils]: 32: Hoare triple {1308#false} assume !~bvslt32(~i~0, 100000bv32); {1308#false} is VALID [2018-11-23 09:55:01,935 INFO L273 TraceCheckUtils]: 33: Hoare triple {1308#false} havoc ~x~0;~x~0 := 0bv32; {1308#false} is VALID [2018-11-23 09:55:01,935 INFO L273 TraceCheckUtils]: 34: Hoare triple {1308#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1308#false} is VALID [2018-11-23 09:55:01,936 INFO L256 TraceCheckUtils]: 35: Hoare triple {1308#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {1308#false} is VALID [2018-11-23 09:55:01,936 INFO L273 TraceCheckUtils]: 36: Hoare triple {1308#false} ~cond := #in~cond; {1308#false} is VALID [2018-11-23 09:55:01,936 INFO L273 TraceCheckUtils]: 37: Hoare triple {1308#false} assume 0bv32 == ~cond; {1308#false} is VALID [2018-11-23 09:55:01,936 INFO L273 TraceCheckUtils]: 38: Hoare triple {1308#false} assume !false; {1308#false} is VALID [2018-11-23 09:55:01,939 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 09:55:01,939 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 09:55:01,945 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 09:55:01,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 09:55:01,946 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2018-11-23 09:55:01,946 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:01,947 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 09:55:02,002 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:02,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 09:55:02,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 09:55:02,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:02,003 INFO L87 Difference]: Start difference. First operand 53 states and 63 transitions. Second operand 3 states. [2018-11-23 09:55:02,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,344 INFO L93 Difference]: Finished difference Result 106 states and 133 transitions. [2018-11-23 09:55:02,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 09:55:02,345 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2018-11-23 09:55:02,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:02,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:02,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 126 transitions. [2018-11-23 09:55:02,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 09:55:02,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 126 transitions. [2018-11-23 09:55:02,351 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 126 transitions. [2018-11-23 09:55:02,583 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:02,586 INFO L225 Difference]: With dead ends: 106 [2018-11-23 09:55:02,586 INFO L226 Difference]: Without dead ends: 71 [2018-11-23 09:55:02,587 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 09:55:02,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-11-23 09:55:02,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 62. [2018-11-23 09:55:02,677 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:02,677 INFO L82 GeneralOperation]: Start isEquivalent. First operand 71 states. Second operand 62 states. [2018-11-23 09:55:02,678 INFO L74 IsIncluded]: Start isIncluded. First operand 71 states. Second operand 62 states. [2018-11-23 09:55:02,678 INFO L87 Difference]: Start difference. First operand 71 states. Second operand 62 states. [2018-11-23 09:55:02,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,681 INFO L93 Difference]: Finished difference Result 71 states and 81 transitions. [2018-11-23 09:55:02,682 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 81 transitions. [2018-11-23 09:55:02,682 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,682 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,683 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 71 states. [2018-11-23 09:55:02,683 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 71 states. [2018-11-23 09:55:02,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:02,686 INFO L93 Difference]: Finished difference Result 71 states and 81 transitions. [2018-11-23 09:55:02,686 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 81 transitions. [2018-11-23 09:55:02,687 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:02,687 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:02,687 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:02,688 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:02,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-11-23 09:55:02,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 72 transitions. [2018-11-23 09:55:02,691 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 72 transitions. Word has length 39 [2018-11-23 09:55:02,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:02,691 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 72 transitions. [2018-11-23 09:55:02,691 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 09:55:02,691 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 72 transitions. [2018-11-23 09:55:02,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-23 09:55:02,693 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:02,693 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:02,693 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:02,694 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:02,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1196943348, now seen corresponding path program 1 times [2018-11-23 09:55:02,694 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:02,694 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:02,711 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 09:55:02,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:02,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:02,819 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:02,928 INFO L256 TraceCheckUtils]: 0: Hoare triple {1807#true} call ULTIMATE.init(); {1807#true} is VALID [2018-11-23 09:55:02,929 INFO L273 TraceCheckUtils]: 1: Hoare triple {1807#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1807#true} is VALID [2018-11-23 09:55:02,929 INFO L273 TraceCheckUtils]: 2: Hoare triple {1807#true} assume true; {1807#true} is VALID [2018-11-23 09:55:02,930 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1807#true} {1807#true} #175#return; {1807#true} is VALID [2018-11-23 09:55:02,930 INFO L256 TraceCheckUtils]: 4: Hoare triple {1807#true} call #t~ret24 := main(); {1807#true} is VALID [2018-11-23 09:55:02,931 INFO L273 TraceCheckUtils]: 5: Hoare triple {1807#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {1827#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:02,932 INFO L273 TraceCheckUtils]: 6: Hoare triple {1827#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1827#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:02,934 INFO L273 TraceCheckUtils]: 7: Hoare triple {1827#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1834#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:02,934 INFO L273 TraceCheckUtils]: 8: Hoare triple {1834#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1834#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:02,935 INFO L273 TraceCheckUtils]: 9: Hoare triple {1834#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1841#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:02,935 INFO L273 TraceCheckUtils]: 10: Hoare triple {1841#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1841#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:02,936 INFO L273 TraceCheckUtils]: 11: Hoare triple {1841#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1848#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:02,936 INFO L273 TraceCheckUtils]: 12: Hoare triple {1848#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {1848#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:02,937 INFO L273 TraceCheckUtils]: 13: Hoare triple {1848#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1855#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:02,938 INFO L273 TraceCheckUtils]: 14: Hoare triple {1855#(= (_ bv4 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,938 INFO L273 TraceCheckUtils]: 15: Hoare triple {1808#false} havoc ~i~0;~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,939 INFO L273 TraceCheckUtils]: 16: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1808#false} is VALID [2018-11-23 09:55:02,939 INFO L273 TraceCheckUtils]: 17: Hoare triple {1808#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1808#false} is VALID [2018-11-23 09:55:02,939 INFO L273 TraceCheckUtils]: 18: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,940 INFO L273 TraceCheckUtils]: 19: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,940 INFO L273 TraceCheckUtils]: 20: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {1808#false} is VALID [2018-11-23 09:55:02,940 INFO L273 TraceCheckUtils]: 21: Hoare triple {1808#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1808#false} is VALID [2018-11-23 09:55:02,941 INFO L273 TraceCheckUtils]: 22: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,941 INFO L273 TraceCheckUtils]: 23: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,942 INFO L273 TraceCheckUtils]: 24: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {1808#false} is VALID [2018-11-23 09:55:02,942 INFO L273 TraceCheckUtils]: 25: Hoare triple {1808#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1808#false} is VALID [2018-11-23 09:55:02,942 INFO L273 TraceCheckUtils]: 26: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,943 INFO L273 TraceCheckUtils]: 27: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,943 INFO L273 TraceCheckUtils]: 28: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {1808#false} is VALID [2018-11-23 09:55:02,943 INFO L273 TraceCheckUtils]: 29: Hoare triple {1808#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1808#false} is VALID [2018-11-23 09:55:02,944 INFO L273 TraceCheckUtils]: 30: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,944 INFO L273 TraceCheckUtils]: 31: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,944 INFO L273 TraceCheckUtils]: 32: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {1808#false} is VALID [2018-11-23 09:55:02,944 INFO L273 TraceCheckUtils]: 33: Hoare triple {1808#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1808#false} is VALID [2018-11-23 09:55:02,945 INFO L273 TraceCheckUtils]: 34: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,945 INFO L273 TraceCheckUtils]: 35: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,945 INFO L273 TraceCheckUtils]: 36: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {1808#false} is VALID [2018-11-23 09:55:02,946 INFO L273 TraceCheckUtils]: 37: Hoare triple {1808#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1808#false} is VALID [2018-11-23 09:55:02,946 INFO L273 TraceCheckUtils]: 38: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,946 INFO L273 TraceCheckUtils]: 39: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,946 INFO L273 TraceCheckUtils]: 40: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {1808#false} is VALID [2018-11-23 09:55:02,947 INFO L273 TraceCheckUtils]: 41: Hoare triple {1808#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {1808#false} is VALID [2018-11-23 09:55:02,947 INFO L273 TraceCheckUtils]: 42: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,947 INFO L273 TraceCheckUtils]: 43: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,948 INFO L273 TraceCheckUtils]: 44: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {1808#false} is VALID [2018-11-23 09:55:02,948 INFO L273 TraceCheckUtils]: 45: Hoare triple {1808#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1808#false} is VALID [2018-11-23 09:55:02,948 INFO L273 TraceCheckUtils]: 46: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,949 INFO L273 TraceCheckUtils]: 47: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,955 INFO L273 TraceCheckUtils]: 48: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {1808#false} is VALID [2018-11-23 09:55:02,955 INFO L273 TraceCheckUtils]: 49: Hoare triple {1808#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {1808#false} is VALID [2018-11-23 09:55:02,955 INFO L273 TraceCheckUtils]: 50: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:02,955 INFO L273 TraceCheckUtils]: 51: Hoare triple {1808#false} havoc ~x~0;~x~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:02,956 INFO L273 TraceCheckUtils]: 52: Hoare triple {1808#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1808#false} is VALID [2018-11-23 09:55:02,956 INFO L256 TraceCheckUtils]: 53: Hoare triple {1808#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {1808#false} is VALID [2018-11-23 09:55:02,956 INFO L273 TraceCheckUtils]: 54: Hoare triple {1808#false} ~cond := #in~cond; {1808#false} is VALID [2018-11-23 09:55:02,956 INFO L273 TraceCheckUtils]: 55: Hoare triple {1808#false} assume 0bv32 == ~cond; {1808#false} is VALID [2018-11-23 09:55:02,957 INFO L273 TraceCheckUtils]: 56: Hoare triple {1808#false} assume !false; {1808#false} is VALID [2018-11-23 09:55:02,962 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 09:55:02,962 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:03,187 INFO L273 TraceCheckUtils]: 56: Hoare triple {1808#false} assume !false; {1808#false} is VALID [2018-11-23 09:55:03,188 INFO L273 TraceCheckUtils]: 55: Hoare triple {1808#false} assume 0bv32 == ~cond; {1808#false} is VALID [2018-11-23 09:55:03,188 INFO L273 TraceCheckUtils]: 54: Hoare triple {1808#false} ~cond := #in~cond; {1808#false} is VALID [2018-11-23 09:55:03,189 INFO L256 TraceCheckUtils]: 53: Hoare triple {1808#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {1808#false} is VALID [2018-11-23 09:55:03,189 INFO L273 TraceCheckUtils]: 52: Hoare triple {1808#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1808#false} is VALID [2018-11-23 09:55:03,190 INFO L273 TraceCheckUtils]: 51: Hoare triple {1808#false} havoc ~x~0;~x~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,190 INFO L273 TraceCheckUtils]: 50: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,190 INFO L273 TraceCheckUtils]: 49: Hoare triple {1808#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {1808#false} is VALID [2018-11-23 09:55:03,191 INFO L273 TraceCheckUtils]: 48: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {1808#false} is VALID [2018-11-23 09:55:03,191 INFO L273 TraceCheckUtils]: 47: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,191 INFO L273 TraceCheckUtils]: 46: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,191 INFO L273 TraceCheckUtils]: 45: Hoare triple {1808#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1808#false} is VALID [2018-11-23 09:55:03,191 INFO L273 TraceCheckUtils]: 44: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {1808#false} is VALID [2018-11-23 09:55:03,192 INFO L273 TraceCheckUtils]: 43: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,192 INFO L273 TraceCheckUtils]: 42: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,192 INFO L273 TraceCheckUtils]: 41: Hoare triple {1808#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {1808#false} is VALID [2018-11-23 09:55:03,192 INFO L273 TraceCheckUtils]: 40: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {1808#false} is VALID [2018-11-23 09:55:03,193 INFO L273 TraceCheckUtils]: 39: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,193 INFO L273 TraceCheckUtils]: 38: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,193 INFO L273 TraceCheckUtils]: 37: Hoare triple {1808#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1808#false} is VALID [2018-11-23 09:55:03,193 INFO L273 TraceCheckUtils]: 36: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {1808#false} is VALID [2018-11-23 09:55:03,193 INFO L273 TraceCheckUtils]: 35: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,194 INFO L273 TraceCheckUtils]: 34: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,194 INFO L273 TraceCheckUtils]: 33: Hoare triple {1808#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1808#false} is VALID [2018-11-23 09:55:03,194 INFO L273 TraceCheckUtils]: 32: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {1808#false} is VALID [2018-11-23 09:55:03,194 INFO L273 TraceCheckUtils]: 31: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,194 INFO L273 TraceCheckUtils]: 30: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,195 INFO L273 TraceCheckUtils]: 29: Hoare triple {1808#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1808#false} is VALID [2018-11-23 09:55:03,195 INFO L273 TraceCheckUtils]: 28: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {1808#false} is VALID [2018-11-23 09:55:03,195 INFO L273 TraceCheckUtils]: 27: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,196 INFO L273 TraceCheckUtils]: 26: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,196 INFO L273 TraceCheckUtils]: 25: Hoare triple {1808#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1808#false} is VALID [2018-11-23 09:55:03,196 INFO L273 TraceCheckUtils]: 24: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {1808#false} is VALID [2018-11-23 09:55:03,196 INFO L273 TraceCheckUtils]: 23: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,197 INFO L273 TraceCheckUtils]: 22: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,197 INFO L273 TraceCheckUtils]: 21: Hoare triple {1808#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1808#false} is VALID [2018-11-23 09:55:03,197 INFO L273 TraceCheckUtils]: 20: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {1808#false} is VALID [2018-11-23 09:55:03,198 INFO L273 TraceCheckUtils]: 19: Hoare triple {1808#false} ~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,198 INFO L273 TraceCheckUtils]: 18: Hoare triple {1808#false} assume !~bvslt32(~i~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,198 INFO L273 TraceCheckUtils]: 17: Hoare triple {1808#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1808#false} is VALID [2018-11-23 09:55:03,198 INFO L273 TraceCheckUtils]: 16: Hoare triple {1808#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {1808#false} is VALID [2018-11-23 09:55:03,198 INFO L273 TraceCheckUtils]: 15: Hoare triple {1808#false} havoc ~i~0;~i~0 := 0bv32; {1808#false} is VALID [2018-11-23 09:55:03,220 INFO L273 TraceCheckUtils]: 14: Hoare triple {2111#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {1808#false} is VALID [2018-11-23 09:55:03,233 INFO L273 TraceCheckUtils]: 13: Hoare triple {2115#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2111#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:03,237 INFO L273 TraceCheckUtils]: 12: Hoare triple {2115#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2115#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,241 INFO L273 TraceCheckUtils]: 11: Hoare triple {2122#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2115#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,242 INFO L273 TraceCheckUtils]: 10: Hoare triple {2122#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2122#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,246 INFO L273 TraceCheckUtils]: 9: Hoare triple {2129#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2122#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,246 INFO L273 TraceCheckUtils]: 8: Hoare triple {2129#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2129#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,251 INFO L273 TraceCheckUtils]: 7: Hoare triple {2136#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2129#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,251 INFO L273 TraceCheckUtils]: 6: Hoare triple {2136#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2136#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,253 INFO L273 TraceCheckUtils]: 5: Hoare triple {1807#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2136#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:03,253 INFO L256 TraceCheckUtils]: 4: Hoare triple {1807#true} call #t~ret24 := main(); {1807#true} is VALID [2018-11-23 09:55:03,254 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1807#true} {1807#true} #175#return; {1807#true} is VALID [2018-11-23 09:55:03,254 INFO L273 TraceCheckUtils]: 2: Hoare triple {1807#true} assume true; {1807#true} is VALID [2018-11-23 09:55:03,254 INFO L273 TraceCheckUtils]: 1: Hoare triple {1807#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1807#true} is VALID [2018-11-23 09:55:03,254 INFO L256 TraceCheckUtils]: 0: Hoare triple {1807#true} call ULTIMATE.init(); {1807#true} is VALID [2018-11-23 09:55:03,263 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 09:55:03,266 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:03,266 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 09:55:03,267 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2018-11-23 09:55:03,267 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:03,267 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 09:55:03,502 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:03,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 09:55:03,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 09:55:03,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-23 09:55:03,503 INFO L87 Difference]: Start difference. First operand 62 states and 72 transitions. Second operand 12 states. [2018-11-23 09:55:05,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:05,030 INFO L93 Difference]: Finished difference Result 121 states and 146 transitions. [2018-11-23 09:55:05,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 09:55:05,030 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2018-11-23 09:55:05,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:05,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 09:55:05,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 128 transitions. [2018-11-23 09:55:05,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 09:55:05,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 128 transitions. [2018-11-23 09:55:05,037 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 128 transitions. [2018-11-23 09:55:05,344 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:05,348 INFO L225 Difference]: With dead ends: 121 [2018-11-23 09:55:05,348 INFO L226 Difference]: Without dead ends: 74 [2018-11-23 09:55:05,349 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2018-11-23 09:55:05,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-11-23 09:55:05,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2018-11-23 09:55:05,399 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:05,399 INFO L82 GeneralOperation]: Start isEquivalent. First operand 74 states. Second operand 74 states. [2018-11-23 09:55:05,400 INFO L74 IsIncluded]: Start isIncluded. First operand 74 states. Second operand 74 states. [2018-11-23 09:55:05,400 INFO L87 Difference]: Start difference. First operand 74 states. Second operand 74 states. [2018-11-23 09:55:05,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:05,404 INFO L93 Difference]: Finished difference Result 74 states and 84 transitions. [2018-11-23 09:55:05,404 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 84 transitions. [2018-11-23 09:55:05,404 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:05,404 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:05,405 INFO L74 IsIncluded]: Start isIncluded. First operand 74 states. Second operand 74 states. [2018-11-23 09:55:05,405 INFO L87 Difference]: Start difference. First operand 74 states. Second operand 74 states. [2018-11-23 09:55:05,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:05,408 INFO L93 Difference]: Finished difference Result 74 states and 84 transitions. [2018-11-23 09:55:05,408 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 84 transitions. [2018-11-23 09:55:05,409 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:05,409 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:05,409 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:05,409 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:05,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-11-23 09:55:05,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 84 transitions. [2018-11-23 09:55:05,412 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 84 transitions. Word has length 57 [2018-11-23 09:55:05,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:05,413 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 84 transitions. [2018-11-23 09:55:05,413 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 09:55:05,413 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 84 transitions. [2018-11-23 09:55:05,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-23 09:55:05,415 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:05,415 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:05,415 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:05,415 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:05,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1341707456, now seen corresponding path program 2 times [2018-11-23 09:55:05,416 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:05,416 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:05,439 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 09:55:05,657 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 09:55:05,658 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:05,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:05,711 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:05,972 INFO L256 TraceCheckUtils]: 0: Hoare triple {2604#true} call ULTIMATE.init(); {2604#true} is VALID [2018-11-23 09:55:05,972 INFO L273 TraceCheckUtils]: 1: Hoare triple {2604#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2604#true} is VALID [2018-11-23 09:55:05,973 INFO L273 TraceCheckUtils]: 2: Hoare triple {2604#true} assume true; {2604#true} is VALID [2018-11-23 09:55:05,973 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2604#true} {2604#true} #175#return; {2604#true} is VALID [2018-11-23 09:55:05,973 INFO L256 TraceCheckUtils]: 4: Hoare triple {2604#true} call #t~ret24 := main(); {2604#true} is VALID [2018-11-23 09:55:05,973 INFO L273 TraceCheckUtils]: 5: Hoare triple {2604#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {2624#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:05,976 INFO L273 TraceCheckUtils]: 6: Hoare triple {2624#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2624#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:05,976 INFO L273 TraceCheckUtils]: 7: Hoare triple {2624#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2631#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:05,977 INFO L273 TraceCheckUtils]: 8: Hoare triple {2631#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2631#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:05,977 INFO L273 TraceCheckUtils]: 9: Hoare triple {2631#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2638#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:05,977 INFO L273 TraceCheckUtils]: 10: Hoare triple {2638#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2638#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:05,978 INFO L273 TraceCheckUtils]: 11: Hoare triple {2638#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2645#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:05,978 INFO L273 TraceCheckUtils]: 12: Hoare triple {2645#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2645#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:05,979 INFO L273 TraceCheckUtils]: 13: Hoare triple {2645#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2652#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:05,980 INFO L273 TraceCheckUtils]: 14: Hoare triple {2652#(= (_ bv4 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2652#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:05,980 INFO L273 TraceCheckUtils]: 15: Hoare triple {2652#(= (_ bv4 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2659#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:05,981 INFO L273 TraceCheckUtils]: 16: Hoare triple {2659#(= (_ bv5 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2659#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:05,982 INFO L273 TraceCheckUtils]: 17: Hoare triple {2659#(= (_ bv5 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2666#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:05,982 INFO L273 TraceCheckUtils]: 18: Hoare triple {2666#(= (_ bv6 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2666#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:05,983 INFO L273 TraceCheckUtils]: 19: Hoare triple {2666#(= (_ bv6 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2673#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:05,984 INFO L273 TraceCheckUtils]: 20: Hoare triple {2673#(= (_ bv7 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2673#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:05,984 INFO L273 TraceCheckUtils]: 21: Hoare triple {2673#(= (_ bv7 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2680#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:05,985 INFO L273 TraceCheckUtils]: 22: Hoare triple {2680#(= (_ bv8 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2680#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:05,986 INFO L273 TraceCheckUtils]: 23: Hoare triple {2680#(= (_ bv8 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2687#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:05,986 INFO L273 TraceCheckUtils]: 24: Hoare triple {2687#(= (_ bv9 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2687#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:05,987 INFO L273 TraceCheckUtils]: 25: Hoare triple {2687#(= (_ bv9 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2694#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:05,987 INFO L273 TraceCheckUtils]: 26: Hoare triple {2694#(= (_ bv10 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,988 INFO L273 TraceCheckUtils]: 27: Hoare triple {2605#false} havoc ~i~0;~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,988 INFO L273 TraceCheckUtils]: 28: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2605#false} is VALID [2018-11-23 09:55:05,988 INFO L273 TraceCheckUtils]: 29: Hoare triple {2605#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2605#false} is VALID [2018-11-23 09:55:05,989 INFO L273 TraceCheckUtils]: 30: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,989 INFO L273 TraceCheckUtils]: 31: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,989 INFO L273 TraceCheckUtils]: 32: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2605#false} is VALID [2018-11-23 09:55:05,990 INFO L273 TraceCheckUtils]: 33: Hoare triple {2605#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2605#false} is VALID [2018-11-23 09:55:05,990 INFO L273 TraceCheckUtils]: 34: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,990 INFO L273 TraceCheckUtils]: 35: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,991 INFO L273 TraceCheckUtils]: 36: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2605#false} is VALID [2018-11-23 09:55:05,991 INFO L273 TraceCheckUtils]: 37: Hoare triple {2605#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2605#false} is VALID [2018-11-23 09:55:05,991 INFO L273 TraceCheckUtils]: 38: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,991 INFO L273 TraceCheckUtils]: 39: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,991 INFO L273 TraceCheckUtils]: 40: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {2605#false} is VALID [2018-11-23 09:55:05,991 INFO L273 TraceCheckUtils]: 41: Hoare triple {2605#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2605#false} is VALID [2018-11-23 09:55:05,992 INFO L273 TraceCheckUtils]: 42: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,992 INFO L273 TraceCheckUtils]: 43: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,992 INFO L273 TraceCheckUtils]: 44: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2605#false} is VALID [2018-11-23 09:55:05,992 INFO L273 TraceCheckUtils]: 45: Hoare triple {2605#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2605#false} is VALID [2018-11-23 09:55:05,992 INFO L273 TraceCheckUtils]: 46: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,992 INFO L273 TraceCheckUtils]: 47: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,992 INFO L273 TraceCheckUtils]: 48: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2605#false} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 49: Hoare triple {2605#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2605#false} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 50: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 51: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 52: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {2605#false} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 53: Hoare triple {2605#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2605#false} is VALID [2018-11-23 09:55:05,993 INFO L273 TraceCheckUtils]: 54: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,994 INFO L273 TraceCheckUtils]: 55: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,994 INFO L273 TraceCheckUtils]: 56: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {2605#false} is VALID [2018-11-23 09:55:05,994 INFO L273 TraceCheckUtils]: 57: Hoare triple {2605#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {2605#false} is VALID [2018-11-23 09:55:05,994 INFO L273 TraceCheckUtils]: 58: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,994 INFO L273 TraceCheckUtils]: 59: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,994 INFO L273 TraceCheckUtils]: 60: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {2605#false} is VALID [2018-11-23 09:55:05,995 INFO L273 TraceCheckUtils]: 61: Hoare triple {2605#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {2605#false} is VALID [2018-11-23 09:55:05,995 INFO L273 TraceCheckUtils]: 62: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:05,995 INFO L273 TraceCheckUtils]: 63: Hoare triple {2605#false} havoc ~x~0;~x~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:05,995 INFO L273 TraceCheckUtils]: 64: Hoare triple {2605#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2605#false} is VALID [2018-11-23 09:55:05,995 INFO L256 TraceCheckUtils]: 65: Hoare triple {2605#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {2605#false} is VALID [2018-11-23 09:55:05,995 INFO L273 TraceCheckUtils]: 66: Hoare triple {2605#false} ~cond := #in~cond; {2605#false} is VALID [2018-11-23 09:55:05,995 INFO L273 TraceCheckUtils]: 67: Hoare triple {2605#false} assume 0bv32 == ~cond; {2605#false} is VALID [2018-11-23 09:55:05,996 INFO L273 TraceCheckUtils]: 68: Hoare triple {2605#false} assume !false; {2605#false} is VALID [2018-11-23 09:55:05,998 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 09:55:05,998 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:06,784 INFO L273 TraceCheckUtils]: 68: Hoare triple {2605#false} assume !false; {2605#false} is VALID [2018-11-23 09:55:06,785 INFO L273 TraceCheckUtils]: 67: Hoare triple {2605#false} assume 0bv32 == ~cond; {2605#false} is VALID [2018-11-23 09:55:06,785 INFO L273 TraceCheckUtils]: 66: Hoare triple {2605#false} ~cond := #in~cond; {2605#false} is VALID [2018-11-23 09:55:06,785 INFO L256 TraceCheckUtils]: 65: Hoare triple {2605#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {2605#false} is VALID [2018-11-23 09:55:06,786 INFO L273 TraceCheckUtils]: 64: Hoare triple {2605#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2605#false} is VALID [2018-11-23 09:55:06,786 INFO L273 TraceCheckUtils]: 63: Hoare triple {2605#false} havoc ~x~0;~x~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,787 INFO L273 TraceCheckUtils]: 62: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,787 INFO L273 TraceCheckUtils]: 61: Hoare triple {2605#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {2605#false} is VALID [2018-11-23 09:55:06,787 INFO L273 TraceCheckUtils]: 60: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {2605#false} is VALID [2018-11-23 09:55:06,788 INFO L273 TraceCheckUtils]: 59: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,788 INFO L273 TraceCheckUtils]: 58: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,788 INFO L273 TraceCheckUtils]: 57: Hoare triple {2605#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {2605#false} is VALID [2018-11-23 09:55:06,789 INFO L273 TraceCheckUtils]: 56: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {2605#false} is VALID [2018-11-23 09:55:06,789 INFO L273 TraceCheckUtils]: 55: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,789 INFO L273 TraceCheckUtils]: 54: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,789 INFO L273 TraceCheckUtils]: 53: Hoare triple {2605#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2605#false} is VALID [2018-11-23 09:55:06,790 INFO L273 TraceCheckUtils]: 52: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {2605#false} is VALID [2018-11-23 09:55:06,790 INFO L273 TraceCheckUtils]: 51: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,790 INFO L273 TraceCheckUtils]: 50: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,790 INFO L273 TraceCheckUtils]: 49: Hoare triple {2605#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2605#false} is VALID [2018-11-23 09:55:06,791 INFO L273 TraceCheckUtils]: 48: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {2605#false} is VALID [2018-11-23 09:55:06,791 INFO L273 TraceCheckUtils]: 47: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,791 INFO L273 TraceCheckUtils]: 46: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,791 INFO L273 TraceCheckUtils]: 45: Hoare triple {2605#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2605#false} is VALID [2018-11-23 09:55:06,792 INFO L273 TraceCheckUtils]: 44: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {2605#false} is VALID [2018-11-23 09:55:06,792 INFO L273 TraceCheckUtils]: 43: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,792 INFO L273 TraceCheckUtils]: 42: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,792 INFO L273 TraceCheckUtils]: 41: Hoare triple {2605#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2605#false} is VALID [2018-11-23 09:55:06,793 INFO L273 TraceCheckUtils]: 40: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {2605#false} is VALID [2018-11-23 09:55:06,793 INFO L273 TraceCheckUtils]: 39: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,793 INFO L273 TraceCheckUtils]: 38: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,793 INFO L273 TraceCheckUtils]: 37: Hoare triple {2605#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2605#false} is VALID [2018-11-23 09:55:06,794 INFO L273 TraceCheckUtils]: 36: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {2605#false} is VALID [2018-11-23 09:55:06,794 INFO L273 TraceCheckUtils]: 35: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,794 INFO L273 TraceCheckUtils]: 34: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,794 INFO L273 TraceCheckUtils]: 33: Hoare triple {2605#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2605#false} is VALID [2018-11-23 09:55:06,795 INFO L273 TraceCheckUtils]: 32: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {2605#false} is VALID [2018-11-23 09:55:06,795 INFO L273 TraceCheckUtils]: 31: Hoare triple {2605#false} ~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,795 INFO L273 TraceCheckUtils]: 30: Hoare triple {2605#false} assume !~bvslt32(~i~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,795 INFO L273 TraceCheckUtils]: 29: Hoare triple {2605#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2605#false} is VALID [2018-11-23 09:55:06,796 INFO L273 TraceCheckUtils]: 28: Hoare triple {2605#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {2605#false} is VALID [2018-11-23 09:55:06,796 INFO L273 TraceCheckUtils]: 27: Hoare triple {2605#false} havoc ~i~0;~i~0 := 0bv32; {2605#false} is VALID [2018-11-23 09:55:06,803 INFO L273 TraceCheckUtils]: 26: Hoare triple {2950#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {2605#false} is VALID [2018-11-23 09:55:06,805 INFO L273 TraceCheckUtils]: 25: Hoare triple {2954#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2950#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:06,805 INFO L273 TraceCheckUtils]: 24: Hoare triple {2954#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2954#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,813 INFO L273 TraceCheckUtils]: 23: Hoare triple {2961#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2954#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,814 INFO L273 TraceCheckUtils]: 22: Hoare triple {2961#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2961#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,817 INFO L273 TraceCheckUtils]: 21: Hoare triple {2968#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2961#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,818 INFO L273 TraceCheckUtils]: 20: Hoare triple {2968#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2968#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,822 INFO L273 TraceCheckUtils]: 19: Hoare triple {2975#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2968#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,823 INFO L273 TraceCheckUtils]: 18: Hoare triple {2975#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2975#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,829 INFO L273 TraceCheckUtils]: 17: Hoare triple {2982#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2975#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,829 INFO L273 TraceCheckUtils]: 16: Hoare triple {2982#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2982#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,834 INFO L273 TraceCheckUtils]: 15: Hoare triple {2989#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2982#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,834 INFO L273 TraceCheckUtils]: 14: Hoare triple {2989#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2989#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,841 INFO L273 TraceCheckUtils]: 13: Hoare triple {2996#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2989#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,841 INFO L273 TraceCheckUtils]: 12: Hoare triple {2996#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {2996#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,848 INFO L273 TraceCheckUtils]: 11: Hoare triple {3003#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2996#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,849 INFO L273 TraceCheckUtils]: 10: Hoare triple {3003#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3003#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,853 INFO L273 TraceCheckUtils]: 9: Hoare triple {3010#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3003#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,853 INFO L273 TraceCheckUtils]: 8: Hoare triple {3010#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3010#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,859 INFO L273 TraceCheckUtils]: 7: Hoare triple {3017#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3010#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,859 INFO L273 TraceCheckUtils]: 6: Hoare triple {3017#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3017#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,861 INFO L273 TraceCheckUtils]: 5: Hoare triple {2604#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {3017#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:06,862 INFO L256 TraceCheckUtils]: 4: Hoare triple {2604#true} call #t~ret24 := main(); {2604#true} is VALID [2018-11-23 09:55:06,862 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2604#true} {2604#true} #175#return; {2604#true} is VALID [2018-11-23 09:55:06,862 INFO L273 TraceCheckUtils]: 2: Hoare triple {2604#true} assume true; {2604#true} is VALID [2018-11-23 09:55:06,862 INFO L273 TraceCheckUtils]: 1: Hoare triple {2604#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2604#true} is VALID [2018-11-23 09:55:06,863 INFO L256 TraceCheckUtils]: 0: Hoare triple {2604#true} call ULTIMATE.init(); {2604#true} is VALID [2018-11-23 09:55:06,867 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 09:55:06,869 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:06,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 09:55:06,870 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 69 [2018-11-23 09:55:06,871 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:06,871 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 09:55:07,060 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:07,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 09:55:07,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 09:55:07,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-11-23 09:55:07,060 INFO L87 Difference]: Start difference. First operand 74 states and 84 transitions. Second operand 24 states. [2018-11-23 09:55:11,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:11,745 INFO L93 Difference]: Finished difference Result 145 states and 176 transitions. [2018-11-23 09:55:11,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 09:55:11,745 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 69 [2018-11-23 09:55:11,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:11,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 09:55:11,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 158 transitions. [2018-11-23 09:55:11,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 09:55:11,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 158 transitions. [2018-11-23 09:55:11,756 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 158 transitions. [2018-11-23 09:55:12,137 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:12,140 INFO L225 Difference]: With dead ends: 145 [2018-11-23 09:55:12,140 INFO L226 Difference]: Without dead ends: 98 [2018-11-23 09:55:12,141 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2018-11-23 09:55:12,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-23 09:55:12,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-11-23 09:55:12,276 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:12,276 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand 98 states. [2018-11-23 09:55:12,276 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand 98 states. [2018-11-23 09:55:12,276 INFO L87 Difference]: Start difference. First operand 98 states. Second operand 98 states. [2018-11-23 09:55:12,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:12,279 INFO L93 Difference]: Finished difference Result 98 states and 108 transitions. [2018-11-23 09:55:12,279 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2018-11-23 09:55:12,280 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:12,280 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:12,280 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand 98 states. [2018-11-23 09:55:12,280 INFO L87 Difference]: Start difference. First operand 98 states. Second operand 98 states. [2018-11-23 09:55:12,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:12,283 INFO L93 Difference]: Finished difference Result 98 states and 108 transitions. [2018-11-23 09:55:12,284 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2018-11-23 09:55:12,284 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:12,284 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:12,284 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:12,284 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:12,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-23 09:55:12,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2018-11-23 09:55:12,287 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 108 transitions. Word has length 69 [2018-11-23 09:55:12,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:12,288 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 108 transitions. [2018-11-23 09:55:12,288 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 09:55:12,288 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2018-11-23 09:55:12,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 09:55:12,289 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:12,289 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:12,290 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:12,290 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:12,290 INFO L82 PathProgramCache]: Analyzing trace with hash -1226520664, now seen corresponding path program 3 times [2018-11-23 09:55:12,290 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:12,291 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:12,310 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 09:55:12,525 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-23 09:55:12,525 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:12,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:12,562 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:12,680 INFO L256 TraceCheckUtils]: 0: Hoare triple {3617#true} call ULTIMATE.init(); {3617#true} is VALID [2018-11-23 09:55:12,681 INFO L273 TraceCheckUtils]: 1: Hoare triple {3617#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3617#true} is VALID [2018-11-23 09:55:12,681 INFO L273 TraceCheckUtils]: 2: Hoare triple {3617#true} assume true; {3617#true} is VALID [2018-11-23 09:55:12,681 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3617#true} {3617#true} #175#return; {3617#true} is VALID [2018-11-23 09:55:12,681 INFO L256 TraceCheckUtils]: 4: Hoare triple {3617#true} call #t~ret24 := main(); {3617#true} is VALID [2018-11-23 09:55:12,682 INFO L273 TraceCheckUtils]: 5: Hoare triple {3617#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,682 INFO L273 TraceCheckUtils]: 6: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,682 INFO L273 TraceCheckUtils]: 7: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,683 INFO L273 TraceCheckUtils]: 8: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,683 INFO L273 TraceCheckUtils]: 9: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,683 INFO L273 TraceCheckUtils]: 10: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,683 INFO L273 TraceCheckUtils]: 11: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,684 INFO L273 TraceCheckUtils]: 12: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,684 INFO L273 TraceCheckUtils]: 13: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,684 INFO L273 TraceCheckUtils]: 14: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,684 INFO L273 TraceCheckUtils]: 15: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,685 INFO L273 TraceCheckUtils]: 16: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,685 INFO L273 TraceCheckUtils]: 17: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,685 INFO L273 TraceCheckUtils]: 18: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,685 INFO L273 TraceCheckUtils]: 19: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,685 INFO L273 TraceCheckUtils]: 20: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,685 INFO L273 TraceCheckUtils]: 21: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,685 INFO L273 TraceCheckUtils]: 22: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,686 INFO L273 TraceCheckUtils]: 23: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,686 INFO L273 TraceCheckUtils]: 24: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,686 INFO L273 TraceCheckUtils]: 25: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,686 INFO L273 TraceCheckUtils]: 26: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,686 INFO L273 TraceCheckUtils]: 27: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,686 INFO L273 TraceCheckUtils]: 28: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,687 INFO L273 TraceCheckUtils]: 29: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,687 INFO L273 TraceCheckUtils]: 30: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,687 INFO L273 TraceCheckUtils]: 31: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,687 INFO L273 TraceCheckUtils]: 32: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,687 INFO L273 TraceCheckUtils]: 33: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,687 INFO L273 TraceCheckUtils]: 34: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,687 INFO L273 TraceCheckUtils]: 35: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 36: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 37: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 38: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 39: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 40: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 41: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 42: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,688 INFO L273 TraceCheckUtils]: 43: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,689 INFO L273 TraceCheckUtils]: 44: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,689 INFO L273 TraceCheckUtils]: 45: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,689 INFO L273 TraceCheckUtils]: 46: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,689 INFO L273 TraceCheckUtils]: 47: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,689 INFO L273 TraceCheckUtils]: 48: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,689 INFO L273 TraceCheckUtils]: 49: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,689 INFO L273 TraceCheckUtils]: 50: Hoare triple {3617#true} assume !~bvslt32(~a~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 51: Hoare triple {3617#true} havoc ~i~0;~i~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 52: Hoare triple {3617#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 53: Hoare triple {3617#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 54: Hoare triple {3617#true} assume !~bvslt32(~i~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 55: Hoare triple {3617#true} ~i~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 56: Hoare triple {3617#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 57: Hoare triple {3617#true} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3617#true} is VALID [2018-11-23 09:55:12,690 INFO L273 TraceCheckUtils]: 58: Hoare triple {3617#true} assume !~bvslt32(~i~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,691 INFO L273 TraceCheckUtils]: 59: Hoare triple {3617#true} ~i~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,691 INFO L273 TraceCheckUtils]: 60: Hoare triple {3617#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {3617#true} is VALID [2018-11-23 09:55:12,691 INFO L273 TraceCheckUtils]: 61: Hoare triple {3617#true} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3617#true} is VALID [2018-11-23 09:55:12,691 INFO L273 TraceCheckUtils]: 62: Hoare triple {3617#true} assume !~bvslt32(~i~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,691 INFO L273 TraceCheckUtils]: 63: Hoare triple {3617#true} ~i~0 := 0bv32; {3811#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:12,692 INFO L273 TraceCheckUtils]: 64: Hoare triple {3811#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {3811#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 09:55:12,692 INFO L273 TraceCheckUtils]: 65: Hoare triple {3811#(= main_~i~0 (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3818#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 09:55:12,693 INFO L273 TraceCheckUtils]: 66: Hoare triple {3818#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,693 INFO L273 TraceCheckUtils]: 67: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,693 INFO L273 TraceCheckUtils]: 68: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {3618#false} is VALID [2018-11-23 09:55:12,693 INFO L273 TraceCheckUtils]: 69: Hoare triple {3618#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3618#false} is VALID [2018-11-23 09:55:12,693 INFO L273 TraceCheckUtils]: 70: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,693 INFO L273 TraceCheckUtils]: 71: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,693 INFO L273 TraceCheckUtils]: 72: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {3618#false} is VALID [2018-11-23 09:55:12,694 INFO L273 TraceCheckUtils]: 73: Hoare triple {3618#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3618#false} is VALID [2018-11-23 09:55:12,694 INFO L273 TraceCheckUtils]: 74: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,694 INFO L273 TraceCheckUtils]: 75: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,694 INFO L273 TraceCheckUtils]: 76: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {3618#false} is VALID [2018-11-23 09:55:12,694 INFO L273 TraceCheckUtils]: 77: Hoare triple {3618#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3618#false} is VALID [2018-11-23 09:55:12,694 INFO L273 TraceCheckUtils]: 78: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,694 INFO L273 TraceCheckUtils]: 79: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 80: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 81: Hoare triple {3618#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 82: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 83: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 84: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 85: Hoare triple {3618#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 86: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,695 INFO L273 TraceCheckUtils]: 87: Hoare triple {3618#false} havoc ~x~0;~x~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,696 INFO L273 TraceCheckUtils]: 88: Hoare triple {3618#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3618#false} is VALID [2018-11-23 09:55:12,696 INFO L256 TraceCheckUtils]: 89: Hoare triple {3618#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {3618#false} is VALID [2018-11-23 09:55:12,696 INFO L273 TraceCheckUtils]: 90: Hoare triple {3618#false} ~cond := #in~cond; {3618#false} is VALID [2018-11-23 09:55:12,696 INFO L273 TraceCheckUtils]: 91: Hoare triple {3618#false} assume 0bv32 == ~cond; {3618#false} is VALID [2018-11-23 09:55:12,696 INFO L273 TraceCheckUtils]: 92: Hoare triple {3618#false} assume !false; {3618#false} is VALID [2018-11-23 09:55:12,702 INFO L134 CoverageAnalysis]: Checked inductivity of 493 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 492 trivial. 0 not checked. [2018-11-23 09:55:12,703 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:12,842 INFO L273 TraceCheckUtils]: 92: Hoare triple {3618#false} assume !false; {3618#false} is VALID [2018-11-23 09:55:12,842 INFO L273 TraceCheckUtils]: 91: Hoare triple {3618#false} assume 0bv32 == ~cond; {3618#false} is VALID [2018-11-23 09:55:12,842 INFO L273 TraceCheckUtils]: 90: Hoare triple {3618#false} ~cond := #in~cond; {3618#false} is VALID [2018-11-23 09:55:12,842 INFO L256 TraceCheckUtils]: 89: Hoare triple {3618#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 88: Hoare triple {3618#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 87: Hoare triple {3618#false} havoc ~x~0;~x~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 86: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 85: Hoare triple {3618#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 84: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 83: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 82: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,843 INFO L273 TraceCheckUtils]: 81: Hoare triple {3618#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3618#false} is VALID [2018-11-23 09:55:12,844 INFO L273 TraceCheckUtils]: 80: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {3618#false} is VALID [2018-11-23 09:55:12,844 INFO L273 TraceCheckUtils]: 79: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,844 INFO L273 TraceCheckUtils]: 78: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,844 INFO L273 TraceCheckUtils]: 77: Hoare triple {3618#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3618#false} is VALID [2018-11-23 09:55:12,844 INFO L273 TraceCheckUtils]: 76: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {3618#false} is VALID [2018-11-23 09:55:12,844 INFO L273 TraceCheckUtils]: 75: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,844 INFO L273 TraceCheckUtils]: 74: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,845 INFO L273 TraceCheckUtils]: 73: Hoare triple {3618#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3618#false} is VALID [2018-11-23 09:55:12,845 INFO L273 TraceCheckUtils]: 72: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {3618#false} is VALID [2018-11-23 09:55:12,845 INFO L273 TraceCheckUtils]: 71: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,845 INFO L273 TraceCheckUtils]: 70: Hoare triple {3618#false} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,845 INFO L273 TraceCheckUtils]: 69: Hoare triple {3618#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3618#false} is VALID [2018-11-23 09:55:12,846 INFO L273 TraceCheckUtils]: 68: Hoare triple {3618#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {3618#false} is VALID [2018-11-23 09:55:12,846 INFO L273 TraceCheckUtils]: 67: Hoare triple {3618#false} ~i~0 := 0bv32; {3618#false} is VALID [2018-11-23 09:55:12,857 INFO L273 TraceCheckUtils]: 66: Hoare triple {3978#(bvslt main_~i~0 (_ bv100000 32))} assume !~bvslt32(~i~0, 100000bv32); {3618#false} is VALID [2018-11-23 09:55:12,858 INFO L273 TraceCheckUtils]: 65: Hoare triple {3982#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3978#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:12,858 INFO L273 TraceCheckUtils]: 64: Hoare triple {3982#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {3982#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 63: Hoare triple {3617#true} ~i~0 := 0bv32; {3982#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 62: Hoare triple {3617#true} assume !~bvslt32(~i~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 61: Hoare triple {3617#true} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3617#true} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 60: Hoare triple {3617#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {3617#true} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 59: Hoare triple {3617#true} ~i~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 58: Hoare triple {3617#true} assume !~bvslt32(~i~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 57: Hoare triple {3617#true} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3617#true} is VALID [2018-11-23 09:55:12,859 INFO L273 TraceCheckUtils]: 56: Hoare triple {3617#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {3617#true} is VALID [2018-11-23 09:55:12,860 INFO L273 TraceCheckUtils]: 55: Hoare triple {3617#true} ~i~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,860 INFO L273 TraceCheckUtils]: 54: Hoare triple {3617#true} assume !~bvslt32(~i~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,860 INFO L273 TraceCheckUtils]: 53: Hoare triple {3617#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3617#true} is VALID [2018-11-23 09:55:12,860 INFO L273 TraceCheckUtils]: 52: Hoare triple {3617#true} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {3617#true} is VALID [2018-11-23 09:55:12,860 INFO L273 TraceCheckUtils]: 51: Hoare triple {3617#true} havoc ~i~0;~i~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,860 INFO L273 TraceCheckUtils]: 50: Hoare triple {3617#true} assume !~bvslt32(~a~0, 100000bv32); {3617#true} is VALID [2018-11-23 09:55:12,860 INFO L273 TraceCheckUtils]: 49: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 48: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 47: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 46: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 45: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 44: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 43: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 42: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,861 INFO L273 TraceCheckUtils]: 41: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,862 INFO L273 TraceCheckUtils]: 40: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,863 INFO L273 TraceCheckUtils]: 39: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,863 INFO L273 TraceCheckUtils]: 38: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,863 INFO L273 TraceCheckUtils]: 37: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,863 INFO L273 TraceCheckUtils]: 36: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,863 INFO L273 TraceCheckUtils]: 35: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,864 INFO L273 TraceCheckUtils]: 34: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,864 INFO L273 TraceCheckUtils]: 33: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,864 INFO L273 TraceCheckUtils]: 32: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,864 INFO L273 TraceCheckUtils]: 31: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,864 INFO L273 TraceCheckUtils]: 30: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,865 INFO L273 TraceCheckUtils]: 29: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,865 INFO L273 TraceCheckUtils]: 28: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,865 INFO L273 TraceCheckUtils]: 27: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,865 INFO L273 TraceCheckUtils]: 26: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,865 INFO L273 TraceCheckUtils]: 25: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,865 INFO L273 TraceCheckUtils]: 24: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,866 INFO L273 TraceCheckUtils]: 23: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,866 INFO L273 TraceCheckUtils]: 22: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,866 INFO L273 TraceCheckUtils]: 21: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,866 INFO L273 TraceCheckUtils]: 20: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,866 INFO L273 TraceCheckUtils]: 19: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,866 INFO L273 TraceCheckUtils]: 18: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,867 INFO L273 TraceCheckUtils]: 17: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,867 INFO L273 TraceCheckUtils]: 16: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,867 INFO L273 TraceCheckUtils]: 15: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,867 INFO L273 TraceCheckUtils]: 14: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,867 INFO L273 TraceCheckUtils]: 13: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,867 INFO L273 TraceCheckUtils]: 12: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,868 INFO L273 TraceCheckUtils]: 11: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,868 INFO L273 TraceCheckUtils]: 10: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,868 INFO L273 TraceCheckUtils]: 9: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,868 INFO L273 TraceCheckUtils]: 8: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,868 INFO L273 TraceCheckUtils]: 7: Hoare triple {3617#true} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3617#true} is VALID [2018-11-23 09:55:12,868 INFO L273 TraceCheckUtils]: 6: Hoare triple {3617#true} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {3617#true} is VALID [2018-11-23 09:55:12,868 INFO L273 TraceCheckUtils]: 5: Hoare triple {3617#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {3617#true} is VALID [2018-11-23 09:55:12,869 INFO L256 TraceCheckUtils]: 4: Hoare triple {3617#true} call #t~ret24 := main(); {3617#true} is VALID [2018-11-23 09:55:12,869 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3617#true} {3617#true} #175#return; {3617#true} is VALID [2018-11-23 09:55:12,869 INFO L273 TraceCheckUtils]: 2: Hoare triple {3617#true} assume true; {3617#true} is VALID [2018-11-23 09:55:12,869 INFO L273 TraceCheckUtils]: 1: Hoare triple {3617#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3617#true} is VALID [2018-11-23 09:55:12,869 INFO L256 TraceCheckUtils]: 0: Hoare triple {3617#true} call ULTIMATE.init(); {3617#true} is VALID [2018-11-23 09:55:12,873 INFO L134 CoverageAnalysis]: Checked inductivity of 493 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 492 trivial. 0 not checked. [2018-11-23 09:55:12,875 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:12,875 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 09:55:12,876 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-23 09:55:12,876 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:12,876 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 09:55:12,949 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:12,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 09:55:12,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 09:55:12,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 09:55:12,950 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand 6 states. [2018-11-23 09:55:14,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:14,036 INFO L93 Difference]: Finished difference Result 195 states and 240 transitions. [2018-11-23 09:55:14,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 09:55:14,036 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-23 09:55:14,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:14,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:14,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 189 transitions. [2018-11-23 09:55:14,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 09:55:14,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 189 transitions. [2018-11-23 09:55:14,045 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 189 transitions. [2018-11-23 09:55:14,394 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:14,397 INFO L225 Difference]: With dead ends: 195 [2018-11-23 09:55:14,397 INFO L226 Difference]: Without dead ends: 152 [2018-11-23 09:55:14,398 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 182 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 09:55:14,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-11-23 09:55:14,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-11-23 09:55:14,474 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:14,474 INFO L82 GeneralOperation]: Start isEquivalent. First operand 152 states. Second operand 152 states. [2018-11-23 09:55:14,474 INFO L74 IsIncluded]: Start isIncluded. First operand 152 states. Second operand 152 states. [2018-11-23 09:55:14,474 INFO L87 Difference]: Start difference. First operand 152 states. Second operand 152 states. [2018-11-23 09:55:14,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:14,480 INFO L93 Difference]: Finished difference Result 152 states and 162 transitions. [2018-11-23 09:55:14,480 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 162 transitions. [2018-11-23 09:55:14,480 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:14,481 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:14,481 INFO L74 IsIncluded]: Start isIncluded. First operand 152 states. Second operand 152 states. [2018-11-23 09:55:14,481 INFO L87 Difference]: Start difference. First operand 152 states. Second operand 152 states. [2018-11-23 09:55:14,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:14,486 INFO L93 Difference]: Finished difference Result 152 states and 162 transitions. [2018-11-23 09:55:14,486 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 162 transitions. [2018-11-23 09:55:14,487 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:14,487 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:14,487 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:14,487 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:14,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-11-23 09:55:14,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 162 transitions. [2018-11-23 09:55:14,492 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 162 transitions. Word has length 93 [2018-11-23 09:55:14,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:14,492 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 162 transitions. [2018-11-23 09:55:14,492 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 09:55:14,492 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 162 transitions. [2018-11-23 09:55:14,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-11-23 09:55:14,494 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:14,494 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:14,495 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:14,495 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:14,495 INFO L82 PathProgramCache]: Analyzing trace with hash 1841382674, now seen corresponding path program 4 times [2018-11-23 09:55:14,496 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:14,496 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:14,522 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 09:55:14,736 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 09:55:14,736 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 09:55:14,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:55:14,814 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 09:55:15,505 INFO L256 TraceCheckUtils]: 0: Hoare triple {5003#true} call ULTIMATE.init(); {5003#true} is VALID [2018-11-23 09:55:15,505 INFO L273 TraceCheckUtils]: 1: Hoare triple {5003#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {5003#true} is VALID [2018-11-23 09:55:15,506 INFO L273 TraceCheckUtils]: 2: Hoare triple {5003#true} assume true; {5003#true} is VALID [2018-11-23 09:55:15,506 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5003#true} {5003#true} #175#return; {5003#true} is VALID [2018-11-23 09:55:15,506 INFO L256 TraceCheckUtils]: 4: Hoare triple {5003#true} call #t~ret24 := main(); {5003#true} is VALID [2018-11-23 09:55:15,507 INFO L273 TraceCheckUtils]: 5: Hoare triple {5003#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {5023#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:15,507 INFO L273 TraceCheckUtils]: 6: Hoare triple {5023#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5023#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-23 09:55:15,508 INFO L273 TraceCheckUtils]: 7: Hoare triple {5023#(= main_~a~0 (_ bv0 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5030#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:15,508 INFO L273 TraceCheckUtils]: 8: Hoare triple {5030#(= (_ bv1 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5030#(= (_ bv1 32) main_~a~0)} is VALID [2018-11-23 09:55:15,509 INFO L273 TraceCheckUtils]: 9: Hoare triple {5030#(= (_ bv1 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5037#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:15,509 INFO L273 TraceCheckUtils]: 10: Hoare triple {5037#(= (_ bv2 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5037#(= (_ bv2 32) main_~a~0)} is VALID [2018-11-23 09:55:15,510 INFO L273 TraceCheckUtils]: 11: Hoare triple {5037#(= (_ bv2 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5044#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:15,510 INFO L273 TraceCheckUtils]: 12: Hoare triple {5044#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5044#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-23 09:55:15,511 INFO L273 TraceCheckUtils]: 13: Hoare triple {5044#(= (_ bv3 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5051#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:15,512 INFO L273 TraceCheckUtils]: 14: Hoare triple {5051#(= (_ bv4 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5051#(= (_ bv4 32) main_~a~0)} is VALID [2018-11-23 09:55:15,513 INFO L273 TraceCheckUtils]: 15: Hoare triple {5051#(= (_ bv4 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5058#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:15,513 INFO L273 TraceCheckUtils]: 16: Hoare triple {5058#(= (_ bv5 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5058#(= (_ bv5 32) main_~a~0)} is VALID [2018-11-23 09:55:15,514 INFO L273 TraceCheckUtils]: 17: Hoare triple {5058#(= (_ bv5 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5065#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:15,514 INFO L273 TraceCheckUtils]: 18: Hoare triple {5065#(= (_ bv6 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5065#(= (_ bv6 32) main_~a~0)} is VALID [2018-11-23 09:55:15,515 INFO L273 TraceCheckUtils]: 19: Hoare triple {5065#(= (_ bv6 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5072#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:15,516 INFO L273 TraceCheckUtils]: 20: Hoare triple {5072#(= (_ bv7 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5072#(= (_ bv7 32) main_~a~0)} is VALID [2018-11-23 09:55:15,517 INFO L273 TraceCheckUtils]: 21: Hoare triple {5072#(= (_ bv7 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5079#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:15,517 INFO L273 TraceCheckUtils]: 22: Hoare triple {5079#(= (_ bv8 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5079#(= (_ bv8 32) main_~a~0)} is VALID [2018-11-23 09:55:15,518 INFO L273 TraceCheckUtils]: 23: Hoare triple {5079#(= (_ bv8 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5086#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:15,519 INFO L273 TraceCheckUtils]: 24: Hoare triple {5086#(= (_ bv9 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5086#(= (_ bv9 32) main_~a~0)} is VALID [2018-11-23 09:55:15,519 INFO L273 TraceCheckUtils]: 25: Hoare triple {5086#(= (_ bv9 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5093#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:15,520 INFO L273 TraceCheckUtils]: 26: Hoare triple {5093#(= (_ bv10 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5093#(= (_ bv10 32) main_~a~0)} is VALID [2018-11-23 09:55:15,521 INFO L273 TraceCheckUtils]: 27: Hoare triple {5093#(= (_ bv10 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5100#(= (_ bv11 32) main_~a~0)} is VALID [2018-11-23 09:55:15,521 INFO L273 TraceCheckUtils]: 28: Hoare triple {5100#(= (_ bv11 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5100#(= (_ bv11 32) main_~a~0)} is VALID [2018-11-23 09:55:15,522 INFO L273 TraceCheckUtils]: 29: Hoare triple {5100#(= (_ bv11 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5107#(= (_ bv12 32) main_~a~0)} is VALID [2018-11-23 09:55:15,523 INFO L273 TraceCheckUtils]: 30: Hoare triple {5107#(= (_ bv12 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5107#(= (_ bv12 32) main_~a~0)} is VALID [2018-11-23 09:55:15,524 INFO L273 TraceCheckUtils]: 31: Hoare triple {5107#(= (_ bv12 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5114#(= (_ bv13 32) main_~a~0)} is VALID [2018-11-23 09:55:15,524 INFO L273 TraceCheckUtils]: 32: Hoare triple {5114#(= (_ bv13 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5114#(= (_ bv13 32) main_~a~0)} is VALID [2018-11-23 09:55:15,525 INFO L273 TraceCheckUtils]: 33: Hoare triple {5114#(= (_ bv13 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5121#(= (_ bv14 32) main_~a~0)} is VALID [2018-11-23 09:55:15,526 INFO L273 TraceCheckUtils]: 34: Hoare triple {5121#(= (_ bv14 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5121#(= (_ bv14 32) main_~a~0)} is VALID [2018-11-23 09:55:15,540 INFO L273 TraceCheckUtils]: 35: Hoare triple {5121#(= (_ bv14 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5128#(= (_ bv15 32) main_~a~0)} is VALID [2018-11-23 09:55:15,541 INFO L273 TraceCheckUtils]: 36: Hoare triple {5128#(= (_ bv15 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5128#(= (_ bv15 32) main_~a~0)} is VALID [2018-11-23 09:55:15,541 INFO L273 TraceCheckUtils]: 37: Hoare triple {5128#(= (_ bv15 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5135#(= (_ bv16 32) main_~a~0)} is VALID [2018-11-23 09:55:15,542 INFO L273 TraceCheckUtils]: 38: Hoare triple {5135#(= (_ bv16 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5135#(= (_ bv16 32) main_~a~0)} is VALID [2018-11-23 09:55:15,542 INFO L273 TraceCheckUtils]: 39: Hoare triple {5135#(= (_ bv16 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5142#(= (_ bv17 32) main_~a~0)} is VALID [2018-11-23 09:55:15,542 INFO L273 TraceCheckUtils]: 40: Hoare triple {5142#(= (_ bv17 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5142#(= (_ bv17 32) main_~a~0)} is VALID [2018-11-23 09:55:15,543 INFO L273 TraceCheckUtils]: 41: Hoare triple {5142#(= (_ bv17 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5149#(= (_ bv18 32) main_~a~0)} is VALID [2018-11-23 09:55:15,543 INFO L273 TraceCheckUtils]: 42: Hoare triple {5149#(= (_ bv18 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5149#(= (_ bv18 32) main_~a~0)} is VALID [2018-11-23 09:55:15,544 INFO L273 TraceCheckUtils]: 43: Hoare triple {5149#(= (_ bv18 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5156#(= (_ bv19 32) main_~a~0)} is VALID [2018-11-23 09:55:15,544 INFO L273 TraceCheckUtils]: 44: Hoare triple {5156#(= (_ bv19 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5156#(= (_ bv19 32) main_~a~0)} is VALID [2018-11-23 09:55:15,545 INFO L273 TraceCheckUtils]: 45: Hoare triple {5156#(= (_ bv19 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5163#(= (_ bv20 32) main_~a~0)} is VALID [2018-11-23 09:55:15,545 INFO L273 TraceCheckUtils]: 46: Hoare triple {5163#(= (_ bv20 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5163#(= (_ bv20 32) main_~a~0)} is VALID [2018-11-23 09:55:15,546 INFO L273 TraceCheckUtils]: 47: Hoare triple {5163#(= (_ bv20 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5170#(= (_ bv21 32) main_~a~0)} is VALID [2018-11-23 09:55:15,547 INFO L273 TraceCheckUtils]: 48: Hoare triple {5170#(= (_ bv21 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5170#(= (_ bv21 32) main_~a~0)} is VALID [2018-11-23 09:55:15,547 INFO L273 TraceCheckUtils]: 49: Hoare triple {5170#(= (_ bv21 32) main_~a~0)} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5177#(= (_ bv22 32) main_~a~0)} is VALID [2018-11-23 09:55:15,548 INFO L273 TraceCheckUtils]: 50: Hoare triple {5177#(= (_ bv22 32) main_~a~0)} assume !~bvslt32(~a~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,548 INFO L273 TraceCheckUtils]: 51: Hoare triple {5004#false} havoc ~i~0;~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,549 INFO L273 TraceCheckUtils]: 52: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:15,549 INFO L273 TraceCheckUtils]: 53: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:15,549 INFO L273 TraceCheckUtils]: 54: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:15,549 INFO L273 TraceCheckUtils]: 55: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:15,550 INFO L273 TraceCheckUtils]: 56: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:15,550 INFO L273 TraceCheckUtils]: 57: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:15,550 INFO L273 TraceCheckUtils]: 58: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:15,550 INFO L273 TraceCheckUtils]: 59: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:15,551 INFO L273 TraceCheckUtils]: 60: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,551 INFO L273 TraceCheckUtils]: 61: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,551 INFO L273 TraceCheckUtils]: 62: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:15,552 INFO L273 TraceCheckUtils]: 63: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:15,552 INFO L273 TraceCheckUtils]: 64: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:15,552 INFO L273 TraceCheckUtils]: 65: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:15,553 INFO L273 TraceCheckUtils]: 66: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:15,553 INFO L273 TraceCheckUtils]: 67: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:15,553 INFO L273 TraceCheckUtils]: 68: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:15,553 INFO L273 TraceCheckUtils]: 69: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:15,554 INFO L273 TraceCheckUtils]: 70: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,554 INFO L273 TraceCheckUtils]: 71: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,554 INFO L273 TraceCheckUtils]: 72: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:15,554 INFO L273 TraceCheckUtils]: 73: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:15,554 INFO L273 TraceCheckUtils]: 74: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:15,555 INFO L273 TraceCheckUtils]: 75: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:15,555 INFO L273 TraceCheckUtils]: 76: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:15,555 INFO L273 TraceCheckUtils]: 77: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:15,555 INFO L273 TraceCheckUtils]: 78: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:15,556 INFO L273 TraceCheckUtils]: 79: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:15,556 INFO L273 TraceCheckUtils]: 80: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,556 INFO L273 TraceCheckUtils]: 81: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,556 INFO L273 TraceCheckUtils]: 82: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:15,556 INFO L273 TraceCheckUtils]: 83: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:15,557 INFO L273 TraceCheckUtils]: 84: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:15,557 INFO L273 TraceCheckUtils]: 85: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:15,557 INFO L273 TraceCheckUtils]: 86: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:15,557 INFO L273 TraceCheckUtils]: 87: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:15,557 INFO L273 TraceCheckUtils]: 88: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:15,558 INFO L273 TraceCheckUtils]: 89: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:15,558 INFO L273 TraceCheckUtils]: 90: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,558 INFO L273 TraceCheckUtils]: 91: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,558 INFO L273 TraceCheckUtils]: 92: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:15,559 INFO L273 TraceCheckUtils]: 93: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:15,559 INFO L273 TraceCheckUtils]: 94: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:15,559 INFO L273 TraceCheckUtils]: 95: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:15,559 INFO L273 TraceCheckUtils]: 96: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:15,559 INFO L273 TraceCheckUtils]: 97: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:15,560 INFO L273 TraceCheckUtils]: 98: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:15,560 INFO L273 TraceCheckUtils]: 99: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:15,560 INFO L273 TraceCheckUtils]: 100: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,560 INFO L273 TraceCheckUtils]: 101: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,560 INFO L273 TraceCheckUtils]: 102: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:15,561 INFO L273 TraceCheckUtils]: 103: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:15,561 INFO L273 TraceCheckUtils]: 104: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:15,561 INFO L273 TraceCheckUtils]: 105: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:15,561 INFO L273 TraceCheckUtils]: 106: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:15,561 INFO L273 TraceCheckUtils]: 107: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:15,562 INFO L273 TraceCheckUtils]: 108: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:15,562 INFO L273 TraceCheckUtils]: 109: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:15,562 INFO L273 TraceCheckUtils]: 110: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,562 INFO L273 TraceCheckUtils]: 111: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,563 INFO L273 TraceCheckUtils]: 112: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:15,563 INFO L273 TraceCheckUtils]: 113: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:15,563 INFO L273 TraceCheckUtils]: 114: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:15,563 INFO L273 TraceCheckUtils]: 115: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:15,563 INFO L273 TraceCheckUtils]: 116: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:15,564 INFO L273 TraceCheckUtils]: 117: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:15,564 INFO L273 TraceCheckUtils]: 118: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:15,564 INFO L273 TraceCheckUtils]: 119: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:15,564 INFO L273 TraceCheckUtils]: 120: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,564 INFO L273 TraceCheckUtils]: 121: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,565 INFO L273 TraceCheckUtils]: 122: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:15,565 INFO L273 TraceCheckUtils]: 123: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:15,565 INFO L273 TraceCheckUtils]: 124: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:15,565 INFO L273 TraceCheckUtils]: 125: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:15,565 INFO L273 TraceCheckUtils]: 126: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:15,566 INFO L273 TraceCheckUtils]: 127: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:15,566 INFO L273 TraceCheckUtils]: 128: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:15,566 INFO L273 TraceCheckUtils]: 129: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:15,566 INFO L273 TraceCheckUtils]: 130: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,567 INFO L273 TraceCheckUtils]: 131: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,567 INFO L273 TraceCheckUtils]: 132: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:15,567 INFO L273 TraceCheckUtils]: 133: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:15,567 INFO L273 TraceCheckUtils]: 134: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:15,567 INFO L273 TraceCheckUtils]: 135: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:15,568 INFO L273 TraceCheckUtils]: 136: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:15,568 INFO L273 TraceCheckUtils]: 137: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:15,568 INFO L273 TraceCheckUtils]: 138: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:15,568 INFO L273 TraceCheckUtils]: 139: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:15,568 INFO L273 TraceCheckUtils]: 140: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:15,569 INFO L273 TraceCheckUtils]: 141: Hoare triple {5004#false} havoc ~x~0;~x~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:15,569 INFO L273 TraceCheckUtils]: 142: Hoare triple {5004#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {5004#false} is VALID [2018-11-23 09:55:15,569 INFO L256 TraceCheckUtils]: 143: Hoare triple {5004#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {5004#false} is VALID [2018-11-23 09:55:15,569 INFO L273 TraceCheckUtils]: 144: Hoare triple {5004#false} ~cond := #in~cond; {5004#false} is VALID [2018-11-23 09:55:15,569 INFO L273 TraceCheckUtils]: 145: Hoare triple {5004#false} assume 0bv32 == ~cond; {5004#false} is VALID [2018-11-23 09:55:15,570 INFO L273 TraceCheckUtils]: 146: Hoare triple {5004#false} assume !false; {5004#false} is VALID [2018-11-23 09:55:15,606 INFO L134 CoverageAnalysis]: Checked inductivity of 628 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-11-23 09:55:15,606 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 09:55:17,681 INFO L273 TraceCheckUtils]: 146: Hoare triple {5004#false} assume !false; {5004#false} is VALID [2018-11-23 09:55:17,682 INFO L273 TraceCheckUtils]: 145: Hoare triple {5004#false} assume 0bv32 == ~cond; {5004#false} is VALID [2018-11-23 09:55:17,682 INFO L273 TraceCheckUtils]: 144: Hoare triple {5004#false} ~cond := #in~cond; {5004#false} is VALID [2018-11-23 09:55:17,682 INFO L256 TraceCheckUtils]: 143: Hoare triple {5004#false} call __VERIFIER_assert((if #t~mem22 == #t~mem23 then 1bv32 else 0bv32)); {5004#false} is VALID [2018-11-23 09:55:17,682 INFO L273 TraceCheckUtils]: 142: Hoare triple {5004#false} assume !!~bvslt32(~x~0, 100000bv32);call #t~mem22 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem23 := read~intINTTYPE4(~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {5004#false} is VALID [2018-11-23 09:55:17,682 INFO L273 TraceCheckUtils]: 141: Hoare triple {5004#false} havoc ~x~0;~x~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,682 INFO L273 TraceCheckUtils]: 140: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,682 INFO L273 TraceCheckUtils]: 139: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 138: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 137: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 136: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 135: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 134: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 133: Hoare triple {5004#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 132: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem20 := read~intINTTYPE4(~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem20, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem20; {5004#false} is VALID [2018-11-23 09:55:17,683 INFO L273 TraceCheckUtils]: 131: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 130: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 129: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 128: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 127: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 126: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 125: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 124: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:17,684 INFO L273 TraceCheckUtils]: 123: Hoare triple {5004#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5004#false} is VALID [2018-11-23 09:55:17,685 INFO L273 TraceCheckUtils]: 122: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem18 := read~intINTTYPE4(~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem18, ~#a0~0.base, ~bvadd32(~#a0~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem18; {5004#false} is VALID [2018-11-23 09:55:17,685 INFO L273 TraceCheckUtils]: 121: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,685 INFO L273 TraceCheckUtils]: 120: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,685 INFO L273 TraceCheckUtils]: 119: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:17,685 INFO L273 TraceCheckUtils]: 118: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:17,685 INFO L273 TraceCheckUtils]: 117: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:17,686 INFO L273 TraceCheckUtils]: 116: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:17,686 INFO L273 TraceCheckUtils]: 115: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:17,686 INFO L273 TraceCheckUtils]: 114: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:17,686 INFO L273 TraceCheckUtils]: 113: Hoare triple {5004#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5004#false} is VALID [2018-11-23 09:55:17,686 INFO L273 TraceCheckUtils]: 112: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem16 := read~intINTTYPE4(~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem16, ~#a8~0.base, ~bvadd32(~#a8~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem16; {5004#false} is VALID [2018-11-23 09:55:17,687 INFO L273 TraceCheckUtils]: 111: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,687 INFO L273 TraceCheckUtils]: 110: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,687 INFO L273 TraceCheckUtils]: 109: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:17,687 INFO L273 TraceCheckUtils]: 108: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:17,687 INFO L273 TraceCheckUtils]: 107: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:17,687 INFO L273 TraceCheckUtils]: 106: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:17,688 INFO L273 TraceCheckUtils]: 105: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:17,688 INFO L273 TraceCheckUtils]: 104: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:17,688 INFO L273 TraceCheckUtils]: 103: Hoare triple {5004#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5004#false} is VALID [2018-11-23 09:55:17,688 INFO L273 TraceCheckUtils]: 102: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem14 := read~intINTTYPE4(~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem14, ~#a7~0.base, ~bvadd32(~#a7~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem14; {5004#false} is VALID [2018-11-23 09:55:17,688 INFO L273 TraceCheckUtils]: 101: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,688 INFO L273 TraceCheckUtils]: 100: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,689 INFO L273 TraceCheckUtils]: 99: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:17,689 INFO L273 TraceCheckUtils]: 98: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:17,689 INFO L273 TraceCheckUtils]: 97: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:17,689 INFO L273 TraceCheckUtils]: 96: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:17,689 INFO L273 TraceCheckUtils]: 95: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:17,690 INFO L273 TraceCheckUtils]: 94: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:17,690 INFO L273 TraceCheckUtils]: 93: Hoare triple {5004#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5004#false} is VALID [2018-11-23 09:55:17,690 INFO L273 TraceCheckUtils]: 92: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem12 := read~intINTTYPE4(~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem12, ~#a6~0.base, ~bvadd32(~#a6~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem12; {5004#false} is VALID [2018-11-23 09:55:17,690 INFO L273 TraceCheckUtils]: 91: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,690 INFO L273 TraceCheckUtils]: 90: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,690 INFO L273 TraceCheckUtils]: 89: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:17,691 INFO L273 TraceCheckUtils]: 88: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:17,691 INFO L273 TraceCheckUtils]: 87: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:17,691 INFO L273 TraceCheckUtils]: 86: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:17,691 INFO L273 TraceCheckUtils]: 85: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:17,691 INFO L273 TraceCheckUtils]: 84: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:17,692 INFO L273 TraceCheckUtils]: 83: Hoare triple {5004#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5004#false} is VALID [2018-11-23 09:55:17,692 INFO L273 TraceCheckUtils]: 82: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem10 := read~intINTTYPE4(~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem10, ~#a5~0.base, ~bvadd32(~#a5~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem10; {5004#false} is VALID [2018-11-23 09:55:17,692 INFO L273 TraceCheckUtils]: 81: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,692 INFO L273 TraceCheckUtils]: 80: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,692 INFO L273 TraceCheckUtils]: 79: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:17,692 INFO L273 TraceCheckUtils]: 78: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:17,693 INFO L273 TraceCheckUtils]: 77: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:17,693 INFO L273 TraceCheckUtils]: 76: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:17,693 INFO L273 TraceCheckUtils]: 75: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:17,693 INFO L273 TraceCheckUtils]: 74: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:17,693 INFO L273 TraceCheckUtils]: 73: Hoare triple {5004#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5004#false} is VALID [2018-11-23 09:55:17,693 INFO L273 TraceCheckUtils]: 72: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem8 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem8, ~#a4~0.base, ~bvadd32(~#a4~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem8; {5004#false} is VALID [2018-11-23 09:55:17,694 INFO L273 TraceCheckUtils]: 71: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,694 INFO L273 TraceCheckUtils]: 70: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,694 INFO L273 TraceCheckUtils]: 69: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:17,694 INFO L273 TraceCheckUtils]: 68: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:17,694 INFO L273 TraceCheckUtils]: 67: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:17,694 INFO L273 TraceCheckUtils]: 66: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:17,695 INFO L273 TraceCheckUtils]: 65: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:17,695 INFO L273 TraceCheckUtils]: 64: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:17,695 INFO L273 TraceCheckUtils]: 63: Hoare triple {5004#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5004#false} is VALID [2018-11-23 09:55:17,695 INFO L273 TraceCheckUtils]: 62: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem6, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem6; {5004#false} is VALID [2018-11-23 09:55:17,695 INFO L273 TraceCheckUtils]: 61: Hoare triple {5004#false} ~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,695 INFO L273 TraceCheckUtils]: 60: Hoare triple {5004#false} assume !~bvslt32(~i~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,696 INFO L273 TraceCheckUtils]: 59: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:17,696 INFO L273 TraceCheckUtils]: 58: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:17,696 INFO L273 TraceCheckUtils]: 57: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:17,696 INFO L273 TraceCheckUtils]: 56: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:17,696 INFO L273 TraceCheckUtils]: 55: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:17,696 INFO L273 TraceCheckUtils]: 54: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:17,697 INFO L273 TraceCheckUtils]: 53: Hoare triple {5004#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5004#false} is VALID [2018-11-23 09:55:17,697 INFO L273 TraceCheckUtils]: 52: Hoare triple {5004#false} assume !!~bvslt32(~i~0, 100000bv32);call #t~mem4 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem4, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem4; {5004#false} is VALID [2018-11-23 09:55:17,697 INFO L273 TraceCheckUtils]: 51: Hoare triple {5004#false} havoc ~i~0;~i~0 := 0bv32; {5004#false} is VALID [2018-11-23 09:55:17,711 INFO L273 TraceCheckUtils]: 50: Hoare triple {5757#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {5004#false} is VALID [2018-11-23 09:55:17,725 INFO L273 TraceCheckUtils]: 49: Hoare triple {5761#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5757#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-23 09:55:17,734 INFO L273 TraceCheckUtils]: 48: Hoare triple {5761#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5761#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,747 INFO L273 TraceCheckUtils]: 47: Hoare triple {5768#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5761#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,763 INFO L273 TraceCheckUtils]: 46: Hoare triple {5768#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5768#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,772 INFO L273 TraceCheckUtils]: 45: Hoare triple {5775#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5768#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,786 INFO L273 TraceCheckUtils]: 44: Hoare triple {5775#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5775#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,794 INFO L273 TraceCheckUtils]: 43: Hoare triple {5782#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5775#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,794 INFO L273 TraceCheckUtils]: 42: Hoare triple {5782#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5782#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,801 INFO L273 TraceCheckUtils]: 41: Hoare triple {5789#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5782#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,801 INFO L273 TraceCheckUtils]: 40: Hoare triple {5789#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5789#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,805 INFO L273 TraceCheckUtils]: 39: Hoare triple {5796#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5789#(bvslt (bvadd main_~a~0 (_ bv5 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,806 INFO L273 TraceCheckUtils]: 38: Hoare triple {5796#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5796#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,810 INFO L273 TraceCheckUtils]: 37: Hoare triple {5803#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5796#(bvslt (bvadd main_~a~0 (_ bv6 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,811 INFO L273 TraceCheckUtils]: 36: Hoare triple {5803#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5803#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,819 INFO L273 TraceCheckUtils]: 35: Hoare triple {5810#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5803#(bvslt (bvadd main_~a~0 (_ bv7 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,820 INFO L273 TraceCheckUtils]: 34: Hoare triple {5810#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5810#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,825 INFO L273 TraceCheckUtils]: 33: Hoare triple {5817#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5810#(bvslt (bvadd main_~a~0 (_ bv8 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,825 INFO L273 TraceCheckUtils]: 32: Hoare triple {5817#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5817#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,831 INFO L273 TraceCheckUtils]: 31: Hoare triple {5824#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5817#(bvslt (bvadd main_~a~0 (_ bv9 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,832 INFO L273 TraceCheckUtils]: 30: Hoare triple {5824#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5824#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,837 INFO L273 TraceCheckUtils]: 29: Hoare triple {5831#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5824#(bvslt (bvadd main_~a~0 (_ bv10 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,837 INFO L273 TraceCheckUtils]: 28: Hoare triple {5831#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5831#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,844 INFO L273 TraceCheckUtils]: 27: Hoare triple {5838#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5831#(bvslt (bvadd main_~a~0 (_ bv11 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,844 INFO L273 TraceCheckUtils]: 26: Hoare triple {5838#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5838#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,850 INFO L273 TraceCheckUtils]: 25: Hoare triple {5845#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5838#(bvslt (bvadd main_~a~0 (_ bv12 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,851 INFO L273 TraceCheckUtils]: 24: Hoare triple {5845#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5845#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,857 INFO L273 TraceCheckUtils]: 23: Hoare triple {5852#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5845#(bvslt (bvadd main_~a~0 (_ bv13 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,858 INFO L273 TraceCheckUtils]: 22: Hoare triple {5852#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5852#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,863 INFO L273 TraceCheckUtils]: 21: Hoare triple {5859#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5852#(bvslt (bvadd main_~a~0 (_ bv14 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,863 INFO L273 TraceCheckUtils]: 20: Hoare triple {5859#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5859#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,871 INFO L273 TraceCheckUtils]: 19: Hoare triple {5866#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5859#(bvslt (bvadd main_~a~0 (_ bv15 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,871 INFO L273 TraceCheckUtils]: 18: Hoare triple {5866#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5866#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,874 INFO L273 TraceCheckUtils]: 17: Hoare triple {5873#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5866#(bvslt (bvadd main_~a~0 (_ bv16 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,875 INFO L273 TraceCheckUtils]: 16: Hoare triple {5873#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5873#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,881 INFO L273 TraceCheckUtils]: 15: Hoare triple {5880#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5873#(bvslt (bvadd main_~a~0 (_ bv17 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,882 INFO L273 TraceCheckUtils]: 14: Hoare triple {5880#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5880#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,888 INFO L273 TraceCheckUtils]: 13: Hoare triple {5887#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5880#(bvslt (bvadd main_~a~0 (_ bv18 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,888 INFO L273 TraceCheckUtils]: 12: Hoare triple {5887#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5887#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,895 INFO L273 TraceCheckUtils]: 11: Hoare triple {5894#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5887#(bvslt (bvadd main_~a~0 (_ bv19 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,895 INFO L273 TraceCheckUtils]: 10: Hoare triple {5894#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5894#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,903 INFO L273 TraceCheckUtils]: 9: Hoare triple {5901#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5894#(bvslt (bvadd main_~a~0 (_ bv20 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,903 INFO L273 TraceCheckUtils]: 8: Hoare triple {5901#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5901#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,910 INFO L273 TraceCheckUtils]: 7: Hoare triple {5908#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} #t~post0 := ~a~0;~a~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5901#(bvslt (bvadd main_~a~0 (_ bv21 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,911 INFO L273 TraceCheckUtils]: 6: Hoare triple {5908#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a9~0.base, ~bvadd32(~#a9~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);havoc #t~nondet2; {5908#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,912 INFO L273 TraceCheckUtils]: 5: Hoare triple {5003#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(400000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(400000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(400000bv32);call ~#a4~0.base, ~#a4~0.offset := #Ultimate.alloc(400000bv32);call ~#a5~0.base, ~#a5~0.offset := #Ultimate.alloc(400000bv32);call ~#a6~0.base, ~#a6~0.offset := #Ultimate.alloc(400000bv32);call ~#a7~0.base, ~#a7~0.offset := #Ultimate.alloc(400000bv32);call ~#a8~0.base, ~#a8~0.offset := #Ultimate.alloc(400000bv32);call ~#a9~0.base, ~#a9~0.offset := #Ultimate.alloc(400000bv32);call ~#a0~0.base, ~#a0~0.offset := #Ultimate.alloc(400000bv32);havoc ~a~0;~a~0 := 0bv32; {5908#(bvslt (bvadd main_~a~0 (_ bv22 32)) (_ bv100000 32))} is VALID [2018-11-23 09:55:17,912 INFO L256 TraceCheckUtils]: 4: Hoare triple {5003#true} call #t~ret24 := main(); {5003#true} is VALID [2018-11-23 09:55:17,912 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5003#true} {5003#true} #175#return; {5003#true} is VALID [2018-11-23 09:55:17,913 INFO L273 TraceCheckUtils]: 2: Hoare triple {5003#true} assume true; {5003#true} is VALID [2018-11-23 09:55:17,913 INFO L273 TraceCheckUtils]: 1: Hoare triple {5003#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {5003#true} is VALID [2018-11-23 09:55:17,913 INFO L256 TraceCheckUtils]: 0: Hoare triple {5003#true} call ULTIMATE.init(); {5003#true} is VALID [2018-11-23 09:55:17,930 INFO L134 CoverageAnalysis]: Checked inductivity of 628 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-11-23 09:55:17,934 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 09:55:17,935 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-11-23 09:55:17,935 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 147 [2018-11-23 09:55:17,936 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 09:55:17,936 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states. [2018-11-23 09:55:18,265 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:18,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-23 09:55:18,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-23 09:55:18,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 09:55:18,267 INFO L87 Difference]: Start difference. First operand 152 states and 162 transitions. Second operand 48 states. [2018-11-23 09:55:26,389 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 7 [2018-11-23 09:55:26,855 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 7 [2018-11-23 09:55:27,393 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 7 [2018-11-23 09:55:27,911 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 7 [2018-11-23 09:55:28,430 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 7 [2018-11-23 09:55:28,966 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 7 [2018-11-23 09:55:38,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:38,034 INFO L93 Difference]: Finished difference Result 301 states and 344 transitions. [2018-11-23 09:55:38,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-23 09:55:38,035 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 147 [2018-11-23 09:55:38,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 09:55:38,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 09:55:38,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 218 transitions. [2018-11-23 09:55:38,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 09:55:38,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 218 transitions. [2018-11-23 09:55:38,043 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states and 218 transitions. [2018-11-23 09:55:39,468 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 218 edges. 218 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 09:55:39,472 INFO L225 Difference]: With dead ends: 301 [2018-11-23 09:55:39,472 INFO L226 Difference]: Without dead ends: 200 [2018-11-23 09:55:39,475 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 315 GetRequests, 247 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 11.3s TimeCoverageRelationStatistics Valid=1678, Invalid=3152, Unknown=0, NotChecked=0, Total=4830 [2018-11-23 09:55:39,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-11-23 09:55:39,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 200. [2018-11-23 09:55:39,839 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 09:55:39,839 INFO L82 GeneralOperation]: Start isEquivalent. First operand 200 states. Second operand 200 states. [2018-11-23 09:55:39,839 INFO L74 IsIncluded]: Start isIncluded. First operand 200 states. Second operand 200 states. [2018-11-23 09:55:39,839 INFO L87 Difference]: Start difference. First operand 200 states. Second operand 200 states. [2018-11-23 09:55:39,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:39,847 INFO L93 Difference]: Finished difference Result 200 states and 210 transitions. [2018-11-23 09:55:39,848 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 210 transitions. [2018-11-23 09:55:39,848 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:39,848 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:39,849 INFO L74 IsIncluded]: Start isIncluded. First operand 200 states. Second operand 200 states. [2018-11-23 09:55:39,849 INFO L87 Difference]: Start difference. First operand 200 states. Second operand 200 states. [2018-11-23 09:55:39,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 09:55:39,856 INFO L93 Difference]: Finished difference Result 200 states and 210 transitions. [2018-11-23 09:55:39,856 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 210 transitions. [2018-11-23 09:55:39,857 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 09:55:39,857 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 09:55:39,857 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 09:55:39,857 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 09:55:39,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-11-23 09:55:39,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 210 transitions. [2018-11-23 09:55:39,865 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 210 transitions. Word has length 147 [2018-11-23 09:55:39,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 09:55:39,865 INFO L480 AbstractCegarLoop]: Abstraction has 200 states and 210 transitions. [2018-11-23 09:55:39,866 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-23 09:55:39,866 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 210 transitions. [2018-11-23 09:55:39,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-11-23 09:55:39,869 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 09:55:39,870 INFO L402 BasicCegarLoop]: trace histogram [46, 46, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 09:55:39,870 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 09:55:39,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:55:39,870 INFO L82 PathProgramCache]: Analyzing trace with hash 1994365410, now seen corresponding path program 5 times [2018-11-23 09:55:39,871 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 09:55:39,871 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 09:55:39,898 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1