java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/locks/test_locks_14_false-unreach-call_true-valid-memsafety_false-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:53:28,540 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:53:28,542 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:53:28,554 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:53:28,554 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:53:28,555 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:53:28,556 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:53:28,558 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:53:28,560 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:53:28,561 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:53:28,562 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:53:28,562 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:53:28,564 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:53:28,567 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:53:28,568 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:53:28,569 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:53:28,570 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:53:28,571 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:53:28,573 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:53:28,575 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:53:28,576 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:53:28,577 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:53:28,580 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:53:28,580 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:53:28,580 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:53:28,581 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:53:28,582 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:53:28,583 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:53:28,584 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:53:28,585 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:53:28,585 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:53:28,586 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:53:28,586 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:53:28,586 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:53:28,587 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:53:28,588 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:53:28,588 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:53:28,613 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:53:28,616 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:53:28,617 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:53:28,617 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:53:28,617 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:53:28,619 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:53:28,619 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:53:28,619 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:53:28,619 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:53:28,619 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:53:28,620 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:53:28,620 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:53:28,620 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:53:28,620 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:53:28,620 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:53:28,621 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:53:28,622 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:53:28,622 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:53:28,622 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:53:28,623 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:53:28,623 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:53:28,623 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:53:28,623 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:53:28,623 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:53:28,624 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:53:28,624 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:53:28,624 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:53:28,624 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:53:28,624 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:53:28,625 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:53:28,625 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:53:28,625 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:53:28,625 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:53:28,689 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:53:28,709 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:53:28,712 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:53:28,714 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:53:28,714 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:53:28,715 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_14_false-unreach-call_true-valid-memsafety_false-termination.c [2018-11-23 10:53:28,785 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3288b8a31/4ddfab02c9bc4ec2b758d66fab5dd637/FLAG7656e59a7 [2018-11-23 10:53:29,208 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:53:29,208 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14_false-unreach-call_true-valid-memsafety_false-termination.c [2018-11-23 10:53:29,218 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3288b8a31/4ddfab02c9bc4ec2b758d66fab5dd637/FLAG7656e59a7 [2018-11-23 10:53:29,581 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3288b8a31/4ddfab02c9bc4ec2b758d66fab5dd637 [2018-11-23 10:53:29,591 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:53:29,593 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:53:29,593 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:53:29,594 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:53:29,597 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:53:29,599 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:29,602 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a099bfd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29, skipping insertion in model container [2018-11-23 10:53:29,602 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:29,613 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:53:29,651 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:53:29,902 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:53:29,909 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:53:29,958 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:53:29,988 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:53:29,989 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29 WrapperNode [2018-11-23 10:53:29,989 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:53:29,990 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:53:29,990 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:53:29,990 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:53:30,002 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,011 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,019 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:53:30,019 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:53:30,019 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:53:30,019 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:53:30,029 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,029 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,032 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,032 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,044 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,058 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,059 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... [2018-11-23 10:53:30,063 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:53:30,063 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:53:30,063 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:53:30,064 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:53:30,065 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:53:30,205 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:53:30,206 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:53:30,206 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:53:30,206 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:53:30,206 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:53:30,206 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:53:31,297 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:53:31,298 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-23 10:53:31,298 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:53:31 BoogieIcfgContainer [2018-11-23 10:53:31,299 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:53:31,300 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:53:31,300 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:53:31,303 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:53:31,304 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:53:29" (1/3) ... [2018-11-23 10:53:31,305 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73905ab4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:53:31, skipping insertion in model container [2018-11-23 10:53:31,305 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:53:29" (2/3) ... [2018-11-23 10:53:31,305 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73905ab4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:53:31, skipping insertion in model container [2018-11-23 10:53:31,305 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:53:31" (3/3) ... [2018-11-23 10:53:31,307 INFO L112 eAbstractionObserver]: Analyzing ICFG test_locks_14_false-unreach-call_true-valid-memsafety_false-termination.c [2018-11-23 10:53:31,316 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:53:31,324 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:53:31,339 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:53:31,382 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:53:31,383 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:53:31,383 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:53:31,383 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:53:31,384 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:53:31,384 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:53:31,384 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:53:31,385 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:53:31,385 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:53:31,408 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states. [2018-11-23 10:53:31,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:53:31,414 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:53:31,415 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:53:31,418 INFO L423 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:53:31,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:53:31,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1694527455, now seen corresponding path program 1 times [2018-11-23 10:53:31,428 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:53:31,428 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:53:31,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:53:31,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:31,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:31,544 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:53:31,848 INFO L256 TraceCheckUtils]: 0: Hoare triple {59#true} call ULTIMATE.init(); {59#true} is VALID [2018-11-23 10:53:31,852 INFO L273 TraceCheckUtils]: 1: Hoare triple {59#true} assume true; {59#true} is VALID [2018-11-23 10:53:31,853 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {59#true} {59#true} #265#return; {59#true} is VALID [2018-11-23 10:53:31,853 INFO L256 TraceCheckUtils]: 3: Hoare triple {59#true} call #t~ret15 := main(); {59#true} is VALID [2018-11-23 10:53:31,854 INFO L273 TraceCheckUtils]: 4: Hoare triple {59#true} ~p1~0 := #t~nondet0;havoc #t~nondet0;havoc ~lk1~0;~p2~0 := #t~nondet1;havoc #t~nondet1;havoc ~lk2~0;~p3~0 := #t~nondet2;havoc #t~nondet2;havoc ~lk3~0;~p4~0 := #t~nondet3;havoc #t~nondet3;havoc ~lk4~0;~p5~0 := #t~nondet4;havoc #t~nondet4;havoc ~lk5~0;~p6~0 := #t~nondet5;havoc #t~nondet5;havoc ~lk6~0;~p7~0 := #t~nondet6;havoc #t~nondet6;havoc ~lk7~0;~p8~0 := #t~nondet7;havoc #t~nondet7;havoc ~lk8~0;~p9~0 := #t~nondet8;havoc #t~nondet8;havoc ~lk9~0;~p10~0 := #t~nondet9;havoc #t~nondet9;havoc ~lk10~0;~p11~0 := #t~nondet10;havoc #t~nondet10;havoc ~lk11~0;~p12~0 := #t~nondet11;havoc #t~nondet11;havoc ~lk12~0;~p13~0 := #t~nondet12;havoc #t~nondet12;havoc ~lk13~0;~p14~0 := #t~nondet13;havoc #t~nondet13;havoc ~lk14~0;havoc ~cond~0; {59#true} is VALID [2018-11-23 10:53:31,854 INFO L273 TraceCheckUtils]: 5: Hoare triple {59#true} assume !false;~cond~0 := #t~nondet14;havoc #t~nondet14; {59#true} is VALID [2018-11-23 10:53:31,855 INFO L273 TraceCheckUtils]: 6: Hoare triple {59#true} assume !(0bv32 == ~cond~0);~lk1~0 := 0bv32;~lk2~0 := 0bv32;~lk3~0 := 0bv32;~lk4~0 := 0bv32;~lk5~0 := 0bv32;~lk6~0 := 0bv32;~lk7~0 := 0bv32;~lk8~0 := 0bv32;~lk9~0 := 0bv32;~lk10~0 := 0bv32;~lk11~0 := 0bv32;~lk12~0 := 0bv32;~lk13~0 := 0bv32;~lk14~0 := 0bv32; {59#true} is VALID [2018-11-23 10:53:31,856 INFO L273 TraceCheckUtils]: 7: Hoare triple {59#true} assume 0bv32 != ~p1~0;~lk1~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,861 INFO L273 TraceCheckUtils]: 8: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p2~0;~lk2~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,864 INFO L273 TraceCheckUtils]: 9: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p3~0;~lk3~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,865 INFO L273 TraceCheckUtils]: 10: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p4~0;~lk4~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,866 INFO L273 TraceCheckUtils]: 11: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p5~0;~lk5~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,867 INFO L273 TraceCheckUtils]: 12: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p6~0;~lk6~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,868 INFO L273 TraceCheckUtils]: 13: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p7~0;~lk7~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,870 INFO L273 TraceCheckUtils]: 14: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume !(0bv32 != ~p8~0); {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,870 INFO L273 TraceCheckUtils]: 15: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p9~0;~lk9~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,872 INFO L273 TraceCheckUtils]: 16: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p10~0;~lk10~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,873 INFO L273 TraceCheckUtils]: 17: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p11~0;~lk11~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,890 INFO L273 TraceCheckUtils]: 18: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p12~0;~lk12~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,893 INFO L273 TraceCheckUtils]: 19: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p13~0;~lk13~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,898 INFO L273 TraceCheckUtils]: 20: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume 0bv32 != ~p14~0;~lk14~0 := 1bv32; {85#(not (= (_ bv0 32) main_~p1~0))} is VALID [2018-11-23 10:53:31,906 INFO L273 TraceCheckUtils]: 21: Hoare triple {85#(not (= (_ bv0 32) main_~p1~0))} assume !(0bv32 != ~p1~0); {60#false} is VALID [2018-11-23 10:53:31,907 INFO L273 TraceCheckUtils]: 22: Hoare triple {60#false} assume !(0bv32 != ~p2~0); {60#false} is VALID [2018-11-23 10:53:31,907 INFO L273 TraceCheckUtils]: 23: Hoare triple {60#false} assume !false; {60#false} is VALID [2018-11-23 10:53:31,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:53:31,914 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:53:31,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:53:31,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:53:31,929 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:31,938 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:53:31,942 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:53:32,038 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:32,038 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:53:32,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:53:32,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:32,049 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 3 states. [2018-11-23 10:53:33,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:33,152 INFO L93 Difference]: Finished difference Result 155 states and 287 transitions. [2018-11-23 10:53:33,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:53:33,152 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:33,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:53:33,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:33,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 287 transitions. [2018-11-23 10:53:33,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:33,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 287 transitions. [2018-11-23 10:53:33,192 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 287 transitions. [2018-11-23 10:53:33,939 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 287 edges. 287 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:33,959 INFO L225 Difference]: With dead ends: 155 [2018-11-23 10:53:33,959 INFO L226 Difference]: Without dead ends: 96 [2018-11-23 10:53:33,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:33,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-11-23 10:53:34,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 94. [2018-11-23 10:53:34,032 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:53:34,033 INFO L82 GeneralOperation]: Start isEquivalent. First operand 96 states. Second operand 94 states. [2018-11-23 10:53:34,033 INFO L74 IsIncluded]: Start isIncluded. First operand 96 states. Second operand 94 states. [2018-11-23 10:53:34,033 INFO L87 Difference]: Start difference. First operand 96 states. Second operand 94 states. [2018-11-23 10:53:34,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:34,043 INFO L93 Difference]: Finished difference Result 96 states and 175 transitions. [2018-11-23 10:53:34,044 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 175 transitions. [2018-11-23 10:53:34,045 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:34,045 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:34,046 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand 96 states. [2018-11-23 10:53:34,046 INFO L87 Difference]: Start difference. First operand 94 states. Second operand 96 states. [2018-11-23 10:53:34,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:34,056 INFO L93 Difference]: Finished difference Result 96 states and 175 transitions. [2018-11-23 10:53:34,056 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 175 transitions. [2018-11-23 10:53:34,058 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:34,058 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:34,058 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:53:34,059 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:53:34,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-11-23 10:53:34,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 174 transitions. [2018-11-23 10:53:34,068 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 174 transitions. Word has length 24 [2018-11-23 10:53:34,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:53:34,069 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 174 transitions. [2018-11-23 10:53:34,069 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:53:34,069 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 174 transitions. [2018-11-23 10:53:34,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:53:34,070 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:53:34,071 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:53:34,071 INFO L423 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:53:34,071 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:53:34,072 INFO L82 PathProgramCache]: Analyzing trace with hash 1694520263, now seen corresponding path program 1 times [2018-11-23 10:53:34,072 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:53:34,072 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:53:34,100 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:53:34,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:34,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:34,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:53:34,277 INFO L256 TraceCheckUtils]: 0: Hoare triple {594#true} call ULTIMATE.init(); {594#true} is VALID [2018-11-23 10:53:34,278 INFO L273 TraceCheckUtils]: 1: Hoare triple {594#true} assume true; {594#true} is VALID [2018-11-23 10:53:34,278 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {594#true} {594#true} #265#return; {594#true} is VALID [2018-11-23 10:53:34,278 INFO L256 TraceCheckUtils]: 3: Hoare triple {594#true} call #t~ret15 := main(); {594#true} is VALID [2018-11-23 10:53:34,279 INFO L273 TraceCheckUtils]: 4: Hoare triple {594#true} ~p1~0 := #t~nondet0;havoc #t~nondet0;havoc ~lk1~0;~p2~0 := #t~nondet1;havoc #t~nondet1;havoc ~lk2~0;~p3~0 := #t~nondet2;havoc #t~nondet2;havoc ~lk3~0;~p4~0 := #t~nondet3;havoc #t~nondet3;havoc ~lk4~0;~p5~0 := #t~nondet4;havoc #t~nondet4;havoc ~lk5~0;~p6~0 := #t~nondet5;havoc #t~nondet5;havoc ~lk6~0;~p7~0 := #t~nondet6;havoc #t~nondet6;havoc ~lk7~0;~p8~0 := #t~nondet7;havoc #t~nondet7;havoc ~lk8~0;~p9~0 := #t~nondet8;havoc #t~nondet8;havoc ~lk9~0;~p10~0 := #t~nondet9;havoc #t~nondet9;havoc ~lk10~0;~p11~0 := #t~nondet10;havoc #t~nondet10;havoc ~lk11~0;~p12~0 := #t~nondet11;havoc #t~nondet11;havoc ~lk12~0;~p13~0 := #t~nondet12;havoc #t~nondet12;havoc ~lk13~0;~p14~0 := #t~nondet13;havoc #t~nondet13;havoc ~lk14~0;havoc ~cond~0; {594#true} is VALID [2018-11-23 10:53:34,279 INFO L273 TraceCheckUtils]: 5: Hoare triple {594#true} assume !false;~cond~0 := #t~nondet14;havoc #t~nondet14; {594#true} is VALID [2018-11-23 10:53:34,279 INFO L273 TraceCheckUtils]: 6: Hoare triple {594#true} assume !(0bv32 == ~cond~0);~lk1~0 := 0bv32;~lk2~0 := 0bv32;~lk3~0 := 0bv32;~lk4~0 := 0bv32;~lk5~0 := 0bv32;~lk6~0 := 0bv32;~lk7~0 := 0bv32;~lk8~0 := 0bv32;~lk9~0 := 0bv32;~lk10~0 := 0bv32;~lk11~0 := 0bv32;~lk12~0 := 0bv32;~lk13~0 := 0bv32;~lk14~0 := 0bv32; {594#true} is VALID [2018-11-23 10:53:34,288 INFO L273 TraceCheckUtils]: 7: Hoare triple {594#true} assume 0bv32 != ~p1~0;~lk1~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,304 INFO L273 TraceCheckUtils]: 8: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p2~0;~lk2~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,318 INFO L273 TraceCheckUtils]: 9: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p3~0;~lk3~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,333 INFO L273 TraceCheckUtils]: 10: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p4~0;~lk4~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,334 INFO L273 TraceCheckUtils]: 11: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p5~0;~lk5~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,338 INFO L273 TraceCheckUtils]: 12: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p6~0;~lk6~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,338 INFO L273 TraceCheckUtils]: 13: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p7~0;~lk7~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,343 INFO L273 TraceCheckUtils]: 14: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(0bv32 != ~p8~0); {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,343 INFO L273 TraceCheckUtils]: 15: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p9~0;~lk9~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,344 INFO L273 TraceCheckUtils]: 16: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p10~0;~lk10~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,344 INFO L273 TraceCheckUtils]: 17: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p11~0;~lk11~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,345 INFO L273 TraceCheckUtils]: 18: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p12~0;~lk12~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,345 INFO L273 TraceCheckUtils]: 19: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p13~0;~lk13~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,346 INFO L273 TraceCheckUtils]: 20: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p14~0;~lk14~0 := 1bv32; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,346 INFO L273 TraceCheckUtils]: 21: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 != ~p1~0; {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:53:34,347 INFO L273 TraceCheckUtils]: 22: Hoare triple {620#(= (bvadd main_~lk1~0 (_ bv4294967295 32)) (_ bv0 32))} assume 1bv32 != ~lk1~0; {595#false} is VALID [2018-11-23 10:53:34,347 INFO L273 TraceCheckUtils]: 23: Hoare triple {595#false} assume !false; {595#false} is VALID [2018-11-23 10:53:34,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:53:34,354 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:53:34,358 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:53:34,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:53:34,360 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:34,360 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:53:34,360 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:53:34,414 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:34,414 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:53:34,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:53:34,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:34,416 INFO L87 Difference]: Start difference. First operand 94 states and 174 transitions. Second operand 3 states. [2018-11-23 10:53:34,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:34,651 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2018-11-23 10:53:34,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:53:34,652 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:34,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:53:34,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:34,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 122 transitions. [2018-11-23 10:53:34,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:34,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 122 transitions. [2018-11-23 10:53:34,660 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 122 transitions. [2018-11-23 10:53:34,866 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:34,870 INFO L225 Difference]: With dead ends: 97 [2018-11-23 10:53:34,871 INFO L226 Difference]: Without dead ends: 95 [2018-11-23 10:53:34,872 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:34,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-11-23 10:53:34,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 95. [2018-11-23 10:53:34,917 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:53:34,917 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand 95 states. [2018-11-23 10:53:34,917 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand 95 states. [2018-11-23 10:53:34,918 INFO L87 Difference]: Start difference. First operand 95 states. Second operand 95 states. [2018-11-23 10:53:34,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:34,924 INFO L93 Difference]: Finished difference Result 95 states and 175 transitions. [2018-11-23 10:53:34,924 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 175 transitions. [2018-11-23 10:53:34,926 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:34,926 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:34,926 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand 95 states. [2018-11-23 10:53:34,926 INFO L87 Difference]: Start difference. First operand 95 states. Second operand 95 states. [2018-11-23 10:53:34,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:34,933 INFO L93 Difference]: Finished difference Result 95 states and 175 transitions. [2018-11-23 10:53:34,933 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 175 transitions. [2018-11-23 10:53:34,934 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:34,934 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:34,935 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:53:34,935 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:53:34,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-11-23 10:53:34,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 175 transitions. [2018-11-23 10:53:34,946 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 175 transitions. Word has length 24 [2018-11-23 10:53:34,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:53:34,946 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 175 transitions. [2018-11-23 10:53:34,947 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:53:34,947 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 175 transitions. [2018-11-23 10:53:34,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:53:34,948 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:53:34,948 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:53:34,948 INFO L423 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:53:34,949 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:53:34,949 INFO L82 PathProgramCache]: Analyzing trace with hash 106179553, now seen corresponding path program 1 times [2018-11-23 10:53:34,950 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:53:34,950 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:53:34,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:53:35,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:35,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:35,024 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:53:35,103 INFO L256 TraceCheckUtils]: 0: Hoare triple {1065#true} call ULTIMATE.init(); {1065#true} is VALID [2018-11-23 10:53:35,104 INFO L273 TraceCheckUtils]: 1: Hoare triple {1065#true} assume true; {1065#true} is VALID [2018-11-23 10:53:35,104 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1065#true} {1065#true} #265#return; {1065#true} is VALID [2018-11-23 10:53:35,104 INFO L256 TraceCheckUtils]: 3: Hoare triple {1065#true} call #t~ret15 := main(); {1065#true} is VALID [2018-11-23 10:53:35,105 INFO L273 TraceCheckUtils]: 4: Hoare triple {1065#true} ~p1~0 := #t~nondet0;havoc #t~nondet0;havoc ~lk1~0;~p2~0 := #t~nondet1;havoc #t~nondet1;havoc ~lk2~0;~p3~0 := #t~nondet2;havoc #t~nondet2;havoc ~lk3~0;~p4~0 := #t~nondet3;havoc #t~nondet3;havoc ~lk4~0;~p5~0 := #t~nondet4;havoc #t~nondet4;havoc ~lk5~0;~p6~0 := #t~nondet5;havoc #t~nondet5;havoc ~lk6~0;~p7~0 := #t~nondet6;havoc #t~nondet6;havoc ~lk7~0;~p8~0 := #t~nondet7;havoc #t~nondet7;havoc ~lk8~0;~p9~0 := #t~nondet8;havoc #t~nondet8;havoc ~lk9~0;~p10~0 := #t~nondet9;havoc #t~nondet9;havoc ~lk10~0;~p11~0 := #t~nondet10;havoc #t~nondet10;havoc ~lk11~0;~p12~0 := #t~nondet11;havoc #t~nondet11;havoc ~lk12~0;~p13~0 := #t~nondet12;havoc #t~nondet12;havoc ~lk13~0;~p14~0 := #t~nondet13;havoc #t~nondet13;havoc ~lk14~0;havoc ~cond~0; {1065#true} is VALID [2018-11-23 10:53:35,105 INFO L273 TraceCheckUtils]: 5: Hoare triple {1065#true} assume !false;~cond~0 := #t~nondet14;havoc #t~nondet14; {1065#true} is VALID [2018-11-23 10:53:35,105 INFO L273 TraceCheckUtils]: 6: Hoare triple {1065#true} assume !(0bv32 == ~cond~0);~lk1~0 := 0bv32;~lk2~0 := 0bv32;~lk3~0 := 0bv32;~lk4~0 := 0bv32;~lk5~0 := 0bv32;~lk6~0 := 0bv32;~lk7~0 := 0bv32;~lk8~0 := 0bv32;~lk9~0 := 0bv32;~lk10~0 := 0bv32;~lk11~0 := 0bv32;~lk12~0 := 0bv32;~lk13~0 := 0bv32;~lk14~0 := 0bv32; {1065#true} is VALID [2018-11-23 10:53:35,106 INFO L273 TraceCheckUtils]: 7: Hoare triple {1065#true} assume !(0bv32 != ~p1~0); {1065#true} is VALID [2018-11-23 10:53:35,108 INFO L273 TraceCheckUtils]: 8: Hoare triple {1065#true} assume 0bv32 != ~p2~0;~lk2~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,109 INFO L273 TraceCheckUtils]: 9: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p3~0;~lk3~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,113 INFO L273 TraceCheckUtils]: 10: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p4~0;~lk4~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,116 INFO L273 TraceCheckUtils]: 11: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p5~0;~lk5~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,119 INFO L273 TraceCheckUtils]: 12: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p6~0;~lk6~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,119 INFO L273 TraceCheckUtils]: 13: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p7~0;~lk7~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,121 INFO L273 TraceCheckUtils]: 14: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume !(0bv32 != ~p8~0); {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,125 INFO L273 TraceCheckUtils]: 15: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p9~0;~lk9~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,130 INFO L273 TraceCheckUtils]: 16: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p10~0;~lk10~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,132 INFO L273 TraceCheckUtils]: 17: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p11~0;~lk11~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,132 INFO L273 TraceCheckUtils]: 18: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p12~0;~lk12~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,134 INFO L273 TraceCheckUtils]: 19: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p13~0;~lk13~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,134 INFO L273 TraceCheckUtils]: 20: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume 0bv32 != ~p14~0;~lk14~0 := 1bv32; {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,136 INFO L273 TraceCheckUtils]: 21: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume !(0bv32 != ~p1~0); {1094#(not (= (_ bv0 32) main_~p2~0))} is VALID [2018-11-23 10:53:35,136 INFO L273 TraceCheckUtils]: 22: Hoare triple {1094#(not (= (_ bv0 32) main_~p2~0))} assume !(0bv32 != ~p2~0); {1066#false} is VALID [2018-11-23 10:53:35,137 INFO L273 TraceCheckUtils]: 23: Hoare triple {1066#false} assume !false; {1066#false} is VALID [2018-11-23 10:53:35,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:53:35,138 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:53:35,140 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:53:35,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:53:35,140 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:35,141 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:53:35,141 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:53:35,175 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:35,175 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:53:35,176 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:53:35,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:35,177 INFO L87 Difference]: Start difference. First operand 95 states and 175 transitions. Second operand 3 states. [2018-11-23 10:53:35,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:35,482 INFO L93 Difference]: Finished difference Result 222 states and 412 transitions. [2018-11-23 10:53:35,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:53:35,483 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:35,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:53:35,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:35,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 216 transitions. [2018-11-23 10:53:35,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:35,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 216 transitions. [2018-11-23 10:53:35,491 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 216 transitions. [2018-11-23 10:53:35,821 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 216 edges. 216 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:35,826 INFO L225 Difference]: With dead ends: 222 [2018-11-23 10:53:35,826 INFO L226 Difference]: Without dead ends: 132 [2018-11-23 10:53:35,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:35,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-11-23 10:53:35,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 130. [2018-11-23 10:53:35,863 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:53:35,863 INFO L82 GeneralOperation]: Start isEquivalent. First operand 132 states. Second operand 130 states. [2018-11-23 10:53:35,863 INFO L74 IsIncluded]: Start isIncluded. First operand 132 states. Second operand 130 states. [2018-11-23 10:53:35,864 INFO L87 Difference]: Start difference. First operand 132 states. Second operand 130 states. [2018-11-23 10:53:35,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:35,870 INFO L93 Difference]: Finished difference Result 132 states and 238 transitions. [2018-11-23 10:53:35,871 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 238 transitions. [2018-11-23 10:53:35,872 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:35,872 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:35,872 INFO L74 IsIncluded]: Start isIncluded. First operand 130 states. Second operand 132 states. [2018-11-23 10:53:35,872 INFO L87 Difference]: Start difference. First operand 130 states. Second operand 132 states. [2018-11-23 10:53:35,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:35,879 INFO L93 Difference]: Finished difference Result 132 states and 238 transitions. [2018-11-23 10:53:35,879 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 238 transitions. [2018-11-23 10:53:35,880 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:35,880 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:35,880 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:53:35,881 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:53:35,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-11-23 10:53:35,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 237 transitions. [2018-11-23 10:53:35,887 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 237 transitions. Word has length 24 [2018-11-23 10:53:35,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:53:35,887 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 237 transitions. [2018-11-23 10:53:35,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:53:35,887 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 237 transitions. [2018-11-23 10:53:35,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:53:35,888 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:53:35,889 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:53:35,889 INFO L423 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:53:35,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:53:35,889 INFO L82 PathProgramCache]: Analyzing trace with hash 106172361, now seen corresponding path program 1 times [2018-11-23 10:53:35,890 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:53:35,890 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:53:35,908 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:53:35,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:35,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:53:35,953 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:53:36,046 INFO L256 TraceCheckUtils]: 0: Hoare triple {1775#true} call ULTIMATE.init(); {1775#true} is VALID [2018-11-23 10:53:36,046 INFO L273 TraceCheckUtils]: 1: Hoare triple {1775#true} assume true; {1775#true} is VALID [2018-11-23 10:53:36,047 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1775#true} {1775#true} #265#return; {1775#true} is VALID [2018-11-23 10:53:36,047 INFO L256 TraceCheckUtils]: 3: Hoare triple {1775#true} call #t~ret15 := main(); {1775#true} is VALID [2018-11-23 10:53:36,047 INFO L273 TraceCheckUtils]: 4: Hoare triple {1775#true} ~p1~0 := #t~nondet0;havoc #t~nondet0;havoc ~lk1~0;~p2~0 := #t~nondet1;havoc #t~nondet1;havoc ~lk2~0;~p3~0 := #t~nondet2;havoc #t~nondet2;havoc ~lk3~0;~p4~0 := #t~nondet3;havoc #t~nondet3;havoc ~lk4~0;~p5~0 := #t~nondet4;havoc #t~nondet4;havoc ~lk5~0;~p6~0 := #t~nondet5;havoc #t~nondet5;havoc ~lk6~0;~p7~0 := #t~nondet6;havoc #t~nondet6;havoc ~lk7~0;~p8~0 := #t~nondet7;havoc #t~nondet7;havoc ~lk8~0;~p9~0 := #t~nondet8;havoc #t~nondet8;havoc ~lk9~0;~p10~0 := #t~nondet9;havoc #t~nondet9;havoc ~lk10~0;~p11~0 := #t~nondet10;havoc #t~nondet10;havoc ~lk11~0;~p12~0 := #t~nondet11;havoc #t~nondet11;havoc ~lk12~0;~p13~0 := #t~nondet12;havoc #t~nondet12;havoc ~lk13~0;~p14~0 := #t~nondet13;havoc #t~nondet13;havoc ~lk14~0;havoc ~cond~0; {1775#true} is VALID [2018-11-23 10:53:36,047 INFO L273 TraceCheckUtils]: 5: Hoare triple {1775#true} assume !false;~cond~0 := #t~nondet14;havoc #t~nondet14; {1775#true} is VALID [2018-11-23 10:53:36,047 INFO L273 TraceCheckUtils]: 6: Hoare triple {1775#true} assume !(0bv32 == ~cond~0);~lk1~0 := 0bv32;~lk2~0 := 0bv32;~lk3~0 := 0bv32;~lk4~0 := 0bv32;~lk5~0 := 0bv32;~lk6~0 := 0bv32;~lk7~0 := 0bv32;~lk8~0 := 0bv32;~lk9~0 := 0bv32;~lk10~0 := 0bv32;~lk11~0 := 0bv32;~lk12~0 := 0bv32;~lk13~0 := 0bv32;~lk14~0 := 0bv32; {1775#true} is VALID [2018-11-23 10:53:36,048 INFO L273 TraceCheckUtils]: 7: Hoare triple {1775#true} assume !(0bv32 != ~p1~0); {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,052 INFO L273 TraceCheckUtils]: 8: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p2~0;~lk2~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,052 INFO L273 TraceCheckUtils]: 9: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p3~0;~lk3~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,054 INFO L273 TraceCheckUtils]: 10: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p4~0;~lk4~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,054 INFO L273 TraceCheckUtils]: 11: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p5~0;~lk5~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,055 INFO L273 TraceCheckUtils]: 12: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p6~0;~lk6~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,056 INFO L273 TraceCheckUtils]: 13: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p7~0;~lk7~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,056 INFO L273 TraceCheckUtils]: 14: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume !(0bv32 != ~p8~0); {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,058 INFO L273 TraceCheckUtils]: 15: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p9~0;~lk9~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,059 INFO L273 TraceCheckUtils]: 16: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p10~0;~lk10~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,059 INFO L273 TraceCheckUtils]: 17: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p11~0;~lk11~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,061 INFO L273 TraceCheckUtils]: 18: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p12~0;~lk12~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,062 INFO L273 TraceCheckUtils]: 19: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p13~0;~lk13~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,067 INFO L273 TraceCheckUtils]: 20: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p14~0;~lk14~0 := 1bv32; {1801#(= (_ bv0 32) main_~p1~0)} is VALID [2018-11-23 10:53:36,067 INFO L273 TraceCheckUtils]: 21: Hoare triple {1801#(= (_ bv0 32) main_~p1~0)} assume 0bv32 != ~p1~0; {1776#false} is VALID [2018-11-23 10:53:36,068 INFO L273 TraceCheckUtils]: 22: Hoare triple {1776#false} assume 1bv32 != ~lk1~0; {1776#false} is VALID [2018-11-23 10:53:36,068 INFO L273 TraceCheckUtils]: 23: Hoare triple {1776#false} assume !false; {1776#false} is VALID [2018-11-23 10:53:36,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:53:36,069 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:53:36,078 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:53:36,078 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:53:36,078 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:36,079 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:53:36,079 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:53:36,122 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:36,122 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:53:36,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:53:36,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:36,123 INFO L87 Difference]: Start difference. First operand 130 states and 237 transitions. Second operand 3 states. [2018-11-23 10:53:36,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:36,396 INFO L93 Difference]: Finished difference Result 179 states and 322 transitions. [2018-11-23 10:53:36,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:53:36,396 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-23 10:53:36,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:53:36,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:36,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 259 transitions. [2018-11-23 10:53:36,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:53:36,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 259 transitions. [2018-11-23 10:53:36,405 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 259 transitions. [2018-11-23 10:53:36,735 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 259 edges. 259 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:53:36,739 INFO L225 Difference]: With dead ends: 179 [2018-11-23 10:53:36,739 INFO L226 Difference]: Without dead ends: 130 [2018-11-23 10:53:36,740 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:53:36,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-11-23 10:53:36,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 128. [2018-11-23 10:53:36,806 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:53:36,806 INFO L82 GeneralOperation]: Start isEquivalent. First operand 130 states. Second operand 128 states. [2018-11-23 10:53:36,806 INFO L74 IsIncluded]: Start isIncluded. First operand 130 states. Second operand 128 states. [2018-11-23 10:53:36,806 INFO L87 Difference]: Start difference. First operand 130 states. Second operand 128 states. [2018-11-23 10:53:36,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:36,811 INFO L93 Difference]: Finished difference Result 130 states and 231 transitions. [2018-11-23 10:53:36,811 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 231 transitions. [2018-11-23 10:53:36,812 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:36,812 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:36,812 INFO L74 IsIncluded]: Start isIncluded. First operand 128 states. Second operand 130 states. [2018-11-23 10:53:36,813 INFO L87 Difference]: Start difference. First operand 128 states. Second operand 130 states. [2018-11-23 10:53:36,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:53:36,818 INFO L93 Difference]: Finished difference Result 130 states and 231 transitions. [2018-11-23 10:53:36,819 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 231 transitions. [2018-11-23 10:53:36,819 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:53:36,819 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:53:36,819 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:53:36,820 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:53:36,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-11-23 10:53:36,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 230 transitions. [2018-11-23 10:53:36,825 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 230 transitions. Word has length 24 [2018-11-23 10:53:36,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:53:36,826 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 230 transitions. [2018-11-23 10:53:36,826 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:53:36,826 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 230 transitions. [2018-11-23 10:53:36,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:53:36,827 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:53:36,827 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:53:36,827 INFO L423 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:53:36,828 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:53:36,828 INFO L82 PathProgramCache]: Analyzing trace with hash -914888801, now seen corresponding path program 1 times [2018-11-23 10:53:36,828 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:53:36,828 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:53:36,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:53:36,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 10:53:36,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 10:53:36,960 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); [?] assume true; [?] RET #265#return; [?] CALL call #t~ret15 := main(); [?] ~p1~0 := #t~nondet0;havoc #t~nondet0;havoc ~lk1~0;~p2~0 := #t~nondet1;havoc #t~nondet1;havoc ~lk2~0;~p3~0 := #t~nondet2;havoc #t~nondet2;havoc ~lk3~0;~p4~0 := #t~nondet3;havoc #t~nondet3;havoc ~lk4~0;~p5~0 := #t~nondet4;havoc #t~nondet4;havoc ~lk5~0;~p6~0 := #t~nondet5;havoc #t~nondet5;havoc ~lk6~0;~p7~0 := #t~nondet6;havoc #t~nondet6;havoc ~lk7~0;~p8~0 := #t~nondet7;havoc #t~nondet7;havoc ~lk8~0;~p9~0 := #t~nondet8;havoc #t~nondet8;havoc ~lk9~0;~p10~0 := #t~nondet9;havoc #t~nondet9;havoc ~lk10~0;~p11~0 := #t~nondet10;havoc #t~nondet10;havoc ~lk11~0;~p12~0 := #t~nondet11;havoc #t~nondet11;havoc ~lk12~0;~p13~0 := #t~nondet12;havoc #t~nondet12;havoc ~lk13~0;~p14~0 := #t~nondet13;havoc #t~nondet13;havoc ~lk14~0;havoc ~cond~0; VAL [main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !false;~cond~0 := #t~nondet14;havoc #t~nondet14; VAL [main_~cond~0=(_ bv13 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 == ~cond~0);~lk1~0 := 0bv32;~lk2~0 := 0bv32;~lk3~0 := 0bv32;~lk4~0 := 0bv32;~lk5~0 := 0bv32;~lk6~0 := 0bv32;~lk7~0 := 0bv32;~lk8~0 := 0bv32;~lk9~0 := 0bv32;~lk10~0 := 0bv32;~lk11~0 := 0bv32;~lk12~0 := 0bv32;~lk13~0 := 0bv32;~lk14~0 := 0bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv0 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p1~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv0 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p2~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv0 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p3~0;~lk3~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p4~0;~lk4~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p5~0;~lk5~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p6~0;~lk6~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p7~0;~lk7~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p8~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p9~0;~lk9~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p10~0;~lk10~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p11~0;~lk11~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p12~0;~lk12~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p13~0;~lk13~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p14~0;~lk14~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p1~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p2~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !false; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] assume !false; [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53-L55] assume !(0bv32 == ~cond~0); [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86-L88] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90-L92] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94-L96] assume 0bv32 != ~p3~0; [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98-L100] assume 0bv32 != ~p4~0; [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102-L104] assume 0bv32 != ~p5~0; [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106-L108] assume 0bv32 != ~p6~0; [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110-L112] assume 0bv32 != ~p7~0; [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114-L116] assume !(0bv32 != ~p8~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118-L120] assume 0bv32 != ~p9~0; [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122-L124] assume 0bv32 != ~p10~0; [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126-L128] assume 0bv32 != ~p11~0; [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130-L132] assume 0bv32 != ~p12~0; [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134-L136] assume 0bv32 != ~p13~0; [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138-L140] assume 0bv32 != ~p14~0; [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144-L147] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149-L152] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] assume !false; [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53-L55] assume !(0bv32 == ~cond~0); [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86-L88] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90-L92] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94-L96] assume 0bv32 != ~p3~0; [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98-L100] assume 0bv32 != ~p4~0; [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102-L104] assume 0bv32 != ~p5~0; [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106-L108] assume 0bv32 != ~p6~0; [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110-L112] assume 0bv32 != ~p7~0; [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114-L116] assume !(0bv32 != ~p8~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118-L120] assume 0bv32 != ~p9~0; [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122-L124] assume 0bv32 != ~p10~0; [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126-L128] assume 0bv32 != ~p11~0; [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130-L132] assume 0bv32 != ~p12~0; [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134-L136] assume 0bv32 != ~p13~0; [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138-L140] assume 0bv32 != ~p14~0; [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144-L147] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149-L152] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L6] int p1 = __VERIFIER_nondet_int(); [L7] int lk1; [L9] int p2 = __VERIFIER_nondet_int(); [L10] int lk2; [L12] int p3 = __VERIFIER_nondet_int(); [L13] int lk3; [L15] int p4 = __VERIFIER_nondet_int(); [L16] int lk4; [L18] int p5 = __VERIFIER_nondet_int(); [L19] int lk5; [L21] int p6 = __VERIFIER_nondet_int(); [L22] int lk6; [L24] int p7 = __VERIFIER_nondet_int(); [L25] int lk7; [L27] int p8 = __VERIFIER_nondet_int(); [L28] int lk8; [L30] int p9 = __VERIFIER_nondet_int(); [L31] int lk9; [L33] int p10 = __VERIFIER_nondet_int(); [L34] int lk10; [L36] int p11 = __VERIFIER_nondet_int(); [L37] int lk11; [L39] int p12 = __VERIFIER_nondet_int(); [L40] int lk12; [L42] int p13 = __VERIFIER_nondet_int(); [L43] int lk13; [L45] int p14 = __VERIFIER_nondet_int(); [L46] int lk14; [L49] int cond; VAL [p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L51] COND TRUE 1 [L52] cond = __VERIFIER_nondet_int() [L53] COND FALSE !(cond == 0) [L56] lk1 = 0 [L58] lk2 = 0 [L60] lk3 = 0 [L62] lk4 = 0 [L64] lk5 = 0 [L66] lk6 = 0 [L68] lk7 = 0 [L70] lk8 = 0 [L72] lk9 = 0 [L74] lk10 = 0 [L76] lk11 = 0 [L78] lk12 = 0 [L80] lk13 = 0 [L82] lk14 = 0 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L86] COND FALSE !(p1 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L90] COND FALSE !(p2 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L94] COND TRUE p3 != 0 [L95] lk3 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L98] COND TRUE p4 != 0 [L99] lk4 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L102] COND TRUE p5 != 0 [L103] lk5 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L106] COND TRUE p6 != 0 [L107] lk6 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L110] COND TRUE p7 != 0 [L111] lk7 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L114] COND FALSE !(p8 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L118] COND TRUE p9 != 0 [L119] lk9 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L122] COND TRUE p10 != 0 [L123] lk10 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L126] COND TRUE p11 != 0 [L127] lk11 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L130] COND TRUE p12 != 0 [L131] lk12 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L134] COND TRUE p13 != 0 [L135] lk13 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L138] COND TRUE p14 != 0 [L139] lk14 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L144] COND FALSE !(p1 != 0) VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L149] COND FALSE !(p2 != 0) VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L217] __VERIFIER_error() VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] ----- [2018-11-23 10:53:37,183 WARN L170 areAnnotationChecker]: ULTIMATE.initFINAL has no Hoare annotation [2018-11-23 10:53:37,183 WARN L170 areAnnotationChecker]: ULTIMATE.startENTRY has no Hoare annotation [2018-11-23 10:53:37,183 WARN L170 areAnnotationChecker]: ULTIMATE.startENTRY has no Hoare annotation [2018-11-23 10:53:37,183 WARN L170 areAnnotationChecker]: mainENTRY has no Hoare annotation [2018-11-23 10:53:37,183 WARN L170 areAnnotationChecker]: ULTIMATE.initEXIT has no Hoare annotation [2018-11-23 10:53:37,183 WARN L170 areAnnotationChecker]: L-1 has no Hoare annotation [2018-11-23 10:53:37,183 WARN L170 areAnnotationChecker]: L-1 has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: L209 has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: L209 has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: L209 has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: L215 has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: L53 has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: L53 has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: mainFINAL has no Hoare annotation [2018-11-23 10:53:37,184 WARN L170 areAnnotationChecker]: L86 has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: L86 has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: mainEXIT has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: L86-2 has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: L86-2 has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: L90-1 has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: L90-1 has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: L94-1 has no Hoare annotation [2018-11-23 10:53:37,185 WARN L170 areAnnotationChecker]: L94-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L98-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L98-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L102-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L102-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L106-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L106-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L110-1 has no Hoare annotation [2018-11-23 10:53:37,186 WARN L170 areAnnotationChecker]: L110-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L114-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L114-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L118-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L118-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L122-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L122-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L126-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L126-1 has no Hoare annotation [2018-11-23 10:53:37,187 WARN L170 areAnnotationChecker]: L130-1 has no Hoare annotation [2018-11-23 10:53:37,188 WARN L170 areAnnotationChecker]: L130-1 has no Hoare annotation [2018-11-23 10:53:37,188 WARN L170 areAnnotationChecker]: L134-1 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L134-1 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L138-1 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L138-1 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L145 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L145 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L144-1 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L144-1 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L212 has no Hoare annotation [2018-11-23 10:53:37,189 WARN L170 areAnnotationChecker]: L212 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L150 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L150 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L149 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L149 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L155 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L155 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L154-1 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L154-1 has no Hoare annotation [2018-11-23 10:53:37,190 WARN L170 areAnnotationChecker]: L160 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L160 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L159-1 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L159-1 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L165 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L165 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L164-1 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L164-1 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L170 has no Hoare annotation [2018-11-23 10:53:37,191 WARN L170 areAnnotationChecker]: L170 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L169-1 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L169-1 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L175 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L175 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L174-1 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L174-1 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L180 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L180 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L179-1 has no Hoare annotation [2018-11-23 10:53:37,192 WARN L170 areAnnotationChecker]: L179-1 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L185 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L185 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L184-1 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L184-1 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L190 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L190 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L189-1 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L189-1 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L195 has no Hoare annotation [2018-11-23 10:53:37,193 WARN L170 areAnnotationChecker]: L195 has no Hoare annotation [2018-11-23 10:53:37,194 WARN L170 areAnnotationChecker]: L194-1 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L194-1 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L200 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L200 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L199-1 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L199-1 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L205 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L205 has no Hoare annotation [2018-11-23 10:53:37,195 WARN L170 areAnnotationChecker]: L204-1 has no Hoare annotation [2018-11-23 10:53:37,196 WARN L170 areAnnotationChecker]: L204-1 has no Hoare annotation [2018-11-23 10:53:37,196 WARN L170 areAnnotationChecker]: L210 has no Hoare annotation [2018-11-23 10:53:37,196 WARN L170 areAnnotationChecker]: L210 has no Hoare annotation [2018-11-23 10:53:37,196 INFO L163 areAnnotationChecker]: CFG has 0 edges. 0 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [2018-11-23 10:53:37,200 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 10:53:37 BoogieIcfgContainer [2018-11-23 10:53:37,200 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 10:53:37,201 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 10:53:37,201 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 10:53:37,201 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 10:53:37,202 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:53:31" (3/4) ... [2018-11-23 10:53:37,205 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); [?] assume true; [?] RET #265#return; [?] CALL call #t~ret15 := main(); [?] ~p1~0 := #t~nondet0;havoc #t~nondet0;havoc ~lk1~0;~p2~0 := #t~nondet1;havoc #t~nondet1;havoc ~lk2~0;~p3~0 := #t~nondet2;havoc #t~nondet2;havoc ~lk3~0;~p4~0 := #t~nondet3;havoc #t~nondet3;havoc ~lk4~0;~p5~0 := #t~nondet4;havoc #t~nondet4;havoc ~lk5~0;~p6~0 := #t~nondet5;havoc #t~nondet5;havoc ~lk6~0;~p7~0 := #t~nondet6;havoc #t~nondet6;havoc ~lk7~0;~p8~0 := #t~nondet7;havoc #t~nondet7;havoc ~lk8~0;~p9~0 := #t~nondet8;havoc #t~nondet8;havoc ~lk9~0;~p10~0 := #t~nondet9;havoc #t~nondet9;havoc ~lk10~0;~p11~0 := #t~nondet10;havoc #t~nondet10;havoc ~lk11~0;~p12~0 := #t~nondet11;havoc #t~nondet11;havoc ~lk12~0;~p13~0 := #t~nondet12;havoc #t~nondet12;havoc ~lk13~0;~p14~0 := #t~nondet13;havoc #t~nondet13;havoc ~lk14~0;havoc ~cond~0; VAL [main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !false;~cond~0 := #t~nondet14;havoc #t~nondet14; VAL [main_~cond~0=(_ bv13 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 == ~cond~0);~lk1~0 := 0bv32;~lk2~0 := 0bv32;~lk3~0 := 0bv32;~lk4~0 := 0bv32;~lk5~0 := 0bv32;~lk6~0 := 0bv32;~lk7~0 := 0bv32;~lk8~0 := 0bv32;~lk9~0 := 0bv32;~lk10~0 := 0bv32;~lk11~0 := 0bv32;~lk12~0 := 0bv32;~lk13~0 := 0bv32;~lk14~0 := 0bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv0 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p1~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv0 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p2~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv0 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p3~0;~lk3~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv0 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p4~0;~lk4~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv0 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p5~0;~lk5~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv0 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p6~0;~lk6~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv0 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p7~0;~lk7~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p8~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv0 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p9~0;~lk9~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv0 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p10~0;~lk10~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv0 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p11~0;~lk11~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv0 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p12~0;~lk12~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv0 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p13~0;~lk13~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv0 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume 0bv32 != ~p14~0;~lk14~0 := 1bv32; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p1~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !(0bv32 != ~p2~0); VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] assume !false; VAL [main_~cond~0=(_ bv13 32), main_~lk10~0=(_ bv1 32), main_~lk11~0=(_ bv1 32), main_~lk12~0=(_ bv1 32), main_~lk13~0=(_ bv1 32), main_~lk14~0=(_ bv1 32), main_~lk1~0=(_ bv0 32), main_~lk2~0=(_ bv0 32), main_~lk3~0=(_ bv1 32), main_~lk4~0=(_ bv1 32), main_~lk5~0=(_ bv1 32), main_~lk6~0=(_ bv1 32), main_~lk7~0=(_ bv1 32), main_~lk8~0=(_ bv0 32), main_~lk9~0=(_ bv1 32), main_~p10~0=(_ bv7 32), main_~p11~0=(_ bv2 32), main_~p12~0=(_ bv4 32), main_~p13~0=(_ bv3 32), main_~p14~0=(_ bv8 32), main_~p1~0=(_ bv0 32), main_~p2~0=(_ bv0 32), main_~p3~0=(_ bv9 32), main_~p4~0=(_ bv10 32), main_~p5~0=(_ bv12 32), main_~p6~0=(_ bv6 32), main_~p7~0=(_ bv11 32), main_~p8~0=(_ bv0 32), main_~p9~0=(_ bv5 32)] [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] assume !false; [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53-L55] assume !(0bv32 == ~cond~0); [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86-L88] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90-L92] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94-L96] assume 0bv32 != ~p3~0; [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98-L100] assume 0bv32 != ~p4~0; [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102-L104] assume 0bv32 != ~p5~0; [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106-L108] assume 0bv32 != ~p6~0; [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110-L112] assume 0bv32 != ~p7~0; [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114-L116] assume !(0bv32 != ~p8~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118-L120] assume 0bv32 != ~p9~0; [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122-L124] assume 0bv32 != ~p10~0; [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126-L128] assume 0bv32 != ~p11~0; [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130-L132] assume 0bv32 != ~p12~0; [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134-L136] assume 0bv32 != ~p13~0; [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138-L140] assume 0bv32 != ~p14~0; [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144-L147] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149-L152] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] assume !false; [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53-L55] assume !(0bv32 == ~cond~0); [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86-L88] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90-L92] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94-L96] assume 0bv32 != ~p3~0; [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98-L100] assume 0bv32 != ~p4~0; [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102-L104] assume 0bv32 != ~p5~0; [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106-L108] assume 0bv32 != ~p6~0; [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110-L112] assume 0bv32 != ~p7~0; [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114-L116] assume !(0bv32 != ~p8~0); VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118-L120] assume 0bv32 != ~p9~0; [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122-L124] assume 0bv32 != ~p10~0; [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126-L128] assume 0bv32 != ~p11~0; [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130-L132] assume 0bv32 != ~p12~0; [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134-L136] assume 0bv32 != ~p13~0; [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138-L140] assume 0bv32 != ~p14~0; [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144-L147] assume !(0bv32 != ~p1~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149-L152] assume !(0bv32 != ~p2~0); VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret15 := main(); [L6] ~p1~0 := #t~nondet0; [L6] havoc #t~nondet0; [L7] havoc ~lk1~0; [L9] ~p2~0 := #t~nondet1; [L9] havoc #t~nondet1; [L10] havoc ~lk2~0; [L12] ~p3~0 := #t~nondet2; [L12] havoc #t~nondet2; [L13] havoc ~lk3~0; [L15] ~p4~0 := #t~nondet3; [L15] havoc #t~nondet3; [L16] havoc ~lk4~0; [L18] ~p5~0 := #t~nondet4; [L18] havoc #t~nondet4; [L19] havoc ~lk5~0; [L21] ~p6~0 := #t~nondet5; [L21] havoc #t~nondet5; [L22] havoc ~lk6~0; [L24] ~p7~0 := #t~nondet6; [L24] havoc #t~nondet6; [L25] havoc ~lk7~0; [L27] ~p8~0 := #t~nondet7; [L27] havoc #t~nondet7; [L28] havoc ~lk8~0; [L30] ~p9~0 := #t~nondet8; [L30] havoc #t~nondet8; [L31] havoc ~lk9~0; [L33] ~p10~0 := #t~nondet9; [L33] havoc #t~nondet9; [L34] havoc ~lk10~0; [L36] ~p11~0 := #t~nondet10; [L36] havoc #t~nondet10; [L37] havoc ~lk11~0; [L39] ~p12~0 := #t~nondet11; [L39] havoc #t~nondet11; [L40] havoc ~lk12~0; [L42] ~p13~0 := #t~nondet12; [L42] havoc #t~nondet12; [L43] havoc ~lk13~0; [L45] ~p14~0 := #t~nondet13; [L45] havoc #t~nondet13; [L46] havoc ~lk14~0; [L49] havoc ~cond~0; VAL [~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L51-L214] COND FALSE !(false) [L52] ~cond~0 := #t~nondet14; [L52] havoc #t~nondet14; VAL [~cond~0=13bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L53] COND FALSE !(0bv32 == ~cond~0) [L56] ~lk1~0 := 0bv32; [L58] ~lk2~0 := 0bv32; [L60] ~lk3~0 := 0bv32; [L62] ~lk4~0 := 0bv32; [L64] ~lk5~0 := 0bv32; [L66] ~lk6~0 := 0bv32; [L68] ~lk7~0 := 0bv32; [L70] ~lk8~0 := 0bv32; [L72] ~lk9~0 := 0bv32; [L74] ~lk10~0 := 0bv32; [L76] ~lk11~0 := 0bv32; [L78] ~lk12~0 := 0bv32; [L80] ~lk13~0 := 0bv32; [L82] ~lk14~0 := 0bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L86] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L90] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=0bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L94] COND TRUE 0bv32 != ~p3~0 [L95] ~lk3~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=0bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L98] COND TRUE 0bv32 != ~p4~0 [L99] ~lk4~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=0bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L102] COND TRUE 0bv32 != ~p5~0 [L103] ~lk5~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=0bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L106] COND TRUE 0bv32 != ~p6~0 [L107] ~lk6~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=0bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L110] COND TRUE 0bv32 != ~p7~0 [L111] ~lk7~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L114] COND FALSE !(0bv32 != ~p8~0) VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=0bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L118] COND TRUE 0bv32 != ~p9~0 [L119] ~lk9~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=0bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L122] COND TRUE 0bv32 != ~p10~0 [L123] ~lk10~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=0bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L126] COND TRUE 0bv32 != ~p11~0 [L127] ~lk11~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=0bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L130] COND TRUE 0bv32 != ~p12~0 [L131] ~lk12~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=0bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L134] COND TRUE 0bv32 != ~p13~0 [L135] ~lk13~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=0bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L138] COND TRUE 0bv32 != ~p14~0 [L139] ~lk14~0 := 1bv32; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L144] COND FALSE !(0bv32 != ~p1~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L149] COND FALSE !(0bv32 != ~p2~0) VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L217] assert false; VAL [~cond~0=13bv32, ~lk10~0=1bv32, ~lk11~0=1bv32, ~lk12~0=1bv32, ~lk13~0=1bv32, ~lk14~0=1bv32, ~lk1~0=0bv32, ~lk2~0=0bv32, ~lk3~0=1bv32, ~lk4~0=1bv32, ~lk5~0=1bv32, ~lk6~0=1bv32, ~lk7~0=1bv32, ~lk8~0=0bv32, ~lk9~0=1bv32, ~p10~0=7bv32, ~p11~0=2bv32, ~p12~0=4bv32, ~p13~0=3bv32, ~p14~0=8bv32, ~p1~0=0bv32, ~p2~0=0bv32, ~p3~0=9bv32, ~p4~0=10bv32, ~p5~0=12bv32, ~p6~0=6bv32, ~p7~0=11bv32, ~p8~0=0bv32, ~p9~0=5bv32] [L6] int p1 = __VERIFIER_nondet_int(); [L7] int lk1; [L9] int p2 = __VERIFIER_nondet_int(); [L10] int lk2; [L12] int p3 = __VERIFIER_nondet_int(); [L13] int lk3; [L15] int p4 = __VERIFIER_nondet_int(); [L16] int lk4; [L18] int p5 = __VERIFIER_nondet_int(); [L19] int lk5; [L21] int p6 = __VERIFIER_nondet_int(); [L22] int lk6; [L24] int p7 = __VERIFIER_nondet_int(); [L25] int lk7; [L27] int p8 = __VERIFIER_nondet_int(); [L28] int lk8; [L30] int p9 = __VERIFIER_nondet_int(); [L31] int lk9; [L33] int p10 = __VERIFIER_nondet_int(); [L34] int lk10; [L36] int p11 = __VERIFIER_nondet_int(); [L37] int lk11; [L39] int p12 = __VERIFIER_nondet_int(); [L40] int lk12; [L42] int p13 = __VERIFIER_nondet_int(); [L43] int lk13; [L45] int p14 = __VERIFIER_nondet_int(); [L46] int lk14; [L49] int cond; VAL [p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L51] COND TRUE 1 [L52] cond = __VERIFIER_nondet_int() [L53] COND FALSE !(cond == 0) [L56] lk1 = 0 [L58] lk2 = 0 [L60] lk3 = 0 [L62] lk4 = 0 [L64] lk5 = 0 [L66] lk6 = 0 [L68] lk7 = 0 [L70] lk8 = 0 [L72] lk9 = 0 [L74] lk10 = 0 [L76] lk11 = 0 [L78] lk12 = 0 [L80] lk13 = 0 [L82] lk14 = 0 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L86] COND FALSE !(p1 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L90] COND FALSE !(p2 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L94] COND TRUE p3 != 0 [L95] lk3 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L98] COND TRUE p4 != 0 [L99] lk4 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L102] COND TRUE p5 != 0 [L103] lk5 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L106] COND TRUE p6 != 0 [L107] lk6 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L110] COND TRUE p7 != 0 [L111] lk7 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L114] COND FALSE !(p8 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L118] COND TRUE p9 != 0 [L119] lk9 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L122] COND TRUE p10 != 0 [L123] lk10 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L126] COND TRUE p11 != 0 [L127] lk11 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L130] COND TRUE p12 != 0 [L131] lk12 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L134] COND TRUE p13 != 0 [L135] lk13 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L138] COND TRUE p14 != 0 [L139] lk14 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L144] COND FALSE !(p1 != 0) VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L149] COND FALSE !(p2 != 0) VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L217] __VERIFIER_error() VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] ----- [2018-11-23 10:53:37,372 INFO L145 WitnessManager]: Wrote witness to /storage/repos/svcomp/c/locks/test_locks_14_false-unreach-call_true-valid-memsafety_false-termination.c-witness.graphml [2018-11-23 10:53:37,372 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 10:53:37,374 INFO L168 Benchmark]: Toolchain (without parser) took 7782.00 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 728.2 MB). Free memory was 1.4 GB in the beginning and 1.7 GB in the end (delta: -246.3 MB). Peak memory consumption was 481.9 MB. Max. memory is 7.1 GB. [2018-11-23 10:53:37,376 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-11-23 10:53:37,376 INFO L168 Benchmark]: CACSL2BoogieTranslator took 395.77 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-11-23 10:53:37,379 INFO L168 Benchmark]: Boogie Procedure Inliner took 29.02 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-11-23 10:53:37,379 INFO L168 Benchmark]: Boogie Preprocessor took 43.89 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-11-23 10:53:37,380 INFO L168 Benchmark]: RCFGBuilder took 1235.56 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 728.2 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -738.4 MB). Peak memory consumption was 15.3 MB. Max. memory is 7.1 GB. [2018-11-23 10:53:37,380 INFO L168 Benchmark]: TraceAbstraction took 5900.68 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 1.7 GB in the end (delta: 455.1 MB). Peak memory consumption was 455.1 MB. Max. memory is 7.1 GB. [2018-11-23 10:53:37,381 INFO L168 Benchmark]: Witness Printer took 171.66 ms. Allocated memory is still 2.3 GB. Free memory was 1.7 GB in the beginning and 1.7 GB in the end (delta: 26.4 MB). Peak memory consumption was 26.4 MB. Max. memory is 7.1 GB. [2018-11-23 10:53:37,389 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - GenericResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 395.77 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 29.02 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 43.89 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 1235.56 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 728.2 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -738.4 MB). Peak memory consumption was 15.3 MB. Max. memory is 7.1 GB. * TraceAbstraction took 5900.68 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 1.7 GB in the end (delta: 455.1 MB). Peak memory consumption was 455.1 MB. Max. memory is 7.1 GB. * Witness Printer took 171.66 ms. Allocated memory is still 2.3 GB. Free memory was 1.7 GB in the beginning and 1.7 GB in the end (delta: 26.4 MB). Peak memory consumption was 26.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 217]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L6] int p1 = __VERIFIER_nondet_int(); [L7] int lk1; [L9] int p2 = __VERIFIER_nondet_int(); [L10] int lk2; [L12] int p3 = __VERIFIER_nondet_int(); [L13] int lk3; [L15] int p4 = __VERIFIER_nondet_int(); [L16] int lk4; [L18] int p5 = __VERIFIER_nondet_int(); [L19] int lk5; [L21] int p6 = __VERIFIER_nondet_int(); [L22] int lk6; [L24] int p7 = __VERIFIER_nondet_int(); [L25] int lk7; [L27] int p8 = __VERIFIER_nondet_int(); [L28] int lk8; [L30] int p9 = __VERIFIER_nondet_int(); [L31] int lk9; [L33] int p10 = __VERIFIER_nondet_int(); [L34] int lk10; [L36] int p11 = __VERIFIER_nondet_int(); [L37] int lk11; [L39] int p12 = __VERIFIER_nondet_int(); [L40] int lk12; [L42] int p13 = __VERIFIER_nondet_int(); [L43] int lk13; [L45] int p14 = __VERIFIER_nondet_int(); [L46] int lk14; [L49] int cond; VAL [p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L51] COND TRUE 1 [L52] cond = __VERIFIER_nondet_int() [L53] COND FALSE !(cond == 0) [L56] lk1 = 0 [L58] lk2 = 0 [L60] lk3 = 0 [L62] lk4 = 0 [L64] lk5 = 0 [L66] lk6 = 0 [L68] lk7 = 0 [L70] lk8 = 0 [L72] lk9 = 0 [L74] lk10 = 0 [L76] lk11 = 0 [L78] lk12 = 0 [L80] lk13 = 0 [L82] lk14 = 0 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L86] COND FALSE !(p1 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L90] COND FALSE !(p2 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=0, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L94] COND TRUE p3 != 0 [L95] lk3 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=0, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L98] COND TRUE p4 != 0 [L99] lk4 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=0, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L102] COND TRUE p5 != 0 [L103] lk5 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=0, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L106] COND TRUE p6 != 0 [L107] lk6 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=0, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L110] COND TRUE p7 != 0 [L111] lk7 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L114] COND FALSE !(p8 != 0) VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=0, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L118] COND TRUE p9 != 0 [L119] lk9 = 1 VAL [cond=13, lk1=0, lk10=0, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L122] COND TRUE p10 != 0 [L123] lk10 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=0, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L126] COND TRUE p11 != 0 [L127] lk11 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=0, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L130] COND TRUE p12 != 0 [L131] lk12 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=0, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L134] COND TRUE p13 != 0 [L135] lk13 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=0, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L138] COND TRUE p14 != 0 [L139] lk14 = 1 VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L144] COND FALSE !(p1 != 0) VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L149] COND FALSE !(p2 != 0) VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] [L217] __VERIFIER_error() VAL [cond=13, lk1=0, lk10=1, lk11=1, lk12=1, lk13=1, lk14=1, lk2=0, lk3=1, lk4=1, lk5=1, lk6=1, lk7=1, lk8=0, lk9=1, p1=0, p10=7, p11=2, p12=4, p13=3, p14=8, p2=0, p3=9, p4=10, p5=12, p6=6, p7=11, p8=0, p9=5] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 56 locations, 1 error locations. UNSAFE Result, 5.8s OverallTime, 5 OverallIterations, 1 TraceHistogramMax, 3.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 458 SDtfs, 227 SDslu, 301 SDs, 0 SdLazy, 20 SolverSat, 5 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 92 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=130occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 4 MinimizatonAttempts, 6 StatesRemovedByMinimization, 3 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 120 NumberOfCodeBlocks, 120 NumberOfCodeBlocksAsserted, 5 NumberOfCheckSat, 92 ConstructedInterpolants, 0 QuantifiedInterpolants, 6072 SizeOfPredicates, 1 NumberOfNonLiveVariables, 278 ConjunctsInSsa, 8 ConjunctsInUnsatCore, 4 InterpolantComputations, 4 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...