java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-crafted/zero_sum_const3_true-unreach-call.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:40:20,753 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:40:20,755 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:40:20,767 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:40:20,767 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:40:20,768 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:40:20,770 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:40:20,771 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:40:20,773 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:40:20,774 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:40:20,775 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:40:20,775 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:40:20,776 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:40:20,777 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:40:20,778 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:40:20,779 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:40:20,780 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:40:20,782 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:40:20,784 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:40:20,785 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:40:20,787 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:40:20,788 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:40:20,790 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:40:20,791 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:40:20,791 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:40:20,792 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:40:20,793 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:40:20,794 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:40:20,795 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:40:20,796 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:40:20,796 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:40:20,797 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:40:20,797 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:40:20,797 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:40:20,798 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:40:20,799 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:40:20,799 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:40:20,815 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:40:20,815 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:40:20,816 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:40:20,816 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:40:20,817 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:40:20,817 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:40:20,817 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:40:20,818 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:40:20,818 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:40:20,818 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:40:20,818 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:40:20,818 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:40:20,819 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:40:20,819 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:40:20,819 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:40:20,819 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:40:20,819 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:40:20,819 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:40:20,820 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:40:20,820 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:40:20,820 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:40:20,820 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:40:20,820 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:40:20,821 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:40:20,821 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:40:20,821 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:40:20,821 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:40:20,821 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:40:20,822 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:40:20,822 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:40:20,822 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:40:20,822 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:40:20,822 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:40:20,867 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:40:20,880 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:40:20,884 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:40:20,885 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:40:20,886 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:40:20,887 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/zero_sum_const3_true-unreach-call.c [2018-11-23 10:40:20,952 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ff652c855/a63fec61613547d497d5e7b7749e5533/FLAG3d567c229 [2018-11-23 10:40:21,391 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:40:21,392 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/zero_sum_const3_true-unreach-call.c [2018-11-23 10:40:21,399 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ff652c855/a63fec61613547d497d5e7b7749e5533/FLAG3d567c229 [2018-11-23 10:40:21,735 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ff652c855/a63fec61613547d497d5e7b7749e5533 [2018-11-23 10:40:21,746 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:40:21,747 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:40:21,748 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:40:21,749 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:40:21,754 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:40:21,755 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:40:21" (1/1) ... [2018-11-23 10:40:21,758 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6d13a4e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:21, skipping insertion in model container [2018-11-23 10:40:21,759 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:40:21" (1/1) ... [2018-11-23 10:40:21,770 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:40:21,799 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:40:22,058 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:40:22,069 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:40:22,118 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:40:22,156 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:40:22,157 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22 WrapperNode [2018-11-23 10:40:22,157 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:40:22,159 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:40:22,159 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:40:22,159 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:40:22,170 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,183 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,192 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:40:22,193 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:40:22,193 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:40:22,193 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:40:22,206 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,206 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,209 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,210 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,239 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,250 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,252 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... [2018-11-23 10:40:22,255 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:40:22,255 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:40:22,256 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:40:22,256 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:40:22,259 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:40:22,386 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:40:22,386 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:40:22,386 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:40:22,387 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:40:22,387 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:40:22,387 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:40:22,387 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:40:22,387 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:40:22,387 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:40:22,387 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:40:22,388 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:40:22,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:40:23,309 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:40:23,310 INFO L280 CfgBuilder]: Removed 7 assue(true) statements. [2018-11-23 10:40:23,310 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:40:23 BoogieIcfgContainer [2018-11-23 10:40:23,310 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:40:23,311 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:40:23,311 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:40:23,315 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:40:23,315 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:40:21" (1/3) ... [2018-11-23 10:40:23,316 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@187cae9e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:40:23, skipping insertion in model container [2018-11-23 10:40:23,316 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:22" (2/3) ... [2018-11-23 10:40:23,317 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@187cae9e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:40:23, skipping insertion in model container [2018-11-23 10:40:23,317 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:40:23" (3/3) ... [2018-11-23 10:40:23,319 INFO L112 eAbstractionObserver]: Analyzing ICFG zero_sum_const3_true-unreach-call.c [2018-11-23 10:40:23,329 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:40:23,338 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:40:23,356 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:40:23,388 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:40:23,389 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:40:23,389 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:40:23,389 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:40:23,389 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:40:23,389 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:40:23,390 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:40:23,390 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:40:23,390 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:40:23,408 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2018-11-23 10:40:23,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:40:23,415 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:23,416 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:23,418 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:23,424 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:23,425 INFO L82 PathProgramCache]: Analyzing trace with hash -604531369, now seen corresponding path program 1 times [2018-11-23 10:40:23,429 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:23,430 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:23,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:23,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:23,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:23,549 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:23,624 INFO L256 TraceCheckUtils]: 0: Hoare triple {43#true} call ULTIMATE.init(); {43#true} is VALID [2018-11-23 10:40:23,628 INFO L273 TraceCheckUtils]: 1: Hoare triple {43#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {43#true} is VALID [2018-11-23 10:40:23,629 INFO L273 TraceCheckUtils]: 2: Hoare triple {43#true} assume true; {43#true} is VALID [2018-11-23 10:40:23,629 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {43#true} {43#true} #125#return; {43#true} is VALID [2018-11-23 10:40:23,629 INFO L256 TraceCheckUtils]: 4: Hoare triple {43#true} call #t~ret15 := main(); {43#true} is VALID [2018-11-23 10:40:23,629 INFO L273 TraceCheckUtils]: 5: Hoare triple {43#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {43#true} is VALID [2018-11-23 10:40:23,630 INFO L273 TraceCheckUtils]: 6: Hoare triple {43#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {43#true} is VALID [2018-11-23 10:40:23,631 INFO L273 TraceCheckUtils]: 7: Hoare triple {43#true} assume !true; {44#false} is VALID [2018-11-23 10:40:23,631 INFO L273 TraceCheckUtils]: 8: Hoare triple {44#false} ~i~0 := 0bv32; {44#false} is VALID [2018-11-23 10:40:23,631 INFO L273 TraceCheckUtils]: 9: Hoare triple {44#false} assume !true; {44#false} is VALID [2018-11-23 10:40:23,632 INFO L273 TraceCheckUtils]: 10: Hoare triple {44#false} ~i~0 := 0bv32; {44#false} is VALID [2018-11-23 10:40:23,632 INFO L273 TraceCheckUtils]: 11: Hoare triple {44#false} assume !true; {44#false} is VALID [2018-11-23 10:40:23,632 INFO L273 TraceCheckUtils]: 12: Hoare triple {44#false} ~i~0 := 0bv32; {44#false} is VALID [2018-11-23 10:40:23,633 INFO L273 TraceCheckUtils]: 13: Hoare triple {44#false} assume !~bvslt32(~i~0, ~SIZE~0); {44#false} is VALID [2018-11-23 10:40:23,633 INFO L273 TraceCheckUtils]: 14: Hoare triple {44#false} ~i~0 := 0bv32; {44#false} is VALID [2018-11-23 10:40:23,633 INFO L273 TraceCheckUtils]: 15: Hoare triple {44#false} assume !~bvslt32(~i~0, ~SIZE~0); {44#false} is VALID [2018-11-23 10:40:23,634 INFO L273 TraceCheckUtils]: 16: Hoare triple {44#false} ~i~0 := 0bv32; {44#false} is VALID [2018-11-23 10:40:23,634 INFO L273 TraceCheckUtils]: 17: Hoare triple {44#false} assume !~bvslt32(~i~0, ~SIZE~0); {44#false} is VALID [2018-11-23 10:40:23,634 INFO L273 TraceCheckUtils]: 18: Hoare triple {44#false} ~i~0 := 0bv32; {44#false} is VALID [2018-11-23 10:40:23,635 INFO L273 TraceCheckUtils]: 19: Hoare triple {44#false} assume !~bvslt32(~i~0, ~SIZE~0); {44#false} is VALID [2018-11-23 10:40:23,635 INFO L256 TraceCheckUtils]: 20: Hoare triple {44#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {44#false} is VALID [2018-11-23 10:40:23,635 INFO L273 TraceCheckUtils]: 21: Hoare triple {44#false} ~cond := #in~cond; {44#false} is VALID [2018-11-23 10:40:23,636 INFO L273 TraceCheckUtils]: 22: Hoare triple {44#false} assume 0bv32 == ~cond; {44#false} is VALID [2018-11-23 10:40:23,636 INFO L273 TraceCheckUtils]: 23: Hoare triple {44#false} assume !false; {44#false} is VALID [2018-11-23 10:40:23,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:40:23,641 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:40:23,652 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:23,652 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:40:23,657 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 24 [2018-11-23 10:40:23,663 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:23,667 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:40:23,787 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:23,787 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:40:23,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:40:23,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:40:23,797 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 2 states. [2018-11-23 10:40:24,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:24,023 INFO L93 Difference]: Finished difference Result 71 states and 99 transitions. [2018-11-23 10:40:24,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:40:24,023 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 24 [2018-11-23 10:40:24,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:24,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:40:24,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 99 transitions. [2018-11-23 10:40:24,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:40:24,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 99 transitions. [2018-11-23 10:40:24,044 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 99 transitions. [2018-11-23 10:40:24,575 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:24,597 INFO L225 Difference]: With dead ends: 71 [2018-11-23 10:40:24,600 INFO L226 Difference]: Without dead ends: 32 [2018-11-23 10:40:24,605 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:40:24,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-11-23 10:40:24,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-11-23 10:40:24,803 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:24,804 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand 32 states. [2018-11-23 10:40:24,804 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 32 states. [2018-11-23 10:40:24,805 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 32 states. [2018-11-23 10:40:24,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:24,816 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2018-11-23 10:40:24,816 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2018-11-23 10:40:24,817 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:24,817 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:24,817 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 32 states. [2018-11-23 10:40:24,818 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 32 states. [2018-11-23 10:40:24,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:24,826 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2018-11-23 10:40:24,833 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2018-11-23 10:40:24,834 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:24,834 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:24,834 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:24,834 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:24,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 10:40:24,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 38 transitions. [2018-11-23 10:40:24,839 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 38 transitions. Word has length 24 [2018-11-23 10:40:24,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:24,840 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 38 transitions. [2018-11-23 10:40:24,840 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:40:24,840 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2018-11-23 10:40:24,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:40:24,842 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:24,842 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:24,842 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:24,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:24,843 INFO L82 PathProgramCache]: Analyzing trace with hash 1170586821, now seen corresponding path program 1 times [2018-11-23 10:40:24,843 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:24,843 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:24,863 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:24,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:24,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:24,914 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:25,241 INFO L256 TraceCheckUtils]: 0: Hoare triple {317#true} call ULTIMATE.init(); {317#true} is VALID [2018-11-23 10:40:25,242 INFO L273 TraceCheckUtils]: 1: Hoare triple {317#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {317#true} is VALID [2018-11-23 10:40:25,242 INFO L273 TraceCheckUtils]: 2: Hoare triple {317#true} assume true; {317#true} is VALID [2018-11-23 10:40:25,242 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {317#true} {317#true} #125#return; {317#true} is VALID [2018-11-23 10:40:25,243 INFO L256 TraceCheckUtils]: 4: Hoare triple {317#true} call #t~ret15 := main(); {317#true} is VALID [2018-11-23 10:40:25,243 INFO L273 TraceCheckUtils]: 5: Hoare triple {317#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {317#true} is VALID [2018-11-23 10:40:25,252 INFO L273 TraceCheckUtils]: 6: Hoare triple {317#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,265 INFO L273 TraceCheckUtils]: 7: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,278 INFO L273 TraceCheckUtils]: 8: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,292 INFO L273 TraceCheckUtils]: 9: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,293 INFO L273 TraceCheckUtils]: 10: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,294 INFO L273 TraceCheckUtils]: 11: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,294 INFO L273 TraceCheckUtils]: 12: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,296 INFO L273 TraceCheckUtils]: 13: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,305 INFO L273 TraceCheckUtils]: 14: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,306 INFO L273 TraceCheckUtils]: 15: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,308 INFO L273 TraceCheckUtils]: 16: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,308 INFO L273 TraceCheckUtils]: 17: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,319 INFO L273 TraceCheckUtils]: 18: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,320 INFO L273 TraceCheckUtils]: 19: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {340#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:25,322 INFO L256 TraceCheckUtils]: 20: Hoare triple {340#(= main_~sum~0 (_ bv0 32))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {383#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:25,322 INFO L273 TraceCheckUtils]: 21: Hoare triple {383#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {387#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:25,324 INFO L273 TraceCheckUtils]: 22: Hoare triple {387#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {318#false} is VALID [2018-11-23 10:40:25,324 INFO L273 TraceCheckUtils]: 23: Hoare triple {318#false} assume !false; {318#false} is VALID [2018-11-23 10:40:25,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:40:25,328 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:40:25,329 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:25,330 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:40:25,331 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-11-23 10:40:25,332 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:25,332 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:40:25,376 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:25,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:40:25,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:40:25,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:40:25,377 INFO L87 Difference]: Start difference. First operand 32 states and 38 transitions. Second operand 5 states. [2018-11-23 10:40:25,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:25,946 INFO L93 Difference]: Finished difference Result 48 states and 59 transitions. [2018-11-23 10:40:25,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:40:25,947 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-11-23 10:40:25,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:25,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:40:25,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 59 transitions. [2018-11-23 10:40:25,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:40:25,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 59 transitions. [2018-11-23 10:40:25,953 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 59 transitions. [2018-11-23 10:40:26,135 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:26,137 INFO L225 Difference]: With dead ends: 48 [2018-11-23 10:40:26,138 INFO L226 Difference]: Without dead ends: 43 [2018-11-23 10:40:26,139 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:40:26,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-11-23 10:40:26,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-11-23 10:40:26,167 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:26,168 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand 43 states. [2018-11-23 10:40:26,168 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand 43 states. [2018-11-23 10:40:26,168 INFO L87 Difference]: Start difference. First operand 43 states. Second operand 43 states. [2018-11-23 10:40:26,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:26,172 INFO L93 Difference]: Finished difference Result 43 states and 54 transitions. [2018-11-23 10:40:26,172 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2018-11-23 10:40:26,173 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:26,173 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:26,173 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand 43 states. [2018-11-23 10:40:26,173 INFO L87 Difference]: Start difference. First operand 43 states. Second operand 43 states. [2018-11-23 10:40:26,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:26,177 INFO L93 Difference]: Finished difference Result 43 states and 54 transitions. [2018-11-23 10:40:26,177 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2018-11-23 10:40:26,178 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:26,178 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:26,178 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:26,178 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:26,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-11-23 10:40:26,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions. [2018-11-23 10:40:26,182 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 24 [2018-11-23 10:40:26,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:26,182 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions. [2018-11-23 10:40:26,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:40:26,182 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2018-11-23 10:40:26,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-23 10:40:26,184 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:26,184 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:26,184 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:26,184 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:26,184 INFO L82 PathProgramCache]: Analyzing trace with hash 669656451, now seen corresponding path program 1 times [2018-11-23 10:40:26,185 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:26,185 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:26,209 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:26,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:26,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:26,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:26,366 INFO L256 TraceCheckUtils]: 0: Hoare triple {612#true} call ULTIMATE.init(); {612#true} is VALID [2018-11-23 10:40:26,366 INFO L273 TraceCheckUtils]: 1: Hoare triple {612#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {612#true} is VALID [2018-11-23 10:40:26,367 INFO L273 TraceCheckUtils]: 2: Hoare triple {612#true} assume true; {612#true} is VALID [2018-11-23 10:40:26,367 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {612#true} {612#true} #125#return; {612#true} is VALID [2018-11-23 10:40:26,367 INFO L256 TraceCheckUtils]: 4: Hoare triple {612#true} call #t~ret15 := main(); {612#true} is VALID [2018-11-23 10:40:26,368 INFO L273 TraceCheckUtils]: 5: Hoare triple {612#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {612#true} is VALID [2018-11-23 10:40:26,371 INFO L273 TraceCheckUtils]: 6: Hoare triple {612#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {635#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:26,373 INFO L273 TraceCheckUtils]: 7: Hoare triple {635#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {613#false} is VALID [2018-11-23 10:40:26,373 INFO L273 TraceCheckUtils]: 8: Hoare triple {613#false} ~i~0 := 0bv32; {613#false} is VALID [2018-11-23 10:40:26,373 INFO L273 TraceCheckUtils]: 9: Hoare triple {613#false} assume !~bvslt32(~i~0, ~SIZE~0); {613#false} is VALID [2018-11-23 10:40:26,373 INFO L273 TraceCheckUtils]: 10: Hoare triple {613#false} ~i~0 := 0bv32; {613#false} is VALID [2018-11-23 10:40:26,374 INFO L273 TraceCheckUtils]: 11: Hoare triple {613#false} assume !~bvslt32(~i~0, ~SIZE~0); {613#false} is VALID [2018-11-23 10:40:26,374 INFO L273 TraceCheckUtils]: 12: Hoare triple {613#false} ~i~0 := 0bv32; {613#false} is VALID [2018-11-23 10:40:26,374 INFO L273 TraceCheckUtils]: 13: Hoare triple {613#false} assume !~bvslt32(~i~0, ~SIZE~0); {613#false} is VALID [2018-11-23 10:40:26,375 INFO L273 TraceCheckUtils]: 14: Hoare triple {613#false} ~i~0 := 0bv32; {613#false} is VALID [2018-11-23 10:40:26,375 INFO L273 TraceCheckUtils]: 15: Hoare triple {613#false} assume !~bvslt32(~i~0, ~SIZE~0); {613#false} is VALID [2018-11-23 10:40:26,375 INFO L273 TraceCheckUtils]: 16: Hoare triple {613#false} ~i~0 := 0bv32; {613#false} is VALID [2018-11-23 10:40:26,375 INFO L273 TraceCheckUtils]: 17: Hoare triple {613#false} assume !~bvslt32(~i~0, ~SIZE~0); {613#false} is VALID [2018-11-23 10:40:26,376 INFO L273 TraceCheckUtils]: 18: Hoare triple {613#false} ~i~0 := 0bv32; {613#false} is VALID [2018-11-23 10:40:26,376 INFO L273 TraceCheckUtils]: 19: Hoare triple {613#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {613#false} is VALID [2018-11-23 10:40:26,376 INFO L273 TraceCheckUtils]: 20: Hoare triple {613#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {613#false} is VALID [2018-11-23 10:40:26,377 INFO L273 TraceCheckUtils]: 21: Hoare triple {613#false} assume !~bvslt32(~i~0, ~SIZE~0); {613#false} is VALID [2018-11-23 10:40:26,377 INFO L256 TraceCheckUtils]: 22: Hoare triple {613#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {613#false} is VALID [2018-11-23 10:40:26,377 INFO L273 TraceCheckUtils]: 23: Hoare triple {613#false} ~cond := #in~cond; {613#false} is VALID [2018-11-23 10:40:26,378 INFO L273 TraceCheckUtils]: 24: Hoare triple {613#false} assume 0bv32 == ~cond; {613#false} is VALID [2018-11-23 10:40:26,378 INFO L273 TraceCheckUtils]: 25: Hoare triple {613#false} assume !false; {613#false} is VALID [2018-11-23 10:40:26,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:40:26,380 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:40:26,381 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:26,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:40:26,382 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2018-11-23 10:40:26,382 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:26,382 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:40:26,429 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:26,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:40:26,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:40:26,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:40:26,430 INFO L87 Difference]: Start difference. First operand 43 states and 54 transitions. Second operand 3 states. [2018-11-23 10:40:26,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:26,771 INFO L93 Difference]: Finished difference Result 79 states and 101 transitions. [2018-11-23 10:40:26,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:40:26,771 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2018-11-23 10:40:26,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:26,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:40:26,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 69 transitions. [2018-11-23 10:40:26,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:40:26,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 69 transitions. [2018-11-23 10:40:26,777 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 69 transitions. [2018-11-23 10:40:26,883 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:26,886 INFO L225 Difference]: With dead ends: 79 [2018-11-23 10:40:26,887 INFO L226 Difference]: Without dead ends: 45 [2018-11-23 10:40:26,887 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:40:26,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-11-23 10:40:26,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 44. [2018-11-23 10:40:26,922 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:26,923 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand 44 states. [2018-11-23 10:40:26,923 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 44 states. [2018-11-23 10:40:26,923 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 44 states. [2018-11-23 10:40:26,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:26,926 INFO L93 Difference]: Finished difference Result 45 states and 56 transitions. [2018-11-23 10:40:26,926 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 56 transitions. [2018-11-23 10:40:26,927 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:26,927 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:26,927 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 45 states. [2018-11-23 10:40:26,927 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 45 states. [2018-11-23 10:40:26,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:26,931 INFO L93 Difference]: Finished difference Result 45 states and 56 transitions. [2018-11-23 10:40:26,931 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 56 transitions. [2018-11-23 10:40:26,932 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:26,932 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:26,932 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:26,932 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:26,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-23 10:40:26,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 55 transitions. [2018-11-23 10:40:26,935 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 55 transitions. Word has length 26 [2018-11-23 10:40:26,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:26,935 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 55 transitions. [2018-11-23 10:40:26,935 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:40:26,936 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 55 transitions. [2018-11-23 10:40:26,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 10:40:26,937 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:26,937 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:26,937 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:26,938 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:26,938 INFO L82 PathProgramCache]: Analyzing trace with hash 1075251265, now seen corresponding path program 1 times [2018-11-23 10:40:26,938 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:26,939 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:26,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:27,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:27,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:27,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:27,262 INFO L256 TraceCheckUtils]: 0: Hoare triple {959#true} call ULTIMATE.init(); {959#true} is VALID [2018-11-23 10:40:27,262 INFO L273 TraceCheckUtils]: 1: Hoare triple {959#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {959#true} is VALID [2018-11-23 10:40:27,262 INFO L273 TraceCheckUtils]: 2: Hoare triple {959#true} assume true; {959#true} is VALID [2018-11-23 10:40:27,263 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {959#true} {959#true} #125#return; {959#true} is VALID [2018-11-23 10:40:27,263 INFO L256 TraceCheckUtils]: 4: Hoare triple {959#true} call #t~ret15 := main(); {959#true} is VALID [2018-11-23 10:40:27,263 INFO L273 TraceCheckUtils]: 5: Hoare triple {959#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {959#true} is VALID [2018-11-23 10:40:27,265 INFO L273 TraceCheckUtils]: 6: Hoare triple {959#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {982#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:27,265 INFO L273 TraceCheckUtils]: 7: Hoare triple {982#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {982#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:27,266 INFO L273 TraceCheckUtils]: 8: Hoare triple {982#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {989#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:27,268 INFO L273 TraceCheckUtils]: 9: Hoare triple {989#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,268 INFO L273 TraceCheckUtils]: 10: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,268 INFO L273 TraceCheckUtils]: 11: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,269 INFO L273 TraceCheckUtils]: 12: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,269 INFO L273 TraceCheckUtils]: 13: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,269 INFO L273 TraceCheckUtils]: 14: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,270 INFO L273 TraceCheckUtils]: 15: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,270 INFO L273 TraceCheckUtils]: 16: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,270 INFO L273 TraceCheckUtils]: 17: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,271 INFO L273 TraceCheckUtils]: 18: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,271 INFO L273 TraceCheckUtils]: 19: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,271 INFO L273 TraceCheckUtils]: 20: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,271 INFO L273 TraceCheckUtils]: 21: Hoare triple {960#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {960#false} is VALID [2018-11-23 10:40:27,272 INFO L273 TraceCheckUtils]: 22: Hoare triple {960#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {960#false} is VALID [2018-11-23 10:40:27,272 INFO L273 TraceCheckUtils]: 23: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,272 INFO L256 TraceCheckUtils]: 24: Hoare triple {960#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {960#false} is VALID [2018-11-23 10:40:27,272 INFO L273 TraceCheckUtils]: 25: Hoare triple {960#false} ~cond := #in~cond; {960#false} is VALID [2018-11-23 10:40:27,273 INFO L273 TraceCheckUtils]: 26: Hoare triple {960#false} assume 0bv32 == ~cond; {960#false} is VALID [2018-11-23 10:40:27,273 INFO L273 TraceCheckUtils]: 27: Hoare triple {960#false} assume !false; {960#false} is VALID [2018-11-23 10:40:27,274 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:40:27,275 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:40:27,447 INFO L273 TraceCheckUtils]: 27: Hoare triple {960#false} assume !false; {960#false} is VALID [2018-11-23 10:40:27,447 INFO L273 TraceCheckUtils]: 26: Hoare triple {960#false} assume 0bv32 == ~cond; {960#false} is VALID [2018-11-23 10:40:27,447 INFO L273 TraceCheckUtils]: 25: Hoare triple {960#false} ~cond := #in~cond; {960#false} is VALID [2018-11-23 10:40:27,448 INFO L256 TraceCheckUtils]: 24: Hoare triple {960#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {960#false} is VALID [2018-11-23 10:40:27,448 INFO L273 TraceCheckUtils]: 23: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,448 INFO L273 TraceCheckUtils]: 22: Hoare triple {960#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {960#false} is VALID [2018-11-23 10:40:27,449 INFO L273 TraceCheckUtils]: 21: Hoare triple {960#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {960#false} is VALID [2018-11-23 10:40:27,449 INFO L273 TraceCheckUtils]: 20: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,449 INFO L273 TraceCheckUtils]: 19: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,450 INFO L273 TraceCheckUtils]: 18: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,450 INFO L273 TraceCheckUtils]: 17: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,450 INFO L273 TraceCheckUtils]: 16: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,450 INFO L273 TraceCheckUtils]: 15: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,451 INFO L273 TraceCheckUtils]: 14: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,451 INFO L273 TraceCheckUtils]: 13: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,451 INFO L273 TraceCheckUtils]: 12: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,452 INFO L273 TraceCheckUtils]: 11: Hoare triple {960#false} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,452 INFO L273 TraceCheckUtils]: 10: Hoare triple {960#false} ~i~0 := 0bv32; {960#false} is VALID [2018-11-23 10:40:27,455 INFO L273 TraceCheckUtils]: 9: Hoare triple {1101#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {960#false} is VALID [2018-11-23 10:40:27,470 INFO L273 TraceCheckUtils]: 8: Hoare triple {1105#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1101#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:40:27,471 INFO L273 TraceCheckUtils]: 7: Hoare triple {1105#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1105#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:27,472 INFO L273 TraceCheckUtils]: 6: Hoare triple {959#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1105#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:27,472 INFO L273 TraceCheckUtils]: 5: Hoare triple {959#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {959#true} is VALID [2018-11-23 10:40:27,472 INFO L256 TraceCheckUtils]: 4: Hoare triple {959#true} call #t~ret15 := main(); {959#true} is VALID [2018-11-23 10:40:27,473 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {959#true} {959#true} #125#return; {959#true} is VALID [2018-11-23 10:40:27,473 INFO L273 TraceCheckUtils]: 2: Hoare triple {959#true} assume true; {959#true} is VALID [2018-11-23 10:40:27,473 INFO L273 TraceCheckUtils]: 1: Hoare triple {959#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {959#true} is VALID [2018-11-23 10:40:27,474 INFO L256 TraceCheckUtils]: 0: Hoare triple {959#true} call ULTIMATE.init(); {959#true} is VALID [2018-11-23 10:40:27,475 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:40:27,477 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:40:27,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 10:40:27,478 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2018-11-23 10:40:27,478 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:27,479 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:40:27,568 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:27,568 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:40:27,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:40:27,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:40:27,569 INFO L87 Difference]: Start difference. First operand 44 states and 55 transitions. Second operand 6 states. [2018-11-23 10:40:28,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:28,341 INFO L93 Difference]: Finished difference Result 81 states and 103 transitions. [2018-11-23 10:40:28,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:40:28,341 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2018-11-23 10:40:28,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:28,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:40:28,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 71 transitions. [2018-11-23 10:40:28,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:40:28,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 71 transitions. [2018-11-23 10:40:28,347 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 71 transitions. [2018-11-23 10:40:28,457 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:28,460 INFO L225 Difference]: With dead ends: 81 [2018-11-23 10:40:28,460 INFO L226 Difference]: Without dead ends: 47 [2018-11-23 10:40:28,461 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:40:28,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-23 10:40:28,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2018-11-23 10:40:28,500 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:28,500 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand 46 states. [2018-11-23 10:40:28,501 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 46 states. [2018-11-23 10:40:28,501 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 46 states. [2018-11-23 10:40:28,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:28,504 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2018-11-23 10:40:28,504 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 58 transitions. [2018-11-23 10:40:28,505 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:28,506 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:28,506 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand 47 states. [2018-11-23 10:40:28,506 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 47 states. [2018-11-23 10:40:28,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:28,509 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2018-11-23 10:40:28,509 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 58 transitions. [2018-11-23 10:40:28,510 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:28,510 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:28,510 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:28,510 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:28,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-11-23 10:40:28,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 57 transitions. [2018-11-23 10:40:28,513 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 57 transitions. Word has length 28 [2018-11-23 10:40:28,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:28,513 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 57 transitions. [2018-11-23 10:40:28,513 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:40:28,513 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 57 transitions. [2018-11-23 10:40:28,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:40:28,515 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:28,515 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:28,515 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:28,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:28,516 INFO L82 PathProgramCache]: Analyzing trace with hash 9843583, now seen corresponding path program 2 times [2018-11-23 10:40:28,516 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:28,516 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:28,538 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:40:28,571 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 10:40:28,571 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:40:28,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:28,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:28,667 INFO L256 TraceCheckUtils]: 0: Hoare triple {1409#true} call ULTIMATE.init(); {1409#true} is VALID [2018-11-23 10:40:28,668 INFO L273 TraceCheckUtils]: 1: Hoare triple {1409#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1409#true} is VALID [2018-11-23 10:40:28,668 INFO L273 TraceCheckUtils]: 2: Hoare triple {1409#true} assume true; {1409#true} is VALID [2018-11-23 10:40:28,668 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1409#true} {1409#true} #125#return; {1409#true} is VALID [2018-11-23 10:40:28,669 INFO L256 TraceCheckUtils]: 4: Hoare triple {1409#true} call #t~ret15 := main(); {1409#true} is VALID [2018-11-23 10:40:28,669 INFO L273 TraceCheckUtils]: 5: Hoare triple {1409#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1409#true} is VALID [2018-11-23 10:40:28,670 INFO L273 TraceCheckUtils]: 6: Hoare triple {1409#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1432#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:28,672 INFO L273 TraceCheckUtils]: 7: Hoare triple {1432#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1432#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:28,674 INFO L273 TraceCheckUtils]: 8: Hoare triple {1432#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1432#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:28,674 INFO L273 TraceCheckUtils]: 9: Hoare triple {1432#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1432#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:28,675 INFO L273 TraceCheckUtils]: 10: Hoare triple {1432#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1432#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:28,675 INFO L273 TraceCheckUtils]: 11: Hoare triple {1432#(bvsgt ~SIZE~0 (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {1432#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:28,676 INFO L273 TraceCheckUtils]: 12: Hoare triple {1432#(bvsgt ~SIZE~0 (_ bv1 32))} ~i~0 := 0bv32; {1451#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:28,678 INFO L273 TraceCheckUtils]: 13: Hoare triple {1451#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {1410#false} is VALID [2018-11-23 10:40:28,678 INFO L273 TraceCheckUtils]: 14: Hoare triple {1410#false} ~i~0 := 0bv32; {1410#false} is VALID [2018-11-23 10:40:28,678 INFO L273 TraceCheckUtils]: 15: Hoare triple {1410#false} assume !~bvslt32(~i~0, ~SIZE~0); {1410#false} is VALID [2018-11-23 10:40:28,679 INFO L273 TraceCheckUtils]: 16: Hoare triple {1410#false} ~i~0 := 0bv32; {1410#false} is VALID [2018-11-23 10:40:28,679 INFO L273 TraceCheckUtils]: 17: Hoare triple {1410#false} assume !~bvslt32(~i~0, ~SIZE~0); {1410#false} is VALID [2018-11-23 10:40:28,679 INFO L273 TraceCheckUtils]: 18: Hoare triple {1410#false} ~i~0 := 0bv32; {1410#false} is VALID [2018-11-23 10:40:28,680 INFO L273 TraceCheckUtils]: 19: Hoare triple {1410#false} assume !~bvslt32(~i~0, ~SIZE~0); {1410#false} is VALID [2018-11-23 10:40:28,680 INFO L273 TraceCheckUtils]: 20: Hoare triple {1410#false} ~i~0 := 0bv32; {1410#false} is VALID [2018-11-23 10:40:28,680 INFO L273 TraceCheckUtils]: 21: Hoare triple {1410#false} assume !~bvslt32(~i~0, ~SIZE~0); {1410#false} is VALID [2018-11-23 10:40:28,680 INFO L273 TraceCheckUtils]: 22: Hoare triple {1410#false} ~i~0 := 0bv32; {1410#false} is VALID [2018-11-23 10:40:28,681 INFO L273 TraceCheckUtils]: 23: Hoare triple {1410#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {1410#false} is VALID [2018-11-23 10:40:28,681 INFO L273 TraceCheckUtils]: 24: Hoare triple {1410#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1410#false} is VALID [2018-11-23 10:40:28,681 INFO L273 TraceCheckUtils]: 25: Hoare triple {1410#false} assume !~bvslt32(~i~0, ~SIZE~0); {1410#false} is VALID [2018-11-23 10:40:28,681 INFO L256 TraceCheckUtils]: 26: Hoare triple {1410#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1410#false} is VALID [2018-11-23 10:40:28,681 INFO L273 TraceCheckUtils]: 27: Hoare triple {1410#false} ~cond := #in~cond; {1410#false} is VALID [2018-11-23 10:40:28,682 INFO L273 TraceCheckUtils]: 28: Hoare triple {1410#false} assume 0bv32 == ~cond; {1410#false} is VALID [2018-11-23 10:40:28,682 INFO L273 TraceCheckUtils]: 29: Hoare triple {1410#false} assume !false; {1410#false} is VALID [2018-11-23 10:40:28,683 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:40:28,684 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:40:28,695 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:28,696 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:40:28,696 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:40:28,696 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:28,697 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:40:28,741 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:28,741 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:40:28,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:40:28,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:40:28,742 INFO L87 Difference]: Start difference. First operand 46 states and 57 transitions. Second operand 4 states. [2018-11-23 10:40:29,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:29,050 INFO L93 Difference]: Finished difference Result 76 states and 96 transitions. [2018-11-23 10:40:29,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:40:29,050 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-23 10:40:29,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:29,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:40:29,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 82 transitions. [2018-11-23 10:40:29,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:40:29,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 82 transitions. [2018-11-23 10:40:29,056 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 82 transitions. [2018-11-23 10:40:29,199 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:29,201 INFO L225 Difference]: With dead ends: 76 [2018-11-23 10:40:29,201 INFO L226 Difference]: Without dead ends: 47 [2018-11-23 10:40:29,203 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:40:29,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-23 10:40:29,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 41. [2018-11-23 10:40:29,268 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:29,268 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand 41 states. [2018-11-23 10:40:29,268 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 41 states. [2018-11-23 10:40:29,269 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 41 states. [2018-11-23 10:40:29,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:29,271 INFO L93 Difference]: Finished difference Result 47 states and 53 transitions. [2018-11-23 10:40:29,271 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 53 transitions. [2018-11-23 10:40:29,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:29,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:29,272 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 47 states. [2018-11-23 10:40:29,272 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 47 states. [2018-11-23 10:40:29,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:29,275 INFO L93 Difference]: Finished difference Result 47 states and 53 transitions. [2018-11-23 10:40:29,275 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 53 transitions. [2018-11-23 10:40:29,275 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:29,276 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:29,276 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:29,276 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:29,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-23 10:40:29,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 47 transitions. [2018-11-23 10:40:29,278 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 47 transitions. Word has length 30 [2018-11-23 10:40:29,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:29,279 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 47 transitions. [2018-11-23 10:40:29,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:40:29,279 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 47 transitions. [2018-11-23 10:40:29,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 10:40:29,280 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:29,280 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:29,281 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:29,281 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:29,281 INFO L82 PathProgramCache]: Analyzing trace with hash -632060043, now seen corresponding path program 1 times [2018-11-23 10:40:29,282 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:29,282 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:29,312 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 10:40:29,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:29,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:29,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:29,589 INFO L256 TraceCheckUtils]: 0: Hoare triple {1767#true} call ULTIMATE.init(); {1767#true} is VALID [2018-11-23 10:40:29,590 INFO L273 TraceCheckUtils]: 1: Hoare triple {1767#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1767#true} is VALID [2018-11-23 10:40:29,590 INFO L273 TraceCheckUtils]: 2: Hoare triple {1767#true} assume true; {1767#true} is VALID [2018-11-23 10:40:29,591 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1767#true} {1767#true} #125#return; {1767#true} is VALID [2018-11-23 10:40:29,591 INFO L256 TraceCheckUtils]: 4: Hoare triple {1767#true} call #t~ret15 := main(); {1767#true} is VALID [2018-11-23 10:40:29,591 INFO L273 TraceCheckUtils]: 5: Hoare triple {1767#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1767#true} is VALID [2018-11-23 10:40:29,592 INFO L273 TraceCheckUtils]: 6: Hoare triple {1767#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1790#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:29,593 INFO L273 TraceCheckUtils]: 7: Hoare triple {1790#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1790#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:29,593 INFO L273 TraceCheckUtils]: 8: Hoare triple {1790#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1797#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:29,594 INFO L273 TraceCheckUtils]: 9: Hoare triple {1797#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1797#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:29,618 INFO L273 TraceCheckUtils]: 10: Hoare triple {1797#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1804#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:40:29,634 INFO L273 TraceCheckUtils]: 11: Hoare triple {1804#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~i~0, ~SIZE~0); {1808#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:29,648 INFO L273 TraceCheckUtils]: 12: Hoare triple {1808#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~i~0 := 0bv32; {1812#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:29,663 INFO L273 TraceCheckUtils]: 13: Hoare triple {1812#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {1812#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:29,680 INFO L273 TraceCheckUtils]: 14: Hoare triple {1812#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1819#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:29,696 INFO L273 TraceCheckUtils]: 15: Hoare triple {1819#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:29,696 INFO L273 TraceCheckUtils]: 16: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:29,697 INFO L273 TraceCheckUtils]: 17: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {1768#false} is VALID [2018-11-23 10:40:29,697 INFO L273 TraceCheckUtils]: 18: Hoare triple {1768#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1768#false} is VALID [2018-11-23 10:40:29,697 INFO L273 TraceCheckUtils]: 19: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:29,698 INFO L273 TraceCheckUtils]: 20: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:29,698 INFO L273 TraceCheckUtils]: 21: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {1768#false} is VALID [2018-11-23 10:40:29,698 INFO L273 TraceCheckUtils]: 22: Hoare triple {1768#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1768#false} is VALID [2018-11-23 10:40:29,699 INFO L273 TraceCheckUtils]: 23: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:29,699 INFO L273 TraceCheckUtils]: 24: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:29,699 INFO L273 TraceCheckUtils]: 25: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {1768#false} is VALID [2018-11-23 10:40:29,700 INFO L273 TraceCheckUtils]: 26: Hoare triple {1768#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1768#false} is VALID [2018-11-23 10:40:29,700 INFO L273 TraceCheckUtils]: 27: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:29,700 INFO L273 TraceCheckUtils]: 28: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:29,700 INFO L273 TraceCheckUtils]: 29: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {1768#false} is VALID [2018-11-23 10:40:29,701 INFO L273 TraceCheckUtils]: 30: Hoare triple {1768#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1768#false} is VALID [2018-11-23 10:40:29,701 INFO L273 TraceCheckUtils]: 31: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:29,701 INFO L273 TraceCheckUtils]: 32: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:29,701 INFO L273 TraceCheckUtils]: 33: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {1768#false} is VALID [2018-11-23 10:40:29,706 INFO L273 TraceCheckUtils]: 34: Hoare triple {1768#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1768#false} is VALID [2018-11-23 10:40:29,707 INFO L273 TraceCheckUtils]: 35: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:29,707 INFO L256 TraceCheckUtils]: 36: Hoare triple {1768#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1768#false} is VALID [2018-11-23 10:40:29,707 INFO L273 TraceCheckUtils]: 37: Hoare triple {1768#false} ~cond := #in~cond; {1768#false} is VALID [2018-11-23 10:40:29,708 INFO L273 TraceCheckUtils]: 38: Hoare triple {1768#false} assume 0bv32 == ~cond; {1768#false} is VALID [2018-11-23 10:40:29,708 INFO L273 TraceCheckUtils]: 39: Hoare triple {1768#false} assume !false; {1768#false} is VALID [2018-11-23 10:40:29,713 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:40:29,714 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:40:30,079 INFO L273 TraceCheckUtils]: 39: Hoare triple {1768#false} assume !false; {1768#false} is VALID [2018-11-23 10:40:30,080 INFO L273 TraceCheckUtils]: 38: Hoare triple {1768#false} assume 0bv32 == ~cond; {1768#false} is VALID [2018-11-23 10:40:30,080 INFO L273 TraceCheckUtils]: 37: Hoare triple {1768#false} ~cond := #in~cond; {1768#false} is VALID [2018-11-23 10:40:30,080 INFO L256 TraceCheckUtils]: 36: Hoare triple {1768#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1768#false} is VALID [2018-11-23 10:40:30,080 INFO L273 TraceCheckUtils]: 35: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:30,081 INFO L273 TraceCheckUtils]: 34: Hoare triple {1768#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {1768#false} is VALID [2018-11-23 10:40:30,081 INFO L273 TraceCheckUtils]: 33: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {1768#false} is VALID [2018-11-23 10:40:30,081 INFO L273 TraceCheckUtils]: 32: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:30,082 INFO L273 TraceCheckUtils]: 31: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:30,082 INFO L273 TraceCheckUtils]: 30: Hoare triple {1768#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {1768#false} is VALID [2018-11-23 10:40:30,082 INFO L273 TraceCheckUtils]: 29: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {1768#false} is VALID [2018-11-23 10:40:30,083 INFO L273 TraceCheckUtils]: 28: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:30,083 INFO L273 TraceCheckUtils]: 27: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:30,083 INFO L273 TraceCheckUtils]: 26: Hoare triple {1768#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {1768#false} is VALID [2018-11-23 10:40:30,083 INFO L273 TraceCheckUtils]: 25: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {1768#false} is VALID [2018-11-23 10:40:30,084 INFO L273 TraceCheckUtils]: 24: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:30,084 INFO L273 TraceCheckUtils]: 23: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:30,084 INFO L273 TraceCheckUtils]: 22: Hoare triple {1768#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {1768#false} is VALID [2018-11-23 10:40:30,084 INFO L273 TraceCheckUtils]: 21: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {1768#false} is VALID [2018-11-23 10:40:30,084 INFO L273 TraceCheckUtils]: 20: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:30,085 INFO L273 TraceCheckUtils]: 19: Hoare triple {1768#false} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:30,085 INFO L273 TraceCheckUtils]: 18: Hoare triple {1768#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1768#false} is VALID [2018-11-23 10:40:30,085 INFO L273 TraceCheckUtils]: 17: Hoare triple {1768#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {1768#false} is VALID [2018-11-23 10:40:30,085 INFO L273 TraceCheckUtils]: 16: Hoare triple {1768#false} ~i~0 := 0bv32; {1768#false} is VALID [2018-11-23 10:40:30,097 INFO L273 TraceCheckUtils]: 15: Hoare triple {1967#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {1768#false} is VALID [2018-11-23 10:40:30,100 INFO L273 TraceCheckUtils]: 14: Hoare triple {1971#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1967#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:40:30,101 INFO L273 TraceCheckUtils]: 13: Hoare triple {1971#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {1971#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:30,102 INFO L273 TraceCheckUtils]: 12: Hoare triple {1978#(bvslt (_ bv1 32) ~SIZE~0)} ~i~0 := 0bv32; {1971#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:30,102 INFO L273 TraceCheckUtils]: 11: Hoare triple {1982#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt main_~i~0 ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {1978#(bvslt (_ bv1 32) ~SIZE~0)} is VALID [2018-11-23 10:40:30,103 INFO L273 TraceCheckUtils]: 10: Hoare triple {1986#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1982#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-23 10:40:30,105 INFO L273 TraceCheckUtils]: 9: Hoare triple {1986#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1986#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:40:30,133 INFO L273 TraceCheckUtils]: 8: Hoare triple {1993#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1986#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:40:30,134 INFO L273 TraceCheckUtils]: 7: Hoare triple {1993#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1993#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} is VALID [2018-11-23 10:40:30,135 INFO L273 TraceCheckUtils]: 6: Hoare triple {1767#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1993#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} is VALID [2018-11-23 10:40:30,135 INFO L273 TraceCheckUtils]: 5: Hoare triple {1767#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1767#true} is VALID [2018-11-23 10:40:30,135 INFO L256 TraceCheckUtils]: 4: Hoare triple {1767#true} call #t~ret15 := main(); {1767#true} is VALID [2018-11-23 10:40:30,135 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1767#true} {1767#true} #125#return; {1767#true} is VALID [2018-11-23 10:40:30,136 INFO L273 TraceCheckUtils]: 2: Hoare triple {1767#true} assume true; {1767#true} is VALID [2018-11-23 10:40:30,136 INFO L273 TraceCheckUtils]: 1: Hoare triple {1767#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1767#true} is VALID [2018-11-23 10:40:30,136 INFO L256 TraceCheckUtils]: 0: Hoare triple {1767#true} call ULTIMATE.init(); {1767#true} is VALID [2018-11-23 10:40:30,138 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:40:30,152 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:40:30,152 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-23 10:40:30,153 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 40 [2018-11-23 10:40:30,153 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:30,154 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 10:40:30,268 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:30,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 10:40:30,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 10:40:30,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-11-23 10:40:30,270 INFO L87 Difference]: Start difference. First operand 41 states and 47 transitions. Second operand 14 states. [2018-11-23 10:40:32,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:32,971 INFO L93 Difference]: Finished difference Result 142 states and 177 transitions. [2018-11-23 10:40:32,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 10:40:32,971 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 40 [2018-11-23 10:40:32,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:32,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:40:32,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 172 transitions. [2018-11-23 10:40:32,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:40:32,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 172 transitions. [2018-11-23 10:40:32,980 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 172 transitions. [2018-11-23 10:40:33,365 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:33,369 INFO L225 Difference]: With dead ends: 142 [2018-11-23 10:40:33,370 INFO L226 Difference]: Without dead ends: 115 [2018-11-23 10:40:33,371 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=92, Invalid=180, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:40:33,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-11-23 10:40:33,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 101. [2018-11-23 10:40:33,481 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:33,481 INFO L82 GeneralOperation]: Start isEquivalent. First operand 115 states. Second operand 101 states. [2018-11-23 10:40:33,481 INFO L74 IsIncluded]: Start isIncluded. First operand 115 states. Second operand 101 states. [2018-11-23 10:40:33,482 INFO L87 Difference]: Start difference. First operand 115 states. Second operand 101 states. [2018-11-23 10:40:33,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:33,486 INFO L93 Difference]: Finished difference Result 115 states and 127 transitions. [2018-11-23 10:40:33,487 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 127 transitions. [2018-11-23 10:40:33,487 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:33,487 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:33,488 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand 115 states. [2018-11-23 10:40:33,488 INFO L87 Difference]: Start difference. First operand 101 states. Second operand 115 states. [2018-11-23 10:40:33,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:33,492 INFO L93 Difference]: Finished difference Result 115 states and 127 transitions. [2018-11-23 10:40:33,492 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 127 transitions. [2018-11-23 10:40:33,493 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:33,493 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:33,493 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:33,493 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:33,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-23 10:40:33,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 113 transitions. [2018-11-23 10:40:33,497 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 113 transitions. Word has length 40 [2018-11-23 10:40:33,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:33,497 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 113 transitions. [2018-11-23 10:40:33,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 10:40:33,498 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 113 transitions. [2018-11-23 10:40:33,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 10:40:33,499 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:33,499 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:33,500 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:33,500 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:33,500 INFO L82 PathProgramCache]: Analyzing trace with hash -1758734551, now seen corresponding path program 2 times [2018-11-23 10:40:33,500 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:33,501 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:33,528 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:40:33,717 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:40:33,717 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:40:35,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-23 10:40:35,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:36,567 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2018-11-23 10:40:36,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2018-11-23 10:40:36,600 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:40:36,606 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:40:36,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:40:36,611 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:9 [2018-11-23 10:40:36,736 INFO L256 TraceCheckUtils]: 0: Hoare triple {2617#true} call ULTIMATE.init(); {2617#true} is VALID [2018-11-23 10:40:36,736 INFO L273 TraceCheckUtils]: 1: Hoare triple {2617#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2617#true} is VALID [2018-11-23 10:40:36,736 INFO L273 TraceCheckUtils]: 2: Hoare triple {2617#true} assume true; {2617#true} is VALID [2018-11-23 10:40:36,737 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2617#true} {2617#true} #125#return; {2617#true} is VALID [2018-11-23 10:40:36,737 INFO L256 TraceCheckUtils]: 4: Hoare triple {2617#true} call #t~ret15 := main(); {2617#true} is VALID [2018-11-23 10:40:36,737 INFO L273 TraceCheckUtils]: 5: Hoare triple {2617#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2617#true} is VALID [2018-11-23 10:40:36,738 INFO L273 TraceCheckUtils]: 6: Hoare triple {2617#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,739 INFO L273 TraceCheckUtils]: 7: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,739 INFO L273 TraceCheckUtils]: 8: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,741 INFO L273 TraceCheckUtils]: 9: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,742 INFO L273 TraceCheckUtils]: 10: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,743 INFO L273 TraceCheckUtils]: 11: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,743 INFO L273 TraceCheckUtils]: 12: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {2659#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,745 INFO L273 TraceCheckUtils]: 13: Hoare triple {2659#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2663#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,748 INFO L273 TraceCheckUtils]: 14: Hoare triple {2663#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2667#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:36,752 INFO L273 TraceCheckUtils]: 15: Hoare triple {2667#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:36,753 INFO L273 TraceCheckUtils]: 16: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:36,754 INFO L273 TraceCheckUtils]: 17: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:36,755 INFO L273 TraceCheckUtils]: 18: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {2681#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,843 INFO L273 TraceCheckUtils]: 19: Hoare triple {2681#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2685#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:36,844 INFO L273 TraceCheckUtils]: 20: Hoare triple {2685#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2689#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:37,097 INFO L273 TraceCheckUtils]: 21: Hoare triple {2689#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,097 INFO L273 TraceCheckUtils]: 22: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,098 INFO L273 TraceCheckUtils]: 23: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,099 INFO L273 TraceCheckUtils]: 24: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {2659#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,100 INFO L273 TraceCheckUtils]: 25: Hoare triple {2659#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2663#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,101 INFO L273 TraceCheckUtils]: 26: Hoare triple {2663#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2667#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:37,102 INFO L273 TraceCheckUtils]: 27: Hoare triple {2667#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:37,103 INFO L273 TraceCheckUtils]: 28: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:37,104 INFO L273 TraceCheckUtils]: 29: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:37,105 INFO L273 TraceCheckUtils]: 30: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {2681#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,186 INFO L273 TraceCheckUtils]: 31: Hoare triple {2681#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2685#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,187 INFO L273 TraceCheckUtils]: 32: Hoare triple {2685#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2689#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:37,496 INFO L273 TraceCheckUtils]: 33: Hoare triple {2689#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,500 INFO L273 TraceCheckUtils]: 34: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,500 INFO L273 TraceCheckUtils]: 35: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,502 INFO L273 TraceCheckUtils]: 36: Hoare triple {2640#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {2659#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,510 INFO L273 TraceCheckUtils]: 37: Hoare triple {2659#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2663#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,513 INFO L273 TraceCheckUtils]: 38: Hoare triple {2663#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2667#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:37,514 INFO L273 TraceCheckUtils]: 39: Hoare triple {2667#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:37,515 INFO L273 TraceCheckUtils]: 40: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:37,516 INFO L273 TraceCheckUtils]: 41: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:37,516 INFO L273 TraceCheckUtils]: 42: Hoare triple {2671#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {2681#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,603 INFO L273 TraceCheckUtils]: 43: Hoare triple {2681#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2685#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:37,605 INFO L273 TraceCheckUtils]: 44: Hoare triple {2685#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2689#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:38,007 INFO L273 TraceCheckUtils]: 45: Hoare triple {2689#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2765#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:40:38,008 INFO L273 TraceCheckUtils]: 46: Hoare triple {2765#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2765#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:40:38,008 INFO L273 TraceCheckUtils]: 47: Hoare triple {2765#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} assume !~bvslt32(~i~0, ~SIZE~0); {2765#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:40:38,009 INFO L256 TraceCheckUtils]: 48: Hoare triple {2765#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {2775#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:38,010 INFO L273 TraceCheckUtils]: 49: Hoare triple {2775#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {2779#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:38,011 INFO L273 TraceCheckUtils]: 50: Hoare triple {2779#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {2618#false} is VALID [2018-11-23 10:40:38,011 INFO L273 TraceCheckUtils]: 51: Hoare triple {2618#false} assume !false; {2618#false} is VALID [2018-11-23 10:40:38,025 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:40:38,025 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:40:40,776 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2018-11-23 10:40:44,808 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:40:44,839 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:40:44,911 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 29 treesize of output 82 [2018-11-23 10:40:47,590 INFO L267 ElimStorePlain]: Start of recursive call 3: 13 dim-0 vars, End of recursive call: 13 dim-0 vars, and 16 xjuncts. [2018-11-23 10:40:47,652 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:40:47,664 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:40:47,664 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:21 [2018-11-23 10:40:47,690 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:40:47,690 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#a~0.base|]. (= (let ((.cse1 (bvmul (_ bv4 32) main_~i~0)) (.cse0 (select |#memory_int| |main_~#a~0.base|))) (bvadd (bvneg (select .cse0 |main_~#a~0.offset|)) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (select .cse0 (bvadd |main_~#a~0.offset| .cse1)) main_~sum~0 (bvneg (select .cse0 (bvadd |main_~#a~0.offset| (_ bv4 32)))))) (_ bv0 32)) [2018-11-23 10:40:47,691 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_prenex_9, v_prenex_10]. (and (= (_ bv0 32) (bvadd main_~sum~0 v_prenex_9 (bvneg v_prenex_9) v_prenex_10 (bvneg v_prenex_10))) (= (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd |main_~#a~0.offset| (_ bv4 32)))) [2018-11-23 10:40:47,874 INFO L273 TraceCheckUtils]: 51: Hoare triple {2618#false} assume !false; {2618#false} is VALID [2018-11-23 10:40:47,875 INFO L273 TraceCheckUtils]: 50: Hoare triple {2789#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {2618#false} is VALID [2018-11-23 10:40:47,876 INFO L273 TraceCheckUtils]: 49: Hoare triple {2793#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {2789#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:40:47,876 INFO L256 TraceCheckUtils]: 48: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {2793#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,879 INFO L273 TraceCheckUtils]: 47: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:47,879 INFO L273 TraceCheckUtils]: 46: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:47,881 INFO L273 TraceCheckUtils]: 45: Hoare triple {2807#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:48,112 INFO L273 TraceCheckUtils]: 44: Hoare triple {2811#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2807#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:40:48,259 INFO L273 TraceCheckUtils]: 43: Hoare triple {2815#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2811#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:40:50,282 INFO L273 TraceCheckUtils]: 42: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {2815#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:40:50,283 INFO L273 TraceCheckUtils]: 41: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:40:50,283 INFO L273 TraceCheckUtils]: 40: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:40:52,219 INFO L273 TraceCheckUtils]: 39: Hoare triple {2829#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:40:54,227 INFO L273 TraceCheckUtils]: 38: Hoare triple {2833#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2829#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is UNKNOWN [2018-11-23 10:40:56,234 INFO L273 TraceCheckUtils]: 37: Hoare triple {2837#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2833#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:40:56,235 INFO L273 TraceCheckUtils]: 36: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {2837#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:40:56,248 INFO L273 TraceCheckUtils]: 35: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:56,249 INFO L273 TraceCheckUtils]: 34: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:56,250 INFO L273 TraceCheckUtils]: 33: Hoare triple {2807#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:56,449 INFO L273 TraceCheckUtils]: 32: Hoare triple {2811#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2807#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:40:56,610 INFO L273 TraceCheckUtils]: 31: Hoare triple {2815#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2811#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:40:56,746 INFO L273 TraceCheckUtils]: 30: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {2815#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:40:56,746 INFO L273 TraceCheckUtils]: 29: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:40:56,747 INFO L273 TraceCheckUtils]: 28: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:40:58,750 INFO L273 TraceCheckUtils]: 27: Hoare triple {2829#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is UNKNOWN [2018-11-23 10:41:00,758 INFO L273 TraceCheckUtils]: 26: Hoare triple {2833#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2829#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is UNKNOWN [2018-11-23 10:41:02,763 INFO L273 TraceCheckUtils]: 25: Hoare triple {2837#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2833#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:02,764 INFO L273 TraceCheckUtils]: 24: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {2837#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:02,764 INFO L273 TraceCheckUtils]: 23: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:02,765 INFO L273 TraceCheckUtils]: 22: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:02,765 INFO L273 TraceCheckUtils]: 21: Hoare triple {2807#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:02,964 INFO L273 TraceCheckUtils]: 20: Hoare triple {2811#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2807#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:03,126 INFO L273 TraceCheckUtils]: 19: Hoare triple {2815#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2811#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:03,127 INFO L273 TraceCheckUtils]: 18: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {2815#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:03,128 INFO L273 TraceCheckUtils]: 17: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:03,132 INFO L273 TraceCheckUtils]: 16: Hoare triple {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:05,089 INFO L273 TraceCheckUtils]: 15: Hoare triple {2829#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2819#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:07,106 INFO L273 TraceCheckUtils]: 14: Hoare triple {2833#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2829#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is UNKNOWN [2018-11-23 10:41:07,107 INFO L273 TraceCheckUtils]: 13: Hoare triple {2910#(and (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_10 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32))) (= (_ bv0 32) (bvadd v_prenex_10 main_~sum~0 v_prenex_9 (bvneg v_prenex_10) (bvneg v_prenex_9)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2833#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:07,113 INFO L273 TraceCheckUtils]: 12: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {2910#(and (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_10 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32))) (= (_ bv0 32) (bvadd v_prenex_10 main_~sum~0 v_prenex_9 (bvneg v_prenex_10) (bvneg v_prenex_9)))))} is VALID [2018-11-23 10:41:07,113 INFO L273 TraceCheckUtils]: 11: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:07,132 INFO L273 TraceCheckUtils]: 10: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:07,146 INFO L273 TraceCheckUtils]: 9: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:07,154 INFO L273 TraceCheckUtils]: 8: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:07,154 INFO L273 TraceCheckUtils]: 7: Hoare triple {2797#(= main_~sum~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:07,155 INFO L273 TraceCheckUtils]: 6: Hoare triple {2617#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {2797#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:07,155 INFO L273 TraceCheckUtils]: 5: Hoare triple {2617#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2617#true} is VALID [2018-11-23 10:41:07,155 INFO L256 TraceCheckUtils]: 4: Hoare triple {2617#true} call #t~ret15 := main(); {2617#true} is VALID [2018-11-23 10:41:07,155 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2617#true} {2617#true} #125#return; {2617#true} is VALID [2018-11-23 10:41:07,155 INFO L273 TraceCheckUtils]: 2: Hoare triple {2617#true} assume true; {2617#true} is VALID [2018-11-23 10:41:07,155 INFO L273 TraceCheckUtils]: 1: Hoare triple {2617#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2617#true} is VALID [2018-11-23 10:41:07,156 INFO L256 TraceCheckUtils]: 0: Hoare triple {2617#true} call ULTIMATE.init(); {2617#true} is VALID [2018-11-23 10:41:07,162 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:41:07,164 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:41:07,164 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 10:41:07,165 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 52 [2018-11-23 10:41:07,165 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:07,168 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 10:41:23,577 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 88 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:23,577 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 10:41:23,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 10:41:23,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:41:23,578 INFO L87 Difference]: Start difference. First operand 101 states and 113 transitions. Second operand 24 states. [2018-11-23 10:41:31,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:31,677 INFO L93 Difference]: Finished difference Result 130 states and 141 transitions. [2018-11-23 10:41:31,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 10:41:31,677 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 52 [2018-11-23 10:41:31,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:31,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:41:31,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 80 transitions. [2018-11-23 10:41:31,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:41:31,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 80 transitions. [2018-11-23 10:41:31,682 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 80 transitions. [2018-11-23 10:41:32,156 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 80 edges. 80 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:32,158 INFO L225 Difference]: With dead ends: 130 [2018-11-23 10:41:32,158 INFO L226 Difference]: Without dead ends: 89 [2018-11-23 10:41:32,159 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 71 SyntacticMatches, 10 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=75, Invalid=525, Unknown=0, NotChecked=0, Total=600 [2018-11-23 10:41:32,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-11-23 10:41:32,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-11-23 10:41:32,249 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:32,249 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand 89 states. [2018-11-23 10:41:32,250 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand 89 states. [2018-11-23 10:41:32,250 INFO L87 Difference]: Start difference. First operand 89 states. Second operand 89 states. [2018-11-23 10:41:32,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:32,254 INFO L93 Difference]: Finished difference Result 89 states and 99 transitions. [2018-11-23 10:41:32,254 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 99 transitions. [2018-11-23 10:41:32,255 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:32,255 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:32,255 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand 89 states. [2018-11-23 10:41:32,255 INFO L87 Difference]: Start difference. First operand 89 states. Second operand 89 states. [2018-11-23 10:41:32,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:32,257 INFO L93 Difference]: Finished difference Result 89 states and 99 transitions. [2018-11-23 10:41:32,257 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 99 transitions. [2018-11-23 10:41:32,258 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:32,258 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:32,258 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:32,258 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:32,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-11-23 10:41:32,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 99 transitions. [2018-11-23 10:41:32,260 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 99 transitions. Word has length 52 [2018-11-23 10:41:32,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:32,261 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 99 transitions. [2018-11-23 10:41:32,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 10:41:32,261 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 99 transitions. [2018-11-23 10:41:32,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 10:41:32,262 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:32,262 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:32,262 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:32,262 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:32,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1094831643, now seen corresponding path program 3 times [2018-11-23 10:41:32,263 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:32,263 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:32,280 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:41:32,597 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:41:32,597 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:41:32,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:32,656 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:32,893 INFO L256 TraceCheckUtils]: 0: Hoare triple {3461#true} call ULTIMATE.init(); {3461#true} is VALID [2018-11-23 10:41:32,893 INFO L273 TraceCheckUtils]: 1: Hoare triple {3461#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3461#true} is VALID [2018-11-23 10:41:32,893 INFO L273 TraceCheckUtils]: 2: Hoare triple {3461#true} assume true; {3461#true} is VALID [2018-11-23 10:41:32,894 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3461#true} {3461#true} #125#return; {3461#true} is VALID [2018-11-23 10:41:32,894 INFO L256 TraceCheckUtils]: 4: Hoare triple {3461#true} call #t~ret15 := main(); {3461#true} is VALID [2018-11-23 10:41:32,894 INFO L273 TraceCheckUtils]: 5: Hoare triple {3461#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3461#true} is VALID [2018-11-23 10:41:32,895 INFO L273 TraceCheckUtils]: 6: Hoare triple {3461#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,896 INFO L273 TraceCheckUtils]: 7: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,896 INFO L273 TraceCheckUtils]: 8: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,897 INFO L273 TraceCheckUtils]: 9: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,897 INFO L273 TraceCheckUtils]: 10: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,897 INFO L273 TraceCheckUtils]: 11: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,898 INFO L273 TraceCheckUtils]: 12: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,898 INFO L273 TraceCheckUtils]: 13: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3484#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:32,899 INFO L273 TraceCheckUtils]: 14: Hoare triple {3484#(bvsgt ~SIZE~0 (_ bv1 32))} ~i~0 := 0bv32; {3509#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:32,900 INFO L273 TraceCheckUtils]: 15: Hoare triple {3509#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3509#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:32,901 INFO L273 TraceCheckUtils]: 16: Hoare triple {3509#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3516#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:32,902 INFO L273 TraceCheckUtils]: 17: Hoare triple {3516#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3516#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:32,903 INFO L273 TraceCheckUtils]: 18: Hoare triple {3516#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3523#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:32,904 INFO L273 TraceCheckUtils]: 19: Hoare triple {3523#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,905 INFO L273 TraceCheckUtils]: 20: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,905 INFO L273 TraceCheckUtils]: 21: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,906 INFO L273 TraceCheckUtils]: 22: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,907 INFO L273 TraceCheckUtils]: 23: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,907 INFO L273 TraceCheckUtils]: 24: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,908 INFO L273 TraceCheckUtils]: 25: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,909 INFO L273 TraceCheckUtils]: 26: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,909 INFO L273 TraceCheckUtils]: 27: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,910 INFO L273 TraceCheckUtils]: 28: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,910 INFO L273 TraceCheckUtils]: 29: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,911 INFO L273 TraceCheckUtils]: 30: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,912 INFO L273 TraceCheckUtils]: 31: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,912 INFO L273 TraceCheckUtils]: 32: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,915 INFO L273 TraceCheckUtils]: 33: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:32,916 INFO L273 TraceCheckUtils]: 34: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {3573#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:32,917 INFO L273 TraceCheckUtils]: 35: Hoare triple {3573#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3573#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:32,917 INFO L273 TraceCheckUtils]: 36: Hoare triple {3573#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3580#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:32,918 INFO L273 TraceCheckUtils]: 37: Hoare triple {3580#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3580#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:32,919 INFO L273 TraceCheckUtils]: 38: Hoare triple {3580#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3587#(and (= (_ bv2 32) main_~i~0) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:32,920 INFO L273 TraceCheckUtils]: 39: Hoare triple {3587#(and (= (_ bv2 32) main_~i~0) (bvslt (_ bv2 32) ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {3462#false} is VALID [2018-11-23 10:41:32,920 INFO L273 TraceCheckUtils]: 40: Hoare triple {3462#false} ~i~0 := 0bv32; {3462#false} is VALID [2018-11-23 10:41:32,920 INFO L273 TraceCheckUtils]: 41: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3462#false} is VALID [2018-11-23 10:41:32,921 INFO L273 TraceCheckUtils]: 42: Hoare triple {3462#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3462#false} is VALID [2018-11-23 10:41:32,921 INFO L273 TraceCheckUtils]: 43: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3462#false} is VALID [2018-11-23 10:41:32,922 INFO L273 TraceCheckUtils]: 44: Hoare triple {3462#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3462#false} is VALID [2018-11-23 10:41:32,922 INFO L273 TraceCheckUtils]: 45: Hoare triple {3462#false} assume !~bvslt32(~i~0, ~SIZE~0); {3462#false} is VALID [2018-11-23 10:41:32,922 INFO L273 TraceCheckUtils]: 46: Hoare triple {3462#false} ~i~0 := 0bv32; {3462#false} is VALID [2018-11-23 10:41:32,923 INFO L273 TraceCheckUtils]: 47: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3462#false} is VALID [2018-11-23 10:41:32,923 INFO L273 TraceCheckUtils]: 48: Hoare triple {3462#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3462#false} is VALID [2018-11-23 10:41:32,923 INFO L273 TraceCheckUtils]: 49: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3462#false} is VALID [2018-11-23 10:41:32,924 INFO L273 TraceCheckUtils]: 50: Hoare triple {3462#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3462#false} is VALID [2018-11-23 10:41:32,924 INFO L273 TraceCheckUtils]: 51: Hoare triple {3462#false} assume !~bvslt32(~i~0, ~SIZE~0); {3462#false} is VALID [2018-11-23 10:41:32,924 INFO L256 TraceCheckUtils]: 52: Hoare triple {3462#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {3462#false} is VALID [2018-11-23 10:41:32,924 INFO L273 TraceCheckUtils]: 53: Hoare triple {3462#false} ~cond := #in~cond; {3462#false} is VALID [2018-11-23 10:41:32,924 INFO L273 TraceCheckUtils]: 54: Hoare triple {3462#false} assume 0bv32 == ~cond; {3462#false} is VALID [2018-11-23 10:41:32,925 INFO L273 TraceCheckUtils]: 55: Hoare triple {3462#false} assume !false; {3462#false} is VALID [2018-11-23 10:41:32,929 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-23 10:41:32,929 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:41:33,392 INFO L273 TraceCheckUtils]: 55: Hoare triple {3462#false} assume !false; {3462#false} is VALID [2018-11-23 10:41:33,392 INFO L273 TraceCheckUtils]: 54: Hoare triple {3462#false} assume 0bv32 == ~cond; {3462#false} is VALID [2018-11-23 10:41:33,393 INFO L273 TraceCheckUtils]: 53: Hoare triple {3462#false} ~cond := #in~cond; {3462#false} is VALID [2018-11-23 10:41:33,393 INFO L256 TraceCheckUtils]: 52: Hoare triple {3462#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {3462#false} is VALID [2018-11-23 10:41:33,393 INFO L273 TraceCheckUtils]: 51: Hoare triple {3462#false} assume !~bvslt32(~i~0, ~SIZE~0); {3462#false} is VALID [2018-11-23 10:41:33,393 INFO L273 TraceCheckUtils]: 50: Hoare triple {3462#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3462#false} is VALID [2018-11-23 10:41:33,394 INFO L273 TraceCheckUtils]: 49: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3462#false} is VALID [2018-11-23 10:41:33,394 INFO L273 TraceCheckUtils]: 48: Hoare triple {3462#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3462#false} is VALID [2018-11-23 10:41:33,394 INFO L273 TraceCheckUtils]: 47: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3462#false} is VALID [2018-11-23 10:41:33,394 INFO L273 TraceCheckUtils]: 46: Hoare triple {3462#false} ~i~0 := 0bv32; {3462#false} is VALID [2018-11-23 10:41:33,395 INFO L273 TraceCheckUtils]: 45: Hoare triple {3462#false} assume !~bvslt32(~i~0, ~SIZE~0); {3462#false} is VALID [2018-11-23 10:41:33,395 INFO L273 TraceCheckUtils]: 44: Hoare triple {3462#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3462#false} is VALID [2018-11-23 10:41:33,395 INFO L273 TraceCheckUtils]: 43: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3462#false} is VALID [2018-11-23 10:41:33,395 INFO L273 TraceCheckUtils]: 42: Hoare triple {3462#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3462#false} is VALID [2018-11-23 10:41:33,395 INFO L273 TraceCheckUtils]: 41: Hoare triple {3462#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3462#false} is VALID [2018-11-23 10:41:33,395 INFO L273 TraceCheckUtils]: 40: Hoare triple {3462#false} ~i~0 := 0bv32; {3462#false} is VALID [2018-11-23 10:41:33,396 INFO L273 TraceCheckUtils]: 39: Hoare triple {3687#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {3462#false} is VALID [2018-11-23 10:41:33,397 INFO L273 TraceCheckUtils]: 38: Hoare triple {3691#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3687#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:41:33,398 INFO L273 TraceCheckUtils]: 37: Hoare triple {3691#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3691#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:33,419 INFO L273 TraceCheckUtils]: 36: Hoare triple {3698#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3691#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:33,419 INFO L273 TraceCheckUtils]: 35: Hoare triple {3698#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3698#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:33,420 INFO L273 TraceCheckUtils]: 34: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {3698#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:33,420 INFO L273 TraceCheckUtils]: 33: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,421 INFO L273 TraceCheckUtils]: 32: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,421 INFO L273 TraceCheckUtils]: 31: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,422 INFO L273 TraceCheckUtils]: 30: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,422 INFO L273 TraceCheckUtils]: 29: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,423 INFO L273 TraceCheckUtils]: 28: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,424 INFO L273 TraceCheckUtils]: 27: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,424 INFO L273 TraceCheckUtils]: 26: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,425 INFO L273 TraceCheckUtils]: 25: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,426 INFO L273 TraceCheckUtils]: 24: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,426 INFO L273 TraceCheckUtils]: 23: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,427 INFO L273 TraceCheckUtils]: 22: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,427 INFO L273 TraceCheckUtils]: 21: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,428 INFO L273 TraceCheckUtils]: 20: Hoare triple {3527#(bvslt (_ bv2 32) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,429 INFO L273 TraceCheckUtils]: 19: Hoare triple {3750#(or (not (bvslt main_~i~0 ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3527#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:33,430 INFO L273 TraceCheckUtils]: 18: Hoare triple {3754#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3750#(or (not (bvslt main_~i~0 ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:33,431 INFO L273 TraceCheckUtils]: 17: Hoare triple {3754#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3754#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:33,464 INFO L273 TraceCheckUtils]: 16: Hoare triple {3761#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3754#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:33,465 INFO L273 TraceCheckUtils]: 15: Hoare triple {3761#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3761#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:33,466 INFO L273 TraceCheckUtils]: 14: Hoare triple {3461#true} ~i~0 := 0bv32; {3761#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:33,466 INFO L273 TraceCheckUtils]: 13: Hoare triple {3461#true} assume !~bvslt32(~i~0, ~SIZE~0); {3461#true} is VALID [2018-11-23 10:41:33,466 INFO L273 TraceCheckUtils]: 12: Hoare triple {3461#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3461#true} is VALID [2018-11-23 10:41:33,466 INFO L273 TraceCheckUtils]: 11: Hoare triple {3461#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3461#true} is VALID [2018-11-23 10:41:33,466 INFO L273 TraceCheckUtils]: 10: Hoare triple {3461#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3461#true} is VALID [2018-11-23 10:41:33,466 INFO L273 TraceCheckUtils]: 9: Hoare triple {3461#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3461#true} is VALID [2018-11-23 10:41:33,467 INFO L273 TraceCheckUtils]: 8: Hoare triple {3461#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3461#true} is VALID [2018-11-23 10:41:33,467 INFO L273 TraceCheckUtils]: 7: Hoare triple {3461#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3461#true} is VALID [2018-11-23 10:41:33,467 INFO L273 TraceCheckUtils]: 6: Hoare triple {3461#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {3461#true} is VALID [2018-11-23 10:41:33,467 INFO L273 TraceCheckUtils]: 5: Hoare triple {3461#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3461#true} is VALID [2018-11-23 10:41:33,467 INFO L256 TraceCheckUtils]: 4: Hoare triple {3461#true} call #t~ret15 := main(); {3461#true} is VALID [2018-11-23 10:41:33,467 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3461#true} {3461#true} #125#return; {3461#true} is VALID [2018-11-23 10:41:33,468 INFO L273 TraceCheckUtils]: 2: Hoare triple {3461#true} assume true; {3461#true} is VALID [2018-11-23 10:41:33,468 INFO L273 TraceCheckUtils]: 1: Hoare triple {3461#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3461#true} is VALID [2018-11-23 10:41:33,468 INFO L256 TraceCheckUtils]: 0: Hoare triple {3461#true} call ULTIMATE.init(); {3461#true} is VALID [2018-11-23 10:41:33,472 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-23 10:41:33,474 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:41:33,474 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 16 [2018-11-23 10:41:33,475 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2018-11-23 10:41:33,475 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:33,477 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:41:33,629 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:33,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:41:33,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:41:33,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=171, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:41:33,630 INFO L87 Difference]: Start difference. First operand 89 states and 99 transitions. Second operand 16 states. [2018-11-23 10:41:35,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:35,973 INFO L93 Difference]: Finished difference Result 103 states and 113 transitions. [2018-11-23 10:41:35,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 10:41:35,973 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2018-11-23 10:41:35,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:35,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:41:35,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 105 transitions. [2018-11-23 10:41:35,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:41:35,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 105 transitions. [2018-11-23 10:41:35,979 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 105 transitions. [2018-11-23 10:41:36,195 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:36,197 INFO L225 Difference]: With dead ends: 103 [2018-11-23 10:41:36,197 INFO L226 Difference]: Without dead ends: 74 [2018-11-23 10:41:36,198 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:41:36,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-11-23 10:41:36,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 67. [2018-11-23 10:41:36,247 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:36,247 INFO L82 GeneralOperation]: Start isEquivalent. First operand 74 states. Second operand 67 states. [2018-11-23 10:41:36,247 INFO L74 IsIncluded]: Start isIncluded. First operand 74 states. Second operand 67 states. [2018-11-23 10:41:36,247 INFO L87 Difference]: Start difference. First operand 74 states. Second operand 67 states. [2018-11-23 10:41:36,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:36,250 INFO L93 Difference]: Finished difference Result 74 states and 80 transitions. [2018-11-23 10:41:36,250 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-11-23 10:41:36,250 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:36,250 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:36,251 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand 74 states. [2018-11-23 10:41:36,251 INFO L87 Difference]: Start difference. First operand 67 states. Second operand 74 states. [2018-11-23 10:41:36,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:36,253 INFO L93 Difference]: Finished difference Result 74 states and 80 transitions. [2018-11-23 10:41:36,253 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-11-23 10:41:36,254 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:36,254 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:36,254 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:36,254 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:36,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-11-23 10:41:36,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 73 transitions. [2018-11-23 10:41:36,256 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 73 transitions. Word has length 56 [2018-11-23 10:41:36,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:36,256 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 73 transitions. [2018-11-23 10:41:36,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:41:36,256 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2018-11-23 10:41:36,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-23 10:41:36,257 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:36,257 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:36,257 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:36,257 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:36,257 INFO L82 PathProgramCache]: Analyzing trace with hash 115993883, now seen corresponding path program 4 times [2018-11-23 10:41:36,258 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:36,258 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:36,273 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:41:36,436 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:41:36,437 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:41:38,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-23 10:41:38,519 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:39,955 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2018-11-23 10:41:39,966 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2018-11-23 10:41:39,978 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:39,986 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:39,994 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:39,994 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:12 [2018-11-23 10:41:40,332 INFO L256 TraceCheckUtils]: 0: Hoare triple {4215#true} call ULTIMATE.init(); {4215#true} is VALID [2018-11-23 10:41:40,332 INFO L273 TraceCheckUtils]: 1: Hoare triple {4215#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {4215#true} is VALID [2018-11-23 10:41:40,333 INFO L273 TraceCheckUtils]: 2: Hoare triple {4215#true} assume true; {4215#true} is VALID [2018-11-23 10:41:40,333 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4215#true} {4215#true} #125#return; {4215#true} is VALID [2018-11-23 10:41:40,333 INFO L256 TraceCheckUtils]: 4: Hoare triple {4215#true} call #t~ret15 := main(); {4215#true} is VALID [2018-11-23 10:41:40,333 INFO L273 TraceCheckUtils]: 5: Hoare triple {4215#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {4215#true} is VALID [2018-11-23 10:41:40,334 INFO L273 TraceCheckUtils]: 6: Hoare triple {4215#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,335 INFO L273 TraceCheckUtils]: 7: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,336 INFO L273 TraceCheckUtils]: 8: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,336 INFO L273 TraceCheckUtils]: 9: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,336 INFO L273 TraceCheckUtils]: 10: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,337 INFO L273 TraceCheckUtils]: 11: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,337 INFO L273 TraceCheckUtils]: 12: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,338 INFO L273 TraceCheckUtils]: 13: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,339 INFO L273 TraceCheckUtils]: 14: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {4263#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,340 INFO L273 TraceCheckUtils]: 15: Hoare triple {4263#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4267#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,348 INFO L273 TraceCheckUtils]: 16: Hoare triple {4267#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4271#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:40,376 INFO L273 TraceCheckUtils]: 17: Hoare triple {4271#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4275#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:40,377 INFO L273 TraceCheckUtils]: 18: Hoare triple {4275#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4279#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:40,793 INFO L273 TraceCheckUtils]: 19: Hoare triple {4279#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:40,794 INFO L273 TraceCheckUtils]: 20: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:40,795 INFO L273 TraceCheckUtils]: 21: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:40,795 INFO L273 TraceCheckUtils]: 22: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {4293#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:40,834 INFO L273 TraceCheckUtils]: 23: Hoare triple {4293#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {4297#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:41:40,835 INFO L273 TraceCheckUtils]: 24: Hoare triple {4297#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4301#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:40,901 INFO L273 TraceCheckUtils]: 25: Hoare triple {4301#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {4305#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:40,902 INFO L273 TraceCheckUtils]: 26: Hoare triple {4305#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4309#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:41,146 INFO L273 TraceCheckUtils]: 27: Hoare triple {4309#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,146 INFO L273 TraceCheckUtils]: 28: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,147 INFO L273 TraceCheckUtils]: 29: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,147 INFO L273 TraceCheckUtils]: 30: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {4263#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,148 INFO L273 TraceCheckUtils]: 31: Hoare triple {4263#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4267#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,149 INFO L273 TraceCheckUtils]: 32: Hoare triple {4267#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4271#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:41,174 INFO L273 TraceCheckUtils]: 33: Hoare triple {4271#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4275#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:41,175 INFO L273 TraceCheckUtils]: 34: Hoare triple {4275#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4279#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:41,408 INFO L273 TraceCheckUtils]: 35: Hoare triple {4279#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:41,409 INFO L273 TraceCheckUtils]: 36: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:41,410 INFO L273 TraceCheckUtils]: 37: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:41,410 INFO L273 TraceCheckUtils]: 38: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {4293#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,692 INFO L273 TraceCheckUtils]: 39: Hoare triple {4293#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {4297#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:41:41,693 INFO L273 TraceCheckUtils]: 40: Hoare triple {4297#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4301#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:41,761 INFO L273 TraceCheckUtils]: 41: Hoare triple {4301#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {4305#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:41,762 INFO L273 TraceCheckUtils]: 42: Hoare triple {4305#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4309#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:41,788 INFO L273 TraceCheckUtils]: 43: Hoare triple {4309#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,789 INFO L273 TraceCheckUtils]: 44: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,789 INFO L273 TraceCheckUtils]: 45: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,790 INFO L273 TraceCheckUtils]: 46: Hoare triple {4238#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {4263#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,790 INFO L273 TraceCheckUtils]: 47: Hoare triple {4263#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4267#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:41,791 INFO L273 TraceCheckUtils]: 48: Hoare triple {4267#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4271#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:41,815 INFO L273 TraceCheckUtils]: 49: Hoare triple {4271#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4275#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:41,816 INFO L273 TraceCheckUtils]: 50: Hoare triple {4275#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4279#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:42,103 INFO L273 TraceCheckUtils]: 51: Hoare triple {4279#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:42,104 INFO L273 TraceCheckUtils]: 52: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:42,104 INFO L273 TraceCheckUtils]: 53: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:42,105 INFO L273 TraceCheckUtils]: 54: Hoare triple {4283#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {4293#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:42,212 INFO L273 TraceCheckUtils]: 55: Hoare triple {4293#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {4297#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:41:42,227 INFO L273 TraceCheckUtils]: 56: Hoare triple {4297#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4301#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:42,293 INFO L273 TraceCheckUtils]: 57: Hoare triple {4301#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {4305#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:42,295 INFO L273 TraceCheckUtils]: 58: Hoare triple {4305#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4309#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:42,567 INFO L273 TraceCheckUtils]: 59: Hoare triple {4309#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {4409#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:41:42,568 INFO L273 TraceCheckUtils]: 60: Hoare triple {4409#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4409#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:41:42,568 INFO L273 TraceCheckUtils]: 61: Hoare triple {4409#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} assume !~bvslt32(~i~0, ~SIZE~0); {4409#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:41:42,569 INFO L256 TraceCheckUtils]: 62: Hoare triple {4409#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {4419#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:41:42,569 INFO L273 TraceCheckUtils]: 63: Hoare triple {4419#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {4423#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:41:42,570 INFO L273 TraceCheckUtils]: 64: Hoare triple {4423#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {4216#false} is VALID [2018-11-23 10:41:42,570 INFO L273 TraceCheckUtils]: 65: Hoare triple {4216#false} assume !false; {4216#false} is VALID [2018-11-23 10:41:42,587 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 54 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 10:41:42,588 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:42:01,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 43 [2018-11-23 10:42:06,217 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:06,218 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:06,272 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:06,306 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:06,307 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:06,308 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:06,384 INFO L303 Elim1Store]: Index analysis took 176 ms [2018-11-23 10:42:06,531 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 9 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 9 case distinctions, treesize of input 43 treesize of output 194 [2018-11-23 10:42:06,531 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 9