java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-crafted/zero_sum_const4_true-unreach-call.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:40:28,934 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:40:28,936 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:40:28,949 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:40:28,949 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:40:28,950 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:40:28,952 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:40:28,954 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:40:28,955 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:40:28,956 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:40:28,957 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:40:28,957 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:40:28,958 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:40:28,959 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:40:28,961 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:40:28,961 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:40:28,962 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:40:28,964 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:40:28,966 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:40:28,968 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:40:28,969 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:40:28,971 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:40:28,978 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:40:28,980 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:40:28,980 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:40:28,981 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:40:28,982 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:40:28,983 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:40:28,988 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:40:28,990 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:40:28,990 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:40:28,991 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:40:28,992 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:40:28,992 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:40:28,993 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:40:28,995 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:40:28,995 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:40:29,025 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:40:29,025 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:40:29,026 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:40:29,026 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:40:29,027 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:40:29,027 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:40:29,027 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:40:29,028 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:40:29,028 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:40:29,028 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:40:29,028 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:40:29,028 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:40:29,028 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:40:29,031 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:40:29,031 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:40:29,032 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:40:29,032 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:40:29,032 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:40:29,032 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:40:29,032 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:40:29,033 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:40:29,033 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:40:29,033 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:40:29,033 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:40:29,034 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:40:29,034 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:40:29,034 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:40:29,034 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:40:29,037 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:40:29,037 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:40:29,037 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:40:29,037 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:40:29,037 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:40:29,084 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:40:29,099 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:40:29,104 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:40:29,106 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:40:29,106 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:40:29,107 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/zero_sum_const4_true-unreach-call.c [2018-11-23 10:40:29,178 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/29d49bd5b/07668476de3c4e12ab74b58ae99f2d12/FLAG9e8998fe2 [2018-11-23 10:40:29,678 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:40:29,678 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/zero_sum_const4_true-unreach-call.c [2018-11-23 10:40:29,685 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/29d49bd5b/07668476de3c4e12ab74b58ae99f2d12/FLAG9e8998fe2 [2018-11-23 10:40:30,013 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/29d49bd5b/07668476de3c4e12ab74b58ae99f2d12 [2018-11-23 10:40:30,026 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:40:30,028 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:40:30,029 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:40:30,029 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:40:30,033 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:40:30,035 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,038 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@18d7fb6c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30, skipping insertion in model container [2018-11-23 10:40:30,038 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,049 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:40:30,077 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:40:30,348 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:40:30,354 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:40:30,394 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:40:30,431 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:40:30,432 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30 WrapperNode [2018-11-23 10:40:30,432 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:40:30,433 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:40:30,433 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:40:30,433 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:40:30,445 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,458 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,468 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:40:30,468 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:40:30,469 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:40:30,469 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:40:30,481 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,482 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,487 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,487 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,520 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,544 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,546 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... [2018-11-23 10:40:30,549 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:40:30,550 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:40:30,550 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:40:30,550 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:40:30,551 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:40:30,689 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:40:30,689 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:40:30,689 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:40:30,689 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:40:30,689 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:40:30,690 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:40:30,690 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:40:30,690 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:40:30,690 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:40:30,690 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:40:30,690 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:40:30,691 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:40:31,739 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:40:31,739 INFO L280 CfgBuilder]: Removed 9 assue(true) statements. [2018-11-23 10:40:31,740 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:40:31 BoogieIcfgContainer [2018-11-23 10:40:31,740 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:40:31,741 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:40:31,741 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:40:31,744 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:40:31,745 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:40:30" (1/3) ... [2018-11-23 10:40:31,745 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c70ef1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:40:31, skipping insertion in model container [2018-11-23 10:40:31,746 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:40:30" (2/3) ... [2018-11-23 10:40:31,746 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c70ef1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:40:31, skipping insertion in model container [2018-11-23 10:40:31,746 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:40:31" (3/3) ... [2018-11-23 10:40:31,748 INFO L112 eAbstractionObserver]: Analyzing ICFG zero_sum_const4_true-unreach-call.c [2018-11-23 10:40:31,757 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:40:31,765 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:40:31,784 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:40:31,817 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:40:31,818 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:40:31,818 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:40:31,818 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:40:31,819 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:40:31,819 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:40:31,819 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:40:31,819 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:40:31,819 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:40:31,839 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states. [2018-11-23 10:40:31,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 10:40:31,847 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:31,848 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:31,850 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:31,855 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:31,856 INFO L82 PathProgramCache]: Analyzing trace with hash -2099146995, now seen corresponding path program 1 times [2018-11-23 10:40:31,860 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:31,861 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:31,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:31,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:31,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:31,990 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:32,119 INFO L256 TraceCheckUtils]: 0: Hoare triple {49#true} call ULTIMATE.init(); {49#true} is VALID [2018-11-23 10:40:32,123 INFO L273 TraceCheckUtils]: 1: Hoare triple {49#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {49#true} is VALID [2018-11-23 10:40:32,123 INFO L273 TraceCheckUtils]: 2: Hoare triple {49#true} assume true; {49#true} is VALID [2018-11-23 10:40:32,124 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {49#true} {49#true} #153#return; {49#true} is VALID [2018-11-23 10:40:32,124 INFO L256 TraceCheckUtils]: 4: Hoare triple {49#true} call #t~ret19 := main(); {49#true} is VALID [2018-11-23 10:40:32,125 INFO L273 TraceCheckUtils]: 5: Hoare triple {49#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {49#true} is VALID [2018-11-23 10:40:32,125 INFO L273 TraceCheckUtils]: 6: Hoare triple {49#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {49#true} is VALID [2018-11-23 10:40:32,127 INFO L273 TraceCheckUtils]: 7: Hoare triple {49#true} assume !true; {50#false} is VALID [2018-11-23 10:40:32,128 INFO L273 TraceCheckUtils]: 8: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,128 INFO L273 TraceCheckUtils]: 9: Hoare triple {50#false} assume !true; {50#false} is VALID [2018-11-23 10:40:32,128 INFO L273 TraceCheckUtils]: 10: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,128 INFO L273 TraceCheckUtils]: 11: Hoare triple {50#false} assume !true; {50#false} is VALID [2018-11-23 10:40:32,129 INFO L273 TraceCheckUtils]: 12: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,129 INFO L273 TraceCheckUtils]: 13: Hoare triple {50#false} assume !~bvslt32(~i~0, ~SIZE~0); {50#false} is VALID [2018-11-23 10:40:32,129 INFO L273 TraceCheckUtils]: 14: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,129 INFO L273 TraceCheckUtils]: 15: Hoare triple {50#false} assume !~bvslt32(~i~0, ~SIZE~0); {50#false} is VALID [2018-11-23 10:40:32,130 INFO L273 TraceCheckUtils]: 16: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,130 INFO L273 TraceCheckUtils]: 17: Hoare triple {50#false} assume !~bvslt32(~i~0, ~SIZE~0); {50#false} is VALID [2018-11-23 10:40:32,130 INFO L273 TraceCheckUtils]: 18: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,131 INFO L273 TraceCheckUtils]: 19: Hoare triple {50#false} assume !~bvslt32(~i~0, ~SIZE~0); {50#false} is VALID [2018-11-23 10:40:32,131 INFO L273 TraceCheckUtils]: 20: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,131 INFO L273 TraceCheckUtils]: 21: Hoare triple {50#false} assume !~bvslt32(~i~0, ~SIZE~0); {50#false} is VALID [2018-11-23 10:40:32,132 INFO L273 TraceCheckUtils]: 22: Hoare triple {50#false} ~i~0 := 0bv32; {50#false} is VALID [2018-11-23 10:40:32,132 INFO L273 TraceCheckUtils]: 23: Hoare triple {50#false} assume !true; {50#false} is VALID [2018-11-23 10:40:32,132 INFO L256 TraceCheckUtils]: 24: Hoare triple {50#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {50#false} is VALID [2018-11-23 10:40:32,133 INFO L273 TraceCheckUtils]: 25: Hoare triple {50#false} ~cond := #in~cond; {50#false} is VALID [2018-11-23 10:40:32,133 INFO L273 TraceCheckUtils]: 26: Hoare triple {50#false} assume 0bv32 == ~cond; {50#false} is VALID [2018-11-23 10:40:32,134 INFO L273 TraceCheckUtils]: 27: Hoare triple {50#false} assume !false; {50#false} is VALID [2018-11-23 10:40:32,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:40:32,139 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (2)] Exception during sending of exit command (exit): Stream closed [2018-11-23 10:40:32,147 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:32,148 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:40:32,158 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 28 [2018-11-23 10:40:32,161 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:32,166 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:40:32,335 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:32,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:40:32,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:40:32,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:40:32,345 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 2 states. [2018-11-23 10:40:32,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:32,541 INFO L93 Difference]: Finished difference Result 83 states and 119 transitions. [2018-11-23 10:40:32,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:40:32,541 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 28 [2018-11-23 10:40:32,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:32,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:40:32,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 119 transitions. [2018-11-23 10:40:32,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:40:32,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 119 transitions. [2018-11-23 10:40:32,563 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 119 transitions. [2018-11-23 10:40:33,332 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:33,345 INFO L225 Difference]: With dead ends: 83 [2018-11-23 10:40:33,345 INFO L226 Difference]: Without dead ends: 38 [2018-11-23 10:40:33,349 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:40:33,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-11-23 10:40:33,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-11-23 10:40:33,401 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:33,402 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand 38 states. [2018-11-23 10:40:33,403 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand 38 states. [2018-11-23 10:40:33,403 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 38 states. [2018-11-23 10:40:33,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:33,410 INFO L93 Difference]: Finished difference Result 38 states and 46 transitions. [2018-11-23 10:40:33,410 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 46 transitions. [2018-11-23 10:40:33,411 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:33,411 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:33,411 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand 38 states. [2018-11-23 10:40:33,411 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 38 states. [2018-11-23 10:40:33,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:33,418 INFO L93 Difference]: Finished difference Result 38 states and 46 transitions. [2018-11-23 10:40:33,418 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 46 transitions. [2018-11-23 10:40:33,422 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:33,422 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:33,423 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:33,423 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:33,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-11-23 10:40:33,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 46 transitions. [2018-11-23 10:40:33,431 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 46 transitions. Word has length 28 [2018-11-23 10:40:33,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:33,431 INFO L480 AbstractCegarLoop]: Abstraction has 38 states and 46 transitions. [2018-11-23 10:40:33,432 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:40:33,432 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 46 transitions. [2018-11-23 10:40:33,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 10:40:33,433 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:33,435 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:33,435 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:33,436 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:33,436 INFO L82 PathProgramCache]: Analyzing trace with hash -2130853259, now seen corresponding path program 1 times [2018-11-23 10:40:33,439 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:33,439 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:33,463 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:33,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:33,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:33,516 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:33,850 INFO L256 TraceCheckUtils]: 0: Hoare triple {371#true} call ULTIMATE.init(); {371#true} is VALID [2018-11-23 10:40:33,851 INFO L273 TraceCheckUtils]: 1: Hoare triple {371#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {371#true} is VALID [2018-11-23 10:40:33,851 INFO L273 TraceCheckUtils]: 2: Hoare triple {371#true} assume true; {371#true} is VALID [2018-11-23 10:40:33,852 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {371#true} {371#true} #153#return; {371#true} is VALID [2018-11-23 10:40:33,852 INFO L256 TraceCheckUtils]: 4: Hoare triple {371#true} call #t~ret19 := main(); {371#true} is VALID [2018-11-23 10:40:33,852 INFO L273 TraceCheckUtils]: 5: Hoare triple {371#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {371#true} is VALID [2018-11-23 10:40:33,853 INFO L273 TraceCheckUtils]: 6: Hoare triple {371#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,853 INFO L273 TraceCheckUtils]: 7: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,854 INFO L273 TraceCheckUtils]: 8: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,856 INFO L273 TraceCheckUtils]: 9: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,858 INFO L273 TraceCheckUtils]: 10: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,858 INFO L273 TraceCheckUtils]: 11: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,859 INFO L273 TraceCheckUtils]: 12: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,860 INFO L273 TraceCheckUtils]: 13: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,862 INFO L273 TraceCheckUtils]: 14: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,864 INFO L273 TraceCheckUtils]: 15: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,864 INFO L273 TraceCheckUtils]: 16: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,865 INFO L273 TraceCheckUtils]: 17: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,866 INFO L273 TraceCheckUtils]: 18: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,867 INFO L273 TraceCheckUtils]: 19: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,867 INFO L273 TraceCheckUtils]: 20: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,870 INFO L273 TraceCheckUtils]: 21: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,871 INFO L273 TraceCheckUtils]: 22: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,876 INFO L273 TraceCheckUtils]: 23: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {394#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:33,877 INFO L256 TraceCheckUtils]: 24: Hoare triple {394#(= main_~sum~0 (_ bv0 32))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {449#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:33,880 INFO L273 TraceCheckUtils]: 25: Hoare triple {449#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {453#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:33,881 INFO L273 TraceCheckUtils]: 26: Hoare triple {453#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {372#false} is VALID [2018-11-23 10:40:33,881 INFO L273 TraceCheckUtils]: 27: Hoare triple {372#false} assume !false; {372#false} is VALID [2018-11-23 10:40:33,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:40:33,883 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:40:33,885 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:33,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:40:33,887 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-11-23 10:40:33,887 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:33,887 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:40:34,014 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:34,014 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:40:34,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:40:34,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:40:34,015 INFO L87 Difference]: Start difference. First operand 38 states and 46 transitions. Second operand 5 states. [2018-11-23 10:40:34,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:34,711 INFO L93 Difference]: Finished difference Result 58 states and 73 transitions. [2018-11-23 10:40:34,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:40:34,711 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-11-23 10:40:34,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:34,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:40:34,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 73 transitions. [2018-11-23 10:40:34,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:40:34,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 73 transitions. [2018-11-23 10:40:34,718 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 73 transitions. [2018-11-23 10:40:34,847 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:34,849 INFO L225 Difference]: With dead ends: 58 [2018-11-23 10:40:34,850 INFO L226 Difference]: Without dead ends: 53 [2018-11-23 10:40:34,851 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:40:34,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-23 10:40:34,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-11-23 10:40:34,902 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:34,902 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 53 states. [2018-11-23 10:40:34,902 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-23 10:40:34,902 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-23 10:40:34,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:34,907 INFO L93 Difference]: Finished difference Result 53 states and 68 transitions. [2018-11-23 10:40:34,907 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 68 transitions. [2018-11-23 10:40:34,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:34,908 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:34,908 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-23 10:40:34,908 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-23 10:40:34,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:34,912 INFO L93 Difference]: Finished difference Result 53 states and 68 transitions. [2018-11-23 10:40:34,913 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 68 transitions. [2018-11-23 10:40:34,913 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:34,914 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:34,914 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:34,914 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:34,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-11-23 10:40:34,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 68 transitions. [2018-11-23 10:40:34,918 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 68 transitions. Word has length 28 [2018-11-23 10:40:34,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:34,918 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 68 transitions. [2018-11-23 10:40:34,918 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:40:34,919 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 68 transitions. [2018-11-23 10:40:34,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 10:40:34,920 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:34,920 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:34,920 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:34,921 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:34,921 INFO L82 PathProgramCache]: Analyzing trace with hash 1966572211, now seen corresponding path program 1 times [2018-11-23 10:40:34,921 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:34,922 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:34,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:34,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:35,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:35,004 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:35,099 INFO L256 TraceCheckUtils]: 0: Hoare triple {726#true} call ULTIMATE.init(); {726#true} is VALID [2018-11-23 10:40:35,100 INFO L273 TraceCheckUtils]: 1: Hoare triple {726#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {726#true} is VALID [2018-11-23 10:40:35,100 INFO L273 TraceCheckUtils]: 2: Hoare triple {726#true} assume true; {726#true} is VALID [2018-11-23 10:40:35,101 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {726#true} {726#true} #153#return; {726#true} is VALID [2018-11-23 10:40:35,101 INFO L256 TraceCheckUtils]: 4: Hoare triple {726#true} call #t~ret19 := main(); {726#true} is VALID [2018-11-23 10:40:35,101 INFO L273 TraceCheckUtils]: 5: Hoare triple {726#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {726#true} is VALID [2018-11-23 10:40:35,107 INFO L273 TraceCheckUtils]: 6: Hoare triple {726#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {749#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:35,108 INFO L273 TraceCheckUtils]: 7: Hoare triple {749#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,109 INFO L273 TraceCheckUtils]: 8: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,109 INFO L273 TraceCheckUtils]: 9: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,109 INFO L273 TraceCheckUtils]: 10: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,109 INFO L273 TraceCheckUtils]: 11: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,110 INFO L273 TraceCheckUtils]: 12: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,110 INFO L273 TraceCheckUtils]: 13: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,110 INFO L273 TraceCheckUtils]: 14: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,111 INFO L273 TraceCheckUtils]: 15: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,111 INFO L273 TraceCheckUtils]: 16: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,112 INFO L273 TraceCheckUtils]: 17: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,112 INFO L273 TraceCheckUtils]: 18: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,112 INFO L273 TraceCheckUtils]: 19: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,113 INFO L273 TraceCheckUtils]: 20: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,113 INFO L273 TraceCheckUtils]: 21: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,113 INFO L273 TraceCheckUtils]: 22: Hoare triple {727#false} ~i~0 := 0bv32; {727#false} is VALID [2018-11-23 10:40:35,114 INFO L273 TraceCheckUtils]: 23: Hoare triple {727#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {727#false} is VALID [2018-11-23 10:40:35,114 INFO L273 TraceCheckUtils]: 24: Hoare triple {727#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {727#false} is VALID [2018-11-23 10:40:35,114 INFO L273 TraceCheckUtils]: 25: Hoare triple {727#false} assume !~bvslt32(~i~0, ~SIZE~0); {727#false} is VALID [2018-11-23 10:40:35,115 INFO L256 TraceCheckUtils]: 26: Hoare triple {727#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {727#false} is VALID [2018-11-23 10:40:35,115 INFO L273 TraceCheckUtils]: 27: Hoare triple {727#false} ~cond := #in~cond; {727#false} is VALID [2018-11-23 10:40:35,115 INFO L273 TraceCheckUtils]: 28: Hoare triple {727#false} assume 0bv32 == ~cond; {727#false} is VALID [2018-11-23 10:40:35,116 INFO L273 TraceCheckUtils]: 29: Hoare triple {727#false} assume !false; {727#false} is VALID [2018-11-23 10:40:35,118 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:40:35,118 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (4)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 10:40:35,122 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:35,122 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:40:35,123 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:40:35,123 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:35,123 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:40:35,176 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:35,176 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:40:35,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:40:35,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:40:35,178 INFO L87 Difference]: Start difference. First operand 53 states and 68 transitions. Second operand 3 states. [2018-11-23 10:40:35,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:35,536 INFO L93 Difference]: Finished difference Result 99 states and 129 transitions. [2018-11-23 10:40:35,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:40:35,536 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2018-11-23 10:40:35,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:35,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:40:35,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 85 transitions. [2018-11-23 10:40:35,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:40:35,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 85 transitions. [2018-11-23 10:40:35,543 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 85 transitions. [2018-11-23 10:40:35,761 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:35,763 INFO L225 Difference]: With dead ends: 99 [2018-11-23 10:40:35,763 INFO L226 Difference]: Without dead ends: 55 [2018-11-23 10:40:35,764 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:40:35,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-11-23 10:40:35,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2018-11-23 10:40:35,909 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:35,909 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand 54 states. [2018-11-23 10:40:35,910 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand 54 states. [2018-11-23 10:40:35,910 INFO L87 Difference]: Start difference. First operand 55 states. Second operand 54 states. [2018-11-23 10:40:35,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:35,914 INFO L93 Difference]: Finished difference Result 55 states and 70 transitions. [2018-11-23 10:40:35,914 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 70 transitions. [2018-11-23 10:40:35,915 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:35,915 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:35,915 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 55 states. [2018-11-23 10:40:35,915 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 55 states. [2018-11-23 10:40:35,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:35,919 INFO L93 Difference]: Finished difference Result 55 states and 70 transitions. [2018-11-23 10:40:35,919 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 70 transitions. [2018-11-23 10:40:35,920 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:35,920 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:35,920 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:35,920 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:35,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-11-23 10:40:35,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 69 transitions. [2018-11-23 10:40:35,923 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 69 transitions. Word has length 30 [2018-11-23 10:40:35,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:35,924 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 69 transitions. [2018-11-23 10:40:35,924 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:40:35,924 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 69 transitions. [2018-11-23 10:40:35,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:40:35,926 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:35,926 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:35,926 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:35,927 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:35,927 INFO L82 PathProgramCache]: Analyzing trace with hash 1207168369, now seen corresponding path program 1 times [2018-11-23 10:40:35,927 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:35,927 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:35,954 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:40:35,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:36,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:36,016 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:36,115 INFO L256 TraceCheckUtils]: 0: Hoare triple {1147#true} call ULTIMATE.init(); {1147#true} is VALID [2018-11-23 10:40:36,116 INFO L273 TraceCheckUtils]: 1: Hoare triple {1147#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1147#true} is VALID [2018-11-23 10:40:36,116 INFO L273 TraceCheckUtils]: 2: Hoare triple {1147#true} assume true; {1147#true} is VALID [2018-11-23 10:40:36,116 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1147#true} {1147#true} #153#return; {1147#true} is VALID [2018-11-23 10:40:36,117 INFO L256 TraceCheckUtils]: 4: Hoare triple {1147#true} call #t~ret19 := main(); {1147#true} is VALID [2018-11-23 10:40:36,117 INFO L273 TraceCheckUtils]: 5: Hoare triple {1147#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1147#true} is VALID [2018-11-23 10:40:36,118 INFO L273 TraceCheckUtils]: 6: Hoare triple {1147#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1170#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:36,118 INFO L273 TraceCheckUtils]: 7: Hoare triple {1170#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1170#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:36,119 INFO L273 TraceCheckUtils]: 8: Hoare triple {1170#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1177#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:36,137 INFO L273 TraceCheckUtils]: 9: Hoare triple {1177#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,137 INFO L273 TraceCheckUtils]: 10: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,138 INFO L273 TraceCheckUtils]: 11: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,138 INFO L273 TraceCheckUtils]: 12: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,138 INFO L273 TraceCheckUtils]: 13: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,139 INFO L273 TraceCheckUtils]: 14: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,141 INFO L273 TraceCheckUtils]: 15: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,141 INFO L273 TraceCheckUtils]: 16: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,141 INFO L273 TraceCheckUtils]: 17: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,143 INFO L273 TraceCheckUtils]: 18: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,143 INFO L273 TraceCheckUtils]: 19: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,143 INFO L273 TraceCheckUtils]: 20: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,144 INFO L273 TraceCheckUtils]: 21: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,144 INFO L273 TraceCheckUtils]: 22: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,144 INFO L273 TraceCheckUtils]: 23: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,145 INFO L273 TraceCheckUtils]: 24: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,145 INFO L273 TraceCheckUtils]: 25: Hoare triple {1148#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {1148#false} is VALID [2018-11-23 10:40:36,145 INFO L273 TraceCheckUtils]: 26: Hoare triple {1148#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1148#false} is VALID [2018-11-23 10:40:36,146 INFO L273 TraceCheckUtils]: 27: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,146 INFO L256 TraceCheckUtils]: 28: Hoare triple {1148#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1148#false} is VALID [2018-11-23 10:40:36,146 INFO L273 TraceCheckUtils]: 29: Hoare triple {1148#false} ~cond := #in~cond; {1148#false} is VALID [2018-11-23 10:40:36,146 INFO L273 TraceCheckUtils]: 30: Hoare triple {1148#false} assume 0bv32 == ~cond; {1148#false} is VALID [2018-11-23 10:40:36,147 INFO L273 TraceCheckUtils]: 31: Hoare triple {1148#false} assume !false; {1148#false} is VALID [2018-11-23 10:40:36,149 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:40:36,149 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:40:36,340 INFO L273 TraceCheckUtils]: 31: Hoare triple {1148#false} assume !false; {1148#false} is VALID [2018-11-23 10:40:36,340 INFO L273 TraceCheckUtils]: 30: Hoare triple {1148#false} assume 0bv32 == ~cond; {1148#false} is VALID [2018-11-23 10:40:36,341 INFO L273 TraceCheckUtils]: 29: Hoare triple {1148#false} ~cond := #in~cond; {1148#false} is VALID [2018-11-23 10:40:36,341 INFO L256 TraceCheckUtils]: 28: Hoare triple {1148#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1148#false} is VALID [2018-11-23 10:40:36,341 INFO L273 TraceCheckUtils]: 27: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,341 INFO L273 TraceCheckUtils]: 26: Hoare triple {1148#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1148#false} is VALID [2018-11-23 10:40:36,342 INFO L273 TraceCheckUtils]: 25: Hoare triple {1148#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {1148#false} is VALID [2018-11-23 10:40:36,342 INFO L273 TraceCheckUtils]: 24: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,342 INFO L273 TraceCheckUtils]: 23: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,343 INFO L273 TraceCheckUtils]: 22: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,343 INFO L273 TraceCheckUtils]: 21: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,343 INFO L273 TraceCheckUtils]: 20: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,344 INFO L273 TraceCheckUtils]: 19: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,344 INFO L273 TraceCheckUtils]: 18: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,344 INFO L273 TraceCheckUtils]: 17: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,345 INFO L273 TraceCheckUtils]: 16: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,345 INFO L273 TraceCheckUtils]: 15: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,345 INFO L273 TraceCheckUtils]: 14: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,345 INFO L273 TraceCheckUtils]: 13: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,346 INFO L273 TraceCheckUtils]: 12: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,346 INFO L273 TraceCheckUtils]: 11: Hoare triple {1148#false} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,346 INFO L273 TraceCheckUtils]: 10: Hoare triple {1148#false} ~i~0 := 0bv32; {1148#false} is VALID [2018-11-23 10:40:36,357 INFO L273 TraceCheckUtils]: 9: Hoare triple {1313#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {1148#false} is VALID [2018-11-23 10:40:36,358 INFO L273 TraceCheckUtils]: 8: Hoare triple {1317#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1313#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:40:36,360 INFO L273 TraceCheckUtils]: 7: Hoare triple {1317#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1317#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:36,360 INFO L273 TraceCheckUtils]: 6: Hoare triple {1147#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1317#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:36,361 INFO L273 TraceCheckUtils]: 5: Hoare triple {1147#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1147#true} is VALID [2018-11-23 10:40:36,361 INFO L256 TraceCheckUtils]: 4: Hoare triple {1147#true} call #t~ret19 := main(); {1147#true} is VALID [2018-11-23 10:40:36,361 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1147#true} {1147#true} #153#return; {1147#true} is VALID [2018-11-23 10:40:36,361 INFO L273 TraceCheckUtils]: 2: Hoare triple {1147#true} assume true; {1147#true} is VALID [2018-11-23 10:40:36,362 INFO L273 TraceCheckUtils]: 1: Hoare triple {1147#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1147#true} is VALID [2018-11-23 10:40:36,362 INFO L256 TraceCheckUtils]: 0: Hoare triple {1147#true} call ULTIMATE.init(); {1147#true} is VALID [2018-11-23 10:40:36,365 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (5)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 10:40:36,369 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:40:36,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 10:40:36,370 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-11-23 10:40:36,370 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:36,370 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:40:36,426 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:36,426 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:40:36,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:40:36,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:40:36,427 INFO L87 Difference]: Start difference. First operand 54 states and 69 transitions. Second operand 6 states. [2018-11-23 10:40:37,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:37,146 INFO L93 Difference]: Finished difference Result 101 states and 131 transitions. [2018-11-23 10:40:37,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:40:37,146 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-11-23 10:40:37,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:37,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:40:37,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 87 transitions. [2018-11-23 10:40:37,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:40:37,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 87 transitions. [2018-11-23 10:40:37,151 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 87 transitions. [2018-11-23 10:40:37,309 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:37,311 INFO L225 Difference]: With dead ends: 101 [2018-11-23 10:40:37,311 INFO L226 Difference]: Without dead ends: 57 [2018-11-23 10:40:37,312 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:40:37,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-11-23 10:40:37,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 56. [2018-11-23 10:40:37,354 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:37,354 INFO L82 GeneralOperation]: Start isEquivalent. First operand 57 states. Second operand 56 states. [2018-11-23 10:40:37,355 INFO L74 IsIncluded]: Start isIncluded. First operand 57 states. Second operand 56 states. [2018-11-23 10:40:37,355 INFO L87 Difference]: Start difference. First operand 57 states. Second operand 56 states. [2018-11-23 10:40:37,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:37,358 INFO L93 Difference]: Finished difference Result 57 states and 72 transitions. [2018-11-23 10:40:37,359 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 72 transitions. [2018-11-23 10:40:37,360 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:37,360 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:37,360 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand 57 states. [2018-11-23 10:40:37,360 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 57 states. [2018-11-23 10:40:37,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:37,363 INFO L93 Difference]: Finished difference Result 57 states and 72 transitions. [2018-11-23 10:40:37,363 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 72 transitions. [2018-11-23 10:40:37,364 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:37,364 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:37,365 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:37,365 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:37,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-11-23 10:40:37,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 71 transitions. [2018-11-23 10:40:37,368 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 71 transitions. Word has length 32 [2018-11-23 10:40:37,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:37,368 INFO L480 AbstractCegarLoop]: Abstraction has 56 states and 71 transitions. [2018-11-23 10:40:37,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:40:37,368 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 71 transitions. [2018-11-23 10:40:37,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-23 10:40:37,370 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:37,370 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:37,370 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:37,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:37,371 INFO L82 PathProgramCache]: Analyzing trace with hash 1564516527, now seen corresponding path program 2 times [2018-11-23 10:40:37,371 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:37,371 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:37,400 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:40:37,440 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 10:40:37,440 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:40:37,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:37,467 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:37,586 INFO L256 TraceCheckUtils]: 0: Hoare triple {1683#true} call ULTIMATE.init(); {1683#true} is VALID [2018-11-23 10:40:37,586 INFO L273 TraceCheckUtils]: 1: Hoare triple {1683#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1683#true} is VALID [2018-11-23 10:40:37,586 INFO L273 TraceCheckUtils]: 2: Hoare triple {1683#true} assume true; {1683#true} is VALID [2018-11-23 10:40:37,587 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1683#true} {1683#true} #153#return; {1683#true} is VALID [2018-11-23 10:40:37,587 INFO L256 TraceCheckUtils]: 4: Hoare triple {1683#true} call #t~ret19 := main(); {1683#true} is VALID [2018-11-23 10:40:37,587 INFO L273 TraceCheckUtils]: 5: Hoare triple {1683#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1683#true} is VALID [2018-11-23 10:40:37,588 INFO L273 TraceCheckUtils]: 6: Hoare triple {1683#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1706#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:37,589 INFO L273 TraceCheckUtils]: 7: Hoare triple {1706#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1706#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:37,589 INFO L273 TraceCheckUtils]: 8: Hoare triple {1706#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1706#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:37,590 INFO L273 TraceCheckUtils]: 9: Hoare triple {1706#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1706#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:37,591 INFO L273 TraceCheckUtils]: 10: Hoare triple {1706#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1706#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:37,591 INFO L273 TraceCheckUtils]: 11: Hoare triple {1706#(bvsgt ~SIZE~0 (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {1706#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:40:37,593 INFO L273 TraceCheckUtils]: 12: Hoare triple {1706#(bvsgt ~SIZE~0 (_ bv1 32))} ~i~0 := 0bv32; {1725#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:37,594 INFO L273 TraceCheckUtils]: 13: Hoare triple {1725#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,594 INFO L273 TraceCheckUtils]: 14: Hoare triple {1684#false} ~i~0 := 0bv32; {1684#false} is VALID [2018-11-23 10:40:37,595 INFO L273 TraceCheckUtils]: 15: Hoare triple {1684#false} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,595 INFO L273 TraceCheckUtils]: 16: Hoare triple {1684#false} ~i~0 := 0bv32; {1684#false} is VALID [2018-11-23 10:40:37,595 INFO L273 TraceCheckUtils]: 17: Hoare triple {1684#false} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,596 INFO L273 TraceCheckUtils]: 18: Hoare triple {1684#false} ~i~0 := 0bv32; {1684#false} is VALID [2018-11-23 10:40:37,596 INFO L273 TraceCheckUtils]: 19: Hoare triple {1684#false} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,596 INFO L273 TraceCheckUtils]: 20: Hoare triple {1684#false} ~i~0 := 0bv32; {1684#false} is VALID [2018-11-23 10:40:37,597 INFO L273 TraceCheckUtils]: 21: Hoare triple {1684#false} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,597 INFO L273 TraceCheckUtils]: 22: Hoare triple {1684#false} ~i~0 := 0bv32; {1684#false} is VALID [2018-11-23 10:40:37,597 INFO L273 TraceCheckUtils]: 23: Hoare triple {1684#false} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,597 INFO L273 TraceCheckUtils]: 24: Hoare triple {1684#false} ~i~0 := 0bv32; {1684#false} is VALID [2018-11-23 10:40:37,597 INFO L273 TraceCheckUtils]: 25: Hoare triple {1684#false} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,598 INFO L273 TraceCheckUtils]: 26: Hoare triple {1684#false} ~i~0 := 0bv32; {1684#false} is VALID [2018-11-23 10:40:37,598 INFO L273 TraceCheckUtils]: 27: Hoare triple {1684#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {1684#false} is VALID [2018-11-23 10:40:37,598 INFO L273 TraceCheckUtils]: 28: Hoare triple {1684#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1684#false} is VALID [2018-11-23 10:40:37,598 INFO L273 TraceCheckUtils]: 29: Hoare triple {1684#false} assume !~bvslt32(~i~0, ~SIZE~0); {1684#false} is VALID [2018-11-23 10:40:37,598 INFO L256 TraceCheckUtils]: 30: Hoare triple {1684#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1684#false} is VALID [2018-11-23 10:40:37,599 INFO L273 TraceCheckUtils]: 31: Hoare triple {1684#false} ~cond := #in~cond; {1684#false} is VALID [2018-11-23 10:40:37,599 INFO L273 TraceCheckUtils]: 32: Hoare triple {1684#false} assume 0bv32 == ~cond; {1684#false} is VALID [2018-11-23 10:40:37,599 INFO L273 TraceCheckUtils]: 33: Hoare triple {1684#false} assume !false; {1684#false} is VALID [2018-11-23 10:40:37,601 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:40:37,601 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:40:37,611 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:40:37,611 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:40:37,611 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-11-23 10:40:37,612 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:37,612 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:40:37,663 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:37,663 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:40:37,663 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:40:37,663 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:40:37,664 INFO L87 Difference]: Start difference. First operand 56 states and 71 transitions. Second operand 4 states. [2018-11-23 10:40:38,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:38,107 INFO L93 Difference]: Finished difference Result 96 states and 124 transitions. [2018-11-23 10:40:38,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:40:38,108 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-11-23 10:40:38,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:38,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:40:38,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 104 transitions. [2018-11-23 10:40:38,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:40:38,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 104 transitions. [2018-11-23 10:40:38,113 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 104 transitions. [2018-11-23 10:40:38,278 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:38,280 INFO L225 Difference]: With dead ends: 96 [2018-11-23 10:40:38,280 INFO L226 Difference]: Without dead ends: 57 [2018-11-23 10:40:38,281 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:40:38,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-11-23 10:40:38,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 49. [2018-11-23 10:40:38,334 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:38,334 INFO L82 GeneralOperation]: Start isEquivalent. First operand 57 states. Second operand 49 states. [2018-11-23 10:40:38,334 INFO L74 IsIncluded]: Start isIncluded. First operand 57 states. Second operand 49 states. [2018-11-23 10:40:38,334 INFO L87 Difference]: Start difference. First operand 57 states. Second operand 49 states. [2018-11-23 10:40:38,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:38,338 INFO L93 Difference]: Finished difference Result 57 states and 65 transitions. [2018-11-23 10:40:38,338 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 65 transitions. [2018-11-23 10:40:38,338 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:38,339 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:38,339 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand 57 states. [2018-11-23 10:40:38,339 INFO L87 Difference]: Start difference. First operand 49 states. Second operand 57 states. [2018-11-23 10:40:38,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:38,342 INFO L93 Difference]: Finished difference Result 57 states and 65 transitions. [2018-11-23 10:40:38,342 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 65 transitions. [2018-11-23 10:40:38,342 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:38,342 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:38,343 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:38,343 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:38,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-11-23 10:40:38,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 57 transitions. [2018-11-23 10:40:38,345 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 57 transitions. Word has length 34 [2018-11-23 10:40:38,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:38,346 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 57 transitions. [2018-11-23 10:40:38,346 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:40:38,346 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 57 transitions. [2018-11-23 10:40:38,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 10:40:38,347 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:38,347 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:38,347 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:38,348 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:38,348 INFO L82 PathProgramCache]: Analyzing trace with hash -1166217631, now seen corresponding path program 1 times [2018-11-23 10:40:38,348 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:38,349 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:38,379 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 10:40:38,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:38,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:40:38,480 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:38,838 INFO L256 TraceCheckUtils]: 0: Hoare triple {2113#true} call ULTIMATE.init(); {2113#true} is VALID [2018-11-23 10:40:38,839 INFO L273 TraceCheckUtils]: 1: Hoare triple {2113#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2113#true} is VALID [2018-11-23 10:40:38,839 INFO L273 TraceCheckUtils]: 2: Hoare triple {2113#true} assume true; {2113#true} is VALID [2018-11-23 10:40:38,840 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2113#true} {2113#true} #153#return; {2113#true} is VALID [2018-11-23 10:40:38,840 INFO L256 TraceCheckUtils]: 4: Hoare triple {2113#true} call #t~ret19 := main(); {2113#true} is VALID [2018-11-23 10:40:38,840 INFO L273 TraceCheckUtils]: 5: Hoare triple {2113#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2113#true} is VALID [2018-11-23 10:40:38,842 INFO L273 TraceCheckUtils]: 6: Hoare triple {2113#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {2136#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:38,843 INFO L273 TraceCheckUtils]: 7: Hoare triple {2136#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2136#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:38,847 INFO L273 TraceCheckUtils]: 8: Hoare triple {2136#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2143#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:38,848 INFO L273 TraceCheckUtils]: 9: Hoare triple {2143#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2143#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:38,849 INFO L273 TraceCheckUtils]: 10: Hoare triple {2143#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2150#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:40:38,849 INFO L273 TraceCheckUtils]: 11: Hoare triple {2150#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~i~0, ~SIZE~0); {2154#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:38,850 INFO L273 TraceCheckUtils]: 12: Hoare triple {2154#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~i~0 := 0bv32; {2158#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:38,851 INFO L273 TraceCheckUtils]: 13: Hoare triple {2158#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2158#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:40:38,853 INFO L273 TraceCheckUtils]: 14: Hoare triple {2158#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2165#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:38,854 INFO L273 TraceCheckUtils]: 15: Hoare triple {2165#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,854 INFO L273 TraceCheckUtils]: 16: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:38,855 INFO L273 TraceCheckUtils]: 17: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2114#false} is VALID [2018-11-23 10:40:38,855 INFO L273 TraceCheckUtils]: 18: Hoare triple {2114#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2114#false} is VALID [2018-11-23 10:40:38,856 INFO L273 TraceCheckUtils]: 19: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,856 INFO L273 TraceCheckUtils]: 20: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:38,856 INFO L273 TraceCheckUtils]: 21: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2114#false} is VALID [2018-11-23 10:40:38,857 INFO L273 TraceCheckUtils]: 22: Hoare triple {2114#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2114#false} is VALID [2018-11-23 10:40:38,857 INFO L273 TraceCheckUtils]: 23: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,857 INFO L273 TraceCheckUtils]: 24: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:38,858 INFO L273 TraceCheckUtils]: 25: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2114#false} is VALID [2018-11-23 10:40:38,858 INFO L273 TraceCheckUtils]: 26: Hoare triple {2114#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2114#false} is VALID [2018-11-23 10:40:38,858 INFO L273 TraceCheckUtils]: 27: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,859 INFO L273 TraceCheckUtils]: 28: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:38,859 INFO L273 TraceCheckUtils]: 29: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2114#false} is VALID [2018-11-23 10:40:38,859 INFO L273 TraceCheckUtils]: 30: Hoare triple {2114#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2114#false} is VALID [2018-11-23 10:40:38,859 INFO L273 TraceCheckUtils]: 31: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,860 INFO L273 TraceCheckUtils]: 32: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:38,860 INFO L273 TraceCheckUtils]: 33: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2114#false} is VALID [2018-11-23 10:40:38,860 INFO L273 TraceCheckUtils]: 34: Hoare triple {2114#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2114#false} is VALID [2018-11-23 10:40:38,861 INFO L273 TraceCheckUtils]: 35: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,861 INFO L273 TraceCheckUtils]: 36: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:38,861 INFO L273 TraceCheckUtils]: 37: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {2114#false} is VALID [2018-11-23 10:40:38,861 INFO L273 TraceCheckUtils]: 38: Hoare triple {2114#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2114#false} is VALID [2018-11-23 10:40:38,862 INFO L273 TraceCheckUtils]: 39: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,862 INFO L273 TraceCheckUtils]: 40: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:38,862 INFO L273 TraceCheckUtils]: 41: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {2114#false} is VALID [2018-11-23 10:40:38,862 INFO L273 TraceCheckUtils]: 42: Hoare triple {2114#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {2114#false} is VALID [2018-11-23 10:40:38,863 INFO L273 TraceCheckUtils]: 43: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:38,863 INFO L256 TraceCheckUtils]: 44: Hoare triple {2114#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {2114#false} is VALID [2018-11-23 10:40:38,863 INFO L273 TraceCheckUtils]: 45: Hoare triple {2114#false} ~cond := #in~cond; {2114#false} is VALID [2018-11-23 10:40:38,864 INFO L273 TraceCheckUtils]: 46: Hoare triple {2114#false} assume 0bv32 == ~cond; {2114#false} is VALID [2018-11-23 10:40:38,864 INFO L273 TraceCheckUtils]: 47: Hoare triple {2114#false} assume !false; {2114#false} is VALID [2018-11-23 10:40:38,871 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 10:40:38,871 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:40:39,220 INFO L273 TraceCheckUtils]: 47: Hoare triple {2114#false} assume !false; {2114#false} is VALID [2018-11-23 10:40:39,220 INFO L273 TraceCheckUtils]: 46: Hoare triple {2114#false} assume 0bv32 == ~cond; {2114#false} is VALID [2018-11-23 10:40:39,220 INFO L273 TraceCheckUtils]: 45: Hoare triple {2114#false} ~cond := #in~cond; {2114#false} is VALID [2018-11-23 10:40:39,221 INFO L256 TraceCheckUtils]: 44: Hoare triple {2114#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {2114#false} is VALID [2018-11-23 10:40:39,221 INFO L273 TraceCheckUtils]: 43: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,221 INFO L273 TraceCheckUtils]: 42: Hoare triple {2114#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {2114#false} is VALID [2018-11-23 10:40:39,221 INFO L273 TraceCheckUtils]: 41: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {2114#false} is VALID [2018-11-23 10:40:39,221 INFO L273 TraceCheckUtils]: 40: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:39,222 INFO L273 TraceCheckUtils]: 39: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,222 INFO L273 TraceCheckUtils]: 38: Hoare triple {2114#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2114#false} is VALID [2018-11-23 10:40:39,222 INFO L273 TraceCheckUtils]: 37: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {2114#false} is VALID [2018-11-23 10:40:39,222 INFO L273 TraceCheckUtils]: 36: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:39,222 INFO L273 TraceCheckUtils]: 35: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,223 INFO L273 TraceCheckUtils]: 34: Hoare triple {2114#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2114#false} is VALID [2018-11-23 10:40:39,223 INFO L273 TraceCheckUtils]: 33: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2114#false} is VALID [2018-11-23 10:40:39,223 INFO L273 TraceCheckUtils]: 32: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:39,223 INFO L273 TraceCheckUtils]: 31: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,224 INFO L273 TraceCheckUtils]: 30: Hoare triple {2114#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2114#false} is VALID [2018-11-23 10:40:39,224 INFO L273 TraceCheckUtils]: 29: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2114#false} is VALID [2018-11-23 10:40:39,224 INFO L273 TraceCheckUtils]: 28: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:39,224 INFO L273 TraceCheckUtils]: 27: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,224 INFO L273 TraceCheckUtils]: 26: Hoare triple {2114#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2114#false} is VALID [2018-11-23 10:40:39,225 INFO L273 TraceCheckUtils]: 25: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2114#false} is VALID [2018-11-23 10:40:39,225 INFO L273 TraceCheckUtils]: 24: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:39,225 INFO L273 TraceCheckUtils]: 23: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,226 INFO L273 TraceCheckUtils]: 22: Hoare triple {2114#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2114#false} is VALID [2018-11-23 10:40:39,226 INFO L273 TraceCheckUtils]: 21: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2114#false} is VALID [2018-11-23 10:40:39,226 INFO L273 TraceCheckUtils]: 20: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:39,226 INFO L273 TraceCheckUtils]: 19: Hoare triple {2114#false} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,227 INFO L273 TraceCheckUtils]: 18: Hoare triple {2114#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2114#false} is VALID [2018-11-23 10:40:39,227 INFO L273 TraceCheckUtils]: 17: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2114#false} is VALID [2018-11-23 10:40:39,227 INFO L273 TraceCheckUtils]: 16: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 10:40:39,229 INFO L273 TraceCheckUtils]: 15: Hoare triple {2361#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {2114#false} is VALID [2018-11-23 10:40:39,248 INFO L273 TraceCheckUtils]: 14: Hoare triple {2365#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2361#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:40:39,249 INFO L273 TraceCheckUtils]: 13: Hoare triple {2365#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2365#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:39,249 INFO L273 TraceCheckUtils]: 12: Hoare triple {2372#(bvslt (_ bv1 32) ~SIZE~0)} ~i~0 := 0bv32; {2365#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:40:39,250 INFO L273 TraceCheckUtils]: 11: Hoare triple {2376#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt main_~i~0 ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {2372#(bvslt (_ bv1 32) ~SIZE~0)} is VALID [2018-11-23 10:40:39,250 INFO L273 TraceCheckUtils]: 10: Hoare triple {2380#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2376#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-23 10:40:39,251 INFO L273 TraceCheckUtils]: 9: Hoare triple {2380#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2380#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:40:39,272 INFO L273 TraceCheckUtils]: 8: Hoare triple {2387#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2380#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:40:39,273 INFO L273 TraceCheckUtils]: 7: Hoare triple {2387#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2387#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} is VALID [2018-11-23 10:40:39,274 INFO L273 TraceCheckUtils]: 6: Hoare triple {2113#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {2387#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} is VALID [2018-11-23 10:40:39,274 INFO L273 TraceCheckUtils]: 5: Hoare triple {2113#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2113#true} is VALID [2018-11-23 10:40:39,274 INFO L256 TraceCheckUtils]: 4: Hoare triple {2113#true} call #t~ret19 := main(); {2113#true} is VALID [2018-11-23 10:40:39,275 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2113#true} {2113#true} #153#return; {2113#true} is VALID [2018-11-23 10:40:39,275 INFO L273 TraceCheckUtils]: 2: Hoare triple {2113#true} assume true; {2113#true} is VALID [2018-11-23 10:40:39,275 INFO L273 TraceCheckUtils]: 1: Hoare triple {2113#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2113#true} is VALID [2018-11-23 10:40:39,275 INFO L256 TraceCheckUtils]: 0: Hoare triple {2113#true} call ULTIMATE.init(); {2113#true} is VALID [2018-11-23 10:40:39,278 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 10:40:39,280 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:40:39,281 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-23 10:40:39,281 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 48 [2018-11-23 10:40:39,282 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:40:39,282 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 10:40:39,435 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:39,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 10:40:39,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 10:40:39,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-11-23 10:40:39,437 INFO L87 Difference]: Start difference. First operand 49 states and 57 transitions. Second operand 14 states. [2018-11-23 10:40:43,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:43,155 INFO L93 Difference]: Finished difference Result 180 states and 227 transitions. [2018-11-23 10:40:43,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 10:40:43,155 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 48 [2018-11-23 10:40:43,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:40:43,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:40:43,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 220 transitions. [2018-11-23 10:40:43,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:40:43,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 220 transitions. [2018-11-23 10:40:43,164 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 220 transitions. [2018-11-23 10:40:43,578 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 220 edges. 220 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:40:43,581 INFO L225 Difference]: With dead ends: 180 [2018-11-23 10:40:43,581 INFO L226 Difference]: Without dead ends: 145 [2018-11-23 10:40:43,582 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=92, Invalid=180, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:40:43,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-11-23 10:40:43,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 129. [2018-11-23 10:40:43,736 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:40:43,736 INFO L82 GeneralOperation]: Start isEquivalent. First operand 145 states. Second operand 129 states. [2018-11-23 10:40:43,736 INFO L74 IsIncluded]: Start isIncluded. First operand 145 states. Second operand 129 states. [2018-11-23 10:40:43,736 INFO L87 Difference]: Start difference. First operand 145 states. Second operand 129 states. [2018-11-23 10:40:43,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:43,741 INFO L93 Difference]: Finished difference Result 145 states and 161 transitions. [2018-11-23 10:40:43,742 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 161 transitions. [2018-11-23 10:40:43,742 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:43,742 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:43,742 INFO L74 IsIncluded]: Start isIncluded. First operand 129 states. Second operand 145 states. [2018-11-23 10:40:43,743 INFO L87 Difference]: Start difference. First operand 129 states. Second operand 145 states. [2018-11-23 10:40:43,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:40:43,748 INFO L93 Difference]: Finished difference Result 145 states and 161 transitions. [2018-11-23 10:40:43,748 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 161 transitions. [2018-11-23 10:40:43,748 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:40:43,748 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:40:43,749 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:40:43,749 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:40:43,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-23 10:40:43,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 145 transitions. [2018-11-23 10:40:43,753 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 145 transitions. Word has length 48 [2018-11-23 10:40:43,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:40:43,753 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 145 transitions. [2018-11-23 10:40:43,753 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 10:40:43,754 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 145 transitions. [2018-11-23 10:40:43,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-23 10:40:43,755 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:40:43,755 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:40:43,755 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:40:43,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:40:43,755 INFO L82 PathProgramCache]: Analyzing trace with hash -419525295, now seen corresponding path program 2 times [2018-11-23 10:40:43,756 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:40:43,756 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:40:43,786 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:40:43,978 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:40:43,979 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:40:46,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-23 10:40:46,046 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:40:46,958 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2018-11-23 10:40:46,967 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2018-11-23 10:40:46,976 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:40:46,982 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:40:46,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:40:46,989 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:9 [2018-11-23 10:40:47,108 INFO L256 TraceCheckUtils]: 0: Hoare triple {3169#true} call ULTIMATE.init(); {3169#true} is VALID [2018-11-23 10:40:47,109 INFO L273 TraceCheckUtils]: 1: Hoare triple {3169#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3169#true} is VALID [2018-11-23 10:40:47,109 INFO L273 TraceCheckUtils]: 2: Hoare triple {3169#true} assume true; {3169#true} is VALID [2018-11-23 10:40:47,109 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3169#true} {3169#true} #153#return; {3169#true} is VALID [2018-11-23 10:40:47,110 INFO L256 TraceCheckUtils]: 4: Hoare triple {3169#true} call #t~ret19 := main(); {3169#true} is VALID [2018-11-23 10:40:47,110 INFO L273 TraceCheckUtils]: 5: Hoare triple {3169#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3169#true} is VALID [2018-11-23 10:40:47,110 INFO L273 TraceCheckUtils]: 6: Hoare triple {3169#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,111 INFO L273 TraceCheckUtils]: 7: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,111 INFO L273 TraceCheckUtils]: 8: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,112 INFO L273 TraceCheckUtils]: 9: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,114 INFO L273 TraceCheckUtils]: 10: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,115 INFO L273 TraceCheckUtils]: 11: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,118 INFO L273 TraceCheckUtils]: 12: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,119 INFO L273 TraceCheckUtils]: 13: Hoare triple {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,120 INFO L273 TraceCheckUtils]: 14: Hoare triple {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:47,121 INFO L273 TraceCheckUtils]: 15: Hoare triple {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,122 INFO L273 TraceCheckUtils]: 16: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,122 INFO L273 TraceCheckUtils]: 17: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,123 INFO L273 TraceCheckUtils]: 18: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,476 INFO L273 TraceCheckUtils]: 19: Hoare triple {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,477 INFO L273 TraceCheckUtils]: 20: Hoare triple {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:47,490 INFO L273 TraceCheckUtils]: 21: Hoare triple {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,491 INFO L273 TraceCheckUtils]: 22: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,491 INFO L273 TraceCheckUtils]: 23: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,492 INFO L273 TraceCheckUtils]: 24: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,493 INFO L273 TraceCheckUtils]: 25: Hoare triple {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,493 INFO L273 TraceCheckUtils]: 26: Hoare triple {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:47,496 INFO L273 TraceCheckUtils]: 27: Hoare triple {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,496 INFO L273 TraceCheckUtils]: 28: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,497 INFO L273 TraceCheckUtils]: 29: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,498 INFO L273 TraceCheckUtils]: 30: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,820 INFO L273 TraceCheckUtils]: 31: Hoare triple {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,822 INFO L273 TraceCheckUtils]: 32: Hoare triple {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:47,833 INFO L273 TraceCheckUtils]: 33: Hoare triple {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,834 INFO L273 TraceCheckUtils]: 34: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,834 INFO L273 TraceCheckUtils]: 35: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,836 INFO L273 TraceCheckUtils]: 36: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,844 INFO L273 TraceCheckUtils]: 37: Hoare triple {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:47,849 INFO L273 TraceCheckUtils]: 38: Hoare triple {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:47,850 INFO L273 TraceCheckUtils]: 39: Hoare triple {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,852 INFO L273 TraceCheckUtils]: 40: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,852 INFO L273 TraceCheckUtils]: 41: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:47,854 INFO L273 TraceCheckUtils]: 42: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,187 INFO L273 TraceCheckUtils]: 43: Hoare triple {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,188 INFO L273 TraceCheckUtils]: 44: Hoare triple {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:48,199 INFO L273 TraceCheckUtils]: 45: Hoare triple {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,200 INFO L273 TraceCheckUtils]: 46: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,200 INFO L273 TraceCheckUtils]: 47: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,201 INFO L273 TraceCheckUtils]: 48: Hoare triple {3192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,201 INFO L273 TraceCheckUtils]: 49: Hoare triple {3211#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,202 INFO L273 TraceCheckUtils]: 50: Hoare triple {3215#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:48,204 INFO L273 TraceCheckUtils]: 51: Hoare triple {3219#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:48,205 INFO L273 TraceCheckUtils]: 52: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:48,205 INFO L273 TraceCheckUtils]: 53: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:40:48,206 INFO L273 TraceCheckUtils]: 54: Hoare triple {3223#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,271 INFO L273 TraceCheckUtils]: 55: Hoare triple {3233#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:40:48,272 INFO L273 TraceCheckUtils]: 56: Hoare triple {3237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:40:48,287 INFO L273 TraceCheckUtils]: 57: Hoare triple {3241#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3353#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:40:48,288 INFO L273 TraceCheckUtils]: 58: Hoare triple {3353#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3353#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:40:48,289 INFO L273 TraceCheckUtils]: 59: Hoare triple {3353#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} assume !~bvslt32(~i~0, ~SIZE~0); {3353#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:40:48,296 INFO L256 TraceCheckUtils]: 60: Hoare triple {3353#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {3363#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:48,297 INFO L273 TraceCheckUtils]: 61: Hoare triple {3363#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {3367#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:40:48,297 INFO L273 TraceCheckUtils]: 62: Hoare triple {3367#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {3170#false} is VALID [2018-11-23 10:40:48,297 INFO L273 TraceCheckUtils]: 63: Hoare triple {3170#false} assume !false; {3170#false} is VALID [2018-11-23 10:40:48,308 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:40:48,309 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:40:50,399 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2018-11-23 10:40:54,420 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:40:54,459 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:40:54,535 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 29 treesize of output 82 [2018-11-23 10:40:57,942 INFO L267 ElimStorePlain]: Start of recursive call 3: 13 dim-0 vars, End of recursive call: 13 dim-0 vars, and 16 xjuncts. [2018-11-23 10:40:58,025 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:40:58,044 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:40:58,044 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:21 [2018-11-23 10:40:58,068 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:40:58,068 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#a~0.base|]. (= (let ((.cse1 (bvmul (_ bv4 32) main_~i~0)) (.cse0 (select |#memory_int| |main_~#a~0.base|))) (bvadd (bvneg (select .cse0 |main_~#a~0.offset|)) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (select .cse0 (bvadd |main_~#a~0.offset| .cse1)) main_~sum~0 (bvneg (select .cse0 (bvadd |main_~#a~0.offset| (_ bv4 32)))))) (_ bv0 32)) [2018-11-23 10:40:58,069 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_prenex_9, v_prenex_10]. (and (= (_ bv0 32) (bvadd main_~sum~0 v_prenex_9 (bvneg v_prenex_9) v_prenex_10 (bvneg v_prenex_10))) (= (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd |main_~#a~0.offset| (_ bv4 32)))) [2018-11-23 10:40:58,262 INFO L273 TraceCheckUtils]: 63: Hoare triple {3170#false} assume !false; {3170#false} is VALID [2018-11-23 10:40:58,264 INFO L273 TraceCheckUtils]: 62: Hoare triple {3377#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {3170#false} is VALID [2018-11-23 10:40:58,264 INFO L273 TraceCheckUtils]: 61: Hoare triple {3381#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {3377#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:40:58,266 INFO L256 TraceCheckUtils]: 60: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {3381#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:40:58,266 INFO L273 TraceCheckUtils]: 59: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:58,266 INFO L273 TraceCheckUtils]: 58: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:58,268 INFO L273 TraceCheckUtils]: 57: Hoare triple {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:40:58,470 INFO L273 TraceCheckUtils]: 56: Hoare triple {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:40:58,526 INFO L273 TraceCheckUtils]: 55: Hoare triple {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:40:58,527 INFO L273 TraceCheckUtils]: 54: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:40:58,527 INFO L273 TraceCheckUtils]: 53: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:40:58,527 INFO L273 TraceCheckUtils]: 52: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:40:59,617 INFO L273 TraceCheckUtils]: 51: Hoare triple {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:01,625 INFO L273 TraceCheckUtils]: 50: Hoare triple {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:03,633 INFO L273 TraceCheckUtils]: 49: Hoare triple {3425#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:03,634 INFO L273 TraceCheckUtils]: 48: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {3425#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:03,634 INFO L273 TraceCheckUtils]: 47: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:03,634 INFO L273 TraceCheckUtils]: 46: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:03,635 INFO L273 TraceCheckUtils]: 45: Hoare triple {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:03,874 INFO L273 TraceCheckUtils]: 44: Hoare triple {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:03,947 INFO L273 TraceCheckUtils]: 43: Hoare triple {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:03,996 INFO L273 TraceCheckUtils]: 42: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:03,996 INFO L273 TraceCheckUtils]: 41: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:03,997 INFO L273 TraceCheckUtils]: 40: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:05,328 INFO L273 TraceCheckUtils]: 39: Hoare triple {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:07,333 INFO L273 TraceCheckUtils]: 38: Hoare triple {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:09,341 INFO L273 TraceCheckUtils]: 37: Hoare triple {3425#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:09,342 INFO L273 TraceCheckUtils]: 36: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {3425#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:09,350 INFO L273 TraceCheckUtils]: 35: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:09,351 INFO L273 TraceCheckUtils]: 34: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:09,351 INFO L273 TraceCheckUtils]: 33: Hoare triple {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:09,534 INFO L273 TraceCheckUtils]: 32: Hoare triple {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:09,602 INFO L273 TraceCheckUtils]: 31: Hoare triple {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:09,603 INFO L273 TraceCheckUtils]: 30: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:09,603 INFO L273 TraceCheckUtils]: 29: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:09,603 INFO L273 TraceCheckUtils]: 28: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:11,610 INFO L273 TraceCheckUtils]: 27: Hoare triple {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is UNKNOWN [2018-11-23 10:41:13,619 INFO L273 TraceCheckUtils]: 26: Hoare triple {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:15,624 INFO L273 TraceCheckUtils]: 25: Hoare triple {3425#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:15,629 INFO L273 TraceCheckUtils]: 24: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {3425#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:15,632 INFO L273 TraceCheckUtils]: 23: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:15,634 INFO L273 TraceCheckUtils]: 22: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:15,636 INFO L273 TraceCheckUtils]: 21: Hoare triple {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:15,843 INFO L273 TraceCheckUtils]: 20: Hoare triple {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3395#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:15,920 INFO L273 TraceCheckUtils]: 19: Hoare triple {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3399#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:15,921 INFO L273 TraceCheckUtils]: 18: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3403#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:15,921 INFO L273 TraceCheckUtils]: 17: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:15,922 INFO L273 TraceCheckUtils]: 16: Hoare triple {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:17,240 INFO L273 TraceCheckUtils]: 15: Hoare triple {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3407#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:19,250 INFO L273 TraceCheckUtils]: 14: Hoare triple {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3417#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:19,251 INFO L273 TraceCheckUtils]: 13: Hoare triple {3534#(and (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_10 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32))) (= (_ bv0 32) (bvadd v_prenex_10 main_~sum~0 v_prenex_9 (bvneg v_prenex_10) (bvneg v_prenex_9)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3421#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:19,252 INFO L273 TraceCheckUtils]: 12: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {3534#(and (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_10 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32))) (= (_ bv0 32) (bvadd v_prenex_10 main_~sum~0 v_prenex_9 (bvneg v_prenex_10) (bvneg v_prenex_9)))))} is VALID [2018-11-23 10:41:19,252 INFO L273 TraceCheckUtils]: 11: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:19,253 INFO L273 TraceCheckUtils]: 10: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:19,254 INFO L273 TraceCheckUtils]: 9: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:19,254 INFO L273 TraceCheckUtils]: 8: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:19,255 INFO L273 TraceCheckUtils]: 7: Hoare triple {3385#(= main_~sum~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:19,255 INFO L273 TraceCheckUtils]: 6: Hoare triple {3169#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {3385#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:19,256 INFO L273 TraceCheckUtils]: 5: Hoare triple {3169#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3169#true} is VALID [2018-11-23 10:41:19,256 INFO L256 TraceCheckUtils]: 4: Hoare triple {3169#true} call #t~ret19 := main(); {3169#true} is VALID [2018-11-23 10:41:19,256 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3169#true} {3169#true} #153#return; {3169#true} is VALID [2018-11-23 10:41:19,256 INFO L273 TraceCheckUtils]: 2: Hoare triple {3169#true} assume true; {3169#true} is VALID [2018-11-23 10:41:19,257 INFO L273 TraceCheckUtils]: 1: Hoare triple {3169#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3169#true} is VALID [2018-11-23 10:41:19,257 INFO L256 TraceCheckUtils]: 0: Hoare triple {3169#true} call ULTIMATE.init(); {3169#true} is VALID [2018-11-23 10:41:19,268 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:41:19,270 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:41:19,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 10:41:19,273 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 64 [2018-11-23 10:41:19,273 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:19,273 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 10:41:41,078 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 110 inductive. 0 not inductive. 7 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:41,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 10:41:41,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 10:41:41,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:41:41,079 INFO L87 Difference]: Start difference. First operand 129 states and 145 transitions. Second operand 24 states. [2018-11-23 10:41:49,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:49,582 INFO L93 Difference]: Finished difference Result 170 states and 185 transitions. [2018-11-23 10:41:49,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 10:41:49,582 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 64 [2018-11-23 10:41:49,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:49,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:41:49,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 100 transitions. [2018-11-23 10:41:49,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:41:49,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 100 transitions. [2018-11-23 10:41:49,587 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 100 transitions. [2018-11-23 10:41:50,283 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 100 edges. 100 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:50,287 INFO L225 Difference]: With dead ends: 170 [2018-11-23 10:41:50,287 INFO L226 Difference]: Without dead ends: 117 [2018-11-23 10:41:50,288 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 90 SyntacticMatches, 15 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=75, Invalid=525, Unknown=0, NotChecked=0, Total=600 [2018-11-23 10:41:50,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-11-23 10:41:50,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-11-23 10:41:50,369 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:50,369 INFO L82 GeneralOperation]: Start isEquivalent. First operand 117 states. Second operand 117 states. [2018-11-23 10:41:50,370 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand 117 states. [2018-11-23 10:41:50,370 INFO L87 Difference]: Start difference. First operand 117 states. Second operand 117 states. [2018-11-23 10:41:50,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:50,374 INFO L93 Difference]: Finished difference Result 117 states and 131 transitions. [2018-11-23 10:41:50,374 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 131 transitions. [2018-11-23 10:41:50,374 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:50,374 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:50,375 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand 117 states. [2018-11-23 10:41:50,375 INFO L87 Difference]: Start difference. First operand 117 states. Second operand 117 states. [2018-11-23 10:41:50,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:50,378 INFO L93 Difference]: Finished difference Result 117 states and 131 transitions. [2018-11-23 10:41:50,379 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 131 transitions. [2018-11-23 10:41:50,379 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:50,379 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:50,379 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:50,380 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:50,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-11-23 10:41:50,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 131 transitions. [2018-11-23 10:41:50,383 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 131 transitions. Word has length 64 [2018-11-23 10:41:50,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:50,383 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 131 transitions. [2018-11-23 10:41:50,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 10:41:50,384 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 131 transitions. [2018-11-23 10:41:50,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-23 10:41:50,385 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:50,385 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:50,385 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:50,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:50,385 INFO L82 PathProgramCache]: Analyzing trace with hash 197368845, now seen corresponding path program 3 times [2018-11-23 10:41:50,386 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:50,386 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:50,412 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:41:50,843 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:41:50,843 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:41:50,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:50,896 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:51,107 INFO L256 TraceCheckUtils]: 0: Hoare triple {4243#true} call ULTIMATE.init(); {4243#true} is VALID [2018-11-23 10:41:51,107 INFO L273 TraceCheckUtils]: 1: Hoare triple {4243#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {4243#true} is VALID [2018-11-23 10:41:51,107 INFO L273 TraceCheckUtils]: 2: Hoare triple {4243#true} assume true; {4243#true} is VALID [2018-11-23 10:41:51,107 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4243#true} {4243#true} #153#return; {4243#true} is VALID [2018-11-23 10:41:51,107 INFO L256 TraceCheckUtils]: 4: Hoare triple {4243#true} call #t~ret19 := main(); {4243#true} is VALID [2018-11-23 10:41:51,108 INFO L273 TraceCheckUtils]: 5: Hoare triple {4243#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {4243#true} is VALID [2018-11-23 10:41:51,108 INFO L273 TraceCheckUtils]: 6: Hoare triple {4243#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,108 INFO L273 TraceCheckUtils]: 7: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,109 INFO L273 TraceCheckUtils]: 8: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,109 INFO L273 TraceCheckUtils]: 9: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,109 INFO L273 TraceCheckUtils]: 10: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,110 INFO L273 TraceCheckUtils]: 11: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,110 INFO L273 TraceCheckUtils]: 12: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,110 INFO L273 TraceCheckUtils]: 13: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {4266#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:51,111 INFO L273 TraceCheckUtils]: 14: Hoare triple {4266#(bvsgt ~SIZE~0 (_ bv1 32))} ~i~0 := 0bv32; {4291#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:51,111 INFO L273 TraceCheckUtils]: 15: Hoare triple {4291#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4291#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:51,112 INFO L273 TraceCheckUtils]: 16: Hoare triple {4291#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4298#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:51,113 INFO L273 TraceCheckUtils]: 17: Hoare triple {4298#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4298#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:51,114 INFO L273 TraceCheckUtils]: 18: Hoare triple {4298#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4305#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:41:51,115 INFO L273 TraceCheckUtils]: 19: Hoare triple {4305#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,116 INFO L273 TraceCheckUtils]: 20: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,116 INFO L273 TraceCheckUtils]: 21: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,117 INFO L273 TraceCheckUtils]: 22: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,118 INFO L273 TraceCheckUtils]: 23: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,118 INFO L273 TraceCheckUtils]: 24: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,119 INFO L273 TraceCheckUtils]: 25: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,119 INFO L273 TraceCheckUtils]: 26: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,120 INFO L273 TraceCheckUtils]: 27: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,121 INFO L273 TraceCheckUtils]: 28: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,121 INFO L273 TraceCheckUtils]: 29: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,122 INFO L273 TraceCheckUtils]: 30: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,122 INFO L273 TraceCheckUtils]: 31: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,122 INFO L273 TraceCheckUtils]: 32: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,123 INFO L273 TraceCheckUtils]: 33: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,123 INFO L273 TraceCheckUtils]: 34: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {4355#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,124 INFO L273 TraceCheckUtils]: 35: Hoare triple {4355#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {4355#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,124 INFO L273 TraceCheckUtils]: 36: Hoare triple {4355#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4362#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:51,125 INFO L273 TraceCheckUtils]: 37: Hoare triple {4362#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {4362#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:51,125 INFO L273 TraceCheckUtils]: 38: Hoare triple {4362#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4369#(and (= (_ bv2 32) main_~i~0) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,126 INFO L273 TraceCheckUtils]: 39: Hoare triple {4369#(and (= (_ bv2 32) main_~i~0) (bvslt (_ bv2 32) ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,127 INFO L273 TraceCheckUtils]: 40: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,127 INFO L273 TraceCheckUtils]: 41: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4244#false} is VALID [2018-11-23 10:41:51,127 INFO L273 TraceCheckUtils]: 42: Hoare triple {4244#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4244#false} is VALID [2018-11-23 10:41:51,127 INFO L273 TraceCheckUtils]: 43: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4244#false} is VALID [2018-11-23 10:41:51,128 INFO L273 TraceCheckUtils]: 44: Hoare triple {4244#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4244#false} is VALID [2018-11-23 10:41:51,128 INFO L273 TraceCheckUtils]: 45: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,128 INFO L273 TraceCheckUtils]: 46: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,128 INFO L273 TraceCheckUtils]: 47: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {4244#false} is VALID [2018-11-23 10:41:51,129 INFO L273 TraceCheckUtils]: 48: Hoare triple {4244#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4244#false} is VALID [2018-11-23 10:41:51,129 INFO L273 TraceCheckUtils]: 49: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {4244#false} is VALID [2018-11-23 10:41:51,129 INFO L273 TraceCheckUtils]: 50: Hoare triple {4244#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4244#false} is VALID [2018-11-23 10:41:51,129 INFO L273 TraceCheckUtils]: 51: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,130 INFO L273 TraceCheckUtils]: 52: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,130 INFO L273 TraceCheckUtils]: 53: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {4244#false} is VALID [2018-11-23 10:41:51,130 INFO L273 TraceCheckUtils]: 54: Hoare triple {4244#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4244#false} is VALID [2018-11-23 10:41:51,130 INFO L273 TraceCheckUtils]: 55: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {4244#false} is VALID [2018-11-23 10:41:51,130 INFO L273 TraceCheckUtils]: 56: Hoare triple {4244#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4244#false} is VALID [2018-11-23 10:41:51,130 INFO L273 TraceCheckUtils]: 57: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,131 INFO L273 TraceCheckUtils]: 58: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,131 INFO L273 TraceCheckUtils]: 59: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {4244#false} is VALID [2018-11-23 10:41:51,131 INFO L273 TraceCheckUtils]: 60: Hoare triple {4244#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {4244#false} is VALID [2018-11-23 10:41:51,131 INFO L273 TraceCheckUtils]: 61: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {4244#false} is VALID [2018-11-23 10:41:51,131 INFO L273 TraceCheckUtils]: 62: Hoare triple {4244#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {4244#false} is VALID [2018-11-23 10:41:51,131 INFO L273 TraceCheckUtils]: 63: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,131 INFO L256 TraceCheckUtils]: 64: Hoare triple {4244#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {4244#false} is VALID [2018-11-23 10:41:51,132 INFO L273 TraceCheckUtils]: 65: Hoare triple {4244#false} ~cond := #in~cond; {4244#false} is VALID [2018-11-23 10:41:51,132 INFO L273 TraceCheckUtils]: 66: Hoare triple {4244#false} assume 0bv32 == ~cond; {4244#false} is VALID [2018-11-23 10:41:51,132 INFO L273 TraceCheckUtils]: 67: Hoare triple {4244#false} assume !false; {4244#false} is VALID [2018-11-23 10:41:51,135 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-23 10:41:51,135 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:41:51,362 INFO L273 TraceCheckUtils]: 67: Hoare triple {4244#false} assume !false; {4244#false} is VALID [2018-11-23 10:41:51,363 INFO L273 TraceCheckUtils]: 66: Hoare triple {4244#false} assume 0bv32 == ~cond; {4244#false} is VALID [2018-11-23 10:41:51,363 INFO L273 TraceCheckUtils]: 65: Hoare triple {4244#false} ~cond := #in~cond; {4244#false} is VALID [2018-11-23 10:41:51,363 INFO L256 TraceCheckUtils]: 64: Hoare triple {4244#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {4244#false} is VALID [2018-11-23 10:41:51,364 INFO L273 TraceCheckUtils]: 63: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,364 INFO L273 TraceCheckUtils]: 62: Hoare triple {4244#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {4244#false} is VALID [2018-11-23 10:41:51,364 INFO L273 TraceCheckUtils]: 61: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {4244#false} is VALID [2018-11-23 10:41:51,364 INFO L273 TraceCheckUtils]: 60: Hoare triple {4244#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {4244#false} is VALID [2018-11-23 10:41:51,364 INFO L273 TraceCheckUtils]: 59: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {4244#false} is VALID [2018-11-23 10:41:51,365 INFO L273 TraceCheckUtils]: 58: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,365 INFO L273 TraceCheckUtils]: 57: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,365 INFO L273 TraceCheckUtils]: 56: Hoare triple {4244#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4244#false} is VALID [2018-11-23 10:41:51,365 INFO L273 TraceCheckUtils]: 55: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {4244#false} is VALID [2018-11-23 10:41:51,365 INFO L273 TraceCheckUtils]: 54: Hoare triple {4244#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4244#false} is VALID [2018-11-23 10:41:51,365 INFO L273 TraceCheckUtils]: 53: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {4244#false} is VALID [2018-11-23 10:41:51,365 INFO L273 TraceCheckUtils]: 52: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,366 INFO L273 TraceCheckUtils]: 51: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,366 INFO L273 TraceCheckUtils]: 50: Hoare triple {4244#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4244#false} is VALID [2018-11-23 10:41:51,366 INFO L273 TraceCheckUtils]: 49: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {4244#false} is VALID [2018-11-23 10:41:51,366 INFO L273 TraceCheckUtils]: 48: Hoare triple {4244#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {4244#false} is VALID [2018-11-23 10:41:51,366 INFO L273 TraceCheckUtils]: 47: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {4244#false} is VALID [2018-11-23 10:41:51,366 INFO L273 TraceCheckUtils]: 46: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,366 INFO L273 TraceCheckUtils]: 45: Hoare triple {4244#false} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,367 INFO L273 TraceCheckUtils]: 44: Hoare triple {4244#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4244#false} is VALID [2018-11-23 10:41:51,367 INFO L273 TraceCheckUtils]: 43: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4244#false} is VALID [2018-11-23 10:41:51,367 INFO L273 TraceCheckUtils]: 42: Hoare triple {4244#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4244#false} is VALID [2018-11-23 10:41:51,367 INFO L273 TraceCheckUtils]: 41: Hoare triple {4244#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4244#false} is VALID [2018-11-23 10:41:51,367 INFO L273 TraceCheckUtils]: 40: Hoare triple {4244#false} ~i~0 := 0bv32; {4244#false} is VALID [2018-11-23 10:41:51,367 INFO L273 TraceCheckUtils]: 39: Hoare triple {4541#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {4244#false} is VALID [2018-11-23 10:41:51,369 INFO L273 TraceCheckUtils]: 38: Hoare triple {4545#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4541#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:41:51,369 INFO L273 TraceCheckUtils]: 37: Hoare triple {4545#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {4545#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:51,396 INFO L273 TraceCheckUtils]: 36: Hoare triple {4552#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {4545#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:51,397 INFO L273 TraceCheckUtils]: 35: Hoare triple {4552#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {4552#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:51,397 INFO L273 TraceCheckUtils]: 34: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {4552#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:51,397 INFO L273 TraceCheckUtils]: 33: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,398 INFO L273 TraceCheckUtils]: 32: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,412 INFO L273 TraceCheckUtils]: 31: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,413 INFO L273 TraceCheckUtils]: 30: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,417 INFO L273 TraceCheckUtils]: 29: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,417 INFO L273 TraceCheckUtils]: 28: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,418 INFO L273 TraceCheckUtils]: 27: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,418 INFO L273 TraceCheckUtils]: 26: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,418 INFO L273 TraceCheckUtils]: 25: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,419 INFO L273 TraceCheckUtils]: 24: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,419 INFO L273 TraceCheckUtils]: 23: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,419 INFO L273 TraceCheckUtils]: 22: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,420 INFO L273 TraceCheckUtils]: 21: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,420 INFO L273 TraceCheckUtils]: 20: Hoare triple {4309#(bvslt (_ bv2 32) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,420 INFO L273 TraceCheckUtils]: 19: Hoare triple {4604#(or (not (bvslt main_~i~0 ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4309#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:41:51,453 INFO L273 TraceCheckUtils]: 18: Hoare triple {4608#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4604#(or (not (bvslt main_~i~0 ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,454 INFO L273 TraceCheckUtils]: 17: Hoare triple {4608#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4608#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,477 INFO L273 TraceCheckUtils]: 16: Hoare triple {4615#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4608#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,478 INFO L273 TraceCheckUtils]: 15: Hoare triple {4615#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4615#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,478 INFO L273 TraceCheckUtils]: 14: Hoare triple {4243#true} ~i~0 := 0bv32; {4615#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:41:51,479 INFO L273 TraceCheckUtils]: 13: Hoare triple {4243#true} assume !~bvslt32(~i~0, ~SIZE~0); {4243#true} is VALID [2018-11-23 10:41:51,479 INFO L273 TraceCheckUtils]: 12: Hoare triple {4243#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4243#true} is VALID [2018-11-23 10:41:51,479 INFO L273 TraceCheckUtils]: 11: Hoare triple {4243#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4243#true} is VALID [2018-11-23 10:41:51,479 INFO L273 TraceCheckUtils]: 10: Hoare triple {4243#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4243#true} is VALID [2018-11-23 10:41:51,479 INFO L273 TraceCheckUtils]: 9: Hoare triple {4243#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4243#true} is VALID [2018-11-23 10:41:51,479 INFO L273 TraceCheckUtils]: 8: Hoare triple {4243#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4243#true} is VALID [2018-11-23 10:41:51,480 INFO L273 TraceCheckUtils]: 7: Hoare triple {4243#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4243#true} is VALID [2018-11-23 10:41:51,480 INFO L273 TraceCheckUtils]: 6: Hoare triple {4243#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {4243#true} is VALID [2018-11-23 10:41:51,480 INFO L273 TraceCheckUtils]: 5: Hoare triple {4243#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {4243#true} is VALID [2018-11-23 10:41:51,480 INFO L256 TraceCheckUtils]: 4: Hoare triple {4243#true} call #t~ret19 := main(); {4243#true} is VALID [2018-11-23 10:41:51,481 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4243#true} {4243#true} #153#return; {4243#true} is VALID [2018-11-23 10:41:51,481 INFO L273 TraceCheckUtils]: 2: Hoare triple {4243#true} assume true; {4243#true} is VALID [2018-11-23 10:41:51,481 INFO L273 TraceCheckUtils]: 1: Hoare triple {4243#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {4243#true} is VALID [2018-11-23 10:41:51,481 INFO L256 TraceCheckUtils]: 0: Hoare triple {4243#true} call ULTIMATE.init(); {4243#true} is VALID [2018-11-23 10:41:51,485 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (9)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 10:41:51,490 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:41:51,491 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 16 [2018-11-23 10:41:51,491 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 68 [2018-11-23 10:41:51,491 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:51,491 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:41:51,674 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:51,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:41:51,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:41:51,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=171, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:41:51,675 INFO L87 Difference]: Start difference. First operand 117 states and 131 transitions. Second operand 16 states. [2018-11-23 10:41:54,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:54,968 INFO L93 Difference]: Finished difference Result 133 states and 147 transitions. [2018-11-23 10:41:54,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 10:41:54,968 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 68 [2018-11-23 10:41:54,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:54,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:41:54,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 135 transitions. [2018-11-23 10:41:54,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:41:54,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 135 transitions. [2018-11-23 10:41:54,974 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 135 transitions. [2018-11-23 10:41:55,249 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:55,252 INFO L225 Difference]: With dead ends: 133 [2018-11-23 10:41:55,252 INFO L226 Difference]: Without dead ends: 92 [2018-11-23 10:41:55,253 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:41:55,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-11-23 10:41:55,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 83. [2018-11-23 10:41:55,715 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:55,715 INFO L82 GeneralOperation]: Start isEquivalent. First operand 92 states. Second operand 83 states. [2018-11-23 10:41:55,715 INFO L74 IsIncluded]: Start isIncluded. First operand 92 states. Second operand 83 states. [2018-11-23 10:41:55,716 INFO L87 Difference]: Start difference. First operand 92 states. Second operand 83 states. [2018-11-23 10:41:55,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:55,719 INFO L93 Difference]: Finished difference Result 92 states and 100 transitions. [2018-11-23 10:41:55,720 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 100 transitions. [2018-11-23 10:41:55,720 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:55,720 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:55,720 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand 92 states. [2018-11-23 10:41:55,720 INFO L87 Difference]: Start difference. First operand 83 states. Second operand 92 states. [2018-11-23 10:41:55,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:55,723 INFO L93 Difference]: Finished difference Result 92 states and 100 transitions. [2018-11-23 10:41:55,723 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 100 transitions. [2018-11-23 10:41:55,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:55,724 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:55,724 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:55,724 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:55,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-11-23 10:41:55,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 91 transitions. [2018-11-23 10:41:55,726 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 91 transitions. Word has length 68 [2018-11-23 10:41:55,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:55,727 INFO L480 AbstractCegarLoop]: Abstraction has 83 states and 91 transitions. [2018-11-23 10:41:55,727 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:41:55,727 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 91 transitions. [2018-11-23 10:41:55,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 10:41:55,728 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:55,728 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:55,728 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:55,729 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:55,729 INFO L82 PathProgramCache]: Analyzing trace with hash 1572932479, now seen corresponding path program 4 times [2018-11-23 10:41:55,729 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:55,729 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:55,757 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:41:56,059 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:41:56,059 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:41:58,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-23 10:41:58,165 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:59,616 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2018-11-23 10:41:59,629 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2018-11-23 10:41:59,641 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:59,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:59,657 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:59,658 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:12 [2018-11-23 10:42:00,008 INFO L256 TraceCheckUtils]: 0: Hoare triple {5173#true} call ULTIMATE.init(); {5173#true} is VALID [2018-11-23 10:42:00,008 INFO L273 TraceCheckUtils]: 1: Hoare triple {5173#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {5173#true} is VALID [2018-11-23 10:42:00,008 INFO L273 TraceCheckUtils]: 2: Hoare triple {5173#true} assume true; {5173#true} is VALID [2018-11-23 10:42:00,008 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5173#true} {5173#true} #153#return; {5173#true} is VALID [2018-11-23 10:42:00,009 INFO L256 TraceCheckUtils]: 4: Hoare triple {5173#true} call #t~ret19 := main(); {5173#true} is VALID [2018-11-23 10:42:00,009 INFO L273 TraceCheckUtils]: 5: Hoare triple {5173#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {5173#true} is VALID [2018-11-23 10:42:00,010 INFO L273 TraceCheckUtils]: 6: Hoare triple {5173#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,010 INFO L273 TraceCheckUtils]: 7: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,010 INFO L273 TraceCheckUtils]: 8: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,011 INFO L273 TraceCheckUtils]: 9: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,011 INFO L273 TraceCheckUtils]: 10: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,012 INFO L273 TraceCheckUtils]: 11: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,012 INFO L273 TraceCheckUtils]: 12: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,013 INFO L273 TraceCheckUtils]: 13: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,014 INFO L273 TraceCheckUtils]: 14: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,016 INFO L273 TraceCheckUtils]: 15: Hoare triple {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:00,017 INFO L273 TraceCheckUtils]: 16: Hoare triple {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:00,018 INFO L273 TraceCheckUtils]: 17: Hoare triple {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:00,104 INFO L273 TraceCheckUtils]: 18: Hoare triple {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:00,440 INFO L273 TraceCheckUtils]: 19: Hoare triple {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:00,441 INFO L273 TraceCheckUtils]: 20: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:00,442 INFO L273 TraceCheckUtils]: 21: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:00,442 INFO L273 TraceCheckUtils]: 22: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:02,447 INFO L273 TraceCheckUtils]: 23: Hoare triple {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is UNKNOWN [2018-11-23 10:42:02,448 INFO L273 TraceCheckUtils]: 24: Hoare triple {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:02,499 INFO L273 TraceCheckUtils]: 25: Hoare triple {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:02,501 INFO L273 TraceCheckUtils]: 26: Hoare triple {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:02,519 INFO L273 TraceCheckUtils]: 27: Hoare triple {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:02,519 INFO L273 TraceCheckUtils]: 28: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:02,520 INFO L273 TraceCheckUtils]: 29: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:02,520 INFO L273 TraceCheckUtils]: 30: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:02,521 INFO L273 TraceCheckUtils]: 31: Hoare triple {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:02,522 INFO L273 TraceCheckUtils]: 32: Hoare triple {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:02,523 INFO L273 TraceCheckUtils]: 33: Hoare triple {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:02,524 INFO L273 TraceCheckUtils]: 34: Hoare triple {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:02,821 INFO L273 TraceCheckUtils]: 35: Hoare triple {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:02,822 INFO L273 TraceCheckUtils]: 36: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:02,823 INFO L273 TraceCheckUtils]: 37: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:02,823 INFO L273 TraceCheckUtils]: 38: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:04,827 INFO L273 TraceCheckUtils]: 39: Hoare triple {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is UNKNOWN [2018-11-23 10:42:04,829 INFO L273 TraceCheckUtils]: 40: Hoare triple {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:04,879 INFO L273 TraceCheckUtils]: 41: Hoare triple {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:04,880 INFO L273 TraceCheckUtils]: 42: Hoare triple {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:04,897 INFO L273 TraceCheckUtils]: 43: Hoare triple {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:04,898 INFO L273 TraceCheckUtils]: 44: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:04,898 INFO L273 TraceCheckUtils]: 45: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:04,899 INFO L273 TraceCheckUtils]: 46: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:04,901 INFO L273 TraceCheckUtils]: 47: Hoare triple {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:04,902 INFO L273 TraceCheckUtils]: 48: Hoare triple {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:04,903 INFO L273 TraceCheckUtils]: 49: Hoare triple {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:04,904 INFO L273 TraceCheckUtils]: 50: Hoare triple {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:05,148 INFO L273 TraceCheckUtils]: 51: Hoare triple {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:05,149 INFO L273 TraceCheckUtils]: 52: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:05,150 INFO L273 TraceCheckUtils]: 53: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:05,150 INFO L273 TraceCheckUtils]: 54: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:05,560 INFO L273 TraceCheckUtils]: 55: Hoare triple {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:42:05,562 INFO L273 TraceCheckUtils]: 56: Hoare triple {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:05,620 INFO L273 TraceCheckUtils]: 57: Hoare triple {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:05,621 INFO L273 TraceCheckUtils]: 58: Hoare triple {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:05,637 INFO L273 TraceCheckUtils]: 59: Hoare triple {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:05,638 INFO L273 TraceCheckUtils]: 60: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:05,639 INFO L273 TraceCheckUtils]: 61: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:05,639 INFO L273 TraceCheckUtils]: 62: Hoare triple {5196#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:05,640 INFO L273 TraceCheckUtils]: 63: Hoare triple {5221#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:05,640 INFO L273 TraceCheckUtils]: 64: Hoare triple {5225#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:05,641 INFO L273 TraceCheckUtils]: 65: Hoare triple {5229#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:05,675 INFO L273 TraceCheckUtils]: 66: Hoare triple {5233#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:05,882 INFO L273 TraceCheckUtils]: 67: Hoare triple {5237#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:05,883 INFO L273 TraceCheckUtils]: 68: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:05,884 INFO L273 TraceCheckUtils]: 69: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:05,884 INFO L273 TraceCheckUtils]: 70: Hoare triple {5241#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:05,954 INFO L273 TraceCheckUtils]: 71: Hoare triple {5251#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:42:05,956 INFO L273 TraceCheckUtils]: 72: Hoare triple {5255#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:06,046 INFO L273 TraceCheckUtils]: 73: Hoare triple {5259#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:06,047 INFO L273 TraceCheckUtils]: 74: Hoare triple {5263#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:06,065 INFO L273 TraceCheckUtils]: 75: Hoare triple {5267#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {5415#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:42:06,066 INFO L273 TraceCheckUtils]: 76: Hoare triple {5415#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5415#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:42:06,066 INFO L273 TraceCheckUtils]: 77: Hoare triple {5415#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} assume !~bvslt32(~i~0, ~SIZE~0); {5415#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:42:06,067 INFO L256 TraceCheckUtils]: 78: Hoare triple {5415#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {5425#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:42:06,068 INFO L273 TraceCheckUtils]: 79: Hoare triple {5425#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {5429#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:42:06,068 INFO L273 TraceCheckUtils]: 80: Hoare triple {5429#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {5174#false} is VALID [2018-11-23 10:42:06,069 INFO L273 TraceCheckUtils]: 81: Hoare triple {5174#false} assume !false; {5174#false} is VALID [2018-11-23 10:42:06,092 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 10:42:06,093 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:42:11,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 43 [2018-11-23 10:42:15,617 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:15,618 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:15,750 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:15,784 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:15,785 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:15,786 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:42:15,859 INFO L303 Elim1Store]: Index analysis took 248 ms [2018-11-23 10:42:15,996 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 9 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 9 case distinctions, treesize of input 43 treesize of output 194 [2018-11-23 10:42:15,997 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 9