java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-crafted/zero_sum_const5_true-unreach-call.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:40:59,064 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:40:59,066 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:40:59,077 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:40:59,078 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:40:59,079 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:40:59,080 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:40:59,083 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:40:59,085 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:40:59,086 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:40:59,087 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:40:59,087 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:40:59,088 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:40:59,089 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:40:59,090 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:40:59,091 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:40:59,092 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:40:59,094 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:40:59,096 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:40:59,097 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:40:59,098 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:40:59,100 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:40:59,102 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:40:59,102 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:40:59,103 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:40:59,104 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:40:59,105 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:40:59,105 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:40:59,106 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:40:59,111 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:40:59,111 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:40:59,112 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:40:59,112 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:40:59,112 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:40:59,113 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:40:59,117 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:40:59,118 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:40:59,133 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:40:59,133 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:40:59,134 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:40:59,134 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:40:59,135 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:40:59,135 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:40:59,135 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:40:59,135 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:40:59,136 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:40:59,136 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:40:59,136 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:40:59,136 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:40:59,136 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:40:59,136 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:40:59,137 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:40:59,137 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:40:59,137 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:40:59,137 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:40:59,137 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:40:59,138 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:40:59,138 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:40:59,138 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:40:59,138 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:40:59,138 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:40:59,139 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:40:59,139 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:40:59,139 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:40:59,139 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:40:59,139 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:40:59,140 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:40:59,140 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:40:59,140 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:40:59,140 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:40:59,184 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:40:59,202 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:40:59,205 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:40:59,206 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:40:59,206 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:40:59,207 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/zero_sum_const5_true-unreach-call.c [2018-11-23 10:40:59,267 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8b99e99f7/0b32e3a2075a48a1990a8a34f1320389/FLAGf78f6e195 [2018-11-23 10:40:59,729 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:40:59,730 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/zero_sum_const5_true-unreach-call.c [2018-11-23 10:40:59,737 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8b99e99f7/0b32e3a2075a48a1990a8a34f1320389/FLAGf78f6e195 [2018-11-23 10:41:00,081 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8b99e99f7/0b32e3a2075a48a1990a8a34f1320389 [2018-11-23 10:41:00,091 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:41:00,092 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:41:00,093 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:41:00,094 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:41:00,097 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:41:00,099 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,102 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12e7d257 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00, skipping insertion in model container [2018-11-23 10:41:00,102 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,113 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:41:00,143 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:41:00,418 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:41:00,423 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:41:00,473 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:41:00,504 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:41:00,504 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00 WrapperNode [2018-11-23 10:41:00,505 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:41:00,506 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:41:00,506 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:41:00,506 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:41:00,516 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,527 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,534 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:41:00,534 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:41:00,534 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:41:00,534 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:41:00,543 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,543 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,547 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,547 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,567 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,586 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,588 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... [2018-11-23 10:41:00,597 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:41:00,597 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:41:00,597 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:41:00,597 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:41:00,599 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:41:00,717 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:41:00,717 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:41:00,717 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:41:00,717 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:41:00,718 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:41:00,718 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:41:00,718 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:41:00,718 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:41:00,718 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:41:00,718 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:41:00,718 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:41:00,719 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:41:01,825 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:41:01,825 INFO L280 CfgBuilder]: Removed 11 assue(true) statements. [2018-11-23 10:41:01,826 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:41:01 BoogieIcfgContainer [2018-11-23 10:41:01,826 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:41:01,827 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:41:01,827 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:41:01,831 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:41:01,831 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:41:00" (1/3) ... [2018-11-23 10:41:01,832 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e0d5ca4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:41:01, skipping insertion in model container [2018-11-23 10:41:01,832 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:41:00" (2/3) ... [2018-11-23 10:41:01,833 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e0d5ca4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:41:01, skipping insertion in model container [2018-11-23 10:41:01,833 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:41:01" (3/3) ... [2018-11-23 10:41:01,835 INFO L112 eAbstractionObserver]: Analyzing ICFG zero_sum_const5_true-unreach-call.c [2018-11-23 10:41:01,843 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:41:01,852 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:41:01,870 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:41:01,904 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:41:01,905 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:41:01,905 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:41:01,906 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:41:01,906 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:41:01,906 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:41:01,906 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:41:01,906 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:41:01,907 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:41:01,926 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2018-11-23 10:41:01,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:41:01,933 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:01,934 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:01,936 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:01,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:01,942 INFO L82 PathProgramCache]: Analyzing trace with hash -298961335, now seen corresponding path program 1 times [2018-11-23 10:41:01,947 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:01,947 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:01,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:41:02,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:02,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:02,066 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:02,248 INFO L256 TraceCheckUtils]: 0: Hoare triple {55#true} call ULTIMATE.init(); {55#true} is VALID [2018-11-23 10:41:02,252 INFO L273 TraceCheckUtils]: 1: Hoare triple {55#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {55#true} is VALID [2018-11-23 10:41:02,253 INFO L273 TraceCheckUtils]: 2: Hoare triple {55#true} assume true; {55#true} is VALID [2018-11-23 10:41:02,253 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {55#true} {55#true} #181#return; {55#true} is VALID [2018-11-23 10:41:02,253 INFO L256 TraceCheckUtils]: 4: Hoare triple {55#true} call #t~ret23 := main(); {55#true} is VALID [2018-11-23 10:41:02,253 INFO L273 TraceCheckUtils]: 5: Hoare triple {55#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {55#true} is VALID [2018-11-23 10:41:02,254 INFO L273 TraceCheckUtils]: 6: Hoare triple {55#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {55#true} is VALID [2018-11-23 10:41:02,255 INFO L273 TraceCheckUtils]: 7: Hoare triple {55#true} assume !true; {56#false} is VALID [2018-11-23 10:41:02,255 INFO L273 TraceCheckUtils]: 8: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,255 INFO L273 TraceCheckUtils]: 9: Hoare triple {56#false} assume !true; {56#false} is VALID [2018-11-23 10:41:02,255 INFO L273 TraceCheckUtils]: 10: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,256 INFO L273 TraceCheckUtils]: 11: Hoare triple {56#false} assume !true; {56#false} is VALID [2018-11-23 10:41:02,256 INFO L273 TraceCheckUtils]: 12: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,256 INFO L273 TraceCheckUtils]: 13: Hoare triple {56#false} assume !~bvslt32(~i~0, ~SIZE~0); {56#false} is VALID [2018-11-23 10:41:02,256 INFO L273 TraceCheckUtils]: 14: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,259 INFO L273 TraceCheckUtils]: 15: Hoare triple {56#false} assume !~bvslt32(~i~0, ~SIZE~0); {56#false} is VALID [2018-11-23 10:41:02,259 INFO L273 TraceCheckUtils]: 16: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,260 INFO L273 TraceCheckUtils]: 17: Hoare triple {56#false} assume !~bvslt32(~i~0, ~SIZE~0); {56#false} is VALID [2018-11-23 10:41:02,260 INFO L273 TraceCheckUtils]: 18: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,261 INFO L273 TraceCheckUtils]: 19: Hoare triple {56#false} assume !~bvslt32(~i~0, ~SIZE~0); {56#false} is VALID [2018-11-23 10:41:02,261 INFO L273 TraceCheckUtils]: 20: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,261 INFO L273 TraceCheckUtils]: 21: Hoare triple {56#false} assume !~bvslt32(~i~0, ~SIZE~0); {56#false} is VALID [2018-11-23 10:41:02,262 INFO L273 TraceCheckUtils]: 22: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,262 INFO L273 TraceCheckUtils]: 23: Hoare triple {56#false} assume !true; {56#false} is VALID [2018-11-23 10:41:02,262 INFO L273 TraceCheckUtils]: 24: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,263 INFO L273 TraceCheckUtils]: 25: Hoare triple {56#false} assume !true; {56#false} is VALID [2018-11-23 10:41:02,263 INFO L273 TraceCheckUtils]: 26: Hoare triple {56#false} ~i~0 := 0bv32; {56#false} is VALID [2018-11-23 10:41:02,264 INFO L273 TraceCheckUtils]: 27: Hoare triple {56#false} assume !true; {56#false} is VALID [2018-11-23 10:41:02,264 INFO L256 TraceCheckUtils]: 28: Hoare triple {56#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {56#false} is VALID [2018-11-23 10:41:02,264 INFO L273 TraceCheckUtils]: 29: Hoare triple {56#false} ~cond := #in~cond; {56#false} is VALID [2018-11-23 10:41:02,265 INFO L273 TraceCheckUtils]: 30: Hoare triple {56#false} assume 0bv32 == ~cond; {56#false} is VALID [2018-11-23 10:41:02,265 INFO L273 TraceCheckUtils]: 31: Hoare triple {56#false} assume !false; {56#false} is VALID [2018-11-23 10:41:02,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:41:02,272 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:41:02,282 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:41:02,282 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:41:02,288 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 32 [2018-11-23 10:41:02,292 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:02,296 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:41:02,384 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:02,384 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:41:02,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:41:02,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:41:02,395 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 2 states. [2018-11-23 10:41:02,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:02,601 INFO L93 Difference]: Finished difference Result 95 states and 139 transitions. [2018-11-23 10:41:02,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:41:02,602 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 32 [2018-11-23 10:41:02,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:02,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:41:02,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 139 transitions. [2018-11-23 10:41:02,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:41:02,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 139 transitions. [2018-11-23 10:41:02,630 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 139 transitions. [2018-11-23 10:41:03,547 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:03,561 INFO L225 Difference]: With dead ends: 95 [2018-11-23 10:41:03,561 INFO L226 Difference]: Without dead ends: 44 [2018-11-23 10:41:03,565 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:41:03,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-11-23 10:41:03,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-11-23 10:41:03,626 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:03,627 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand 44 states. [2018-11-23 10:41:03,627 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 44 states. [2018-11-23 10:41:03,627 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 44 states. [2018-11-23 10:41:03,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:03,632 INFO L93 Difference]: Finished difference Result 44 states and 54 transitions. [2018-11-23 10:41:03,632 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 54 transitions. [2018-11-23 10:41:03,633 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:03,634 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:03,634 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 44 states. [2018-11-23 10:41:03,634 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 44 states. [2018-11-23 10:41:03,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:03,639 INFO L93 Difference]: Finished difference Result 44 states and 54 transitions. [2018-11-23 10:41:03,639 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 54 transitions. [2018-11-23 10:41:03,640 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:03,640 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:03,640 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:03,641 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:03,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-23 10:41:03,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 54 transitions. [2018-11-23 10:41:03,646 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 54 transitions. Word has length 32 [2018-11-23 10:41:03,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:03,646 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 54 transitions. [2018-11-23 10:41:03,646 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:41:03,647 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 54 transitions. [2018-11-23 10:41:03,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:41:03,648 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:03,648 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:03,649 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:03,649 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:03,649 INFO L82 PathProgramCache]: Analyzing trace with hash 351831333, now seen corresponding path program 1 times [2018-11-23 10:41:03,650 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:03,650 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:03,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:41:03,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:03,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:03,714 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:03,996 INFO L256 TraceCheckUtils]: 0: Hoare triple {425#true} call ULTIMATE.init(); {425#true} is VALID [2018-11-23 10:41:03,996 INFO L273 TraceCheckUtils]: 1: Hoare triple {425#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {425#true} is VALID [2018-11-23 10:41:03,996 INFO L273 TraceCheckUtils]: 2: Hoare triple {425#true} assume true; {425#true} is VALID [2018-11-23 10:41:03,997 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {425#true} {425#true} #181#return; {425#true} is VALID [2018-11-23 10:41:03,997 INFO L256 TraceCheckUtils]: 4: Hoare triple {425#true} call #t~ret23 := main(); {425#true} is VALID [2018-11-23 10:41:03,997 INFO L273 TraceCheckUtils]: 5: Hoare triple {425#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {425#true} is VALID [2018-11-23 10:41:04,010 INFO L273 TraceCheckUtils]: 6: Hoare triple {425#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,023 INFO L273 TraceCheckUtils]: 7: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,030 INFO L273 TraceCheckUtils]: 8: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,032 INFO L273 TraceCheckUtils]: 9: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,032 INFO L273 TraceCheckUtils]: 10: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,036 INFO L273 TraceCheckUtils]: 11: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,036 INFO L273 TraceCheckUtils]: 12: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,038 INFO L273 TraceCheckUtils]: 13: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,040 INFO L273 TraceCheckUtils]: 14: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,040 INFO L273 TraceCheckUtils]: 15: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,042 INFO L273 TraceCheckUtils]: 16: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,043 INFO L273 TraceCheckUtils]: 17: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,044 INFO L273 TraceCheckUtils]: 18: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,048 INFO L273 TraceCheckUtils]: 19: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,049 INFO L273 TraceCheckUtils]: 20: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,049 INFO L273 TraceCheckUtils]: 21: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,050 INFO L273 TraceCheckUtils]: 22: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,050 INFO L273 TraceCheckUtils]: 23: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,051 INFO L273 TraceCheckUtils]: 24: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,051 INFO L273 TraceCheckUtils]: 25: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,052 INFO L273 TraceCheckUtils]: 26: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,053 INFO L273 TraceCheckUtils]: 27: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {448#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:04,054 INFO L256 TraceCheckUtils]: 28: Hoare triple {448#(= main_~sum~0 (_ bv0 32))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {515#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:41:04,055 INFO L273 TraceCheckUtils]: 29: Hoare triple {515#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {519#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:41:04,058 INFO L273 TraceCheckUtils]: 30: Hoare triple {519#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {426#false} is VALID [2018-11-23 10:41:04,059 INFO L273 TraceCheckUtils]: 31: Hoare triple {426#false} assume !false; {426#false} is VALID [2018-11-23 10:41:04,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:41:04,061 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:41:04,063 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:41:04,063 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:41:04,065 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-11-23 10:41:04,065 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:04,065 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:41:04,122 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:04,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:41:04,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:41:04,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:41:04,124 INFO L87 Difference]: Start difference. First operand 44 states and 54 transitions. Second operand 5 states. [2018-11-23 10:41:04,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:04,846 INFO L93 Difference]: Finished difference Result 68 states and 87 transitions. [2018-11-23 10:41:04,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:41:04,846 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-11-23 10:41:04,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:04,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:41:04,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 87 transitions. [2018-11-23 10:41:04,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:41:04,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 87 transitions. [2018-11-23 10:41:04,853 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 87 transitions. [2018-11-23 10:41:05,068 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:05,073 INFO L225 Difference]: With dead ends: 68 [2018-11-23 10:41:05,073 INFO L226 Difference]: Without dead ends: 63 [2018-11-23 10:41:05,074 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:41:05,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-11-23 10:41:05,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-11-23 10:41:05,131 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:05,131 INFO L82 GeneralOperation]: Start isEquivalent. First operand 63 states. Second operand 63 states. [2018-11-23 10:41:05,131 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand 63 states. [2018-11-23 10:41:05,131 INFO L87 Difference]: Start difference. First operand 63 states. Second operand 63 states. [2018-11-23 10:41:05,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:05,136 INFO L93 Difference]: Finished difference Result 63 states and 82 transitions. [2018-11-23 10:41:05,136 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 82 transitions. [2018-11-23 10:41:05,137 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:05,137 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:05,137 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand 63 states. [2018-11-23 10:41:05,137 INFO L87 Difference]: Start difference. First operand 63 states. Second operand 63 states. [2018-11-23 10:41:05,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:05,142 INFO L93 Difference]: Finished difference Result 63 states and 82 transitions. [2018-11-23 10:41:05,142 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 82 transitions. [2018-11-23 10:41:05,143 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:05,143 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:05,143 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:05,143 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:05,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-11-23 10:41:05,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 82 transitions. [2018-11-23 10:41:05,147 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 82 transitions. Word has length 32 [2018-11-23 10:41:05,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:05,148 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 82 transitions. [2018-11-23 10:41:05,148 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:41:05,148 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 82 transitions. [2018-11-23 10:41:05,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-23 10:41:05,150 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:05,150 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:05,150 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:05,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:05,151 INFO L82 PathProgramCache]: Analyzing trace with hash 615337315, now seen corresponding path program 1 times [2018-11-23 10:41:05,151 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:05,151 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:05,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:41:05,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:05,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:05,231 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:05,336 INFO L256 TraceCheckUtils]: 0: Hoare triple {840#true} call ULTIMATE.init(); {840#true} is VALID [2018-11-23 10:41:05,337 INFO L273 TraceCheckUtils]: 1: Hoare triple {840#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {840#true} is VALID [2018-11-23 10:41:05,337 INFO L273 TraceCheckUtils]: 2: Hoare triple {840#true} assume true; {840#true} is VALID [2018-11-23 10:41:05,337 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {840#true} {840#true} #181#return; {840#true} is VALID [2018-11-23 10:41:05,338 INFO L256 TraceCheckUtils]: 4: Hoare triple {840#true} call #t~ret23 := main(); {840#true} is VALID [2018-11-23 10:41:05,338 INFO L273 TraceCheckUtils]: 5: Hoare triple {840#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {840#true} is VALID [2018-11-23 10:41:05,342 INFO L273 TraceCheckUtils]: 6: Hoare triple {840#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {863#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:05,345 INFO L273 TraceCheckUtils]: 7: Hoare triple {863#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,346 INFO L273 TraceCheckUtils]: 8: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,346 INFO L273 TraceCheckUtils]: 9: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,346 INFO L273 TraceCheckUtils]: 10: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,347 INFO L273 TraceCheckUtils]: 11: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,347 INFO L273 TraceCheckUtils]: 12: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,348 INFO L273 TraceCheckUtils]: 13: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,348 INFO L273 TraceCheckUtils]: 14: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,348 INFO L273 TraceCheckUtils]: 15: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,348 INFO L273 TraceCheckUtils]: 16: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,349 INFO L273 TraceCheckUtils]: 17: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,349 INFO L273 TraceCheckUtils]: 18: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,349 INFO L273 TraceCheckUtils]: 19: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,350 INFO L273 TraceCheckUtils]: 20: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,350 INFO L273 TraceCheckUtils]: 21: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,350 INFO L273 TraceCheckUtils]: 22: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,351 INFO L273 TraceCheckUtils]: 23: Hoare triple {841#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {841#false} is VALID [2018-11-23 10:41:05,351 INFO L273 TraceCheckUtils]: 24: Hoare triple {841#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {841#false} is VALID [2018-11-23 10:41:05,351 INFO L273 TraceCheckUtils]: 25: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,352 INFO L273 TraceCheckUtils]: 26: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,352 INFO L273 TraceCheckUtils]: 27: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,352 INFO L273 TraceCheckUtils]: 28: Hoare triple {841#false} ~i~0 := 0bv32; {841#false} is VALID [2018-11-23 10:41:05,353 INFO L273 TraceCheckUtils]: 29: Hoare triple {841#false} assume !~bvslt32(~i~0, ~SIZE~0); {841#false} is VALID [2018-11-23 10:41:05,353 INFO L256 TraceCheckUtils]: 30: Hoare triple {841#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {841#false} is VALID [2018-11-23 10:41:05,353 INFO L273 TraceCheckUtils]: 31: Hoare triple {841#false} ~cond := #in~cond; {841#false} is VALID [2018-11-23 10:41:05,354 INFO L273 TraceCheckUtils]: 32: Hoare triple {841#false} assume 0bv32 == ~cond; {841#false} is VALID [2018-11-23 10:41:05,354 INFO L273 TraceCheckUtils]: 33: Hoare triple {841#false} assume !false; {841#false} is VALID [2018-11-23 10:41:05,357 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:41:05,357 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:41:05,360 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:41:05,361 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:41:05,361 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-11-23 10:41:05,362 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:05,362 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:41:05,413 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:05,414 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:41:05,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:41:05,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:41:05,415 INFO L87 Difference]: Start difference. First operand 63 states and 82 transitions. Second operand 3 states. [2018-11-23 10:41:05,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:05,832 INFO L93 Difference]: Finished difference Result 119 states and 157 transitions. [2018-11-23 10:41:05,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:41:05,832 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-11-23 10:41:05,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:05,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:41:05,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 101 transitions. [2018-11-23 10:41:05,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:41:05,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 101 transitions. [2018-11-23 10:41:05,838 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 101 transitions. [2018-11-23 10:41:06,222 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:06,226 INFO L225 Difference]: With dead ends: 119 [2018-11-23 10:41:06,226 INFO L226 Difference]: Without dead ends: 65 [2018-11-23 10:41:06,227 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:41:06,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-11-23 10:41:06,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 64. [2018-11-23 10:41:06,266 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:06,266 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand 64 states. [2018-11-23 10:41:06,266 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand 64 states. [2018-11-23 10:41:06,266 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 64 states. [2018-11-23 10:41:06,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:06,271 INFO L93 Difference]: Finished difference Result 65 states and 84 transitions. [2018-11-23 10:41:06,271 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 84 transitions. [2018-11-23 10:41:06,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:06,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:06,272 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand 65 states. [2018-11-23 10:41:06,272 INFO L87 Difference]: Start difference. First operand 64 states. Second operand 65 states. [2018-11-23 10:41:06,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:06,276 INFO L93 Difference]: Finished difference Result 65 states and 84 transitions. [2018-11-23 10:41:06,276 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 84 transitions. [2018-11-23 10:41:06,276 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:06,277 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:06,277 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:06,277 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:06,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-11-23 10:41:06,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 83 transitions. [2018-11-23 10:41:06,283 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 83 transitions. Word has length 34 [2018-11-23 10:41:06,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:06,284 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 83 transitions. [2018-11-23 10:41:06,284 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:41:06,284 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 83 transitions. [2018-11-23 10:41:06,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-23 10:41:06,286 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:06,287 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:06,287 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:06,287 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:06,287 INFO L82 PathProgramCache]: Analyzing trace with hash 1838268449, now seen corresponding path program 1 times [2018-11-23 10:41:06,295 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:06,295 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:06,318 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:41:06,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:06,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:06,399 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:06,495 INFO L256 TraceCheckUtils]: 0: Hoare triple {1335#true} call ULTIMATE.init(); {1335#true} is VALID [2018-11-23 10:41:06,496 INFO L273 TraceCheckUtils]: 1: Hoare triple {1335#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1335#true} is VALID [2018-11-23 10:41:06,496 INFO L273 TraceCheckUtils]: 2: Hoare triple {1335#true} assume true; {1335#true} is VALID [2018-11-23 10:41:06,497 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1335#true} {1335#true} #181#return; {1335#true} is VALID [2018-11-23 10:41:06,497 INFO L256 TraceCheckUtils]: 4: Hoare triple {1335#true} call #t~ret23 := main(); {1335#true} is VALID [2018-11-23 10:41:06,498 INFO L273 TraceCheckUtils]: 5: Hoare triple {1335#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1335#true} is VALID [2018-11-23 10:41:06,499 INFO L273 TraceCheckUtils]: 6: Hoare triple {1335#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1358#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:06,500 INFO L273 TraceCheckUtils]: 7: Hoare triple {1358#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1358#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:06,504 INFO L273 TraceCheckUtils]: 8: Hoare triple {1358#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1365#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:06,505 INFO L273 TraceCheckUtils]: 9: Hoare triple {1365#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,505 INFO L273 TraceCheckUtils]: 10: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,506 INFO L273 TraceCheckUtils]: 11: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,506 INFO L273 TraceCheckUtils]: 12: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,506 INFO L273 TraceCheckUtils]: 13: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,506 INFO L273 TraceCheckUtils]: 14: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,507 INFO L273 TraceCheckUtils]: 15: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,507 INFO L273 TraceCheckUtils]: 16: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,507 INFO L273 TraceCheckUtils]: 17: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,507 INFO L273 TraceCheckUtils]: 18: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,508 INFO L273 TraceCheckUtils]: 19: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,508 INFO L273 TraceCheckUtils]: 20: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,508 INFO L273 TraceCheckUtils]: 21: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,508 INFO L273 TraceCheckUtils]: 22: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,508 INFO L273 TraceCheckUtils]: 23: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,509 INFO L273 TraceCheckUtils]: 24: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,509 INFO L273 TraceCheckUtils]: 25: Hoare triple {1336#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {1336#false} is VALID [2018-11-23 10:41:06,509 INFO L273 TraceCheckUtils]: 26: Hoare triple {1336#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1336#false} is VALID [2018-11-23 10:41:06,510 INFO L273 TraceCheckUtils]: 27: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,510 INFO L273 TraceCheckUtils]: 28: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,510 INFO L273 TraceCheckUtils]: 29: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,511 INFO L273 TraceCheckUtils]: 30: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,511 INFO L273 TraceCheckUtils]: 31: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,511 INFO L256 TraceCheckUtils]: 32: Hoare triple {1336#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1336#false} is VALID [2018-11-23 10:41:06,511 INFO L273 TraceCheckUtils]: 33: Hoare triple {1336#false} ~cond := #in~cond; {1336#false} is VALID [2018-11-23 10:41:06,512 INFO L273 TraceCheckUtils]: 34: Hoare triple {1336#false} assume 0bv32 == ~cond; {1336#false} is VALID [2018-11-23 10:41:06,512 INFO L273 TraceCheckUtils]: 35: Hoare triple {1336#false} assume !false; {1336#false} is VALID [2018-11-23 10:41:06,515 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:41:06,515 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:41:06,649 INFO L273 TraceCheckUtils]: 35: Hoare triple {1336#false} assume !false; {1336#false} is VALID [2018-11-23 10:41:06,649 INFO L273 TraceCheckUtils]: 34: Hoare triple {1336#false} assume 0bv32 == ~cond; {1336#false} is VALID [2018-11-23 10:41:06,649 INFO L273 TraceCheckUtils]: 33: Hoare triple {1336#false} ~cond := #in~cond; {1336#false} is VALID [2018-11-23 10:41:06,649 INFO L256 TraceCheckUtils]: 32: Hoare triple {1336#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1336#false} is VALID [2018-11-23 10:41:06,650 INFO L273 TraceCheckUtils]: 31: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,650 INFO L273 TraceCheckUtils]: 30: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,650 INFO L273 TraceCheckUtils]: 29: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,650 INFO L273 TraceCheckUtils]: 28: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,651 INFO L273 TraceCheckUtils]: 27: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,651 INFO L273 TraceCheckUtils]: 26: Hoare triple {1336#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1336#false} is VALID [2018-11-23 10:41:06,651 INFO L273 TraceCheckUtils]: 25: Hoare triple {1336#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {1336#false} is VALID [2018-11-23 10:41:06,651 INFO L273 TraceCheckUtils]: 24: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,651 INFO L273 TraceCheckUtils]: 23: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,652 INFO L273 TraceCheckUtils]: 22: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,652 INFO L273 TraceCheckUtils]: 21: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,652 INFO L273 TraceCheckUtils]: 20: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,653 INFO L273 TraceCheckUtils]: 19: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,653 INFO L273 TraceCheckUtils]: 18: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,653 INFO L273 TraceCheckUtils]: 17: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,653 INFO L273 TraceCheckUtils]: 16: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,654 INFO L273 TraceCheckUtils]: 15: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,654 INFO L273 TraceCheckUtils]: 14: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,654 INFO L273 TraceCheckUtils]: 13: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,655 INFO L273 TraceCheckUtils]: 12: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,655 INFO L273 TraceCheckUtils]: 11: Hoare triple {1336#false} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,655 INFO L273 TraceCheckUtils]: 10: Hoare triple {1336#false} ~i~0 := 0bv32; {1336#false} is VALID [2018-11-23 10:41:06,655 INFO L273 TraceCheckUtils]: 9: Hoare triple {1525#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {1336#false} is VALID [2018-11-23 10:41:06,670 INFO L273 TraceCheckUtils]: 8: Hoare triple {1529#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1525#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:41:06,670 INFO L273 TraceCheckUtils]: 7: Hoare triple {1529#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1529#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:06,673 INFO L273 TraceCheckUtils]: 6: Hoare triple {1335#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1529#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:06,673 INFO L273 TraceCheckUtils]: 5: Hoare triple {1335#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1335#true} is VALID [2018-11-23 10:41:06,674 INFO L256 TraceCheckUtils]: 4: Hoare triple {1335#true} call #t~ret23 := main(); {1335#true} is VALID [2018-11-23 10:41:06,674 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1335#true} {1335#true} #181#return; {1335#true} is VALID [2018-11-23 10:41:06,674 INFO L273 TraceCheckUtils]: 2: Hoare triple {1335#true} assume true; {1335#true} is VALID [2018-11-23 10:41:06,674 INFO L273 TraceCheckUtils]: 1: Hoare triple {1335#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1335#true} is VALID [2018-11-23 10:41:06,674 INFO L256 TraceCheckUtils]: 0: Hoare triple {1335#true} call ULTIMATE.init(); {1335#true} is VALID [2018-11-23 10:41:06,677 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:41:06,685 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:41:06,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 10:41:06,686 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-11-23 10:41:06,687 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:06,687 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:41:06,759 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:06,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:41:06,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:41:06,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:41:06,760 INFO L87 Difference]: Start difference. First operand 64 states and 83 transitions. Second operand 6 states. [2018-11-23 10:41:07,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:07,700 INFO L93 Difference]: Finished difference Result 121 states and 159 transitions. [2018-11-23 10:41:07,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:41:07,700 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-11-23 10:41:07,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:07,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:41:07,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 103 transitions. [2018-11-23 10:41:07,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:41:07,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 103 transitions. [2018-11-23 10:41:07,706 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 103 transitions. [2018-11-23 10:41:07,879 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:07,882 INFO L225 Difference]: With dead ends: 121 [2018-11-23 10:41:07,882 INFO L226 Difference]: Without dead ends: 67 [2018-11-23 10:41:07,883 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:41:07,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-11-23 10:41:07,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-11-23 10:41:07,921 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:07,921 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand 66 states. [2018-11-23 10:41:07,921 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand 66 states. [2018-11-23 10:41:07,921 INFO L87 Difference]: Start difference. First operand 67 states. Second operand 66 states. [2018-11-23 10:41:07,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:07,924 INFO L93 Difference]: Finished difference Result 67 states and 86 transitions. [2018-11-23 10:41:07,924 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 86 transitions. [2018-11-23 10:41:07,925 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:07,925 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:07,926 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand 67 states. [2018-11-23 10:41:07,926 INFO L87 Difference]: Start difference. First operand 66 states. Second operand 67 states. [2018-11-23 10:41:07,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:07,929 INFO L93 Difference]: Finished difference Result 67 states and 86 transitions. [2018-11-23 10:41:07,929 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 86 transitions. [2018-11-23 10:41:07,929 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:07,930 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:07,930 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:07,930 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:07,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-11-23 10:41:07,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 85 transitions. [2018-11-23 10:41:07,933 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 85 transitions. Word has length 36 [2018-11-23 10:41:07,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:07,934 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 85 transitions. [2018-11-23 10:41:07,934 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:41:07,934 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 85 transitions. [2018-11-23 10:41:07,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 10:41:07,935 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:07,935 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:07,935 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:07,936 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:07,936 INFO L82 PathProgramCache]: Analyzing trace with hash 254049119, now seen corresponding path program 2 times [2018-11-23 10:41:07,936 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:07,936 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:07,955 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:41:07,992 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 10:41:07,992 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:41:08,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:08,012 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:08,090 INFO L256 TraceCheckUtils]: 0: Hoare triple {1957#true} call ULTIMATE.init(); {1957#true} is VALID [2018-11-23 10:41:08,090 INFO L273 TraceCheckUtils]: 1: Hoare triple {1957#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1957#true} is VALID [2018-11-23 10:41:08,091 INFO L273 TraceCheckUtils]: 2: Hoare triple {1957#true} assume true; {1957#true} is VALID [2018-11-23 10:41:08,091 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1957#true} {1957#true} #181#return; {1957#true} is VALID [2018-11-23 10:41:08,092 INFO L256 TraceCheckUtils]: 4: Hoare triple {1957#true} call #t~ret23 := main(); {1957#true} is VALID [2018-11-23 10:41:08,092 INFO L273 TraceCheckUtils]: 5: Hoare triple {1957#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1957#true} is VALID [2018-11-23 10:41:08,092 INFO L273 TraceCheckUtils]: 6: Hoare triple {1957#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {1980#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:08,093 INFO L273 TraceCheckUtils]: 7: Hoare triple {1980#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1980#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:08,093 INFO L273 TraceCheckUtils]: 8: Hoare triple {1980#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1980#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:08,094 INFO L273 TraceCheckUtils]: 9: Hoare triple {1980#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1980#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:08,094 INFO L273 TraceCheckUtils]: 10: Hoare triple {1980#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1980#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:08,095 INFO L273 TraceCheckUtils]: 11: Hoare triple {1980#(bvsgt ~SIZE~0 (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {1980#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:41:08,095 INFO L273 TraceCheckUtils]: 12: Hoare triple {1980#(bvsgt ~SIZE~0 (_ bv1 32))} ~i~0 := 0bv32; {1999#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:08,096 INFO L273 TraceCheckUtils]: 13: Hoare triple {1999#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,096 INFO L273 TraceCheckUtils]: 14: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,097 INFO L273 TraceCheckUtils]: 15: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,097 INFO L273 TraceCheckUtils]: 16: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,097 INFO L273 TraceCheckUtils]: 17: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,098 INFO L273 TraceCheckUtils]: 18: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,098 INFO L273 TraceCheckUtils]: 19: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,099 INFO L273 TraceCheckUtils]: 20: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,099 INFO L273 TraceCheckUtils]: 21: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,099 INFO L273 TraceCheckUtils]: 22: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,100 INFO L273 TraceCheckUtils]: 23: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,100 INFO L273 TraceCheckUtils]: 24: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,100 INFO L273 TraceCheckUtils]: 25: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,101 INFO L273 TraceCheckUtils]: 26: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,101 INFO L273 TraceCheckUtils]: 27: Hoare triple {1958#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {1958#false} is VALID [2018-11-23 10:41:08,101 INFO L273 TraceCheckUtils]: 28: Hoare triple {1958#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {1958#false} is VALID [2018-11-23 10:41:08,101 INFO L273 TraceCheckUtils]: 29: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,102 INFO L273 TraceCheckUtils]: 30: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,102 INFO L273 TraceCheckUtils]: 31: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,102 INFO L273 TraceCheckUtils]: 32: Hoare triple {1958#false} ~i~0 := 0bv32; {1958#false} is VALID [2018-11-23 10:41:08,102 INFO L273 TraceCheckUtils]: 33: Hoare triple {1958#false} assume !~bvslt32(~i~0, ~SIZE~0); {1958#false} is VALID [2018-11-23 10:41:08,103 INFO L256 TraceCheckUtils]: 34: Hoare triple {1958#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {1958#false} is VALID [2018-11-23 10:41:08,103 INFO L273 TraceCheckUtils]: 35: Hoare triple {1958#false} ~cond := #in~cond; {1958#false} is VALID [2018-11-23 10:41:08,103 INFO L273 TraceCheckUtils]: 36: Hoare triple {1958#false} assume 0bv32 == ~cond; {1958#false} is VALID [2018-11-23 10:41:08,104 INFO L273 TraceCheckUtils]: 37: Hoare triple {1958#false} assume !false; {1958#false} is VALID [2018-11-23 10:41:08,106 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:41:08,106 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:41:08,107 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:41:08,108 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:41:08,108 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2018-11-23 10:41:08,108 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:08,111 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:41:08,176 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:08,176 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:41:08,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:41:08,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:41:08,177 INFO L87 Difference]: Start difference. First operand 66 states and 85 transitions. Second operand 4 states. [2018-11-23 10:41:08,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:08,725 INFO L93 Difference]: Finished difference Result 116 states and 152 transitions. [2018-11-23 10:41:08,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:41:08,725 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2018-11-23 10:41:08,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:08,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:41:08,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 126 transitions. [2018-11-23 10:41:08,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:41:08,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 126 transitions. [2018-11-23 10:41:08,731 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 126 transitions. [2018-11-23 10:41:09,009 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:09,012 INFO L225 Difference]: With dead ends: 116 [2018-11-23 10:41:09,012 INFO L226 Difference]: Without dead ends: 67 [2018-11-23 10:41:09,012 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:41:09,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-11-23 10:41:09,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 57. [2018-11-23 10:41:09,050 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:09,050 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand 57 states. [2018-11-23 10:41:09,050 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand 57 states. [2018-11-23 10:41:09,051 INFO L87 Difference]: Start difference. First operand 67 states. Second operand 57 states. [2018-11-23 10:41:09,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:09,053 INFO L93 Difference]: Finished difference Result 67 states and 77 transitions. [2018-11-23 10:41:09,053 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 77 transitions. [2018-11-23 10:41:09,054 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:09,054 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:09,054 INFO L74 IsIncluded]: Start isIncluded. First operand 57 states. Second operand 67 states. [2018-11-23 10:41:09,054 INFO L87 Difference]: Start difference. First operand 57 states. Second operand 67 states. [2018-11-23 10:41:09,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:09,057 INFO L93 Difference]: Finished difference Result 67 states and 77 transitions. [2018-11-23 10:41:09,057 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 77 transitions. [2018-11-23 10:41:09,058 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:09,058 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:09,058 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:09,058 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:09,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-11-23 10:41:09,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 67 transitions. [2018-11-23 10:41:09,061 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 67 transitions. Word has length 38 [2018-11-23 10:41:09,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:09,061 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 67 transitions. [2018-11-23 10:41:09,061 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:41:09,061 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 67 transitions. [2018-11-23 10:41:09,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 10:41:09,063 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:09,063 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:09,063 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:09,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:09,064 INFO L82 PathProgramCache]: Analyzing trace with hash -1231531187, now seen corresponding path program 1 times [2018-11-23 10:41:09,064 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:09,064 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:09,082 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 10:41:09,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:09,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:41:09,206 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:09,589 INFO L256 TraceCheckUtils]: 0: Hoare triple {2459#true} call ULTIMATE.init(); {2459#true} is VALID [2018-11-23 10:41:09,590 INFO L273 TraceCheckUtils]: 1: Hoare triple {2459#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2459#true} is VALID [2018-11-23 10:41:09,590 INFO L273 TraceCheckUtils]: 2: Hoare triple {2459#true} assume true; {2459#true} is VALID [2018-11-23 10:41:09,590 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2459#true} {2459#true} #181#return; {2459#true} is VALID [2018-11-23 10:41:09,591 INFO L256 TraceCheckUtils]: 4: Hoare triple {2459#true} call #t~ret23 := main(); {2459#true} is VALID [2018-11-23 10:41:09,591 INFO L273 TraceCheckUtils]: 5: Hoare triple {2459#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2459#true} is VALID [2018-11-23 10:41:09,608 INFO L273 TraceCheckUtils]: 6: Hoare triple {2459#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {2482#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:09,622 INFO L273 TraceCheckUtils]: 7: Hoare triple {2482#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2482#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:09,631 INFO L273 TraceCheckUtils]: 8: Hoare triple {2482#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2489#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:09,632 INFO L273 TraceCheckUtils]: 9: Hoare triple {2489#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2489#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:09,633 INFO L273 TraceCheckUtils]: 10: Hoare triple {2489#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2496#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:09,634 INFO L273 TraceCheckUtils]: 11: Hoare triple {2496#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2500#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:09,635 INFO L273 TraceCheckUtils]: 12: Hoare triple {2500#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~i~0 := 0bv32; {2504#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:09,636 INFO L273 TraceCheckUtils]: 13: Hoare triple {2504#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2504#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:41:09,637 INFO L273 TraceCheckUtils]: 14: Hoare triple {2504#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2511#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:09,638 INFO L273 TraceCheckUtils]: 15: Hoare triple {2511#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,639 INFO L273 TraceCheckUtils]: 16: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,639 INFO L273 TraceCheckUtils]: 17: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2460#false} is VALID [2018-11-23 10:41:09,640 INFO L273 TraceCheckUtils]: 18: Hoare triple {2460#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2460#false} is VALID [2018-11-23 10:41:09,640 INFO L273 TraceCheckUtils]: 19: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,641 INFO L273 TraceCheckUtils]: 20: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,641 INFO L273 TraceCheckUtils]: 21: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2460#false} is VALID [2018-11-23 10:41:09,642 INFO L273 TraceCheckUtils]: 22: Hoare triple {2460#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2460#false} is VALID [2018-11-23 10:41:09,642 INFO L273 TraceCheckUtils]: 23: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,642 INFO L273 TraceCheckUtils]: 24: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,642 INFO L273 TraceCheckUtils]: 25: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2460#false} is VALID [2018-11-23 10:41:09,643 INFO L273 TraceCheckUtils]: 26: Hoare triple {2460#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2460#false} is VALID [2018-11-23 10:41:09,643 INFO L273 TraceCheckUtils]: 27: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,643 INFO L273 TraceCheckUtils]: 28: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,643 INFO L273 TraceCheckUtils]: 29: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2460#false} is VALID [2018-11-23 10:41:09,643 INFO L273 TraceCheckUtils]: 30: Hoare triple {2460#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2460#false} is VALID [2018-11-23 10:41:09,644 INFO L273 TraceCheckUtils]: 31: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,644 INFO L273 TraceCheckUtils]: 32: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,644 INFO L273 TraceCheckUtils]: 33: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2460#false} is VALID [2018-11-23 10:41:09,644 INFO L273 TraceCheckUtils]: 34: Hoare triple {2460#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2460#false} is VALID [2018-11-23 10:41:09,645 INFO L273 TraceCheckUtils]: 35: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,645 INFO L273 TraceCheckUtils]: 36: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,645 INFO L273 TraceCheckUtils]: 37: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {2460#false} is VALID [2018-11-23 10:41:09,645 INFO L273 TraceCheckUtils]: 38: Hoare triple {2460#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2460#false} is VALID [2018-11-23 10:41:09,646 INFO L273 TraceCheckUtils]: 39: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,646 INFO L273 TraceCheckUtils]: 40: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,646 INFO L273 TraceCheckUtils]: 41: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {2460#false} is VALID [2018-11-23 10:41:09,646 INFO L273 TraceCheckUtils]: 42: Hoare triple {2460#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {2460#false} is VALID [2018-11-23 10:41:09,647 INFO L273 TraceCheckUtils]: 43: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,647 INFO L273 TraceCheckUtils]: 44: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,647 INFO L273 TraceCheckUtils]: 45: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {2460#false} is VALID [2018-11-23 10:41:09,647 INFO L273 TraceCheckUtils]: 46: Hoare triple {2460#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {2460#false} is VALID [2018-11-23 10:41:09,648 INFO L273 TraceCheckUtils]: 47: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,648 INFO L273 TraceCheckUtils]: 48: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,648 INFO L273 TraceCheckUtils]: 49: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {2460#false} is VALID [2018-11-23 10:41:09,649 INFO L273 TraceCheckUtils]: 50: Hoare triple {2460#false} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {2460#false} is VALID [2018-11-23 10:41:09,649 INFO L273 TraceCheckUtils]: 51: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,649 INFO L256 TraceCheckUtils]: 52: Hoare triple {2460#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {2460#false} is VALID [2018-11-23 10:41:09,649 INFO L273 TraceCheckUtils]: 53: Hoare triple {2460#false} ~cond := #in~cond; {2460#false} is VALID [2018-11-23 10:41:09,650 INFO L273 TraceCheckUtils]: 54: Hoare triple {2460#false} assume 0bv32 == ~cond; {2460#false} is VALID [2018-11-23 10:41:09,650 INFO L273 TraceCheckUtils]: 55: Hoare triple {2460#false} assume !false; {2460#false} is VALID [2018-11-23 10:41:09,659 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 10:41:09,659 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:41:09,952 INFO L273 TraceCheckUtils]: 55: Hoare triple {2460#false} assume !false; {2460#false} is VALID [2018-11-23 10:41:09,952 INFO L273 TraceCheckUtils]: 54: Hoare triple {2460#false} assume 0bv32 == ~cond; {2460#false} is VALID [2018-11-23 10:41:09,953 INFO L273 TraceCheckUtils]: 53: Hoare triple {2460#false} ~cond := #in~cond; {2460#false} is VALID [2018-11-23 10:41:09,953 INFO L256 TraceCheckUtils]: 52: Hoare triple {2460#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {2460#false} is VALID [2018-11-23 10:41:09,953 INFO L273 TraceCheckUtils]: 51: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,954 INFO L273 TraceCheckUtils]: 50: Hoare triple {2460#false} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {2460#false} is VALID [2018-11-23 10:41:09,954 INFO L273 TraceCheckUtils]: 49: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {2460#false} is VALID [2018-11-23 10:41:09,954 INFO L273 TraceCheckUtils]: 48: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,954 INFO L273 TraceCheckUtils]: 47: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,955 INFO L273 TraceCheckUtils]: 46: Hoare triple {2460#false} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {2460#false} is VALID [2018-11-23 10:41:09,955 INFO L273 TraceCheckUtils]: 45: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {2460#false} is VALID [2018-11-23 10:41:09,955 INFO L273 TraceCheckUtils]: 44: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,955 INFO L273 TraceCheckUtils]: 43: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,955 INFO L273 TraceCheckUtils]: 42: Hoare triple {2460#false} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {2460#false} is VALID [2018-11-23 10:41:09,955 INFO L273 TraceCheckUtils]: 41: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {2460#false} is VALID [2018-11-23 10:41:09,956 INFO L273 TraceCheckUtils]: 40: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,956 INFO L273 TraceCheckUtils]: 39: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,956 INFO L273 TraceCheckUtils]: 38: Hoare triple {2460#false} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {2460#false} is VALID [2018-11-23 10:41:09,957 INFO L273 TraceCheckUtils]: 37: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {2460#false} is VALID [2018-11-23 10:41:09,957 INFO L273 TraceCheckUtils]: 36: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,957 INFO L273 TraceCheckUtils]: 35: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,957 INFO L273 TraceCheckUtils]: 34: Hoare triple {2460#false} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {2460#false} is VALID [2018-11-23 10:41:09,958 INFO L273 TraceCheckUtils]: 33: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {2460#false} is VALID [2018-11-23 10:41:09,958 INFO L273 TraceCheckUtils]: 32: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,958 INFO L273 TraceCheckUtils]: 31: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,958 INFO L273 TraceCheckUtils]: 30: Hoare triple {2460#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2460#false} is VALID [2018-11-23 10:41:09,959 INFO L273 TraceCheckUtils]: 29: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {2460#false} is VALID [2018-11-23 10:41:09,959 INFO L273 TraceCheckUtils]: 28: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,959 INFO L273 TraceCheckUtils]: 27: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,959 INFO L273 TraceCheckUtils]: 26: Hoare triple {2460#false} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {2460#false} is VALID [2018-11-23 10:41:09,960 INFO L273 TraceCheckUtils]: 25: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {2460#false} is VALID [2018-11-23 10:41:09,960 INFO L273 TraceCheckUtils]: 24: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,960 INFO L273 TraceCheckUtils]: 23: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,960 INFO L273 TraceCheckUtils]: 22: Hoare triple {2460#false} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {2460#false} is VALID [2018-11-23 10:41:09,961 INFO L273 TraceCheckUtils]: 21: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {2460#false} is VALID [2018-11-23 10:41:09,961 INFO L273 TraceCheckUtils]: 20: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,961 INFO L273 TraceCheckUtils]: 19: Hoare triple {2460#false} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,961 INFO L273 TraceCheckUtils]: 18: Hoare triple {2460#false} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2460#false} is VALID [2018-11-23 10:41:09,961 INFO L273 TraceCheckUtils]: 17: Hoare triple {2460#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {2460#false} is VALID [2018-11-23 10:41:09,962 INFO L273 TraceCheckUtils]: 16: Hoare triple {2460#false} ~i~0 := 0bv32; {2460#false} is VALID [2018-11-23 10:41:09,966 INFO L273 TraceCheckUtils]: 15: Hoare triple {2755#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {2460#false} is VALID [2018-11-23 10:41:09,967 INFO L273 TraceCheckUtils]: 14: Hoare triple {2759#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2755#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:41:09,968 INFO L273 TraceCheckUtils]: 13: Hoare triple {2759#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {2759#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:09,971 INFO L273 TraceCheckUtils]: 12: Hoare triple {2766#(bvslt (_ bv1 32) ~SIZE~0)} ~i~0 := 0bv32; {2759#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:41:09,971 INFO L273 TraceCheckUtils]: 11: Hoare triple {2770#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt main_~i~0 ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {2766#(bvslt (_ bv1 32) ~SIZE~0)} is VALID [2018-11-23 10:41:09,998 INFO L273 TraceCheckUtils]: 10: Hoare triple {2774#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2770#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-23 10:41:09,999 INFO L273 TraceCheckUtils]: 9: Hoare triple {2774#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2774#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:41:10,022 INFO L273 TraceCheckUtils]: 8: Hoare triple {2781#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2774#(or (bvslt (_ bv1 32) ~SIZE~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-23 10:41:10,023 INFO L273 TraceCheckUtils]: 7: Hoare triple {2781#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2781#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} is VALID [2018-11-23 10:41:10,024 INFO L273 TraceCheckUtils]: 6: Hoare triple {2459#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {2781#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (bvslt (_ bv1 32) ~SIZE~0))} is VALID [2018-11-23 10:41:10,024 INFO L273 TraceCheckUtils]: 5: Hoare triple {2459#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2459#true} is VALID [2018-11-23 10:41:10,024 INFO L256 TraceCheckUtils]: 4: Hoare triple {2459#true} call #t~ret23 := main(); {2459#true} is VALID [2018-11-23 10:41:10,024 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2459#true} {2459#true} #181#return; {2459#true} is VALID [2018-11-23 10:41:10,024 INFO L273 TraceCheckUtils]: 2: Hoare triple {2459#true} assume true; {2459#true} is VALID [2018-11-23 10:41:10,025 INFO L273 TraceCheckUtils]: 1: Hoare triple {2459#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2459#true} is VALID [2018-11-23 10:41:10,025 INFO L256 TraceCheckUtils]: 0: Hoare triple {2459#true} call ULTIMATE.init(); {2459#true} is VALID [2018-11-23 10:41:10,028 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 10:41:10,030 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:41:10,031 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-23 10:41:10,031 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 56 [2018-11-23 10:41:10,032 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:10,032 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 10:41:10,299 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:10,300 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 10:41:10,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 10:41:10,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-11-23 10:41:10,300 INFO L87 Difference]: Start difference. First operand 57 states and 67 transitions. Second operand 14 states. [2018-11-23 10:41:13,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:13,993 INFO L93 Difference]: Finished difference Result 218 states and 277 transitions. [2018-11-23 10:41:13,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 10:41:13,994 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 56 [2018-11-23 10:41:13,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:41:13,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:41:13,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 268 transitions. [2018-11-23 10:41:13,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:41:14,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 268 transitions. [2018-11-23 10:41:14,004 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 268 transitions. [2018-11-23 10:41:14,536 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 268 edges. 268 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:41:14,542 INFO L225 Difference]: With dead ends: 218 [2018-11-23 10:41:14,542 INFO L226 Difference]: Without dead ends: 175 [2018-11-23 10:41:14,543 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 99 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=92, Invalid=180, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:41:14,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-11-23 10:41:14,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 157. [2018-11-23 10:41:14,708 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:41:14,708 INFO L82 GeneralOperation]: Start isEquivalent. First operand 175 states. Second operand 157 states. [2018-11-23 10:41:14,708 INFO L74 IsIncluded]: Start isIncluded. First operand 175 states. Second operand 157 states. [2018-11-23 10:41:14,709 INFO L87 Difference]: Start difference. First operand 175 states. Second operand 157 states. [2018-11-23 10:41:14,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:14,715 INFO L93 Difference]: Finished difference Result 175 states and 195 transitions. [2018-11-23 10:41:14,715 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 195 transitions. [2018-11-23 10:41:14,715 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:14,716 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:14,716 INFO L74 IsIncluded]: Start isIncluded. First operand 157 states. Second operand 175 states. [2018-11-23 10:41:14,716 INFO L87 Difference]: Start difference. First operand 157 states. Second operand 175 states. [2018-11-23 10:41:14,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:41:14,722 INFO L93 Difference]: Finished difference Result 175 states and 195 transitions. [2018-11-23 10:41:14,722 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 195 transitions. [2018-11-23 10:41:14,722 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:41:14,723 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:41:14,723 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:41:14,723 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:41:14,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-11-23 10:41:14,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 177 transitions. [2018-11-23 10:41:14,728 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 177 transitions. Word has length 56 [2018-11-23 10:41:14,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:41:14,729 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 177 transitions. [2018-11-23 10:41:14,729 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 10:41:14,729 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 177 transitions. [2018-11-23 10:41:14,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-23 10:41:14,730 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:41:14,730 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:41:14,731 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:41:14,731 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:41:14,731 INFO L82 PathProgramCache]: Analyzing trace with hash 1043072633, now seen corresponding path program 2 times [2018-11-23 10:41:14,731 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:41:14,732 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:41:14,759 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:41:14,981 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:41:14,981 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:41:17,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-23 10:41:17,092 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:41:18,095 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2018-11-23 10:41:18,106 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2018-11-23 10:41:18,114 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:18,120 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:18,125 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-23 10:41:18,126 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:9 [2018-11-23 10:41:18,284 INFO L256 TraceCheckUtils]: 0: Hoare triple {3721#true} call ULTIMATE.init(); {3721#true} is VALID [2018-11-23 10:41:18,284 INFO L273 TraceCheckUtils]: 1: Hoare triple {3721#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3721#true} is VALID [2018-11-23 10:41:18,285 INFO L273 TraceCheckUtils]: 2: Hoare triple {3721#true} assume true; {3721#true} is VALID [2018-11-23 10:41:18,285 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3721#true} {3721#true} #181#return; {3721#true} is VALID [2018-11-23 10:41:18,285 INFO L256 TraceCheckUtils]: 4: Hoare triple {3721#true} call #t~ret23 := main(); {3721#true} is VALID [2018-11-23 10:41:18,285 INFO L273 TraceCheckUtils]: 5: Hoare triple {3721#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3721#true} is VALID [2018-11-23 10:41:18,286 INFO L273 TraceCheckUtils]: 6: Hoare triple {3721#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,287 INFO L273 TraceCheckUtils]: 7: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,287 INFO L273 TraceCheckUtils]: 8: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,288 INFO L273 TraceCheckUtils]: 9: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,288 INFO L273 TraceCheckUtils]: 10: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,288 INFO L273 TraceCheckUtils]: 11: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,289 INFO L273 TraceCheckUtils]: 12: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,290 INFO L273 TraceCheckUtils]: 13: Hoare triple {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,291 INFO L273 TraceCheckUtils]: 14: Hoare triple {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:18,293 INFO L273 TraceCheckUtils]: 15: Hoare triple {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:18,294 INFO L273 TraceCheckUtils]: 16: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:18,295 INFO L273 TraceCheckUtils]: 17: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:18,296 INFO L273 TraceCheckUtils]: 18: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,357 INFO L273 TraceCheckUtils]: 19: Hoare triple {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,363 INFO L273 TraceCheckUtils]: 20: Hoare triple {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:18,759 INFO L273 TraceCheckUtils]: 21: Hoare triple {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,760 INFO L273 TraceCheckUtils]: 22: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,760 INFO L273 TraceCheckUtils]: 23: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,761 INFO L273 TraceCheckUtils]: 24: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,765 INFO L273 TraceCheckUtils]: 25: Hoare triple {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:18,766 INFO L273 TraceCheckUtils]: 26: Hoare triple {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:18,767 INFO L273 TraceCheckUtils]: 27: Hoare triple {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:18,769 INFO L273 TraceCheckUtils]: 28: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:18,770 INFO L273 TraceCheckUtils]: 29: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:18,770 INFO L273 TraceCheckUtils]: 30: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,031 INFO L273 TraceCheckUtils]: 31: Hoare triple {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,032 INFO L273 TraceCheckUtils]: 32: Hoare triple {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:19,401 INFO L273 TraceCheckUtils]: 33: Hoare triple {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,401 INFO L273 TraceCheckUtils]: 34: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,402 INFO L273 TraceCheckUtils]: 35: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,413 INFO L273 TraceCheckUtils]: 36: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,414 INFO L273 TraceCheckUtils]: 37: Hoare triple {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,415 INFO L273 TraceCheckUtils]: 38: Hoare triple {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:19,416 INFO L273 TraceCheckUtils]: 39: Hoare triple {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,417 INFO L273 TraceCheckUtils]: 40: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,418 INFO L273 TraceCheckUtils]: 41: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,418 INFO L273 TraceCheckUtils]: 42: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,523 INFO L273 TraceCheckUtils]: 43: Hoare triple {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,524 INFO L273 TraceCheckUtils]: 44: Hoare triple {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:19,797 INFO L273 TraceCheckUtils]: 45: Hoare triple {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,797 INFO L273 TraceCheckUtils]: 46: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,798 INFO L273 TraceCheckUtils]: 47: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,798 INFO L273 TraceCheckUtils]: 48: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,799 INFO L273 TraceCheckUtils]: 49: Hoare triple {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,800 INFO L273 TraceCheckUtils]: 50: Hoare triple {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:19,801 INFO L273 TraceCheckUtils]: 51: Hoare triple {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,802 INFO L273 TraceCheckUtils]: 52: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,803 INFO L273 TraceCheckUtils]: 53: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,804 INFO L273 TraceCheckUtils]: 54: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,855 INFO L273 TraceCheckUtils]: 55: Hoare triple {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,856 INFO L273 TraceCheckUtils]: 56: Hoare triple {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:19,875 INFO L273 TraceCheckUtils]: 57: Hoare triple {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,883 INFO L273 TraceCheckUtils]: 58: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,884 INFO L273 TraceCheckUtils]: 59: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,884 INFO L273 TraceCheckUtils]: 60: Hoare triple {3744#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,885 INFO L273 TraceCheckUtils]: 61: Hoare triple {3763#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:19,889 INFO L273 TraceCheckUtils]: 62: Hoare triple {3767#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:19,892 INFO L273 TraceCheckUtils]: 63: Hoare triple {3771#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {3923#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:19,901 INFO L273 TraceCheckUtils]: 64: Hoare triple {3923#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,902 INFO L273 TraceCheckUtils]: 65: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:41:19,904 INFO L273 TraceCheckUtils]: 66: Hoare triple {3775#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:20,200 INFO L273 TraceCheckUtils]: 67: Hoare triple {3785#(and (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:41:20,201 INFO L273 TraceCheckUtils]: 68: Hoare triple {3789#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:41:20,550 INFO L273 TraceCheckUtils]: 69: Hoare triple {3793#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {3942#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:41:20,550 INFO L273 TraceCheckUtils]: 70: Hoare triple {3942#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {3942#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:41:20,551 INFO L273 TraceCheckUtils]: 71: Hoare triple {3942#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} assume !~bvslt32(~i~0, ~SIZE~0); {3942#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} is VALID [2018-11-23 10:41:20,552 INFO L256 TraceCheckUtils]: 72: Hoare triple {3942#(exists ((v_arrayElimCell_2 (_ BitVec 32)) (v_arrayElimCell_3 (_ BitVec 32))) (= (bvadd (bvneg v_arrayElimCell_2) (bvneg v_arrayElimCell_3) v_arrayElimCell_2 v_arrayElimCell_3) main_~sum~0))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {3952#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:41:20,552 INFO L273 TraceCheckUtils]: 73: Hoare triple {3952#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {3956#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:41:20,552 INFO L273 TraceCheckUtils]: 74: Hoare triple {3956#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {3722#false} is VALID [2018-11-23 10:41:20,553 INFO L273 TraceCheckUtils]: 75: Hoare triple {3722#false} assume !false; {3722#false} is VALID [2018-11-23 10:41:20,570 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:41:20,570 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:41:24,460 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2018-11-23 10:41:28,480 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:41:28,500 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:41:28,578 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 29 treesize of output 82 [2018-11-23 10:41:31,883 INFO L267 ElimStorePlain]: Start of recursive call 3: 13 dim-0 vars, End of recursive call: 13 dim-0 vars, and 16 xjuncts. [2018-11-23 10:41:31,954 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:41:31,965 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-23 10:41:31,966 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:21 [2018-11-23 10:41:31,992 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:41:31,992 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#a~0.base|]. (= (let ((.cse1 (bvmul (_ bv4 32) main_~i~0)) (.cse0 (select |#memory_int| |main_~#a~0.base|))) (bvadd (bvneg (select .cse0 |main_~#a~0.offset|)) (select .cse0 (bvadd |main_~#a~0.offset| .cse1 (_ bv4 32))) (select .cse0 (bvadd |main_~#a~0.offset| .cse1)) main_~sum~0 (bvneg (select .cse0 (bvadd |main_~#a~0.offset| (_ bv4 32)))))) (_ bv0 32)) [2018-11-23 10:41:31,992 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_prenex_9, v_prenex_10]. (and (= (_ bv0 32) (bvadd main_~sum~0 v_prenex_9 (bvneg v_prenex_9) v_prenex_10 (bvneg v_prenex_10))) (= (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd |main_~#a~0.offset| (_ bv4 32)))) [2018-11-23 10:41:32,114 INFO L273 TraceCheckUtils]: 75: Hoare triple {3722#false} assume !false; {3722#false} is VALID [2018-11-23 10:41:32,114 INFO L273 TraceCheckUtils]: 74: Hoare triple {3966#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {3722#false} is VALID [2018-11-23 10:41:32,115 INFO L273 TraceCheckUtils]: 73: Hoare triple {3970#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {3966#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:41:32,116 INFO L256 TraceCheckUtils]: 72: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {3970#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:41:32,116 INFO L273 TraceCheckUtils]: 71: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:32,117 INFO L273 TraceCheckUtils]: 70: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:32,119 INFO L273 TraceCheckUtils]: 69: Hoare triple {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:32,338 INFO L273 TraceCheckUtils]: 68: Hoare triple {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:32,481 INFO L273 TraceCheckUtils]: 67: Hoare triple {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:32,482 INFO L273 TraceCheckUtils]: 66: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:32,482 INFO L273 TraceCheckUtils]: 65: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:32,483 INFO L273 TraceCheckUtils]: 64: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:33,674 INFO L273 TraceCheckUtils]: 63: Hoare triple {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:35,725 INFO L273 TraceCheckUtils]: 62: Hoare triple {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:37,730 INFO L273 TraceCheckUtils]: 61: Hoare triple {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:37,744 INFO L273 TraceCheckUtils]: 60: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:37,744 INFO L273 TraceCheckUtils]: 59: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:37,745 INFO L273 TraceCheckUtils]: 58: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:37,747 INFO L273 TraceCheckUtils]: 57: Hoare triple {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:37,944 INFO L273 TraceCheckUtils]: 56: Hoare triple {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:38,085 INFO L273 TraceCheckUtils]: 55: Hoare triple {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:38,086 INFO L273 TraceCheckUtils]: 54: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:38,086 INFO L273 TraceCheckUtils]: 53: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:38,087 INFO L273 TraceCheckUtils]: 52: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:39,667 INFO L273 TraceCheckUtils]: 51: Hoare triple {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:41,705 INFO L273 TraceCheckUtils]: 50: Hoare triple {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:43,711 INFO L273 TraceCheckUtils]: 49: Hoare triple {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:43,713 INFO L273 TraceCheckUtils]: 48: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:43,714 INFO L273 TraceCheckUtils]: 47: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:43,714 INFO L273 TraceCheckUtils]: 46: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:43,715 INFO L273 TraceCheckUtils]: 45: Hoare triple {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:43,911 INFO L273 TraceCheckUtils]: 44: Hoare triple {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:44,070 INFO L273 TraceCheckUtils]: 43: Hoare triple {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:44,072 INFO L273 TraceCheckUtils]: 42: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:44,072 INFO L273 TraceCheckUtils]: 41: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:44,074 INFO L273 TraceCheckUtils]: 40: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:45,526 INFO L273 TraceCheckUtils]: 39: Hoare triple {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:47,575 INFO L273 TraceCheckUtils]: 38: Hoare triple {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:49,579 INFO L273 TraceCheckUtils]: 37: Hoare triple {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:49,581 INFO L273 TraceCheckUtils]: 36: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:49,582 INFO L273 TraceCheckUtils]: 35: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:49,583 INFO L273 TraceCheckUtils]: 34: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:49,583 INFO L273 TraceCheckUtils]: 33: Hoare triple {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:49,770 INFO L273 TraceCheckUtils]: 32: Hoare triple {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:49,904 INFO L273 TraceCheckUtils]: 31: Hoare triple {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:49,905 INFO L273 TraceCheckUtils]: 30: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:49,905 INFO L273 TraceCheckUtils]: 29: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:49,906 INFO L273 TraceCheckUtils]: 28: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:51,709 INFO L273 TraceCheckUtils]: 27: Hoare triple {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:53,748 INFO L273 TraceCheckUtils]: 26: Hoare triple {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:55,752 INFO L273 TraceCheckUtils]: 25: Hoare triple {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:55,753 INFO L273 TraceCheckUtils]: 24: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {4014#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:55,757 INFO L273 TraceCheckUtils]: 23: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:55,760 INFO L273 TraceCheckUtils]: 22: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:55,761 INFO L273 TraceCheckUtils]: 21: Hoare triple {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:55,927 INFO L273 TraceCheckUtils]: 20: Hoare triple {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3984#(= (_ bv0 32) (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))))} is VALID [2018-11-23 10:41:56,120 INFO L273 TraceCheckUtils]: 19: Hoare triple {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {3988#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:56,121 INFO L273 TraceCheckUtils]: 18: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} ~i~0 := 0bv32; {3992#(= (bvadd main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) (_ bv0 32))} is VALID [2018-11-23 10:41:56,122 INFO L273 TraceCheckUtils]: 17: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} assume !~bvslt32(~i~0, ~SIZE~0); {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:56,122 INFO L273 TraceCheckUtils]: 16: Hoare triple {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:57,905 INFO L273 TraceCheckUtils]: 15: Hoare triple {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {3996#(= (_ bv0 32) (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))))} is VALID [2018-11-23 10:41:59,930 INFO L273 TraceCheckUtils]: 14: Hoare triple {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4006#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is UNKNOWN [2018-11-23 10:41:59,931 INFO L273 TraceCheckUtils]: 13: Hoare triple {4159#(and (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_10 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32))) (= (_ bv0 32) (bvadd v_prenex_10 main_~sum~0 v_prenex_9 (bvneg v_prenex_10) (bvneg v_prenex_9)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {4010#(= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~sum~0 (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))))) (_ bv0 32))} is VALID [2018-11-23 10:41:59,931 INFO L273 TraceCheckUtils]: 12: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} ~i~0 := 0bv32; {4159#(and (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_prenex_10 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32))) (= (_ bv0 32) (bvadd v_prenex_10 main_~sum~0 v_prenex_9 (bvneg v_prenex_10) (bvneg v_prenex_9)))))} is VALID [2018-11-23 10:41:59,932 INFO L273 TraceCheckUtils]: 11: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:59,932 INFO L273 TraceCheckUtils]: 10: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:59,933 INFO L273 TraceCheckUtils]: 9: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:59,933 INFO L273 TraceCheckUtils]: 8: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:59,933 INFO L273 TraceCheckUtils]: 7: Hoare triple {3974#(= main_~sum~0 (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:59,934 INFO L273 TraceCheckUtils]: 6: Hoare triple {3721#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {3974#(= main_~sum~0 (_ bv0 32))} is VALID [2018-11-23 10:41:59,934 INFO L273 TraceCheckUtils]: 5: Hoare triple {3721#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3721#true} is VALID [2018-11-23 10:41:59,934 INFO L256 TraceCheckUtils]: 4: Hoare triple {3721#true} call #t~ret23 := main(); {3721#true} is VALID [2018-11-23 10:41:59,935 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3721#true} {3721#true} #181#return; {3721#true} is VALID [2018-11-23 10:41:59,935 INFO L273 TraceCheckUtils]: 2: Hoare triple {3721#true} assume true; {3721#true} is VALID [2018-11-23 10:41:59,935 INFO L273 TraceCheckUtils]: 1: Hoare triple {3721#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3721#true} is VALID [2018-11-23 10:41:59,936 INFO L256 TraceCheckUtils]: 0: Hoare triple {3721#true} call ULTIMATE.init(); {3721#true} is VALID [2018-11-23 10:41:59,960 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 10:41:59,962 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:41:59,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 25 [2018-11-23 10:41:59,964 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 76 [2018-11-23 10:41:59,964 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:41:59,965 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states. [2018-11-23 10:42:28,735 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 141 edges. 131 inductive. 0 not inductive. 10 times theorem prover too weak to decide inductivity. [2018-11-23 10:42:28,735 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-23 10:42:28,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-23 10:42:28,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=527, Unknown=0, NotChecked=0, Total=600 [2018-11-23 10:42:28,736 INFO L87 Difference]: Start difference. First operand 157 states and 177 transitions. Second operand 25 states. [2018-11-23 10:42:40,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:42:40,921 INFO L93 Difference]: Finished difference Result 210 states and 229 transitions. [2018-11-23 10:42:40,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 10:42:40,922 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 76 [2018-11-23 10:42:40,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:42:40,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 10:42:40,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 120 transitions. [2018-11-23 10:42:40,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 10:42:40,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 120 transitions. [2018-11-23 10:42:40,928 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 120 transitions. [2018-11-23 10:42:41,827 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 120 edges. 120 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:42:41,830 INFO L225 Difference]: With dead ends: 210 [2018-11-23 10:42:41,830 INFO L226 Difference]: Without dead ends: 145 [2018-11-23 10:42:41,832 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 113 SyntacticMatches, 15 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=79, Invalid=571, Unknown=0, NotChecked=0, Total=650 [2018-11-23 10:42:41,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-11-23 10:42:41,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-11-23 10:42:41,941 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:42:41,941 INFO L82 GeneralOperation]: Start isEquivalent. First operand 145 states. Second operand 145 states. [2018-11-23 10:42:41,942 INFO L74 IsIncluded]: Start isIncluded. First operand 145 states. Second operand 145 states. [2018-11-23 10:42:41,942 INFO L87 Difference]: Start difference. First operand 145 states. Second operand 145 states. [2018-11-23 10:42:41,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:42:41,946 INFO L93 Difference]: Finished difference Result 145 states and 163 transitions. [2018-11-23 10:42:41,947 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 163 transitions. [2018-11-23 10:42:41,947 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:42:41,947 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:42:41,947 INFO L74 IsIncluded]: Start isIncluded. First operand 145 states. Second operand 145 states. [2018-11-23 10:42:41,948 INFO L87 Difference]: Start difference. First operand 145 states. Second operand 145 states. [2018-11-23 10:42:41,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:42:41,952 INFO L93 Difference]: Finished difference Result 145 states and 163 transitions. [2018-11-23 10:42:41,952 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 163 transitions. [2018-11-23 10:42:41,953 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:42:41,953 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:42:41,953 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:42:41,953 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:42:41,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-11-23 10:42:41,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 163 transitions. [2018-11-23 10:42:41,958 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 163 transitions. Word has length 76 [2018-11-23 10:42:41,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:42:41,958 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 163 transitions. [2018-11-23 10:42:41,958 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-23 10:42:41,958 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 163 transitions. [2018-11-23 10:42:41,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-23 10:42:41,959 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:42:41,960 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:42:41,960 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:42:41,960 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:42:41,960 INFO L82 PathProgramCache]: Analyzing trace with hash 230738229, now seen corresponding path program 3 times [2018-11-23 10:42:41,961 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:42:41,961 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:42:41,990 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:42:42,607 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:42:42,608 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:42:42,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:42:42,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:42:42,957 INFO L256 TraceCheckUtils]: 0: Hoare triple {5026#true} call ULTIMATE.init(); {5026#true} is VALID [2018-11-23 10:42:42,958 INFO L273 TraceCheckUtils]: 1: Hoare triple {5026#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {5026#true} is VALID [2018-11-23 10:42:42,958 INFO L273 TraceCheckUtils]: 2: Hoare triple {5026#true} assume true; {5026#true} is VALID [2018-11-23 10:42:42,958 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5026#true} {5026#true} #181#return; {5026#true} is VALID [2018-11-23 10:42:42,958 INFO L256 TraceCheckUtils]: 4: Hoare triple {5026#true} call #t~ret23 := main(); {5026#true} is VALID [2018-11-23 10:42:42,959 INFO L273 TraceCheckUtils]: 5: Hoare triple {5026#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {5026#true} is VALID [2018-11-23 10:42:42,959 INFO L273 TraceCheckUtils]: 6: Hoare triple {5026#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,960 INFO L273 TraceCheckUtils]: 7: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,960 INFO L273 TraceCheckUtils]: 8: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,960 INFO L273 TraceCheckUtils]: 9: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,961 INFO L273 TraceCheckUtils]: 10: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,961 INFO L273 TraceCheckUtils]: 11: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,961 INFO L273 TraceCheckUtils]: 12: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,962 INFO L273 TraceCheckUtils]: 13: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {5049#(bvsgt ~SIZE~0 (_ bv1 32))} is VALID [2018-11-23 10:42:42,963 INFO L273 TraceCheckUtils]: 14: Hoare triple {5049#(bvsgt ~SIZE~0 (_ bv1 32))} ~i~0 := 0bv32; {5074#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:42:42,964 INFO L273 TraceCheckUtils]: 15: Hoare triple {5074#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5074#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-23 10:42:42,964 INFO L273 TraceCheckUtils]: 16: Hoare triple {5074#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5081#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:42,965 INFO L273 TraceCheckUtils]: 17: Hoare triple {5081#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5081#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:42,966 INFO L273 TraceCheckUtils]: 18: Hoare triple {5081#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5088#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:42,967 INFO L273 TraceCheckUtils]: 19: Hoare triple {5088#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,968 INFO L273 TraceCheckUtils]: 20: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,968 INFO L273 TraceCheckUtils]: 21: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,969 INFO L273 TraceCheckUtils]: 22: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,969 INFO L273 TraceCheckUtils]: 23: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,970 INFO L273 TraceCheckUtils]: 24: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,970 INFO L273 TraceCheckUtils]: 25: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,971 INFO L273 TraceCheckUtils]: 26: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,972 INFO L273 TraceCheckUtils]: 27: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,972 INFO L273 TraceCheckUtils]: 28: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,973 INFO L273 TraceCheckUtils]: 29: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,973 INFO L273 TraceCheckUtils]: 30: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,974 INFO L273 TraceCheckUtils]: 31: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,974 INFO L273 TraceCheckUtils]: 32: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,975 INFO L273 TraceCheckUtils]: 33: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,975 INFO L273 TraceCheckUtils]: 34: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,976 INFO L273 TraceCheckUtils]: 35: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,977 INFO L273 TraceCheckUtils]: 36: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,977 INFO L273 TraceCheckUtils]: 37: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,978 INFO L273 TraceCheckUtils]: 38: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,978 INFO L273 TraceCheckUtils]: 39: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,995 INFO L273 TraceCheckUtils]: 40: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,996 INFO L273 TraceCheckUtils]: 41: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,996 INFO L273 TraceCheckUtils]: 42: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,997 INFO L273 TraceCheckUtils]: 43: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,997 INFO L273 TraceCheckUtils]: 44: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:42,997 INFO L273 TraceCheckUtils]: 45: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,002 INFO L273 TraceCheckUtils]: 46: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,002 INFO L273 TraceCheckUtils]: 47: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,003 INFO L273 TraceCheckUtils]: 48: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,003 INFO L273 TraceCheckUtils]: 49: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,003 INFO L273 TraceCheckUtils]: 50: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,004 INFO L273 TraceCheckUtils]: 51: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,004 INFO L273 TraceCheckUtils]: 52: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,004 INFO L273 TraceCheckUtils]: 53: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,005 INFO L273 TraceCheckUtils]: 54: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,005 INFO L273 TraceCheckUtils]: 55: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,005 INFO L273 TraceCheckUtils]: 56: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,006 INFO L273 TraceCheckUtils]: 57: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,006 INFO L273 TraceCheckUtils]: 58: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,006 INFO L273 TraceCheckUtils]: 59: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,007 INFO L273 TraceCheckUtils]: 60: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,008 INFO L273 TraceCheckUtils]: 61: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,008 INFO L273 TraceCheckUtils]: 62: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,009 INFO L273 TraceCheckUtils]: 63: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,009 INFO L273 TraceCheckUtils]: 64: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5228#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,010 INFO L273 TraceCheckUtils]: 65: Hoare triple {5228#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {5228#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,011 INFO L273 TraceCheckUtils]: 66: Hoare triple {5228#(and (= main_~i~0 (_ bv0 32)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5235#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:43,012 INFO L273 TraceCheckUtils]: 67: Hoare triple {5235#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {5235#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:43,013 INFO L273 TraceCheckUtils]: 68: Hoare triple {5235#(and (bvslt (_ bv2 32) ~SIZE~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5242#(and (= (_ bv2 32) main_~i~0) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,014 INFO L273 TraceCheckUtils]: 69: Hoare triple {5242#(and (= (_ bv2 32) main_~i~0) (bvslt (_ bv2 32) ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {5027#false} is VALID [2018-11-23 10:42:43,014 INFO L273 TraceCheckUtils]: 70: Hoare triple {5027#false} ~i~0 := 0bv32; {5027#false} is VALID [2018-11-23 10:42:43,014 INFO L273 TraceCheckUtils]: 71: Hoare triple {5027#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {5027#false} is VALID [2018-11-23 10:42:43,014 INFO L273 TraceCheckUtils]: 72: Hoare triple {5027#false} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {5027#false} is VALID [2018-11-23 10:42:43,015 INFO L273 TraceCheckUtils]: 73: Hoare triple {5027#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {5027#false} is VALID [2018-11-23 10:42:43,015 INFO L273 TraceCheckUtils]: 74: Hoare triple {5027#false} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {5027#false} is VALID [2018-11-23 10:42:43,015 INFO L273 TraceCheckUtils]: 75: Hoare triple {5027#false} assume !~bvslt32(~i~0, ~SIZE~0); {5027#false} is VALID [2018-11-23 10:42:43,015 INFO L256 TraceCheckUtils]: 76: Hoare triple {5027#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {5027#false} is VALID [2018-11-23 10:42:43,016 INFO L273 TraceCheckUtils]: 77: Hoare triple {5027#false} ~cond := #in~cond; {5027#false} is VALID [2018-11-23 10:42:43,016 INFO L273 TraceCheckUtils]: 78: Hoare triple {5027#false} assume 0bv32 == ~cond; {5027#false} is VALID [2018-11-23 10:42:43,016 INFO L273 TraceCheckUtils]: 79: Hoare triple {5027#false} assume !false; {5027#false} is VALID [2018-11-23 10:42:43,022 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-11-23 10:42:43,023 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:42:43,339 INFO L273 TraceCheckUtils]: 79: Hoare triple {5027#false} assume !false; {5027#false} is VALID [2018-11-23 10:42:43,339 INFO L273 TraceCheckUtils]: 78: Hoare triple {5027#false} assume 0bv32 == ~cond; {5027#false} is VALID [2018-11-23 10:42:43,339 INFO L273 TraceCheckUtils]: 77: Hoare triple {5027#false} ~cond := #in~cond; {5027#false} is VALID [2018-11-23 10:42:43,340 INFO L256 TraceCheckUtils]: 76: Hoare triple {5027#false} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {5027#false} is VALID [2018-11-23 10:42:43,340 INFO L273 TraceCheckUtils]: 75: Hoare triple {5027#false} assume !~bvslt32(~i~0, ~SIZE~0); {5027#false} is VALID [2018-11-23 10:42:43,340 INFO L273 TraceCheckUtils]: 74: Hoare triple {5027#false} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {5027#false} is VALID [2018-11-23 10:42:43,340 INFO L273 TraceCheckUtils]: 73: Hoare triple {5027#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {5027#false} is VALID [2018-11-23 10:42:43,340 INFO L273 TraceCheckUtils]: 72: Hoare triple {5027#false} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {5027#false} is VALID [2018-11-23 10:42:43,341 INFO L273 TraceCheckUtils]: 71: Hoare triple {5027#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {5027#false} is VALID [2018-11-23 10:42:43,341 INFO L273 TraceCheckUtils]: 70: Hoare triple {5027#false} ~i~0 := 0bv32; {5027#false} is VALID [2018-11-23 10:42:43,341 INFO L273 TraceCheckUtils]: 69: Hoare triple {5306#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5027#false} is VALID [2018-11-23 10:42:43,343 INFO L273 TraceCheckUtils]: 68: Hoare triple {5310#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5306#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-23 10:42:43,343 INFO L273 TraceCheckUtils]: 67: Hoare triple {5310#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {5310#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:42:43,371 INFO L273 TraceCheckUtils]: 66: Hoare triple {5317#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {5310#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-23 10:42:43,372 INFO L273 TraceCheckUtils]: 65: Hoare triple {5317#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {5317#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} is VALID [2018-11-23 10:42:43,372 INFO L273 TraceCheckUtils]: 64: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5317#(bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)} is VALID [2018-11-23 10:42:43,373 INFO L273 TraceCheckUtils]: 63: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,373 INFO L273 TraceCheckUtils]: 62: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,373 INFO L273 TraceCheckUtils]: 61: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,374 INFO L273 TraceCheckUtils]: 60: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,374 INFO L273 TraceCheckUtils]: 59: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,374 INFO L273 TraceCheckUtils]: 58: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,375 INFO L273 TraceCheckUtils]: 57: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,375 INFO L273 TraceCheckUtils]: 56: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,375 INFO L273 TraceCheckUtils]: 55: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,376 INFO L273 TraceCheckUtils]: 54: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,376 INFO L273 TraceCheckUtils]: 53: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,377 INFO L273 TraceCheckUtils]: 52: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,377 INFO L273 TraceCheckUtils]: 51: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,378 INFO L273 TraceCheckUtils]: 50: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,379 INFO L273 TraceCheckUtils]: 49: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,379 INFO L273 TraceCheckUtils]: 48: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,380 INFO L273 TraceCheckUtils]: 47: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,380 INFO L273 TraceCheckUtils]: 46: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,381 INFO L273 TraceCheckUtils]: 45: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,381 INFO L273 TraceCheckUtils]: 44: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,382 INFO L273 TraceCheckUtils]: 43: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,382 INFO L273 TraceCheckUtils]: 42: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,390 INFO L273 TraceCheckUtils]: 41: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,391 INFO L273 TraceCheckUtils]: 40: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,391 INFO L273 TraceCheckUtils]: 39: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,392 INFO L273 TraceCheckUtils]: 38: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,392 INFO L273 TraceCheckUtils]: 37: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,392 INFO L273 TraceCheckUtils]: 36: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,393 INFO L273 TraceCheckUtils]: 35: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,393 INFO L273 TraceCheckUtils]: 34: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,393 INFO L273 TraceCheckUtils]: 33: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,394 INFO L273 TraceCheckUtils]: 32: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,394 INFO L273 TraceCheckUtils]: 31: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,394 INFO L273 TraceCheckUtils]: 30: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,395 INFO L273 TraceCheckUtils]: 29: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,395 INFO L273 TraceCheckUtils]: 28: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,395 INFO L273 TraceCheckUtils]: 27: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,396 INFO L273 TraceCheckUtils]: 26: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,396 INFO L273 TraceCheckUtils]: 25: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,397 INFO L273 TraceCheckUtils]: 24: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,398 INFO L273 TraceCheckUtils]: 23: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,398 INFO L273 TraceCheckUtils]: 22: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} ~i~0 := 0bv32; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,399 INFO L273 TraceCheckUtils]: 21: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,399 INFO L273 TraceCheckUtils]: 20: Hoare triple {5092#(bvslt (_ bv2 32) ~SIZE~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,400 INFO L273 TraceCheckUtils]: 19: Hoare triple {5459#(or (not (bvslt main_~i~0 ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5092#(bvslt (_ bv2 32) ~SIZE~0)} is VALID [2018-11-23 10:42:43,401 INFO L273 TraceCheckUtils]: 18: Hoare triple {5463#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5459#(or (not (bvslt main_~i~0 ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,401 INFO L273 TraceCheckUtils]: 17: Hoare triple {5463#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5463#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,437 INFO L273 TraceCheckUtils]: 16: Hoare triple {5470#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5463#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,438 INFO L273 TraceCheckUtils]: 15: Hoare triple {5470#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {5470#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,438 INFO L273 TraceCheckUtils]: 14: Hoare triple {5026#true} ~i~0 := 0bv32; {5470#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0)) (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-23 10:42:43,439 INFO L273 TraceCheckUtils]: 13: Hoare triple {5026#true} assume !~bvslt32(~i~0, ~SIZE~0); {5026#true} is VALID [2018-11-23 10:42:43,439 INFO L273 TraceCheckUtils]: 12: Hoare triple {5026#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5026#true} is VALID [2018-11-23 10:42:43,439 INFO L273 TraceCheckUtils]: 11: Hoare triple {5026#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5026#true} is VALID [2018-11-23 10:42:43,439 INFO L273 TraceCheckUtils]: 10: Hoare triple {5026#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5026#true} is VALID [2018-11-23 10:42:43,439 INFO L273 TraceCheckUtils]: 9: Hoare triple {5026#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5026#true} is VALID [2018-11-23 10:42:43,439 INFO L273 TraceCheckUtils]: 8: Hoare triple {5026#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5026#true} is VALID [2018-11-23 10:42:43,439 INFO L273 TraceCheckUtils]: 7: Hoare triple {5026#true} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5026#true} is VALID [2018-11-23 10:42:43,440 INFO L273 TraceCheckUtils]: 6: Hoare triple {5026#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {5026#true} is VALID [2018-11-23 10:42:43,440 INFO L273 TraceCheckUtils]: 5: Hoare triple {5026#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {5026#true} is VALID [2018-11-23 10:42:43,440 INFO L256 TraceCheckUtils]: 4: Hoare triple {5026#true} call #t~ret23 := main(); {5026#true} is VALID [2018-11-23 10:42:43,440 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5026#true} {5026#true} #181#return; {5026#true} is VALID [2018-11-23 10:42:43,440 INFO L273 TraceCheckUtils]: 2: Hoare triple {5026#true} assume true; {5026#true} is VALID [2018-11-23 10:42:43,440 INFO L273 TraceCheckUtils]: 1: Hoare triple {5026#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {5026#true} is VALID [2018-11-23 10:42:43,440 INFO L256 TraceCheckUtils]: 0: Hoare triple {5026#true} call ULTIMATE.init(); {5026#true} is VALID [2018-11-23 10:42:43,445 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-11-23 10:42:43,447 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:42:43,447 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 16 [2018-11-23 10:42:43,448 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 80 [2018-11-23 10:42:43,448 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:42:43,448 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:42:43,614 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:42:43,615 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:42:43,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:42:43,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=171, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:42:43,616 INFO L87 Difference]: Start difference. First operand 145 states and 163 transitions. Second operand 16 states. [2018-11-23 10:42:46,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:42:46,683 INFO L93 Difference]: Finished difference Result 163 states and 181 transitions. [2018-11-23 10:42:46,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 10:42:46,683 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 80 [2018-11-23 10:42:46,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:42:46,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:42:46,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 165 transitions. [2018-11-23 10:42:46,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:42:46,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 165 transitions. [2018-11-23 10:42:46,690 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 165 transitions. [2018-11-23 10:42:47,051 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:42:47,053 INFO L225 Difference]: With dead ends: 163 [2018-11-23 10:42:47,053 INFO L226 Difference]: Without dead ends: 110 [2018-11-23 10:42:47,055 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:42:47,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-23 10:42:47,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 99. [2018-11-23 10:42:47,355 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:42:47,355 INFO L82 GeneralOperation]: Start isEquivalent. First operand 110 states. Second operand 99 states. [2018-11-23 10:42:47,356 INFO L74 IsIncluded]: Start isIncluded. First operand 110 states. Second operand 99 states. [2018-11-23 10:42:47,356 INFO L87 Difference]: Start difference. First operand 110 states. Second operand 99 states. [2018-11-23 10:42:47,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:42:47,360 INFO L93 Difference]: Finished difference Result 110 states and 120 transitions. [2018-11-23 10:42:47,360 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 120 transitions. [2018-11-23 10:42:47,361 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:42:47,361 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:42:47,361 INFO L74 IsIncluded]: Start isIncluded. First operand 99 states. Second operand 110 states. [2018-11-23 10:42:47,361 INFO L87 Difference]: Start difference. First operand 99 states. Second operand 110 states. [2018-11-23 10:42:47,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:42:47,365 INFO L93 Difference]: Finished difference Result 110 states and 120 transitions. [2018-11-23 10:42:47,365 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 120 transitions. [2018-11-23 10:42:47,366 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:42:47,366 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:42:47,366 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:42:47,366 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:42:47,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-23 10:42:47,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 109 transitions. [2018-11-23 10:42:47,370 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 109 transitions. Word has length 80 [2018-11-23 10:42:47,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:42:47,370 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 109 transitions. [2018-11-23 10:42:47,370 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:42:47,370 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 109 transitions. [2018-11-23 10:42:47,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 10:42:47,371 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:42:47,372 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:42:47,372 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:42:47,372 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:42:47,372 INFO L82 PathProgramCache]: Analyzing trace with hash -1937623581, now seen corresponding path program 4 times [2018-11-23 10:42:47,373 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:42:47,373 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:42:47,402 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:42:47,828 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:42:47,828 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:42:49,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-23 10:42:49,965 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:42:51,857 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2018-11-23 10:42:51,869 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2018-11-23 10:42:51,881 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:42:51,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:42:51,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 10:42:51,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:12 [2018-11-23 10:42:52,152 INFO L256 TraceCheckUtils]: 0: Hoare triple {6132#true} call ULTIMATE.init(); {6132#true} is VALID [2018-11-23 10:42:52,152 INFO L273 TraceCheckUtils]: 1: Hoare triple {6132#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {6132#true} is VALID [2018-11-23 10:42:52,152 INFO L273 TraceCheckUtils]: 2: Hoare triple {6132#true} assume true; {6132#true} is VALID [2018-11-23 10:42:52,153 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6132#true} {6132#true} #181#return; {6132#true} is VALID [2018-11-23 10:42:52,153 INFO L256 TraceCheckUtils]: 4: Hoare triple {6132#true} call #t~ret23 := main(); {6132#true} is VALID [2018-11-23 10:42:52,153 INFO L273 TraceCheckUtils]: 5: Hoare triple {6132#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {6132#true} is VALID [2018-11-23 10:42:52,154 INFO L273 TraceCheckUtils]: 6: Hoare triple {6132#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~sum~0 := 0bv32;~i~0 := 0bv32; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,155 INFO L273 TraceCheckUtils]: 7: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,155 INFO L273 TraceCheckUtils]: 8: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,156 INFO L273 TraceCheckUtils]: 9: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,156 INFO L273 TraceCheckUtils]: 10: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,157 INFO L273 TraceCheckUtils]: 11: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call write~intINTTYPE4(1bv32, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,157 INFO L273 TraceCheckUtils]: 12: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,158 INFO L273 TraceCheckUtils]: 13: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,159 INFO L273 TraceCheckUtils]: 14: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,159 INFO L273 TraceCheckUtils]: 15: Hoare triple {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,161 INFO L273 TraceCheckUtils]: 16: Hoare triple {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:52,162 INFO L273 TraceCheckUtils]: 17: Hoare triple {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:52,164 INFO L273 TraceCheckUtils]: 18: Hoare triple {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:52,469 INFO L273 TraceCheckUtils]: 19: Hoare triple {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem4);havoc #t~mem4; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:52,469 INFO L273 TraceCheckUtils]: 20: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:52,470 INFO L273 TraceCheckUtils]: 21: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:52,471 INFO L273 TraceCheckUtils]: 22: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,539 INFO L273 TraceCheckUtils]: 23: Hoare triple {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:42:52,540 INFO L273 TraceCheckUtils]: 24: Hoare triple {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:52,621 INFO L273 TraceCheckUtils]: 25: Hoare triple {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:52,623 INFO L273 TraceCheckUtils]: 26: Hoare triple {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:52,935 INFO L273 TraceCheckUtils]: 27: Hoare triple {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem6);havoc #t~mem6; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,936 INFO L273 TraceCheckUtils]: 28: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,936 INFO L273 TraceCheckUtils]: 29: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,937 INFO L273 TraceCheckUtils]: 30: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,938 INFO L273 TraceCheckUtils]: 31: Hoare triple {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:52,955 INFO L273 TraceCheckUtils]: 32: Hoare triple {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:52,963 INFO L273 TraceCheckUtils]: 33: Hoare triple {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:52,965 INFO L273 TraceCheckUtils]: 34: Hoare triple {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:53,232 INFO L273 TraceCheckUtils]: 35: Hoare triple {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem8 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem8);havoc #t~mem8; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:53,233 INFO L273 TraceCheckUtils]: 36: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post7 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post7);havoc #t~post7; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:53,233 INFO L273 TraceCheckUtils]: 37: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:53,234 INFO L273 TraceCheckUtils]: 38: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:55,239 INFO L273 TraceCheckUtils]: 39: Hoare triple {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is UNKNOWN [2018-11-23 10:42:55,241 INFO L273 TraceCheckUtils]: 40: Hoare triple {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:55,312 INFO L273 TraceCheckUtils]: 41: Hoare triple {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:55,313 INFO L273 TraceCheckUtils]: 42: Hoare triple {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:55,336 INFO L273 TraceCheckUtils]: 43: Hoare triple {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem10 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem10);havoc #t~mem10; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:55,336 INFO L273 TraceCheckUtils]: 44: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post9 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post9);havoc #t~post9; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:55,337 INFO L273 TraceCheckUtils]: 45: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:55,337 INFO L273 TraceCheckUtils]: 46: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:55,338 INFO L273 TraceCheckUtils]: 47: Hoare triple {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:55,339 INFO L273 TraceCheckUtils]: 48: Hoare triple {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:55,339 INFO L273 TraceCheckUtils]: 49: Hoare triple {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:55,366 INFO L273 TraceCheckUtils]: 50: Hoare triple {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:55,625 INFO L273 TraceCheckUtils]: 51: Hoare triple {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem12 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem12);havoc #t~mem12; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:55,626 INFO L273 TraceCheckUtils]: 52: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:55,627 INFO L273 TraceCheckUtils]: 53: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:55,627 INFO L273 TraceCheckUtils]: 54: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:55,699 INFO L273 TraceCheckUtils]: 55: Hoare triple {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:42:55,702 INFO L273 TraceCheckUtils]: 56: Hoare triple {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:55,768 INFO L273 TraceCheckUtils]: 57: Hoare triple {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:55,769 INFO L273 TraceCheckUtils]: 58: Hoare triple {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:56,098 INFO L273 TraceCheckUtils]: 59: Hoare triple {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem14 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem14);havoc #t~mem14; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,100 INFO L273 TraceCheckUtils]: 60: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post13 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post13);havoc #t~post13; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,100 INFO L273 TraceCheckUtils]: 61: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,102 INFO L273 TraceCheckUtils]: 62: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,103 INFO L273 TraceCheckUtils]: 63: Hoare triple {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,104 INFO L273 TraceCheckUtils]: 64: Hoare triple {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:56,104 INFO L273 TraceCheckUtils]: 65: Hoare triple {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:56,106 INFO L273 TraceCheckUtils]: 66: Hoare triple {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:56,401 INFO L273 TraceCheckUtils]: 67: Hoare triple {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem16 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem16);havoc #t~mem16; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:56,402 INFO L273 TraceCheckUtils]: 68: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post15 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post15);havoc #t~post15; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:56,403 INFO L273 TraceCheckUtils]: 69: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:56,403 INFO L273 TraceCheckUtils]: 70: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,441 INFO L273 TraceCheckUtils]: 71: Hoare triple {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is VALID [2018-11-23 10:42:56,442 INFO L273 TraceCheckUtils]: 72: Hoare triple {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:56,561 INFO L273 TraceCheckUtils]: 73: Hoare triple {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:56,562 INFO L273 TraceCheckUtils]: 74: Hoare triple {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:56,578 INFO L273 TraceCheckUtils]: 75: Hoare triple {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem18 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem18);havoc #t~mem18; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,579 INFO L273 TraceCheckUtils]: 76: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,579 INFO L273 TraceCheckUtils]: 77: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,579 INFO L273 TraceCheckUtils]: 78: Hoare triple {6155#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} ~i~0 := 0bv32; {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,580 INFO L273 TraceCheckUtils]: 79: Hoare triple {6180#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:56,581 INFO L273 TraceCheckUtils]: 80: Hoare triple {6184#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:56,581 INFO L273 TraceCheckUtils]: 81: Hoare triple {6188#(and (= main_~sum~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:56,583 INFO L273 TraceCheckUtils]: 82: Hoare triple {6192#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) main_~sum~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:56,845 INFO L273 TraceCheckUtils]: 83: Hoare triple {6196#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem20 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvadd32(~sum~0, #t~mem20);havoc #t~mem20; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:56,846 INFO L273 TraceCheckUtils]: 84: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post19 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post19);havoc #t~post19; {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:56,847 INFO L273 TraceCheckUtils]: 85: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:42:56,848 INFO L273 TraceCheckUtils]: 86: Hoare triple {6200#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:42:58,851 INFO L273 TraceCheckUtils]: 87: Hoare triple {6210#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} is UNKNOWN [2018-11-23 10:42:58,853 INFO L273 TraceCheckUtils]: 88: Hoare triple {6214#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= main_~sum~0 (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))))} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:58,911 INFO L273 TraceCheckUtils]: 89: Hoare triple {6218#(and (= main_~sum~0 (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:42:58,912 INFO L273 TraceCheckUtils]: 90: Hoare triple {6222#(and (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))))) main_~sum~0) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:42:58,931 INFO L273 TraceCheckUtils]: 91: Hoare triple {6226#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (bvneg (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (bvneg (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) main_~sum~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem22 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~sum~0 := ~bvsub32(~sum~0, #t~mem22);havoc #t~mem22; {6422#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:42:58,948 INFO L273 TraceCheckUtils]: 92: Hoare triple {6422#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} #t~post21 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post21);havoc #t~post21; {6422#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:42:58,949 INFO L273 TraceCheckUtils]: 93: Hoare triple {6422#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} assume !~bvslt32(~i~0, ~SIZE~0); {6422#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} is VALID [2018-11-23 10:42:58,950 INFO L256 TraceCheckUtils]: 94: Hoare triple {6422#(exists ((v_arrayElimCell_10 (_ BitVec 32)) (v_arrayElimCell_11 (_ BitVec 32)) (v_arrayElimCell_12 (_ BitVec 32))) (= main_~sum~0 (bvadd (bvneg v_arrayElimCell_11) (bvneg v_arrayElimCell_12) v_arrayElimCell_10 v_arrayElimCell_11 v_arrayElimCell_12 (bvneg v_arrayElimCell_10))))} call __VERIFIER_assert((if 0bv32 == ~sum~0 then 1bv32 else 0bv32)); {6432#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:42:58,950 INFO L273 TraceCheckUtils]: 95: Hoare triple {6432#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {6436#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:42:58,950 INFO L273 TraceCheckUtils]: 96: Hoare triple {6436#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {6133#false} is VALID [2018-11-23 10:42:58,951 INFO L273 TraceCheckUtils]: 97: Hoare triple {6133#false} assume !false; {6133#false} is VALID [2018-11-23 10:42:58,992 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 10:42:58,993 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:43:13,623 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 43 [2018-11-23 10:43:19,658 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:43:19,659 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:43:19,739 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:43:19,787 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:43:19,787 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:43:19,789 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:43:19,878 INFO L303 Elim1Store]: Index analysis took 233 ms [2018-11-23 10:43:20,023 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 9 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 9 case distinctions, treesize of input 43 treesize of output 194 [2018-11-23 10:43:20,023 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 9