java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/array-industry-pattern/array_monotonic_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 12:11:10,441 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 12:11:10,443 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 12:11:10,463 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 12:11:10,463 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 12:11:10,464 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 12:11:10,467 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 12:11:10,469 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 12:11:10,472 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 12:11:10,474 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 12:11:10,476 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 12:11:10,476 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 12:11:10,477 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 12:11:10,479 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 12:11:10,480 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 12:11:10,481 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 12:11:10,483 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 12:11:10,485 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 12:11:10,487 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 12:11:10,488 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 12:11:10,489 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 12:11:10,490 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 12:11:10,493 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 12:11:10,493 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 12:11:10,493 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 12:11:10,494 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 12:11:10,496 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 12:11:10,496 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 12:11:10,497 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 12:11:10,498 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 12:11:10,499 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 12:11:10,500 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-11-23 12:11:10,502 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 12:11:10,532 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 12:11:10,532 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 12:11:10,534 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 12:11:10,534 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 12:11:10,535 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 12:11:10,535 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 12:11:10,535 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 12:11:10,535 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 12:11:10,537 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 12:11:10,537 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 12:11:10,537 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 12:11:10,537 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 12:11:10,537 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 12:11:10,538 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 12:11:10,538 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 12:11:10,538 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 12:11:10,538 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 12:11:10,538 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 12:11:10,539 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 12:11:10,540 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 12:11:10,540 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 12:11:10,540 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 12:11:10,540 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 12:11:10,541 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 12:11:10,541 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 12:11:10,541 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 12:11:10,542 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 12:11:10,542 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 12:11:10,542 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 12:11:10,542 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 12:11:10,542 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 12:11:10,591 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 12:11:10,608 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 12:11:10,612 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 12:11:10,614 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 12:11:10,614 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 12:11:10,615 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-industry-pattern/array_monotonic_true-unreach-call_true-termination.i [2018-11-23 12:11:10,682 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13b2fde4d/87390b24854d4ff7b35fae67a14ca960/FLAGab317a3a5 [2018-11-23 12:11:11,179 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 12:11:11,180 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-industry-pattern/array_monotonic_true-unreach-call_true-termination.i [2018-11-23 12:11:11,186 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13b2fde4d/87390b24854d4ff7b35fae67a14ca960/FLAGab317a3a5 [2018-11-23 12:11:11,541 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13b2fde4d/87390b24854d4ff7b35fae67a14ca960 [2018-11-23 12:11:11,553 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 12:11:11,555 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 12:11:11,556 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 12:11:11,557 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 12:11:11,563 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 12:11:11,565 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,568 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@78b6fda1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11, skipping insertion in model container [2018-11-23 12:11:11,568 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,579 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 12:11:11,606 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 12:11:11,842 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 12:11:11,848 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 12:11:11,881 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 12:11:11,913 INFO L195 MainTranslator]: Completed translation [2018-11-23 12:11:11,914 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11 WrapperNode [2018-11-23 12:11:11,914 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 12:11:11,915 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 12:11:11,916 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 12:11:11,916 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 12:11:11,927 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,938 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,948 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 12:11:11,949 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 12:11:11,949 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 12:11:11,949 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 12:11:11,961 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,961 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,964 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,964 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,990 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:11,999 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:12,002 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... [2018-11-23 12:11:12,004 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 12:11:12,005 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 12:11:12,005 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 12:11:12,005 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 12:11:12,006 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 12:11:12,145 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 12:11:12,145 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 12:11:12,146 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 12:11:12,146 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 12:11:12,146 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 12:11:12,146 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 12:11:12,146 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 12:11:12,146 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 12:11:12,147 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 12:11:12,147 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 12:11:12,147 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 12:11:12,147 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 12:11:12,729 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 12:11:12,730 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-11-23 12:11:12,730 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 12:11:12 BoogieIcfgContainer [2018-11-23 12:11:12,730 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 12:11:12,731 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 12:11:12,732 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 12:11:12,735 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 12:11:12,735 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 12:11:11" (1/3) ... [2018-11-23 12:11:12,736 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24de06e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 12:11:12, skipping insertion in model container [2018-11-23 12:11:12,737 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 12:11:11" (2/3) ... [2018-11-23 12:11:12,737 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24de06e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 12:11:12, skipping insertion in model container [2018-11-23 12:11:12,737 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 12:11:12" (3/3) ... [2018-11-23 12:11:12,739 INFO L112 eAbstractionObserver]: Analyzing ICFG array_monotonic_true-unreach-call_true-termination.i [2018-11-23 12:11:12,750 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 12:11:12,759 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 12:11:12,778 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 12:11:12,822 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 12:11:12,823 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 12:11:12,823 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 12:11:12,823 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 12:11:12,824 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 12:11:12,824 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 12:11:12,824 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 12:11:12,824 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 12:11:12,824 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 12:11:12,844 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states. [2018-11-23 12:11:12,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 12:11:12,850 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:12,852 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:12,854 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:12,860 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:12,861 INFO L82 PathProgramCache]: Analyzing trace with hash 547567586, now seen corresponding path program 1 times [2018-11-23 12:11:12,863 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:12,864 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:12,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:12,922 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:12,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:12,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:13,032 INFO L256 TraceCheckUtils]: 0: Hoare triple {29#true} call ULTIMATE.init(); {29#true} is VALID [2018-11-23 12:11:13,036 INFO L273 TraceCheckUtils]: 1: Hoare triple {29#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {29#true} is VALID [2018-11-23 12:11:13,037 INFO L273 TraceCheckUtils]: 2: Hoare triple {29#true} assume true; {29#true} is VALID [2018-11-23 12:11:13,038 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {29#true} {29#true} #59#return; {29#true} is VALID [2018-11-23 12:11:13,038 INFO L256 TraceCheckUtils]: 4: Hoare triple {29#true} call #t~ret4 := main(); {29#true} is VALID [2018-11-23 12:11:13,038 INFO L273 TraceCheckUtils]: 5: Hoare triple {29#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {29#true} is VALID [2018-11-23 12:11:13,042 INFO L273 TraceCheckUtils]: 6: Hoare triple {29#true} assume !true; {30#false} is VALID [2018-11-23 12:11:13,042 INFO L273 TraceCheckUtils]: 7: Hoare triple {30#false} ~i~0 := 0; {30#false} is VALID [2018-11-23 12:11:13,042 INFO L273 TraceCheckUtils]: 8: Hoare triple {30#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {30#false} is VALID [2018-11-23 12:11:13,043 INFO L273 TraceCheckUtils]: 9: Hoare triple {30#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {30#false} is VALID [2018-11-23 12:11:13,043 INFO L256 TraceCheckUtils]: 10: Hoare triple {30#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {30#false} is VALID [2018-11-23 12:11:13,043 INFO L273 TraceCheckUtils]: 11: Hoare triple {30#false} ~cond := #in~cond; {30#false} is VALID [2018-11-23 12:11:13,044 INFO L273 TraceCheckUtils]: 12: Hoare triple {30#false} assume 0 == ~cond; {30#false} is VALID [2018-11-23 12:11:13,044 INFO L273 TraceCheckUtils]: 13: Hoare triple {30#false} assume !false; {30#false} is VALID [2018-11-23 12:11:13,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:13,050 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 12:11:13,051 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 12:11:13,056 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 12:11:13,060 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:13,064 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 12:11:13,163 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:13,163 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 12:11:13,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 12:11:13,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 12:11:13,179 INFO L87 Difference]: Start difference. First operand 26 states. Second operand 2 states. [2018-11-23 12:11:13,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:13,300 INFO L93 Difference]: Finished difference Result 43 states and 53 transitions. [2018-11-23 12:11:13,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 12:11:13,301 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 12:11:13,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:13,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 12:11:13,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 53 transitions. [2018-11-23 12:11:13,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 12:11:13,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 53 transitions. [2018-11-23 12:11:13,319 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 53 transitions. [2018-11-23 12:11:13,708 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:13,719 INFO L225 Difference]: With dead ends: 43 [2018-11-23 12:11:13,720 INFO L226 Difference]: Without dead ends: 21 [2018-11-23 12:11:13,723 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 12:11:13,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-11-23 12:11:13,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-11-23 12:11:13,768 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:13,768 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand 21 states. [2018-11-23 12:11:13,769 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand 21 states. [2018-11-23 12:11:13,769 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 21 states. [2018-11-23 12:11:13,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:13,773 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2018-11-23 12:11:13,773 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2018-11-23 12:11:13,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:13,774 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:13,774 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand 21 states. [2018-11-23 12:11:13,774 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 21 states. [2018-11-23 12:11:13,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:13,779 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2018-11-23 12:11:13,779 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2018-11-23 12:11:13,780 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:13,780 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:13,780 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:13,781 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:13,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 12:11:13,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 24 transitions. [2018-11-23 12:11:13,785 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 24 transitions. Word has length 14 [2018-11-23 12:11:13,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:13,786 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 24 transitions. [2018-11-23 12:11:13,786 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 12:11:13,786 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2018-11-23 12:11:13,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 12:11:13,787 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:13,787 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:13,787 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:13,788 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:13,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1443476915, now seen corresponding path program 1 times [2018-11-23 12:11:13,788 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:13,788 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:13,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:13,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:13,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:13,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:13,892 INFO L256 TraceCheckUtils]: 0: Hoare triple {158#true} call ULTIMATE.init(); {158#true} is VALID [2018-11-23 12:11:13,892 INFO L273 TraceCheckUtils]: 1: Hoare triple {158#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {158#true} is VALID [2018-11-23 12:11:13,893 INFO L273 TraceCheckUtils]: 2: Hoare triple {158#true} assume true; {158#true} is VALID [2018-11-23 12:11:13,893 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {158#true} {158#true} #59#return; {158#true} is VALID [2018-11-23 12:11:13,893 INFO L256 TraceCheckUtils]: 4: Hoare triple {158#true} call #t~ret4 := main(); {158#true} is VALID [2018-11-23 12:11:13,911 INFO L273 TraceCheckUtils]: 5: Hoare triple {158#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {160#(= main_~i~0 0)} is VALID [2018-11-23 12:11:13,920 INFO L273 TraceCheckUtils]: 6: Hoare triple {160#(= main_~i~0 0)} assume !(~i~0 < 100000); {159#false} is VALID [2018-11-23 12:11:13,921 INFO L273 TraceCheckUtils]: 7: Hoare triple {159#false} ~i~0 := 0; {159#false} is VALID [2018-11-23 12:11:13,921 INFO L273 TraceCheckUtils]: 8: Hoare triple {159#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {159#false} is VALID [2018-11-23 12:11:13,921 INFO L273 TraceCheckUtils]: 9: Hoare triple {159#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {159#false} is VALID [2018-11-23 12:11:13,922 INFO L256 TraceCheckUtils]: 10: Hoare triple {159#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {159#false} is VALID [2018-11-23 12:11:13,922 INFO L273 TraceCheckUtils]: 11: Hoare triple {159#false} ~cond := #in~cond; {159#false} is VALID [2018-11-23 12:11:13,923 INFO L273 TraceCheckUtils]: 12: Hoare triple {159#false} assume 0 == ~cond; {159#false} is VALID [2018-11-23 12:11:13,923 INFO L273 TraceCheckUtils]: 13: Hoare triple {159#false} assume !false; {159#false} is VALID [2018-11-23 12:11:13,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:13,925 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 12:11:13,925 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 12:11:13,926 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 12:11:13,927 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:13,927 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 12:11:14,056 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:14,056 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 12:11:14,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 12:11:14,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 12:11:14,057 INFO L87 Difference]: Start difference. First operand 21 states and 24 transitions. Second operand 3 states. [2018-11-23 12:11:14,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:14,232 INFO L93 Difference]: Finished difference Result 41 states and 49 transitions. [2018-11-23 12:11:14,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 12:11:14,232 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 12:11:14,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:14,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 12:11:14,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2018-11-23 12:11:14,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 12:11:14,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2018-11-23 12:11:14,243 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 49 transitions. [2018-11-23 12:11:14,520 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:14,522 INFO L225 Difference]: With dead ends: 41 [2018-11-23 12:11:14,522 INFO L226 Difference]: Without dead ends: 29 [2018-11-23 12:11:14,525 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 12:11:14,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-23 12:11:14,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2018-11-23 12:11:14,652 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:14,653 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 22 states. [2018-11-23 12:11:14,653 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 22 states. [2018-11-23 12:11:14,653 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 22 states. [2018-11-23 12:11:14,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:14,658 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2018-11-23 12:11:14,658 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 35 transitions. [2018-11-23 12:11:14,658 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:14,659 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:14,659 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 29 states. [2018-11-23 12:11:14,659 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 29 states. [2018-11-23 12:11:14,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:14,662 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2018-11-23 12:11:14,663 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 35 transitions. [2018-11-23 12:11:14,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:14,664 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:14,664 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:14,664 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:14,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 12:11:14,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 25 transitions. [2018-11-23 12:11:14,666 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 25 transitions. Word has length 14 [2018-11-23 12:11:14,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:14,667 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 25 transitions. [2018-11-23 12:11:14,667 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 12:11:14,667 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 25 transitions. [2018-11-23 12:11:14,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 12:11:14,668 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:14,668 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:14,668 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:14,669 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:14,669 INFO L82 PathProgramCache]: Analyzing trace with hash -1901506806, now seen corresponding path program 1 times [2018-11-23 12:11:14,669 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:14,669 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:14,670 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:14,670 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:14,671 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:14,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:14,840 INFO L256 TraceCheckUtils]: 0: Hoare triple {307#true} call ULTIMATE.init(); {307#true} is VALID [2018-11-23 12:11:14,841 INFO L273 TraceCheckUtils]: 1: Hoare triple {307#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {307#true} is VALID [2018-11-23 12:11:14,841 INFO L273 TraceCheckUtils]: 2: Hoare triple {307#true} assume true; {307#true} is VALID [2018-11-23 12:11:14,841 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {307#true} {307#true} #59#return; {307#true} is VALID [2018-11-23 12:11:14,841 INFO L256 TraceCheckUtils]: 4: Hoare triple {307#true} call #t~ret4 := main(); {307#true} is VALID [2018-11-23 12:11:14,844 INFO L273 TraceCheckUtils]: 5: Hoare triple {307#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {309#(= main_~i~0 0)} is VALID [2018-11-23 12:11:14,845 INFO L273 TraceCheckUtils]: 6: Hoare triple {309#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {309#(= main_~i~0 0)} is VALID [2018-11-23 12:11:14,846 INFO L273 TraceCheckUtils]: 7: Hoare triple {309#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {309#(= main_~i~0 0)} is VALID [2018-11-23 12:11:14,847 INFO L273 TraceCheckUtils]: 8: Hoare triple {309#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {310#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:14,848 INFO L273 TraceCheckUtils]: 9: Hoare triple {310#(<= main_~i~0 2)} assume !(~i~0 < 100000); {308#false} is VALID [2018-11-23 12:11:14,849 INFO L273 TraceCheckUtils]: 10: Hoare triple {308#false} ~i~0 := 0; {308#false} is VALID [2018-11-23 12:11:14,849 INFO L273 TraceCheckUtils]: 11: Hoare triple {308#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {308#false} is VALID [2018-11-23 12:11:14,850 INFO L273 TraceCheckUtils]: 12: Hoare triple {308#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {308#false} is VALID [2018-11-23 12:11:14,850 INFO L256 TraceCheckUtils]: 13: Hoare triple {308#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {308#false} is VALID [2018-11-23 12:11:14,850 INFO L273 TraceCheckUtils]: 14: Hoare triple {308#false} ~cond := #in~cond; {308#false} is VALID [2018-11-23 12:11:14,851 INFO L273 TraceCheckUtils]: 15: Hoare triple {308#false} assume 0 == ~cond; {308#false} is VALID [2018-11-23 12:11:14,851 INFO L273 TraceCheckUtils]: 16: Hoare triple {308#false} assume !false; {308#false} is VALID [2018-11-23 12:11:14,853 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:14,853 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:14,853 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:14,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:14,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:14,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:14,935 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:15,258 INFO L256 TraceCheckUtils]: 0: Hoare triple {307#true} call ULTIMATE.init(); {307#true} is VALID [2018-11-23 12:11:15,258 INFO L273 TraceCheckUtils]: 1: Hoare triple {307#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {307#true} is VALID [2018-11-23 12:11:15,259 INFO L273 TraceCheckUtils]: 2: Hoare triple {307#true} assume true; {307#true} is VALID [2018-11-23 12:11:15,259 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {307#true} {307#true} #59#return; {307#true} is VALID [2018-11-23 12:11:15,259 INFO L256 TraceCheckUtils]: 4: Hoare triple {307#true} call #t~ret4 := main(); {307#true} is VALID [2018-11-23 12:11:15,261 INFO L273 TraceCheckUtils]: 5: Hoare triple {307#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {329#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:15,264 INFO L273 TraceCheckUtils]: 6: Hoare triple {329#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {329#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:15,265 INFO L273 TraceCheckUtils]: 7: Hoare triple {329#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {329#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:15,266 INFO L273 TraceCheckUtils]: 8: Hoare triple {329#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {310#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:15,267 INFO L273 TraceCheckUtils]: 9: Hoare triple {310#(<= main_~i~0 2)} assume !(~i~0 < 100000); {308#false} is VALID [2018-11-23 12:11:15,267 INFO L273 TraceCheckUtils]: 10: Hoare triple {308#false} ~i~0 := 0; {308#false} is VALID [2018-11-23 12:11:15,267 INFO L273 TraceCheckUtils]: 11: Hoare triple {308#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {308#false} is VALID [2018-11-23 12:11:15,268 INFO L273 TraceCheckUtils]: 12: Hoare triple {308#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {308#false} is VALID [2018-11-23 12:11:15,268 INFO L256 TraceCheckUtils]: 13: Hoare triple {308#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {308#false} is VALID [2018-11-23 12:11:15,268 INFO L273 TraceCheckUtils]: 14: Hoare triple {308#false} ~cond := #in~cond; {308#false} is VALID [2018-11-23 12:11:15,269 INFO L273 TraceCheckUtils]: 15: Hoare triple {308#false} assume 0 == ~cond; {308#false} is VALID [2018-11-23 12:11:15,269 INFO L273 TraceCheckUtils]: 16: Hoare triple {308#false} assume !false; {308#false} is VALID [2018-11-23 12:11:15,270 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:15,293 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:15,293 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-23 12:11:15,293 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-11-23 12:11:15,294 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:15,294 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 12:11:15,347 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:15,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 12:11:15,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 12:11:15,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 12:11:15,348 INFO L87 Difference]: Start difference. First operand 22 states and 25 transitions. Second operand 5 states. [2018-11-23 12:11:15,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:15,787 INFO L93 Difference]: Finished difference Result 49 states and 60 transitions. [2018-11-23 12:11:15,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 12:11:15,787 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-11-23 12:11:15,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:15,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 12:11:15,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 60 transitions. [2018-11-23 12:11:15,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 12:11:15,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 60 transitions. [2018-11-23 12:11:15,798 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 60 transitions. [2018-11-23 12:11:15,943 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:15,946 INFO L225 Difference]: With dead ends: 49 [2018-11-23 12:11:15,946 INFO L226 Difference]: Without dead ends: 37 [2018-11-23 12:11:15,947 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 12:11:15,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-11-23 12:11:15,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 25. [2018-11-23 12:11:15,973 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:15,973 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand 25 states. [2018-11-23 12:11:15,974 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 25 states. [2018-11-23 12:11:15,974 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 25 states. [2018-11-23 12:11:15,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:15,978 INFO L93 Difference]: Finished difference Result 37 states and 46 transitions. [2018-11-23 12:11:15,978 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 46 transitions. [2018-11-23 12:11:15,979 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:15,979 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:15,979 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand 37 states. [2018-11-23 12:11:15,979 INFO L87 Difference]: Start difference. First operand 25 states. Second operand 37 states. [2018-11-23 12:11:15,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:15,983 INFO L93 Difference]: Finished difference Result 37 states and 46 transitions. [2018-11-23 12:11:15,983 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 46 transitions. [2018-11-23 12:11:15,984 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:15,984 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:15,984 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:15,985 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:15,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 12:11:15,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2018-11-23 12:11:15,987 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 17 [2018-11-23 12:11:15,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:15,987 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2018-11-23 12:11:15,987 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 12:11:15,987 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2018-11-23 12:11:15,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 12:11:15,988 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:15,989 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:15,989 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:15,989 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:15,989 INFO L82 PathProgramCache]: Analyzing trace with hash -1958890195, now seen corresponding path program 2 times [2018-11-23 12:11:15,989 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:15,989 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:15,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:15,991 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:15,991 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:16,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:16,145 INFO L256 TraceCheckUtils]: 0: Hoare triple {537#true} call ULTIMATE.init(); {537#true} is VALID [2018-11-23 12:11:16,146 INFO L273 TraceCheckUtils]: 1: Hoare triple {537#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {537#true} is VALID [2018-11-23 12:11:16,146 INFO L273 TraceCheckUtils]: 2: Hoare triple {537#true} assume true; {537#true} is VALID [2018-11-23 12:11:16,147 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {537#true} {537#true} #59#return; {537#true} is VALID [2018-11-23 12:11:16,147 INFO L256 TraceCheckUtils]: 4: Hoare triple {537#true} call #t~ret4 := main(); {537#true} is VALID [2018-11-23 12:11:16,148 INFO L273 TraceCheckUtils]: 5: Hoare triple {537#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {539#(= main_~i~0 0)} is VALID [2018-11-23 12:11:16,151 INFO L273 TraceCheckUtils]: 6: Hoare triple {539#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {539#(= main_~i~0 0)} is VALID [2018-11-23 12:11:16,151 INFO L273 TraceCheckUtils]: 7: Hoare triple {539#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {539#(= main_~i~0 0)} is VALID [2018-11-23 12:11:16,153 INFO L273 TraceCheckUtils]: 8: Hoare triple {539#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {540#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,153 INFO L273 TraceCheckUtils]: 9: Hoare triple {540#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {540#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,164 INFO L273 TraceCheckUtils]: 10: Hoare triple {540#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {540#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,175 INFO L273 TraceCheckUtils]: 11: Hoare triple {540#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {541#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:16,176 INFO L273 TraceCheckUtils]: 12: Hoare triple {541#(<= main_~i~0 4)} assume !(~i~0 < 100000); {538#false} is VALID [2018-11-23 12:11:16,176 INFO L273 TraceCheckUtils]: 13: Hoare triple {538#false} ~i~0 := 0; {538#false} is VALID [2018-11-23 12:11:16,176 INFO L273 TraceCheckUtils]: 14: Hoare triple {538#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {538#false} is VALID [2018-11-23 12:11:16,176 INFO L273 TraceCheckUtils]: 15: Hoare triple {538#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {538#false} is VALID [2018-11-23 12:11:16,177 INFO L256 TraceCheckUtils]: 16: Hoare triple {538#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {538#false} is VALID [2018-11-23 12:11:16,177 INFO L273 TraceCheckUtils]: 17: Hoare triple {538#false} ~cond := #in~cond; {538#false} is VALID [2018-11-23 12:11:16,177 INFO L273 TraceCheckUtils]: 18: Hoare triple {538#false} assume 0 == ~cond; {538#false} is VALID [2018-11-23 12:11:16,177 INFO L273 TraceCheckUtils]: 19: Hoare triple {538#false} assume !false; {538#false} is VALID [2018-11-23 12:11:16,178 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:16,179 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:16,179 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:16,190 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 12:11:16,216 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 12:11:16,216 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:16,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:16,225 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:16,312 INFO L256 TraceCheckUtils]: 0: Hoare triple {537#true} call ULTIMATE.init(); {537#true} is VALID [2018-11-23 12:11:16,312 INFO L273 TraceCheckUtils]: 1: Hoare triple {537#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {537#true} is VALID [2018-11-23 12:11:16,313 INFO L273 TraceCheckUtils]: 2: Hoare triple {537#true} assume true; {537#true} is VALID [2018-11-23 12:11:16,313 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {537#true} {537#true} #59#return; {537#true} is VALID [2018-11-23 12:11:16,313 INFO L256 TraceCheckUtils]: 4: Hoare triple {537#true} call #t~ret4 := main(); {537#true} is VALID [2018-11-23 12:11:16,316 INFO L273 TraceCheckUtils]: 5: Hoare triple {537#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {560#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:16,317 INFO L273 TraceCheckUtils]: 6: Hoare triple {560#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {560#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:16,318 INFO L273 TraceCheckUtils]: 7: Hoare triple {560#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {560#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:16,318 INFO L273 TraceCheckUtils]: 8: Hoare triple {560#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {540#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,319 INFO L273 TraceCheckUtils]: 9: Hoare triple {540#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {540#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,319 INFO L273 TraceCheckUtils]: 10: Hoare triple {540#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {540#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,323 INFO L273 TraceCheckUtils]: 11: Hoare triple {540#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {541#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:16,324 INFO L273 TraceCheckUtils]: 12: Hoare triple {541#(<= main_~i~0 4)} assume !(~i~0 < 100000); {538#false} is VALID [2018-11-23 12:11:16,324 INFO L273 TraceCheckUtils]: 13: Hoare triple {538#false} ~i~0 := 0; {538#false} is VALID [2018-11-23 12:11:16,324 INFO L273 TraceCheckUtils]: 14: Hoare triple {538#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {538#false} is VALID [2018-11-23 12:11:16,325 INFO L273 TraceCheckUtils]: 15: Hoare triple {538#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {538#false} is VALID [2018-11-23 12:11:16,325 INFO L256 TraceCheckUtils]: 16: Hoare triple {538#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {538#false} is VALID [2018-11-23 12:11:16,325 INFO L273 TraceCheckUtils]: 17: Hoare triple {538#false} ~cond := #in~cond; {538#false} is VALID [2018-11-23 12:11:16,325 INFO L273 TraceCheckUtils]: 18: Hoare triple {538#false} assume 0 == ~cond; {538#false} is VALID [2018-11-23 12:11:16,326 INFO L273 TraceCheckUtils]: 19: Hoare triple {538#false} assume !false; {538#false} is VALID [2018-11-23 12:11:16,326 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:16,345 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:16,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-11-23 12:11:16,346 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-11-23 12:11:16,346 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:16,347 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 12:11:16,375 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:16,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 12:11:16,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 12:11:16,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-23 12:11:16,376 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 6 states. [2018-11-23 12:11:16,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:16,599 INFO L93 Difference]: Finished difference Result 57 states and 71 transitions. [2018-11-23 12:11:16,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 12:11:16,599 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-11-23 12:11:16,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:16,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 12:11:16,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 71 transitions. [2018-11-23 12:11:16,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 12:11:16,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 71 transitions. [2018-11-23 12:11:16,606 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 71 transitions. [2018-11-23 12:11:16,715 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:16,717 INFO L225 Difference]: With dead ends: 57 [2018-11-23 12:11:16,718 INFO L226 Difference]: Without dead ends: 45 [2018-11-23 12:11:16,718 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-23 12:11:16,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-11-23 12:11:16,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 28. [2018-11-23 12:11:16,753 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:16,754 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand 28 states. [2018-11-23 12:11:16,754 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 28 states. [2018-11-23 12:11:16,754 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 28 states. [2018-11-23 12:11:16,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:16,758 INFO L93 Difference]: Finished difference Result 45 states and 57 transitions. [2018-11-23 12:11:16,759 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 57 transitions. [2018-11-23 12:11:16,760 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:16,760 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:16,761 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 45 states. [2018-11-23 12:11:16,761 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 45 states. [2018-11-23 12:11:16,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:16,768 INFO L93 Difference]: Finished difference Result 45 states and 57 transitions. [2018-11-23 12:11:16,768 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 57 transitions. [2018-11-23 12:11:16,769 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:16,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:16,769 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:16,769 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:16,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-23 12:11:16,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 33 transitions. [2018-11-23 12:11:16,775 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 33 transitions. Word has length 20 [2018-11-23 12:11:16,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:16,775 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 33 transitions. [2018-11-23 12:11:16,775 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 12:11:16,778 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 33 transitions. [2018-11-23 12:11:16,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 12:11:16,779 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:16,779 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:16,780 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:16,780 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:16,780 INFO L82 PathProgramCache]: Analyzing trace with hash -2070448086, now seen corresponding path program 3 times [2018-11-23 12:11:16,780 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:16,781 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:16,782 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:16,784 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:16,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:16,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:16,948 INFO L256 TraceCheckUtils]: 0: Hoare triple {808#true} call ULTIMATE.init(); {808#true} is VALID [2018-11-23 12:11:16,948 INFO L273 TraceCheckUtils]: 1: Hoare triple {808#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {808#true} is VALID [2018-11-23 12:11:16,948 INFO L273 TraceCheckUtils]: 2: Hoare triple {808#true} assume true; {808#true} is VALID [2018-11-23 12:11:16,949 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {808#true} {808#true} #59#return; {808#true} is VALID [2018-11-23 12:11:16,949 INFO L256 TraceCheckUtils]: 4: Hoare triple {808#true} call #t~ret4 := main(); {808#true} is VALID [2018-11-23 12:11:16,954 INFO L273 TraceCheckUtils]: 5: Hoare triple {808#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {810#(= main_~i~0 0)} is VALID [2018-11-23 12:11:16,955 INFO L273 TraceCheckUtils]: 6: Hoare triple {810#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {810#(= main_~i~0 0)} is VALID [2018-11-23 12:11:16,955 INFO L273 TraceCheckUtils]: 7: Hoare triple {810#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {810#(= main_~i~0 0)} is VALID [2018-11-23 12:11:16,956 INFO L273 TraceCheckUtils]: 8: Hoare triple {810#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {811#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,956 INFO L273 TraceCheckUtils]: 9: Hoare triple {811#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {811#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,960 INFO L273 TraceCheckUtils]: 10: Hoare triple {811#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {811#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:16,961 INFO L273 TraceCheckUtils]: 11: Hoare triple {811#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {812#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:16,962 INFO L273 TraceCheckUtils]: 12: Hoare triple {812#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {812#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:16,962 INFO L273 TraceCheckUtils]: 13: Hoare triple {812#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {812#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:16,964 INFO L273 TraceCheckUtils]: 14: Hoare triple {812#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {813#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:16,964 INFO L273 TraceCheckUtils]: 15: Hoare triple {813#(<= main_~i~0 6)} assume !(~i~0 < 100000); {809#false} is VALID [2018-11-23 12:11:16,965 INFO L273 TraceCheckUtils]: 16: Hoare triple {809#false} ~i~0 := 0; {809#false} is VALID [2018-11-23 12:11:16,965 INFO L273 TraceCheckUtils]: 17: Hoare triple {809#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {809#false} is VALID [2018-11-23 12:11:16,965 INFO L273 TraceCheckUtils]: 18: Hoare triple {809#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {809#false} is VALID [2018-11-23 12:11:16,966 INFO L256 TraceCheckUtils]: 19: Hoare triple {809#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {809#false} is VALID [2018-11-23 12:11:16,966 INFO L273 TraceCheckUtils]: 20: Hoare triple {809#false} ~cond := #in~cond; {809#false} is VALID [2018-11-23 12:11:16,967 INFO L273 TraceCheckUtils]: 21: Hoare triple {809#false} assume 0 == ~cond; {809#false} is VALID [2018-11-23 12:11:16,967 INFO L273 TraceCheckUtils]: 22: Hoare triple {809#false} assume !false; {809#false} is VALID [2018-11-23 12:11:16,968 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:16,969 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:16,969 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:16,985 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 12:11:17,007 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 12:11:17,007 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:17,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:17,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:17,110 INFO L256 TraceCheckUtils]: 0: Hoare triple {808#true} call ULTIMATE.init(); {808#true} is VALID [2018-11-23 12:11:17,110 INFO L273 TraceCheckUtils]: 1: Hoare triple {808#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {808#true} is VALID [2018-11-23 12:11:17,111 INFO L273 TraceCheckUtils]: 2: Hoare triple {808#true} assume true; {808#true} is VALID [2018-11-23 12:11:17,111 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {808#true} {808#true} #59#return; {808#true} is VALID [2018-11-23 12:11:17,111 INFO L256 TraceCheckUtils]: 4: Hoare triple {808#true} call #t~ret4 := main(); {808#true} is VALID [2018-11-23 12:11:17,114 INFO L273 TraceCheckUtils]: 5: Hoare triple {808#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {832#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:17,115 INFO L273 TraceCheckUtils]: 6: Hoare triple {832#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {832#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:17,115 INFO L273 TraceCheckUtils]: 7: Hoare triple {832#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {832#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:17,116 INFO L273 TraceCheckUtils]: 8: Hoare triple {832#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {811#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:17,116 INFO L273 TraceCheckUtils]: 9: Hoare triple {811#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {811#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:17,117 INFO L273 TraceCheckUtils]: 10: Hoare triple {811#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {811#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:17,117 INFO L273 TraceCheckUtils]: 11: Hoare triple {811#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {812#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:17,118 INFO L273 TraceCheckUtils]: 12: Hoare triple {812#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {812#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:17,118 INFO L273 TraceCheckUtils]: 13: Hoare triple {812#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {812#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:17,119 INFO L273 TraceCheckUtils]: 14: Hoare triple {812#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {813#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:17,120 INFO L273 TraceCheckUtils]: 15: Hoare triple {813#(<= main_~i~0 6)} assume !(~i~0 < 100000); {809#false} is VALID [2018-11-23 12:11:17,121 INFO L273 TraceCheckUtils]: 16: Hoare triple {809#false} ~i~0 := 0; {809#false} is VALID [2018-11-23 12:11:17,121 INFO L273 TraceCheckUtils]: 17: Hoare triple {809#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {809#false} is VALID [2018-11-23 12:11:17,121 INFO L273 TraceCheckUtils]: 18: Hoare triple {809#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {809#false} is VALID [2018-11-23 12:11:17,122 INFO L256 TraceCheckUtils]: 19: Hoare triple {809#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {809#false} is VALID [2018-11-23 12:11:17,122 INFO L273 TraceCheckUtils]: 20: Hoare triple {809#false} ~cond := #in~cond; {809#false} is VALID [2018-11-23 12:11:17,122 INFO L273 TraceCheckUtils]: 21: Hoare triple {809#false} assume 0 == ~cond; {809#false} is VALID [2018-11-23 12:11:17,122 INFO L273 TraceCheckUtils]: 22: Hoare triple {809#false} assume !false; {809#false} is VALID [2018-11-23 12:11:17,124 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:17,142 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:17,143 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-11-23 12:11:17,143 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-11-23 12:11:17,143 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:17,144 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-23 12:11:17,180 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:17,180 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 12:11:17,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 12:11:17,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-23 12:11:17,181 INFO L87 Difference]: Start difference. First operand 28 states and 33 transitions. Second operand 7 states. [2018-11-23 12:11:17,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:17,498 INFO L93 Difference]: Finished difference Result 65 states and 82 transitions. [2018-11-23 12:11:17,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 12:11:17,498 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-11-23 12:11:17,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:17,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 12:11:17,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 82 transitions. [2018-11-23 12:11:17,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 12:11:17,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 82 transitions. [2018-11-23 12:11:17,505 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 82 transitions. [2018-11-23 12:11:17,599 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:17,602 INFO L225 Difference]: With dead ends: 65 [2018-11-23 12:11:17,602 INFO L226 Difference]: Without dead ends: 53 [2018-11-23 12:11:17,603 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-23 12:11:17,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-23 12:11:17,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 31. [2018-11-23 12:11:17,642 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:17,642 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 31 states. [2018-11-23 12:11:17,642 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 31 states. [2018-11-23 12:11:17,642 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 31 states. [2018-11-23 12:11:17,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:17,646 INFO L93 Difference]: Finished difference Result 53 states and 68 transitions. [2018-11-23 12:11:17,646 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 68 transitions. [2018-11-23 12:11:17,647 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:17,648 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:17,648 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 53 states. [2018-11-23 12:11:17,648 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 53 states. [2018-11-23 12:11:17,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:17,652 INFO L93 Difference]: Finished difference Result 53 states and 68 transitions. [2018-11-23 12:11:17,652 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 68 transitions. [2018-11-23 12:11:17,653 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:17,653 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:17,653 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:17,653 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:17,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 12:11:17,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 37 transitions. [2018-11-23 12:11:17,655 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 37 transitions. Word has length 23 [2018-11-23 12:11:17,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:17,656 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 37 transitions. [2018-11-23 12:11:17,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 12:11:17,656 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 37 transitions. [2018-11-23 12:11:17,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-23 12:11:17,657 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:17,657 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:17,657 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:17,658 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:17,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1186891763, now seen corresponding path program 4 times [2018-11-23 12:11:17,658 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:17,658 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:17,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:17,659 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:17,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:17,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:17,825 INFO L256 TraceCheckUtils]: 0: Hoare triple {1120#true} call ULTIMATE.init(); {1120#true} is VALID [2018-11-23 12:11:17,826 INFO L273 TraceCheckUtils]: 1: Hoare triple {1120#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {1120#true} is VALID [2018-11-23 12:11:17,826 INFO L273 TraceCheckUtils]: 2: Hoare triple {1120#true} assume true; {1120#true} is VALID [2018-11-23 12:11:17,826 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1120#true} {1120#true} #59#return; {1120#true} is VALID [2018-11-23 12:11:17,827 INFO L256 TraceCheckUtils]: 4: Hoare triple {1120#true} call #t~ret4 := main(); {1120#true} is VALID [2018-11-23 12:11:17,827 INFO L273 TraceCheckUtils]: 5: Hoare triple {1120#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {1122#(= main_~i~0 0)} is VALID [2018-11-23 12:11:17,828 INFO L273 TraceCheckUtils]: 6: Hoare triple {1122#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1122#(= main_~i~0 0)} is VALID [2018-11-23 12:11:17,828 INFO L273 TraceCheckUtils]: 7: Hoare triple {1122#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1122#(= main_~i~0 0)} is VALID [2018-11-23 12:11:17,829 INFO L273 TraceCheckUtils]: 8: Hoare triple {1122#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {1123#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:17,829 INFO L273 TraceCheckUtils]: 9: Hoare triple {1123#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1123#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:17,829 INFO L273 TraceCheckUtils]: 10: Hoare triple {1123#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1123#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:17,830 INFO L273 TraceCheckUtils]: 11: Hoare triple {1123#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {1124#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:17,831 INFO L273 TraceCheckUtils]: 12: Hoare triple {1124#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1124#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:17,832 INFO L273 TraceCheckUtils]: 13: Hoare triple {1124#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1124#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:17,833 INFO L273 TraceCheckUtils]: 14: Hoare triple {1124#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {1125#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:17,833 INFO L273 TraceCheckUtils]: 15: Hoare triple {1125#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1125#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:17,834 INFO L273 TraceCheckUtils]: 16: Hoare triple {1125#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1125#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:17,835 INFO L273 TraceCheckUtils]: 17: Hoare triple {1125#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {1126#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:17,836 INFO L273 TraceCheckUtils]: 18: Hoare triple {1126#(<= main_~i~0 8)} assume !(~i~0 < 100000); {1121#false} is VALID [2018-11-23 12:11:17,836 INFO L273 TraceCheckUtils]: 19: Hoare triple {1121#false} ~i~0 := 0; {1121#false} is VALID [2018-11-23 12:11:17,836 INFO L273 TraceCheckUtils]: 20: Hoare triple {1121#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1121#false} is VALID [2018-11-23 12:11:17,837 INFO L273 TraceCheckUtils]: 21: Hoare triple {1121#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1121#false} is VALID [2018-11-23 12:11:17,837 INFO L256 TraceCheckUtils]: 22: Hoare triple {1121#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {1121#false} is VALID [2018-11-23 12:11:17,837 INFO L273 TraceCheckUtils]: 23: Hoare triple {1121#false} ~cond := #in~cond; {1121#false} is VALID [2018-11-23 12:11:17,838 INFO L273 TraceCheckUtils]: 24: Hoare triple {1121#false} assume 0 == ~cond; {1121#false} is VALID [2018-11-23 12:11:17,838 INFO L273 TraceCheckUtils]: 25: Hoare triple {1121#false} assume !false; {1121#false} is VALID [2018-11-23 12:11:17,840 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:17,840 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:17,840 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:17,850 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 12:11:17,904 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 12:11:17,904 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:17,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:17,936 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:18,237 INFO L256 TraceCheckUtils]: 0: Hoare triple {1120#true} call ULTIMATE.init(); {1120#true} is VALID [2018-11-23 12:11:18,237 INFO L273 TraceCheckUtils]: 1: Hoare triple {1120#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {1120#true} is VALID [2018-11-23 12:11:18,237 INFO L273 TraceCheckUtils]: 2: Hoare triple {1120#true} assume true; {1120#true} is VALID [2018-11-23 12:11:18,238 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1120#true} {1120#true} #59#return; {1120#true} is VALID [2018-11-23 12:11:18,238 INFO L256 TraceCheckUtils]: 4: Hoare triple {1120#true} call #t~ret4 := main(); {1120#true} is VALID [2018-11-23 12:11:18,239 INFO L273 TraceCheckUtils]: 5: Hoare triple {1120#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {1145#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:18,239 INFO L273 TraceCheckUtils]: 6: Hoare triple {1145#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1145#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:18,240 INFO L273 TraceCheckUtils]: 7: Hoare triple {1145#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1145#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:18,240 INFO L273 TraceCheckUtils]: 8: Hoare triple {1145#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {1123#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:18,241 INFO L273 TraceCheckUtils]: 9: Hoare triple {1123#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1123#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:18,241 INFO L273 TraceCheckUtils]: 10: Hoare triple {1123#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1123#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:18,242 INFO L273 TraceCheckUtils]: 11: Hoare triple {1123#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {1124#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:18,242 INFO L273 TraceCheckUtils]: 12: Hoare triple {1124#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1124#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:18,244 INFO L273 TraceCheckUtils]: 13: Hoare triple {1124#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1124#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:18,246 INFO L273 TraceCheckUtils]: 14: Hoare triple {1124#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {1125#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:18,246 INFO L273 TraceCheckUtils]: 15: Hoare triple {1125#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1125#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:18,247 INFO L273 TraceCheckUtils]: 16: Hoare triple {1125#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1125#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:18,248 INFO L273 TraceCheckUtils]: 17: Hoare triple {1125#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {1126#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:18,250 INFO L273 TraceCheckUtils]: 18: Hoare triple {1126#(<= main_~i~0 8)} assume !(~i~0 < 100000); {1121#false} is VALID [2018-11-23 12:11:18,250 INFO L273 TraceCheckUtils]: 19: Hoare triple {1121#false} ~i~0 := 0; {1121#false} is VALID [2018-11-23 12:11:18,251 INFO L273 TraceCheckUtils]: 20: Hoare triple {1121#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1121#false} is VALID [2018-11-23 12:11:18,251 INFO L273 TraceCheckUtils]: 21: Hoare triple {1121#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1121#false} is VALID [2018-11-23 12:11:18,252 INFO L256 TraceCheckUtils]: 22: Hoare triple {1121#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {1121#false} is VALID [2018-11-23 12:11:18,252 INFO L273 TraceCheckUtils]: 23: Hoare triple {1121#false} ~cond := #in~cond; {1121#false} is VALID [2018-11-23 12:11:18,253 INFO L273 TraceCheckUtils]: 24: Hoare triple {1121#false} assume 0 == ~cond; {1121#false} is VALID [2018-11-23 12:11:18,253 INFO L273 TraceCheckUtils]: 25: Hoare triple {1121#false} assume !false; {1121#false} is VALID [2018-11-23 12:11:18,255 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:18,282 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:18,283 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-11-23 12:11:18,283 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-11-23 12:11:18,283 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:18,284 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 12:11:18,360 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:18,361 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 12:11:18,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 12:11:18,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-23 12:11:18,362 INFO L87 Difference]: Start difference. First operand 31 states and 37 transitions. Second operand 8 states. [2018-11-23 12:11:18,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:18,856 INFO L93 Difference]: Finished difference Result 73 states and 93 transitions. [2018-11-23 12:11:18,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 12:11:18,856 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-11-23 12:11:18,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:18,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 12:11:18,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 93 transitions. [2018-11-23 12:11:18,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 12:11:18,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 93 transitions. [2018-11-23 12:11:18,863 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 93 transitions. [2018-11-23 12:11:18,968 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 93 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:18,972 INFO L225 Difference]: With dead ends: 73 [2018-11-23 12:11:18,972 INFO L226 Difference]: Without dead ends: 61 [2018-11-23 12:11:18,972 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-23 12:11:18,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-11-23 12:11:19,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 34. [2018-11-23 12:11:19,016 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:19,016 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand 34 states. [2018-11-23 12:11:19,017 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 34 states. [2018-11-23 12:11:19,017 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 34 states. [2018-11-23 12:11:19,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:19,021 INFO L93 Difference]: Finished difference Result 61 states and 79 transitions. [2018-11-23 12:11:19,022 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 79 transitions. [2018-11-23 12:11:19,022 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:19,023 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:19,023 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 61 states. [2018-11-23 12:11:19,023 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 61 states. [2018-11-23 12:11:19,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:19,027 INFO L93 Difference]: Finished difference Result 61 states and 79 transitions. [2018-11-23 12:11:19,027 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 79 transitions. [2018-11-23 12:11:19,028 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:19,028 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:19,028 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:19,028 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:19,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-11-23 12:11:19,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 41 transitions. [2018-11-23 12:11:19,030 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 41 transitions. Word has length 26 [2018-11-23 12:11:19,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:19,031 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 41 transitions. [2018-11-23 12:11:19,031 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 12:11:19,031 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2018-11-23 12:11:19,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 12:11:19,032 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:19,032 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:19,033 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:19,033 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:19,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1279936842, now seen corresponding path program 5 times [2018-11-23 12:11:19,033 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:19,033 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:19,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:19,035 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:19,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:19,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:19,251 INFO L256 TraceCheckUtils]: 0: Hoare triple {1473#true} call ULTIMATE.init(); {1473#true} is VALID [2018-11-23 12:11:19,251 INFO L273 TraceCheckUtils]: 1: Hoare triple {1473#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {1473#true} is VALID [2018-11-23 12:11:19,251 INFO L273 TraceCheckUtils]: 2: Hoare triple {1473#true} assume true; {1473#true} is VALID [2018-11-23 12:11:19,251 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1473#true} {1473#true} #59#return; {1473#true} is VALID [2018-11-23 12:11:19,252 INFO L256 TraceCheckUtils]: 4: Hoare triple {1473#true} call #t~ret4 := main(); {1473#true} is VALID [2018-11-23 12:11:19,257 INFO L273 TraceCheckUtils]: 5: Hoare triple {1473#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {1475#(= main_~i~0 0)} is VALID [2018-11-23 12:11:19,259 INFO L273 TraceCheckUtils]: 6: Hoare triple {1475#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1475#(= main_~i~0 0)} is VALID [2018-11-23 12:11:19,259 INFO L273 TraceCheckUtils]: 7: Hoare triple {1475#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1475#(= main_~i~0 0)} is VALID [2018-11-23 12:11:19,261 INFO L273 TraceCheckUtils]: 8: Hoare triple {1475#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {1476#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:19,261 INFO L273 TraceCheckUtils]: 9: Hoare triple {1476#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1476#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:19,262 INFO L273 TraceCheckUtils]: 10: Hoare triple {1476#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1476#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:19,263 INFO L273 TraceCheckUtils]: 11: Hoare triple {1476#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {1477#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:19,263 INFO L273 TraceCheckUtils]: 12: Hoare triple {1477#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1477#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:19,264 INFO L273 TraceCheckUtils]: 13: Hoare triple {1477#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1477#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:19,264 INFO L273 TraceCheckUtils]: 14: Hoare triple {1477#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {1478#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:19,268 INFO L273 TraceCheckUtils]: 15: Hoare triple {1478#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1478#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:19,268 INFO L273 TraceCheckUtils]: 16: Hoare triple {1478#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1478#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:19,270 INFO L273 TraceCheckUtils]: 17: Hoare triple {1478#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {1479#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:19,270 INFO L273 TraceCheckUtils]: 18: Hoare triple {1479#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1479#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:19,271 INFO L273 TraceCheckUtils]: 19: Hoare triple {1479#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1479#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:19,271 INFO L273 TraceCheckUtils]: 20: Hoare triple {1479#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {1480#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:19,272 INFO L273 TraceCheckUtils]: 21: Hoare triple {1480#(<= main_~i~0 10)} assume !(~i~0 < 100000); {1474#false} is VALID [2018-11-23 12:11:19,273 INFO L273 TraceCheckUtils]: 22: Hoare triple {1474#false} ~i~0 := 0; {1474#false} is VALID [2018-11-23 12:11:19,273 INFO L273 TraceCheckUtils]: 23: Hoare triple {1474#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1474#false} is VALID [2018-11-23 12:11:19,273 INFO L273 TraceCheckUtils]: 24: Hoare triple {1474#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1474#false} is VALID [2018-11-23 12:11:19,274 INFO L256 TraceCheckUtils]: 25: Hoare triple {1474#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {1474#false} is VALID [2018-11-23 12:11:19,274 INFO L273 TraceCheckUtils]: 26: Hoare triple {1474#false} ~cond := #in~cond; {1474#false} is VALID [2018-11-23 12:11:19,275 INFO L273 TraceCheckUtils]: 27: Hoare triple {1474#false} assume 0 == ~cond; {1474#false} is VALID [2018-11-23 12:11:19,275 INFO L273 TraceCheckUtils]: 28: Hoare triple {1474#false} assume !false; {1474#false} is VALID [2018-11-23 12:11:19,277 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:19,278 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:19,278 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:19,293 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 12:11:19,394 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-11-23 12:11:19,394 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:19,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:19,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:19,555 INFO L256 TraceCheckUtils]: 0: Hoare triple {1473#true} call ULTIMATE.init(); {1473#true} is VALID [2018-11-23 12:11:19,556 INFO L273 TraceCheckUtils]: 1: Hoare triple {1473#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {1473#true} is VALID [2018-11-23 12:11:19,556 INFO L273 TraceCheckUtils]: 2: Hoare triple {1473#true} assume true; {1473#true} is VALID [2018-11-23 12:11:19,557 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1473#true} {1473#true} #59#return; {1473#true} is VALID [2018-11-23 12:11:19,557 INFO L256 TraceCheckUtils]: 4: Hoare triple {1473#true} call #t~ret4 := main(); {1473#true} is VALID [2018-11-23 12:11:19,559 INFO L273 TraceCheckUtils]: 5: Hoare triple {1473#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {1499#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:19,560 INFO L273 TraceCheckUtils]: 6: Hoare triple {1499#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1499#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:19,560 INFO L273 TraceCheckUtils]: 7: Hoare triple {1499#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1499#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:19,561 INFO L273 TraceCheckUtils]: 8: Hoare triple {1499#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {1476#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:19,561 INFO L273 TraceCheckUtils]: 9: Hoare triple {1476#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1476#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:19,561 INFO L273 TraceCheckUtils]: 10: Hoare triple {1476#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1476#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:19,562 INFO L273 TraceCheckUtils]: 11: Hoare triple {1476#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {1477#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:19,562 INFO L273 TraceCheckUtils]: 12: Hoare triple {1477#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1477#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:19,563 INFO L273 TraceCheckUtils]: 13: Hoare triple {1477#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1477#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:19,564 INFO L273 TraceCheckUtils]: 14: Hoare triple {1477#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {1478#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:19,565 INFO L273 TraceCheckUtils]: 15: Hoare triple {1478#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1478#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:19,565 INFO L273 TraceCheckUtils]: 16: Hoare triple {1478#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1478#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:19,566 INFO L273 TraceCheckUtils]: 17: Hoare triple {1478#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {1479#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:19,567 INFO L273 TraceCheckUtils]: 18: Hoare triple {1479#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1479#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:19,568 INFO L273 TraceCheckUtils]: 19: Hoare triple {1479#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1479#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:19,569 INFO L273 TraceCheckUtils]: 20: Hoare triple {1479#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {1480#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:19,569 INFO L273 TraceCheckUtils]: 21: Hoare triple {1480#(<= main_~i~0 10)} assume !(~i~0 < 100000); {1474#false} is VALID [2018-11-23 12:11:19,570 INFO L273 TraceCheckUtils]: 22: Hoare triple {1474#false} ~i~0 := 0; {1474#false} is VALID [2018-11-23 12:11:19,570 INFO L273 TraceCheckUtils]: 23: Hoare triple {1474#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1474#false} is VALID [2018-11-23 12:11:19,571 INFO L273 TraceCheckUtils]: 24: Hoare triple {1474#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1474#false} is VALID [2018-11-23 12:11:19,571 INFO L256 TraceCheckUtils]: 25: Hoare triple {1474#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {1474#false} is VALID [2018-11-23 12:11:19,571 INFO L273 TraceCheckUtils]: 26: Hoare triple {1474#false} ~cond := #in~cond; {1474#false} is VALID [2018-11-23 12:11:19,572 INFO L273 TraceCheckUtils]: 27: Hoare triple {1474#false} assume 0 == ~cond; {1474#false} is VALID [2018-11-23 12:11:19,572 INFO L273 TraceCheckUtils]: 28: Hoare triple {1474#false} assume !false; {1474#false} is VALID [2018-11-23 12:11:19,574 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:19,593 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:19,594 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-23 12:11:19,594 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-11-23 12:11:19,594 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:19,595 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-23 12:11:19,691 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:19,692 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 12:11:19,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 12:11:19,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-11-23 12:11:19,694 INFO L87 Difference]: Start difference. First operand 34 states and 41 transitions. Second operand 9 states. [2018-11-23 12:11:20,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:20,169 INFO L93 Difference]: Finished difference Result 81 states and 104 transitions. [2018-11-23 12:11:20,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 12:11:20,169 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-11-23 12:11:20,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:20,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-23 12:11:20,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 104 transitions. [2018-11-23 12:11:20,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-23 12:11:20,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 104 transitions. [2018-11-23 12:11:20,176 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 104 transitions. [2018-11-23 12:11:20,366 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:20,369 INFO L225 Difference]: With dead ends: 81 [2018-11-23 12:11:20,369 INFO L226 Difference]: Without dead ends: 69 [2018-11-23 12:11:20,370 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-11-23 12:11:20,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-11-23 12:11:20,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 37. [2018-11-23 12:11:20,397 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:20,397 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand 37 states. [2018-11-23 12:11:20,398 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand 37 states. [2018-11-23 12:11:20,398 INFO L87 Difference]: Start difference. First operand 69 states. Second operand 37 states. [2018-11-23 12:11:20,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:20,402 INFO L93 Difference]: Finished difference Result 69 states and 90 transitions. [2018-11-23 12:11:20,402 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 90 transitions. [2018-11-23 12:11:20,403 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:20,403 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:20,403 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 69 states. [2018-11-23 12:11:20,403 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 69 states. [2018-11-23 12:11:20,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:20,407 INFO L93 Difference]: Finished difference Result 69 states and 90 transitions. [2018-11-23 12:11:20,407 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 90 transitions. [2018-11-23 12:11:20,408 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:20,408 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:20,408 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:20,408 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:20,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-23 12:11:20,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 45 transitions. [2018-11-23 12:11:20,410 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 45 transitions. Word has length 29 [2018-11-23 12:11:20,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:20,411 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 45 transitions. [2018-11-23 12:11:20,411 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 12:11:20,411 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 45 transitions. [2018-11-23 12:11:20,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 12:11:20,412 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:20,412 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:20,412 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:20,412 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:20,412 INFO L82 PathProgramCache]: Analyzing trace with hash -614493459, now seen corresponding path program 6 times [2018-11-23 12:11:20,413 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:20,413 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:20,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:20,414 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:20,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:20,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:20,586 INFO L256 TraceCheckUtils]: 0: Hoare triple {1867#true} call ULTIMATE.init(); {1867#true} is VALID [2018-11-23 12:11:20,586 INFO L273 TraceCheckUtils]: 1: Hoare triple {1867#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {1867#true} is VALID [2018-11-23 12:11:20,587 INFO L273 TraceCheckUtils]: 2: Hoare triple {1867#true} assume true; {1867#true} is VALID [2018-11-23 12:11:20,587 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1867#true} {1867#true} #59#return; {1867#true} is VALID [2018-11-23 12:11:20,587 INFO L256 TraceCheckUtils]: 4: Hoare triple {1867#true} call #t~ret4 := main(); {1867#true} is VALID [2018-11-23 12:11:20,587 INFO L273 TraceCheckUtils]: 5: Hoare triple {1867#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {1869#(= main_~i~0 0)} is VALID [2018-11-23 12:11:20,588 INFO L273 TraceCheckUtils]: 6: Hoare triple {1869#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1869#(= main_~i~0 0)} is VALID [2018-11-23 12:11:20,588 INFO L273 TraceCheckUtils]: 7: Hoare triple {1869#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1869#(= main_~i~0 0)} is VALID [2018-11-23 12:11:20,589 INFO L273 TraceCheckUtils]: 8: Hoare triple {1869#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {1870#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:20,589 INFO L273 TraceCheckUtils]: 9: Hoare triple {1870#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1870#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:20,590 INFO L273 TraceCheckUtils]: 10: Hoare triple {1870#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1870#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:20,590 INFO L273 TraceCheckUtils]: 11: Hoare triple {1870#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {1871#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:20,591 INFO L273 TraceCheckUtils]: 12: Hoare triple {1871#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1871#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:20,591 INFO L273 TraceCheckUtils]: 13: Hoare triple {1871#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1871#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:20,592 INFO L273 TraceCheckUtils]: 14: Hoare triple {1871#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {1872#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:20,592 INFO L273 TraceCheckUtils]: 15: Hoare triple {1872#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1872#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:20,593 INFO L273 TraceCheckUtils]: 16: Hoare triple {1872#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1872#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:20,594 INFO L273 TraceCheckUtils]: 17: Hoare triple {1872#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {1873#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:20,594 INFO L273 TraceCheckUtils]: 18: Hoare triple {1873#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1873#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:20,595 INFO L273 TraceCheckUtils]: 19: Hoare triple {1873#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1873#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:20,596 INFO L273 TraceCheckUtils]: 20: Hoare triple {1873#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {1874#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:20,603 INFO L273 TraceCheckUtils]: 21: Hoare triple {1874#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1874#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:20,603 INFO L273 TraceCheckUtils]: 22: Hoare triple {1874#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1874#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:20,604 INFO L273 TraceCheckUtils]: 23: Hoare triple {1874#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {1875#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:20,604 INFO L273 TraceCheckUtils]: 24: Hoare triple {1875#(<= main_~i~0 12)} assume !(~i~0 < 100000); {1868#false} is VALID [2018-11-23 12:11:20,605 INFO L273 TraceCheckUtils]: 25: Hoare triple {1868#false} ~i~0 := 0; {1868#false} is VALID [2018-11-23 12:11:20,605 INFO L273 TraceCheckUtils]: 26: Hoare triple {1868#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1868#false} is VALID [2018-11-23 12:11:20,605 INFO L273 TraceCheckUtils]: 27: Hoare triple {1868#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1868#false} is VALID [2018-11-23 12:11:20,605 INFO L256 TraceCheckUtils]: 28: Hoare triple {1868#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {1868#false} is VALID [2018-11-23 12:11:20,605 INFO L273 TraceCheckUtils]: 29: Hoare triple {1868#false} ~cond := #in~cond; {1868#false} is VALID [2018-11-23 12:11:20,605 INFO L273 TraceCheckUtils]: 30: Hoare triple {1868#false} assume 0 == ~cond; {1868#false} is VALID [2018-11-23 12:11:20,606 INFO L273 TraceCheckUtils]: 31: Hoare triple {1868#false} assume !false; {1868#false} is VALID [2018-11-23 12:11:20,608 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:20,608 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:20,609 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:20,648 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 12:11:20,712 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-23 12:11:20,712 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:20,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:20,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:20,905 INFO L256 TraceCheckUtils]: 0: Hoare triple {1867#true} call ULTIMATE.init(); {1867#true} is VALID [2018-11-23 12:11:20,905 INFO L273 TraceCheckUtils]: 1: Hoare triple {1867#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {1867#true} is VALID [2018-11-23 12:11:20,905 INFO L273 TraceCheckUtils]: 2: Hoare triple {1867#true} assume true; {1867#true} is VALID [2018-11-23 12:11:20,905 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1867#true} {1867#true} #59#return; {1867#true} is VALID [2018-11-23 12:11:20,906 INFO L256 TraceCheckUtils]: 4: Hoare triple {1867#true} call #t~ret4 := main(); {1867#true} is VALID [2018-11-23 12:11:20,911 INFO L273 TraceCheckUtils]: 5: Hoare triple {1867#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {1894#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:20,911 INFO L273 TraceCheckUtils]: 6: Hoare triple {1894#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1894#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:20,912 INFO L273 TraceCheckUtils]: 7: Hoare triple {1894#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1894#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:20,912 INFO L273 TraceCheckUtils]: 8: Hoare triple {1894#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {1870#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:20,913 INFO L273 TraceCheckUtils]: 9: Hoare triple {1870#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1870#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:20,913 INFO L273 TraceCheckUtils]: 10: Hoare triple {1870#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1870#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:20,914 INFO L273 TraceCheckUtils]: 11: Hoare triple {1870#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {1871#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:20,914 INFO L273 TraceCheckUtils]: 12: Hoare triple {1871#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1871#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:20,915 INFO L273 TraceCheckUtils]: 13: Hoare triple {1871#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1871#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:20,916 INFO L273 TraceCheckUtils]: 14: Hoare triple {1871#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {1872#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:20,916 INFO L273 TraceCheckUtils]: 15: Hoare triple {1872#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1872#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:20,917 INFO L273 TraceCheckUtils]: 16: Hoare triple {1872#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1872#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:20,919 INFO L273 TraceCheckUtils]: 17: Hoare triple {1872#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {1873#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:20,920 INFO L273 TraceCheckUtils]: 18: Hoare triple {1873#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1873#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:20,920 INFO L273 TraceCheckUtils]: 19: Hoare triple {1873#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1873#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:20,921 INFO L273 TraceCheckUtils]: 20: Hoare triple {1873#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {1874#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:20,923 INFO L273 TraceCheckUtils]: 21: Hoare triple {1874#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1874#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:20,925 INFO L273 TraceCheckUtils]: 22: Hoare triple {1874#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1874#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:20,925 INFO L273 TraceCheckUtils]: 23: Hoare triple {1874#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {1875#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:20,927 INFO L273 TraceCheckUtils]: 24: Hoare triple {1875#(<= main_~i~0 12)} assume !(~i~0 < 100000); {1868#false} is VALID [2018-11-23 12:11:20,927 INFO L273 TraceCheckUtils]: 25: Hoare triple {1868#false} ~i~0 := 0; {1868#false} is VALID [2018-11-23 12:11:20,927 INFO L273 TraceCheckUtils]: 26: Hoare triple {1868#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {1868#false} is VALID [2018-11-23 12:11:20,928 INFO L273 TraceCheckUtils]: 27: Hoare triple {1868#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {1868#false} is VALID [2018-11-23 12:11:20,928 INFO L256 TraceCheckUtils]: 28: Hoare triple {1868#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {1868#false} is VALID [2018-11-23 12:11:20,928 INFO L273 TraceCheckUtils]: 29: Hoare triple {1868#false} ~cond := #in~cond; {1868#false} is VALID [2018-11-23 12:11:20,928 INFO L273 TraceCheckUtils]: 30: Hoare triple {1868#false} assume 0 == ~cond; {1868#false} is VALID [2018-11-23 12:11:20,929 INFO L273 TraceCheckUtils]: 31: Hoare triple {1868#false} assume !false; {1868#false} is VALID [2018-11-23 12:11:20,930 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:20,950 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:20,951 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-11-23 12:11:20,951 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-11-23 12:11:20,951 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:20,951 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 12:11:21,005 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:21,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 12:11:21,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 12:11:21,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-23 12:11:21,006 INFO L87 Difference]: Start difference. First operand 37 states and 45 transitions. Second operand 10 states. [2018-11-23 12:11:21,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:21,412 INFO L93 Difference]: Finished difference Result 89 states and 115 transitions. [2018-11-23 12:11:21,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 12:11:21,412 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-11-23 12:11:21,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:21,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 12:11:21,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 115 transitions. [2018-11-23 12:11:21,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 12:11:21,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 115 transitions. [2018-11-23 12:11:21,419 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 115 transitions. [2018-11-23 12:11:21,528 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:21,531 INFO L225 Difference]: With dead ends: 89 [2018-11-23 12:11:21,531 INFO L226 Difference]: Without dead ends: 77 [2018-11-23 12:11:21,532 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-23 12:11:21,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-11-23 12:11:21,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 40. [2018-11-23 12:11:21,550 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:21,550 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand 40 states. [2018-11-23 12:11:21,550 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand 40 states. [2018-11-23 12:11:21,551 INFO L87 Difference]: Start difference. First operand 77 states. Second operand 40 states. [2018-11-23 12:11:21,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:21,555 INFO L93 Difference]: Finished difference Result 77 states and 101 transitions. [2018-11-23 12:11:21,555 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 101 transitions. [2018-11-23 12:11:21,555 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:21,555 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:21,556 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 77 states. [2018-11-23 12:11:21,556 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 77 states. [2018-11-23 12:11:21,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:21,558 INFO L93 Difference]: Finished difference Result 77 states and 101 transitions. [2018-11-23 12:11:21,559 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 101 transitions. [2018-11-23 12:11:21,559 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:21,559 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:21,559 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:21,560 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:21,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-11-23 12:11:21,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 49 transitions. [2018-11-23 12:11:21,561 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 49 transitions. Word has length 32 [2018-11-23 12:11:21,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:21,562 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 49 transitions. [2018-11-23 12:11:21,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 12:11:21,562 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 49 transitions. [2018-11-23 12:11:21,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-23 12:11:21,562 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:21,563 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:21,563 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:21,563 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:21,563 INFO L82 PathProgramCache]: Analyzing trace with hash -1717321110, now seen corresponding path program 7 times [2018-11-23 12:11:21,563 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:21,563 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:21,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:21,564 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:21,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:21,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:21,770 INFO L256 TraceCheckUtils]: 0: Hoare triple {2302#true} call ULTIMATE.init(); {2302#true} is VALID [2018-11-23 12:11:21,771 INFO L273 TraceCheckUtils]: 1: Hoare triple {2302#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {2302#true} is VALID [2018-11-23 12:11:21,771 INFO L273 TraceCheckUtils]: 2: Hoare triple {2302#true} assume true; {2302#true} is VALID [2018-11-23 12:11:21,771 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2302#true} {2302#true} #59#return; {2302#true} is VALID [2018-11-23 12:11:21,772 INFO L256 TraceCheckUtils]: 4: Hoare triple {2302#true} call #t~ret4 := main(); {2302#true} is VALID [2018-11-23 12:11:21,772 INFO L273 TraceCheckUtils]: 5: Hoare triple {2302#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {2304#(= main_~i~0 0)} is VALID [2018-11-23 12:11:21,773 INFO L273 TraceCheckUtils]: 6: Hoare triple {2304#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2304#(= main_~i~0 0)} is VALID [2018-11-23 12:11:21,773 INFO L273 TraceCheckUtils]: 7: Hoare triple {2304#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2304#(= main_~i~0 0)} is VALID [2018-11-23 12:11:21,774 INFO L273 TraceCheckUtils]: 8: Hoare triple {2304#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {2305#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:21,774 INFO L273 TraceCheckUtils]: 9: Hoare triple {2305#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2305#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:21,774 INFO L273 TraceCheckUtils]: 10: Hoare triple {2305#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2305#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:21,775 INFO L273 TraceCheckUtils]: 11: Hoare triple {2305#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {2306#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:21,776 INFO L273 TraceCheckUtils]: 12: Hoare triple {2306#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2306#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:21,776 INFO L273 TraceCheckUtils]: 13: Hoare triple {2306#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2306#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:21,777 INFO L273 TraceCheckUtils]: 14: Hoare triple {2306#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {2307#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:21,778 INFO L273 TraceCheckUtils]: 15: Hoare triple {2307#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2307#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:21,778 INFO L273 TraceCheckUtils]: 16: Hoare triple {2307#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2307#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:21,779 INFO L273 TraceCheckUtils]: 17: Hoare triple {2307#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {2308#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:21,780 INFO L273 TraceCheckUtils]: 18: Hoare triple {2308#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2308#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:21,781 INFO L273 TraceCheckUtils]: 19: Hoare triple {2308#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2308#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:21,781 INFO L273 TraceCheckUtils]: 20: Hoare triple {2308#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {2309#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:21,782 INFO L273 TraceCheckUtils]: 21: Hoare triple {2309#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2309#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:21,783 INFO L273 TraceCheckUtils]: 22: Hoare triple {2309#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2309#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:21,784 INFO L273 TraceCheckUtils]: 23: Hoare triple {2309#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {2310#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:21,784 INFO L273 TraceCheckUtils]: 24: Hoare triple {2310#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2310#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:21,791 INFO L273 TraceCheckUtils]: 25: Hoare triple {2310#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2310#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:21,792 INFO L273 TraceCheckUtils]: 26: Hoare triple {2310#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {2311#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:21,794 INFO L273 TraceCheckUtils]: 27: Hoare triple {2311#(<= main_~i~0 14)} assume !(~i~0 < 100000); {2303#false} is VALID [2018-11-23 12:11:21,794 INFO L273 TraceCheckUtils]: 28: Hoare triple {2303#false} ~i~0 := 0; {2303#false} is VALID [2018-11-23 12:11:21,795 INFO L273 TraceCheckUtils]: 29: Hoare triple {2303#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2303#false} is VALID [2018-11-23 12:11:21,795 INFO L273 TraceCheckUtils]: 30: Hoare triple {2303#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2303#false} is VALID [2018-11-23 12:11:21,795 INFO L256 TraceCheckUtils]: 31: Hoare triple {2303#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {2303#false} is VALID [2018-11-23 12:11:21,795 INFO L273 TraceCheckUtils]: 32: Hoare triple {2303#false} ~cond := #in~cond; {2303#false} is VALID [2018-11-23 12:11:21,795 INFO L273 TraceCheckUtils]: 33: Hoare triple {2303#false} assume 0 == ~cond; {2303#false} is VALID [2018-11-23 12:11:21,796 INFO L273 TraceCheckUtils]: 34: Hoare triple {2303#false} assume !false; {2303#false} is VALID [2018-11-23 12:11:21,798 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:21,798 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:21,798 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:21,807 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:21,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:21,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:21,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:22,436 INFO L256 TraceCheckUtils]: 0: Hoare triple {2302#true} call ULTIMATE.init(); {2302#true} is VALID [2018-11-23 12:11:22,436 INFO L273 TraceCheckUtils]: 1: Hoare triple {2302#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {2302#true} is VALID [2018-11-23 12:11:22,437 INFO L273 TraceCheckUtils]: 2: Hoare triple {2302#true} assume true; {2302#true} is VALID [2018-11-23 12:11:22,437 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2302#true} {2302#true} #59#return; {2302#true} is VALID [2018-11-23 12:11:22,437 INFO L256 TraceCheckUtils]: 4: Hoare triple {2302#true} call #t~ret4 := main(); {2302#true} is VALID [2018-11-23 12:11:22,438 INFO L273 TraceCheckUtils]: 5: Hoare triple {2302#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {2330#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:22,438 INFO L273 TraceCheckUtils]: 6: Hoare triple {2330#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2330#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:22,438 INFO L273 TraceCheckUtils]: 7: Hoare triple {2330#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2330#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:22,439 INFO L273 TraceCheckUtils]: 8: Hoare triple {2330#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {2305#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:22,439 INFO L273 TraceCheckUtils]: 9: Hoare triple {2305#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2305#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:22,439 INFO L273 TraceCheckUtils]: 10: Hoare triple {2305#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2305#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:22,440 INFO L273 TraceCheckUtils]: 11: Hoare triple {2305#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {2306#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:22,440 INFO L273 TraceCheckUtils]: 12: Hoare triple {2306#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2306#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:22,441 INFO L273 TraceCheckUtils]: 13: Hoare triple {2306#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2306#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:22,441 INFO L273 TraceCheckUtils]: 14: Hoare triple {2306#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {2307#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:22,442 INFO L273 TraceCheckUtils]: 15: Hoare triple {2307#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2307#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:22,443 INFO L273 TraceCheckUtils]: 16: Hoare triple {2307#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2307#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:22,443 INFO L273 TraceCheckUtils]: 17: Hoare triple {2307#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {2308#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:22,444 INFO L273 TraceCheckUtils]: 18: Hoare triple {2308#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2308#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:22,444 INFO L273 TraceCheckUtils]: 19: Hoare triple {2308#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2308#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:22,445 INFO L273 TraceCheckUtils]: 20: Hoare triple {2308#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {2309#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:22,446 INFO L273 TraceCheckUtils]: 21: Hoare triple {2309#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2309#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:22,446 INFO L273 TraceCheckUtils]: 22: Hoare triple {2309#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2309#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:22,447 INFO L273 TraceCheckUtils]: 23: Hoare triple {2309#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {2310#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:22,456 INFO L273 TraceCheckUtils]: 24: Hoare triple {2310#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2310#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:22,458 INFO L273 TraceCheckUtils]: 25: Hoare triple {2310#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2310#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:22,462 INFO L273 TraceCheckUtils]: 26: Hoare triple {2310#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {2311#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:22,464 INFO L273 TraceCheckUtils]: 27: Hoare triple {2311#(<= main_~i~0 14)} assume !(~i~0 < 100000); {2303#false} is VALID [2018-11-23 12:11:22,465 INFO L273 TraceCheckUtils]: 28: Hoare triple {2303#false} ~i~0 := 0; {2303#false} is VALID [2018-11-23 12:11:22,465 INFO L273 TraceCheckUtils]: 29: Hoare triple {2303#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2303#false} is VALID [2018-11-23 12:11:22,465 INFO L273 TraceCheckUtils]: 30: Hoare triple {2303#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2303#false} is VALID [2018-11-23 12:11:22,466 INFO L256 TraceCheckUtils]: 31: Hoare triple {2303#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {2303#false} is VALID [2018-11-23 12:11:22,466 INFO L273 TraceCheckUtils]: 32: Hoare triple {2303#false} ~cond := #in~cond; {2303#false} is VALID [2018-11-23 12:11:22,466 INFO L273 TraceCheckUtils]: 33: Hoare triple {2303#false} assume 0 == ~cond; {2303#false} is VALID [2018-11-23 12:11:22,466 INFO L273 TraceCheckUtils]: 34: Hoare triple {2303#false} assume !false; {2303#false} is VALID [2018-11-23 12:11:22,467 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:22,486 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:22,486 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-11-23 12:11:22,487 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-11-23 12:11:22,487 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:22,487 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states. [2018-11-23 12:11:22,523 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:22,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 12:11:22,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 12:11:22,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-23 12:11:22,525 INFO L87 Difference]: Start difference. First operand 40 states and 49 transitions. Second operand 11 states. [2018-11-23 12:11:23,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:23,028 INFO L93 Difference]: Finished difference Result 97 states and 126 transitions. [2018-11-23 12:11:23,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 12:11:23,028 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-11-23 12:11:23,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:23,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-23 12:11:23,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 126 transitions. [2018-11-23 12:11:23,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-23 12:11:23,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 126 transitions. [2018-11-23 12:11:23,034 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 126 transitions. [2018-11-23 12:11:23,186 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:23,188 INFO L225 Difference]: With dead ends: 97 [2018-11-23 12:11:23,189 INFO L226 Difference]: Without dead ends: 85 [2018-11-23 12:11:23,189 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-23 12:11:23,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-11-23 12:11:23,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 43. [2018-11-23 12:11:23,207 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:23,207 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand 43 states. [2018-11-23 12:11:23,208 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand 43 states. [2018-11-23 12:11:23,208 INFO L87 Difference]: Start difference. First operand 85 states. Second operand 43 states. [2018-11-23 12:11:23,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:23,213 INFO L93 Difference]: Finished difference Result 85 states and 112 transitions. [2018-11-23 12:11:23,213 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 112 transitions. [2018-11-23 12:11:23,213 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:23,213 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:23,214 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand 85 states. [2018-11-23 12:11:23,214 INFO L87 Difference]: Start difference. First operand 43 states. Second operand 85 states. [2018-11-23 12:11:23,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:23,218 INFO L93 Difference]: Finished difference Result 85 states and 112 transitions. [2018-11-23 12:11:23,218 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 112 transitions. [2018-11-23 12:11:23,218 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:23,219 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:23,219 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:23,219 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:23,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-11-23 12:11:23,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 53 transitions. [2018-11-23 12:11:23,221 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 53 transitions. Word has length 35 [2018-11-23 12:11:23,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:23,221 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 53 transitions. [2018-11-23 12:11:23,221 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 12:11:23,221 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 53 transitions. [2018-11-23 12:11:23,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 12:11:23,222 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:23,222 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:23,222 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:23,222 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:23,223 INFO L82 PathProgramCache]: Analyzing trace with hash 443942349, now seen corresponding path program 8 times [2018-11-23 12:11:23,223 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:23,223 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:23,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:23,224 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:23,224 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:23,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:23,403 INFO L256 TraceCheckUtils]: 0: Hoare triple {2778#true} call ULTIMATE.init(); {2778#true} is VALID [2018-11-23 12:11:23,403 INFO L273 TraceCheckUtils]: 1: Hoare triple {2778#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {2778#true} is VALID [2018-11-23 12:11:23,404 INFO L273 TraceCheckUtils]: 2: Hoare triple {2778#true} assume true; {2778#true} is VALID [2018-11-23 12:11:23,404 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2778#true} {2778#true} #59#return; {2778#true} is VALID [2018-11-23 12:11:23,404 INFO L256 TraceCheckUtils]: 4: Hoare triple {2778#true} call #t~ret4 := main(); {2778#true} is VALID [2018-11-23 12:11:23,411 INFO L273 TraceCheckUtils]: 5: Hoare triple {2778#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {2780#(= main_~i~0 0)} is VALID [2018-11-23 12:11:23,412 INFO L273 TraceCheckUtils]: 6: Hoare triple {2780#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2780#(= main_~i~0 0)} is VALID [2018-11-23 12:11:23,412 INFO L273 TraceCheckUtils]: 7: Hoare triple {2780#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2780#(= main_~i~0 0)} is VALID [2018-11-23 12:11:23,413 INFO L273 TraceCheckUtils]: 8: Hoare triple {2780#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {2781#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:23,413 INFO L273 TraceCheckUtils]: 9: Hoare triple {2781#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2781#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:23,413 INFO L273 TraceCheckUtils]: 10: Hoare triple {2781#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2781#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:23,414 INFO L273 TraceCheckUtils]: 11: Hoare triple {2781#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {2782#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:23,414 INFO L273 TraceCheckUtils]: 12: Hoare triple {2782#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2782#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:23,415 INFO L273 TraceCheckUtils]: 13: Hoare triple {2782#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2782#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:23,415 INFO L273 TraceCheckUtils]: 14: Hoare triple {2782#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {2783#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:23,415 INFO L273 TraceCheckUtils]: 15: Hoare triple {2783#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2783#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:23,416 INFO L273 TraceCheckUtils]: 16: Hoare triple {2783#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2783#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:23,417 INFO L273 TraceCheckUtils]: 17: Hoare triple {2783#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {2784#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:23,417 INFO L273 TraceCheckUtils]: 18: Hoare triple {2784#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2784#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:23,418 INFO L273 TraceCheckUtils]: 19: Hoare triple {2784#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2784#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:23,418 INFO L273 TraceCheckUtils]: 20: Hoare triple {2784#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {2785#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:23,419 INFO L273 TraceCheckUtils]: 21: Hoare triple {2785#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2785#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:23,419 INFO L273 TraceCheckUtils]: 22: Hoare triple {2785#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2785#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:23,420 INFO L273 TraceCheckUtils]: 23: Hoare triple {2785#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {2786#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:23,421 INFO L273 TraceCheckUtils]: 24: Hoare triple {2786#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2786#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:23,421 INFO L273 TraceCheckUtils]: 25: Hoare triple {2786#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2786#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:23,422 INFO L273 TraceCheckUtils]: 26: Hoare triple {2786#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {2787#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:23,423 INFO L273 TraceCheckUtils]: 27: Hoare triple {2787#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2787#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:23,423 INFO L273 TraceCheckUtils]: 28: Hoare triple {2787#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2787#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:23,424 INFO L273 TraceCheckUtils]: 29: Hoare triple {2787#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {2788#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:23,424 INFO L273 TraceCheckUtils]: 30: Hoare triple {2788#(<= main_~i~0 16)} assume !(~i~0 < 100000); {2779#false} is VALID [2018-11-23 12:11:23,425 INFO L273 TraceCheckUtils]: 31: Hoare triple {2779#false} ~i~0 := 0; {2779#false} is VALID [2018-11-23 12:11:23,425 INFO L273 TraceCheckUtils]: 32: Hoare triple {2779#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2779#false} is VALID [2018-11-23 12:11:23,425 INFO L273 TraceCheckUtils]: 33: Hoare triple {2779#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2779#false} is VALID [2018-11-23 12:11:23,425 INFO L256 TraceCheckUtils]: 34: Hoare triple {2779#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {2779#false} is VALID [2018-11-23 12:11:23,426 INFO L273 TraceCheckUtils]: 35: Hoare triple {2779#false} ~cond := #in~cond; {2779#false} is VALID [2018-11-23 12:11:23,426 INFO L273 TraceCheckUtils]: 36: Hoare triple {2779#false} assume 0 == ~cond; {2779#false} is VALID [2018-11-23 12:11:23,426 INFO L273 TraceCheckUtils]: 37: Hoare triple {2779#false} assume !false; {2779#false} is VALID [2018-11-23 12:11:23,428 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:23,428 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:23,428 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:23,440 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 12:11:23,477 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 12:11:23,477 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:23,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:23,509 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:23,694 INFO L256 TraceCheckUtils]: 0: Hoare triple {2778#true} call ULTIMATE.init(); {2778#true} is VALID [2018-11-23 12:11:23,694 INFO L273 TraceCheckUtils]: 1: Hoare triple {2778#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {2778#true} is VALID [2018-11-23 12:11:23,694 INFO L273 TraceCheckUtils]: 2: Hoare triple {2778#true} assume true; {2778#true} is VALID [2018-11-23 12:11:23,694 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2778#true} {2778#true} #59#return; {2778#true} is VALID [2018-11-23 12:11:23,695 INFO L256 TraceCheckUtils]: 4: Hoare triple {2778#true} call #t~ret4 := main(); {2778#true} is VALID [2018-11-23 12:11:23,700 INFO L273 TraceCheckUtils]: 5: Hoare triple {2778#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {2807#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:23,701 INFO L273 TraceCheckUtils]: 6: Hoare triple {2807#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2807#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:23,701 INFO L273 TraceCheckUtils]: 7: Hoare triple {2807#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2807#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:23,702 INFO L273 TraceCheckUtils]: 8: Hoare triple {2807#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {2781#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:23,702 INFO L273 TraceCheckUtils]: 9: Hoare triple {2781#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2781#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:23,702 INFO L273 TraceCheckUtils]: 10: Hoare triple {2781#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2781#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:23,703 INFO L273 TraceCheckUtils]: 11: Hoare triple {2781#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {2782#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:23,703 INFO L273 TraceCheckUtils]: 12: Hoare triple {2782#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2782#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:23,704 INFO L273 TraceCheckUtils]: 13: Hoare triple {2782#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2782#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:23,705 INFO L273 TraceCheckUtils]: 14: Hoare triple {2782#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {2783#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:23,705 INFO L273 TraceCheckUtils]: 15: Hoare triple {2783#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2783#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:23,706 INFO L273 TraceCheckUtils]: 16: Hoare triple {2783#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2783#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:23,706 INFO L273 TraceCheckUtils]: 17: Hoare triple {2783#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {2784#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:23,707 INFO L273 TraceCheckUtils]: 18: Hoare triple {2784#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2784#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:23,707 INFO L273 TraceCheckUtils]: 19: Hoare triple {2784#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2784#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:23,708 INFO L273 TraceCheckUtils]: 20: Hoare triple {2784#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {2785#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:23,714 INFO L273 TraceCheckUtils]: 21: Hoare triple {2785#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2785#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:23,714 INFO L273 TraceCheckUtils]: 22: Hoare triple {2785#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2785#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:23,715 INFO L273 TraceCheckUtils]: 23: Hoare triple {2785#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {2786#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:23,715 INFO L273 TraceCheckUtils]: 24: Hoare triple {2786#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2786#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:23,715 INFO L273 TraceCheckUtils]: 25: Hoare triple {2786#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2786#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:23,716 INFO L273 TraceCheckUtils]: 26: Hoare triple {2786#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {2787#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:23,716 INFO L273 TraceCheckUtils]: 27: Hoare triple {2787#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2787#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:23,716 INFO L273 TraceCheckUtils]: 28: Hoare triple {2787#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2787#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:23,717 INFO L273 TraceCheckUtils]: 29: Hoare triple {2787#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {2788#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:23,718 INFO L273 TraceCheckUtils]: 30: Hoare triple {2788#(<= main_~i~0 16)} assume !(~i~0 < 100000); {2779#false} is VALID [2018-11-23 12:11:23,718 INFO L273 TraceCheckUtils]: 31: Hoare triple {2779#false} ~i~0 := 0; {2779#false} is VALID [2018-11-23 12:11:23,718 INFO L273 TraceCheckUtils]: 32: Hoare triple {2779#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {2779#false} is VALID [2018-11-23 12:11:23,718 INFO L273 TraceCheckUtils]: 33: Hoare triple {2779#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {2779#false} is VALID [2018-11-23 12:11:23,719 INFO L256 TraceCheckUtils]: 34: Hoare triple {2779#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {2779#false} is VALID [2018-11-23 12:11:23,719 INFO L273 TraceCheckUtils]: 35: Hoare triple {2779#false} ~cond := #in~cond; {2779#false} is VALID [2018-11-23 12:11:23,719 INFO L273 TraceCheckUtils]: 36: Hoare triple {2779#false} assume 0 == ~cond; {2779#false} is VALID [2018-11-23 12:11:23,719 INFO L273 TraceCheckUtils]: 37: Hoare triple {2779#false} assume !false; {2779#false} is VALID [2018-11-23 12:11:23,721 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:23,740 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:23,740 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-11-23 12:11:23,741 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-11-23 12:11:23,741 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:23,741 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 12:11:23,778 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:23,779 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 12:11:23,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 12:11:23,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-23 12:11:23,780 INFO L87 Difference]: Start difference. First operand 43 states and 53 transitions. Second operand 12 states. [2018-11-23 12:11:24,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:24,176 INFO L93 Difference]: Finished difference Result 105 states and 137 transitions. [2018-11-23 12:11:24,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 12:11:24,176 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-11-23 12:11:24,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:24,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 12:11:24,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 137 transitions. [2018-11-23 12:11:24,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 12:11:24,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 137 transitions. [2018-11-23 12:11:24,183 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states and 137 transitions. [2018-11-23 12:11:24,359 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 137 edges. 137 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:24,361 INFO L225 Difference]: With dead ends: 105 [2018-11-23 12:11:24,362 INFO L226 Difference]: Without dead ends: 93 [2018-11-23 12:11:24,362 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-23 12:11:24,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-11-23 12:11:24,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 46. [2018-11-23 12:11:24,385 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:24,385 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand 46 states. [2018-11-23 12:11:24,385 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand 46 states. [2018-11-23 12:11:24,385 INFO L87 Difference]: Start difference. First operand 93 states. Second operand 46 states. [2018-11-23 12:11:24,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:24,388 INFO L93 Difference]: Finished difference Result 93 states and 123 transitions. [2018-11-23 12:11:24,388 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 123 transitions. [2018-11-23 12:11:24,389 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:24,389 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:24,389 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand 93 states. [2018-11-23 12:11:24,389 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 93 states. [2018-11-23 12:11:24,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:24,392 INFO L93 Difference]: Finished difference Result 93 states and 123 transitions. [2018-11-23 12:11:24,393 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 123 transitions. [2018-11-23 12:11:24,393 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:24,393 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:24,393 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:24,394 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:24,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-11-23 12:11:24,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 57 transitions. [2018-11-23 12:11:24,395 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 57 transitions. Word has length 38 [2018-11-23 12:11:24,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:24,395 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 57 transitions. [2018-11-23 12:11:24,395 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 12:11:24,396 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 57 transitions. [2018-11-23 12:11:24,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-23 12:11:24,396 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:24,396 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:24,397 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:24,397 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:24,397 INFO L82 PathProgramCache]: Analyzing trace with hash 788915082, now seen corresponding path program 9 times [2018-11-23 12:11:24,397 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:24,397 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:24,398 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:24,398 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:24,398 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:24,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:24,655 INFO L256 TraceCheckUtils]: 0: Hoare triple {3295#true} call ULTIMATE.init(); {3295#true} is VALID [2018-11-23 12:11:24,655 INFO L273 TraceCheckUtils]: 1: Hoare triple {3295#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {3295#true} is VALID [2018-11-23 12:11:24,655 INFO L273 TraceCheckUtils]: 2: Hoare triple {3295#true} assume true; {3295#true} is VALID [2018-11-23 12:11:24,655 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3295#true} {3295#true} #59#return; {3295#true} is VALID [2018-11-23 12:11:24,656 INFO L256 TraceCheckUtils]: 4: Hoare triple {3295#true} call #t~ret4 := main(); {3295#true} is VALID [2018-11-23 12:11:24,656 INFO L273 TraceCheckUtils]: 5: Hoare triple {3295#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {3297#(= main_~i~0 0)} is VALID [2018-11-23 12:11:24,657 INFO L273 TraceCheckUtils]: 6: Hoare triple {3297#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3297#(= main_~i~0 0)} is VALID [2018-11-23 12:11:24,657 INFO L273 TraceCheckUtils]: 7: Hoare triple {3297#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3297#(= main_~i~0 0)} is VALID [2018-11-23 12:11:24,658 INFO L273 TraceCheckUtils]: 8: Hoare triple {3297#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {3298#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:24,659 INFO L273 TraceCheckUtils]: 9: Hoare triple {3298#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3298#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:24,659 INFO L273 TraceCheckUtils]: 10: Hoare triple {3298#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3298#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:24,660 INFO L273 TraceCheckUtils]: 11: Hoare triple {3298#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {3299#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:24,661 INFO L273 TraceCheckUtils]: 12: Hoare triple {3299#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3299#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:24,661 INFO L273 TraceCheckUtils]: 13: Hoare triple {3299#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3299#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:24,662 INFO L273 TraceCheckUtils]: 14: Hoare triple {3299#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {3300#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:24,662 INFO L273 TraceCheckUtils]: 15: Hoare triple {3300#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3300#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:24,663 INFO L273 TraceCheckUtils]: 16: Hoare triple {3300#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3300#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:24,664 INFO L273 TraceCheckUtils]: 17: Hoare triple {3300#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {3301#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:24,664 INFO L273 TraceCheckUtils]: 18: Hoare triple {3301#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3301#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:24,665 INFO L273 TraceCheckUtils]: 19: Hoare triple {3301#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3301#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:24,666 INFO L273 TraceCheckUtils]: 20: Hoare triple {3301#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {3302#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:24,666 INFO L273 TraceCheckUtils]: 21: Hoare triple {3302#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3302#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:24,667 INFO L273 TraceCheckUtils]: 22: Hoare triple {3302#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3302#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:24,668 INFO L273 TraceCheckUtils]: 23: Hoare triple {3302#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {3303#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:24,668 INFO L273 TraceCheckUtils]: 24: Hoare triple {3303#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3303#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:24,669 INFO L273 TraceCheckUtils]: 25: Hoare triple {3303#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3303#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:24,669 INFO L273 TraceCheckUtils]: 26: Hoare triple {3303#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {3304#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:24,670 INFO L273 TraceCheckUtils]: 27: Hoare triple {3304#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3304#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:24,671 INFO L273 TraceCheckUtils]: 28: Hoare triple {3304#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3304#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:24,671 INFO L273 TraceCheckUtils]: 29: Hoare triple {3304#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {3305#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:24,672 INFO L273 TraceCheckUtils]: 30: Hoare triple {3305#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3305#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:24,673 INFO L273 TraceCheckUtils]: 31: Hoare triple {3305#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3305#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:24,673 INFO L273 TraceCheckUtils]: 32: Hoare triple {3305#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {3306#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:24,674 INFO L273 TraceCheckUtils]: 33: Hoare triple {3306#(<= main_~i~0 18)} assume !(~i~0 < 100000); {3296#false} is VALID [2018-11-23 12:11:24,674 INFO L273 TraceCheckUtils]: 34: Hoare triple {3296#false} ~i~0 := 0; {3296#false} is VALID [2018-11-23 12:11:24,675 INFO L273 TraceCheckUtils]: 35: Hoare triple {3296#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3296#false} is VALID [2018-11-23 12:11:24,675 INFO L273 TraceCheckUtils]: 36: Hoare triple {3296#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3296#false} is VALID [2018-11-23 12:11:24,675 INFO L256 TraceCheckUtils]: 37: Hoare triple {3296#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {3296#false} is VALID [2018-11-23 12:11:24,675 INFO L273 TraceCheckUtils]: 38: Hoare triple {3296#false} ~cond := #in~cond; {3296#false} is VALID [2018-11-23 12:11:24,675 INFO L273 TraceCheckUtils]: 39: Hoare triple {3296#false} assume 0 == ~cond; {3296#false} is VALID [2018-11-23 12:11:24,676 INFO L273 TraceCheckUtils]: 40: Hoare triple {3296#false} assume !false; {3296#false} is VALID [2018-11-23 12:11:24,678 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:24,678 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:24,678 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:24,687 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 12:11:25,052 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-11-23 12:11:25,052 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:25,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:25,085 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:25,335 INFO L256 TraceCheckUtils]: 0: Hoare triple {3295#true} call ULTIMATE.init(); {3295#true} is VALID [2018-11-23 12:11:25,335 INFO L273 TraceCheckUtils]: 1: Hoare triple {3295#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {3295#true} is VALID [2018-11-23 12:11:25,335 INFO L273 TraceCheckUtils]: 2: Hoare triple {3295#true} assume true; {3295#true} is VALID [2018-11-23 12:11:25,336 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3295#true} {3295#true} #59#return; {3295#true} is VALID [2018-11-23 12:11:25,336 INFO L256 TraceCheckUtils]: 4: Hoare triple {3295#true} call #t~ret4 := main(); {3295#true} is VALID [2018-11-23 12:11:25,350 INFO L273 TraceCheckUtils]: 5: Hoare triple {3295#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {3325#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:25,351 INFO L273 TraceCheckUtils]: 6: Hoare triple {3325#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3325#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:25,355 INFO L273 TraceCheckUtils]: 7: Hoare triple {3325#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3325#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:25,357 INFO L273 TraceCheckUtils]: 8: Hoare triple {3325#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {3298#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:25,357 INFO L273 TraceCheckUtils]: 9: Hoare triple {3298#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3298#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:25,359 INFO L273 TraceCheckUtils]: 10: Hoare triple {3298#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3298#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:25,359 INFO L273 TraceCheckUtils]: 11: Hoare triple {3298#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {3299#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:25,361 INFO L273 TraceCheckUtils]: 12: Hoare triple {3299#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3299#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:25,361 INFO L273 TraceCheckUtils]: 13: Hoare triple {3299#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3299#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:25,363 INFO L273 TraceCheckUtils]: 14: Hoare triple {3299#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {3300#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:25,363 INFO L273 TraceCheckUtils]: 15: Hoare triple {3300#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3300#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:25,365 INFO L273 TraceCheckUtils]: 16: Hoare triple {3300#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3300#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:25,365 INFO L273 TraceCheckUtils]: 17: Hoare triple {3300#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {3301#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:25,367 INFO L273 TraceCheckUtils]: 18: Hoare triple {3301#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3301#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:25,367 INFO L273 TraceCheckUtils]: 19: Hoare triple {3301#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3301#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:25,369 INFO L273 TraceCheckUtils]: 20: Hoare triple {3301#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {3302#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:25,369 INFO L273 TraceCheckUtils]: 21: Hoare triple {3302#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3302#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:25,371 INFO L273 TraceCheckUtils]: 22: Hoare triple {3302#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3302#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:25,371 INFO L273 TraceCheckUtils]: 23: Hoare triple {3302#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {3303#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:25,373 INFO L273 TraceCheckUtils]: 24: Hoare triple {3303#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3303#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:25,373 INFO L273 TraceCheckUtils]: 25: Hoare triple {3303#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3303#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:25,375 INFO L273 TraceCheckUtils]: 26: Hoare triple {3303#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {3304#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:25,375 INFO L273 TraceCheckUtils]: 27: Hoare triple {3304#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3304#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:25,377 INFO L273 TraceCheckUtils]: 28: Hoare triple {3304#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3304#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:25,377 INFO L273 TraceCheckUtils]: 29: Hoare triple {3304#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {3305#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:25,379 INFO L273 TraceCheckUtils]: 30: Hoare triple {3305#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3305#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:25,379 INFO L273 TraceCheckUtils]: 31: Hoare triple {3305#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3305#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:25,381 INFO L273 TraceCheckUtils]: 32: Hoare triple {3305#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {3306#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:25,381 INFO L273 TraceCheckUtils]: 33: Hoare triple {3306#(<= main_~i~0 18)} assume !(~i~0 < 100000); {3296#false} is VALID [2018-11-23 12:11:25,381 INFO L273 TraceCheckUtils]: 34: Hoare triple {3296#false} ~i~0 := 0; {3296#false} is VALID [2018-11-23 12:11:25,381 INFO L273 TraceCheckUtils]: 35: Hoare triple {3296#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3296#false} is VALID [2018-11-23 12:11:25,382 INFO L273 TraceCheckUtils]: 36: Hoare triple {3296#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3296#false} is VALID [2018-11-23 12:11:25,382 INFO L256 TraceCheckUtils]: 37: Hoare triple {3296#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {3296#false} is VALID [2018-11-23 12:11:25,382 INFO L273 TraceCheckUtils]: 38: Hoare triple {3296#false} ~cond := #in~cond; {3296#false} is VALID [2018-11-23 12:11:25,382 INFO L273 TraceCheckUtils]: 39: Hoare triple {3296#false} assume 0 == ~cond; {3296#false} is VALID [2018-11-23 12:11:25,382 INFO L273 TraceCheckUtils]: 40: Hoare triple {3296#false} assume !false; {3296#false} is VALID [2018-11-23 12:11:25,383 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:25,405 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:25,405 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-11-23 12:11:25,405 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 41 [2018-11-23 12:11:25,405 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:25,406 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-23 12:11:25,466 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:25,466 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 12:11:25,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 12:11:25,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-23 12:11:25,467 INFO L87 Difference]: Start difference. First operand 46 states and 57 transitions. Second operand 13 states. [2018-11-23 12:11:26,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:26,170 INFO L93 Difference]: Finished difference Result 113 states and 148 transitions. [2018-11-23 12:11:26,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 12:11:26,170 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 41 [2018-11-23 12:11:26,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:26,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 12:11:26,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 148 transitions. [2018-11-23 12:11:26,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 12:11:26,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 148 transitions. [2018-11-23 12:11:26,176 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 148 transitions. [2018-11-23 12:11:26,358 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 148 edges. 148 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:26,360 INFO L225 Difference]: With dead ends: 113 [2018-11-23 12:11:26,361 INFO L226 Difference]: Without dead ends: 101 [2018-11-23 12:11:26,361 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-23 12:11:26,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-11-23 12:11:26,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 49. [2018-11-23 12:11:26,376 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:26,377 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand 49 states. [2018-11-23 12:11:26,377 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand 49 states. [2018-11-23 12:11:26,377 INFO L87 Difference]: Start difference. First operand 101 states. Second operand 49 states. [2018-11-23 12:11:26,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:26,380 INFO L93 Difference]: Finished difference Result 101 states and 134 transitions. [2018-11-23 12:11:26,380 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 134 transitions. [2018-11-23 12:11:26,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:26,381 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:26,381 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand 101 states. [2018-11-23 12:11:26,381 INFO L87 Difference]: Start difference. First operand 49 states. Second operand 101 states. [2018-11-23 12:11:26,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:26,386 INFO L93 Difference]: Finished difference Result 101 states and 134 transitions. [2018-11-23 12:11:26,386 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 134 transitions. [2018-11-23 12:11:26,387 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:26,387 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:26,387 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:26,387 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:26,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-11-23 12:11:26,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 61 transitions. [2018-11-23 12:11:26,389 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 61 transitions. Word has length 41 [2018-11-23 12:11:26,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:26,389 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 61 transitions. [2018-11-23 12:11:26,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 12:11:26,390 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 61 transitions. [2018-11-23 12:11:26,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 12:11:26,390 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:26,391 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:26,391 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:26,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:26,391 INFO L82 PathProgramCache]: Analyzing trace with hash 14864557, now seen corresponding path program 10 times [2018-11-23 12:11:26,392 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:26,392 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:26,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:26,393 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:26,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:26,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:27,129 INFO L256 TraceCheckUtils]: 0: Hoare triple {3853#true} call ULTIMATE.init(); {3853#true} is VALID [2018-11-23 12:11:27,129 INFO L273 TraceCheckUtils]: 1: Hoare triple {3853#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {3853#true} is VALID [2018-11-23 12:11:27,129 INFO L273 TraceCheckUtils]: 2: Hoare triple {3853#true} assume true; {3853#true} is VALID [2018-11-23 12:11:27,130 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3853#true} {3853#true} #59#return; {3853#true} is VALID [2018-11-23 12:11:27,130 INFO L256 TraceCheckUtils]: 4: Hoare triple {3853#true} call #t~ret4 := main(); {3853#true} is VALID [2018-11-23 12:11:27,131 INFO L273 TraceCheckUtils]: 5: Hoare triple {3853#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {3855#(= main_~i~0 0)} is VALID [2018-11-23 12:11:27,131 INFO L273 TraceCheckUtils]: 6: Hoare triple {3855#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3855#(= main_~i~0 0)} is VALID [2018-11-23 12:11:27,132 INFO L273 TraceCheckUtils]: 7: Hoare triple {3855#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3855#(= main_~i~0 0)} is VALID [2018-11-23 12:11:27,133 INFO L273 TraceCheckUtils]: 8: Hoare triple {3855#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {3856#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:27,134 INFO L273 TraceCheckUtils]: 9: Hoare triple {3856#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3856#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:27,134 INFO L273 TraceCheckUtils]: 10: Hoare triple {3856#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3856#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:27,135 INFO L273 TraceCheckUtils]: 11: Hoare triple {3856#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {3857#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:27,136 INFO L273 TraceCheckUtils]: 12: Hoare triple {3857#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3857#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:27,136 INFO L273 TraceCheckUtils]: 13: Hoare triple {3857#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3857#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:27,137 INFO L273 TraceCheckUtils]: 14: Hoare triple {3857#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {3858#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:27,138 INFO L273 TraceCheckUtils]: 15: Hoare triple {3858#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3858#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:27,139 INFO L273 TraceCheckUtils]: 16: Hoare triple {3858#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3858#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:27,139 INFO L273 TraceCheckUtils]: 17: Hoare triple {3858#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {3859#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:27,140 INFO L273 TraceCheckUtils]: 18: Hoare triple {3859#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3859#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:27,141 INFO L273 TraceCheckUtils]: 19: Hoare triple {3859#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3859#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:27,142 INFO L273 TraceCheckUtils]: 20: Hoare triple {3859#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {3860#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:27,142 INFO L273 TraceCheckUtils]: 21: Hoare triple {3860#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3860#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:27,143 INFO L273 TraceCheckUtils]: 22: Hoare triple {3860#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3860#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:27,144 INFO L273 TraceCheckUtils]: 23: Hoare triple {3860#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {3861#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:27,144 INFO L273 TraceCheckUtils]: 24: Hoare triple {3861#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3861#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:27,145 INFO L273 TraceCheckUtils]: 25: Hoare triple {3861#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3861#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:27,146 INFO L273 TraceCheckUtils]: 26: Hoare triple {3861#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {3862#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:27,147 INFO L273 TraceCheckUtils]: 27: Hoare triple {3862#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3862#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:27,147 INFO L273 TraceCheckUtils]: 28: Hoare triple {3862#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3862#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:27,148 INFO L273 TraceCheckUtils]: 29: Hoare triple {3862#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {3863#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:27,149 INFO L273 TraceCheckUtils]: 30: Hoare triple {3863#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3863#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:27,149 INFO L273 TraceCheckUtils]: 31: Hoare triple {3863#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3863#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:27,150 INFO L273 TraceCheckUtils]: 32: Hoare triple {3863#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {3864#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:27,151 INFO L273 TraceCheckUtils]: 33: Hoare triple {3864#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3864#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:27,151 INFO L273 TraceCheckUtils]: 34: Hoare triple {3864#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3864#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:27,152 INFO L273 TraceCheckUtils]: 35: Hoare triple {3864#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {3865#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:27,153 INFO L273 TraceCheckUtils]: 36: Hoare triple {3865#(<= main_~i~0 20)} assume !(~i~0 < 100000); {3854#false} is VALID [2018-11-23 12:11:27,153 INFO L273 TraceCheckUtils]: 37: Hoare triple {3854#false} ~i~0 := 0; {3854#false} is VALID [2018-11-23 12:11:27,154 INFO L273 TraceCheckUtils]: 38: Hoare triple {3854#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3854#false} is VALID [2018-11-23 12:11:27,154 INFO L273 TraceCheckUtils]: 39: Hoare triple {3854#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3854#false} is VALID [2018-11-23 12:11:27,154 INFO L256 TraceCheckUtils]: 40: Hoare triple {3854#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {3854#false} is VALID [2018-11-23 12:11:27,155 INFO L273 TraceCheckUtils]: 41: Hoare triple {3854#false} ~cond := #in~cond; {3854#false} is VALID [2018-11-23 12:11:27,155 INFO L273 TraceCheckUtils]: 42: Hoare triple {3854#false} assume 0 == ~cond; {3854#false} is VALID [2018-11-23 12:11:27,155 INFO L273 TraceCheckUtils]: 43: Hoare triple {3854#false} assume !false; {3854#false} is VALID [2018-11-23 12:11:27,159 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:27,159 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:27,159 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:27,169 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 12:11:27,200 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 12:11:27,201 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:27,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:27,238 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:27,393 INFO L256 TraceCheckUtils]: 0: Hoare triple {3853#true} call ULTIMATE.init(); {3853#true} is VALID [2018-11-23 12:11:27,394 INFO L273 TraceCheckUtils]: 1: Hoare triple {3853#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {3853#true} is VALID [2018-11-23 12:11:27,394 INFO L273 TraceCheckUtils]: 2: Hoare triple {3853#true} assume true; {3853#true} is VALID [2018-11-23 12:11:27,394 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3853#true} {3853#true} #59#return; {3853#true} is VALID [2018-11-23 12:11:27,394 INFO L256 TraceCheckUtils]: 4: Hoare triple {3853#true} call #t~ret4 := main(); {3853#true} is VALID [2018-11-23 12:11:27,395 INFO L273 TraceCheckUtils]: 5: Hoare triple {3853#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {3884#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:27,395 INFO L273 TraceCheckUtils]: 6: Hoare triple {3884#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3884#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:27,396 INFO L273 TraceCheckUtils]: 7: Hoare triple {3884#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3884#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:27,397 INFO L273 TraceCheckUtils]: 8: Hoare triple {3884#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {3856#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:27,397 INFO L273 TraceCheckUtils]: 9: Hoare triple {3856#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3856#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:27,398 INFO L273 TraceCheckUtils]: 10: Hoare triple {3856#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3856#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:27,399 INFO L273 TraceCheckUtils]: 11: Hoare triple {3856#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {3857#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:27,399 INFO L273 TraceCheckUtils]: 12: Hoare triple {3857#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3857#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:27,400 INFO L273 TraceCheckUtils]: 13: Hoare triple {3857#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3857#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:27,401 INFO L273 TraceCheckUtils]: 14: Hoare triple {3857#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {3858#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:27,405 INFO L273 TraceCheckUtils]: 15: Hoare triple {3858#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3858#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:27,405 INFO L273 TraceCheckUtils]: 16: Hoare triple {3858#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3858#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:27,406 INFO L273 TraceCheckUtils]: 17: Hoare triple {3858#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {3859#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:27,406 INFO L273 TraceCheckUtils]: 18: Hoare triple {3859#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3859#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:27,406 INFO L273 TraceCheckUtils]: 19: Hoare triple {3859#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3859#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:27,407 INFO L273 TraceCheckUtils]: 20: Hoare triple {3859#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {3860#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:27,408 INFO L273 TraceCheckUtils]: 21: Hoare triple {3860#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3860#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:27,408 INFO L273 TraceCheckUtils]: 22: Hoare triple {3860#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3860#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:27,409 INFO L273 TraceCheckUtils]: 23: Hoare triple {3860#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {3861#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:27,410 INFO L273 TraceCheckUtils]: 24: Hoare triple {3861#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3861#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:27,411 INFO L273 TraceCheckUtils]: 25: Hoare triple {3861#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3861#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:27,411 INFO L273 TraceCheckUtils]: 26: Hoare triple {3861#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {3862#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:27,412 INFO L273 TraceCheckUtils]: 27: Hoare triple {3862#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3862#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:27,413 INFO L273 TraceCheckUtils]: 28: Hoare triple {3862#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3862#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:27,414 INFO L273 TraceCheckUtils]: 29: Hoare triple {3862#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {3863#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:27,414 INFO L273 TraceCheckUtils]: 30: Hoare triple {3863#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3863#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:27,415 INFO L273 TraceCheckUtils]: 31: Hoare triple {3863#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3863#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:27,416 INFO L273 TraceCheckUtils]: 32: Hoare triple {3863#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {3864#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:27,416 INFO L273 TraceCheckUtils]: 33: Hoare triple {3864#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3864#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:27,417 INFO L273 TraceCheckUtils]: 34: Hoare triple {3864#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3864#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:27,418 INFO L273 TraceCheckUtils]: 35: Hoare triple {3864#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {3865#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:27,419 INFO L273 TraceCheckUtils]: 36: Hoare triple {3865#(<= main_~i~0 20)} assume !(~i~0 < 100000); {3854#false} is VALID [2018-11-23 12:11:27,419 INFO L273 TraceCheckUtils]: 37: Hoare triple {3854#false} ~i~0 := 0; {3854#false} is VALID [2018-11-23 12:11:27,419 INFO L273 TraceCheckUtils]: 38: Hoare triple {3854#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {3854#false} is VALID [2018-11-23 12:11:27,420 INFO L273 TraceCheckUtils]: 39: Hoare triple {3854#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {3854#false} is VALID [2018-11-23 12:11:27,420 INFO L256 TraceCheckUtils]: 40: Hoare triple {3854#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {3854#false} is VALID [2018-11-23 12:11:27,420 INFO L273 TraceCheckUtils]: 41: Hoare triple {3854#false} ~cond := #in~cond; {3854#false} is VALID [2018-11-23 12:11:27,420 INFO L273 TraceCheckUtils]: 42: Hoare triple {3854#false} assume 0 == ~cond; {3854#false} is VALID [2018-11-23 12:11:27,421 INFO L273 TraceCheckUtils]: 43: Hoare triple {3854#false} assume !false; {3854#false} is VALID [2018-11-23 12:11:27,424 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:27,444 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:27,444 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-11-23 12:11:27,445 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-11-23 12:11:27,445 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:27,445 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 12:11:27,500 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:27,500 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 12:11:27,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 12:11:27,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-23 12:11:27,501 INFO L87 Difference]: Start difference. First operand 49 states and 61 transitions. Second operand 14 states. [2018-11-23 12:11:28,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:28,280 INFO L93 Difference]: Finished difference Result 121 states and 159 transitions. [2018-11-23 12:11:28,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 12:11:28,280 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-11-23 12:11:28,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:28,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 12:11:28,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 159 transitions. [2018-11-23 12:11:28,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 12:11:28,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 159 transitions. [2018-11-23 12:11:28,286 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 159 transitions. [2018-11-23 12:11:28,565 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:28,568 INFO L225 Difference]: With dead ends: 121 [2018-11-23 12:11:28,568 INFO L226 Difference]: Without dead ends: 109 [2018-11-23 12:11:28,569 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-23 12:11:28,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-11-23 12:11:28,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 52. [2018-11-23 12:11:28,591 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:28,592 INFO L82 GeneralOperation]: Start isEquivalent. First operand 109 states. Second operand 52 states. [2018-11-23 12:11:28,592 INFO L74 IsIncluded]: Start isIncluded. First operand 109 states. Second operand 52 states. [2018-11-23 12:11:28,592 INFO L87 Difference]: Start difference. First operand 109 states. Second operand 52 states. [2018-11-23 12:11:28,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:28,595 INFO L93 Difference]: Finished difference Result 109 states and 145 transitions. [2018-11-23 12:11:28,595 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 145 transitions. [2018-11-23 12:11:28,596 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:28,596 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:28,596 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand 109 states. [2018-11-23 12:11:28,596 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 109 states. [2018-11-23 12:11:28,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:28,600 INFO L93 Difference]: Finished difference Result 109 states and 145 transitions. [2018-11-23 12:11:28,600 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 145 transitions. [2018-11-23 12:11:28,601 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:28,601 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:28,601 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:28,601 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:28,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-11-23 12:11:28,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 65 transitions. [2018-11-23 12:11:28,602 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 65 transitions. Word has length 44 [2018-11-23 12:11:28,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:28,603 INFO L480 AbstractCegarLoop]: Abstraction has 52 states and 65 transitions. [2018-11-23 12:11:28,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 12:11:28,603 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 65 transitions. [2018-11-23 12:11:28,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-23 12:11:28,603 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:28,603 INFO L402 BasicCegarLoop]: trace histogram [11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:28,604 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:28,604 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:28,604 INFO L82 PathProgramCache]: Analyzing trace with hash -44913494, now seen corresponding path program 11 times [2018-11-23 12:11:28,604 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:28,604 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:28,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:28,605 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:28,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:28,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:29,353 INFO L256 TraceCheckUtils]: 0: Hoare triple {4452#true} call ULTIMATE.init(); {4452#true} is VALID [2018-11-23 12:11:29,353 INFO L273 TraceCheckUtils]: 1: Hoare triple {4452#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {4452#true} is VALID [2018-11-23 12:11:29,354 INFO L273 TraceCheckUtils]: 2: Hoare triple {4452#true} assume true; {4452#true} is VALID [2018-11-23 12:11:29,354 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4452#true} {4452#true} #59#return; {4452#true} is VALID [2018-11-23 12:11:29,354 INFO L256 TraceCheckUtils]: 4: Hoare triple {4452#true} call #t~ret4 := main(); {4452#true} is VALID [2018-11-23 12:11:29,355 INFO L273 TraceCheckUtils]: 5: Hoare triple {4452#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {4454#(= main_~i~0 0)} is VALID [2018-11-23 12:11:29,355 INFO L273 TraceCheckUtils]: 6: Hoare triple {4454#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4454#(= main_~i~0 0)} is VALID [2018-11-23 12:11:29,356 INFO L273 TraceCheckUtils]: 7: Hoare triple {4454#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4454#(= main_~i~0 0)} is VALID [2018-11-23 12:11:29,356 INFO L273 TraceCheckUtils]: 8: Hoare triple {4454#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {4455#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:29,356 INFO L273 TraceCheckUtils]: 9: Hoare triple {4455#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4455#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:29,357 INFO L273 TraceCheckUtils]: 10: Hoare triple {4455#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4455#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:29,357 INFO L273 TraceCheckUtils]: 11: Hoare triple {4455#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {4456#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:29,358 INFO L273 TraceCheckUtils]: 12: Hoare triple {4456#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4456#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:29,358 INFO L273 TraceCheckUtils]: 13: Hoare triple {4456#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4456#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:29,359 INFO L273 TraceCheckUtils]: 14: Hoare triple {4456#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {4457#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:29,359 INFO L273 TraceCheckUtils]: 15: Hoare triple {4457#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4457#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:29,360 INFO L273 TraceCheckUtils]: 16: Hoare triple {4457#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4457#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:29,361 INFO L273 TraceCheckUtils]: 17: Hoare triple {4457#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {4458#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:29,361 INFO L273 TraceCheckUtils]: 18: Hoare triple {4458#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4458#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:29,362 INFO L273 TraceCheckUtils]: 19: Hoare triple {4458#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4458#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:29,363 INFO L273 TraceCheckUtils]: 20: Hoare triple {4458#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {4459#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:29,363 INFO L273 TraceCheckUtils]: 21: Hoare triple {4459#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4459#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:29,375 INFO L273 TraceCheckUtils]: 22: Hoare triple {4459#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4459#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:29,375 INFO L273 TraceCheckUtils]: 23: Hoare triple {4459#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {4460#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:29,392 INFO L273 TraceCheckUtils]: 24: Hoare triple {4460#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4460#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:29,398 INFO L273 TraceCheckUtils]: 25: Hoare triple {4460#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4460#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:29,398 INFO L273 TraceCheckUtils]: 26: Hoare triple {4460#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {4461#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:29,399 INFO L273 TraceCheckUtils]: 27: Hoare triple {4461#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4461#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:29,399 INFO L273 TraceCheckUtils]: 28: Hoare triple {4461#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4461#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:29,399 INFO L273 TraceCheckUtils]: 29: Hoare triple {4461#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {4462#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:29,400 INFO L273 TraceCheckUtils]: 30: Hoare triple {4462#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4462#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:29,400 INFO L273 TraceCheckUtils]: 31: Hoare triple {4462#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4462#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:29,401 INFO L273 TraceCheckUtils]: 32: Hoare triple {4462#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {4463#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:29,401 INFO L273 TraceCheckUtils]: 33: Hoare triple {4463#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4463#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:29,401 INFO L273 TraceCheckUtils]: 34: Hoare triple {4463#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4463#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:29,402 INFO L273 TraceCheckUtils]: 35: Hoare triple {4463#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {4464#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:29,402 INFO L273 TraceCheckUtils]: 36: Hoare triple {4464#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4464#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:29,403 INFO L273 TraceCheckUtils]: 37: Hoare triple {4464#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4464#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:29,404 INFO L273 TraceCheckUtils]: 38: Hoare triple {4464#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {4465#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:29,404 INFO L273 TraceCheckUtils]: 39: Hoare triple {4465#(<= main_~i~0 22)} assume !(~i~0 < 100000); {4453#false} is VALID [2018-11-23 12:11:29,405 INFO L273 TraceCheckUtils]: 40: Hoare triple {4453#false} ~i~0 := 0; {4453#false} is VALID [2018-11-23 12:11:29,405 INFO L273 TraceCheckUtils]: 41: Hoare triple {4453#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4453#false} is VALID [2018-11-23 12:11:29,405 INFO L273 TraceCheckUtils]: 42: Hoare triple {4453#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4453#false} is VALID [2018-11-23 12:11:29,405 INFO L256 TraceCheckUtils]: 43: Hoare triple {4453#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {4453#false} is VALID [2018-11-23 12:11:29,405 INFO L273 TraceCheckUtils]: 44: Hoare triple {4453#false} ~cond := #in~cond; {4453#false} is VALID [2018-11-23 12:11:29,406 INFO L273 TraceCheckUtils]: 45: Hoare triple {4453#false} assume 0 == ~cond; {4453#false} is VALID [2018-11-23 12:11:29,406 INFO L273 TraceCheckUtils]: 46: Hoare triple {4453#false} assume !false; {4453#false} is VALID [2018-11-23 12:11:29,409 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 0 proven. 176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:29,409 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:29,409 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:29,417 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 12:11:31,397 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-11-23 12:11:31,397 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:31,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:31,416 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:31,557 INFO L256 TraceCheckUtils]: 0: Hoare triple {4452#true} call ULTIMATE.init(); {4452#true} is VALID [2018-11-23 12:11:31,557 INFO L273 TraceCheckUtils]: 1: Hoare triple {4452#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {4452#true} is VALID [2018-11-23 12:11:31,558 INFO L273 TraceCheckUtils]: 2: Hoare triple {4452#true} assume true; {4452#true} is VALID [2018-11-23 12:11:31,558 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4452#true} {4452#true} #59#return; {4452#true} is VALID [2018-11-23 12:11:31,558 INFO L256 TraceCheckUtils]: 4: Hoare triple {4452#true} call #t~ret4 := main(); {4452#true} is VALID [2018-11-23 12:11:31,558 INFO L273 TraceCheckUtils]: 5: Hoare triple {4452#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {4484#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:31,559 INFO L273 TraceCheckUtils]: 6: Hoare triple {4484#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4484#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:31,559 INFO L273 TraceCheckUtils]: 7: Hoare triple {4484#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4484#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:31,560 INFO L273 TraceCheckUtils]: 8: Hoare triple {4484#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {4455#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:31,560 INFO L273 TraceCheckUtils]: 9: Hoare triple {4455#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4455#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:31,560 INFO L273 TraceCheckUtils]: 10: Hoare triple {4455#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4455#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:31,561 INFO L273 TraceCheckUtils]: 11: Hoare triple {4455#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {4456#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:31,561 INFO L273 TraceCheckUtils]: 12: Hoare triple {4456#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4456#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:31,561 INFO L273 TraceCheckUtils]: 13: Hoare triple {4456#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4456#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:31,562 INFO L273 TraceCheckUtils]: 14: Hoare triple {4456#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {4457#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:31,563 INFO L273 TraceCheckUtils]: 15: Hoare triple {4457#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4457#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:31,563 INFO L273 TraceCheckUtils]: 16: Hoare triple {4457#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4457#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:31,564 INFO L273 TraceCheckUtils]: 17: Hoare triple {4457#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {4458#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:31,564 INFO L273 TraceCheckUtils]: 18: Hoare triple {4458#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4458#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:31,565 INFO L273 TraceCheckUtils]: 19: Hoare triple {4458#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4458#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:31,566 INFO L273 TraceCheckUtils]: 20: Hoare triple {4458#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {4459#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:31,566 INFO L273 TraceCheckUtils]: 21: Hoare triple {4459#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4459#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:31,567 INFO L273 TraceCheckUtils]: 22: Hoare triple {4459#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4459#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:31,567 INFO L273 TraceCheckUtils]: 23: Hoare triple {4459#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {4460#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:31,568 INFO L273 TraceCheckUtils]: 24: Hoare triple {4460#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4460#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:31,569 INFO L273 TraceCheckUtils]: 25: Hoare triple {4460#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4460#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:31,569 INFO L273 TraceCheckUtils]: 26: Hoare triple {4460#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {4461#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:31,570 INFO L273 TraceCheckUtils]: 27: Hoare triple {4461#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4461#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:31,570 INFO L273 TraceCheckUtils]: 28: Hoare triple {4461#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4461#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:31,571 INFO L273 TraceCheckUtils]: 29: Hoare triple {4461#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {4462#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:31,572 INFO L273 TraceCheckUtils]: 30: Hoare triple {4462#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4462#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:31,572 INFO L273 TraceCheckUtils]: 31: Hoare triple {4462#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4462#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:31,573 INFO L273 TraceCheckUtils]: 32: Hoare triple {4462#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {4463#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:31,574 INFO L273 TraceCheckUtils]: 33: Hoare triple {4463#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4463#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:31,574 INFO L273 TraceCheckUtils]: 34: Hoare triple {4463#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4463#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:31,575 INFO L273 TraceCheckUtils]: 35: Hoare triple {4463#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {4464#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:31,575 INFO L273 TraceCheckUtils]: 36: Hoare triple {4464#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4464#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:31,576 INFO L273 TraceCheckUtils]: 37: Hoare triple {4464#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4464#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:31,577 INFO L273 TraceCheckUtils]: 38: Hoare triple {4464#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {4465#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:31,577 INFO L273 TraceCheckUtils]: 39: Hoare triple {4465#(<= main_~i~0 22)} assume !(~i~0 < 100000); {4453#false} is VALID [2018-11-23 12:11:31,578 INFO L273 TraceCheckUtils]: 40: Hoare triple {4453#false} ~i~0 := 0; {4453#false} is VALID [2018-11-23 12:11:31,578 INFO L273 TraceCheckUtils]: 41: Hoare triple {4453#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {4453#false} is VALID [2018-11-23 12:11:31,578 INFO L273 TraceCheckUtils]: 42: Hoare triple {4453#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {4453#false} is VALID [2018-11-23 12:11:31,578 INFO L256 TraceCheckUtils]: 43: Hoare triple {4453#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {4453#false} is VALID [2018-11-23 12:11:31,579 INFO L273 TraceCheckUtils]: 44: Hoare triple {4453#false} ~cond := #in~cond; {4453#false} is VALID [2018-11-23 12:11:31,579 INFO L273 TraceCheckUtils]: 45: Hoare triple {4453#false} assume 0 == ~cond; {4453#false} is VALID [2018-11-23 12:11:31,579 INFO L273 TraceCheckUtils]: 46: Hoare triple {4453#false} assume !false; {4453#false} is VALID [2018-11-23 12:11:31,581 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 0 proven. 176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:31,603 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:31,603 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-11-23 12:11:31,603 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-11-23 12:11:31,603 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:31,604 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states. [2018-11-23 12:11:31,655 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:31,655 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-23 12:11:31,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-23 12:11:31,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-11-23 12:11:31,656 INFO L87 Difference]: Start difference. First operand 52 states and 65 transitions. Second operand 15 states. [2018-11-23 12:11:32,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:32,277 INFO L93 Difference]: Finished difference Result 129 states and 170 transitions. [2018-11-23 12:11:32,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 12:11:32,277 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-11-23 12:11:32,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:32,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 12:11:32,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 170 transitions. [2018-11-23 12:11:32,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 12:11:32,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 170 transitions. [2018-11-23 12:11:32,283 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 170 transitions. [2018-11-23 12:11:33,069 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:33,072 INFO L225 Difference]: With dead ends: 129 [2018-11-23 12:11:33,072 INFO L226 Difference]: Without dead ends: 117 [2018-11-23 12:11:33,073 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-11-23 12:11:33,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-11-23 12:11:33,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 55. [2018-11-23 12:11:33,105 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:33,105 INFO L82 GeneralOperation]: Start isEquivalent. First operand 117 states. Second operand 55 states. [2018-11-23 12:11:33,105 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand 55 states. [2018-11-23 12:11:33,105 INFO L87 Difference]: Start difference. First operand 117 states. Second operand 55 states. [2018-11-23 12:11:33,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:33,109 INFO L93 Difference]: Finished difference Result 117 states and 156 transitions. [2018-11-23 12:11:33,109 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 156 transitions. [2018-11-23 12:11:33,110 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:33,110 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:33,110 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand 117 states. [2018-11-23 12:11:33,111 INFO L87 Difference]: Start difference. First operand 55 states. Second operand 117 states. [2018-11-23 12:11:33,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:33,114 INFO L93 Difference]: Finished difference Result 117 states and 156 transitions. [2018-11-23 12:11:33,115 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 156 transitions. [2018-11-23 12:11:33,116 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:33,116 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:33,116 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:33,117 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:33,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-11-23 12:11:33,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 69 transitions. [2018-11-23 12:11:33,119 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 69 transitions. Word has length 47 [2018-11-23 12:11:33,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:33,119 INFO L480 AbstractCegarLoop]: Abstraction has 55 states and 69 transitions. [2018-11-23 12:11:33,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-23 12:11:33,120 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 69 transitions. [2018-11-23 12:11:33,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-23 12:11:33,120 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:33,120 INFO L402 BasicCegarLoop]: trace histogram [12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:33,121 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:33,121 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:33,121 INFO L82 PathProgramCache]: Analyzing trace with hash 1518597005, now seen corresponding path program 12 times [2018-11-23 12:11:33,121 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:33,121 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:33,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:33,123 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:33,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:33,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:34,037 INFO L256 TraceCheckUtils]: 0: Hoare triple {5092#true} call ULTIMATE.init(); {5092#true} is VALID [2018-11-23 12:11:34,037 INFO L273 TraceCheckUtils]: 1: Hoare triple {5092#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {5092#true} is VALID [2018-11-23 12:11:34,037 INFO L273 TraceCheckUtils]: 2: Hoare triple {5092#true} assume true; {5092#true} is VALID [2018-11-23 12:11:34,037 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5092#true} {5092#true} #59#return; {5092#true} is VALID [2018-11-23 12:11:34,038 INFO L256 TraceCheckUtils]: 4: Hoare triple {5092#true} call #t~ret4 := main(); {5092#true} is VALID [2018-11-23 12:11:34,038 INFO L273 TraceCheckUtils]: 5: Hoare triple {5092#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {5094#(= main_~i~0 0)} is VALID [2018-11-23 12:11:34,038 INFO L273 TraceCheckUtils]: 6: Hoare triple {5094#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5094#(= main_~i~0 0)} is VALID [2018-11-23 12:11:34,039 INFO L273 TraceCheckUtils]: 7: Hoare triple {5094#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5094#(= main_~i~0 0)} is VALID [2018-11-23 12:11:34,039 INFO L273 TraceCheckUtils]: 8: Hoare triple {5094#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {5095#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:34,040 INFO L273 TraceCheckUtils]: 9: Hoare triple {5095#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5095#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:34,040 INFO L273 TraceCheckUtils]: 10: Hoare triple {5095#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5095#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:34,041 INFO L273 TraceCheckUtils]: 11: Hoare triple {5095#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {5096#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:34,042 INFO L273 TraceCheckUtils]: 12: Hoare triple {5096#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5096#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:34,042 INFO L273 TraceCheckUtils]: 13: Hoare triple {5096#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5096#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:34,043 INFO L273 TraceCheckUtils]: 14: Hoare triple {5096#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {5097#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:34,044 INFO L273 TraceCheckUtils]: 15: Hoare triple {5097#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5097#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:34,044 INFO L273 TraceCheckUtils]: 16: Hoare triple {5097#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5097#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:34,045 INFO L273 TraceCheckUtils]: 17: Hoare triple {5097#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {5098#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:34,046 INFO L273 TraceCheckUtils]: 18: Hoare triple {5098#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5098#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:34,046 INFO L273 TraceCheckUtils]: 19: Hoare triple {5098#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5098#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:34,047 INFO L273 TraceCheckUtils]: 20: Hoare triple {5098#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {5099#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:34,047 INFO L273 TraceCheckUtils]: 21: Hoare triple {5099#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5099#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:34,048 INFO L273 TraceCheckUtils]: 22: Hoare triple {5099#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5099#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:34,049 INFO L273 TraceCheckUtils]: 23: Hoare triple {5099#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {5100#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:34,049 INFO L273 TraceCheckUtils]: 24: Hoare triple {5100#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5100#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:34,050 INFO L273 TraceCheckUtils]: 25: Hoare triple {5100#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5100#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:34,050 INFO L273 TraceCheckUtils]: 26: Hoare triple {5100#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {5101#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:34,051 INFO L273 TraceCheckUtils]: 27: Hoare triple {5101#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5101#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:34,052 INFO L273 TraceCheckUtils]: 28: Hoare triple {5101#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5101#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:34,052 INFO L273 TraceCheckUtils]: 29: Hoare triple {5101#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {5102#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:34,053 INFO L273 TraceCheckUtils]: 30: Hoare triple {5102#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5102#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:34,053 INFO L273 TraceCheckUtils]: 31: Hoare triple {5102#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5102#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:34,054 INFO L273 TraceCheckUtils]: 32: Hoare triple {5102#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {5103#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:34,055 INFO L273 TraceCheckUtils]: 33: Hoare triple {5103#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5103#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:34,055 INFO L273 TraceCheckUtils]: 34: Hoare triple {5103#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5103#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:34,056 INFO L273 TraceCheckUtils]: 35: Hoare triple {5103#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {5104#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:34,057 INFO L273 TraceCheckUtils]: 36: Hoare triple {5104#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5104#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:34,057 INFO L273 TraceCheckUtils]: 37: Hoare triple {5104#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5104#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:34,058 INFO L273 TraceCheckUtils]: 38: Hoare triple {5104#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {5105#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:34,058 INFO L273 TraceCheckUtils]: 39: Hoare triple {5105#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5105#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:34,059 INFO L273 TraceCheckUtils]: 40: Hoare triple {5105#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5105#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:34,060 INFO L273 TraceCheckUtils]: 41: Hoare triple {5105#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {5106#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:34,060 INFO L273 TraceCheckUtils]: 42: Hoare triple {5106#(<= main_~i~0 24)} assume !(~i~0 < 100000); {5093#false} is VALID [2018-11-23 12:11:34,061 INFO L273 TraceCheckUtils]: 43: Hoare triple {5093#false} ~i~0 := 0; {5093#false} is VALID [2018-11-23 12:11:34,061 INFO L273 TraceCheckUtils]: 44: Hoare triple {5093#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5093#false} is VALID [2018-11-23 12:11:34,061 INFO L273 TraceCheckUtils]: 45: Hoare triple {5093#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5093#false} is VALID [2018-11-23 12:11:34,061 INFO L256 TraceCheckUtils]: 46: Hoare triple {5093#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {5093#false} is VALID [2018-11-23 12:11:34,062 INFO L273 TraceCheckUtils]: 47: Hoare triple {5093#false} ~cond := #in~cond; {5093#false} is VALID [2018-11-23 12:11:34,062 INFO L273 TraceCheckUtils]: 48: Hoare triple {5093#false} assume 0 == ~cond; {5093#false} is VALID [2018-11-23 12:11:34,062 INFO L273 TraceCheckUtils]: 49: Hoare triple {5093#false} assume !false; {5093#false} is VALID [2018-11-23 12:11:34,066 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:34,066 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:34,066 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:34,082 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 12:11:34,509 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-11-23 12:11:34,509 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:34,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:34,525 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:34,645 INFO L256 TraceCheckUtils]: 0: Hoare triple {5092#true} call ULTIMATE.init(); {5092#true} is VALID [2018-11-23 12:11:34,645 INFO L273 TraceCheckUtils]: 1: Hoare triple {5092#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {5092#true} is VALID [2018-11-23 12:11:34,646 INFO L273 TraceCheckUtils]: 2: Hoare triple {5092#true} assume true; {5092#true} is VALID [2018-11-23 12:11:34,646 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5092#true} {5092#true} #59#return; {5092#true} is VALID [2018-11-23 12:11:34,646 INFO L256 TraceCheckUtils]: 4: Hoare triple {5092#true} call #t~ret4 := main(); {5092#true} is VALID [2018-11-23 12:11:34,663 INFO L273 TraceCheckUtils]: 5: Hoare triple {5092#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {5125#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:34,672 INFO L273 TraceCheckUtils]: 6: Hoare triple {5125#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5125#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:34,682 INFO L273 TraceCheckUtils]: 7: Hoare triple {5125#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5125#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:34,682 INFO L273 TraceCheckUtils]: 8: Hoare triple {5125#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {5095#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:34,683 INFO L273 TraceCheckUtils]: 9: Hoare triple {5095#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5095#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:34,683 INFO L273 TraceCheckUtils]: 10: Hoare triple {5095#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5095#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:34,684 INFO L273 TraceCheckUtils]: 11: Hoare triple {5095#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {5096#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:34,684 INFO L273 TraceCheckUtils]: 12: Hoare triple {5096#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5096#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:34,684 INFO L273 TraceCheckUtils]: 13: Hoare triple {5096#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5096#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:34,685 INFO L273 TraceCheckUtils]: 14: Hoare triple {5096#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {5097#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:34,685 INFO L273 TraceCheckUtils]: 15: Hoare triple {5097#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5097#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:34,685 INFO L273 TraceCheckUtils]: 16: Hoare triple {5097#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5097#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:34,686 INFO L273 TraceCheckUtils]: 17: Hoare triple {5097#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {5098#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:34,686 INFO L273 TraceCheckUtils]: 18: Hoare triple {5098#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5098#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:34,686 INFO L273 TraceCheckUtils]: 19: Hoare triple {5098#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5098#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:34,687 INFO L273 TraceCheckUtils]: 20: Hoare triple {5098#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {5099#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:34,688 INFO L273 TraceCheckUtils]: 21: Hoare triple {5099#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5099#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:34,688 INFO L273 TraceCheckUtils]: 22: Hoare triple {5099#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5099#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:34,689 INFO L273 TraceCheckUtils]: 23: Hoare triple {5099#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {5100#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:34,689 INFO L273 TraceCheckUtils]: 24: Hoare triple {5100#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5100#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:34,690 INFO L273 TraceCheckUtils]: 25: Hoare triple {5100#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5100#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:34,691 INFO L273 TraceCheckUtils]: 26: Hoare triple {5100#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {5101#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:34,691 INFO L273 TraceCheckUtils]: 27: Hoare triple {5101#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5101#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:34,692 INFO L273 TraceCheckUtils]: 28: Hoare triple {5101#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5101#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:34,693 INFO L273 TraceCheckUtils]: 29: Hoare triple {5101#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {5102#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:34,693 INFO L273 TraceCheckUtils]: 30: Hoare triple {5102#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5102#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:34,694 INFO L273 TraceCheckUtils]: 31: Hoare triple {5102#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5102#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:34,694 INFO L273 TraceCheckUtils]: 32: Hoare triple {5102#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {5103#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:34,695 INFO L273 TraceCheckUtils]: 33: Hoare triple {5103#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5103#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:34,695 INFO L273 TraceCheckUtils]: 34: Hoare triple {5103#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5103#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:34,696 INFO L273 TraceCheckUtils]: 35: Hoare triple {5103#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {5104#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:34,697 INFO L273 TraceCheckUtils]: 36: Hoare triple {5104#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5104#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:34,697 INFO L273 TraceCheckUtils]: 37: Hoare triple {5104#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5104#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:34,698 INFO L273 TraceCheckUtils]: 38: Hoare triple {5104#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {5105#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:34,699 INFO L273 TraceCheckUtils]: 39: Hoare triple {5105#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5105#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:34,699 INFO L273 TraceCheckUtils]: 40: Hoare triple {5105#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5105#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:34,700 INFO L273 TraceCheckUtils]: 41: Hoare triple {5105#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {5106#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:34,701 INFO L273 TraceCheckUtils]: 42: Hoare triple {5106#(<= main_~i~0 24)} assume !(~i~0 < 100000); {5093#false} is VALID [2018-11-23 12:11:34,701 INFO L273 TraceCheckUtils]: 43: Hoare triple {5093#false} ~i~0 := 0; {5093#false} is VALID [2018-11-23 12:11:34,701 INFO L273 TraceCheckUtils]: 44: Hoare triple {5093#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5093#false} is VALID [2018-11-23 12:11:34,701 INFO L273 TraceCheckUtils]: 45: Hoare triple {5093#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5093#false} is VALID [2018-11-23 12:11:34,701 INFO L256 TraceCheckUtils]: 46: Hoare triple {5093#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {5093#false} is VALID [2018-11-23 12:11:34,702 INFO L273 TraceCheckUtils]: 47: Hoare triple {5093#false} ~cond := #in~cond; {5093#false} is VALID [2018-11-23 12:11:34,702 INFO L273 TraceCheckUtils]: 48: Hoare triple {5093#false} assume 0 == ~cond; {5093#false} is VALID [2018-11-23 12:11:34,702 INFO L273 TraceCheckUtils]: 49: Hoare triple {5093#false} assume !false; {5093#false} is VALID [2018-11-23 12:11:34,707 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:34,728 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:34,728 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-11-23 12:11:34,728 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-11-23 12:11:34,729 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:34,729 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 12:11:34,784 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:34,784 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 12:11:34,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 12:11:34,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-23 12:11:34,786 INFO L87 Difference]: Start difference. First operand 55 states and 69 transitions. Second operand 16 states. [2018-11-23 12:11:35,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:35,582 INFO L93 Difference]: Finished difference Result 137 states and 181 transitions. [2018-11-23 12:11:35,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 12:11:35,583 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-11-23 12:11:35,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:35,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 12:11:35,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 181 transitions. [2018-11-23 12:11:35,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 12:11:35,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 181 transitions. [2018-11-23 12:11:35,589 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states and 181 transitions. [2018-11-23 12:11:36,073 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 181 edges. 181 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:36,076 INFO L225 Difference]: With dead ends: 137 [2018-11-23 12:11:36,076 INFO L226 Difference]: Without dead ends: 125 [2018-11-23 12:11:36,076 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-23 12:11:36,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-11-23 12:11:36,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 58. [2018-11-23 12:11:36,096 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:36,097 INFO L82 GeneralOperation]: Start isEquivalent. First operand 125 states. Second operand 58 states. [2018-11-23 12:11:36,097 INFO L74 IsIncluded]: Start isIncluded. First operand 125 states. Second operand 58 states. [2018-11-23 12:11:36,097 INFO L87 Difference]: Start difference. First operand 125 states. Second operand 58 states. [2018-11-23 12:11:36,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:36,101 INFO L93 Difference]: Finished difference Result 125 states and 167 transitions. [2018-11-23 12:11:36,101 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 167 transitions. [2018-11-23 12:11:36,102 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:36,102 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:36,102 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand 125 states. [2018-11-23 12:11:36,102 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 125 states. [2018-11-23 12:11:36,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:36,106 INFO L93 Difference]: Finished difference Result 125 states and 167 transitions. [2018-11-23 12:11:36,106 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 167 transitions. [2018-11-23 12:11:36,106 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:36,106 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:36,107 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:36,107 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:36,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-11-23 12:11:36,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 73 transitions. [2018-11-23 12:11:36,108 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 73 transitions. Word has length 50 [2018-11-23 12:11:36,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:36,108 INFO L480 AbstractCegarLoop]: Abstraction has 58 states and 73 transitions. [2018-11-23 12:11:36,109 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 12:11:36,109 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 73 transitions. [2018-11-23 12:11:36,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 12:11:36,109 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:36,109 INFO L402 BasicCegarLoop]: trace histogram [13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:36,110 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:36,110 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:36,110 INFO L82 PathProgramCache]: Analyzing trace with hash 1139547594, now seen corresponding path program 13 times [2018-11-23 12:11:36,110 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:36,110 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:36,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:36,111 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:36,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:36,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:36,734 INFO L256 TraceCheckUtils]: 0: Hoare triple {5773#true} call ULTIMATE.init(); {5773#true} is VALID [2018-11-23 12:11:36,735 INFO L273 TraceCheckUtils]: 1: Hoare triple {5773#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {5773#true} is VALID [2018-11-23 12:11:36,735 INFO L273 TraceCheckUtils]: 2: Hoare triple {5773#true} assume true; {5773#true} is VALID [2018-11-23 12:11:36,735 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5773#true} {5773#true} #59#return; {5773#true} is VALID [2018-11-23 12:11:36,736 INFO L256 TraceCheckUtils]: 4: Hoare triple {5773#true} call #t~ret4 := main(); {5773#true} is VALID [2018-11-23 12:11:36,736 INFO L273 TraceCheckUtils]: 5: Hoare triple {5773#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {5775#(= main_~i~0 0)} is VALID [2018-11-23 12:11:36,737 INFO L273 TraceCheckUtils]: 6: Hoare triple {5775#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5775#(= main_~i~0 0)} is VALID [2018-11-23 12:11:36,737 INFO L273 TraceCheckUtils]: 7: Hoare triple {5775#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5775#(= main_~i~0 0)} is VALID [2018-11-23 12:11:36,737 INFO L273 TraceCheckUtils]: 8: Hoare triple {5775#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {5776#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:36,738 INFO L273 TraceCheckUtils]: 9: Hoare triple {5776#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5776#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:36,738 INFO L273 TraceCheckUtils]: 10: Hoare triple {5776#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5776#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:36,739 INFO L273 TraceCheckUtils]: 11: Hoare triple {5776#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {5777#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:36,739 INFO L273 TraceCheckUtils]: 12: Hoare triple {5777#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5777#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:36,740 INFO L273 TraceCheckUtils]: 13: Hoare triple {5777#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5777#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:36,740 INFO L273 TraceCheckUtils]: 14: Hoare triple {5777#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {5778#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:36,741 INFO L273 TraceCheckUtils]: 15: Hoare triple {5778#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5778#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:36,741 INFO L273 TraceCheckUtils]: 16: Hoare triple {5778#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5778#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:36,742 INFO L273 TraceCheckUtils]: 17: Hoare triple {5778#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {5779#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:36,743 INFO L273 TraceCheckUtils]: 18: Hoare triple {5779#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5779#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:36,743 INFO L273 TraceCheckUtils]: 19: Hoare triple {5779#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5779#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:36,744 INFO L273 TraceCheckUtils]: 20: Hoare triple {5779#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {5780#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:36,745 INFO L273 TraceCheckUtils]: 21: Hoare triple {5780#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5780#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:36,745 INFO L273 TraceCheckUtils]: 22: Hoare triple {5780#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5780#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:36,746 INFO L273 TraceCheckUtils]: 23: Hoare triple {5780#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {5781#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:36,746 INFO L273 TraceCheckUtils]: 24: Hoare triple {5781#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5781#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:36,747 INFO L273 TraceCheckUtils]: 25: Hoare triple {5781#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5781#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:36,748 INFO L273 TraceCheckUtils]: 26: Hoare triple {5781#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {5782#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:36,748 INFO L273 TraceCheckUtils]: 27: Hoare triple {5782#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5782#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:36,749 INFO L273 TraceCheckUtils]: 28: Hoare triple {5782#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5782#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:36,750 INFO L273 TraceCheckUtils]: 29: Hoare triple {5782#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {5783#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:36,750 INFO L273 TraceCheckUtils]: 30: Hoare triple {5783#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5783#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:36,751 INFO L273 TraceCheckUtils]: 31: Hoare triple {5783#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5783#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:36,751 INFO L273 TraceCheckUtils]: 32: Hoare triple {5783#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {5784#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:36,752 INFO L273 TraceCheckUtils]: 33: Hoare triple {5784#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5784#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:36,752 INFO L273 TraceCheckUtils]: 34: Hoare triple {5784#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5784#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:36,753 INFO L273 TraceCheckUtils]: 35: Hoare triple {5784#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {5785#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:36,754 INFO L273 TraceCheckUtils]: 36: Hoare triple {5785#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5785#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:36,754 INFO L273 TraceCheckUtils]: 37: Hoare triple {5785#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5785#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:36,755 INFO L273 TraceCheckUtils]: 38: Hoare triple {5785#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {5786#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:36,756 INFO L273 TraceCheckUtils]: 39: Hoare triple {5786#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5786#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:36,756 INFO L273 TraceCheckUtils]: 40: Hoare triple {5786#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5786#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:36,757 INFO L273 TraceCheckUtils]: 41: Hoare triple {5786#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {5787#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:36,757 INFO L273 TraceCheckUtils]: 42: Hoare triple {5787#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5787#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:36,758 INFO L273 TraceCheckUtils]: 43: Hoare triple {5787#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5787#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:36,759 INFO L273 TraceCheckUtils]: 44: Hoare triple {5787#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {5788#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:36,759 INFO L273 TraceCheckUtils]: 45: Hoare triple {5788#(<= main_~i~0 26)} assume !(~i~0 < 100000); {5774#false} is VALID [2018-11-23 12:11:36,760 INFO L273 TraceCheckUtils]: 46: Hoare triple {5774#false} ~i~0 := 0; {5774#false} is VALID [2018-11-23 12:11:36,760 INFO L273 TraceCheckUtils]: 47: Hoare triple {5774#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5774#false} is VALID [2018-11-23 12:11:36,760 INFO L273 TraceCheckUtils]: 48: Hoare triple {5774#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5774#false} is VALID [2018-11-23 12:11:36,760 INFO L256 TraceCheckUtils]: 49: Hoare triple {5774#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {5774#false} is VALID [2018-11-23 12:11:36,760 INFO L273 TraceCheckUtils]: 50: Hoare triple {5774#false} ~cond := #in~cond; {5774#false} is VALID [2018-11-23 12:11:36,761 INFO L273 TraceCheckUtils]: 51: Hoare triple {5774#false} assume 0 == ~cond; {5774#false} is VALID [2018-11-23 12:11:36,761 INFO L273 TraceCheckUtils]: 52: Hoare triple {5774#false} assume !false; {5774#false} is VALID [2018-11-23 12:11:36,763 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 0 proven. 247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:36,763 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:36,763 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:36,773 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:36,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:36,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:36,821 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:36,967 INFO L256 TraceCheckUtils]: 0: Hoare triple {5773#true} call ULTIMATE.init(); {5773#true} is VALID [2018-11-23 12:11:36,968 INFO L273 TraceCheckUtils]: 1: Hoare triple {5773#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {5773#true} is VALID [2018-11-23 12:11:36,968 INFO L273 TraceCheckUtils]: 2: Hoare triple {5773#true} assume true; {5773#true} is VALID [2018-11-23 12:11:36,968 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5773#true} {5773#true} #59#return; {5773#true} is VALID [2018-11-23 12:11:36,968 INFO L256 TraceCheckUtils]: 4: Hoare triple {5773#true} call #t~ret4 := main(); {5773#true} is VALID [2018-11-23 12:11:36,969 INFO L273 TraceCheckUtils]: 5: Hoare triple {5773#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {5807#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:36,970 INFO L273 TraceCheckUtils]: 6: Hoare triple {5807#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5807#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:36,970 INFO L273 TraceCheckUtils]: 7: Hoare triple {5807#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5807#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:36,971 INFO L273 TraceCheckUtils]: 8: Hoare triple {5807#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {5776#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:36,971 INFO L273 TraceCheckUtils]: 9: Hoare triple {5776#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5776#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:36,971 INFO L273 TraceCheckUtils]: 10: Hoare triple {5776#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5776#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:36,972 INFO L273 TraceCheckUtils]: 11: Hoare triple {5776#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {5777#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:36,972 INFO L273 TraceCheckUtils]: 12: Hoare triple {5777#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5777#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:36,973 INFO L273 TraceCheckUtils]: 13: Hoare triple {5777#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5777#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:36,974 INFO L273 TraceCheckUtils]: 14: Hoare triple {5777#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {5778#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:36,974 INFO L273 TraceCheckUtils]: 15: Hoare triple {5778#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5778#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:36,975 INFO L273 TraceCheckUtils]: 16: Hoare triple {5778#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5778#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:36,975 INFO L273 TraceCheckUtils]: 17: Hoare triple {5778#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {5779#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:36,976 INFO L273 TraceCheckUtils]: 18: Hoare triple {5779#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5779#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:36,976 INFO L273 TraceCheckUtils]: 19: Hoare triple {5779#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5779#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:36,977 INFO L273 TraceCheckUtils]: 20: Hoare triple {5779#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {5780#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:36,978 INFO L273 TraceCheckUtils]: 21: Hoare triple {5780#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5780#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:36,978 INFO L273 TraceCheckUtils]: 22: Hoare triple {5780#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5780#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:36,979 INFO L273 TraceCheckUtils]: 23: Hoare triple {5780#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {5781#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:36,980 INFO L273 TraceCheckUtils]: 24: Hoare triple {5781#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5781#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:36,980 INFO L273 TraceCheckUtils]: 25: Hoare triple {5781#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5781#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:36,981 INFO L273 TraceCheckUtils]: 26: Hoare triple {5781#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {5782#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:36,981 INFO L273 TraceCheckUtils]: 27: Hoare triple {5782#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5782#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:36,982 INFO L273 TraceCheckUtils]: 28: Hoare triple {5782#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5782#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:36,983 INFO L273 TraceCheckUtils]: 29: Hoare triple {5782#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {5783#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:36,983 INFO L273 TraceCheckUtils]: 30: Hoare triple {5783#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5783#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:36,984 INFO L273 TraceCheckUtils]: 31: Hoare triple {5783#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5783#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:36,985 INFO L273 TraceCheckUtils]: 32: Hoare triple {5783#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {5784#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:36,985 INFO L273 TraceCheckUtils]: 33: Hoare triple {5784#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5784#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:36,986 INFO L273 TraceCheckUtils]: 34: Hoare triple {5784#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5784#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:36,986 INFO L273 TraceCheckUtils]: 35: Hoare triple {5784#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {5785#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:36,987 INFO L273 TraceCheckUtils]: 36: Hoare triple {5785#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5785#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:36,987 INFO L273 TraceCheckUtils]: 37: Hoare triple {5785#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5785#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:36,988 INFO L273 TraceCheckUtils]: 38: Hoare triple {5785#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {5786#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:36,989 INFO L273 TraceCheckUtils]: 39: Hoare triple {5786#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5786#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:36,989 INFO L273 TraceCheckUtils]: 40: Hoare triple {5786#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5786#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:36,990 INFO L273 TraceCheckUtils]: 41: Hoare triple {5786#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {5787#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:36,991 INFO L273 TraceCheckUtils]: 42: Hoare triple {5787#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5787#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:36,991 INFO L273 TraceCheckUtils]: 43: Hoare triple {5787#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5787#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:36,992 INFO L273 TraceCheckUtils]: 44: Hoare triple {5787#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {5788#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:36,993 INFO L273 TraceCheckUtils]: 45: Hoare triple {5788#(<= main_~i~0 26)} assume !(~i~0 < 100000); {5774#false} is VALID [2018-11-23 12:11:36,993 INFO L273 TraceCheckUtils]: 46: Hoare triple {5774#false} ~i~0 := 0; {5774#false} is VALID [2018-11-23 12:11:36,993 INFO L273 TraceCheckUtils]: 47: Hoare triple {5774#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {5774#false} is VALID [2018-11-23 12:11:36,993 INFO L273 TraceCheckUtils]: 48: Hoare triple {5774#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {5774#false} is VALID [2018-11-23 12:11:36,993 INFO L256 TraceCheckUtils]: 49: Hoare triple {5774#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {5774#false} is VALID [2018-11-23 12:11:36,994 INFO L273 TraceCheckUtils]: 50: Hoare triple {5774#false} ~cond := #in~cond; {5774#false} is VALID [2018-11-23 12:11:36,994 INFO L273 TraceCheckUtils]: 51: Hoare triple {5774#false} assume 0 == ~cond; {5774#false} is VALID [2018-11-23 12:11:36,994 INFO L273 TraceCheckUtils]: 52: Hoare triple {5774#false} assume !false; {5774#false} is VALID [2018-11-23 12:11:36,997 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 0 proven. 247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:37,016 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:37,016 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-11-23 12:11:37,016 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 53 [2018-11-23 12:11:37,017 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:37,017 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 12:11:37,070 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:37,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 12:11:37,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 12:11:37,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-11-23 12:11:37,072 INFO L87 Difference]: Start difference. First operand 58 states and 73 transitions. Second operand 17 states. [2018-11-23 12:11:38,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:38,333 INFO L93 Difference]: Finished difference Result 145 states and 192 transitions. [2018-11-23 12:11:38,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 12:11:38,333 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 53 [2018-11-23 12:11:38,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:38,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 12:11:38,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 192 transitions. [2018-11-23 12:11:38,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 12:11:38,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 192 transitions. [2018-11-23 12:11:38,341 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states and 192 transitions. [2018-11-23 12:11:38,917 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 192 edges. 192 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:38,921 INFO L225 Difference]: With dead ends: 145 [2018-11-23 12:11:38,922 INFO L226 Difference]: Without dead ends: 133 [2018-11-23 12:11:38,922 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-11-23 12:11:38,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-23 12:11:38,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 61. [2018-11-23 12:11:38,944 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:38,944 INFO L82 GeneralOperation]: Start isEquivalent. First operand 133 states. Second operand 61 states. [2018-11-23 12:11:38,945 INFO L74 IsIncluded]: Start isIncluded. First operand 133 states. Second operand 61 states. [2018-11-23 12:11:38,945 INFO L87 Difference]: Start difference. First operand 133 states. Second operand 61 states. [2018-11-23 12:11:38,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:38,950 INFO L93 Difference]: Finished difference Result 133 states and 178 transitions. [2018-11-23 12:11:38,950 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 178 transitions. [2018-11-23 12:11:38,951 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:38,951 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:38,951 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 133 states. [2018-11-23 12:11:38,951 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 133 states. [2018-11-23 12:11:38,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:38,955 INFO L93 Difference]: Finished difference Result 133 states and 178 transitions. [2018-11-23 12:11:38,955 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 178 transitions. [2018-11-23 12:11:38,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:38,956 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:38,956 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:38,957 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:38,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-11-23 12:11:38,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 77 transitions. [2018-11-23 12:11:38,958 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 77 transitions. Word has length 53 [2018-11-23 12:11:38,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:38,959 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 77 transitions. [2018-11-23 12:11:38,959 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 12:11:38,959 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 77 transitions. [2018-11-23 12:11:38,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 12:11:38,960 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:38,960 INFO L402 BasicCegarLoop]: trace histogram [14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:38,960 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:38,960 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:38,960 INFO L82 PathProgramCache]: Analyzing trace with hash 347565677, now seen corresponding path program 14 times [2018-11-23 12:11:38,961 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:38,961 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:38,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:38,962 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:11:38,962 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:38,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:39,968 INFO L256 TraceCheckUtils]: 0: Hoare triple {6495#true} call ULTIMATE.init(); {6495#true} is VALID [2018-11-23 12:11:39,968 INFO L273 TraceCheckUtils]: 1: Hoare triple {6495#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {6495#true} is VALID [2018-11-23 12:11:39,968 INFO L273 TraceCheckUtils]: 2: Hoare triple {6495#true} assume true; {6495#true} is VALID [2018-11-23 12:11:39,968 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6495#true} {6495#true} #59#return; {6495#true} is VALID [2018-11-23 12:11:39,968 INFO L256 TraceCheckUtils]: 4: Hoare triple {6495#true} call #t~ret4 := main(); {6495#true} is VALID [2018-11-23 12:11:39,969 INFO L273 TraceCheckUtils]: 5: Hoare triple {6495#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {6497#(= main_~i~0 0)} is VALID [2018-11-23 12:11:39,969 INFO L273 TraceCheckUtils]: 6: Hoare triple {6497#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6497#(= main_~i~0 0)} is VALID [2018-11-23 12:11:39,970 INFO L273 TraceCheckUtils]: 7: Hoare triple {6497#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6497#(= main_~i~0 0)} is VALID [2018-11-23 12:11:39,970 INFO L273 TraceCheckUtils]: 8: Hoare triple {6497#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {6498#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:39,971 INFO L273 TraceCheckUtils]: 9: Hoare triple {6498#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6498#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:39,972 INFO L273 TraceCheckUtils]: 10: Hoare triple {6498#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6498#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:39,972 INFO L273 TraceCheckUtils]: 11: Hoare triple {6498#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {6499#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:39,973 INFO L273 TraceCheckUtils]: 12: Hoare triple {6499#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6499#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:39,974 INFO L273 TraceCheckUtils]: 13: Hoare triple {6499#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6499#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:39,974 INFO L273 TraceCheckUtils]: 14: Hoare triple {6499#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {6500#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:39,975 INFO L273 TraceCheckUtils]: 15: Hoare triple {6500#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6500#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:39,976 INFO L273 TraceCheckUtils]: 16: Hoare triple {6500#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6500#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:39,976 INFO L273 TraceCheckUtils]: 17: Hoare triple {6500#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {6501#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:39,977 INFO L273 TraceCheckUtils]: 18: Hoare triple {6501#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6501#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:39,978 INFO L273 TraceCheckUtils]: 19: Hoare triple {6501#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6501#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:39,978 INFO L273 TraceCheckUtils]: 20: Hoare triple {6501#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {6502#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:39,979 INFO L273 TraceCheckUtils]: 21: Hoare triple {6502#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6502#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:39,980 INFO L273 TraceCheckUtils]: 22: Hoare triple {6502#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6502#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:39,980 INFO L273 TraceCheckUtils]: 23: Hoare triple {6502#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {6503#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:39,981 INFO L273 TraceCheckUtils]: 24: Hoare triple {6503#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6503#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:39,982 INFO L273 TraceCheckUtils]: 25: Hoare triple {6503#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6503#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:39,982 INFO L273 TraceCheckUtils]: 26: Hoare triple {6503#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {6504#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:39,983 INFO L273 TraceCheckUtils]: 27: Hoare triple {6504#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6504#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:39,984 INFO L273 TraceCheckUtils]: 28: Hoare triple {6504#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6504#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:39,984 INFO L273 TraceCheckUtils]: 29: Hoare triple {6504#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {6505#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:39,985 INFO L273 TraceCheckUtils]: 30: Hoare triple {6505#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6505#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:39,986 INFO L273 TraceCheckUtils]: 31: Hoare triple {6505#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6505#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:39,986 INFO L273 TraceCheckUtils]: 32: Hoare triple {6505#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {6506#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:39,987 INFO L273 TraceCheckUtils]: 33: Hoare triple {6506#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6506#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:39,988 INFO L273 TraceCheckUtils]: 34: Hoare triple {6506#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6506#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:39,988 INFO L273 TraceCheckUtils]: 35: Hoare triple {6506#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {6507#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:39,989 INFO L273 TraceCheckUtils]: 36: Hoare triple {6507#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6507#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:39,990 INFO L273 TraceCheckUtils]: 37: Hoare triple {6507#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6507#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:39,990 INFO L273 TraceCheckUtils]: 38: Hoare triple {6507#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {6508#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:39,991 INFO L273 TraceCheckUtils]: 39: Hoare triple {6508#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6508#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:39,992 INFO L273 TraceCheckUtils]: 40: Hoare triple {6508#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6508#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:39,992 INFO L273 TraceCheckUtils]: 41: Hoare triple {6508#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {6509#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:39,993 INFO L273 TraceCheckUtils]: 42: Hoare triple {6509#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6509#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:39,994 INFO L273 TraceCheckUtils]: 43: Hoare triple {6509#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6509#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:39,994 INFO L273 TraceCheckUtils]: 44: Hoare triple {6509#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {6510#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:39,995 INFO L273 TraceCheckUtils]: 45: Hoare triple {6510#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6510#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:39,996 INFO L273 TraceCheckUtils]: 46: Hoare triple {6510#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6510#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:39,996 INFO L273 TraceCheckUtils]: 47: Hoare triple {6510#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {6511#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:39,997 INFO L273 TraceCheckUtils]: 48: Hoare triple {6511#(<= main_~i~0 28)} assume !(~i~0 < 100000); {6496#false} is VALID [2018-11-23 12:11:39,998 INFO L273 TraceCheckUtils]: 49: Hoare triple {6496#false} ~i~0 := 0; {6496#false} is VALID [2018-11-23 12:11:39,998 INFO L273 TraceCheckUtils]: 50: Hoare triple {6496#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6496#false} is VALID [2018-11-23 12:11:39,998 INFO L273 TraceCheckUtils]: 51: Hoare triple {6496#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6496#false} is VALID [2018-11-23 12:11:39,998 INFO L256 TraceCheckUtils]: 52: Hoare triple {6496#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {6496#false} is VALID [2018-11-23 12:11:39,999 INFO L273 TraceCheckUtils]: 53: Hoare triple {6496#false} ~cond := #in~cond; {6496#false} is VALID [2018-11-23 12:11:39,999 INFO L273 TraceCheckUtils]: 54: Hoare triple {6496#false} assume 0 == ~cond; {6496#false} is VALID [2018-11-23 12:11:39,999 INFO L273 TraceCheckUtils]: 55: Hoare triple {6496#false} assume !false; {6496#false} is VALID [2018-11-23 12:11:40,005 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 0 proven. 287 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:40,005 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:40,005 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:40,037 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 12:11:40,072 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 12:11:40,073 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:40,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:40,092 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:40,229 INFO L256 TraceCheckUtils]: 0: Hoare triple {6495#true} call ULTIMATE.init(); {6495#true} is VALID [2018-11-23 12:11:40,230 INFO L273 TraceCheckUtils]: 1: Hoare triple {6495#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {6495#true} is VALID [2018-11-23 12:11:40,230 INFO L273 TraceCheckUtils]: 2: Hoare triple {6495#true} assume true; {6495#true} is VALID [2018-11-23 12:11:40,230 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6495#true} {6495#true} #59#return; {6495#true} is VALID [2018-11-23 12:11:40,230 INFO L256 TraceCheckUtils]: 4: Hoare triple {6495#true} call #t~ret4 := main(); {6495#true} is VALID [2018-11-23 12:11:40,231 INFO L273 TraceCheckUtils]: 5: Hoare triple {6495#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {6530#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:40,232 INFO L273 TraceCheckUtils]: 6: Hoare triple {6530#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6530#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:40,232 INFO L273 TraceCheckUtils]: 7: Hoare triple {6530#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6530#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:40,232 INFO L273 TraceCheckUtils]: 8: Hoare triple {6530#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {6498#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:40,233 INFO L273 TraceCheckUtils]: 9: Hoare triple {6498#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6498#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:40,233 INFO L273 TraceCheckUtils]: 10: Hoare triple {6498#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6498#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:40,233 INFO L273 TraceCheckUtils]: 11: Hoare triple {6498#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {6499#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:40,234 INFO L273 TraceCheckUtils]: 12: Hoare triple {6499#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6499#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:40,234 INFO L273 TraceCheckUtils]: 13: Hoare triple {6499#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6499#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:40,235 INFO L273 TraceCheckUtils]: 14: Hoare triple {6499#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {6500#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:40,235 INFO L273 TraceCheckUtils]: 15: Hoare triple {6500#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6500#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:40,236 INFO L273 TraceCheckUtils]: 16: Hoare triple {6500#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6500#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:40,237 INFO L273 TraceCheckUtils]: 17: Hoare triple {6500#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {6501#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:40,237 INFO L273 TraceCheckUtils]: 18: Hoare triple {6501#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6501#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:40,238 INFO L273 TraceCheckUtils]: 19: Hoare triple {6501#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6501#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:40,238 INFO L273 TraceCheckUtils]: 20: Hoare triple {6501#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {6502#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:40,239 INFO L273 TraceCheckUtils]: 21: Hoare triple {6502#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6502#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:40,239 INFO L273 TraceCheckUtils]: 22: Hoare triple {6502#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6502#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:40,240 INFO L273 TraceCheckUtils]: 23: Hoare triple {6502#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {6503#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:40,241 INFO L273 TraceCheckUtils]: 24: Hoare triple {6503#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6503#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:40,241 INFO L273 TraceCheckUtils]: 25: Hoare triple {6503#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6503#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:40,242 INFO L273 TraceCheckUtils]: 26: Hoare triple {6503#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {6504#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:40,242 INFO L273 TraceCheckUtils]: 27: Hoare triple {6504#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6504#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:40,243 INFO L273 TraceCheckUtils]: 28: Hoare triple {6504#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6504#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:40,244 INFO L273 TraceCheckUtils]: 29: Hoare triple {6504#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {6505#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:40,244 INFO L273 TraceCheckUtils]: 30: Hoare triple {6505#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6505#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:40,245 INFO L273 TraceCheckUtils]: 31: Hoare triple {6505#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6505#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:40,245 INFO L273 TraceCheckUtils]: 32: Hoare triple {6505#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {6506#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:40,246 INFO L273 TraceCheckUtils]: 33: Hoare triple {6506#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6506#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:40,246 INFO L273 TraceCheckUtils]: 34: Hoare triple {6506#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6506#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:40,247 INFO L273 TraceCheckUtils]: 35: Hoare triple {6506#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {6507#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:40,247 INFO L273 TraceCheckUtils]: 36: Hoare triple {6507#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6507#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:40,248 INFO L273 TraceCheckUtils]: 37: Hoare triple {6507#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6507#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:40,249 INFO L273 TraceCheckUtils]: 38: Hoare triple {6507#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {6508#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:40,249 INFO L273 TraceCheckUtils]: 39: Hoare triple {6508#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6508#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:40,250 INFO L273 TraceCheckUtils]: 40: Hoare triple {6508#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6508#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:40,250 INFO L273 TraceCheckUtils]: 41: Hoare triple {6508#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {6509#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:40,251 INFO L273 TraceCheckUtils]: 42: Hoare triple {6509#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6509#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:40,251 INFO L273 TraceCheckUtils]: 43: Hoare triple {6509#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6509#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:40,252 INFO L273 TraceCheckUtils]: 44: Hoare triple {6509#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {6510#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:40,253 INFO L273 TraceCheckUtils]: 45: Hoare triple {6510#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6510#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:40,253 INFO L273 TraceCheckUtils]: 46: Hoare triple {6510#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6510#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:40,254 INFO L273 TraceCheckUtils]: 47: Hoare triple {6510#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {6511#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:40,255 INFO L273 TraceCheckUtils]: 48: Hoare triple {6511#(<= main_~i~0 28)} assume !(~i~0 < 100000); {6496#false} is VALID [2018-11-23 12:11:40,255 INFO L273 TraceCheckUtils]: 49: Hoare triple {6496#false} ~i~0 := 0; {6496#false} is VALID [2018-11-23 12:11:40,255 INFO L273 TraceCheckUtils]: 50: Hoare triple {6496#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {6496#false} is VALID [2018-11-23 12:11:40,255 INFO L273 TraceCheckUtils]: 51: Hoare triple {6496#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {6496#false} is VALID [2018-11-23 12:11:40,256 INFO L256 TraceCheckUtils]: 52: Hoare triple {6496#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {6496#false} is VALID [2018-11-23 12:11:40,256 INFO L273 TraceCheckUtils]: 53: Hoare triple {6496#false} ~cond := #in~cond; {6496#false} is VALID [2018-11-23 12:11:40,256 INFO L273 TraceCheckUtils]: 54: Hoare triple {6496#false} assume 0 == ~cond; {6496#false} is VALID [2018-11-23 12:11:40,256 INFO L273 TraceCheckUtils]: 55: Hoare triple {6496#false} assume !false; {6496#false} is VALID [2018-11-23 12:11:40,259 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 0 proven. 287 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:40,278 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:40,278 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-11-23 12:11:40,278 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-11-23 12:11:40,278 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:40,279 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 12:11:40,335 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:40,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 12:11:40,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 12:11:40,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-23 12:11:40,336 INFO L87 Difference]: Start difference. First operand 61 states and 77 transitions. Second operand 18 states. [2018-11-23 12:11:41,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:41,307 INFO L93 Difference]: Finished difference Result 153 states and 203 transitions. [2018-11-23 12:11:41,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 12:11:41,307 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-11-23 12:11:41,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:41,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 12:11:41,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 203 transitions. [2018-11-23 12:11:41,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 12:11:41,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 203 transitions. [2018-11-23 12:11:41,312 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 203 transitions. [2018-11-23 12:11:41,502 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 203 edges. 203 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:41,506 INFO L225 Difference]: With dead ends: 153 [2018-11-23 12:11:41,506 INFO L226 Difference]: Without dead ends: 141 [2018-11-23 12:11:41,507 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-23 12:11:41,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-11-23 12:11:41,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 64. [2018-11-23 12:11:41,530 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:41,531 INFO L82 GeneralOperation]: Start isEquivalent. First operand 141 states. Second operand 64 states. [2018-11-23 12:11:41,531 INFO L74 IsIncluded]: Start isIncluded. First operand 141 states. Second operand 64 states. [2018-11-23 12:11:41,531 INFO L87 Difference]: Start difference. First operand 141 states. Second operand 64 states. [2018-11-23 12:11:41,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:41,535 INFO L93 Difference]: Finished difference Result 141 states and 189 transitions. [2018-11-23 12:11:41,535 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 189 transitions. [2018-11-23 12:11:41,536 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:41,536 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:41,536 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand 141 states. [2018-11-23 12:11:41,536 INFO L87 Difference]: Start difference. First operand 64 states. Second operand 141 states. [2018-11-23 12:11:41,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:41,540 INFO L93 Difference]: Finished difference Result 141 states and 189 transitions. [2018-11-23 12:11:41,540 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 189 transitions. [2018-11-23 12:11:41,541 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:41,541 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:41,541 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:41,541 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:41,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-11-23 12:11:41,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 81 transitions. [2018-11-23 12:11:41,543 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 81 transitions. Word has length 56 [2018-11-23 12:11:41,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:41,543 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 81 transitions. [2018-11-23 12:11:41,543 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 12:11:41,543 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 81 transitions. [2018-11-23 12:11:41,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 12:11:41,544 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:41,544 INFO L402 BasicCegarLoop]: trace histogram [15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:41,544 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:41,545 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:41,545 INFO L82 PathProgramCache]: Analyzing trace with hash -1330366742, now seen corresponding path program 15 times [2018-11-23 12:11:41,545 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:41,545 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:41,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:41,546 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:41,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:41,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:42,150 INFO L256 TraceCheckUtils]: 0: Hoare triple {7258#true} call ULTIMATE.init(); {7258#true} is VALID [2018-11-23 12:11:42,150 INFO L273 TraceCheckUtils]: 1: Hoare triple {7258#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {7258#true} is VALID [2018-11-23 12:11:42,150 INFO L273 TraceCheckUtils]: 2: Hoare triple {7258#true} assume true; {7258#true} is VALID [2018-11-23 12:11:42,151 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7258#true} {7258#true} #59#return; {7258#true} is VALID [2018-11-23 12:11:42,151 INFO L256 TraceCheckUtils]: 4: Hoare triple {7258#true} call #t~ret4 := main(); {7258#true} is VALID [2018-11-23 12:11:42,151 INFO L273 TraceCheckUtils]: 5: Hoare triple {7258#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {7260#(= main_~i~0 0)} is VALID [2018-11-23 12:11:42,152 INFO L273 TraceCheckUtils]: 6: Hoare triple {7260#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7260#(= main_~i~0 0)} is VALID [2018-11-23 12:11:42,152 INFO L273 TraceCheckUtils]: 7: Hoare triple {7260#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7260#(= main_~i~0 0)} is VALID [2018-11-23 12:11:42,153 INFO L273 TraceCheckUtils]: 8: Hoare triple {7260#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {7261#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:42,153 INFO L273 TraceCheckUtils]: 9: Hoare triple {7261#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7261#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:42,153 INFO L273 TraceCheckUtils]: 10: Hoare triple {7261#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7261#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:42,154 INFO L273 TraceCheckUtils]: 11: Hoare triple {7261#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {7262#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:42,154 INFO L273 TraceCheckUtils]: 12: Hoare triple {7262#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7262#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:42,154 INFO L273 TraceCheckUtils]: 13: Hoare triple {7262#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7262#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:42,155 INFO L273 TraceCheckUtils]: 14: Hoare triple {7262#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {7263#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:42,155 INFO L273 TraceCheckUtils]: 15: Hoare triple {7263#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7263#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:42,156 INFO L273 TraceCheckUtils]: 16: Hoare triple {7263#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7263#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:42,157 INFO L273 TraceCheckUtils]: 17: Hoare triple {7263#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {7264#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:42,157 INFO L273 TraceCheckUtils]: 18: Hoare triple {7264#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7264#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:42,158 INFO L273 TraceCheckUtils]: 19: Hoare triple {7264#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7264#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:42,159 INFO L273 TraceCheckUtils]: 20: Hoare triple {7264#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {7265#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:42,159 INFO L273 TraceCheckUtils]: 21: Hoare triple {7265#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7265#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:42,160 INFO L273 TraceCheckUtils]: 22: Hoare triple {7265#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7265#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:42,160 INFO L273 TraceCheckUtils]: 23: Hoare triple {7265#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {7266#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:42,161 INFO L273 TraceCheckUtils]: 24: Hoare triple {7266#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7266#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:42,161 INFO L273 TraceCheckUtils]: 25: Hoare triple {7266#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7266#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:42,162 INFO L273 TraceCheckUtils]: 26: Hoare triple {7266#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {7267#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:42,163 INFO L273 TraceCheckUtils]: 27: Hoare triple {7267#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7267#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:42,163 INFO L273 TraceCheckUtils]: 28: Hoare triple {7267#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7267#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:42,164 INFO L273 TraceCheckUtils]: 29: Hoare triple {7267#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {7268#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:42,164 INFO L273 TraceCheckUtils]: 30: Hoare triple {7268#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7268#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:42,165 INFO L273 TraceCheckUtils]: 31: Hoare triple {7268#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7268#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:42,166 INFO L273 TraceCheckUtils]: 32: Hoare triple {7268#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {7269#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:42,166 INFO L273 TraceCheckUtils]: 33: Hoare triple {7269#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7269#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:42,167 INFO L273 TraceCheckUtils]: 34: Hoare triple {7269#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7269#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:42,168 INFO L273 TraceCheckUtils]: 35: Hoare triple {7269#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {7270#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:42,168 INFO L273 TraceCheckUtils]: 36: Hoare triple {7270#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7270#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:42,169 INFO L273 TraceCheckUtils]: 37: Hoare triple {7270#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7270#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:42,169 INFO L273 TraceCheckUtils]: 38: Hoare triple {7270#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {7271#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:42,170 INFO L273 TraceCheckUtils]: 39: Hoare triple {7271#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7271#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:42,170 INFO L273 TraceCheckUtils]: 40: Hoare triple {7271#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7271#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:42,171 INFO L273 TraceCheckUtils]: 41: Hoare triple {7271#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {7272#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:42,172 INFO L273 TraceCheckUtils]: 42: Hoare triple {7272#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7272#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:42,172 INFO L273 TraceCheckUtils]: 43: Hoare triple {7272#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7272#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:42,173 INFO L273 TraceCheckUtils]: 44: Hoare triple {7272#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {7273#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:42,173 INFO L273 TraceCheckUtils]: 45: Hoare triple {7273#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7273#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:42,174 INFO L273 TraceCheckUtils]: 46: Hoare triple {7273#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7273#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:42,175 INFO L273 TraceCheckUtils]: 47: Hoare triple {7273#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {7274#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:42,175 INFO L273 TraceCheckUtils]: 48: Hoare triple {7274#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7274#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:42,176 INFO L273 TraceCheckUtils]: 49: Hoare triple {7274#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7274#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:42,177 INFO L273 TraceCheckUtils]: 50: Hoare triple {7274#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {7275#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:42,177 INFO L273 TraceCheckUtils]: 51: Hoare triple {7275#(<= main_~i~0 30)} assume !(~i~0 < 100000); {7259#false} is VALID [2018-11-23 12:11:42,177 INFO L273 TraceCheckUtils]: 52: Hoare triple {7259#false} ~i~0 := 0; {7259#false} is VALID [2018-11-23 12:11:42,178 INFO L273 TraceCheckUtils]: 53: Hoare triple {7259#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7259#false} is VALID [2018-11-23 12:11:42,178 INFO L273 TraceCheckUtils]: 54: Hoare triple {7259#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7259#false} is VALID [2018-11-23 12:11:42,178 INFO L256 TraceCheckUtils]: 55: Hoare triple {7259#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {7259#false} is VALID [2018-11-23 12:11:42,178 INFO L273 TraceCheckUtils]: 56: Hoare triple {7259#false} ~cond := #in~cond; {7259#false} is VALID [2018-11-23 12:11:42,179 INFO L273 TraceCheckUtils]: 57: Hoare triple {7259#false} assume 0 == ~cond; {7259#false} is VALID [2018-11-23 12:11:42,179 INFO L273 TraceCheckUtils]: 58: Hoare triple {7259#false} assume !false; {7259#false} is VALID [2018-11-23 12:11:42,182 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 0 proven. 330 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:42,182 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:42,182 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:42,191 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 12:11:46,088 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-11-23 12:11:46,088 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:46,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:46,109 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:46,242 INFO L256 TraceCheckUtils]: 0: Hoare triple {7258#true} call ULTIMATE.init(); {7258#true} is VALID [2018-11-23 12:11:46,242 INFO L273 TraceCheckUtils]: 1: Hoare triple {7258#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {7258#true} is VALID [2018-11-23 12:11:46,243 INFO L273 TraceCheckUtils]: 2: Hoare triple {7258#true} assume true; {7258#true} is VALID [2018-11-23 12:11:46,243 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7258#true} {7258#true} #59#return; {7258#true} is VALID [2018-11-23 12:11:46,243 INFO L256 TraceCheckUtils]: 4: Hoare triple {7258#true} call #t~ret4 := main(); {7258#true} is VALID [2018-11-23 12:11:46,244 INFO L273 TraceCheckUtils]: 5: Hoare triple {7258#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {7294#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:46,244 INFO L273 TraceCheckUtils]: 6: Hoare triple {7294#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7294#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:46,245 INFO L273 TraceCheckUtils]: 7: Hoare triple {7294#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7294#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:46,245 INFO L273 TraceCheckUtils]: 8: Hoare triple {7294#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {7261#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:46,246 INFO L273 TraceCheckUtils]: 9: Hoare triple {7261#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7261#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:46,246 INFO L273 TraceCheckUtils]: 10: Hoare triple {7261#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7261#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:46,246 INFO L273 TraceCheckUtils]: 11: Hoare triple {7261#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {7262#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:46,247 INFO L273 TraceCheckUtils]: 12: Hoare triple {7262#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7262#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:46,247 INFO L273 TraceCheckUtils]: 13: Hoare triple {7262#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7262#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:46,247 INFO L273 TraceCheckUtils]: 14: Hoare triple {7262#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {7263#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:46,248 INFO L273 TraceCheckUtils]: 15: Hoare triple {7263#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7263#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:46,249 INFO L273 TraceCheckUtils]: 16: Hoare triple {7263#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7263#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:46,249 INFO L273 TraceCheckUtils]: 17: Hoare triple {7263#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {7264#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:46,250 INFO L273 TraceCheckUtils]: 18: Hoare triple {7264#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7264#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:46,250 INFO L273 TraceCheckUtils]: 19: Hoare triple {7264#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7264#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:46,251 INFO L273 TraceCheckUtils]: 20: Hoare triple {7264#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {7265#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:46,252 INFO L273 TraceCheckUtils]: 21: Hoare triple {7265#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7265#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:46,252 INFO L273 TraceCheckUtils]: 22: Hoare triple {7265#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7265#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:46,253 INFO L273 TraceCheckUtils]: 23: Hoare triple {7265#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {7266#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:46,253 INFO L273 TraceCheckUtils]: 24: Hoare triple {7266#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7266#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:46,254 INFO L273 TraceCheckUtils]: 25: Hoare triple {7266#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7266#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:46,255 INFO L273 TraceCheckUtils]: 26: Hoare triple {7266#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {7267#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:46,255 INFO L273 TraceCheckUtils]: 27: Hoare triple {7267#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7267#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:46,256 INFO L273 TraceCheckUtils]: 28: Hoare triple {7267#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7267#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:46,256 INFO L273 TraceCheckUtils]: 29: Hoare triple {7267#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {7268#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:46,257 INFO L273 TraceCheckUtils]: 30: Hoare triple {7268#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7268#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:46,258 INFO L273 TraceCheckUtils]: 31: Hoare triple {7268#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7268#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:46,258 INFO L273 TraceCheckUtils]: 32: Hoare triple {7268#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {7269#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:46,259 INFO L273 TraceCheckUtils]: 33: Hoare triple {7269#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7269#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:46,259 INFO L273 TraceCheckUtils]: 34: Hoare triple {7269#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7269#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:46,260 INFO L273 TraceCheckUtils]: 35: Hoare triple {7269#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {7270#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:46,261 INFO L273 TraceCheckUtils]: 36: Hoare triple {7270#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7270#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:46,261 INFO L273 TraceCheckUtils]: 37: Hoare triple {7270#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7270#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:46,262 INFO L273 TraceCheckUtils]: 38: Hoare triple {7270#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {7271#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:46,262 INFO L273 TraceCheckUtils]: 39: Hoare triple {7271#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7271#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:46,263 INFO L273 TraceCheckUtils]: 40: Hoare triple {7271#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7271#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:46,264 INFO L273 TraceCheckUtils]: 41: Hoare triple {7271#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {7272#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:46,264 INFO L273 TraceCheckUtils]: 42: Hoare triple {7272#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7272#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:46,265 INFO L273 TraceCheckUtils]: 43: Hoare triple {7272#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7272#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:46,266 INFO L273 TraceCheckUtils]: 44: Hoare triple {7272#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {7273#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:46,266 INFO L273 TraceCheckUtils]: 45: Hoare triple {7273#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7273#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:46,267 INFO L273 TraceCheckUtils]: 46: Hoare triple {7273#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7273#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:46,267 INFO L273 TraceCheckUtils]: 47: Hoare triple {7273#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {7274#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:46,268 INFO L273 TraceCheckUtils]: 48: Hoare triple {7274#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7274#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:46,268 INFO L273 TraceCheckUtils]: 49: Hoare triple {7274#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7274#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:46,269 INFO L273 TraceCheckUtils]: 50: Hoare triple {7274#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {7275#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:46,270 INFO L273 TraceCheckUtils]: 51: Hoare triple {7275#(<= main_~i~0 30)} assume !(~i~0 < 100000); {7259#false} is VALID [2018-11-23 12:11:46,270 INFO L273 TraceCheckUtils]: 52: Hoare triple {7259#false} ~i~0 := 0; {7259#false} is VALID [2018-11-23 12:11:46,270 INFO L273 TraceCheckUtils]: 53: Hoare triple {7259#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {7259#false} is VALID [2018-11-23 12:11:46,270 INFO L273 TraceCheckUtils]: 54: Hoare triple {7259#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {7259#false} is VALID [2018-11-23 12:11:46,271 INFO L256 TraceCheckUtils]: 55: Hoare triple {7259#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {7259#false} is VALID [2018-11-23 12:11:46,271 INFO L273 TraceCheckUtils]: 56: Hoare triple {7259#false} ~cond := #in~cond; {7259#false} is VALID [2018-11-23 12:11:46,271 INFO L273 TraceCheckUtils]: 57: Hoare triple {7259#false} assume 0 == ~cond; {7259#false} is VALID [2018-11-23 12:11:46,271 INFO L273 TraceCheckUtils]: 58: Hoare triple {7259#false} assume !false; {7259#false} is VALID [2018-11-23 12:11:46,274 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 0 proven. 330 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:46,295 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:46,295 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-11-23 12:11:46,296 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-11-23 12:11:46,296 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:46,296 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 12:11:46,359 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:46,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 12:11:46,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 12:11:46,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-23 12:11:46,361 INFO L87 Difference]: Start difference. First operand 64 states and 81 transitions. Second operand 19 states. [2018-11-23 12:11:47,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:47,259 INFO L93 Difference]: Finished difference Result 161 states and 214 transitions. [2018-11-23 12:11:47,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 12:11:47,259 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-11-23 12:11:47,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:47,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 12:11:47,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 214 transitions. [2018-11-23 12:11:47,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 12:11:47,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 214 transitions. [2018-11-23 12:11:47,265 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 214 transitions. [2018-11-23 12:11:47,500 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 214 edges. 214 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:47,505 INFO L225 Difference]: With dead ends: 161 [2018-11-23 12:11:47,505 INFO L226 Difference]: Without dead ends: 149 [2018-11-23 12:11:47,506 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-23 12:11:47,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-11-23 12:11:47,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 67. [2018-11-23 12:11:47,645 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:47,645 INFO L82 GeneralOperation]: Start isEquivalent. First operand 149 states. Second operand 67 states. [2018-11-23 12:11:47,645 INFO L74 IsIncluded]: Start isIncluded. First operand 149 states. Second operand 67 states. [2018-11-23 12:11:47,645 INFO L87 Difference]: Start difference. First operand 149 states. Second operand 67 states. [2018-11-23 12:11:47,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:47,649 INFO L93 Difference]: Finished difference Result 149 states and 200 transitions. [2018-11-23 12:11:47,649 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 200 transitions. [2018-11-23 12:11:47,650 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:47,650 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:47,650 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand 149 states. [2018-11-23 12:11:47,651 INFO L87 Difference]: Start difference. First operand 67 states. Second operand 149 states. [2018-11-23 12:11:47,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:47,654 INFO L93 Difference]: Finished difference Result 149 states and 200 transitions. [2018-11-23 12:11:47,655 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 200 transitions. [2018-11-23 12:11:47,655 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:47,655 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:47,656 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:47,656 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:47,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-11-23 12:11:47,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 85 transitions. [2018-11-23 12:11:47,657 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 85 transitions. Word has length 59 [2018-11-23 12:11:47,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:47,657 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 85 transitions. [2018-11-23 12:11:47,658 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 12:11:47,658 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 85 transitions. [2018-11-23 12:11:47,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-23 12:11:47,658 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:47,659 INFO L402 BasicCegarLoop]: trace histogram [16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:47,659 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:47,659 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:47,659 INFO L82 PathProgramCache]: Analyzing trace with hash 509296973, now seen corresponding path program 16 times [2018-11-23 12:11:47,659 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:47,659 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:47,660 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:47,660 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:47,660 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:47,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:48,063 INFO L256 TraceCheckUtils]: 0: Hoare triple {8062#true} call ULTIMATE.init(); {8062#true} is VALID [2018-11-23 12:11:48,064 INFO L273 TraceCheckUtils]: 1: Hoare triple {8062#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {8062#true} is VALID [2018-11-23 12:11:48,064 INFO L273 TraceCheckUtils]: 2: Hoare triple {8062#true} assume true; {8062#true} is VALID [2018-11-23 12:11:48,064 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8062#true} {8062#true} #59#return; {8062#true} is VALID [2018-11-23 12:11:48,064 INFO L256 TraceCheckUtils]: 4: Hoare triple {8062#true} call #t~ret4 := main(); {8062#true} is VALID [2018-11-23 12:11:48,065 INFO L273 TraceCheckUtils]: 5: Hoare triple {8062#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {8064#(= main_~i~0 0)} is VALID [2018-11-23 12:11:48,065 INFO L273 TraceCheckUtils]: 6: Hoare triple {8064#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8064#(= main_~i~0 0)} is VALID [2018-11-23 12:11:48,066 INFO L273 TraceCheckUtils]: 7: Hoare triple {8064#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8064#(= main_~i~0 0)} is VALID [2018-11-23 12:11:48,067 INFO L273 TraceCheckUtils]: 8: Hoare triple {8064#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {8065#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:48,067 INFO L273 TraceCheckUtils]: 9: Hoare triple {8065#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8065#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:48,067 INFO L273 TraceCheckUtils]: 10: Hoare triple {8065#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8065#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:48,068 INFO L273 TraceCheckUtils]: 11: Hoare triple {8065#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {8066#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:48,068 INFO L273 TraceCheckUtils]: 12: Hoare triple {8066#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8066#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:48,068 INFO L273 TraceCheckUtils]: 13: Hoare triple {8066#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8066#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:48,069 INFO L273 TraceCheckUtils]: 14: Hoare triple {8066#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {8067#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:48,069 INFO L273 TraceCheckUtils]: 15: Hoare triple {8067#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8067#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:48,070 INFO L273 TraceCheckUtils]: 16: Hoare triple {8067#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8067#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:48,071 INFO L273 TraceCheckUtils]: 17: Hoare triple {8067#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {8068#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:48,071 INFO L273 TraceCheckUtils]: 18: Hoare triple {8068#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8068#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:48,072 INFO L273 TraceCheckUtils]: 19: Hoare triple {8068#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8068#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:48,072 INFO L273 TraceCheckUtils]: 20: Hoare triple {8068#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {8069#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:48,073 INFO L273 TraceCheckUtils]: 21: Hoare triple {8069#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8069#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:48,074 INFO L273 TraceCheckUtils]: 22: Hoare triple {8069#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8069#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:48,074 INFO L273 TraceCheckUtils]: 23: Hoare triple {8069#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {8070#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:48,075 INFO L273 TraceCheckUtils]: 24: Hoare triple {8070#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8070#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:48,075 INFO L273 TraceCheckUtils]: 25: Hoare triple {8070#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8070#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:48,076 INFO L273 TraceCheckUtils]: 26: Hoare triple {8070#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {8071#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:48,077 INFO L273 TraceCheckUtils]: 27: Hoare triple {8071#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8071#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:48,077 INFO L273 TraceCheckUtils]: 28: Hoare triple {8071#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8071#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:48,078 INFO L273 TraceCheckUtils]: 29: Hoare triple {8071#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {8072#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:48,078 INFO L273 TraceCheckUtils]: 30: Hoare triple {8072#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8072#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:48,079 INFO L273 TraceCheckUtils]: 31: Hoare triple {8072#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8072#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:48,080 INFO L273 TraceCheckUtils]: 32: Hoare triple {8072#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {8073#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:48,080 INFO L273 TraceCheckUtils]: 33: Hoare triple {8073#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8073#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:48,081 INFO L273 TraceCheckUtils]: 34: Hoare triple {8073#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8073#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:48,081 INFO L273 TraceCheckUtils]: 35: Hoare triple {8073#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {8074#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:48,082 INFO L273 TraceCheckUtils]: 36: Hoare triple {8074#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8074#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:48,083 INFO L273 TraceCheckUtils]: 37: Hoare triple {8074#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8074#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:48,083 INFO L273 TraceCheckUtils]: 38: Hoare triple {8074#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {8075#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:48,084 INFO L273 TraceCheckUtils]: 39: Hoare triple {8075#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8075#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:48,084 INFO L273 TraceCheckUtils]: 40: Hoare triple {8075#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8075#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:48,085 INFO L273 TraceCheckUtils]: 41: Hoare triple {8075#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {8076#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:48,086 INFO L273 TraceCheckUtils]: 42: Hoare triple {8076#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8076#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:48,086 INFO L273 TraceCheckUtils]: 43: Hoare triple {8076#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8076#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:48,087 INFO L273 TraceCheckUtils]: 44: Hoare triple {8076#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {8077#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:48,087 INFO L273 TraceCheckUtils]: 45: Hoare triple {8077#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8077#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:48,088 INFO L273 TraceCheckUtils]: 46: Hoare triple {8077#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8077#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:48,089 INFO L273 TraceCheckUtils]: 47: Hoare triple {8077#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {8078#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:48,089 INFO L273 TraceCheckUtils]: 48: Hoare triple {8078#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8078#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:48,090 INFO L273 TraceCheckUtils]: 49: Hoare triple {8078#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8078#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:48,090 INFO L273 TraceCheckUtils]: 50: Hoare triple {8078#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {8079#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:48,091 INFO L273 TraceCheckUtils]: 51: Hoare triple {8079#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8079#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:48,092 INFO L273 TraceCheckUtils]: 52: Hoare triple {8079#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8079#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:48,092 INFO L273 TraceCheckUtils]: 53: Hoare triple {8079#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {8080#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:48,093 INFO L273 TraceCheckUtils]: 54: Hoare triple {8080#(<= main_~i~0 32)} assume !(~i~0 < 100000); {8063#false} is VALID [2018-11-23 12:11:48,093 INFO L273 TraceCheckUtils]: 55: Hoare triple {8063#false} ~i~0 := 0; {8063#false} is VALID [2018-11-23 12:11:48,093 INFO L273 TraceCheckUtils]: 56: Hoare triple {8063#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8063#false} is VALID [2018-11-23 12:11:48,094 INFO L273 TraceCheckUtils]: 57: Hoare triple {8063#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8063#false} is VALID [2018-11-23 12:11:48,094 INFO L256 TraceCheckUtils]: 58: Hoare triple {8063#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {8063#false} is VALID [2018-11-23 12:11:48,094 INFO L273 TraceCheckUtils]: 59: Hoare triple {8063#false} ~cond := #in~cond; {8063#false} is VALID [2018-11-23 12:11:48,094 INFO L273 TraceCheckUtils]: 60: Hoare triple {8063#false} assume 0 == ~cond; {8063#false} is VALID [2018-11-23 12:11:48,095 INFO L273 TraceCheckUtils]: 61: Hoare triple {8063#false} assume !false; {8063#false} is VALID [2018-11-23 12:11:48,098 INFO L134 CoverageAnalysis]: Checked inductivity of 376 backedges. 0 proven. 376 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:48,098 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:48,098 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:48,108 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 12:11:48,148 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 12:11:48,148 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:48,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:48,164 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:48,359 INFO L256 TraceCheckUtils]: 0: Hoare triple {8062#true} call ULTIMATE.init(); {8062#true} is VALID [2018-11-23 12:11:48,359 INFO L273 TraceCheckUtils]: 1: Hoare triple {8062#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {8062#true} is VALID [2018-11-23 12:11:48,359 INFO L273 TraceCheckUtils]: 2: Hoare triple {8062#true} assume true; {8062#true} is VALID [2018-11-23 12:11:48,360 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8062#true} {8062#true} #59#return; {8062#true} is VALID [2018-11-23 12:11:48,360 INFO L256 TraceCheckUtils]: 4: Hoare triple {8062#true} call #t~ret4 := main(); {8062#true} is VALID [2018-11-23 12:11:48,361 INFO L273 TraceCheckUtils]: 5: Hoare triple {8062#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {8099#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:48,361 INFO L273 TraceCheckUtils]: 6: Hoare triple {8099#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8099#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:48,362 INFO L273 TraceCheckUtils]: 7: Hoare triple {8099#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8099#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:48,363 INFO L273 TraceCheckUtils]: 8: Hoare triple {8099#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {8065#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:48,363 INFO L273 TraceCheckUtils]: 9: Hoare triple {8065#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8065#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:48,364 INFO L273 TraceCheckUtils]: 10: Hoare triple {8065#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8065#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:48,364 INFO L273 TraceCheckUtils]: 11: Hoare triple {8065#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {8066#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:48,365 INFO L273 TraceCheckUtils]: 12: Hoare triple {8066#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8066#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:48,366 INFO L273 TraceCheckUtils]: 13: Hoare triple {8066#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8066#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:48,366 INFO L273 TraceCheckUtils]: 14: Hoare triple {8066#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {8067#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:48,367 INFO L273 TraceCheckUtils]: 15: Hoare triple {8067#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8067#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:48,367 INFO L273 TraceCheckUtils]: 16: Hoare triple {8067#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8067#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:48,368 INFO L273 TraceCheckUtils]: 17: Hoare triple {8067#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {8068#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:48,369 INFO L273 TraceCheckUtils]: 18: Hoare triple {8068#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8068#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:48,369 INFO L273 TraceCheckUtils]: 19: Hoare triple {8068#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8068#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:48,370 INFO L273 TraceCheckUtils]: 20: Hoare triple {8068#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {8069#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:48,370 INFO L273 TraceCheckUtils]: 21: Hoare triple {8069#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8069#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:48,371 INFO L273 TraceCheckUtils]: 22: Hoare triple {8069#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8069#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:48,372 INFO L273 TraceCheckUtils]: 23: Hoare triple {8069#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {8070#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:48,372 INFO L273 TraceCheckUtils]: 24: Hoare triple {8070#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8070#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:48,373 INFO L273 TraceCheckUtils]: 25: Hoare triple {8070#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8070#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:48,373 INFO L273 TraceCheckUtils]: 26: Hoare triple {8070#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {8071#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:48,374 INFO L273 TraceCheckUtils]: 27: Hoare triple {8071#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8071#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:48,375 INFO L273 TraceCheckUtils]: 28: Hoare triple {8071#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8071#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:48,375 INFO L273 TraceCheckUtils]: 29: Hoare triple {8071#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {8072#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:48,376 INFO L273 TraceCheckUtils]: 30: Hoare triple {8072#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8072#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:48,376 INFO L273 TraceCheckUtils]: 31: Hoare triple {8072#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8072#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:48,377 INFO L273 TraceCheckUtils]: 32: Hoare triple {8072#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {8073#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:48,378 INFO L273 TraceCheckUtils]: 33: Hoare triple {8073#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8073#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:48,378 INFO L273 TraceCheckUtils]: 34: Hoare triple {8073#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8073#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:48,379 INFO L273 TraceCheckUtils]: 35: Hoare triple {8073#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {8074#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:48,379 INFO L273 TraceCheckUtils]: 36: Hoare triple {8074#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8074#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:48,380 INFO L273 TraceCheckUtils]: 37: Hoare triple {8074#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8074#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:48,381 INFO L273 TraceCheckUtils]: 38: Hoare triple {8074#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {8075#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:48,381 INFO L273 TraceCheckUtils]: 39: Hoare triple {8075#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8075#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:48,382 INFO L273 TraceCheckUtils]: 40: Hoare triple {8075#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8075#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:48,382 INFO L273 TraceCheckUtils]: 41: Hoare triple {8075#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {8076#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:48,383 INFO L273 TraceCheckUtils]: 42: Hoare triple {8076#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8076#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:48,384 INFO L273 TraceCheckUtils]: 43: Hoare triple {8076#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8076#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:48,384 INFO L273 TraceCheckUtils]: 44: Hoare triple {8076#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {8077#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:48,385 INFO L273 TraceCheckUtils]: 45: Hoare triple {8077#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8077#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:48,385 INFO L273 TraceCheckUtils]: 46: Hoare triple {8077#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8077#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:48,386 INFO L273 TraceCheckUtils]: 47: Hoare triple {8077#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {8078#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:48,387 INFO L273 TraceCheckUtils]: 48: Hoare triple {8078#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8078#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:48,387 INFO L273 TraceCheckUtils]: 49: Hoare triple {8078#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8078#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:48,388 INFO L273 TraceCheckUtils]: 50: Hoare triple {8078#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {8079#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:48,388 INFO L273 TraceCheckUtils]: 51: Hoare triple {8079#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8079#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:48,389 INFO L273 TraceCheckUtils]: 52: Hoare triple {8079#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8079#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:48,390 INFO L273 TraceCheckUtils]: 53: Hoare triple {8079#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {8080#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:48,390 INFO L273 TraceCheckUtils]: 54: Hoare triple {8080#(<= main_~i~0 32)} assume !(~i~0 < 100000); {8063#false} is VALID [2018-11-23 12:11:48,391 INFO L273 TraceCheckUtils]: 55: Hoare triple {8063#false} ~i~0 := 0; {8063#false} is VALID [2018-11-23 12:11:48,391 INFO L273 TraceCheckUtils]: 56: Hoare triple {8063#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8063#false} is VALID [2018-11-23 12:11:48,391 INFO L273 TraceCheckUtils]: 57: Hoare triple {8063#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8063#false} is VALID [2018-11-23 12:11:48,391 INFO L256 TraceCheckUtils]: 58: Hoare triple {8063#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {8063#false} is VALID [2018-11-23 12:11:48,392 INFO L273 TraceCheckUtils]: 59: Hoare triple {8063#false} ~cond := #in~cond; {8063#false} is VALID [2018-11-23 12:11:48,392 INFO L273 TraceCheckUtils]: 60: Hoare triple {8063#false} assume 0 == ~cond; {8063#false} is VALID [2018-11-23 12:11:48,392 INFO L273 TraceCheckUtils]: 61: Hoare triple {8063#false} assume !false; {8063#false} is VALID [2018-11-23 12:11:48,396 INFO L134 CoverageAnalysis]: Checked inductivity of 376 backedges. 0 proven. 376 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:48,415 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:48,415 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-11-23 12:11:48,415 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-11-23 12:11:48,415 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:48,415 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 12:11:48,484 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:48,485 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 12:11:48,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 12:11:48,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-11-23 12:11:48,486 INFO L87 Difference]: Start difference. First operand 67 states and 85 transitions. Second operand 20 states. [2018-11-23 12:11:49,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:49,484 INFO L93 Difference]: Finished difference Result 169 states and 225 transitions. [2018-11-23 12:11:49,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 12:11:49,485 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-11-23 12:11:49,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:11:49,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 12:11:49,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 225 transitions. [2018-11-23 12:11:49,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 12:11:49,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 225 transitions. [2018-11-23 12:11:49,489 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states and 225 transitions. [2018-11-23 12:11:49,742 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 225 edges. 225 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:49,746 INFO L225 Difference]: With dead ends: 169 [2018-11-23 12:11:49,746 INFO L226 Difference]: Without dead ends: 157 [2018-11-23 12:11:49,746 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-11-23 12:11:49,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-11-23 12:11:49,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 70. [2018-11-23 12:11:49,792 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:11:49,792 INFO L82 GeneralOperation]: Start isEquivalent. First operand 157 states. Second operand 70 states. [2018-11-23 12:11:49,792 INFO L74 IsIncluded]: Start isIncluded. First operand 157 states. Second operand 70 states. [2018-11-23 12:11:49,792 INFO L87 Difference]: Start difference. First operand 157 states. Second operand 70 states. [2018-11-23 12:11:49,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:49,795 INFO L93 Difference]: Finished difference Result 157 states and 211 transitions. [2018-11-23 12:11:49,795 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 211 transitions. [2018-11-23 12:11:49,796 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:49,796 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:49,796 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand 157 states. [2018-11-23 12:11:49,796 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 157 states. [2018-11-23 12:11:49,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:11:49,800 INFO L93 Difference]: Finished difference Result 157 states and 211 transitions. [2018-11-23 12:11:49,800 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 211 transitions. [2018-11-23 12:11:49,800 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:11:49,801 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:11:49,801 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:11:49,801 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:11:49,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-11-23 12:11:49,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 89 transitions. [2018-11-23 12:11:49,802 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 89 transitions. Word has length 62 [2018-11-23 12:11:49,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:11:49,802 INFO L480 AbstractCegarLoop]: Abstraction has 70 states and 89 transitions. [2018-11-23 12:11:49,803 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 12:11:49,803 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 89 transitions. [2018-11-23 12:11:49,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-23 12:11:49,803 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:11:49,803 INFO L402 BasicCegarLoop]: trace histogram [17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:11:49,804 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:11:49,804 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:11:49,804 INFO L82 PathProgramCache]: Analyzing trace with hash -2146633718, now seen corresponding path program 17 times [2018-11-23 12:11:49,804 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:11:49,804 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:11:49,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:49,805 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:11:49,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:11:49,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:50,201 INFO L256 TraceCheckUtils]: 0: Hoare triple {8907#true} call ULTIMATE.init(); {8907#true} is VALID [2018-11-23 12:11:50,201 INFO L273 TraceCheckUtils]: 1: Hoare triple {8907#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {8907#true} is VALID [2018-11-23 12:11:50,202 INFO L273 TraceCheckUtils]: 2: Hoare triple {8907#true} assume true; {8907#true} is VALID [2018-11-23 12:11:50,202 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8907#true} {8907#true} #59#return; {8907#true} is VALID [2018-11-23 12:11:50,202 INFO L256 TraceCheckUtils]: 4: Hoare triple {8907#true} call #t~ret4 := main(); {8907#true} is VALID [2018-11-23 12:11:50,202 INFO L273 TraceCheckUtils]: 5: Hoare triple {8907#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {8909#(= main_~i~0 0)} is VALID [2018-11-23 12:11:50,203 INFO L273 TraceCheckUtils]: 6: Hoare triple {8909#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8909#(= main_~i~0 0)} is VALID [2018-11-23 12:11:50,204 INFO L273 TraceCheckUtils]: 7: Hoare triple {8909#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8909#(= main_~i~0 0)} is VALID [2018-11-23 12:11:50,204 INFO L273 TraceCheckUtils]: 8: Hoare triple {8909#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {8910#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:50,204 INFO L273 TraceCheckUtils]: 9: Hoare triple {8910#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8910#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:50,205 INFO L273 TraceCheckUtils]: 10: Hoare triple {8910#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8910#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:50,205 INFO L273 TraceCheckUtils]: 11: Hoare triple {8910#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {8911#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:50,206 INFO L273 TraceCheckUtils]: 12: Hoare triple {8911#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8911#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:50,206 INFO L273 TraceCheckUtils]: 13: Hoare triple {8911#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8911#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:50,206 INFO L273 TraceCheckUtils]: 14: Hoare triple {8911#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {8912#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:50,207 INFO L273 TraceCheckUtils]: 15: Hoare triple {8912#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8912#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:50,207 INFO L273 TraceCheckUtils]: 16: Hoare triple {8912#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8912#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:50,208 INFO L273 TraceCheckUtils]: 17: Hoare triple {8912#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {8913#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:50,208 INFO L273 TraceCheckUtils]: 18: Hoare triple {8913#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8913#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:50,209 INFO L273 TraceCheckUtils]: 19: Hoare triple {8913#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8913#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:50,209 INFO L273 TraceCheckUtils]: 20: Hoare triple {8913#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {8914#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:50,210 INFO L273 TraceCheckUtils]: 21: Hoare triple {8914#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8914#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:50,210 INFO L273 TraceCheckUtils]: 22: Hoare triple {8914#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8914#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:50,211 INFO L273 TraceCheckUtils]: 23: Hoare triple {8914#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {8915#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:50,212 INFO L273 TraceCheckUtils]: 24: Hoare triple {8915#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8915#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:50,212 INFO L273 TraceCheckUtils]: 25: Hoare triple {8915#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8915#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:50,213 INFO L273 TraceCheckUtils]: 26: Hoare triple {8915#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {8916#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:50,213 INFO L273 TraceCheckUtils]: 27: Hoare triple {8916#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8916#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:50,214 INFO L273 TraceCheckUtils]: 28: Hoare triple {8916#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8916#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:50,215 INFO L273 TraceCheckUtils]: 29: Hoare triple {8916#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {8917#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:50,215 INFO L273 TraceCheckUtils]: 30: Hoare triple {8917#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8917#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:50,216 INFO L273 TraceCheckUtils]: 31: Hoare triple {8917#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8917#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:50,217 INFO L273 TraceCheckUtils]: 32: Hoare triple {8917#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {8918#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:50,217 INFO L273 TraceCheckUtils]: 33: Hoare triple {8918#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8918#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:50,218 INFO L273 TraceCheckUtils]: 34: Hoare triple {8918#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8918#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:50,218 INFO L273 TraceCheckUtils]: 35: Hoare triple {8918#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {8919#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:50,219 INFO L273 TraceCheckUtils]: 36: Hoare triple {8919#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8919#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:50,219 INFO L273 TraceCheckUtils]: 37: Hoare triple {8919#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8919#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:50,220 INFO L273 TraceCheckUtils]: 38: Hoare triple {8919#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {8920#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:50,221 INFO L273 TraceCheckUtils]: 39: Hoare triple {8920#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8920#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:50,221 INFO L273 TraceCheckUtils]: 40: Hoare triple {8920#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8920#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:50,222 INFO L273 TraceCheckUtils]: 41: Hoare triple {8920#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {8921#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:50,222 INFO L273 TraceCheckUtils]: 42: Hoare triple {8921#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8921#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:50,223 INFO L273 TraceCheckUtils]: 43: Hoare triple {8921#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8921#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:50,224 INFO L273 TraceCheckUtils]: 44: Hoare triple {8921#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {8922#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:50,224 INFO L273 TraceCheckUtils]: 45: Hoare triple {8922#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8922#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:50,225 INFO L273 TraceCheckUtils]: 46: Hoare triple {8922#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8922#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:50,226 INFO L273 TraceCheckUtils]: 47: Hoare triple {8922#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {8923#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:50,226 INFO L273 TraceCheckUtils]: 48: Hoare triple {8923#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8923#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:50,227 INFO L273 TraceCheckUtils]: 49: Hoare triple {8923#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8923#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:50,246 INFO L273 TraceCheckUtils]: 50: Hoare triple {8923#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {8924#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:50,247 INFO L273 TraceCheckUtils]: 51: Hoare triple {8924#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8924#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:50,248 INFO L273 TraceCheckUtils]: 52: Hoare triple {8924#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8924#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:50,248 INFO L273 TraceCheckUtils]: 53: Hoare triple {8924#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {8925#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:50,248 INFO L273 TraceCheckUtils]: 54: Hoare triple {8925#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8925#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:50,249 INFO L273 TraceCheckUtils]: 55: Hoare triple {8925#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8925#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:50,249 INFO L273 TraceCheckUtils]: 56: Hoare triple {8925#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {8926#(<= main_~i~0 34)} is VALID [2018-11-23 12:11:50,250 INFO L273 TraceCheckUtils]: 57: Hoare triple {8926#(<= main_~i~0 34)} assume !(~i~0 < 100000); {8908#false} is VALID [2018-11-23 12:11:50,250 INFO L273 TraceCheckUtils]: 58: Hoare triple {8908#false} ~i~0 := 0; {8908#false} is VALID [2018-11-23 12:11:50,250 INFO L273 TraceCheckUtils]: 59: Hoare triple {8908#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8908#false} is VALID [2018-11-23 12:11:50,250 INFO L273 TraceCheckUtils]: 60: Hoare triple {8908#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8908#false} is VALID [2018-11-23 12:11:50,250 INFO L256 TraceCheckUtils]: 61: Hoare triple {8908#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {8908#false} is VALID [2018-11-23 12:11:50,250 INFO L273 TraceCheckUtils]: 62: Hoare triple {8908#false} ~cond := #in~cond; {8908#false} is VALID [2018-11-23 12:11:50,250 INFO L273 TraceCheckUtils]: 63: Hoare triple {8908#false} assume 0 == ~cond; {8908#false} is VALID [2018-11-23 12:11:50,251 INFO L273 TraceCheckUtils]: 64: Hoare triple {8908#false} assume !false; {8908#false} is VALID [2018-11-23 12:11:50,254 INFO L134 CoverageAnalysis]: Checked inductivity of 425 backedges. 0 proven. 425 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:50,254 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:11:50,254 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:11:50,263 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 12:11:58,873 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-11-23 12:11:58,873 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:11:58,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:11:58,896 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:11:59,146 INFO L256 TraceCheckUtils]: 0: Hoare triple {8907#true} call ULTIMATE.init(); {8907#true} is VALID [2018-11-23 12:11:59,146 INFO L273 TraceCheckUtils]: 1: Hoare triple {8907#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {8907#true} is VALID [2018-11-23 12:11:59,146 INFO L273 TraceCheckUtils]: 2: Hoare triple {8907#true} assume true; {8907#true} is VALID [2018-11-23 12:11:59,146 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {8907#true} {8907#true} #59#return; {8907#true} is VALID [2018-11-23 12:11:59,147 INFO L256 TraceCheckUtils]: 4: Hoare triple {8907#true} call #t~ret4 := main(); {8907#true} is VALID [2018-11-23 12:11:59,148 INFO L273 TraceCheckUtils]: 5: Hoare triple {8907#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {8945#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:59,148 INFO L273 TraceCheckUtils]: 6: Hoare triple {8945#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8945#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:59,148 INFO L273 TraceCheckUtils]: 7: Hoare triple {8945#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8945#(<= main_~i~0 0)} is VALID [2018-11-23 12:11:59,149 INFO L273 TraceCheckUtils]: 8: Hoare triple {8945#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {8910#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:59,149 INFO L273 TraceCheckUtils]: 9: Hoare triple {8910#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8910#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:59,149 INFO L273 TraceCheckUtils]: 10: Hoare triple {8910#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8910#(<= main_~i~0 2)} is VALID [2018-11-23 12:11:59,150 INFO L273 TraceCheckUtils]: 11: Hoare triple {8910#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {8911#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:59,151 INFO L273 TraceCheckUtils]: 12: Hoare triple {8911#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8911#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:59,151 INFO L273 TraceCheckUtils]: 13: Hoare triple {8911#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8911#(<= main_~i~0 4)} is VALID [2018-11-23 12:11:59,152 INFO L273 TraceCheckUtils]: 14: Hoare triple {8911#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {8912#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:59,152 INFO L273 TraceCheckUtils]: 15: Hoare triple {8912#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8912#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:59,153 INFO L273 TraceCheckUtils]: 16: Hoare triple {8912#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8912#(<= main_~i~0 6)} is VALID [2018-11-23 12:11:59,154 INFO L273 TraceCheckUtils]: 17: Hoare triple {8912#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {8913#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:59,154 INFO L273 TraceCheckUtils]: 18: Hoare triple {8913#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8913#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:59,155 INFO L273 TraceCheckUtils]: 19: Hoare triple {8913#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8913#(<= main_~i~0 8)} is VALID [2018-11-23 12:11:59,155 INFO L273 TraceCheckUtils]: 20: Hoare triple {8913#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {8914#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:59,156 INFO L273 TraceCheckUtils]: 21: Hoare triple {8914#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8914#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:59,156 INFO L273 TraceCheckUtils]: 22: Hoare triple {8914#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8914#(<= main_~i~0 10)} is VALID [2018-11-23 12:11:59,157 INFO L273 TraceCheckUtils]: 23: Hoare triple {8914#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {8915#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:59,158 INFO L273 TraceCheckUtils]: 24: Hoare triple {8915#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8915#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:59,158 INFO L273 TraceCheckUtils]: 25: Hoare triple {8915#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8915#(<= main_~i~0 12)} is VALID [2018-11-23 12:11:59,159 INFO L273 TraceCheckUtils]: 26: Hoare triple {8915#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {8916#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:59,159 INFO L273 TraceCheckUtils]: 27: Hoare triple {8916#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8916#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:59,160 INFO L273 TraceCheckUtils]: 28: Hoare triple {8916#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8916#(<= main_~i~0 14)} is VALID [2018-11-23 12:11:59,161 INFO L273 TraceCheckUtils]: 29: Hoare triple {8916#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {8917#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:59,161 INFO L273 TraceCheckUtils]: 30: Hoare triple {8917#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8917#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:59,162 INFO L273 TraceCheckUtils]: 31: Hoare triple {8917#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8917#(<= main_~i~0 16)} is VALID [2018-11-23 12:11:59,162 INFO L273 TraceCheckUtils]: 32: Hoare triple {8917#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {8918#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:59,163 INFO L273 TraceCheckUtils]: 33: Hoare triple {8918#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8918#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:59,164 INFO L273 TraceCheckUtils]: 34: Hoare triple {8918#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8918#(<= main_~i~0 18)} is VALID [2018-11-23 12:11:59,164 INFO L273 TraceCheckUtils]: 35: Hoare triple {8918#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {8919#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:59,165 INFO L273 TraceCheckUtils]: 36: Hoare triple {8919#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8919#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:59,165 INFO L273 TraceCheckUtils]: 37: Hoare triple {8919#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8919#(<= main_~i~0 20)} is VALID [2018-11-23 12:11:59,166 INFO L273 TraceCheckUtils]: 38: Hoare triple {8919#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {8920#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:59,167 INFO L273 TraceCheckUtils]: 39: Hoare triple {8920#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8920#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:59,167 INFO L273 TraceCheckUtils]: 40: Hoare triple {8920#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8920#(<= main_~i~0 22)} is VALID [2018-11-23 12:11:59,168 INFO L273 TraceCheckUtils]: 41: Hoare triple {8920#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {8921#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:59,168 INFO L273 TraceCheckUtils]: 42: Hoare triple {8921#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8921#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:59,169 INFO L273 TraceCheckUtils]: 43: Hoare triple {8921#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8921#(<= main_~i~0 24)} is VALID [2018-11-23 12:11:59,170 INFO L273 TraceCheckUtils]: 44: Hoare triple {8921#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {8922#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:59,170 INFO L273 TraceCheckUtils]: 45: Hoare triple {8922#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8922#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:59,171 INFO L273 TraceCheckUtils]: 46: Hoare triple {8922#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8922#(<= main_~i~0 26)} is VALID [2018-11-23 12:11:59,171 INFO L273 TraceCheckUtils]: 47: Hoare triple {8922#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {8923#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:59,172 INFO L273 TraceCheckUtils]: 48: Hoare triple {8923#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8923#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:59,173 INFO L273 TraceCheckUtils]: 49: Hoare triple {8923#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8923#(<= main_~i~0 28)} is VALID [2018-11-23 12:11:59,173 INFO L273 TraceCheckUtils]: 50: Hoare triple {8923#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {8924#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:59,174 INFO L273 TraceCheckUtils]: 51: Hoare triple {8924#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8924#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:59,175 INFO L273 TraceCheckUtils]: 52: Hoare triple {8924#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8924#(<= main_~i~0 30)} is VALID [2018-11-23 12:11:59,175 INFO L273 TraceCheckUtils]: 53: Hoare triple {8924#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {8925#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:59,176 INFO L273 TraceCheckUtils]: 54: Hoare triple {8925#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8925#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:59,176 INFO L273 TraceCheckUtils]: 55: Hoare triple {8925#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8925#(<= main_~i~0 32)} is VALID [2018-11-23 12:11:59,177 INFO L273 TraceCheckUtils]: 56: Hoare triple {8925#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {8926#(<= main_~i~0 34)} is VALID [2018-11-23 12:11:59,178 INFO L273 TraceCheckUtils]: 57: Hoare triple {8926#(<= main_~i~0 34)} assume !(~i~0 < 100000); {8908#false} is VALID [2018-11-23 12:11:59,178 INFO L273 TraceCheckUtils]: 58: Hoare triple {8908#false} ~i~0 := 0; {8908#false} is VALID [2018-11-23 12:11:59,178 INFO L273 TraceCheckUtils]: 59: Hoare triple {8908#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {8908#false} is VALID [2018-11-23 12:11:59,179 INFO L273 TraceCheckUtils]: 60: Hoare triple {8908#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {8908#false} is VALID [2018-11-23 12:11:59,179 INFO L256 TraceCheckUtils]: 61: Hoare triple {8908#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {8908#false} is VALID [2018-11-23 12:11:59,179 INFO L273 TraceCheckUtils]: 62: Hoare triple {8908#false} ~cond := #in~cond; {8908#false} is VALID [2018-11-23 12:11:59,179 INFO L273 TraceCheckUtils]: 63: Hoare triple {8908#false} assume 0 == ~cond; {8908#false} is VALID [2018-11-23 12:11:59,179 INFO L273 TraceCheckUtils]: 64: Hoare triple {8908#false} assume !false; {8908#false} is VALID [2018-11-23 12:11:59,183 INFO L134 CoverageAnalysis]: Checked inductivity of 425 backedges. 0 proven. 425 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:11:59,205 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:11:59,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 21 [2018-11-23 12:11:59,206 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-11-23 12:11:59,206 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:11:59,206 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-23 12:11:59,277 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:11:59,277 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 12:11:59,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 12:11:59,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-11-23 12:11:59,278 INFO L87 Difference]: Start difference. First operand 70 states and 89 transitions. Second operand 21 states. [2018-11-23 12:12:03,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:03,465 INFO L93 Difference]: Finished difference Result 177 states and 236 transitions. [2018-11-23 12:12:03,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 12:12:03,465 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-11-23 12:12:03,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:12:03,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 12:12:03,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 236 transitions. [2018-11-23 12:12:03,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 12:12:03,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 236 transitions. [2018-11-23 12:12:03,471 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states and 236 transitions. [2018-11-23 12:12:03,762 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 236 edges. 236 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:03,767 INFO L225 Difference]: With dead ends: 177 [2018-11-23 12:12:03,767 INFO L226 Difference]: Without dead ends: 165 [2018-11-23 12:12:03,767 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-11-23 12:12:03,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-11-23 12:12:03,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 73. [2018-11-23 12:12:03,825 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:12:03,825 INFO L82 GeneralOperation]: Start isEquivalent. First operand 165 states. Second operand 73 states. [2018-11-23 12:12:03,825 INFO L74 IsIncluded]: Start isIncluded. First operand 165 states. Second operand 73 states. [2018-11-23 12:12:03,825 INFO L87 Difference]: Start difference. First operand 165 states. Second operand 73 states. [2018-11-23 12:12:03,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:03,830 INFO L93 Difference]: Finished difference Result 165 states and 222 transitions. [2018-11-23 12:12:03,830 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 222 transitions. [2018-11-23 12:12:03,831 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:03,831 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:03,831 INFO L74 IsIncluded]: Start isIncluded. First operand 73 states. Second operand 165 states. [2018-11-23 12:12:03,831 INFO L87 Difference]: Start difference. First operand 73 states. Second operand 165 states. [2018-11-23 12:12:03,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:03,835 INFO L93 Difference]: Finished difference Result 165 states and 222 transitions. [2018-11-23 12:12:03,835 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 222 transitions. [2018-11-23 12:12:03,836 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:03,836 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:03,836 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:12:03,836 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:12:03,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-11-23 12:12:03,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 93 transitions. [2018-11-23 12:12:03,838 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 93 transitions. Word has length 65 [2018-11-23 12:12:03,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:12:03,838 INFO L480 AbstractCegarLoop]: Abstraction has 73 states and 93 transitions. [2018-11-23 12:12:03,838 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 12:12:03,838 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 93 transitions. [2018-11-23 12:12:03,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-23 12:12:03,839 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:12:03,839 INFO L402 BasicCegarLoop]: trace histogram [18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:12:03,839 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:12:03,840 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:12:03,840 INFO L82 PathProgramCache]: Analyzing trace with hash 1204644909, now seen corresponding path program 18 times [2018-11-23 12:12:03,840 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:12:03,840 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:12:03,841 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:03,841 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:12:03,841 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:03,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:04,250 INFO L256 TraceCheckUtils]: 0: Hoare triple {9793#true} call ULTIMATE.init(); {9793#true} is VALID [2018-11-23 12:12:04,251 INFO L273 TraceCheckUtils]: 1: Hoare triple {9793#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {9793#true} is VALID [2018-11-23 12:12:04,251 INFO L273 TraceCheckUtils]: 2: Hoare triple {9793#true} assume true; {9793#true} is VALID [2018-11-23 12:12:04,251 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9793#true} {9793#true} #59#return; {9793#true} is VALID [2018-11-23 12:12:04,251 INFO L256 TraceCheckUtils]: 4: Hoare triple {9793#true} call #t~ret4 := main(); {9793#true} is VALID [2018-11-23 12:12:04,252 INFO L273 TraceCheckUtils]: 5: Hoare triple {9793#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {9795#(= main_~i~0 0)} is VALID [2018-11-23 12:12:04,252 INFO L273 TraceCheckUtils]: 6: Hoare triple {9795#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9795#(= main_~i~0 0)} is VALID [2018-11-23 12:12:04,253 INFO L273 TraceCheckUtils]: 7: Hoare triple {9795#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9795#(= main_~i~0 0)} is VALID [2018-11-23 12:12:04,254 INFO L273 TraceCheckUtils]: 8: Hoare triple {9795#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {9796#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:04,254 INFO L273 TraceCheckUtils]: 9: Hoare triple {9796#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9796#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:04,254 INFO L273 TraceCheckUtils]: 10: Hoare triple {9796#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9796#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:04,255 INFO L273 TraceCheckUtils]: 11: Hoare triple {9796#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {9797#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:04,255 INFO L273 TraceCheckUtils]: 12: Hoare triple {9797#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9797#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:04,255 INFO L273 TraceCheckUtils]: 13: Hoare triple {9797#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9797#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:04,256 INFO L273 TraceCheckUtils]: 14: Hoare triple {9797#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {9798#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:04,256 INFO L273 TraceCheckUtils]: 15: Hoare triple {9798#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9798#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:04,256 INFO L273 TraceCheckUtils]: 16: Hoare triple {9798#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9798#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:04,257 INFO L273 TraceCheckUtils]: 17: Hoare triple {9798#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {9799#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:04,258 INFO L273 TraceCheckUtils]: 18: Hoare triple {9799#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9799#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:04,258 INFO L273 TraceCheckUtils]: 19: Hoare triple {9799#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9799#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:04,259 INFO L273 TraceCheckUtils]: 20: Hoare triple {9799#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {9800#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:04,259 INFO L273 TraceCheckUtils]: 21: Hoare triple {9800#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9800#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:04,260 INFO L273 TraceCheckUtils]: 22: Hoare triple {9800#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9800#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:04,261 INFO L273 TraceCheckUtils]: 23: Hoare triple {9800#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {9801#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:04,261 INFO L273 TraceCheckUtils]: 24: Hoare triple {9801#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9801#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:04,262 INFO L273 TraceCheckUtils]: 25: Hoare triple {9801#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9801#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:04,262 INFO L273 TraceCheckUtils]: 26: Hoare triple {9801#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {9802#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:04,263 INFO L273 TraceCheckUtils]: 27: Hoare triple {9802#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9802#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:04,263 INFO L273 TraceCheckUtils]: 28: Hoare triple {9802#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9802#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:04,264 INFO L273 TraceCheckUtils]: 29: Hoare triple {9802#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {9803#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:04,265 INFO L273 TraceCheckUtils]: 30: Hoare triple {9803#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9803#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:04,265 INFO L273 TraceCheckUtils]: 31: Hoare triple {9803#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9803#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:04,266 INFO L273 TraceCheckUtils]: 32: Hoare triple {9803#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {9804#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:04,266 INFO L273 TraceCheckUtils]: 33: Hoare triple {9804#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9804#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:04,267 INFO L273 TraceCheckUtils]: 34: Hoare triple {9804#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9804#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:04,268 INFO L273 TraceCheckUtils]: 35: Hoare triple {9804#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {9805#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:04,268 INFO L273 TraceCheckUtils]: 36: Hoare triple {9805#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9805#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:04,269 INFO L273 TraceCheckUtils]: 37: Hoare triple {9805#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9805#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:04,269 INFO L273 TraceCheckUtils]: 38: Hoare triple {9805#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {9806#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:04,270 INFO L273 TraceCheckUtils]: 39: Hoare triple {9806#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9806#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:04,270 INFO L273 TraceCheckUtils]: 40: Hoare triple {9806#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9806#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:04,271 INFO L273 TraceCheckUtils]: 41: Hoare triple {9806#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {9807#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:04,272 INFO L273 TraceCheckUtils]: 42: Hoare triple {9807#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9807#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:04,272 INFO L273 TraceCheckUtils]: 43: Hoare triple {9807#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9807#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:04,273 INFO L273 TraceCheckUtils]: 44: Hoare triple {9807#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {9808#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:04,274 INFO L273 TraceCheckUtils]: 45: Hoare triple {9808#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9808#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:04,274 INFO L273 TraceCheckUtils]: 46: Hoare triple {9808#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9808#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:04,275 INFO L273 TraceCheckUtils]: 47: Hoare triple {9808#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {9809#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:04,275 INFO L273 TraceCheckUtils]: 48: Hoare triple {9809#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9809#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:04,276 INFO L273 TraceCheckUtils]: 49: Hoare triple {9809#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9809#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:04,277 INFO L273 TraceCheckUtils]: 50: Hoare triple {9809#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {9810#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:04,277 INFO L273 TraceCheckUtils]: 51: Hoare triple {9810#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9810#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:04,278 INFO L273 TraceCheckUtils]: 52: Hoare triple {9810#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9810#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:04,278 INFO L273 TraceCheckUtils]: 53: Hoare triple {9810#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {9811#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:04,279 INFO L273 TraceCheckUtils]: 54: Hoare triple {9811#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9811#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:04,279 INFO L273 TraceCheckUtils]: 55: Hoare triple {9811#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9811#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:04,280 INFO L273 TraceCheckUtils]: 56: Hoare triple {9811#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {9812#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:04,281 INFO L273 TraceCheckUtils]: 57: Hoare triple {9812#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9812#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:04,281 INFO L273 TraceCheckUtils]: 58: Hoare triple {9812#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9812#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:04,282 INFO L273 TraceCheckUtils]: 59: Hoare triple {9812#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {9813#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:04,283 INFO L273 TraceCheckUtils]: 60: Hoare triple {9813#(<= main_~i~0 36)} assume !(~i~0 < 100000); {9794#false} is VALID [2018-11-23 12:12:04,283 INFO L273 TraceCheckUtils]: 61: Hoare triple {9794#false} ~i~0 := 0; {9794#false} is VALID [2018-11-23 12:12:04,283 INFO L273 TraceCheckUtils]: 62: Hoare triple {9794#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9794#false} is VALID [2018-11-23 12:12:04,283 INFO L273 TraceCheckUtils]: 63: Hoare triple {9794#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9794#false} is VALID [2018-11-23 12:12:04,284 INFO L256 TraceCheckUtils]: 64: Hoare triple {9794#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {9794#false} is VALID [2018-11-23 12:12:04,284 INFO L273 TraceCheckUtils]: 65: Hoare triple {9794#false} ~cond := #in~cond; {9794#false} is VALID [2018-11-23 12:12:04,284 INFO L273 TraceCheckUtils]: 66: Hoare triple {9794#false} assume 0 == ~cond; {9794#false} is VALID [2018-11-23 12:12:04,284 INFO L273 TraceCheckUtils]: 67: Hoare triple {9794#false} assume !false; {9794#false} is VALID [2018-11-23 12:12:04,288 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 0 proven. 477 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:04,288 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:12:04,288 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:12:04,297 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 12:12:29,546 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-11-23 12:12:29,546 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:12:29,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:29,575 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:12:29,863 INFO L256 TraceCheckUtils]: 0: Hoare triple {9793#true} call ULTIMATE.init(); {9793#true} is VALID [2018-11-23 12:12:29,863 INFO L273 TraceCheckUtils]: 1: Hoare triple {9793#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {9793#true} is VALID [2018-11-23 12:12:29,863 INFO L273 TraceCheckUtils]: 2: Hoare triple {9793#true} assume true; {9793#true} is VALID [2018-11-23 12:12:29,863 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9793#true} {9793#true} #59#return; {9793#true} is VALID [2018-11-23 12:12:29,864 INFO L256 TraceCheckUtils]: 4: Hoare triple {9793#true} call #t~ret4 := main(); {9793#true} is VALID [2018-11-23 12:12:29,864 INFO L273 TraceCheckUtils]: 5: Hoare triple {9793#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {9832#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:29,864 INFO L273 TraceCheckUtils]: 6: Hoare triple {9832#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9832#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:29,865 INFO L273 TraceCheckUtils]: 7: Hoare triple {9832#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9832#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:29,865 INFO L273 TraceCheckUtils]: 8: Hoare triple {9832#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {9796#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:29,866 INFO L273 TraceCheckUtils]: 9: Hoare triple {9796#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9796#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:29,866 INFO L273 TraceCheckUtils]: 10: Hoare triple {9796#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9796#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:29,867 INFO L273 TraceCheckUtils]: 11: Hoare triple {9796#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {9797#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:29,867 INFO L273 TraceCheckUtils]: 12: Hoare triple {9797#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9797#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:29,868 INFO L273 TraceCheckUtils]: 13: Hoare triple {9797#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9797#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:29,869 INFO L273 TraceCheckUtils]: 14: Hoare triple {9797#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {9798#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:29,869 INFO L273 TraceCheckUtils]: 15: Hoare triple {9798#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9798#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:29,870 INFO L273 TraceCheckUtils]: 16: Hoare triple {9798#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9798#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:29,870 INFO L273 TraceCheckUtils]: 17: Hoare triple {9798#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {9799#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:29,871 INFO L273 TraceCheckUtils]: 18: Hoare triple {9799#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9799#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:29,871 INFO L273 TraceCheckUtils]: 19: Hoare triple {9799#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9799#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:29,872 INFO L273 TraceCheckUtils]: 20: Hoare triple {9799#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {9800#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:29,873 INFO L273 TraceCheckUtils]: 21: Hoare triple {9800#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9800#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:29,873 INFO L273 TraceCheckUtils]: 22: Hoare triple {9800#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9800#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:29,874 INFO L273 TraceCheckUtils]: 23: Hoare triple {9800#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {9801#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:29,874 INFO L273 TraceCheckUtils]: 24: Hoare triple {9801#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9801#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:29,875 INFO L273 TraceCheckUtils]: 25: Hoare triple {9801#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9801#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:29,876 INFO L273 TraceCheckUtils]: 26: Hoare triple {9801#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {9802#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:29,876 INFO L273 TraceCheckUtils]: 27: Hoare triple {9802#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9802#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:29,877 INFO L273 TraceCheckUtils]: 28: Hoare triple {9802#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9802#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:29,877 INFO L273 TraceCheckUtils]: 29: Hoare triple {9802#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {9803#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:29,878 INFO L273 TraceCheckUtils]: 30: Hoare triple {9803#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9803#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:29,879 INFO L273 TraceCheckUtils]: 31: Hoare triple {9803#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9803#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:29,879 INFO L273 TraceCheckUtils]: 32: Hoare triple {9803#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {9804#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:29,880 INFO L273 TraceCheckUtils]: 33: Hoare triple {9804#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9804#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:29,880 INFO L273 TraceCheckUtils]: 34: Hoare triple {9804#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9804#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:29,881 INFO L273 TraceCheckUtils]: 35: Hoare triple {9804#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {9805#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:29,882 INFO L273 TraceCheckUtils]: 36: Hoare triple {9805#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9805#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:29,882 INFO L273 TraceCheckUtils]: 37: Hoare triple {9805#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9805#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:29,883 INFO L273 TraceCheckUtils]: 38: Hoare triple {9805#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {9806#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:29,883 INFO L273 TraceCheckUtils]: 39: Hoare triple {9806#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9806#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:29,884 INFO L273 TraceCheckUtils]: 40: Hoare triple {9806#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9806#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:29,885 INFO L273 TraceCheckUtils]: 41: Hoare triple {9806#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {9807#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:29,885 INFO L273 TraceCheckUtils]: 42: Hoare triple {9807#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9807#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:29,886 INFO L273 TraceCheckUtils]: 43: Hoare triple {9807#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9807#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:29,886 INFO L273 TraceCheckUtils]: 44: Hoare triple {9807#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {9808#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:29,887 INFO L273 TraceCheckUtils]: 45: Hoare triple {9808#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9808#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:29,887 INFO L273 TraceCheckUtils]: 46: Hoare triple {9808#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9808#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:29,888 INFO L273 TraceCheckUtils]: 47: Hoare triple {9808#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {9809#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:29,889 INFO L273 TraceCheckUtils]: 48: Hoare triple {9809#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9809#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:29,889 INFO L273 TraceCheckUtils]: 49: Hoare triple {9809#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9809#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:29,890 INFO L273 TraceCheckUtils]: 50: Hoare triple {9809#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {9810#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:29,890 INFO L273 TraceCheckUtils]: 51: Hoare triple {9810#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9810#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:29,891 INFO L273 TraceCheckUtils]: 52: Hoare triple {9810#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9810#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:29,892 INFO L273 TraceCheckUtils]: 53: Hoare triple {9810#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {9811#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:29,892 INFO L273 TraceCheckUtils]: 54: Hoare triple {9811#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9811#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:29,893 INFO L273 TraceCheckUtils]: 55: Hoare triple {9811#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9811#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:29,894 INFO L273 TraceCheckUtils]: 56: Hoare triple {9811#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {9812#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:29,894 INFO L273 TraceCheckUtils]: 57: Hoare triple {9812#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9812#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:29,895 INFO L273 TraceCheckUtils]: 58: Hoare triple {9812#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9812#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:29,895 INFO L273 TraceCheckUtils]: 59: Hoare triple {9812#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {9813#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:29,896 INFO L273 TraceCheckUtils]: 60: Hoare triple {9813#(<= main_~i~0 36)} assume !(~i~0 < 100000); {9794#false} is VALID [2018-11-23 12:12:29,896 INFO L273 TraceCheckUtils]: 61: Hoare triple {9794#false} ~i~0 := 0; {9794#false} is VALID [2018-11-23 12:12:29,896 INFO L273 TraceCheckUtils]: 62: Hoare triple {9794#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {9794#false} is VALID [2018-11-23 12:12:29,897 INFO L273 TraceCheckUtils]: 63: Hoare triple {9794#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {9794#false} is VALID [2018-11-23 12:12:29,897 INFO L256 TraceCheckUtils]: 64: Hoare triple {9794#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {9794#false} is VALID [2018-11-23 12:12:29,897 INFO L273 TraceCheckUtils]: 65: Hoare triple {9794#false} ~cond := #in~cond; {9794#false} is VALID [2018-11-23 12:12:29,897 INFO L273 TraceCheckUtils]: 66: Hoare triple {9794#false} assume 0 == ~cond; {9794#false} is VALID [2018-11-23 12:12:29,897 INFO L273 TraceCheckUtils]: 67: Hoare triple {9794#false} assume !false; {9794#false} is VALID [2018-11-23 12:12:29,901 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 0 proven. 477 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:29,924 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:12:29,924 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 22 [2018-11-23 12:12:29,925 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 68 [2018-11-23 12:12:29,925 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:12:29,925 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states. [2018-11-23 12:12:29,998 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:29,998 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-23 12:12:29,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-23 12:12:29,999 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-11-23 12:12:29,999 INFO L87 Difference]: Start difference. First operand 73 states and 93 transitions. Second operand 22 states. [2018-11-23 12:12:31,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:31,322 INFO L93 Difference]: Finished difference Result 185 states and 247 transitions. [2018-11-23 12:12:31,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-23 12:12:31,322 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 68 [2018-11-23 12:12:31,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:12:31,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 12:12:31,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 247 transitions. [2018-11-23 12:12:31,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 12:12:31,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 247 transitions. [2018-11-23 12:12:31,328 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states and 247 transitions. [2018-11-23 12:12:32,092 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 247 edges. 247 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:32,095 INFO L225 Difference]: With dead ends: 185 [2018-11-23 12:12:32,095 INFO L226 Difference]: Without dead ends: 173 [2018-11-23 12:12:32,096 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-11-23 12:12:32,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-11-23 12:12:32,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 76. [2018-11-23 12:12:32,122 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:12:32,122 INFO L82 GeneralOperation]: Start isEquivalent. First operand 173 states. Second operand 76 states. [2018-11-23 12:12:32,122 INFO L74 IsIncluded]: Start isIncluded. First operand 173 states. Second operand 76 states. [2018-11-23 12:12:32,122 INFO L87 Difference]: Start difference. First operand 173 states. Second operand 76 states. [2018-11-23 12:12:32,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:32,126 INFO L93 Difference]: Finished difference Result 173 states and 233 transitions. [2018-11-23 12:12:32,126 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 233 transitions. [2018-11-23 12:12:32,127 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:32,127 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:32,128 INFO L74 IsIncluded]: Start isIncluded. First operand 76 states. Second operand 173 states. [2018-11-23 12:12:32,128 INFO L87 Difference]: Start difference. First operand 76 states. Second operand 173 states. [2018-11-23 12:12:32,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:32,132 INFO L93 Difference]: Finished difference Result 173 states and 233 transitions. [2018-11-23 12:12:32,132 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 233 transitions. [2018-11-23 12:12:32,133 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:32,133 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:32,133 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:12:32,133 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:12:32,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-11-23 12:12:32,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 97 transitions. [2018-11-23 12:12:32,135 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 97 transitions. Word has length 68 [2018-11-23 12:12:32,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:12:32,135 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 97 transitions. [2018-11-23 12:12:32,135 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-23 12:12:32,135 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 97 transitions. [2018-11-23 12:12:32,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-23 12:12:32,136 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:12:32,136 INFO L402 BasicCegarLoop]: trace histogram [19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:12:32,137 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:12:32,137 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:12:32,137 INFO L82 PathProgramCache]: Analyzing trace with hash -1663540950, now seen corresponding path program 19 times [2018-11-23 12:12:32,137 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:12:32,137 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:12:32,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:32,138 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:12:32,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:32,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:32,692 INFO L256 TraceCheckUtils]: 0: Hoare triple {10720#true} call ULTIMATE.init(); {10720#true} is VALID [2018-11-23 12:12:32,692 INFO L273 TraceCheckUtils]: 1: Hoare triple {10720#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {10720#true} is VALID [2018-11-23 12:12:32,692 INFO L273 TraceCheckUtils]: 2: Hoare triple {10720#true} assume true; {10720#true} is VALID [2018-11-23 12:12:32,692 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10720#true} {10720#true} #59#return; {10720#true} is VALID [2018-11-23 12:12:32,693 INFO L256 TraceCheckUtils]: 4: Hoare triple {10720#true} call #t~ret4 := main(); {10720#true} is VALID [2018-11-23 12:12:32,698 INFO L273 TraceCheckUtils]: 5: Hoare triple {10720#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {10722#(= main_~i~0 0)} is VALID [2018-11-23 12:12:32,698 INFO L273 TraceCheckUtils]: 6: Hoare triple {10722#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10722#(= main_~i~0 0)} is VALID [2018-11-23 12:12:32,699 INFO L273 TraceCheckUtils]: 7: Hoare triple {10722#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10722#(= main_~i~0 0)} is VALID [2018-11-23 12:12:32,699 INFO L273 TraceCheckUtils]: 8: Hoare triple {10722#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {10723#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:32,700 INFO L273 TraceCheckUtils]: 9: Hoare triple {10723#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10723#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:32,700 INFO L273 TraceCheckUtils]: 10: Hoare triple {10723#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10723#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:32,700 INFO L273 TraceCheckUtils]: 11: Hoare triple {10723#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {10724#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:32,701 INFO L273 TraceCheckUtils]: 12: Hoare triple {10724#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10724#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:32,701 INFO L273 TraceCheckUtils]: 13: Hoare triple {10724#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10724#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:32,701 INFO L273 TraceCheckUtils]: 14: Hoare triple {10724#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {10725#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:32,702 INFO L273 TraceCheckUtils]: 15: Hoare triple {10725#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10725#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:32,702 INFO L273 TraceCheckUtils]: 16: Hoare triple {10725#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10725#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:32,703 INFO L273 TraceCheckUtils]: 17: Hoare triple {10725#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {10726#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:32,703 INFO L273 TraceCheckUtils]: 18: Hoare triple {10726#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10726#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:32,704 INFO L273 TraceCheckUtils]: 19: Hoare triple {10726#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10726#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:32,704 INFO L273 TraceCheckUtils]: 20: Hoare triple {10726#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {10727#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:32,705 INFO L273 TraceCheckUtils]: 21: Hoare triple {10727#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10727#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:32,705 INFO L273 TraceCheckUtils]: 22: Hoare triple {10727#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10727#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:32,706 INFO L273 TraceCheckUtils]: 23: Hoare triple {10727#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {10728#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:32,707 INFO L273 TraceCheckUtils]: 24: Hoare triple {10728#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10728#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:32,707 INFO L273 TraceCheckUtils]: 25: Hoare triple {10728#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10728#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:32,708 INFO L273 TraceCheckUtils]: 26: Hoare triple {10728#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {10729#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:32,708 INFO L273 TraceCheckUtils]: 27: Hoare triple {10729#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10729#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:32,709 INFO L273 TraceCheckUtils]: 28: Hoare triple {10729#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10729#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:32,710 INFO L273 TraceCheckUtils]: 29: Hoare triple {10729#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {10730#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:32,710 INFO L273 TraceCheckUtils]: 30: Hoare triple {10730#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10730#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:32,711 INFO L273 TraceCheckUtils]: 31: Hoare triple {10730#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10730#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:32,711 INFO L273 TraceCheckUtils]: 32: Hoare triple {10730#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {10731#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:32,712 INFO L273 TraceCheckUtils]: 33: Hoare triple {10731#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10731#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:32,713 INFO L273 TraceCheckUtils]: 34: Hoare triple {10731#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10731#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:32,713 INFO L273 TraceCheckUtils]: 35: Hoare triple {10731#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {10732#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:32,714 INFO L273 TraceCheckUtils]: 36: Hoare triple {10732#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10732#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:32,714 INFO L273 TraceCheckUtils]: 37: Hoare triple {10732#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10732#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:32,715 INFO L273 TraceCheckUtils]: 38: Hoare triple {10732#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {10733#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:32,716 INFO L273 TraceCheckUtils]: 39: Hoare triple {10733#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10733#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:32,716 INFO L273 TraceCheckUtils]: 40: Hoare triple {10733#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10733#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:32,717 INFO L273 TraceCheckUtils]: 41: Hoare triple {10733#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {10734#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:32,717 INFO L273 TraceCheckUtils]: 42: Hoare triple {10734#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10734#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:32,718 INFO L273 TraceCheckUtils]: 43: Hoare triple {10734#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10734#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:32,719 INFO L273 TraceCheckUtils]: 44: Hoare triple {10734#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {10735#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:32,719 INFO L273 TraceCheckUtils]: 45: Hoare triple {10735#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10735#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:32,720 INFO L273 TraceCheckUtils]: 46: Hoare triple {10735#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10735#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:32,720 INFO L273 TraceCheckUtils]: 47: Hoare triple {10735#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {10736#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:32,721 INFO L273 TraceCheckUtils]: 48: Hoare triple {10736#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10736#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:32,721 INFO L273 TraceCheckUtils]: 49: Hoare triple {10736#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10736#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:32,722 INFO L273 TraceCheckUtils]: 50: Hoare triple {10736#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {10737#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:32,723 INFO L273 TraceCheckUtils]: 51: Hoare triple {10737#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10737#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:32,723 INFO L273 TraceCheckUtils]: 52: Hoare triple {10737#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10737#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:32,724 INFO L273 TraceCheckUtils]: 53: Hoare triple {10737#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {10738#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:32,725 INFO L273 TraceCheckUtils]: 54: Hoare triple {10738#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10738#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:32,725 INFO L273 TraceCheckUtils]: 55: Hoare triple {10738#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10738#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:32,726 INFO L273 TraceCheckUtils]: 56: Hoare triple {10738#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {10739#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:32,726 INFO L273 TraceCheckUtils]: 57: Hoare triple {10739#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10739#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:32,727 INFO L273 TraceCheckUtils]: 58: Hoare triple {10739#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10739#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:32,728 INFO L273 TraceCheckUtils]: 59: Hoare triple {10739#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {10740#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:32,728 INFO L273 TraceCheckUtils]: 60: Hoare triple {10740#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10740#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:32,729 INFO L273 TraceCheckUtils]: 61: Hoare triple {10740#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10740#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:32,729 INFO L273 TraceCheckUtils]: 62: Hoare triple {10740#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {10741#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:32,730 INFO L273 TraceCheckUtils]: 63: Hoare triple {10741#(<= main_~i~0 38)} assume !(~i~0 < 100000); {10721#false} is VALID [2018-11-23 12:12:32,730 INFO L273 TraceCheckUtils]: 64: Hoare triple {10721#false} ~i~0 := 0; {10721#false} is VALID [2018-11-23 12:12:32,731 INFO L273 TraceCheckUtils]: 65: Hoare triple {10721#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10721#false} is VALID [2018-11-23 12:12:32,731 INFO L273 TraceCheckUtils]: 66: Hoare triple {10721#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10721#false} is VALID [2018-11-23 12:12:32,731 INFO L256 TraceCheckUtils]: 67: Hoare triple {10721#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {10721#false} is VALID [2018-11-23 12:12:32,731 INFO L273 TraceCheckUtils]: 68: Hoare triple {10721#false} ~cond := #in~cond; {10721#false} is VALID [2018-11-23 12:12:32,731 INFO L273 TraceCheckUtils]: 69: Hoare triple {10721#false} assume 0 == ~cond; {10721#false} is VALID [2018-11-23 12:12:32,732 INFO L273 TraceCheckUtils]: 70: Hoare triple {10721#false} assume !false; {10721#false} is VALID [2018-11-23 12:12:32,737 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 532 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:32,737 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:12:32,737 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:12:32,746 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:12:32,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:32,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:32,801 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:12:33,015 INFO L256 TraceCheckUtils]: 0: Hoare triple {10720#true} call ULTIMATE.init(); {10720#true} is VALID [2018-11-23 12:12:33,016 INFO L273 TraceCheckUtils]: 1: Hoare triple {10720#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {10720#true} is VALID [2018-11-23 12:12:33,016 INFO L273 TraceCheckUtils]: 2: Hoare triple {10720#true} assume true; {10720#true} is VALID [2018-11-23 12:12:33,016 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10720#true} {10720#true} #59#return; {10720#true} is VALID [2018-11-23 12:12:33,017 INFO L256 TraceCheckUtils]: 4: Hoare triple {10720#true} call #t~ret4 := main(); {10720#true} is VALID [2018-11-23 12:12:33,017 INFO L273 TraceCheckUtils]: 5: Hoare triple {10720#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {10760#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:33,018 INFO L273 TraceCheckUtils]: 6: Hoare triple {10760#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10760#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:33,018 INFO L273 TraceCheckUtils]: 7: Hoare triple {10760#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10760#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:33,019 INFO L273 TraceCheckUtils]: 8: Hoare triple {10760#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {10723#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:33,019 INFO L273 TraceCheckUtils]: 9: Hoare triple {10723#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10723#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:33,019 INFO L273 TraceCheckUtils]: 10: Hoare triple {10723#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10723#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:33,020 INFO L273 TraceCheckUtils]: 11: Hoare triple {10723#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {10724#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:33,020 INFO L273 TraceCheckUtils]: 12: Hoare triple {10724#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10724#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:33,021 INFO L273 TraceCheckUtils]: 13: Hoare triple {10724#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10724#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:33,022 INFO L273 TraceCheckUtils]: 14: Hoare triple {10724#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {10725#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:33,022 INFO L273 TraceCheckUtils]: 15: Hoare triple {10725#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10725#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:33,023 INFO L273 TraceCheckUtils]: 16: Hoare triple {10725#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10725#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:33,023 INFO L273 TraceCheckUtils]: 17: Hoare triple {10725#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {10726#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:33,024 INFO L273 TraceCheckUtils]: 18: Hoare triple {10726#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10726#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:33,024 INFO L273 TraceCheckUtils]: 19: Hoare triple {10726#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10726#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:33,025 INFO L273 TraceCheckUtils]: 20: Hoare triple {10726#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {10727#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:33,026 INFO L273 TraceCheckUtils]: 21: Hoare triple {10727#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10727#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:33,026 INFO L273 TraceCheckUtils]: 22: Hoare triple {10727#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10727#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:33,027 INFO L273 TraceCheckUtils]: 23: Hoare triple {10727#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {10728#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:33,027 INFO L273 TraceCheckUtils]: 24: Hoare triple {10728#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10728#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:33,028 INFO L273 TraceCheckUtils]: 25: Hoare triple {10728#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10728#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:33,029 INFO L273 TraceCheckUtils]: 26: Hoare triple {10728#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {10729#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:33,029 INFO L273 TraceCheckUtils]: 27: Hoare triple {10729#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10729#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:33,030 INFO L273 TraceCheckUtils]: 28: Hoare triple {10729#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10729#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:33,030 INFO L273 TraceCheckUtils]: 29: Hoare triple {10729#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {10730#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:33,031 INFO L273 TraceCheckUtils]: 30: Hoare triple {10730#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10730#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:33,032 INFO L273 TraceCheckUtils]: 31: Hoare triple {10730#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10730#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:33,032 INFO L273 TraceCheckUtils]: 32: Hoare triple {10730#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {10731#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:33,033 INFO L273 TraceCheckUtils]: 33: Hoare triple {10731#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10731#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:33,033 INFO L273 TraceCheckUtils]: 34: Hoare triple {10731#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10731#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:33,034 INFO L273 TraceCheckUtils]: 35: Hoare triple {10731#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {10732#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:33,035 INFO L273 TraceCheckUtils]: 36: Hoare triple {10732#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10732#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:33,035 INFO L273 TraceCheckUtils]: 37: Hoare triple {10732#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10732#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:33,036 INFO L273 TraceCheckUtils]: 38: Hoare triple {10732#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {10733#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:33,036 INFO L273 TraceCheckUtils]: 39: Hoare triple {10733#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10733#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:33,037 INFO L273 TraceCheckUtils]: 40: Hoare triple {10733#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10733#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:33,052 INFO L273 TraceCheckUtils]: 41: Hoare triple {10733#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {10734#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:33,052 INFO L273 TraceCheckUtils]: 42: Hoare triple {10734#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10734#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:33,053 INFO L273 TraceCheckUtils]: 43: Hoare triple {10734#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10734#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:33,053 INFO L273 TraceCheckUtils]: 44: Hoare triple {10734#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {10735#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:33,053 INFO L273 TraceCheckUtils]: 45: Hoare triple {10735#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10735#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:33,054 INFO L273 TraceCheckUtils]: 46: Hoare triple {10735#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10735#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:33,054 INFO L273 TraceCheckUtils]: 47: Hoare triple {10735#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {10736#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:33,054 INFO L273 TraceCheckUtils]: 48: Hoare triple {10736#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10736#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:33,055 INFO L273 TraceCheckUtils]: 49: Hoare triple {10736#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10736#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:33,055 INFO L273 TraceCheckUtils]: 50: Hoare triple {10736#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {10737#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:33,056 INFO L273 TraceCheckUtils]: 51: Hoare triple {10737#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10737#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:33,056 INFO L273 TraceCheckUtils]: 52: Hoare triple {10737#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10737#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:33,056 INFO L273 TraceCheckUtils]: 53: Hoare triple {10737#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {10738#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:33,057 INFO L273 TraceCheckUtils]: 54: Hoare triple {10738#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10738#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:33,058 INFO L273 TraceCheckUtils]: 55: Hoare triple {10738#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10738#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:33,058 INFO L273 TraceCheckUtils]: 56: Hoare triple {10738#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {10739#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:33,059 INFO L273 TraceCheckUtils]: 57: Hoare triple {10739#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10739#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:33,059 INFO L273 TraceCheckUtils]: 58: Hoare triple {10739#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10739#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:33,060 INFO L273 TraceCheckUtils]: 59: Hoare triple {10739#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {10740#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:33,061 INFO L273 TraceCheckUtils]: 60: Hoare triple {10740#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10740#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:33,061 INFO L273 TraceCheckUtils]: 61: Hoare triple {10740#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10740#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:33,062 INFO L273 TraceCheckUtils]: 62: Hoare triple {10740#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {10741#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:33,063 INFO L273 TraceCheckUtils]: 63: Hoare triple {10741#(<= main_~i~0 38)} assume !(~i~0 < 100000); {10721#false} is VALID [2018-11-23 12:12:33,063 INFO L273 TraceCheckUtils]: 64: Hoare triple {10721#false} ~i~0 := 0; {10721#false} is VALID [2018-11-23 12:12:33,063 INFO L273 TraceCheckUtils]: 65: Hoare triple {10721#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {10721#false} is VALID [2018-11-23 12:12:33,063 INFO L273 TraceCheckUtils]: 66: Hoare triple {10721#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {10721#false} is VALID [2018-11-23 12:12:33,063 INFO L256 TraceCheckUtils]: 67: Hoare triple {10721#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {10721#false} is VALID [2018-11-23 12:12:33,064 INFO L273 TraceCheckUtils]: 68: Hoare triple {10721#false} ~cond := #in~cond; {10721#false} is VALID [2018-11-23 12:12:33,064 INFO L273 TraceCheckUtils]: 69: Hoare triple {10721#false} assume 0 == ~cond; {10721#false} is VALID [2018-11-23 12:12:33,064 INFO L273 TraceCheckUtils]: 70: Hoare triple {10721#false} assume !false; {10721#false} is VALID [2018-11-23 12:12:33,068 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 532 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:33,088 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:12:33,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 23 [2018-11-23 12:12:33,089 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-11-23 12:12:33,089 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:12:33,089 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states. [2018-11-23 12:12:33,178 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:33,179 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-23 12:12:33,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-23 12:12:33,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-11-23 12:12:33,180 INFO L87 Difference]: Start difference. First operand 76 states and 97 transitions. Second operand 23 states. [2018-11-23 12:12:34,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:34,557 INFO L93 Difference]: Finished difference Result 193 states and 258 transitions. [2018-11-23 12:12:34,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-23 12:12:34,557 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-11-23 12:12:34,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:12:34,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 12:12:34,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 258 transitions. [2018-11-23 12:12:34,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 12:12:34,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 258 transitions. [2018-11-23 12:12:34,563 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states and 258 transitions. [2018-11-23 12:12:34,976 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 258 edges. 258 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:34,980 INFO L225 Difference]: With dead ends: 193 [2018-11-23 12:12:34,980 INFO L226 Difference]: Without dead ends: 181 [2018-11-23 12:12:34,980 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-11-23 12:12:34,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-11-23 12:12:35,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 79. [2018-11-23 12:12:35,000 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:12:35,000 INFO L82 GeneralOperation]: Start isEquivalent. First operand 181 states. Second operand 79 states. [2018-11-23 12:12:35,001 INFO L74 IsIncluded]: Start isIncluded. First operand 181 states. Second operand 79 states. [2018-11-23 12:12:35,001 INFO L87 Difference]: Start difference. First operand 181 states. Second operand 79 states. [2018-11-23 12:12:35,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:35,005 INFO L93 Difference]: Finished difference Result 181 states and 244 transitions. [2018-11-23 12:12:35,005 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 244 transitions. [2018-11-23 12:12:35,005 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:35,005 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:35,005 INFO L74 IsIncluded]: Start isIncluded. First operand 79 states. Second operand 181 states. [2018-11-23 12:12:35,006 INFO L87 Difference]: Start difference. First operand 79 states. Second operand 181 states. [2018-11-23 12:12:35,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:35,010 INFO L93 Difference]: Finished difference Result 181 states and 244 transitions. [2018-11-23 12:12:35,010 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 244 transitions. [2018-11-23 12:12:35,010 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:35,011 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:35,011 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:12:35,011 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:12:35,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-11-23 12:12:35,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 101 transitions. [2018-11-23 12:12:35,012 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 101 transitions. Word has length 71 [2018-11-23 12:12:35,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:12:35,013 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 101 transitions. [2018-11-23 12:12:35,013 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-23 12:12:35,013 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 101 transitions. [2018-11-23 12:12:35,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-23 12:12:35,013 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:12:35,014 INFO L402 BasicCegarLoop]: trace histogram [20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:12:35,014 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:12:35,014 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:12:35,014 INFO L82 PathProgramCache]: Analyzing trace with hash 585887501, now seen corresponding path program 20 times [2018-11-23 12:12:35,014 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:12:35,014 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:12:35,015 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:35,015 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 12:12:35,015 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:35,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:35,478 INFO L256 TraceCheckUtils]: 0: Hoare triple {11688#true} call ULTIMATE.init(); {11688#true} is VALID [2018-11-23 12:12:35,478 INFO L273 TraceCheckUtils]: 1: Hoare triple {11688#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {11688#true} is VALID [2018-11-23 12:12:35,479 INFO L273 TraceCheckUtils]: 2: Hoare triple {11688#true} assume true; {11688#true} is VALID [2018-11-23 12:12:35,479 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {11688#true} {11688#true} #59#return; {11688#true} is VALID [2018-11-23 12:12:35,479 INFO L256 TraceCheckUtils]: 4: Hoare triple {11688#true} call #t~ret4 := main(); {11688#true} is VALID [2018-11-23 12:12:35,498 INFO L273 TraceCheckUtils]: 5: Hoare triple {11688#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {11690#(= main_~i~0 0)} is VALID [2018-11-23 12:12:35,501 INFO L273 TraceCheckUtils]: 6: Hoare triple {11690#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11690#(= main_~i~0 0)} is VALID [2018-11-23 12:12:35,502 INFO L273 TraceCheckUtils]: 7: Hoare triple {11690#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11690#(= main_~i~0 0)} is VALID [2018-11-23 12:12:35,502 INFO L273 TraceCheckUtils]: 8: Hoare triple {11690#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {11691#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:35,502 INFO L273 TraceCheckUtils]: 9: Hoare triple {11691#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11691#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:35,503 INFO L273 TraceCheckUtils]: 10: Hoare triple {11691#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11691#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:35,503 INFO L273 TraceCheckUtils]: 11: Hoare triple {11691#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {11692#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:35,503 INFO L273 TraceCheckUtils]: 12: Hoare triple {11692#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11692#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:35,504 INFO L273 TraceCheckUtils]: 13: Hoare triple {11692#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11692#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:35,504 INFO L273 TraceCheckUtils]: 14: Hoare triple {11692#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {11693#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:35,504 INFO L273 TraceCheckUtils]: 15: Hoare triple {11693#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11693#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:35,505 INFO L273 TraceCheckUtils]: 16: Hoare triple {11693#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11693#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:35,506 INFO L273 TraceCheckUtils]: 17: Hoare triple {11693#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {11694#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:35,506 INFO L273 TraceCheckUtils]: 18: Hoare triple {11694#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11694#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:35,507 INFO L273 TraceCheckUtils]: 19: Hoare triple {11694#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11694#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:35,507 INFO L273 TraceCheckUtils]: 20: Hoare triple {11694#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {11695#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:35,508 INFO L273 TraceCheckUtils]: 21: Hoare triple {11695#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11695#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:35,508 INFO L273 TraceCheckUtils]: 22: Hoare triple {11695#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11695#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:35,509 INFO L273 TraceCheckUtils]: 23: Hoare triple {11695#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {11696#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:35,510 INFO L273 TraceCheckUtils]: 24: Hoare triple {11696#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11696#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:35,510 INFO L273 TraceCheckUtils]: 25: Hoare triple {11696#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11696#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:35,511 INFO L273 TraceCheckUtils]: 26: Hoare triple {11696#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {11697#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:35,512 INFO L273 TraceCheckUtils]: 27: Hoare triple {11697#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11697#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:35,512 INFO L273 TraceCheckUtils]: 28: Hoare triple {11697#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11697#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:35,513 INFO L273 TraceCheckUtils]: 29: Hoare triple {11697#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {11698#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:35,513 INFO L273 TraceCheckUtils]: 30: Hoare triple {11698#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11698#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:35,514 INFO L273 TraceCheckUtils]: 31: Hoare triple {11698#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11698#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:35,515 INFO L273 TraceCheckUtils]: 32: Hoare triple {11698#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {11699#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:35,515 INFO L273 TraceCheckUtils]: 33: Hoare triple {11699#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11699#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:35,516 INFO L273 TraceCheckUtils]: 34: Hoare triple {11699#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11699#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:35,516 INFO L273 TraceCheckUtils]: 35: Hoare triple {11699#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {11700#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:35,517 INFO L273 TraceCheckUtils]: 36: Hoare triple {11700#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11700#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:35,517 INFO L273 TraceCheckUtils]: 37: Hoare triple {11700#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11700#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:35,518 INFO L273 TraceCheckUtils]: 38: Hoare triple {11700#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {11701#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:35,519 INFO L273 TraceCheckUtils]: 39: Hoare triple {11701#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11701#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:35,519 INFO L273 TraceCheckUtils]: 40: Hoare triple {11701#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11701#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:35,520 INFO L273 TraceCheckUtils]: 41: Hoare triple {11701#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {11702#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:35,520 INFO L273 TraceCheckUtils]: 42: Hoare triple {11702#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11702#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:35,521 INFO L273 TraceCheckUtils]: 43: Hoare triple {11702#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11702#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:35,522 INFO L273 TraceCheckUtils]: 44: Hoare triple {11702#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {11703#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:35,522 INFO L273 TraceCheckUtils]: 45: Hoare triple {11703#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11703#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:35,523 INFO L273 TraceCheckUtils]: 46: Hoare triple {11703#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11703#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:35,523 INFO L273 TraceCheckUtils]: 47: Hoare triple {11703#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {11704#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:35,524 INFO L273 TraceCheckUtils]: 48: Hoare triple {11704#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11704#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:35,525 INFO L273 TraceCheckUtils]: 49: Hoare triple {11704#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11704#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:35,525 INFO L273 TraceCheckUtils]: 50: Hoare triple {11704#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {11705#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:35,526 INFO L273 TraceCheckUtils]: 51: Hoare triple {11705#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11705#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:35,526 INFO L273 TraceCheckUtils]: 52: Hoare triple {11705#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11705#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:35,527 INFO L273 TraceCheckUtils]: 53: Hoare triple {11705#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {11706#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:35,528 INFO L273 TraceCheckUtils]: 54: Hoare triple {11706#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11706#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:35,528 INFO L273 TraceCheckUtils]: 55: Hoare triple {11706#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11706#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:35,529 INFO L273 TraceCheckUtils]: 56: Hoare triple {11706#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {11707#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:35,529 INFO L273 TraceCheckUtils]: 57: Hoare triple {11707#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11707#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:35,530 INFO L273 TraceCheckUtils]: 58: Hoare triple {11707#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11707#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:35,531 INFO L273 TraceCheckUtils]: 59: Hoare triple {11707#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {11708#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:35,531 INFO L273 TraceCheckUtils]: 60: Hoare triple {11708#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11708#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:35,532 INFO L273 TraceCheckUtils]: 61: Hoare triple {11708#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11708#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:35,532 INFO L273 TraceCheckUtils]: 62: Hoare triple {11708#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {11709#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:35,533 INFO L273 TraceCheckUtils]: 63: Hoare triple {11709#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11709#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:35,533 INFO L273 TraceCheckUtils]: 64: Hoare triple {11709#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11709#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:35,534 INFO L273 TraceCheckUtils]: 65: Hoare triple {11709#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {11710#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:35,535 INFO L273 TraceCheckUtils]: 66: Hoare triple {11710#(<= main_~i~0 40)} assume !(~i~0 < 100000); {11689#false} is VALID [2018-11-23 12:12:35,535 INFO L273 TraceCheckUtils]: 67: Hoare triple {11689#false} ~i~0 := 0; {11689#false} is VALID [2018-11-23 12:12:35,535 INFO L273 TraceCheckUtils]: 68: Hoare triple {11689#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11689#false} is VALID [2018-11-23 12:12:35,535 INFO L273 TraceCheckUtils]: 69: Hoare triple {11689#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11689#false} is VALID [2018-11-23 12:12:35,536 INFO L256 TraceCheckUtils]: 70: Hoare triple {11689#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {11689#false} is VALID [2018-11-23 12:12:35,536 INFO L273 TraceCheckUtils]: 71: Hoare triple {11689#false} ~cond := #in~cond; {11689#false} is VALID [2018-11-23 12:12:35,536 INFO L273 TraceCheckUtils]: 72: Hoare triple {11689#false} assume 0 == ~cond; {11689#false} is VALID [2018-11-23 12:12:35,536 INFO L273 TraceCheckUtils]: 73: Hoare triple {11689#false} assume !false; {11689#false} is VALID [2018-11-23 12:12:35,541 INFO L134 CoverageAnalysis]: Checked inductivity of 590 backedges. 0 proven. 590 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:35,541 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:12:35,541 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:12:35,550 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 12:12:35,604 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 12:12:35,605 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:12:35,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:35,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:12:35,774 INFO L256 TraceCheckUtils]: 0: Hoare triple {11688#true} call ULTIMATE.init(); {11688#true} is VALID [2018-11-23 12:12:35,774 INFO L273 TraceCheckUtils]: 1: Hoare triple {11688#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {11688#true} is VALID [2018-11-23 12:12:35,774 INFO L273 TraceCheckUtils]: 2: Hoare triple {11688#true} assume true; {11688#true} is VALID [2018-11-23 12:12:35,775 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {11688#true} {11688#true} #59#return; {11688#true} is VALID [2018-11-23 12:12:35,775 INFO L256 TraceCheckUtils]: 4: Hoare triple {11688#true} call #t~ret4 := main(); {11688#true} is VALID [2018-11-23 12:12:35,776 INFO L273 TraceCheckUtils]: 5: Hoare triple {11688#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {11729#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:35,776 INFO L273 TraceCheckUtils]: 6: Hoare triple {11729#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11729#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:35,777 INFO L273 TraceCheckUtils]: 7: Hoare triple {11729#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11729#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:35,777 INFO L273 TraceCheckUtils]: 8: Hoare triple {11729#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {11691#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:35,777 INFO L273 TraceCheckUtils]: 9: Hoare triple {11691#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11691#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:35,778 INFO L273 TraceCheckUtils]: 10: Hoare triple {11691#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11691#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:35,778 INFO L273 TraceCheckUtils]: 11: Hoare triple {11691#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {11692#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:35,779 INFO L273 TraceCheckUtils]: 12: Hoare triple {11692#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11692#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:35,779 INFO L273 TraceCheckUtils]: 13: Hoare triple {11692#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11692#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:35,780 INFO L273 TraceCheckUtils]: 14: Hoare triple {11692#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {11693#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:35,780 INFO L273 TraceCheckUtils]: 15: Hoare triple {11693#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11693#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:35,781 INFO L273 TraceCheckUtils]: 16: Hoare triple {11693#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11693#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:35,782 INFO L273 TraceCheckUtils]: 17: Hoare triple {11693#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {11694#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:35,782 INFO L273 TraceCheckUtils]: 18: Hoare triple {11694#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11694#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:35,783 INFO L273 TraceCheckUtils]: 19: Hoare triple {11694#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11694#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:35,783 INFO L273 TraceCheckUtils]: 20: Hoare triple {11694#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {11695#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:35,784 INFO L273 TraceCheckUtils]: 21: Hoare triple {11695#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11695#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:35,784 INFO L273 TraceCheckUtils]: 22: Hoare triple {11695#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11695#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:35,785 INFO L273 TraceCheckUtils]: 23: Hoare triple {11695#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {11696#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:35,786 INFO L273 TraceCheckUtils]: 24: Hoare triple {11696#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11696#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:35,786 INFO L273 TraceCheckUtils]: 25: Hoare triple {11696#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11696#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:35,787 INFO L273 TraceCheckUtils]: 26: Hoare triple {11696#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {11697#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:35,787 INFO L273 TraceCheckUtils]: 27: Hoare triple {11697#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11697#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:35,788 INFO L273 TraceCheckUtils]: 28: Hoare triple {11697#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11697#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:35,789 INFO L273 TraceCheckUtils]: 29: Hoare triple {11697#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {11698#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:35,789 INFO L273 TraceCheckUtils]: 30: Hoare triple {11698#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11698#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:35,790 INFO L273 TraceCheckUtils]: 31: Hoare triple {11698#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11698#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:35,791 INFO L273 TraceCheckUtils]: 32: Hoare triple {11698#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {11699#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:35,791 INFO L273 TraceCheckUtils]: 33: Hoare triple {11699#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11699#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:35,792 INFO L273 TraceCheckUtils]: 34: Hoare triple {11699#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11699#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:35,792 INFO L273 TraceCheckUtils]: 35: Hoare triple {11699#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {11700#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:35,793 INFO L273 TraceCheckUtils]: 36: Hoare triple {11700#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11700#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:35,793 INFO L273 TraceCheckUtils]: 37: Hoare triple {11700#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11700#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:35,794 INFO L273 TraceCheckUtils]: 38: Hoare triple {11700#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {11701#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:35,795 INFO L273 TraceCheckUtils]: 39: Hoare triple {11701#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11701#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:35,795 INFO L273 TraceCheckUtils]: 40: Hoare triple {11701#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11701#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:35,796 INFO L273 TraceCheckUtils]: 41: Hoare triple {11701#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {11702#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:35,796 INFO L273 TraceCheckUtils]: 42: Hoare triple {11702#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11702#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:35,797 INFO L273 TraceCheckUtils]: 43: Hoare triple {11702#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11702#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:35,798 INFO L273 TraceCheckUtils]: 44: Hoare triple {11702#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {11703#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:35,798 INFO L273 TraceCheckUtils]: 45: Hoare triple {11703#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11703#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:35,799 INFO L273 TraceCheckUtils]: 46: Hoare triple {11703#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11703#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:35,799 INFO L273 TraceCheckUtils]: 47: Hoare triple {11703#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {11704#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:35,800 INFO L273 TraceCheckUtils]: 48: Hoare triple {11704#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11704#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:35,800 INFO L273 TraceCheckUtils]: 49: Hoare triple {11704#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11704#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:35,801 INFO L273 TraceCheckUtils]: 50: Hoare triple {11704#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {11705#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:35,802 INFO L273 TraceCheckUtils]: 51: Hoare triple {11705#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11705#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:35,802 INFO L273 TraceCheckUtils]: 52: Hoare triple {11705#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11705#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:35,803 INFO L273 TraceCheckUtils]: 53: Hoare triple {11705#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {11706#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:35,803 INFO L273 TraceCheckUtils]: 54: Hoare triple {11706#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11706#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:35,804 INFO L273 TraceCheckUtils]: 55: Hoare triple {11706#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11706#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:35,805 INFO L273 TraceCheckUtils]: 56: Hoare triple {11706#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {11707#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:35,805 INFO L273 TraceCheckUtils]: 57: Hoare triple {11707#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11707#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:35,806 INFO L273 TraceCheckUtils]: 58: Hoare triple {11707#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11707#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:35,806 INFO L273 TraceCheckUtils]: 59: Hoare triple {11707#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {11708#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:35,807 INFO L273 TraceCheckUtils]: 60: Hoare triple {11708#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11708#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:35,808 INFO L273 TraceCheckUtils]: 61: Hoare triple {11708#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11708#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:35,808 INFO L273 TraceCheckUtils]: 62: Hoare triple {11708#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {11709#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:35,809 INFO L273 TraceCheckUtils]: 63: Hoare triple {11709#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11709#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:35,809 INFO L273 TraceCheckUtils]: 64: Hoare triple {11709#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11709#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:35,810 INFO L273 TraceCheckUtils]: 65: Hoare triple {11709#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {11710#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:35,811 INFO L273 TraceCheckUtils]: 66: Hoare triple {11710#(<= main_~i~0 40)} assume !(~i~0 < 100000); {11689#false} is VALID [2018-11-23 12:12:35,811 INFO L273 TraceCheckUtils]: 67: Hoare triple {11689#false} ~i~0 := 0; {11689#false} is VALID [2018-11-23 12:12:35,811 INFO L273 TraceCheckUtils]: 68: Hoare triple {11689#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {11689#false} is VALID [2018-11-23 12:12:35,811 INFO L273 TraceCheckUtils]: 69: Hoare triple {11689#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {11689#false} is VALID [2018-11-23 12:12:35,811 INFO L256 TraceCheckUtils]: 70: Hoare triple {11689#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {11689#false} is VALID [2018-11-23 12:12:35,812 INFO L273 TraceCheckUtils]: 71: Hoare triple {11689#false} ~cond := #in~cond; {11689#false} is VALID [2018-11-23 12:12:35,812 INFO L273 TraceCheckUtils]: 72: Hoare triple {11689#false} assume 0 == ~cond; {11689#false} is VALID [2018-11-23 12:12:35,812 INFO L273 TraceCheckUtils]: 73: Hoare triple {11689#false} assume !false; {11689#false} is VALID [2018-11-23 12:12:35,818 INFO L134 CoverageAnalysis]: Checked inductivity of 590 backedges. 0 proven. 590 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:35,837 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:12:35,837 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 24 [2018-11-23 12:12:35,837 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-11-23 12:12:35,838 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:12:35,838 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 12:12:35,939 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:35,939 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 12:12:35,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 12:12:35,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-11-23 12:12:35,940 INFO L87 Difference]: Start difference. First operand 79 states and 101 transitions. Second operand 24 states. [2018-11-23 12:12:37,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:37,353 INFO L93 Difference]: Finished difference Result 201 states and 269 transitions. [2018-11-23 12:12:37,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 12:12:37,354 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-11-23 12:12:37,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:12:37,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 12:12:37,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 269 transitions. [2018-11-23 12:12:37,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 12:12:37,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 269 transitions. [2018-11-23 12:12:37,361 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 269 transitions. [2018-11-23 12:12:37,670 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 269 edges. 269 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:37,675 INFO L225 Difference]: With dead ends: 201 [2018-11-23 12:12:37,675 INFO L226 Difference]: Without dead ends: 189 [2018-11-23 12:12:37,675 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-11-23 12:12:37,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-11-23 12:12:37,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 82. [2018-11-23 12:12:37,722 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:12:37,722 INFO L82 GeneralOperation]: Start isEquivalent. First operand 189 states. Second operand 82 states. [2018-11-23 12:12:37,722 INFO L74 IsIncluded]: Start isIncluded. First operand 189 states. Second operand 82 states. [2018-11-23 12:12:37,723 INFO L87 Difference]: Start difference. First operand 189 states. Second operand 82 states. [2018-11-23 12:12:37,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:37,728 INFO L93 Difference]: Finished difference Result 189 states and 255 transitions. [2018-11-23 12:12:37,728 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 255 transitions. [2018-11-23 12:12:37,729 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:37,729 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:37,729 INFO L74 IsIncluded]: Start isIncluded. First operand 82 states. Second operand 189 states. [2018-11-23 12:12:37,729 INFO L87 Difference]: Start difference. First operand 82 states. Second operand 189 states. [2018-11-23 12:12:37,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:37,733 INFO L93 Difference]: Finished difference Result 189 states and 255 transitions. [2018-11-23 12:12:37,733 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 255 transitions. [2018-11-23 12:12:37,733 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:37,734 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:37,734 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:12:37,734 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:12:37,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-11-23 12:12:37,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 105 transitions. [2018-11-23 12:12:37,735 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 105 transitions. Word has length 74 [2018-11-23 12:12:37,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:12:37,736 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 105 transitions. [2018-11-23 12:12:37,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 12:12:37,736 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 105 transitions. [2018-11-23 12:12:37,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-23 12:12:37,737 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:12:37,737 INFO L402 BasicCegarLoop]: trace histogram [21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:12:37,737 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:12:37,737 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:12:37,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1065848246, now seen corresponding path program 21 times [2018-11-23 12:12:37,738 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:12:37,738 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:12:37,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:37,739 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:12:37,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:37,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:38,196 INFO L256 TraceCheckUtils]: 0: Hoare triple {12697#true} call ULTIMATE.init(); {12697#true} is VALID [2018-11-23 12:12:38,197 INFO L273 TraceCheckUtils]: 1: Hoare triple {12697#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {12697#true} is VALID [2018-11-23 12:12:38,197 INFO L273 TraceCheckUtils]: 2: Hoare triple {12697#true} assume true; {12697#true} is VALID [2018-11-23 12:12:38,197 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {12697#true} {12697#true} #59#return; {12697#true} is VALID [2018-11-23 12:12:38,197 INFO L256 TraceCheckUtils]: 4: Hoare triple {12697#true} call #t~ret4 := main(); {12697#true} is VALID [2018-11-23 12:12:38,198 INFO L273 TraceCheckUtils]: 5: Hoare triple {12697#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {12699#(= main_~i~0 0)} is VALID [2018-11-23 12:12:38,198 INFO L273 TraceCheckUtils]: 6: Hoare triple {12699#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12699#(= main_~i~0 0)} is VALID [2018-11-23 12:12:38,199 INFO L273 TraceCheckUtils]: 7: Hoare triple {12699#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12699#(= main_~i~0 0)} is VALID [2018-11-23 12:12:38,199 INFO L273 TraceCheckUtils]: 8: Hoare triple {12699#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {12700#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:38,199 INFO L273 TraceCheckUtils]: 9: Hoare triple {12700#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12700#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:38,200 INFO L273 TraceCheckUtils]: 10: Hoare triple {12700#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12700#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:38,200 INFO L273 TraceCheckUtils]: 11: Hoare triple {12700#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {12701#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:38,201 INFO L273 TraceCheckUtils]: 12: Hoare triple {12701#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12701#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:38,201 INFO L273 TraceCheckUtils]: 13: Hoare triple {12701#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12701#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:38,202 INFO L273 TraceCheckUtils]: 14: Hoare triple {12701#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {12702#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:38,202 INFO L273 TraceCheckUtils]: 15: Hoare triple {12702#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12702#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:38,203 INFO L273 TraceCheckUtils]: 16: Hoare triple {12702#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12702#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:38,203 INFO L273 TraceCheckUtils]: 17: Hoare triple {12702#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {12703#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:38,204 INFO L273 TraceCheckUtils]: 18: Hoare triple {12703#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12703#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:38,205 INFO L273 TraceCheckUtils]: 19: Hoare triple {12703#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12703#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:38,205 INFO L273 TraceCheckUtils]: 20: Hoare triple {12703#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {12704#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:38,206 INFO L273 TraceCheckUtils]: 21: Hoare triple {12704#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12704#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:38,206 INFO L273 TraceCheckUtils]: 22: Hoare triple {12704#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12704#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:38,207 INFO L273 TraceCheckUtils]: 23: Hoare triple {12704#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {12705#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:38,208 INFO L273 TraceCheckUtils]: 24: Hoare triple {12705#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12705#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:38,208 INFO L273 TraceCheckUtils]: 25: Hoare triple {12705#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12705#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:38,209 INFO L273 TraceCheckUtils]: 26: Hoare triple {12705#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {12706#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:38,209 INFO L273 TraceCheckUtils]: 27: Hoare triple {12706#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12706#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:38,210 INFO L273 TraceCheckUtils]: 28: Hoare triple {12706#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12706#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:38,211 INFO L273 TraceCheckUtils]: 29: Hoare triple {12706#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {12707#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:38,211 INFO L273 TraceCheckUtils]: 30: Hoare triple {12707#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12707#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:38,212 INFO L273 TraceCheckUtils]: 31: Hoare triple {12707#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12707#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:38,212 INFO L273 TraceCheckUtils]: 32: Hoare triple {12707#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {12708#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:38,213 INFO L273 TraceCheckUtils]: 33: Hoare triple {12708#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12708#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:38,213 INFO L273 TraceCheckUtils]: 34: Hoare triple {12708#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12708#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:38,214 INFO L273 TraceCheckUtils]: 35: Hoare triple {12708#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {12709#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:38,215 INFO L273 TraceCheckUtils]: 36: Hoare triple {12709#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12709#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:38,215 INFO L273 TraceCheckUtils]: 37: Hoare triple {12709#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12709#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:38,216 INFO L273 TraceCheckUtils]: 38: Hoare triple {12709#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {12710#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:38,216 INFO L273 TraceCheckUtils]: 39: Hoare triple {12710#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12710#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:38,217 INFO L273 TraceCheckUtils]: 40: Hoare triple {12710#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12710#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:38,218 INFO L273 TraceCheckUtils]: 41: Hoare triple {12710#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {12711#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:38,218 INFO L273 TraceCheckUtils]: 42: Hoare triple {12711#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12711#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:38,219 INFO L273 TraceCheckUtils]: 43: Hoare triple {12711#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12711#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:38,220 INFO L273 TraceCheckUtils]: 44: Hoare triple {12711#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {12712#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:38,220 INFO L273 TraceCheckUtils]: 45: Hoare triple {12712#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12712#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:38,221 INFO L273 TraceCheckUtils]: 46: Hoare triple {12712#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12712#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:38,221 INFO L273 TraceCheckUtils]: 47: Hoare triple {12712#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {12713#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:38,222 INFO L273 TraceCheckUtils]: 48: Hoare triple {12713#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12713#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:38,222 INFO L273 TraceCheckUtils]: 49: Hoare triple {12713#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12713#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:38,223 INFO L273 TraceCheckUtils]: 50: Hoare triple {12713#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {12714#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:38,224 INFO L273 TraceCheckUtils]: 51: Hoare triple {12714#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12714#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:38,224 INFO L273 TraceCheckUtils]: 52: Hoare triple {12714#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12714#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:38,225 INFO L273 TraceCheckUtils]: 53: Hoare triple {12714#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {12715#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:38,225 INFO L273 TraceCheckUtils]: 54: Hoare triple {12715#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12715#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:38,226 INFO L273 TraceCheckUtils]: 55: Hoare triple {12715#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12715#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:38,227 INFO L273 TraceCheckUtils]: 56: Hoare triple {12715#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {12716#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:38,227 INFO L273 TraceCheckUtils]: 57: Hoare triple {12716#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12716#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:38,228 INFO L273 TraceCheckUtils]: 58: Hoare triple {12716#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12716#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:38,228 INFO L273 TraceCheckUtils]: 59: Hoare triple {12716#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {12717#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:38,229 INFO L273 TraceCheckUtils]: 60: Hoare triple {12717#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12717#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:38,229 INFO L273 TraceCheckUtils]: 61: Hoare triple {12717#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12717#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:38,230 INFO L273 TraceCheckUtils]: 62: Hoare triple {12717#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {12718#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:38,231 INFO L273 TraceCheckUtils]: 63: Hoare triple {12718#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12718#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:38,231 INFO L273 TraceCheckUtils]: 64: Hoare triple {12718#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12718#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:38,232 INFO L273 TraceCheckUtils]: 65: Hoare triple {12718#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {12719#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:38,233 INFO L273 TraceCheckUtils]: 66: Hoare triple {12719#(<= main_~i~0 40)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12719#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:38,233 INFO L273 TraceCheckUtils]: 67: Hoare triple {12719#(<= main_~i~0 40)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12719#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:38,234 INFO L273 TraceCheckUtils]: 68: Hoare triple {12719#(<= main_~i~0 40)} ~i~0 := 2 + ~i~0; {12720#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:38,234 INFO L273 TraceCheckUtils]: 69: Hoare triple {12720#(<= main_~i~0 42)} assume !(~i~0 < 100000); {12698#false} is VALID [2018-11-23 12:12:38,235 INFO L273 TraceCheckUtils]: 70: Hoare triple {12698#false} ~i~0 := 0; {12698#false} is VALID [2018-11-23 12:12:38,235 INFO L273 TraceCheckUtils]: 71: Hoare triple {12698#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12698#false} is VALID [2018-11-23 12:12:38,235 INFO L273 TraceCheckUtils]: 72: Hoare triple {12698#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12698#false} is VALID [2018-11-23 12:12:38,235 INFO L256 TraceCheckUtils]: 73: Hoare triple {12698#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {12698#false} is VALID [2018-11-23 12:12:38,235 INFO L273 TraceCheckUtils]: 74: Hoare triple {12698#false} ~cond := #in~cond; {12698#false} is VALID [2018-11-23 12:12:38,236 INFO L273 TraceCheckUtils]: 75: Hoare triple {12698#false} assume 0 == ~cond; {12698#false} is VALID [2018-11-23 12:12:38,236 INFO L273 TraceCheckUtils]: 76: Hoare triple {12698#false} assume !false; {12698#false} is VALID [2018-11-23 12:12:38,241 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 0 proven. 651 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:38,241 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:12:38,241 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:12:38,250 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 12:12:52,772 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-11-23 12:12:52,772 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:12:52,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:52,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:12:52,990 INFO L256 TraceCheckUtils]: 0: Hoare triple {12697#true} call ULTIMATE.init(); {12697#true} is VALID [2018-11-23 12:12:52,990 INFO L273 TraceCheckUtils]: 1: Hoare triple {12697#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {12697#true} is VALID [2018-11-23 12:12:52,990 INFO L273 TraceCheckUtils]: 2: Hoare triple {12697#true} assume true; {12697#true} is VALID [2018-11-23 12:12:52,990 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {12697#true} {12697#true} #59#return; {12697#true} is VALID [2018-11-23 12:12:52,991 INFO L256 TraceCheckUtils]: 4: Hoare triple {12697#true} call #t~ret4 := main(); {12697#true} is VALID [2018-11-23 12:12:52,992 INFO L273 TraceCheckUtils]: 5: Hoare triple {12697#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {12739#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:52,992 INFO L273 TraceCheckUtils]: 6: Hoare triple {12739#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12739#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:52,993 INFO L273 TraceCheckUtils]: 7: Hoare triple {12739#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12739#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:52,993 INFO L273 TraceCheckUtils]: 8: Hoare triple {12739#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {12700#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:52,993 INFO L273 TraceCheckUtils]: 9: Hoare triple {12700#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12700#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:52,994 INFO L273 TraceCheckUtils]: 10: Hoare triple {12700#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12700#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:52,994 INFO L273 TraceCheckUtils]: 11: Hoare triple {12700#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {12701#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:52,995 INFO L273 TraceCheckUtils]: 12: Hoare triple {12701#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12701#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:52,995 INFO L273 TraceCheckUtils]: 13: Hoare triple {12701#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12701#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:52,996 INFO L273 TraceCheckUtils]: 14: Hoare triple {12701#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {12702#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:52,996 INFO L273 TraceCheckUtils]: 15: Hoare triple {12702#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12702#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:52,997 INFO L273 TraceCheckUtils]: 16: Hoare triple {12702#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12702#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:52,998 INFO L273 TraceCheckUtils]: 17: Hoare triple {12702#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {12703#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:52,998 INFO L273 TraceCheckUtils]: 18: Hoare triple {12703#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12703#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:52,999 INFO L273 TraceCheckUtils]: 19: Hoare triple {12703#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12703#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:52,999 INFO L273 TraceCheckUtils]: 20: Hoare triple {12703#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {12704#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:53,000 INFO L273 TraceCheckUtils]: 21: Hoare triple {12704#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12704#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:53,000 INFO L273 TraceCheckUtils]: 22: Hoare triple {12704#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12704#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:53,001 INFO L273 TraceCheckUtils]: 23: Hoare triple {12704#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {12705#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:53,002 INFO L273 TraceCheckUtils]: 24: Hoare triple {12705#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12705#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:53,002 INFO L273 TraceCheckUtils]: 25: Hoare triple {12705#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12705#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:53,003 INFO L273 TraceCheckUtils]: 26: Hoare triple {12705#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {12706#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:53,004 INFO L273 TraceCheckUtils]: 27: Hoare triple {12706#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12706#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:53,004 INFO L273 TraceCheckUtils]: 28: Hoare triple {12706#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12706#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:53,005 INFO L273 TraceCheckUtils]: 29: Hoare triple {12706#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {12707#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:53,005 INFO L273 TraceCheckUtils]: 30: Hoare triple {12707#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12707#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:53,006 INFO L273 TraceCheckUtils]: 31: Hoare triple {12707#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12707#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:53,007 INFO L273 TraceCheckUtils]: 32: Hoare triple {12707#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {12708#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:53,007 INFO L273 TraceCheckUtils]: 33: Hoare triple {12708#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12708#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:53,008 INFO L273 TraceCheckUtils]: 34: Hoare triple {12708#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12708#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:53,008 INFO L273 TraceCheckUtils]: 35: Hoare triple {12708#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {12709#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:53,009 INFO L273 TraceCheckUtils]: 36: Hoare triple {12709#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12709#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:53,009 INFO L273 TraceCheckUtils]: 37: Hoare triple {12709#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12709#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:53,010 INFO L273 TraceCheckUtils]: 38: Hoare triple {12709#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {12710#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:53,011 INFO L273 TraceCheckUtils]: 39: Hoare triple {12710#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12710#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:53,011 INFO L273 TraceCheckUtils]: 40: Hoare triple {12710#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12710#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:53,012 INFO L273 TraceCheckUtils]: 41: Hoare triple {12710#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {12711#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:53,012 INFO L273 TraceCheckUtils]: 42: Hoare triple {12711#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12711#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:53,013 INFO L273 TraceCheckUtils]: 43: Hoare triple {12711#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12711#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:53,014 INFO L273 TraceCheckUtils]: 44: Hoare triple {12711#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {12712#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:53,014 INFO L273 TraceCheckUtils]: 45: Hoare triple {12712#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12712#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:53,015 INFO L273 TraceCheckUtils]: 46: Hoare triple {12712#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12712#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:53,015 INFO L273 TraceCheckUtils]: 47: Hoare triple {12712#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {12713#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:53,016 INFO L273 TraceCheckUtils]: 48: Hoare triple {12713#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12713#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:53,017 INFO L273 TraceCheckUtils]: 49: Hoare triple {12713#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12713#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:53,017 INFO L273 TraceCheckUtils]: 50: Hoare triple {12713#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {12714#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:53,018 INFO L273 TraceCheckUtils]: 51: Hoare triple {12714#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12714#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:53,018 INFO L273 TraceCheckUtils]: 52: Hoare triple {12714#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12714#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:53,019 INFO L273 TraceCheckUtils]: 53: Hoare triple {12714#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {12715#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:53,020 INFO L273 TraceCheckUtils]: 54: Hoare triple {12715#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12715#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:53,020 INFO L273 TraceCheckUtils]: 55: Hoare triple {12715#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12715#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:53,021 INFO L273 TraceCheckUtils]: 56: Hoare triple {12715#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {12716#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:53,021 INFO L273 TraceCheckUtils]: 57: Hoare triple {12716#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12716#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:53,022 INFO L273 TraceCheckUtils]: 58: Hoare triple {12716#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12716#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:53,023 INFO L273 TraceCheckUtils]: 59: Hoare triple {12716#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {12717#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:53,023 INFO L273 TraceCheckUtils]: 60: Hoare triple {12717#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12717#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:53,024 INFO L273 TraceCheckUtils]: 61: Hoare triple {12717#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12717#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:53,024 INFO L273 TraceCheckUtils]: 62: Hoare triple {12717#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {12718#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:53,025 INFO L273 TraceCheckUtils]: 63: Hoare triple {12718#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12718#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:53,025 INFO L273 TraceCheckUtils]: 64: Hoare triple {12718#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12718#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:53,026 INFO L273 TraceCheckUtils]: 65: Hoare triple {12718#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {12719#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:53,027 INFO L273 TraceCheckUtils]: 66: Hoare triple {12719#(<= main_~i~0 40)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12719#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:53,027 INFO L273 TraceCheckUtils]: 67: Hoare triple {12719#(<= main_~i~0 40)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12719#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:53,028 INFO L273 TraceCheckUtils]: 68: Hoare triple {12719#(<= main_~i~0 40)} ~i~0 := 2 + ~i~0; {12720#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:53,029 INFO L273 TraceCheckUtils]: 69: Hoare triple {12720#(<= main_~i~0 42)} assume !(~i~0 < 100000); {12698#false} is VALID [2018-11-23 12:12:53,029 INFO L273 TraceCheckUtils]: 70: Hoare triple {12698#false} ~i~0 := 0; {12698#false} is VALID [2018-11-23 12:12:53,029 INFO L273 TraceCheckUtils]: 71: Hoare triple {12698#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {12698#false} is VALID [2018-11-23 12:12:53,029 INFO L273 TraceCheckUtils]: 72: Hoare triple {12698#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {12698#false} is VALID [2018-11-23 12:12:53,029 INFO L256 TraceCheckUtils]: 73: Hoare triple {12698#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {12698#false} is VALID [2018-11-23 12:12:53,030 INFO L273 TraceCheckUtils]: 74: Hoare triple {12698#false} ~cond := #in~cond; {12698#false} is VALID [2018-11-23 12:12:53,030 INFO L273 TraceCheckUtils]: 75: Hoare triple {12698#false} assume 0 == ~cond; {12698#false} is VALID [2018-11-23 12:12:53,030 INFO L273 TraceCheckUtils]: 76: Hoare triple {12698#false} assume !false; {12698#false} is VALID [2018-11-23 12:12:53,036 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 0 proven. 651 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:53,058 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:12:53,058 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 25 [2018-11-23 12:12:53,059 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 77 [2018-11-23 12:12:53,059 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:12:53,059 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states. [2018-11-23 12:12:53,140 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:53,141 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-23 12:12:53,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-23 12:12:53,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-11-23 12:12:53,142 INFO L87 Difference]: Start difference. First operand 82 states and 105 transitions. Second operand 25 states. [2018-11-23 12:12:54,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:54,417 INFO L93 Difference]: Finished difference Result 209 states and 280 transitions. [2018-11-23 12:12:54,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 12:12:54,417 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 77 [2018-11-23 12:12:54,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:12:54,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 12:12:54,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 280 transitions. [2018-11-23 12:12:54,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 12:12:54,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 280 transitions. [2018-11-23 12:12:54,422 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 280 transitions. [2018-11-23 12:12:54,690 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 280 edges. 280 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:54,694 INFO L225 Difference]: With dead ends: 209 [2018-11-23 12:12:54,694 INFO L226 Difference]: Without dead ends: 197 [2018-11-23 12:12:54,695 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-11-23 12:12:54,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-11-23 12:12:54,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 85. [2018-11-23 12:12:54,736 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:12:54,736 INFO L82 GeneralOperation]: Start isEquivalent. First operand 197 states. Second operand 85 states. [2018-11-23 12:12:54,736 INFO L74 IsIncluded]: Start isIncluded. First operand 197 states. Second operand 85 states. [2018-11-23 12:12:54,736 INFO L87 Difference]: Start difference. First operand 197 states. Second operand 85 states. [2018-11-23 12:12:54,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:54,741 INFO L93 Difference]: Finished difference Result 197 states and 266 transitions. [2018-11-23 12:12:54,741 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 266 transitions. [2018-11-23 12:12:54,741 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:54,742 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:54,742 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand 197 states. [2018-11-23 12:12:54,742 INFO L87 Difference]: Start difference. First operand 85 states. Second operand 197 states. [2018-11-23 12:12:54,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:54,746 INFO L93 Difference]: Finished difference Result 197 states and 266 transitions. [2018-11-23 12:12:54,747 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 266 transitions. [2018-11-23 12:12:54,747 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:54,747 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:54,747 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:12:54,748 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:12:54,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-11-23 12:12:54,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 109 transitions. [2018-11-23 12:12:54,749 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 109 transitions. Word has length 77 [2018-11-23 12:12:54,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:12:54,749 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 109 transitions. [2018-11-23 12:12:54,749 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-23 12:12:54,749 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2018-11-23 12:12:54,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-23 12:12:54,750 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:12:54,750 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:12:54,750 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:12:54,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:12:54,751 INFO L82 PathProgramCache]: Analyzing trace with hash -485176851, now seen corresponding path program 22 times [2018-11-23 12:12:54,751 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:12:54,751 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:12:54,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:54,752 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:12:54,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:54,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:56,469 INFO L256 TraceCheckUtils]: 0: Hoare triple {13747#true} call ULTIMATE.init(); {13747#true} is VALID [2018-11-23 12:12:56,470 INFO L273 TraceCheckUtils]: 1: Hoare triple {13747#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {13747#true} is VALID [2018-11-23 12:12:56,470 INFO L273 TraceCheckUtils]: 2: Hoare triple {13747#true} assume true; {13747#true} is VALID [2018-11-23 12:12:56,470 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {13747#true} {13747#true} #59#return; {13747#true} is VALID [2018-11-23 12:12:56,470 INFO L256 TraceCheckUtils]: 4: Hoare triple {13747#true} call #t~ret4 := main(); {13747#true} is VALID [2018-11-23 12:12:56,471 INFO L273 TraceCheckUtils]: 5: Hoare triple {13747#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {13749#(= main_~i~0 0)} is VALID [2018-11-23 12:12:56,471 INFO L273 TraceCheckUtils]: 6: Hoare triple {13749#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13749#(= main_~i~0 0)} is VALID [2018-11-23 12:12:56,472 INFO L273 TraceCheckUtils]: 7: Hoare triple {13749#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13749#(= main_~i~0 0)} is VALID [2018-11-23 12:12:56,473 INFO L273 TraceCheckUtils]: 8: Hoare triple {13749#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {13750#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:56,473 INFO L273 TraceCheckUtils]: 9: Hoare triple {13750#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13750#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:56,473 INFO L273 TraceCheckUtils]: 10: Hoare triple {13750#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13750#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:56,474 INFO L273 TraceCheckUtils]: 11: Hoare triple {13750#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {13751#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:56,474 INFO L273 TraceCheckUtils]: 12: Hoare triple {13751#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13751#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:56,474 INFO L273 TraceCheckUtils]: 13: Hoare triple {13751#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13751#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:56,475 INFO L273 TraceCheckUtils]: 14: Hoare triple {13751#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {13752#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:56,475 INFO L273 TraceCheckUtils]: 15: Hoare triple {13752#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13752#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:56,475 INFO L273 TraceCheckUtils]: 16: Hoare triple {13752#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13752#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:56,476 INFO L273 TraceCheckUtils]: 17: Hoare triple {13752#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {13753#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:56,477 INFO L273 TraceCheckUtils]: 18: Hoare triple {13753#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13753#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:56,477 INFO L273 TraceCheckUtils]: 19: Hoare triple {13753#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13753#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:56,478 INFO L273 TraceCheckUtils]: 20: Hoare triple {13753#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {13754#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:56,478 INFO L273 TraceCheckUtils]: 21: Hoare triple {13754#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13754#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:56,479 INFO L273 TraceCheckUtils]: 22: Hoare triple {13754#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13754#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:56,480 INFO L273 TraceCheckUtils]: 23: Hoare triple {13754#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {13755#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:56,480 INFO L273 TraceCheckUtils]: 24: Hoare triple {13755#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13755#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:56,481 INFO L273 TraceCheckUtils]: 25: Hoare triple {13755#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13755#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:56,481 INFO L273 TraceCheckUtils]: 26: Hoare triple {13755#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {13756#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:56,482 INFO L273 TraceCheckUtils]: 27: Hoare triple {13756#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13756#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:56,482 INFO L273 TraceCheckUtils]: 28: Hoare triple {13756#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13756#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:56,483 INFO L273 TraceCheckUtils]: 29: Hoare triple {13756#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {13757#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:56,484 INFO L273 TraceCheckUtils]: 30: Hoare triple {13757#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13757#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:56,484 INFO L273 TraceCheckUtils]: 31: Hoare triple {13757#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13757#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:56,485 INFO L273 TraceCheckUtils]: 32: Hoare triple {13757#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {13758#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:56,485 INFO L273 TraceCheckUtils]: 33: Hoare triple {13758#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13758#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:56,486 INFO L273 TraceCheckUtils]: 34: Hoare triple {13758#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13758#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:56,487 INFO L273 TraceCheckUtils]: 35: Hoare triple {13758#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {13759#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:56,487 INFO L273 TraceCheckUtils]: 36: Hoare triple {13759#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13759#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:56,488 INFO L273 TraceCheckUtils]: 37: Hoare triple {13759#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13759#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:56,488 INFO L273 TraceCheckUtils]: 38: Hoare triple {13759#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {13760#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:56,489 INFO L273 TraceCheckUtils]: 39: Hoare triple {13760#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13760#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:56,490 INFO L273 TraceCheckUtils]: 40: Hoare triple {13760#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13760#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:56,490 INFO L273 TraceCheckUtils]: 41: Hoare triple {13760#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {13761#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:56,491 INFO L273 TraceCheckUtils]: 42: Hoare triple {13761#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13761#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:56,491 INFO L273 TraceCheckUtils]: 43: Hoare triple {13761#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13761#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:56,492 INFO L273 TraceCheckUtils]: 44: Hoare triple {13761#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {13762#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:56,493 INFO L273 TraceCheckUtils]: 45: Hoare triple {13762#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13762#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:56,493 INFO L273 TraceCheckUtils]: 46: Hoare triple {13762#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13762#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:56,494 INFO L273 TraceCheckUtils]: 47: Hoare triple {13762#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {13763#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:56,494 INFO L273 TraceCheckUtils]: 48: Hoare triple {13763#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13763#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:56,495 INFO L273 TraceCheckUtils]: 49: Hoare triple {13763#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13763#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:56,496 INFO L273 TraceCheckUtils]: 50: Hoare triple {13763#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {13764#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:56,496 INFO L273 TraceCheckUtils]: 51: Hoare triple {13764#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13764#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:56,497 INFO L273 TraceCheckUtils]: 52: Hoare triple {13764#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13764#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:56,497 INFO L273 TraceCheckUtils]: 53: Hoare triple {13764#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {13765#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:56,498 INFO L273 TraceCheckUtils]: 54: Hoare triple {13765#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13765#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:56,498 INFO L273 TraceCheckUtils]: 55: Hoare triple {13765#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13765#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:56,499 INFO L273 TraceCheckUtils]: 56: Hoare triple {13765#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {13766#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:56,500 INFO L273 TraceCheckUtils]: 57: Hoare triple {13766#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13766#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:56,500 INFO L273 TraceCheckUtils]: 58: Hoare triple {13766#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13766#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:56,501 INFO L273 TraceCheckUtils]: 59: Hoare triple {13766#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {13767#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:56,502 INFO L273 TraceCheckUtils]: 60: Hoare triple {13767#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13767#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:56,502 INFO L273 TraceCheckUtils]: 61: Hoare triple {13767#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13767#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:56,503 INFO L273 TraceCheckUtils]: 62: Hoare triple {13767#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {13768#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:56,503 INFO L273 TraceCheckUtils]: 63: Hoare triple {13768#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13768#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:56,504 INFO L273 TraceCheckUtils]: 64: Hoare triple {13768#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13768#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:56,505 INFO L273 TraceCheckUtils]: 65: Hoare triple {13768#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {13769#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:56,505 INFO L273 TraceCheckUtils]: 66: Hoare triple {13769#(<= main_~i~0 40)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13769#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:56,506 INFO L273 TraceCheckUtils]: 67: Hoare triple {13769#(<= main_~i~0 40)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13769#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:56,506 INFO L273 TraceCheckUtils]: 68: Hoare triple {13769#(<= main_~i~0 40)} ~i~0 := 2 + ~i~0; {13770#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:56,507 INFO L273 TraceCheckUtils]: 69: Hoare triple {13770#(<= main_~i~0 42)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13770#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:56,507 INFO L273 TraceCheckUtils]: 70: Hoare triple {13770#(<= main_~i~0 42)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13770#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:56,508 INFO L273 TraceCheckUtils]: 71: Hoare triple {13770#(<= main_~i~0 42)} ~i~0 := 2 + ~i~0; {13771#(<= main_~i~0 44)} is VALID [2018-11-23 12:12:56,509 INFO L273 TraceCheckUtils]: 72: Hoare triple {13771#(<= main_~i~0 44)} assume !(~i~0 < 100000); {13748#false} is VALID [2018-11-23 12:12:56,509 INFO L273 TraceCheckUtils]: 73: Hoare triple {13748#false} ~i~0 := 0; {13748#false} is VALID [2018-11-23 12:12:56,509 INFO L273 TraceCheckUtils]: 74: Hoare triple {13748#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13748#false} is VALID [2018-11-23 12:12:56,509 INFO L273 TraceCheckUtils]: 75: Hoare triple {13748#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13748#false} is VALID [2018-11-23 12:12:56,510 INFO L256 TraceCheckUtils]: 76: Hoare triple {13748#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {13748#false} is VALID [2018-11-23 12:12:56,510 INFO L273 TraceCheckUtils]: 77: Hoare triple {13748#false} ~cond := #in~cond; {13748#false} is VALID [2018-11-23 12:12:56,510 INFO L273 TraceCheckUtils]: 78: Hoare triple {13748#false} assume 0 == ~cond; {13748#false} is VALID [2018-11-23 12:12:56,510 INFO L273 TraceCheckUtils]: 79: Hoare triple {13748#false} assume !false; {13748#false} is VALID [2018-11-23 12:12:56,515 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 0 proven. 715 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:56,515 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:12:56,515 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:12:56,526 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 12:12:56,575 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 12:12:56,576 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:12:56,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:56,594 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:12:56,792 INFO L256 TraceCheckUtils]: 0: Hoare triple {13747#true} call ULTIMATE.init(); {13747#true} is VALID [2018-11-23 12:12:56,792 INFO L273 TraceCheckUtils]: 1: Hoare triple {13747#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {13747#true} is VALID [2018-11-23 12:12:56,793 INFO L273 TraceCheckUtils]: 2: Hoare triple {13747#true} assume true; {13747#true} is VALID [2018-11-23 12:12:56,793 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {13747#true} {13747#true} #59#return; {13747#true} is VALID [2018-11-23 12:12:56,793 INFO L256 TraceCheckUtils]: 4: Hoare triple {13747#true} call #t~ret4 := main(); {13747#true} is VALID [2018-11-23 12:12:56,794 INFO L273 TraceCheckUtils]: 5: Hoare triple {13747#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {13790#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:56,795 INFO L273 TraceCheckUtils]: 6: Hoare triple {13790#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13790#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:56,795 INFO L273 TraceCheckUtils]: 7: Hoare triple {13790#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13790#(<= main_~i~0 0)} is VALID [2018-11-23 12:12:56,795 INFO L273 TraceCheckUtils]: 8: Hoare triple {13790#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {13750#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:56,796 INFO L273 TraceCheckUtils]: 9: Hoare triple {13750#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13750#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:56,796 INFO L273 TraceCheckUtils]: 10: Hoare triple {13750#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13750#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:56,797 INFO L273 TraceCheckUtils]: 11: Hoare triple {13750#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {13751#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:56,797 INFO L273 TraceCheckUtils]: 12: Hoare triple {13751#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13751#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:56,797 INFO L273 TraceCheckUtils]: 13: Hoare triple {13751#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13751#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:56,798 INFO L273 TraceCheckUtils]: 14: Hoare triple {13751#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {13752#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:56,798 INFO L273 TraceCheckUtils]: 15: Hoare triple {13752#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13752#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:56,798 INFO L273 TraceCheckUtils]: 16: Hoare triple {13752#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13752#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:56,799 INFO L273 TraceCheckUtils]: 17: Hoare triple {13752#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {13753#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:56,800 INFO L273 TraceCheckUtils]: 18: Hoare triple {13753#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13753#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:56,800 INFO L273 TraceCheckUtils]: 19: Hoare triple {13753#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13753#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:56,801 INFO L273 TraceCheckUtils]: 20: Hoare triple {13753#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {13754#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:56,801 INFO L273 TraceCheckUtils]: 21: Hoare triple {13754#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13754#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:56,802 INFO L273 TraceCheckUtils]: 22: Hoare triple {13754#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13754#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:56,803 INFO L273 TraceCheckUtils]: 23: Hoare triple {13754#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {13755#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:56,803 INFO L273 TraceCheckUtils]: 24: Hoare triple {13755#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13755#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:56,804 INFO L273 TraceCheckUtils]: 25: Hoare triple {13755#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13755#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:56,805 INFO L273 TraceCheckUtils]: 26: Hoare triple {13755#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {13756#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:56,805 INFO L273 TraceCheckUtils]: 27: Hoare triple {13756#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13756#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:56,806 INFO L273 TraceCheckUtils]: 28: Hoare triple {13756#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13756#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:56,806 INFO L273 TraceCheckUtils]: 29: Hoare triple {13756#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {13757#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:56,807 INFO L273 TraceCheckUtils]: 30: Hoare triple {13757#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13757#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:56,808 INFO L273 TraceCheckUtils]: 31: Hoare triple {13757#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13757#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:56,808 INFO L273 TraceCheckUtils]: 32: Hoare triple {13757#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {13758#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:56,809 INFO L273 TraceCheckUtils]: 33: Hoare triple {13758#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13758#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:56,809 INFO L273 TraceCheckUtils]: 34: Hoare triple {13758#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13758#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:56,810 INFO L273 TraceCheckUtils]: 35: Hoare triple {13758#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {13759#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:56,811 INFO L273 TraceCheckUtils]: 36: Hoare triple {13759#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13759#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:56,811 INFO L273 TraceCheckUtils]: 37: Hoare triple {13759#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13759#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:56,812 INFO L273 TraceCheckUtils]: 38: Hoare triple {13759#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {13760#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:56,813 INFO L273 TraceCheckUtils]: 39: Hoare triple {13760#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13760#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:56,813 INFO L273 TraceCheckUtils]: 40: Hoare triple {13760#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13760#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:56,814 INFO L273 TraceCheckUtils]: 41: Hoare triple {13760#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {13761#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:56,814 INFO L273 TraceCheckUtils]: 42: Hoare triple {13761#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13761#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:56,815 INFO L273 TraceCheckUtils]: 43: Hoare triple {13761#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13761#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:56,816 INFO L273 TraceCheckUtils]: 44: Hoare triple {13761#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {13762#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:56,816 INFO L273 TraceCheckUtils]: 45: Hoare triple {13762#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13762#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:56,817 INFO L273 TraceCheckUtils]: 46: Hoare triple {13762#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13762#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:56,817 INFO L273 TraceCheckUtils]: 47: Hoare triple {13762#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {13763#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:56,818 INFO L273 TraceCheckUtils]: 48: Hoare triple {13763#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13763#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:56,819 INFO L273 TraceCheckUtils]: 49: Hoare triple {13763#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13763#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:56,819 INFO L273 TraceCheckUtils]: 50: Hoare triple {13763#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {13764#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:56,820 INFO L273 TraceCheckUtils]: 51: Hoare triple {13764#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13764#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:56,820 INFO L273 TraceCheckUtils]: 52: Hoare triple {13764#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13764#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:56,821 INFO L273 TraceCheckUtils]: 53: Hoare triple {13764#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {13765#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:56,822 INFO L273 TraceCheckUtils]: 54: Hoare triple {13765#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13765#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:56,822 INFO L273 TraceCheckUtils]: 55: Hoare triple {13765#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13765#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:56,823 INFO L273 TraceCheckUtils]: 56: Hoare triple {13765#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {13766#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:56,823 INFO L273 TraceCheckUtils]: 57: Hoare triple {13766#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13766#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:56,824 INFO L273 TraceCheckUtils]: 58: Hoare triple {13766#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13766#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:56,825 INFO L273 TraceCheckUtils]: 59: Hoare triple {13766#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {13767#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:56,825 INFO L273 TraceCheckUtils]: 60: Hoare triple {13767#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13767#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:56,826 INFO L273 TraceCheckUtils]: 61: Hoare triple {13767#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13767#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:56,827 INFO L273 TraceCheckUtils]: 62: Hoare triple {13767#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {13768#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:56,827 INFO L273 TraceCheckUtils]: 63: Hoare triple {13768#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13768#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:56,828 INFO L273 TraceCheckUtils]: 64: Hoare triple {13768#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13768#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:56,828 INFO L273 TraceCheckUtils]: 65: Hoare triple {13768#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {13769#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:56,829 INFO L273 TraceCheckUtils]: 66: Hoare triple {13769#(<= main_~i~0 40)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13769#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:56,829 INFO L273 TraceCheckUtils]: 67: Hoare triple {13769#(<= main_~i~0 40)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13769#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:56,830 INFO L273 TraceCheckUtils]: 68: Hoare triple {13769#(<= main_~i~0 40)} ~i~0 := 2 + ~i~0; {13770#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:56,831 INFO L273 TraceCheckUtils]: 69: Hoare triple {13770#(<= main_~i~0 42)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13770#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:56,831 INFO L273 TraceCheckUtils]: 70: Hoare triple {13770#(<= main_~i~0 42)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13770#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:56,832 INFO L273 TraceCheckUtils]: 71: Hoare triple {13770#(<= main_~i~0 42)} ~i~0 := 2 + ~i~0; {13771#(<= main_~i~0 44)} is VALID [2018-11-23 12:12:56,833 INFO L273 TraceCheckUtils]: 72: Hoare triple {13771#(<= main_~i~0 44)} assume !(~i~0 < 100000); {13748#false} is VALID [2018-11-23 12:12:56,833 INFO L273 TraceCheckUtils]: 73: Hoare triple {13748#false} ~i~0 := 0; {13748#false} is VALID [2018-11-23 12:12:56,833 INFO L273 TraceCheckUtils]: 74: Hoare triple {13748#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {13748#false} is VALID [2018-11-23 12:12:56,833 INFO L273 TraceCheckUtils]: 75: Hoare triple {13748#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {13748#false} is VALID [2018-11-23 12:12:56,833 INFO L256 TraceCheckUtils]: 76: Hoare triple {13748#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {13748#false} is VALID [2018-11-23 12:12:56,834 INFO L273 TraceCheckUtils]: 77: Hoare triple {13748#false} ~cond := #in~cond; {13748#false} is VALID [2018-11-23 12:12:56,834 INFO L273 TraceCheckUtils]: 78: Hoare triple {13748#false} assume 0 == ~cond; {13748#false} is VALID [2018-11-23 12:12:56,834 INFO L273 TraceCheckUtils]: 79: Hoare triple {13748#false} assume !false; {13748#false} is VALID [2018-11-23 12:12:56,840 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 0 proven. 715 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:56,858 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:12:56,858 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 26 [2018-11-23 12:12:56,859 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 80 [2018-11-23 12:12:56,859 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:12:56,859 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states. [2018-11-23 12:12:56,944 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:56,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-23 12:12:56,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-23 12:12:56,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-11-23 12:12:56,945 INFO L87 Difference]: Start difference. First operand 85 states and 109 transitions. Second operand 26 states. [2018-11-23 12:12:58,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:58,259 INFO L93 Difference]: Finished difference Result 217 states and 291 transitions. [2018-11-23 12:12:58,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-23 12:12:58,259 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 80 [2018-11-23 12:12:58,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:12:58,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 12:12:58,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 291 transitions. [2018-11-23 12:12:58,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 12:12:58,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 291 transitions. [2018-11-23 12:12:58,266 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states and 291 transitions. [2018-11-23 12:12:58,525 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 291 edges. 291 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:12:58,529 INFO L225 Difference]: With dead ends: 217 [2018-11-23 12:12:58,529 INFO L226 Difference]: Without dead ends: 205 [2018-11-23 12:12:58,530 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-11-23 12:12:58,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-11-23 12:12:58,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 88. [2018-11-23 12:12:58,555 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:12:58,555 INFO L82 GeneralOperation]: Start isEquivalent. First operand 205 states. Second operand 88 states. [2018-11-23 12:12:58,555 INFO L74 IsIncluded]: Start isIncluded. First operand 205 states. Second operand 88 states. [2018-11-23 12:12:58,555 INFO L87 Difference]: Start difference. First operand 205 states. Second operand 88 states. [2018-11-23 12:12:58,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:58,559 INFO L93 Difference]: Finished difference Result 205 states and 277 transitions. [2018-11-23 12:12:58,560 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 277 transitions. [2018-11-23 12:12:58,560 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:58,560 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:58,560 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand 205 states. [2018-11-23 12:12:58,560 INFO L87 Difference]: Start difference. First operand 88 states. Second operand 205 states. [2018-11-23 12:12:58,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:12:58,565 INFO L93 Difference]: Finished difference Result 205 states and 277 transitions. [2018-11-23 12:12:58,565 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 277 transitions. [2018-11-23 12:12:58,566 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:12:58,566 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:12:58,566 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:12:58,566 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:12:58,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-11-23 12:12:58,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 113 transitions. [2018-11-23 12:12:58,568 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 113 transitions. Word has length 80 [2018-11-23 12:12:58,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:12:58,568 INFO L480 AbstractCegarLoop]: Abstraction has 88 states and 113 transitions. [2018-11-23 12:12:58,568 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-23 12:12:58,568 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 113 transitions. [2018-11-23 12:12:58,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-23 12:12:58,569 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:12:58,569 INFO L402 BasicCegarLoop]: trace histogram [23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:12:58,570 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:12:58,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:12:58,570 INFO L82 PathProgramCache]: Analyzing trace with hash -1831916694, now seen corresponding path program 23 times [2018-11-23 12:12:58,570 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:12:58,570 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:12:58,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:58,571 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:12:58,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:12:58,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:12:58,996 INFO L256 TraceCheckUtils]: 0: Hoare triple {14838#true} call ULTIMATE.init(); {14838#true} is VALID [2018-11-23 12:12:58,996 INFO L273 TraceCheckUtils]: 1: Hoare triple {14838#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {14838#true} is VALID [2018-11-23 12:12:58,997 INFO L273 TraceCheckUtils]: 2: Hoare triple {14838#true} assume true; {14838#true} is VALID [2018-11-23 12:12:58,997 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {14838#true} {14838#true} #59#return; {14838#true} is VALID [2018-11-23 12:12:58,997 INFO L256 TraceCheckUtils]: 4: Hoare triple {14838#true} call #t~ret4 := main(); {14838#true} is VALID [2018-11-23 12:12:58,997 INFO L273 TraceCheckUtils]: 5: Hoare triple {14838#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {14840#(= main_~i~0 0)} is VALID [2018-11-23 12:12:58,998 INFO L273 TraceCheckUtils]: 6: Hoare triple {14840#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14840#(= main_~i~0 0)} is VALID [2018-11-23 12:12:58,998 INFO L273 TraceCheckUtils]: 7: Hoare triple {14840#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14840#(= main_~i~0 0)} is VALID [2018-11-23 12:12:58,999 INFO L273 TraceCheckUtils]: 8: Hoare triple {14840#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {14841#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:58,999 INFO L273 TraceCheckUtils]: 9: Hoare triple {14841#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14841#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:58,999 INFO L273 TraceCheckUtils]: 10: Hoare triple {14841#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14841#(<= main_~i~0 2)} is VALID [2018-11-23 12:12:59,000 INFO L273 TraceCheckUtils]: 11: Hoare triple {14841#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {14842#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:59,000 INFO L273 TraceCheckUtils]: 12: Hoare triple {14842#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14842#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:59,001 INFO L273 TraceCheckUtils]: 13: Hoare triple {14842#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14842#(<= main_~i~0 4)} is VALID [2018-11-23 12:12:59,001 INFO L273 TraceCheckUtils]: 14: Hoare triple {14842#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {14843#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:59,001 INFO L273 TraceCheckUtils]: 15: Hoare triple {14843#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14843#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:59,002 INFO L273 TraceCheckUtils]: 16: Hoare triple {14843#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14843#(<= main_~i~0 6)} is VALID [2018-11-23 12:12:59,003 INFO L273 TraceCheckUtils]: 17: Hoare triple {14843#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {14844#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:59,003 INFO L273 TraceCheckUtils]: 18: Hoare triple {14844#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14844#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:59,004 INFO L273 TraceCheckUtils]: 19: Hoare triple {14844#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14844#(<= main_~i~0 8)} is VALID [2018-11-23 12:12:59,005 INFO L273 TraceCheckUtils]: 20: Hoare triple {14844#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {14845#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:59,005 INFO L273 TraceCheckUtils]: 21: Hoare triple {14845#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14845#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:59,006 INFO L273 TraceCheckUtils]: 22: Hoare triple {14845#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14845#(<= main_~i~0 10)} is VALID [2018-11-23 12:12:59,006 INFO L273 TraceCheckUtils]: 23: Hoare triple {14845#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {14846#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:59,007 INFO L273 TraceCheckUtils]: 24: Hoare triple {14846#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14846#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:59,007 INFO L273 TraceCheckUtils]: 25: Hoare triple {14846#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14846#(<= main_~i~0 12)} is VALID [2018-11-23 12:12:59,008 INFO L273 TraceCheckUtils]: 26: Hoare triple {14846#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {14847#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:59,009 INFO L273 TraceCheckUtils]: 27: Hoare triple {14847#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14847#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:59,009 INFO L273 TraceCheckUtils]: 28: Hoare triple {14847#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14847#(<= main_~i~0 14)} is VALID [2018-11-23 12:12:59,010 INFO L273 TraceCheckUtils]: 29: Hoare triple {14847#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {14848#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:59,010 INFO L273 TraceCheckUtils]: 30: Hoare triple {14848#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14848#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:59,011 INFO L273 TraceCheckUtils]: 31: Hoare triple {14848#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14848#(<= main_~i~0 16)} is VALID [2018-11-23 12:12:59,012 INFO L273 TraceCheckUtils]: 32: Hoare triple {14848#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {14849#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:59,012 INFO L273 TraceCheckUtils]: 33: Hoare triple {14849#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14849#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:59,013 INFO L273 TraceCheckUtils]: 34: Hoare triple {14849#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14849#(<= main_~i~0 18)} is VALID [2018-11-23 12:12:59,013 INFO L273 TraceCheckUtils]: 35: Hoare triple {14849#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {14850#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:59,014 INFO L273 TraceCheckUtils]: 36: Hoare triple {14850#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14850#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:59,014 INFO L273 TraceCheckUtils]: 37: Hoare triple {14850#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14850#(<= main_~i~0 20)} is VALID [2018-11-23 12:12:59,015 INFO L273 TraceCheckUtils]: 38: Hoare triple {14850#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {14851#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:59,016 INFO L273 TraceCheckUtils]: 39: Hoare triple {14851#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14851#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:59,016 INFO L273 TraceCheckUtils]: 40: Hoare triple {14851#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14851#(<= main_~i~0 22)} is VALID [2018-11-23 12:12:59,017 INFO L273 TraceCheckUtils]: 41: Hoare triple {14851#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {14852#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:59,018 INFO L273 TraceCheckUtils]: 42: Hoare triple {14852#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14852#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:59,018 INFO L273 TraceCheckUtils]: 43: Hoare triple {14852#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14852#(<= main_~i~0 24)} is VALID [2018-11-23 12:12:59,019 INFO L273 TraceCheckUtils]: 44: Hoare triple {14852#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {14853#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:59,019 INFO L273 TraceCheckUtils]: 45: Hoare triple {14853#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14853#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:59,020 INFO L273 TraceCheckUtils]: 46: Hoare triple {14853#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14853#(<= main_~i~0 26)} is VALID [2018-11-23 12:12:59,021 INFO L273 TraceCheckUtils]: 47: Hoare triple {14853#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {14854#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:59,021 INFO L273 TraceCheckUtils]: 48: Hoare triple {14854#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14854#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:59,022 INFO L273 TraceCheckUtils]: 49: Hoare triple {14854#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14854#(<= main_~i~0 28)} is VALID [2018-11-23 12:12:59,022 INFO L273 TraceCheckUtils]: 50: Hoare triple {14854#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {14855#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:59,023 INFO L273 TraceCheckUtils]: 51: Hoare triple {14855#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14855#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:59,023 INFO L273 TraceCheckUtils]: 52: Hoare triple {14855#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14855#(<= main_~i~0 30)} is VALID [2018-11-23 12:12:59,024 INFO L273 TraceCheckUtils]: 53: Hoare triple {14855#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {14856#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:59,025 INFO L273 TraceCheckUtils]: 54: Hoare triple {14856#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14856#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:59,025 INFO L273 TraceCheckUtils]: 55: Hoare triple {14856#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14856#(<= main_~i~0 32)} is VALID [2018-11-23 12:12:59,026 INFO L273 TraceCheckUtils]: 56: Hoare triple {14856#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {14857#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:59,026 INFO L273 TraceCheckUtils]: 57: Hoare triple {14857#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14857#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:59,027 INFO L273 TraceCheckUtils]: 58: Hoare triple {14857#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14857#(<= main_~i~0 34)} is VALID [2018-11-23 12:12:59,028 INFO L273 TraceCheckUtils]: 59: Hoare triple {14857#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {14858#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:59,028 INFO L273 TraceCheckUtils]: 60: Hoare triple {14858#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14858#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:59,029 INFO L273 TraceCheckUtils]: 61: Hoare triple {14858#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14858#(<= main_~i~0 36)} is VALID [2018-11-23 12:12:59,030 INFO L273 TraceCheckUtils]: 62: Hoare triple {14858#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {14859#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:59,030 INFO L273 TraceCheckUtils]: 63: Hoare triple {14859#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14859#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:59,031 INFO L273 TraceCheckUtils]: 64: Hoare triple {14859#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14859#(<= main_~i~0 38)} is VALID [2018-11-23 12:12:59,031 INFO L273 TraceCheckUtils]: 65: Hoare triple {14859#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {14860#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:59,032 INFO L273 TraceCheckUtils]: 66: Hoare triple {14860#(<= main_~i~0 40)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14860#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:59,032 INFO L273 TraceCheckUtils]: 67: Hoare triple {14860#(<= main_~i~0 40)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14860#(<= main_~i~0 40)} is VALID [2018-11-23 12:12:59,033 INFO L273 TraceCheckUtils]: 68: Hoare triple {14860#(<= main_~i~0 40)} ~i~0 := 2 + ~i~0; {14861#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:59,034 INFO L273 TraceCheckUtils]: 69: Hoare triple {14861#(<= main_~i~0 42)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14861#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:59,034 INFO L273 TraceCheckUtils]: 70: Hoare triple {14861#(<= main_~i~0 42)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14861#(<= main_~i~0 42)} is VALID [2018-11-23 12:12:59,035 INFO L273 TraceCheckUtils]: 71: Hoare triple {14861#(<= main_~i~0 42)} ~i~0 := 2 + ~i~0; {14862#(<= main_~i~0 44)} is VALID [2018-11-23 12:12:59,035 INFO L273 TraceCheckUtils]: 72: Hoare triple {14862#(<= main_~i~0 44)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14862#(<= main_~i~0 44)} is VALID [2018-11-23 12:12:59,036 INFO L273 TraceCheckUtils]: 73: Hoare triple {14862#(<= main_~i~0 44)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14862#(<= main_~i~0 44)} is VALID [2018-11-23 12:12:59,037 INFO L273 TraceCheckUtils]: 74: Hoare triple {14862#(<= main_~i~0 44)} ~i~0 := 2 + ~i~0; {14863#(<= main_~i~0 46)} is VALID [2018-11-23 12:12:59,037 INFO L273 TraceCheckUtils]: 75: Hoare triple {14863#(<= main_~i~0 46)} assume !(~i~0 < 100000); {14839#false} is VALID [2018-11-23 12:12:59,038 INFO L273 TraceCheckUtils]: 76: Hoare triple {14839#false} ~i~0 := 0; {14839#false} is VALID [2018-11-23 12:12:59,038 INFO L273 TraceCheckUtils]: 77: Hoare triple {14839#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14839#false} is VALID [2018-11-23 12:12:59,038 INFO L273 TraceCheckUtils]: 78: Hoare triple {14839#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14839#false} is VALID [2018-11-23 12:12:59,038 INFO L256 TraceCheckUtils]: 79: Hoare triple {14839#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {14839#false} is VALID [2018-11-23 12:12:59,038 INFO L273 TraceCheckUtils]: 80: Hoare triple {14839#false} ~cond := #in~cond; {14839#false} is VALID [2018-11-23 12:12:59,039 INFO L273 TraceCheckUtils]: 81: Hoare triple {14839#false} assume 0 == ~cond; {14839#false} is VALID [2018-11-23 12:12:59,039 INFO L273 TraceCheckUtils]: 82: Hoare triple {14839#false} assume !false; {14839#false} is VALID [2018-11-23 12:12:59,044 INFO L134 CoverageAnalysis]: Checked inductivity of 782 backedges. 0 proven. 782 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:12:59,044 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:12:59,044 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:12:59,053 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 12:13:55,744 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-11-23 12:13:55,744 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 12:13:55,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:13:55,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 12:13:56,005 INFO L256 TraceCheckUtils]: 0: Hoare triple {14838#true} call ULTIMATE.init(); {14838#true} is VALID [2018-11-23 12:13:56,005 INFO L273 TraceCheckUtils]: 1: Hoare triple {14838#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {14838#true} is VALID [2018-11-23 12:13:56,005 INFO L273 TraceCheckUtils]: 2: Hoare triple {14838#true} assume true; {14838#true} is VALID [2018-11-23 12:13:56,005 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {14838#true} {14838#true} #59#return; {14838#true} is VALID [2018-11-23 12:13:56,006 INFO L256 TraceCheckUtils]: 4: Hoare triple {14838#true} call #t~ret4 := main(); {14838#true} is VALID [2018-11-23 12:13:56,007 INFO L273 TraceCheckUtils]: 5: Hoare triple {14838#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {14882#(<= main_~i~0 0)} is VALID [2018-11-23 12:13:56,007 INFO L273 TraceCheckUtils]: 6: Hoare triple {14882#(<= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14882#(<= main_~i~0 0)} is VALID [2018-11-23 12:13:56,008 INFO L273 TraceCheckUtils]: 7: Hoare triple {14882#(<= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14882#(<= main_~i~0 0)} is VALID [2018-11-23 12:13:56,008 INFO L273 TraceCheckUtils]: 8: Hoare triple {14882#(<= main_~i~0 0)} ~i~0 := 2 + ~i~0; {14841#(<= main_~i~0 2)} is VALID [2018-11-23 12:13:56,008 INFO L273 TraceCheckUtils]: 9: Hoare triple {14841#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14841#(<= main_~i~0 2)} is VALID [2018-11-23 12:13:56,009 INFO L273 TraceCheckUtils]: 10: Hoare triple {14841#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14841#(<= main_~i~0 2)} is VALID [2018-11-23 12:13:56,009 INFO L273 TraceCheckUtils]: 11: Hoare triple {14841#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {14842#(<= main_~i~0 4)} is VALID [2018-11-23 12:13:56,010 INFO L273 TraceCheckUtils]: 12: Hoare triple {14842#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14842#(<= main_~i~0 4)} is VALID [2018-11-23 12:13:56,010 INFO L273 TraceCheckUtils]: 13: Hoare triple {14842#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14842#(<= main_~i~0 4)} is VALID [2018-11-23 12:13:56,011 INFO L273 TraceCheckUtils]: 14: Hoare triple {14842#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {14843#(<= main_~i~0 6)} is VALID [2018-11-23 12:13:56,011 INFO L273 TraceCheckUtils]: 15: Hoare triple {14843#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14843#(<= main_~i~0 6)} is VALID [2018-11-23 12:13:56,012 INFO L273 TraceCheckUtils]: 16: Hoare triple {14843#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14843#(<= main_~i~0 6)} is VALID [2018-11-23 12:13:56,012 INFO L273 TraceCheckUtils]: 17: Hoare triple {14843#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {14844#(<= main_~i~0 8)} is VALID [2018-11-23 12:13:56,013 INFO L273 TraceCheckUtils]: 18: Hoare triple {14844#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14844#(<= main_~i~0 8)} is VALID [2018-11-23 12:13:56,013 INFO L273 TraceCheckUtils]: 19: Hoare triple {14844#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14844#(<= main_~i~0 8)} is VALID [2018-11-23 12:13:56,014 INFO L273 TraceCheckUtils]: 20: Hoare triple {14844#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {14845#(<= main_~i~0 10)} is VALID [2018-11-23 12:13:56,015 INFO L273 TraceCheckUtils]: 21: Hoare triple {14845#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14845#(<= main_~i~0 10)} is VALID [2018-11-23 12:13:56,015 INFO L273 TraceCheckUtils]: 22: Hoare triple {14845#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14845#(<= main_~i~0 10)} is VALID [2018-11-23 12:13:56,016 INFO L273 TraceCheckUtils]: 23: Hoare triple {14845#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {14846#(<= main_~i~0 12)} is VALID [2018-11-23 12:13:56,016 INFO L273 TraceCheckUtils]: 24: Hoare triple {14846#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14846#(<= main_~i~0 12)} is VALID [2018-11-23 12:13:56,017 INFO L273 TraceCheckUtils]: 25: Hoare triple {14846#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14846#(<= main_~i~0 12)} is VALID [2018-11-23 12:13:56,018 INFO L273 TraceCheckUtils]: 26: Hoare triple {14846#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {14847#(<= main_~i~0 14)} is VALID [2018-11-23 12:13:56,018 INFO L273 TraceCheckUtils]: 27: Hoare triple {14847#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14847#(<= main_~i~0 14)} is VALID [2018-11-23 12:13:56,019 INFO L273 TraceCheckUtils]: 28: Hoare triple {14847#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14847#(<= main_~i~0 14)} is VALID [2018-11-23 12:13:56,019 INFO L273 TraceCheckUtils]: 29: Hoare triple {14847#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {14848#(<= main_~i~0 16)} is VALID [2018-11-23 12:13:56,020 INFO L273 TraceCheckUtils]: 30: Hoare triple {14848#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14848#(<= main_~i~0 16)} is VALID [2018-11-23 12:13:56,020 INFO L273 TraceCheckUtils]: 31: Hoare triple {14848#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14848#(<= main_~i~0 16)} is VALID [2018-11-23 12:13:56,021 INFO L273 TraceCheckUtils]: 32: Hoare triple {14848#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {14849#(<= main_~i~0 18)} is VALID [2018-11-23 12:13:56,022 INFO L273 TraceCheckUtils]: 33: Hoare triple {14849#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14849#(<= main_~i~0 18)} is VALID [2018-11-23 12:13:56,022 INFO L273 TraceCheckUtils]: 34: Hoare triple {14849#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14849#(<= main_~i~0 18)} is VALID [2018-11-23 12:13:56,023 INFO L273 TraceCheckUtils]: 35: Hoare triple {14849#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {14850#(<= main_~i~0 20)} is VALID [2018-11-23 12:13:56,023 INFO L273 TraceCheckUtils]: 36: Hoare triple {14850#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14850#(<= main_~i~0 20)} is VALID [2018-11-23 12:13:56,024 INFO L273 TraceCheckUtils]: 37: Hoare triple {14850#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14850#(<= main_~i~0 20)} is VALID [2018-11-23 12:13:56,025 INFO L273 TraceCheckUtils]: 38: Hoare triple {14850#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {14851#(<= main_~i~0 22)} is VALID [2018-11-23 12:13:56,025 INFO L273 TraceCheckUtils]: 39: Hoare triple {14851#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14851#(<= main_~i~0 22)} is VALID [2018-11-23 12:13:56,026 INFO L273 TraceCheckUtils]: 40: Hoare triple {14851#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14851#(<= main_~i~0 22)} is VALID [2018-11-23 12:13:56,026 INFO L273 TraceCheckUtils]: 41: Hoare triple {14851#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {14852#(<= main_~i~0 24)} is VALID [2018-11-23 12:13:56,027 INFO L273 TraceCheckUtils]: 42: Hoare triple {14852#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14852#(<= main_~i~0 24)} is VALID [2018-11-23 12:13:56,027 INFO L273 TraceCheckUtils]: 43: Hoare triple {14852#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14852#(<= main_~i~0 24)} is VALID [2018-11-23 12:13:56,028 INFO L273 TraceCheckUtils]: 44: Hoare triple {14852#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {14853#(<= main_~i~0 26)} is VALID [2018-11-23 12:13:56,029 INFO L273 TraceCheckUtils]: 45: Hoare triple {14853#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14853#(<= main_~i~0 26)} is VALID [2018-11-23 12:13:56,029 INFO L273 TraceCheckUtils]: 46: Hoare triple {14853#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14853#(<= main_~i~0 26)} is VALID [2018-11-23 12:13:56,030 INFO L273 TraceCheckUtils]: 47: Hoare triple {14853#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {14854#(<= main_~i~0 28)} is VALID [2018-11-23 12:13:56,031 INFO L273 TraceCheckUtils]: 48: Hoare triple {14854#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14854#(<= main_~i~0 28)} is VALID [2018-11-23 12:13:56,031 INFO L273 TraceCheckUtils]: 49: Hoare triple {14854#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14854#(<= main_~i~0 28)} is VALID [2018-11-23 12:13:56,032 INFO L273 TraceCheckUtils]: 50: Hoare triple {14854#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {14855#(<= main_~i~0 30)} is VALID [2018-11-23 12:13:56,032 INFO L273 TraceCheckUtils]: 51: Hoare triple {14855#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14855#(<= main_~i~0 30)} is VALID [2018-11-23 12:13:56,033 INFO L273 TraceCheckUtils]: 52: Hoare triple {14855#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14855#(<= main_~i~0 30)} is VALID [2018-11-23 12:13:56,034 INFO L273 TraceCheckUtils]: 53: Hoare triple {14855#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {14856#(<= main_~i~0 32)} is VALID [2018-11-23 12:13:56,034 INFO L273 TraceCheckUtils]: 54: Hoare triple {14856#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14856#(<= main_~i~0 32)} is VALID [2018-11-23 12:13:56,035 INFO L273 TraceCheckUtils]: 55: Hoare triple {14856#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14856#(<= main_~i~0 32)} is VALID [2018-11-23 12:13:56,035 INFO L273 TraceCheckUtils]: 56: Hoare triple {14856#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {14857#(<= main_~i~0 34)} is VALID [2018-11-23 12:13:56,036 INFO L273 TraceCheckUtils]: 57: Hoare triple {14857#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14857#(<= main_~i~0 34)} is VALID [2018-11-23 12:13:56,036 INFO L273 TraceCheckUtils]: 58: Hoare triple {14857#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14857#(<= main_~i~0 34)} is VALID [2018-11-23 12:13:56,037 INFO L273 TraceCheckUtils]: 59: Hoare triple {14857#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {14858#(<= main_~i~0 36)} is VALID [2018-11-23 12:13:56,038 INFO L273 TraceCheckUtils]: 60: Hoare triple {14858#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14858#(<= main_~i~0 36)} is VALID [2018-11-23 12:13:56,038 INFO L273 TraceCheckUtils]: 61: Hoare triple {14858#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14858#(<= main_~i~0 36)} is VALID [2018-11-23 12:13:56,039 INFO L273 TraceCheckUtils]: 62: Hoare triple {14858#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {14859#(<= main_~i~0 38)} is VALID [2018-11-23 12:13:56,039 INFO L273 TraceCheckUtils]: 63: Hoare triple {14859#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14859#(<= main_~i~0 38)} is VALID [2018-11-23 12:13:56,040 INFO L273 TraceCheckUtils]: 64: Hoare triple {14859#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14859#(<= main_~i~0 38)} is VALID [2018-11-23 12:13:56,041 INFO L273 TraceCheckUtils]: 65: Hoare triple {14859#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {14860#(<= main_~i~0 40)} is VALID [2018-11-23 12:13:56,041 INFO L273 TraceCheckUtils]: 66: Hoare triple {14860#(<= main_~i~0 40)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14860#(<= main_~i~0 40)} is VALID [2018-11-23 12:13:56,042 INFO L273 TraceCheckUtils]: 67: Hoare triple {14860#(<= main_~i~0 40)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14860#(<= main_~i~0 40)} is VALID [2018-11-23 12:13:56,042 INFO L273 TraceCheckUtils]: 68: Hoare triple {14860#(<= main_~i~0 40)} ~i~0 := 2 + ~i~0; {14861#(<= main_~i~0 42)} is VALID [2018-11-23 12:13:56,043 INFO L273 TraceCheckUtils]: 69: Hoare triple {14861#(<= main_~i~0 42)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14861#(<= main_~i~0 42)} is VALID [2018-11-23 12:13:56,043 INFO L273 TraceCheckUtils]: 70: Hoare triple {14861#(<= main_~i~0 42)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14861#(<= main_~i~0 42)} is VALID [2018-11-23 12:13:56,044 INFO L273 TraceCheckUtils]: 71: Hoare triple {14861#(<= main_~i~0 42)} ~i~0 := 2 + ~i~0; {14862#(<= main_~i~0 44)} is VALID [2018-11-23 12:13:56,045 INFO L273 TraceCheckUtils]: 72: Hoare triple {14862#(<= main_~i~0 44)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14862#(<= main_~i~0 44)} is VALID [2018-11-23 12:13:56,045 INFO L273 TraceCheckUtils]: 73: Hoare triple {14862#(<= main_~i~0 44)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14862#(<= main_~i~0 44)} is VALID [2018-11-23 12:13:56,046 INFO L273 TraceCheckUtils]: 74: Hoare triple {14862#(<= main_~i~0 44)} ~i~0 := 2 + ~i~0; {14863#(<= main_~i~0 46)} is VALID [2018-11-23 12:13:56,047 INFO L273 TraceCheckUtils]: 75: Hoare triple {14863#(<= main_~i~0 46)} assume !(~i~0 < 100000); {14839#false} is VALID [2018-11-23 12:13:56,047 INFO L273 TraceCheckUtils]: 76: Hoare triple {14839#false} ~i~0 := 0; {14839#false} is VALID [2018-11-23 12:13:56,047 INFO L273 TraceCheckUtils]: 77: Hoare triple {14839#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {14839#false} is VALID [2018-11-23 12:13:56,047 INFO L273 TraceCheckUtils]: 78: Hoare triple {14839#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {14839#false} is VALID [2018-11-23 12:13:56,047 INFO L256 TraceCheckUtils]: 79: Hoare triple {14839#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {14839#false} is VALID [2018-11-23 12:13:56,048 INFO L273 TraceCheckUtils]: 80: Hoare triple {14839#false} ~cond := #in~cond; {14839#false} is VALID [2018-11-23 12:13:56,048 INFO L273 TraceCheckUtils]: 81: Hoare triple {14839#false} assume 0 == ~cond; {14839#false} is VALID [2018-11-23 12:13:56,048 INFO L273 TraceCheckUtils]: 82: Hoare triple {14839#false} assume !false; {14839#false} is VALID [2018-11-23 12:13:56,055 INFO L134 CoverageAnalysis]: Checked inductivity of 782 backedges. 0 proven. 782 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:13:56,082 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 12:13:56,082 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 27 [2018-11-23 12:13:56,082 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-11-23 12:13:56,083 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 12:13:56,083 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 27 states. [2018-11-23 12:13:56,169 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:13:56,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-11-23 12:13:56,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-11-23 12:13:56,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-11-23 12:13:56,170 INFO L87 Difference]: Start difference. First operand 88 states and 113 transitions. Second operand 27 states. [2018-11-23 12:13:57,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:13:57,519 INFO L93 Difference]: Finished difference Result 225 states and 302 transitions. [2018-11-23 12:13:57,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 12:13:57,519 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-11-23 12:13:57,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 12:13:57,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 12:13:57,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 302 transitions. [2018-11-23 12:13:57,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 12:13:57,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 302 transitions. [2018-11-23 12:13:57,525 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 302 transitions. [2018-11-23 12:13:57,807 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 302 edges. 302 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 12:13:57,812 INFO L225 Difference]: With dead ends: 225 [2018-11-23 12:13:57,812 INFO L226 Difference]: Without dead ends: 213 [2018-11-23 12:13:57,812 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-11-23 12:13:57,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-11-23 12:13:57,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 91. [2018-11-23 12:13:57,857 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 12:13:57,857 INFO L82 GeneralOperation]: Start isEquivalent. First operand 213 states. Second operand 91 states. [2018-11-23 12:13:57,857 INFO L74 IsIncluded]: Start isIncluded. First operand 213 states. Second operand 91 states. [2018-11-23 12:13:57,857 INFO L87 Difference]: Start difference. First operand 213 states. Second operand 91 states. [2018-11-23 12:13:57,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:13:57,861 INFO L93 Difference]: Finished difference Result 213 states and 288 transitions. [2018-11-23 12:13:57,861 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 288 transitions. [2018-11-23 12:13:57,862 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:13:57,862 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:13:57,862 INFO L74 IsIncluded]: Start isIncluded. First operand 91 states. Second operand 213 states. [2018-11-23 12:13:57,862 INFO L87 Difference]: Start difference. First operand 91 states. Second operand 213 states. [2018-11-23 12:13:57,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 12:13:57,866 INFO L93 Difference]: Finished difference Result 213 states and 288 transitions. [2018-11-23 12:13:57,866 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 288 transitions. [2018-11-23 12:13:57,866 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 12:13:57,867 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 12:13:57,867 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 12:13:57,867 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 12:13:57,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-11-23 12:13:57,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 117 transitions. [2018-11-23 12:13:57,868 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 117 transitions. Word has length 83 [2018-11-23 12:13:57,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 12:13:57,868 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 117 transitions. [2018-11-23 12:13:57,869 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-11-23 12:13:57,869 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 117 transitions. [2018-11-23 12:13:57,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-23 12:13:57,869 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 12:13:57,870 INFO L402 BasicCegarLoop]: trace histogram [24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 12:13:57,870 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 12:13:57,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 12:13:57,870 INFO L82 PathProgramCache]: Analyzing trace with hash 1025899725, now seen corresponding path program 24 times [2018-11-23 12:13:57,870 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 12:13:57,870 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 12:13:57,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:13:57,871 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 12:13:57,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 12:13:57,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 12:13:59,202 INFO L256 TraceCheckUtils]: 0: Hoare triple {15970#true} call ULTIMATE.init(); {15970#true} is VALID [2018-11-23 12:13:59,202 INFO L273 TraceCheckUtils]: 1: Hoare triple {15970#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0]; {15970#true} is VALID [2018-11-23 12:13:59,202 INFO L273 TraceCheckUtils]: 2: Hoare triple {15970#true} assume true; {15970#true} is VALID [2018-11-23 12:13:59,202 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {15970#true} {15970#true} #59#return; {15970#true} is VALID [2018-11-23 12:13:59,203 INFO L256 TraceCheckUtils]: 4: Hoare triple {15970#true} call #t~ret4 := main(); {15970#true} is VALID [2018-11-23 12:13:59,204 INFO L273 TraceCheckUtils]: 5: Hoare triple {15970#true} havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000);call ~#b~0.base, ~#b~0.offset := #Ultimate.alloc(400000);~i~0 := 0; {15972#(= main_~i~0 0)} is VALID [2018-11-23 12:13:59,204 INFO L273 TraceCheckUtils]: 6: Hoare triple {15972#(= main_~i~0 0)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15972#(= main_~i~0 0)} is VALID [2018-11-23 12:13:59,207 INFO L273 TraceCheckUtils]: 7: Hoare triple {15972#(= main_~i~0 0)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15972#(= main_~i~0 0)} is VALID [2018-11-23 12:13:59,207 INFO L273 TraceCheckUtils]: 8: Hoare triple {15972#(= main_~i~0 0)} ~i~0 := 2 + ~i~0; {15973#(<= main_~i~0 2)} is VALID [2018-11-23 12:13:59,208 INFO L273 TraceCheckUtils]: 9: Hoare triple {15973#(<= main_~i~0 2)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15973#(<= main_~i~0 2)} is VALID [2018-11-23 12:13:59,210 INFO L273 TraceCheckUtils]: 10: Hoare triple {15973#(<= main_~i~0 2)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15973#(<= main_~i~0 2)} is VALID [2018-11-23 12:13:59,210 INFO L273 TraceCheckUtils]: 11: Hoare triple {15973#(<= main_~i~0 2)} ~i~0 := 2 + ~i~0; {15974#(<= main_~i~0 4)} is VALID [2018-11-23 12:13:59,210 INFO L273 TraceCheckUtils]: 12: Hoare triple {15974#(<= main_~i~0 4)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15974#(<= main_~i~0 4)} is VALID [2018-11-23 12:13:59,211 INFO L273 TraceCheckUtils]: 13: Hoare triple {15974#(<= main_~i~0 4)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15974#(<= main_~i~0 4)} is VALID [2018-11-23 12:13:59,211 INFO L273 TraceCheckUtils]: 14: Hoare triple {15974#(<= main_~i~0 4)} ~i~0 := 2 + ~i~0; {15975#(<= main_~i~0 6)} is VALID [2018-11-23 12:13:59,211 INFO L273 TraceCheckUtils]: 15: Hoare triple {15975#(<= main_~i~0 6)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15975#(<= main_~i~0 6)} is VALID [2018-11-23 12:13:59,212 INFO L273 TraceCheckUtils]: 16: Hoare triple {15975#(<= main_~i~0 6)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15975#(<= main_~i~0 6)} is VALID [2018-11-23 12:13:59,212 INFO L273 TraceCheckUtils]: 17: Hoare triple {15975#(<= main_~i~0 6)} ~i~0 := 2 + ~i~0; {15976#(<= main_~i~0 8)} is VALID [2018-11-23 12:13:59,212 INFO L273 TraceCheckUtils]: 18: Hoare triple {15976#(<= main_~i~0 8)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15976#(<= main_~i~0 8)} is VALID [2018-11-23 12:13:59,213 INFO L273 TraceCheckUtils]: 19: Hoare triple {15976#(<= main_~i~0 8)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15976#(<= main_~i~0 8)} is VALID [2018-11-23 12:13:59,213 INFO L273 TraceCheckUtils]: 20: Hoare triple {15976#(<= main_~i~0 8)} ~i~0 := 2 + ~i~0; {15977#(<= main_~i~0 10)} is VALID [2018-11-23 12:13:59,214 INFO L273 TraceCheckUtils]: 21: Hoare triple {15977#(<= main_~i~0 10)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15977#(<= main_~i~0 10)} is VALID [2018-11-23 12:13:59,215 INFO L273 TraceCheckUtils]: 22: Hoare triple {15977#(<= main_~i~0 10)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15977#(<= main_~i~0 10)} is VALID [2018-11-23 12:13:59,215 INFO L273 TraceCheckUtils]: 23: Hoare triple {15977#(<= main_~i~0 10)} ~i~0 := 2 + ~i~0; {15978#(<= main_~i~0 12)} is VALID [2018-11-23 12:13:59,216 INFO L273 TraceCheckUtils]: 24: Hoare triple {15978#(<= main_~i~0 12)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15978#(<= main_~i~0 12)} is VALID [2018-11-23 12:13:59,216 INFO L273 TraceCheckUtils]: 25: Hoare triple {15978#(<= main_~i~0 12)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15978#(<= main_~i~0 12)} is VALID [2018-11-23 12:13:59,217 INFO L273 TraceCheckUtils]: 26: Hoare triple {15978#(<= main_~i~0 12)} ~i~0 := 2 + ~i~0; {15979#(<= main_~i~0 14)} is VALID [2018-11-23 12:13:59,218 INFO L273 TraceCheckUtils]: 27: Hoare triple {15979#(<= main_~i~0 14)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15979#(<= main_~i~0 14)} is VALID [2018-11-23 12:13:59,218 INFO L273 TraceCheckUtils]: 28: Hoare triple {15979#(<= main_~i~0 14)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15979#(<= main_~i~0 14)} is VALID [2018-11-23 12:13:59,219 INFO L273 TraceCheckUtils]: 29: Hoare triple {15979#(<= main_~i~0 14)} ~i~0 := 2 + ~i~0; {15980#(<= main_~i~0 16)} is VALID [2018-11-23 12:13:59,219 INFO L273 TraceCheckUtils]: 30: Hoare triple {15980#(<= main_~i~0 16)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15980#(<= main_~i~0 16)} is VALID [2018-11-23 12:13:59,220 INFO L273 TraceCheckUtils]: 31: Hoare triple {15980#(<= main_~i~0 16)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15980#(<= main_~i~0 16)} is VALID [2018-11-23 12:13:59,221 INFO L273 TraceCheckUtils]: 32: Hoare triple {15980#(<= main_~i~0 16)} ~i~0 := 2 + ~i~0; {15981#(<= main_~i~0 18)} is VALID [2018-11-23 12:13:59,221 INFO L273 TraceCheckUtils]: 33: Hoare triple {15981#(<= main_~i~0 18)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15981#(<= main_~i~0 18)} is VALID [2018-11-23 12:13:59,222 INFO L273 TraceCheckUtils]: 34: Hoare triple {15981#(<= main_~i~0 18)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15981#(<= main_~i~0 18)} is VALID [2018-11-23 12:13:59,222 INFO L273 TraceCheckUtils]: 35: Hoare triple {15981#(<= main_~i~0 18)} ~i~0 := 2 + ~i~0; {15982#(<= main_~i~0 20)} is VALID [2018-11-23 12:13:59,223 INFO L273 TraceCheckUtils]: 36: Hoare triple {15982#(<= main_~i~0 20)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15982#(<= main_~i~0 20)} is VALID [2018-11-23 12:13:59,223 INFO L273 TraceCheckUtils]: 37: Hoare triple {15982#(<= main_~i~0 20)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15982#(<= main_~i~0 20)} is VALID [2018-11-23 12:13:59,224 INFO L273 TraceCheckUtils]: 38: Hoare triple {15982#(<= main_~i~0 20)} ~i~0 := 2 + ~i~0; {15983#(<= main_~i~0 22)} is VALID [2018-11-23 12:13:59,225 INFO L273 TraceCheckUtils]: 39: Hoare triple {15983#(<= main_~i~0 22)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15983#(<= main_~i~0 22)} is VALID [2018-11-23 12:13:59,225 INFO L273 TraceCheckUtils]: 40: Hoare triple {15983#(<= main_~i~0 22)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15983#(<= main_~i~0 22)} is VALID [2018-11-23 12:13:59,226 INFO L273 TraceCheckUtils]: 41: Hoare triple {15983#(<= main_~i~0 22)} ~i~0 := 2 + ~i~0; {15984#(<= main_~i~0 24)} is VALID [2018-11-23 12:13:59,226 INFO L273 TraceCheckUtils]: 42: Hoare triple {15984#(<= main_~i~0 24)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15984#(<= main_~i~0 24)} is VALID [2018-11-23 12:13:59,227 INFO L273 TraceCheckUtils]: 43: Hoare triple {15984#(<= main_~i~0 24)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15984#(<= main_~i~0 24)} is VALID [2018-11-23 12:13:59,228 INFO L273 TraceCheckUtils]: 44: Hoare triple {15984#(<= main_~i~0 24)} ~i~0 := 2 + ~i~0; {15985#(<= main_~i~0 26)} is VALID [2018-11-23 12:13:59,228 INFO L273 TraceCheckUtils]: 45: Hoare triple {15985#(<= main_~i~0 26)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15985#(<= main_~i~0 26)} is VALID [2018-11-23 12:13:59,229 INFO L273 TraceCheckUtils]: 46: Hoare triple {15985#(<= main_~i~0 26)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15985#(<= main_~i~0 26)} is VALID [2018-11-23 12:13:59,229 INFO L273 TraceCheckUtils]: 47: Hoare triple {15985#(<= main_~i~0 26)} ~i~0 := 2 + ~i~0; {15986#(<= main_~i~0 28)} is VALID [2018-11-23 12:13:59,230 INFO L273 TraceCheckUtils]: 48: Hoare triple {15986#(<= main_~i~0 28)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15986#(<= main_~i~0 28)} is VALID [2018-11-23 12:13:59,230 INFO L273 TraceCheckUtils]: 49: Hoare triple {15986#(<= main_~i~0 28)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15986#(<= main_~i~0 28)} is VALID [2018-11-23 12:13:59,231 INFO L273 TraceCheckUtils]: 50: Hoare triple {15986#(<= main_~i~0 28)} ~i~0 := 2 + ~i~0; {15987#(<= main_~i~0 30)} is VALID [2018-11-23 12:13:59,232 INFO L273 TraceCheckUtils]: 51: Hoare triple {15987#(<= main_~i~0 30)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15987#(<= main_~i~0 30)} is VALID [2018-11-23 12:13:59,232 INFO L273 TraceCheckUtils]: 52: Hoare triple {15987#(<= main_~i~0 30)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15987#(<= main_~i~0 30)} is VALID [2018-11-23 12:13:59,233 INFO L273 TraceCheckUtils]: 53: Hoare triple {15987#(<= main_~i~0 30)} ~i~0 := 2 + ~i~0; {15988#(<= main_~i~0 32)} is VALID [2018-11-23 12:13:59,233 INFO L273 TraceCheckUtils]: 54: Hoare triple {15988#(<= main_~i~0 32)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15988#(<= main_~i~0 32)} is VALID [2018-11-23 12:13:59,234 INFO L273 TraceCheckUtils]: 55: Hoare triple {15988#(<= main_~i~0 32)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15988#(<= main_~i~0 32)} is VALID [2018-11-23 12:13:59,235 INFO L273 TraceCheckUtils]: 56: Hoare triple {15988#(<= main_~i~0 32)} ~i~0 := 2 + ~i~0; {15989#(<= main_~i~0 34)} is VALID [2018-11-23 12:13:59,235 INFO L273 TraceCheckUtils]: 57: Hoare triple {15989#(<= main_~i~0 34)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15989#(<= main_~i~0 34)} is VALID [2018-11-23 12:13:59,236 INFO L273 TraceCheckUtils]: 58: Hoare triple {15989#(<= main_~i~0 34)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15989#(<= main_~i~0 34)} is VALID [2018-11-23 12:13:59,236 INFO L273 TraceCheckUtils]: 59: Hoare triple {15989#(<= main_~i~0 34)} ~i~0 := 2 + ~i~0; {15990#(<= main_~i~0 36)} is VALID [2018-11-23 12:13:59,237 INFO L273 TraceCheckUtils]: 60: Hoare triple {15990#(<= main_~i~0 36)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15990#(<= main_~i~0 36)} is VALID [2018-11-23 12:13:59,238 INFO L273 TraceCheckUtils]: 61: Hoare triple {15990#(<= main_~i~0 36)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15990#(<= main_~i~0 36)} is VALID [2018-11-23 12:13:59,238 INFO L273 TraceCheckUtils]: 62: Hoare triple {15990#(<= main_~i~0 36)} ~i~0 := 2 + ~i~0; {15991#(<= main_~i~0 38)} is VALID [2018-11-23 12:13:59,239 INFO L273 TraceCheckUtils]: 63: Hoare triple {15991#(<= main_~i~0 38)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15991#(<= main_~i~0 38)} is VALID [2018-11-23 12:13:59,239 INFO L273 TraceCheckUtils]: 64: Hoare triple {15991#(<= main_~i~0 38)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15991#(<= main_~i~0 38)} is VALID [2018-11-23 12:13:59,240 INFO L273 TraceCheckUtils]: 65: Hoare triple {15991#(<= main_~i~0 38)} ~i~0 := 2 + ~i~0; {15992#(<= main_~i~0 40)} is VALID [2018-11-23 12:13:59,241 INFO L273 TraceCheckUtils]: 66: Hoare triple {15992#(<= main_~i~0 40)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15992#(<= main_~i~0 40)} is VALID [2018-11-23 12:13:59,241 INFO L273 TraceCheckUtils]: 67: Hoare triple {15992#(<= main_~i~0 40)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15992#(<= main_~i~0 40)} is VALID [2018-11-23 12:13:59,242 INFO L273 TraceCheckUtils]: 68: Hoare triple {15992#(<= main_~i~0 40)} ~i~0 := 2 + ~i~0; {15993#(<= main_~i~0 42)} is VALID [2018-11-23 12:13:59,242 INFO L273 TraceCheckUtils]: 69: Hoare triple {15993#(<= main_~i~0 42)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15993#(<= main_~i~0 42)} is VALID [2018-11-23 12:13:59,243 INFO L273 TraceCheckUtils]: 70: Hoare triple {15993#(<= main_~i~0 42)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15993#(<= main_~i~0 42)} is VALID [2018-11-23 12:13:59,244 INFO L273 TraceCheckUtils]: 71: Hoare triple {15993#(<= main_~i~0 42)} ~i~0 := 2 + ~i~0; {15994#(<= main_~i~0 44)} is VALID [2018-11-23 12:13:59,244 INFO L273 TraceCheckUtils]: 72: Hoare triple {15994#(<= main_~i~0 44)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15994#(<= main_~i~0 44)} is VALID [2018-11-23 12:13:59,245 INFO L273 TraceCheckUtils]: 73: Hoare triple {15994#(<= main_~i~0 44)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15994#(<= main_~i~0 44)} is VALID [2018-11-23 12:13:59,245 INFO L273 TraceCheckUtils]: 74: Hoare triple {15994#(<= main_~i~0 44)} ~i~0 := 2 + ~i~0; {15995#(<= main_~i~0 46)} is VALID [2018-11-23 12:13:59,246 INFO L273 TraceCheckUtils]: 75: Hoare triple {15995#(<= main_~i~0 46)} assume !!(~i~0 < 100000);assume -2147483648 <= #t~nondet0 && #t~nondet0 <= 2147483647;call write~int(#t~nondet0, ~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4);havoc #t~nondet0;call #t~mem1 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15995#(<= main_~i~0 46)} is VALID [2018-11-23 12:13:59,246 INFO L273 TraceCheckUtils]: 76: Hoare triple {15995#(<= main_~i~0 46)} assume 10 == #t~mem1;havoc #t~mem1;call write~int(20, ~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15995#(<= main_~i~0 46)} is VALID [2018-11-23 12:13:59,247 INFO L273 TraceCheckUtils]: 77: Hoare triple {15995#(<= main_~i~0 46)} ~i~0 := 2 + ~i~0; {15996#(<= main_~i~0 48)} is VALID [2018-11-23 12:13:59,248 INFO L273 TraceCheckUtils]: 78: Hoare triple {15996#(<= main_~i~0 48)} assume !(~i~0 < 100000); {15971#false} is VALID [2018-11-23 12:13:59,248 INFO L273 TraceCheckUtils]: 79: Hoare triple {15971#false} ~i~0 := 0; {15971#false} is VALID [2018-11-23 12:13:59,248 INFO L273 TraceCheckUtils]: 80: Hoare triple {15971#false} assume !!(~i~0 < 100000);call #t~mem2 := read~int(~#a~0.base, ~#a~0.offset + 4 * ~i~0, 4); {15971#false} is VALID [2018-11-23 12:13:59,248 INFO L273 TraceCheckUtils]: 81: Hoare triple {15971#false} assume 10 == #t~mem2;havoc #t~mem2;call #t~mem3 := read~int(~#b~0.base, ~#b~0.offset + 4 * ~i~0, 4); {15971#false} is VALID [2018-11-23 12:13:59,249 INFO L256 TraceCheckUtils]: 82: Hoare triple {15971#false} call __VERIFIER_assert((if 20 == #t~mem3 then 1 else 0)); {15971#false} is VALID [2018-11-23 12:13:59,249 INFO L273 TraceCheckUtils]: 83: Hoare triple {15971#false} ~cond := #in~cond; {15971#false} is VALID [2018-11-23 12:13:59,249 INFO L273 TraceCheckUtils]: 84: Hoare triple {15971#false} assume 0 == ~cond; {15971#false} is VALID [2018-11-23 12:13:59,249 INFO L273 TraceCheckUtils]: 85: Hoare triple {15971#false} assume !false; {15971#false} is VALID [2018-11-23 12:13:59,255 INFO L134 CoverageAnalysis]: Checked inductivity of 852 backedges. 0 proven. 852 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 12:13:59,256 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 12:13:59,256 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 12:13:59,264 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE