java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 13:04:53,011 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 13:04:53,013 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 13:04:53,025 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 13:04:53,025 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 13:04:53,026 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 13:04:53,028 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 13:04:53,029 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 13:04:53,031 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 13:04:53,032 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 13:04:53,033 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 13:04:53,033 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 13:04:53,034 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 13:04:53,035 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 13:04:53,036 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 13:04:53,037 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 13:04:53,038 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 13:04:53,040 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 13:04:53,042 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 13:04:53,043 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 13:04:53,044 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 13:04:53,045 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 13:04:53,048 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 13:04:53,048 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 13:04:53,048 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 13:04:53,049 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 13:04:53,050 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 13:04:53,051 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 13:04:53,052 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 13:04:53,053 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 13:04:53,053 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 13:04:53,054 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 13:04:53,054 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 13:04:53,054 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 13:04:53,055 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 13:04:53,056 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 13:04:53,056 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 13:04:53,071 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 13:04:53,071 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 13:04:53,072 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 13:04:53,072 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 13:04:53,073 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 13:04:53,073 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 13:04:53,073 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 13:04:53,073 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 13:04:53,074 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 13:04:53,074 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 13:04:53,074 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 13:04:53,074 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 13:04:53,074 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 13:04:53,074 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 13:04:53,075 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 13:04:53,075 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 13:04:53,075 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 13:04:53,075 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 13:04:53,075 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 13:04:53,076 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 13:04:53,076 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 13:04:53,076 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 13:04:53,076 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 13:04:53,076 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 13:04:53,077 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 13:04:53,077 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 13:04:53,077 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 13:04:53,077 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 13:04:53,077 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 13:04:53,077 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 13:04:53,078 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 13:04:53,142 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 13:04:53,161 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 13:04:53,166 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 13:04:53,168 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 13:04:53,168 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 13:04:53,169 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i [2018-11-23 13:04:53,243 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cf4fd1cdb/cf6ed009bc0b463cacea4db8130fbfc1/FLAG1a939dfe7 [2018-11-23 13:04:53,667 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 13:04:53,668 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i [2018-11-23 13:04:53,674 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cf4fd1cdb/cf6ed009bc0b463cacea4db8130fbfc1/FLAG1a939dfe7 [2018-11-23 13:04:54,047 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cf4fd1cdb/cf6ed009bc0b463cacea4db8130fbfc1 [2018-11-23 13:04:54,057 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 13:04:54,059 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 13:04:54,060 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 13:04:54,060 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 13:04:54,066 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 13:04:54,067 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,070 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@11cb998 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54, skipping insertion in model container [2018-11-23 13:04:54,071 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,081 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 13:04:54,105 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 13:04:54,308 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 13:04:54,314 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 13:04:54,335 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 13:04:54,351 INFO L195 MainTranslator]: Completed translation [2018-11-23 13:04:54,352 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54 WrapperNode [2018-11-23 13:04:54,352 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 13:04:54,353 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 13:04:54,353 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 13:04:54,353 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 13:04:54,363 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,369 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,376 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 13:04:54,376 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 13:04:54,376 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 13:04:54,377 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 13:04:54,384 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,385 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,385 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,385 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,392 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,400 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,401 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... [2018-11-23 13:04:54,402 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 13:04:54,402 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 13:04:54,402 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 13:04:54,402 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 13:04:54,403 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 13:04:54,518 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 13:04:54,518 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 13:04:54,519 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 13:04:54,519 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 13:04:54,519 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 13:04:54,519 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 13:04:54,519 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 13:04:54,519 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 13:04:54,879 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 13:04:54,879 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-23 13:04:54,880 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 01:04:54 BoogieIcfgContainer [2018-11-23 13:04:54,880 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 13:04:54,880 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 13:04:54,882 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 13:04:54,885 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 13:04:54,886 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 01:04:54" (1/3) ... [2018-11-23 13:04:54,887 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4bf7e94e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 01:04:54, skipping insertion in model container [2018-11-23 13:04:54,887 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:04:54" (2/3) ... [2018-11-23 13:04:54,887 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4bf7e94e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 01:04:54, skipping insertion in model container [2018-11-23 13:04:54,888 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 01:04:54" (3/3) ... [2018-11-23 13:04:54,889 INFO L112 eAbstractionObserver]: Analyzing ICFG const_false-unreach-call1.i [2018-11-23 13:04:54,897 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 13:04:54,904 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 13:04:54,921 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 13:04:54,950 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 13:04:54,951 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 13:04:54,951 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 13:04:54,951 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 13:04:54,951 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 13:04:54,951 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 13:04:54,951 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 13:04:54,951 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 13:04:54,951 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 13:04:54,968 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states. [2018-11-23 13:04:54,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-23 13:04:54,974 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:04:54,975 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:04:54,977 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:04:54,983 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:04:54,983 INFO L82 PathProgramCache]: Analyzing trace with hash 1846144830, now seen corresponding path program 1 times [2018-11-23 13:04:54,985 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:04:54,985 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:04:55,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:55,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:04:55,032 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:55,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:55,284 INFO L256 TraceCheckUtils]: 0: Hoare triple {20#true} call ULTIMATE.init(); {20#true} is VALID [2018-11-23 13:04:55,287 INFO L273 TraceCheckUtils]: 1: Hoare triple {20#true} assume true; {20#true} is VALID [2018-11-23 13:04:55,288 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {20#true} {20#true} #31#return; {20#true} is VALID [2018-11-23 13:04:55,288 INFO L256 TraceCheckUtils]: 3: Hoare triple {20#true} call #t~ret1 := main(); {20#true} is VALID [2018-11-23 13:04:55,289 INFO L273 TraceCheckUtils]: 4: Hoare triple {20#true} ~x~0 := 1;~y~0 := 0; {22#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:55,290 INFO L273 TraceCheckUtils]: 5: Hoare triple {22#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !(~y~0 % 4294967296 < 1024); {21#false} is VALID [2018-11-23 13:04:55,291 INFO L256 TraceCheckUtils]: 6: Hoare triple {21#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {21#false} is VALID [2018-11-23 13:04:55,291 INFO L273 TraceCheckUtils]: 7: Hoare triple {21#false} ~cond := #in~cond; {21#false} is VALID [2018-11-23 13:04:55,291 INFO L273 TraceCheckUtils]: 8: Hoare triple {21#false} assume 0 == ~cond; {21#false} is VALID [2018-11-23 13:04:55,292 INFO L273 TraceCheckUtils]: 9: Hoare triple {21#false} assume !false; {21#false} is VALID [2018-11-23 13:04:55,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:55,297 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:04:55,297 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 13:04:55,302 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2018-11-23 13:04:55,305 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:04:55,309 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 13:04:55,354 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 10 edges. 10 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:55,355 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 13:04:55,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 13:04:55,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:04:55,367 INFO L87 Difference]: Start difference. First operand 17 states. Second operand 3 states. [2018-11-23 13:04:55,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:55,849 INFO L93 Difference]: Finished difference Result 29 states and 34 transitions. [2018-11-23 13:04:55,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 13:04:55,850 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2018-11-23 13:04:55,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:04:55,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 13:04:55,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2018-11-23 13:04:55,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 13:04:55,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2018-11-23 13:04:55,871 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 34 transitions. [2018-11-23 13:04:56,108 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:56,116 INFO L225 Difference]: With dead ends: 29 [2018-11-23 13:04:56,117 INFO L226 Difference]: Without dead ends: 12 [2018-11-23 13:04:56,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:04:56,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states. [2018-11-23 13:04:56,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2018-11-23 13:04:56,175 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:04:56,176 INFO L82 GeneralOperation]: Start isEquivalent. First operand 12 states. Second operand 12 states. [2018-11-23 13:04:56,177 INFO L74 IsIncluded]: Start isIncluded. First operand 12 states. Second operand 12 states. [2018-11-23 13:04:56,177 INFO L87 Difference]: Start difference. First operand 12 states. Second operand 12 states. [2018-11-23 13:04:56,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:56,180 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2018-11-23 13:04:56,181 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2018-11-23 13:04:56,181 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:56,181 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:56,181 INFO L74 IsIncluded]: Start isIncluded. First operand 12 states. Second operand 12 states. [2018-11-23 13:04:56,182 INFO L87 Difference]: Start difference. First operand 12 states. Second operand 12 states. [2018-11-23 13:04:56,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:56,184 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2018-11-23 13:04:56,185 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2018-11-23 13:04:56,185 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:56,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:56,185 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:04:56,186 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:04:56,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 13:04:56,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2018-11-23 13:04:56,189 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 10 [2018-11-23 13:04:56,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:04:56,189 INFO L480 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2018-11-23 13:04:56,190 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 13:04:56,190 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2018-11-23 13:04:56,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-11-23 13:04:56,190 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:04:56,191 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:04:56,191 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:04:56,191 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:04:56,192 INFO L82 PathProgramCache]: Analyzing trace with hash 1432376145, now seen corresponding path program 1 times [2018-11-23 13:04:56,192 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:04:56,192 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:04:56,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:56,193 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:04:56,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:56,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:56,399 INFO L256 TraceCheckUtils]: 0: Hoare triple {108#true} call ULTIMATE.init(); {108#true} is VALID [2018-11-23 13:04:56,399 INFO L273 TraceCheckUtils]: 1: Hoare triple {108#true} assume true; {108#true} is VALID [2018-11-23 13:04:56,400 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {108#true} {108#true} #31#return; {108#true} is VALID [2018-11-23 13:04:56,400 INFO L256 TraceCheckUtils]: 3: Hoare triple {108#true} call #t~ret1 := main(); {108#true} is VALID [2018-11-23 13:04:56,401 INFO L273 TraceCheckUtils]: 4: Hoare triple {108#true} ~x~0 := 1;~y~0 := 0; {110#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:56,402 INFO L273 TraceCheckUtils]: 5: Hoare triple {110#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {111#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:56,403 INFO L273 TraceCheckUtils]: 6: Hoare triple {111#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 1))} assume !(~y~0 % 4294967296 < 1024); {109#false} is VALID [2018-11-23 13:04:56,403 INFO L256 TraceCheckUtils]: 7: Hoare triple {109#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {109#false} is VALID [2018-11-23 13:04:56,403 INFO L273 TraceCheckUtils]: 8: Hoare triple {109#false} ~cond := #in~cond; {109#false} is VALID [2018-11-23 13:04:56,404 INFO L273 TraceCheckUtils]: 9: Hoare triple {109#false} assume 0 == ~cond; {109#false} is VALID [2018-11-23 13:04:56,404 INFO L273 TraceCheckUtils]: 10: Hoare triple {109#false} assume !false; {109#false} is VALID [2018-11-23 13:04:56,405 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:56,405 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:04:56,405 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:04:56,421 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:04:56,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:56,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:56,473 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:04:56,612 INFO L256 TraceCheckUtils]: 0: Hoare triple {108#true} call ULTIMATE.init(); {108#true} is VALID [2018-11-23 13:04:56,612 INFO L273 TraceCheckUtils]: 1: Hoare triple {108#true} assume true; {108#true} is VALID [2018-11-23 13:04:56,613 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {108#true} {108#true} #31#return; {108#true} is VALID [2018-11-23 13:04:56,613 INFO L256 TraceCheckUtils]: 3: Hoare triple {108#true} call #t~ret1 := main(); {108#true} is VALID [2018-11-23 13:04:56,618 INFO L273 TraceCheckUtils]: 4: Hoare triple {108#true} ~x~0 := 1;~y~0 := 0; {110#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:56,620 INFO L273 TraceCheckUtils]: 5: Hoare triple {110#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {130#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:56,621 INFO L273 TraceCheckUtils]: 6: Hoare triple {130#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !(~y~0 % 4294967296 < 1024); {109#false} is VALID [2018-11-23 13:04:56,621 INFO L256 TraceCheckUtils]: 7: Hoare triple {109#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {109#false} is VALID [2018-11-23 13:04:56,621 INFO L273 TraceCheckUtils]: 8: Hoare triple {109#false} ~cond := #in~cond; {109#false} is VALID [2018-11-23 13:04:56,621 INFO L273 TraceCheckUtils]: 9: Hoare triple {109#false} assume 0 == ~cond; {109#false} is VALID [2018-11-23 13:04:56,622 INFO L273 TraceCheckUtils]: 10: Hoare triple {109#false} assume !false; {109#false} is VALID [2018-11-23 13:04:56,624 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:56,647 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:04:56,647 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-23 13:04:56,647 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-11-23 13:04:56,648 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:04:56,648 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 13:04:56,684 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:56,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:04:56,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:04:56,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:04:56,685 INFO L87 Difference]: Start difference. First operand 12 states and 12 transitions. Second operand 5 states. [2018-11-23 13:04:56,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:56,864 INFO L93 Difference]: Finished difference Result 18 states and 18 transitions. [2018-11-23 13:04:56,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 13:04:56,864 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-11-23 13:04:56,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:04:56,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 13:04:56,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2018-11-23 13:04:56,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 13:04:56,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2018-11-23 13:04:56,869 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 18 transitions. [2018-11-23 13:04:57,014 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:57,016 INFO L225 Difference]: With dead ends: 18 [2018-11-23 13:04:57,016 INFO L226 Difference]: Without dead ends: 13 [2018-11-23 13:04:57,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 10 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:04:57,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-11-23 13:04:57,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-11-23 13:04:57,185 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:04:57,185 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand 13 states. [2018-11-23 13:04:57,186 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand 13 states. [2018-11-23 13:04:57,186 INFO L87 Difference]: Start difference. First operand 13 states. Second operand 13 states. [2018-11-23 13:04:57,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:57,189 INFO L93 Difference]: Finished difference Result 13 states and 13 transitions. [2018-11-23 13:04:57,189 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-11-23 13:04:57,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:57,191 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:57,191 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand 13 states. [2018-11-23 13:04:57,191 INFO L87 Difference]: Start difference. First operand 13 states. Second operand 13 states. [2018-11-23 13:04:57,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:57,194 INFO L93 Difference]: Finished difference Result 13 states and 13 transitions. [2018-11-23 13:04:57,195 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-11-23 13:04:57,195 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:57,195 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:57,196 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:04:57,196 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:04:57,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 13:04:57,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-11-23 13:04:57,198 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 11 [2018-11-23 13:04:57,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:04:57,198 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-11-23 13:04:57,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:04:57,199 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-11-23 13:04:57,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-11-23 13:04:57,200 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:04:57,200 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:04:57,200 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:04:57,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:04:57,203 INFO L82 PathProgramCache]: Analyzing trace with hash 1490448798, now seen corresponding path program 2 times [2018-11-23 13:04:57,203 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:04:57,203 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:04:57,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:57,205 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:04:57,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:57,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:57,498 INFO L256 TraceCheckUtils]: 0: Hoare triple {222#true} call ULTIMATE.init(); {222#true} is VALID [2018-11-23 13:04:57,498 INFO L273 TraceCheckUtils]: 1: Hoare triple {222#true} assume true; {222#true} is VALID [2018-11-23 13:04:57,499 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {222#true} {222#true} #31#return; {222#true} is VALID [2018-11-23 13:04:57,499 INFO L256 TraceCheckUtils]: 3: Hoare triple {222#true} call #t~ret1 := main(); {222#true} is VALID [2018-11-23 13:04:57,499 INFO L273 TraceCheckUtils]: 4: Hoare triple {222#true} ~x~0 := 1;~y~0 := 0; {224#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:57,500 INFO L273 TraceCheckUtils]: 5: Hoare triple {224#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {225#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:57,502 INFO L273 TraceCheckUtils]: 6: Hoare triple {225#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {226#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 2))} is VALID [2018-11-23 13:04:57,504 INFO L273 TraceCheckUtils]: 7: Hoare triple {226#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 2))} assume !(~y~0 % 4294967296 < 1024); {223#false} is VALID [2018-11-23 13:04:57,504 INFO L256 TraceCheckUtils]: 8: Hoare triple {223#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {223#false} is VALID [2018-11-23 13:04:57,505 INFO L273 TraceCheckUtils]: 9: Hoare triple {223#false} ~cond := #in~cond; {223#false} is VALID [2018-11-23 13:04:57,505 INFO L273 TraceCheckUtils]: 10: Hoare triple {223#false} assume 0 == ~cond; {223#false} is VALID [2018-11-23 13:04:57,505 INFO L273 TraceCheckUtils]: 11: Hoare triple {223#false} assume !false; {223#false} is VALID [2018-11-23 13:04:57,506 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:57,506 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:04:57,507 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:04:57,516 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:04:57,528 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:04:57,528 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:04:57,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:57,551 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:04:57,642 INFO L256 TraceCheckUtils]: 0: Hoare triple {222#true} call ULTIMATE.init(); {222#true} is VALID [2018-11-23 13:04:57,642 INFO L273 TraceCheckUtils]: 1: Hoare triple {222#true} assume true; {222#true} is VALID [2018-11-23 13:04:57,643 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {222#true} {222#true} #31#return; {222#true} is VALID [2018-11-23 13:04:57,643 INFO L256 TraceCheckUtils]: 3: Hoare triple {222#true} call #t~ret1 := main(); {222#true} is VALID [2018-11-23 13:04:57,644 INFO L273 TraceCheckUtils]: 4: Hoare triple {222#true} ~x~0 := 1;~y~0 := 0; {224#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:57,645 INFO L273 TraceCheckUtils]: 5: Hoare triple {224#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {225#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:57,647 INFO L273 TraceCheckUtils]: 6: Hoare triple {225#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {248#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:04:57,651 INFO L273 TraceCheckUtils]: 7: Hoare triple {248#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {223#false} is VALID [2018-11-23 13:04:57,651 INFO L256 TraceCheckUtils]: 8: Hoare triple {223#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {223#false} is VALID [2018-11-23 13:04:57,652 INFO L273 TraceCheckUtils]: 9: Hoare triple {223#false} ~cond := #in~cond; {223#false} is VALID [2018-11-23 13:04:57,652 INFO L273 TraceCheckUtils]: 10: Hoare triple {223#false} assume 0 == ~cond; {223#false} is VALID [2018-11-23 13:04:57,652 INFO L273 TraceCheckUtils]: 11: Hoare triple {223#false} assume !false; {223#false} is VALID [2018-11-23 13:04:57,653 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:57,672 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:04:57,672 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-11-23 13:04:57,672 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2018-11-23 13:04:57,673 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:04:57,673 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 13:04:57,695 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:57,695 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:04:57,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:04:57,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:04:57,697 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 6 states. [2018-11-23 13:04:57,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:57,810 INFO L93 Difference]: Finished difference Result 19 states and 19 transitions. [2018-11-23 13:04:57,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 13:04:57,810 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2018-11-23 13:04:57,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:04:57,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 13:04:57,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 19 transitions. [2018-11-23 13:04:57,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 13:04:57,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 19 transitions. [2018-11-23 13:04:57,815 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 19 transitions. [2018-11-23 13:04:57,878 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:57,879 INFO L225 Difference]: With dead ends: 19 [2018-11-23 13:04:57,879 INFO L226 Difference]: Without dead ends: 14 [2018-11-23 13:04:57,882 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:04:57,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-11-23 13:04:57,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-11-23 13:04:57,942 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:04:57,942 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand 14 states. [2018-11-23 13:04:57,943 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand 14 states. [2018-11-23 13:04:57,943 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 14 states. [2018-11-23 13:04:57,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:57,944 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2018-11-23 13:04:57,944 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-11-23 13:04:57,945 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:57,945 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:57,945 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand 14 states. [2018-11-23 13:04:57,945 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 14 states. [2018-11-23 13:04:57,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:57,947 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2018-11-23 13:04:57,947 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-11-23 13:04:57,947 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:57,947 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:57,948 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:04:57,948 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:04:57,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 13:04:57,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2018-11-23 13:04:57,949 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 12 [2018-11-23 13:04:57,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:04:57,950 INFO L480 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2018-11-23 13:04:57,950 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:04:57,950 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-11-23 13:04:57,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-23 13:04:57,950 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:04:57,951 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:04:57,951 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:04:57,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:04:57,951 INFO L82 PathProgramCache]: Analyzing trace with hash -1004266255, now seen corresponding path program 3 times [2018-11-23 13:04:57,952 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:04:57,952 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:04:57,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:57,953 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:04:57,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:57,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:58,123 INFO L256 TraceCheckUtils]: 0: Hoare triple {346#true} call ULTIMATE.init(); {346#true} is VALID [2018-11-23 13:04:58,124 INFO L273 TraceCheckUtils]: 1: Hoare triple {346#true} assume true; {346#true} is VALID [2018-11-23 13:04:58,124 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {346#true} {346#true} #31#return; {346#true} is VALID [2018-11-23 13:04:58,124 INFO L256 TraceCheckUtils]: 3: Hoare triple {346#true} call #t~ret1 := main(); {346#true} is VALID [2018-11-23 13:04:58,125 INFO L273 TraceCheckUtils]: 4: Hoare triple {346#true} ~x~0 := 1;~y~0 := 0; {348#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:58,127 INFO L273 TraceCheckUtils]: 5: Hoare triple {348#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {349#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:58,130 INFO L273 TraceCheckUtils]: 6: Hoare triple {349#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {350#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:04:58,132 INFO L273 TraceCheckUtils]: 7: Hoare triple {350#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {351#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 3))} is VALID [2018-11-23 13:04:58,133 INFO L273 TraceCheckUtils]: 8: Hoare triple {351#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 3))} assume !(~y~0 % 4294967296 < 1024); {347#false} is VALID [2018-11-23 13:04:58,133 INFO L256 TraceCheckUtils]: 9: Hoare triple {347#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {347#false} is VALID [2018-11-23 13:04:58,133 INFO L273 TraceCheckUtils]: 10: Hoare triple {347#false} ~cond := #in~cond; {347#false} is VALID [2018-11-23 13:04:58,134 INFO L273 TraceCheckUtils]: 11: Hoare triple {347#false} assume 0 == ~cond; {347#false} is VALID [2018-11-23 13:04:58,134 INFO L273 TraceCheckUtils]: 12: Hoare triple {347#false} assume !false; {347#false} is VALID [2018-11-23 13:04:58,134 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:58,135 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:04:58,135 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:04:58,144 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 13:04:58,158 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-23 13:04:58,158 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:04:58,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:58,168 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:04:58,342 INFO L256 TraceCheckUtils]: 0: Hoare triple {346#true} call ULTIMATE.init(); {346#true} is VALID [2018-11-23 13:04:58,343 INFO L273 TraceCheckUtils]: 1: Hoare triple {346#true} assume true; {346#true} is VALID [2018-11-23 13:04:58,343 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {346#true} {346#true} #31#return; {346#true} is VALID [2018-11-23 13:04:58,343 INFO L256 TraceCheckUtils]: 3: Hoare triple {346#true} call #t~ret1 := main(); {346#true} is VALID [2018-11-23 13:04:58,344 INFO L273 TraceCheckUtils]: 4: Hoare triple {346#true} ~x~0 := 1;~y~0 := 0; {348#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:58,351 INFO L273 TraceCheckUtils]: 5: Hoare triple {348#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {349#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:58,352 INFO L273 TraceCheckUtils]: 6: Hoare triple {349#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {350#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:04:58,356 INFO L273 TraceCheckUtils]: 7: Hoare triple {350#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {376#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:04:58,356 INFO L273 TraceCheckUtils]: 8: Hoare triple {376#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {347#false} is VALID [2018-11-23 13:04:58,357 INFO L256 TraceCheckUtils]: 9: Hoare triple {347#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {347#false} is VALID [2018-11-23 13:04:58,357 INFO L273 TraceCheckUtils]: 10: Hoare triple {347#false} ~cond := #in~cond; {347#false} is VALID [2018-11-23 13:04:58,357 INFO L273 TraceCheckUtils]: 11: Hoare triple {347#false} assume 0 == ~cond; {347#false} is VALID [2018-11-23 13:04:58,357 INFO L273 TraceCheckUtils]: 12: Hoare triple {347#false} assume !false; {347#false} is VALID [2018-11-23 13:04:58,358 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:58,379 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:04:58,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-11-23 13:04:58,379 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 13 [2018-11-23 13:04:58,380 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:04:58,380 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-23 13:04:58,395 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:58,395 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 13:04:58,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 13:04:58,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:04:58,396 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand 7 states. [2018-11-23 13:04:58,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:58,533 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-11-23 13:04:58,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 13:04:58,534 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 13 [2018-11-23 13:04:58,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:04:58,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 13:04:58,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 20 transitions. [2018-11-23 13:04:58,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 13:04:58,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 20 transitions. [2018-11-23 13:04:58,539 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 20 transitions. [2018-11-23 13:04:58,591 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:58,593 INFO L225 Difference]: With dead ends: 20 [2018-11-23 13:04:58,593 INFO L226 Difference]: Without dead ends: 15 [2018-11-23 13:04:58,594 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 12 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:04:58,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2018-11-23 13:04:58,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-11-23 13:04:58,608 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:04:58,608 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand 15 states. [2018-11-23 13:04:58,608 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand 15 states. [2018-11-23 13:04:58,608 INFO L87 Difference]: Start difference. First operand 15 states. Second operand 15 states. [2018-11-23 13:04:58,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:58,609 INFO L93 Difference]: Finished difference Result 15 states and 15 transitions. [2018-11-23 13:04:58,610 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-11-23 13:04:58,610 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:58,610 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:58,610 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand 15 states. [2018-11-23 13:04:58,610 INFO L87 Difference]: Start difference. First operand 15 states. Second operand 15 states. [2018-11-23 13:04:58,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:58,613 INFO L93 Difference]: Finished difference Result 15 states and 15 transitions. [2018-11-23 13:04:58,613 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-11-23 13:04:58,613 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:58,614 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:58,614 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:04:58,614 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:04:58,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 13:04:58,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-11-23 13:04:58,616 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 13 [2018-11-23 13:04:58,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:04:58,616 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-11-23 13:04:58,616 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 13:04:58,617 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-11-23 13:04:58,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 13:04:58,617 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:04:58,618 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:04:58,618 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:04:58,618 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:04:58,618 INFO L82 PathProgramCache]: Analyzing trace with hash -1031021570, now seen corresponding path program 4 times [2018-11-23 13:04:58,618 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:04:58,619 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:04:58,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:58,620 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:04:58,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:58,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:59,035 INFO L256 TraceCheckUtils]: 0: Hoare triple {480#true} call ULTIMATE.init(); {480#true} is VALID [2018-11-23 13:04:59,036 INFO L273 TraceCheckUtils]: 1: Hoare triple {480#true} assume true; {480#true} is VALID [2018-11-23 13:04:59,036 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {480#true} {480#true} #31#return; {480#true} is VALID [2018-11-23 13:04:59,036 INFO L256 TraceCheckUtils]: 3: Hoare triple {480#true} call #t~ret1 := main(); {480#true} is VALID [2018-11-23 13:04:59,037 INFO L273 TraceCheckUtils]: 4: Hoare triple {480#true} ~x~0 := 1;~y~0 := 0; {482#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:59,042 INFO L273 TraceCheckUtils]: 5: Hoare triple {482#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {483#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:59,042 INFO L273 TraceCheckUtils]: 6: Hoare triple {483#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {484#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:04:59,043 INFO L273 TraceCheckUtils]: 7: Hoare triple {484#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {485#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:04:59,044 INFO L273 TraceCheckUtils]: 8: Hoare triple {485#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {486#(and (<= main_~y~0 4) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:04:59,045 INFO L273 TraceCheckUtils]: 9: Hoare triple {486#(and (<= main_~y~0 4) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {481#false} is VALID [2018-11-23 13:04:59,045 INFO L256 TraceCheckUtils]: 10: Hoare triple {481#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {481#false} is VALID [2018-11-23 13:04:59,045 INFO L273 TraceCheckUtils]: 11: Hoare triple {481#false} ~cond := #in~cond; {481#false} is VALID [2018-11-23 13:04:59,046 INFO L273 TraceCheckUtils]: 12: Hoare triple {481#false} assume 0 == ~cond; {481#false} is VALID [2018-11-23 13:04:59,046 INFO L273 TraceCheckUtils]: 13: Hoare triple {481#false} assume !false; {481#false} is VALID [2018-11-23 13:04:59,047 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:59,047 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:04:59,047 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:04:59,056 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 13:04:59,065 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 13:04:59,065 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:04:59,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:59,085 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:04:59,190 INFO L256 TraceCheckUtils]: 0: Hoare triple {480#true} call ULTIMATE.init(); {480#true} is VALID [2018-11-23 13:04:59,190 INFO L273 TraceCheckUtils]: 1: Hoare triple {480#true} assume true; {480#true} is VALID [2018-11-23 13:04:59,191 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {480#true} {480#true} #31#return; {480#true} is VALID [2018-11-23 13:04:59,191 INFO L256 TraceCheckUtils]: 3: Hoare triple {480#true} call #t~ret1 := main(); {480#true} is VALID [2018-11-23 13:04:59,192 INFO L273 TraceCheckUtils]: 4: Hoare triple {480#true} ~x~0 := 1;~y~0 := 0; {482#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:59,193 INFO L273 TraceCheckUtils]: 5: Hoare triple {482#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {483#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:59,193 INFO L273 TraceCheckUtils]: 6: Hoare triple {483#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {484#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:04:59,194 INFO L273 TraceCheckUtils]: 7: Hoare triple {484#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {485#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:04:59,195 INFO L273 TraceCheckUtils]: 8: Hoare triple {485#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {514#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:04:59,199 INFO L273 TraceCheckUtils]: 9: Hoare triple {514#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {481#false} is VALID [2018-11-23 13:04:59,200 INFO L256 TraceCheckUtils]: 10: Hoare triple {481#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {481#false} is VALID [2018-11-23 13:04:59,200 INFO L273 TraceCheckUtils]: 11: Hoare triple {481#false} ~cond := #in~cond; {481#false} is VALID [2018-11-23 13:04:59,200 INFO L273 TraceCheckUtils]: 12: Hoare triple {481#false} assume 0 == ~cond; {481#false} is VALID [2018-11-23 13:04:59,200 INFO L273 TraceCheckUtils]: 13: Hoare triple {481#false} assume !false; {481#false} is VALID [2018-11-23 13:04:59,201 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:59,220 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:04:59,220 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-11-23 13:04:59,220 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 14 [2018-11-23 13:04:59,221 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:04:59,221 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 13:04:59,244 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:59,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 13:04:59,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 13:04:59,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-23 13:04:59,245 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 8 states. [2018-11-23 13:04:59,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:59,439 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-11-23 13:04:59,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:04:59,440 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 14 [2018-11-23 13:04:59,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:04:59,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 13:04:59,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 21 transitions. [2018-11-23 13:04:59,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 13:04:59,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 21 transitions. [2018-11-23 13:04:59,444 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 21 transitions. [2018-11-23 13:04:59,469 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:04:59,470 INFO L225 Difference]: With dead ends: 21 [2018-11-23 13:04:59,471 INFO L226 Difference]: Without dead ends: 16 [2018-11-23 13:04:59,472 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-23 13:04:59,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-11-23 13:04:59,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-11-23 13:04:59,487 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:04:59,488 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand 16 states. [2018-11-23 13:04:59,488 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand 16 states. [2018-11-23 13:04:59,488 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 16 states. [2018-11-23 13:04:59,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:59,490 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2018-11-23 13:04:59,490 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-23 13:04:59,491 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:59,491 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:59,491 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand 16 states. [2018-11-23 13:04:59,491 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 16 states. [2018-11-23 13:04:59,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:04:59,493 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2018-11-23 13:04:59,493 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-23 13:04:59,494 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:04:59,494 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:04:59,494 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:04:59,494 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:04:59,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 13:04:59,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-11-23 13:04:59,496 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 14 [2018-11-23 13:04:59,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:04:59,496 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-11-23 13:04:59,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 13:04:59,496 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-23 13:04:59,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-23 13:04:59,497 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:04:59,497 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:04:59,497 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:04:59,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:04:59,498 INFO L82 PathProgramCache]: Analyzing trace with hash -1860436335, now seen corresponding path program 5 times [2018-11-23 13:04:59,498 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:04:59,498 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:04:59,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:59,499 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:04:59,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:04:59,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:04:59,918 INFO L256 TraceCheckUtils]: 0: Hoare triple {624#true} call ULTIMATE.init(); {624#true} is VALID [2018-11-23 13:04:59,918 INFO L273 TraceCheckUtils]: 1: Hoare triple {624#true} assume true; {624#true} is VALID [2018-11-23 13:04:59,919 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {624#true} {624#true} #31#return; {624#true} is VALID [2018-11-23 13:04:59,919 INFO L256 TraceCheckUtils]: 3: Hoare triple {624#true} call #t~ret1 := main(); {624#true} is VALID [2018-11-23 13:04:59,920 INFO L273 TraceCheckUtils]: 4: Hoare triple {624#true} ~x~0 := 1;~y~0 := 0; {626#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:04:59,921 INFO L273 TraceCheckUtils]: 5: Hoare triple {626#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {627#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:04:59,922 INFO L273 TraceCheckUtils]: 6: Hoare triple {627#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {628#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:04:59,923 INFO L273 TraceCheckUtils]: 7: Hoare triple {628#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {629#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:04:59,924 INFO L273 TraceCheckUtils]: 8: Hoare triple {629#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {630#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:04:59,925 INFO L273 TraceCheckUtils]: 9: Hoare triple {630#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {631#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 5))} is VALID [2018-11-23 13:04:59,928 INFO L273 TraceCheckUtils]: 10: Hoare triple {631#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 5))} assume !(~y~0 % 4294967296 < 1024); {625#false} is VALID [2018-11-23 13:04:59,929 INFO L256 TraceCheckUtils]: 11: Hoare triple {625#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {625#false} is VALID [2018-11-23 13:04:59,929 INFO L273 TraceCheckUtils]: 12: Hoare triple {625#false} ~cond := #in~cond; {625#false} is VALID [2018-11-23 13:04:59,930 INFO L273 TraceCheckUtils]: 13: Hoare triple {625#false} assume 0 == ~cond; {625#false} is VALID [2018-11-23 13:04:59,930 INFO L273 TraceCheckUtils]: 14: Hoare triple {625#false} assume !false; {625#false} is VALID [2018-11-23 13:04:59,931 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:04:59,932 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:04:59,932 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:04:59,950 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 13:05:00,017 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-11-23 13:05:00,017 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:00,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:00,037 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:00,258 INFO L256 TraceCheckUtils]: 0: Hoare triple {624#true} call ULTIMATE.init(); {624#true} is VALID [2018-11-23 13:05:00,259 INFO L273 TraceCheckUtils]: 1: Hoare triple {624#true} assume true; {624#true} is VALID [2018-11-23 13:05:00,259 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {624#true} {624#true} #31#return; {624#true} is VALID [2018-11-23 13:05:00,260 INFO L256 TraceCheckUtils]: 3: Hoare triple {624#true} call #t~ret1 := main(); {624#true} is VALID [2018-11-23 13:05:00,263 INFO L273 TraceCheckUtils]: 4: Hoare triple {624#true} ~x~0 := 1;~y~0 := 0; {626#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:00,264 INFO L273 TraceCheckUtils]: 5: Hoare triple {626#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {627#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:00,265 INFO L273 TraceCheckUtils]: 6: Hoare triple {627#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {628#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:00,266 INFO L273 TraceCheckUtils]: 7: Hoare triple {628#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {629#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:00,266 INFO L273 TraceCheckUtils]: 8: Hoare triple {629#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {630#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:00,267 INFO L273 TraceCheckUtils]: 9: Hoare triple {630#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {662#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:00,268 INFO L273 TraceCheckUtils]: 10: Hoare triple {662#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !(~y~0 % 4294967296 < 1024); {625#false} is VALID [2018-11-23 13:05:00,269 INFO L256 TraceCheckUtils]: 11: Hoare triple {625#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {625#false} is VALID [2018-11-23 13:05:00,269 INFO L273 TraceCheckUtils]: 12: Hoare triple {625#false} ~cond := #in~cond; {625#false} is VALID [2018-11-23 13:05:00,269 INFO L273 TraceCheckUtils]: 13: Hoare triple {625#false} assume 0 == ~cond; {625#false} is VALID [2018-11-23 13:05:00,270 INFO L273 TraceCheckUtils]: 14: Hoare triple {625#false} assume !false; {625#false} is VALID [2018-11-23 13:05:00,271 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:00,291 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:00,291 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-23 13:05:00,291 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 15 [2018-11-23 13:05:00,291 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:00,292 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-23 13:05:00,309 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:00,310 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 13:05:00,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 13:05:00,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:05:00,311 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 9 states. [2018-11-23 13:05:00,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:00,714 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2018-11-23 13:05:00,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 13:05:00,714 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 15 [2018-11-23 13:05:00,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:00,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-23 13:05:00,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 22 transitions. [2018-11-23 13:05:00,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-23 13:05:00,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 22 transitions. [2018-11-23 13:05:00,718 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 22 transitions. [2018-11-23 13:05:00,764 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:00,765 INFO L225 Difference]: With dead ends: 22 [2018-11-23 13:05:00,765 INFO L226 Difference]: Without dead ends: 17 [2018-11-23 13:05:00,766 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:05:00,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2018-11-23 13:05:00,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-11-23 13:05:00,798 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:00,798 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand 17 states. [2018-11-23 13:05:00,798 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand 17 states. [2018-11-23 13:05:00,798 INFO L87 Difference]: Start difference. First operand 17 states. Second operand 17 states. [2018-11-23 13:05:00,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:00,800 INFO L93 Difference]: Finished difference Result 17 states and 17 transitions. [2018-11-23 13:05:00,800 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-11-23 13:05:00,800 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:00,801 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:00,801 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand 17 states. [2018-11-23 13:05:00,801 INFO L87 Difference]: Start difference. First operand 17 states. Second operand 17 states. [2018-11-23 13:05:00,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:00,802 INFO L93 Difference]: Finished difference Result 17 states and 17 transitions. [2018-11-23 13:05:00,802 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-11-23 13:05:00,803 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:00,803 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:00,803 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:00,803 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:00,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 13:05:00,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2018-11-23 13:05:00,805 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 15 [2018-11-23 13:05:00,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:00,805 INFO L480 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2018-11-23 13:05:00,805 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 13:05:00,805 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-11-23 13:05:00,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 13:05:00,806 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:00,806 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:00,806 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:00,807 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:00,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1802490274, now seen corresponding path program 6 times [2018-11-23 13:05:00,807 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:00,807 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:00,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:00,808 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:00,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:00,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:01,108 INFO L256 TraceCheckUtils]: 0: Hoare triple {778#true} call ULTIMATE.init(); {778#true} is VALID [2018-11-23 13:05:01,109 INFO L273 TraceCheckUtils]: 1: Hoare triple {778#true} assume true; {778#true} is VALID [2018-11-23 13:05:01,109 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {778#true} {778#true} #31#return; {778#true} is VALID [2018-11-23 13:05:01,110 INFO L256 TraceCheckUtils]: 3: Hoare triple {778#true} call #t~ret1 := main(); {778#true} is VALID [2018-11-23 13:05:01,111 INFO L273 TraceCheckUtils]: 4: Hoare triple {778#true} ~x~0 := 1;~y~0 := 0; {780#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:01,112 INFO L273 TraceCheckUtils]: 5: Hoare triple {780#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {781#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:01,113 INFO L273 TraceCheckUtils]: 6: Hoare triple {781#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {782#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:01,113 INFO L273 TraceCheckUtils]: 7: Hoare triple {782#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {783#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:01,114 INFO L273 TraceCheckUtils]: 8: Hoare triple {783#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {784#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:01,115 INFO L273 TraceCheckUtils]: 9: Hoare triple {784#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {785#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:01,116 INFO L273 TraceCheckUtils]: 10: Hoare triple {785#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {786#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 6))} is VALID [2018-11-23 13:05:01,117 INFO L273 TraceCheckUtils]: 11: Hoare triple {786#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 6))} assume !(~y~0 % 4294967296 < 1024); {779#false} is VALID [2018-11-23 13:05:01,118 INFO L256 TraceCheckUtils]: 12: Hoare triple {779#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {779#false} is VALID [2018-11-23 13:05:01,118 INFO L273 TraceCheckUtils]: 13: Hoare triple {779#false} ~cond := #in~cond; {779#false} is VALID [2018-11-23 13:05:01,118 INFO L273 TraceCheckUtils]: 14: Hoare triple {779#false} assume 0 == ~cond; {779#false} is VALID [2018-11-23 13:05:01,119 INFO L273 TraceCheckUtils]: 15: Hoare triple {779#false} assume !false; {779#false} is VALID [2018-11-23 13:05:01,120 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:01,120 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:01,120 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:01,138 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 13:05:01,154 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2018-11-23 13:05:01,154 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:01,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:01,168 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:01,258 INFO L256 TraceCheckUtils]: 0: Hoare triple {778#true} call ULTIMATE.init(); {778#true} is VALID [2018-11-23 13:05:01,259 INFO L273 TraceCheckUtils]: 1: Hoare triple {778#true} assume true; {778#true} is VALID [2018-11-23 13:05:01,259 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {778#true} {778#true} #31#return; {778#true} is VALID [2018-11-23 13:05:01,259 INFO L256 TraceCheckUtils]: 3: Hoare triple {778#true} call #t~ret1 := main(); {778#true} is VALID [2018-11-23 13:05:01,260 INFO L273 TraceCheckUtils]: 4: Hoare triple {778#true} ~x~0 := 1;~y~0 := 0; {780#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:01,261 INFO L273 TraceCheckUtils]: 5: Hoare triple {780#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {781#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:01,261 INFO L273 TraceCheckUtils]: 6: Hoare triple {781#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {782#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:01,262 INFO L273 TraceCheckUtils]: 7: Hoare triple {782#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {783#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:01,263 INFO L273 TraceCheckUtils]: 8: Hoare triple {783#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {784#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:01,264 INFO L273 TraceCheckUtils]: 9: Hoare triple {784#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {785#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:01,265 INFO L273 TraceCheckUtils]: 10: Hoare triple {785#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {820#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:01,266 INFO L273 TraceCheckUtils]: 11: Hoare triple {820#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {779#false} is VALID [2018-11-23 13:05:01,266 INFO L256 TraceCheckUtils]: 12: Hoare triple {779#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {779#false} is VALID [2018-11-23 13:05:01,266 INFO L273 TraceCheckUtils]: 13: Hoare triple {779#false} ~cond := #in~cond; {779#false} is VALID [2018-11-23 13:05:01,267 INFO L273 TraceCheckUtils]: 14: Hoare triple {779#false} assume 0 == ~cond; {779#false} is VALID [2018-11-23 13:05:01,267 INFO L273 TraceCheckUtils]: 15: Hoare triple {779#false} assume !false; {779#false} is VALID [2018-11-23 13:05:01,268 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:01,288 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:01,288 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-11-23 13:05:01,289 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 16 [2018-11-23 13:05:01,289 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:01,289 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 13:05:01,315 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:01,315 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 13:05:01,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 13:05:01,315 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:05:01,316 INFO L87 Difference]: Start difference. First operand 17 states and 17 transitions. Second operand 10 states. [2018-11-23 13:05:01,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:01,558 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-11-23 13:05:01,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 13:05:01,558 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 16 [2018-11-23 13:05:01,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:01,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 13:05:01,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 23 transitions. [2018-11-23 13:05:01,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 13:05:01,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 23 transitions. [2018-11-23 13:05:01,562 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 23 transitions. [2018-11-23 13:05:01,586 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:01,587 INFO L225 Difference]: With dead ends: 23 [2018-11-23 13:05:01,587 INFO L226 Difference]: Without dead ends: 18 [2018-11-23 13:05:01,587 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:05:01,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-11-23 13:05:01,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-11-23 13:05:01,664 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:01,665 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand 18 states. [2018-11-23 13:05:01,665 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-23 13:05:01,665 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-23 13:05:01,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:01,667 INFO L93 Difference]: Finished difference Result 18 states and 18 transitions. [2018-11-23 13:05:01,667 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-11-23 13:05:01,668 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:01,668 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:01,668 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-23 13:05:01,668 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-23 13:05:01,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:01,670 INFO L93 Difference]: Finished difference Result 18 states and 18 transitions. [2018-11-23 13:05:01,670 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-11-23 13:05:01,670 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:01,670 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:01,670 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:01,671 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:01,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 13:05:01,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-11-23 13:05:01,672 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 16 [2018-11-23 13:05:01,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:01,672 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-11-23 13:05:01,673 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 13:05:01,673 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-11-23 13:05:01,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 13:05:01,673 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:01,673 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:01,674 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:01,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:01,674 INFO L82 PathProgramCache]: Analyzing trace with hash -6162383, now seen corresponding path program 7 times [2018-11-23 13:05:01,674 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:01,674 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:01,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:01,675 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:01,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:01,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:01,930 INFO L256 TraceCheckUtils]: 0: Hoare triple {942#true} call ULTIMATE.init(); {942#true} is VALID [2018-11-23 13:05:01,930 INFO L273 TraceCheckUtils]: 1: Hoare triple {942#true} assume true; {942#true} is VALID [2018-11-23 13:05:01,931 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {942#true} {942#true} #31#return; {942#true} is VALID [2018-11-23 13:05:01,931 INFO L256 TraceCheckUtils]: 3: Hoare triple {942#true} call #t~ret1 := main(); {942#true} is VALID [2018-11-23 13:05:01,932 INFO L273 TraceCheckUtils]: 4: Hoare triple {942#true} ~x~0 := 1;~y~0 := 0; {944#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:01,933 INFO L273 TraceCheckUtils]: 5: Hoare triple {944#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {945#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:01,933 INFO L273 TraceCheckUtils]: 6: Hoare triple {945#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {946#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:01,934 INFO L273 TraceCheckUtils]: 7: Hoare triple {946#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {947#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:01,935 INFO L273 TraceCheckUtils]: 8: Hoare triple {947#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {948#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:01,936 INFO L273 TraceCheckUtils]: 9: Hoare triple {948#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {949#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:01,937 INFO L273 TraceCheckUtils]: 10: Hoare triple {949#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {950#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:01,938 INFO L273 TraceCheckUtils]: 11: Hoare triple {950#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {951#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 7))} is VALID [2018-11-23 13:05:01,939 INFO L273 TraceCheckUtils]: 12: Hoare triple {951#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 7))} assume !(~y~0 % 4294967296 < 1024); {943#false} is VALID [2018-11-23 13:05:01,940 INFO L256 TraceCheckUtils]: 13: Hoare triple {943#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {943#false} is VALID [2018-11-23 13:05:01,940 INFO L273 TraceCheckUtils]: 14: Hoare triple {943#false} ~cond := #in~cond; {943#false} is VALID [2018-11-23 13:05:01,940 INFO L273 TraceCheckUtils]: 15: Hoare triple {943#false} assume 0 == ~cond; {943#false} is VALID [2018-11-23 13:05:01,941 INFO L273 TraceCheckUtils]: 16: Hoare triple {943#false} assume !false; {943#false} is VALID [2018-11-23 13:05:01,942 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:01,942 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:01,942 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:01,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:05:01,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:01,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:01,975 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:02,076 INFO L256 TraceCheckUtils]: 0: Hoare triple {942#true} call ULTIMATE.init(); {942#true} is VALID [2018-11-23 13:05:02,076 INFO L273 TraceCheckUtils]: 1: Hoare triple {942#true} assume true; {942#true} is VALID [2018-11-23 13:05:02,077 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {942#true} {942#true} #31#return; {942#true} is VALID [2018-11-23 13:05:02,077 INFO L256 TraceCheckUtils]: 3: Hoare triple {942#true} call #t~ret1 := main(); {942#true} is VALID [2018-11-23 13:05:02,079 INFO L273 TraceCheckUtils]: 4: Hoare triple {942#true} ~x~0 := 1;~y~0 := 0; {944#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:02,079 INFO L273 TraceCheckUtils]: 5: Hoare triple {944#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {945#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:02,080 INFO L273 TraceCheckUtils]: 6: Hoare triple {945#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {946#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:02,081 INFO L273 TraceCheckUtils]: 7: Hoare triple {946#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {947#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:02,082 INFO L273 TraceCheckUtils]: 8: Hoare triple {947#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {948#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:02,083 INFO L273 TraceCheckUtils]: 9: Hoare triple {948#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {949#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:02,084 INFO L273 TraceCheckUtils]: 10: Hoare triple {949#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {950#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:02,085 INFO L273 TraceCheckUtils]: 11: Hoare triple {950#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {988#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:02,086 INFO L273 TraceCheckUtils]: 12: Hoare triple {988#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {943#false} is VALID [2018-11-23 13:05:02,087 INFO L256 TraceCheckUtils]: 13: Hoare triple {943#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {943#false} is VALID [2018-11-23 13:05:02,087 INFO L273 TraceCheckUtils]: 14: Hoare triple {943#false} ~cond := #in~cond; {943#false} is VALID [2018-11-23 13:05:02,088 INFO L273 TraceCheckUtils]: 15: Hoare triple {943#false} assume 0 == ~cond; {943#false} is VALID [2018-11-23 13:05:02,088 INFO L273 TraceCheckUtils]: 16: Hoare triple {943#false} assume !false; {943#false} is VALID [2018-11-23 13:05:02,090 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:02,112 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:02,112 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-11-23 13:05:02,113 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 17 [2018-11-23 13:05:02,113 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:02,113 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states. [2018-11-23 13:05:02,135 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:02,135 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 13:05:02,136 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 13:05:02,136 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-11-23 13:05:02,136 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 11 states. [2018-11-23 13:05:02,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:02,515 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-11-23 13:05:02,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 13:05:02,516 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 17 [2018-11-23 13:05:02,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:02,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-23 13:05:02,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 24 transitions. [2018-11-23 13:05:02,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-23 13:05:02,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 24 transitions. [2018-11-23 13:05:02,519 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 24 transitions. [2018-11-23 13:05:02,543 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:02,544 INFO L225 Difference]: With dead ends: 24 [2018-11-23 13:05:02,544 INFO L226 Difference]: Without dead ends: 19 [2018-11-23 13:05:02,544 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-11-23 13:05:02,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-11-23 13:05:02,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-11-23 13:05:02,631 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:02,631 INFO L82 GeneralOperation]: Start isEquivalent. First operand 19 states. Second operand 19 states. [2018-11-23 13:05:02,631 INFO L74 IsIncluded]: Start isIncluded. First operand 19 states. Second operand 19 states. [2018-11-23 13:05:02,631 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 19 states. [2018-11-23 13:05:02,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:02,633 INFO L93 Difference]: Finished difference Result 19 states and 19 transitions. [2018-11-23 13:05:02,634 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-11-23 13:05:02,634 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:02,634 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:02,634 INFO L74 IsIncluded]: Start isIncluded. First operand 19 states. Second operand 19 states. [2018-11-23 13:05:02,634 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 19 states. [2018-11-23 13:05:02,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:02,636 INFO L93 Difference]: Finished difference Result 19 states and 19 transitions. [2018-11-23 13:05:02,636 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-11-23 13:05:02,636 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:02,636 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:02,636 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:02,636 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:02,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 13:05:02,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-11-23 13:05:02,637 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-11-23 13:05:02,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:02,638 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-11-23 13:05:02,638 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 13:05:02,638 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-11-23 13:05:02,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-23 13:05:02,639 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:02,639 INFO L402 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:02,639 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:02,639 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:02,640 INFO L82 PathProgramCache]: Analyzing trace with hash -154572610, now seen corresponding path program 8 times [2018-11-23 13:05:02,640 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:02,640 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:02,641 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:02,641 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:05:02,641 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:02,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:03,448 INFO L256 TraceCheckUtils]: 0: Hoare triple {1116#true} call ULTIMATE.init(); {1116#true} is VALID [2018-11-23 13:05:03,449 INFO L273 TraceCheckUtils]: 1: Hoare triple {1116#true} assume true; {1116#true} is VALID [2018-11-23 13:05:03,449 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1116#true} {1116#true} #31#return; {1116#true} is VALID [2018-11-23 13:05:03,450 INFO L256 TraceCheckUtils]: 3: Hoare triple {1116#true} call #t~ret1 := main(); {1116#true} is VALID [2018-11-23 13:05:03,451 INFO L273 TraceCheckUtils]: 4: Hoare triple {1116#true} ~x~0 := 1;~y~0 := 0; {1118#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:03,452 INFO L273 TraceCheckUtils]: 5: Hoare triple {1118#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1119#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:03,452 INFO L273 TraceCheckUtils]: 6: Hoare triple {1119#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1120#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:03,453 INFO L273 TraceCheckUtils]: 7: Hoare triple {1120#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1121#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:03,454 INFO L273 TraceCheckUtils]: 8: Hoare triple {1121#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1122#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:03,455 INFO L273 TraceCheckUtils]: 9: Hoare triple {1122#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1123#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:03,457 INFO L273 TraceCheckUtils]: 10: Hoare triple {1123#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1124#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:03,460 INFO L273 TraceCheckUtils]: 11: Hoare triple {1124#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1125#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:03,462 INFO L273 TraceCheckUtils]: 12: Hoare triple {1125#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1126#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:03,463 INFO L273 TraceCheckUtils]: 13: Hoare triple {1126#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 8))} assume !(~y~0 % 4294967296 < 1024); {1117#false} is VALID [2018-11-23 13:05:03,463 INFO L256 TraceCheckUtils]: 14: Hoare triple {1117#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1117#false} is VALID [2018-11-23 13:05:03,463 INFO L273 TraceCheckUtils]: 15: Hoare triple {1117#false} ~cond := #in~cond; {1117#false} is VALID [2018-11-23 13:05:03,463 INFO L273 TraceCheckUtils]: 16: Hoare triple {1117#false} assume 0 == ~cond; {1117#false} is VALID [2018-11-23 13:05:03,463 INFO L273 TraceCheckUtils]: 17: Hoare triple {1117#false} assume !false; {1117#false} is VALID [2018-11-23 13:05:03,464 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:03,464 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:03,465 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:03,474 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:05:03,495 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:05:03,495 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:03,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:03,516 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:03,686 INFO L256 TraceCheckUtils]: 0: Hoare triple {1116#true} call ULTIMATE.init(); {1116#true} is VALID [2018-11-23 13:05:03,686 INFO L273 TraceCheckUtils]: 1: Hoare triple {1116#true} assume true; {1116#true} is VALID [2018-11-23 13:05:03,686 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1116#true} {1116#true} #31#return; {1116#true} is VALID [2018-11-23 13:05:03,686 INFO L256 TraceCheckUtils]: 3: Hoare triple {1116#true} call #t~ret1 := main(); {1116#true} is VALID [2018-11-23 13:05:03,687 INFO L273 TraceCheckUtils]: 4: Hoare triple {1116#true} ~x~0 := 1;~y~0 := 0; {1118#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:03,688 INFO L273 TraceCheckUtils]: 5: Hoare triple {1118#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1119#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:03,688 INFO L273 TraceCheckUtils]: 6: Hoare triple {1119#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1120#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:03,690 INFO L273 TraceCheckUtils]: 7: Hoare triple {1120#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1121#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:03,691 INFO L273 TraceCheckUtils]: 8: Hoare triple {1121#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1122#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:03,692 INFO L273 TraceCheckUtils]: 9: Hoare triple {1122#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1123#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:03,693 INFO L273 TraceCheckUtils]: 10: Hoare triple {1123#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1124#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:03,694 INFO L273 TraceCheckUtils]: 11: Hoare triple {1124#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1125#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:03,695 INFO L273 TraceCheckUtils]: 12: Hoare triple {1125#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1166#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:03,696 INFO L273 TraceCheckUtils]: 13: Hoare triple {1166#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !(~y~0 % 4294967296 < 1024); {1117#false} is VALID [2018-11-23 13:05:03,696 INFO L256 TraceCheckUtils]: 14: Hoare triple {1117#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1117#false} is VALID [2018-11-23 13:05:03,696 INFO L273 TraceCheckUtils]: 15: Hoare triple {1117#false} ~cond := #in~cond; {1117#false} is VALID [2018-11-23 13:05:03,696 INFO L273 TraceCheckUtils]: 16: Hoare triple {1117#false} assume 0 == ~cond; {1117#false} is VALID [2018-11-23 13:05:03,697 INFO L273 TraceCheckUtils]: 17: Hoare triple {1117#false} assume !false; {1117#false} is VALID [2018-11-23 13:05:03,698 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:03,718 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:03,719 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-11-23 13:05:03,719 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 18 [2018-11-23 13:05:03,719 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:03,719 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 13:05:03,757 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:03,757 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 13:05:03,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 13:05:03,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-23 13:05:03,758 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 12 states. [2018-11-23 13:05:04,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:04,407 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2018-11-23 13:05:04,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 13:05:04,408 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 18 [2018-11-23 13:05:04,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:04,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 13:05:04,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 25 transitions. [2018-11-23 13:05:04,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 13:05:04,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 25 transitions. [2018-11-23 13:05:04,412 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states and 25 transitions. [2018-11-23 13:05:04,436 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:04,437 INFO L225 Difference]: With dead ends: 25 [2018-11-23 13:05:04,437 INFO L226 Difference]: Without dead ends: 20 [2018-11-23 13:05:04,438 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 17 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-23 13:05:04,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-11-23 13:05:04,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-11-23 13:05:04,484 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:04,484 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand 20 states. [2018-11-23 13:05:04,485 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand 20 states. [2018-11-23 13:05:04,485 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 20 states. [2018-11-23 13:05:04,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:04,486 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-11-23 13:05:04,486 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-23 13:05:04,487 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:04,487 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:04,487 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand 20 states. [2018-11-23 13:05:04,487 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 20 states. [2018-11-23 13:05:04,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:04,488 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-11-23 13:05:04,489 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-23 13:05:04,489 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:04,489 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:04,489 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:04,489 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:04,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 13:05:04,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-11-23 13:05:04,490 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-11-23 13:05:04,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:04,490 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-11-23 13:05:04,491 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 13:05:04,491 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-23 13:05:04,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-23 13:05:04,491 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:04,491 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:04,491 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:04,492 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:04,492 INFO L82 PathProgramCache]: Analyzing trace with hash -460322351, now seen corresponding path program 9 times [2018-11-23 13:05:04,492 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:04,492 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:04,493 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:04,493 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:04,493 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:04,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:04,925 INFO L256 TraceCheckUtils]: 0: Hoare triple {1300#true} call ULTIMATE.init(); {1300#true} is VALID [2018-11-23 13:05:04,925 INFO L273 TraceCheckUtils]: 1: Hoare triple {1300#true} assume true; {1300#true} is VALID [2018-11-23 13:05:04,926 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1300#true} {1300#true} #31#return; {1300#true} is VALID [2018-11-23 13:05:04,926 INFO L256 TraceCheckUtils]: 3: Hoare triple {1300#true} call #t~ret1 := main(); {1300#true} is VALID [2018-11-23 13:05:04,927 INFO L273 TraceCheckUtils]: 4: Hoare triple {1300#true} ~x~0 := 1;~y~0 := 0; {1302#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:04,927 INFO L273 TraceCheckUtils]: 5: Hoare triple {1302#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1303#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:04,928 INFO L273 TraceCheckUtils]: 6: Hoare triple {1303#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1304#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:04,929 INFO L273 TraceCheckUtils]: 7: Hoare triple {1304#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1305#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:04,929 INFO L273 TraceCheckUtils]: 8: Hoare triple {1305#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1306#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:04,930 INFO L273 TraceCheckUtils]: 9: Hoare triple {1306#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1307#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:04,931 INFO L273 TraceCheckUtils]: 10: Hoare triple {1307#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1308#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:04,934 INFO L273 TraceCheckUtils]: 11: Hoare triple {1308#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1309#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:04,936 INFO L273 TraceCheckUtils]: 12: Hoare triple {1309#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1310#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:04,939 INFO L273 TraceCheckUtils]: 13: Hoare triple {1310#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1311#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 9))} is VALID [2018-11-23 13:05:04,941 INFO L273 TraceCheckUtils]: 14: Hoare triple {1311#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 9))} assume !(~y~0 % 4294967296 < 1024); {1301#false} is VALID [2018-11-23 13:05:04,941 INFO L256 TraceCheckUtils]: 15: Hoare triple {1301#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1301#false} is VALID [2018-11-23 13:05:04,941 INFO L273 TraceCheckUtils]: 16: Hoare triple {1301#false} ~cond := #in~cond; {1301#false} is VALID [2018-11-23 13:05:04,942 INFO L273 TraceCheckUtils]: 17: Hoare triple {1301#false} assume 0 == ~cond; {1301#false} is VALID [2018-11-23 13:05:04,942 INFO L273 TraceCheckUtils]: 18: Hoare triple {1301#false} assume !false; {1301#false} is VALID [2018-11-23 13:05:04,943 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:04,943 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:04,943 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:04,953 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 13:05:05,020 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-11-23 13:05:05,020 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:05,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:05,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:05,119 INFO L256 TraceCheckUtils]: 0: Hoare triple {1300#true} call ULTIMATE.init(); {1300#true} is VALID [2018-11-23 13:05:05,120 INFO L273 TraceCheckUtils]: 1: Hoare triple {1300#true} assume true; {1300#true} is VALID [2018-11-23 13:05:05,120 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1300#true} {1300#true} #31#return; {1300#true} is VALID [2018-11-23 13:05:05,120 INFO L256 TraceCheckUtils]: 3: Hoare triple {1300#true} call #t~ret1 := main(); {1300#true} is VALID [2018-11-23 13:05:05,120 INFO L273 TraceCheckUtils]: 4: Hoare triple {1300#true} ~x~0 := 1;~y~0 := 0; {1302#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:05,121 INFO L273 TraceCheckUtils]: 5: Hoare triple {1302#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1303#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:05,122 INFO L273 TraceCheckUtils]: 6: Hoare triple {1303#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1304#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:05,122 INFO L273 TraceCheckUtils]: 7: Hoare triple {1304#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1305#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:05,123 INFO L273 TraceCheckUtils]: 8: Hoare triple {1305#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1306#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:05,124 INFO L273 TraceCheckUtils]: 9: Hoare triple {1306#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1307#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:05,125 INFO L273 TraceCheckUtils]: 10: Hoare triple {1307#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1308#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:05,126 INFO L273 TraceCheckUtils]: 11: Hoare triple {1308#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1309#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:05,127 INFO L273 TraceCheckUtils]: 12: Hoare triple {1309#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1310#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:05,128 INFO L273 TraceCheckUtils]: 13: Hoare triple {1310#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1354#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:05,129 INFO L273 TraceCheckUtils]: 14: Hoare triple {1354#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {1301#false} is VALID [2018-11-23 13:05:05,129 INFO L256 TraceCheckUtils]: 15: Hoare triple {1301#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1301#false} is VALID [2018-11-23 13:05:05,129 INFO L273 TraceCheckUtils]: 16: Hoare triple {1301#false} ~cond := #in~cond; {1301#false} is VALID [2018-11-23 13:05:05,129 INFO L273 TraceCheckUtils]: 17: Hoare triple {1301#false} assume 0 == ~cond; {1301#false} is VALID [2018-11-23 13:05:05,130 INFO L273 TraceCheckUtils]: 18: Hoare triple {1301#false} assume !false; {1301#false} is VALID [2018-11-23 13:05:05,131 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:05,150 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:05,150 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-11-23 13:05:05,150 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 19 [2018-11-23 13:05:05,152 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:05,152 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-23 13:05:05,170 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:05,170 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 13:05:05,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 13:05:05,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-23 13:05:05,171 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 13 states. [2018-11-23 13:05:05,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:05,705 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-11-23 13:05:05,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 13:05:05,705 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 19 [2018-11-23 13:05:05,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:05,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 13:05:05,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 26 transitions. [2018-11-23 13:05:05,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 13:05:05,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 26 transitions. [2018-11-23 13:05:05,708 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 26 transitions. [2018-11-23 13:05:05,766 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:05,767 INFO L225 Difference]: With dead ends: 26 [2018-11-23 13:05:05,767 INFO L226 Difference]: Without dead ends: 21 [2018-11-23 13:05:05,768 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 18 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-23 13:05:05,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-11-23 13:05:05,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-11-23 13:05:05,836 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:05,836 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand 21 states. [2018-11-23 13:05:05,836 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand 21 states. [2018-11-23 13:05:05,836 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 21 states. [2018-11-23 13:05:05,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:05,837 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-11-23 13:05:05,838 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-11-23 13:05:05,838 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:05,838 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:05,838 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand 21 states. [2018-11-23 13:05:05,838 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 21 states. [2018-11-23 13:05:05,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:05,840 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-11-23 13:05:05,840 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-11-23 13:05:05,840 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:05,840 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:05,841 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:05,841 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:05,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 13:05:05,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-11-23 13:05:05,842 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-11-23 13:05:05,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:05,842 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-11-23 13:05:05,843 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 13:05:05,843 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-11-23 13:05:05,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 13:05:05,843 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:05,843 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:05,844 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:05,844 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:05,844 INFO L82 PathProgramCache]: Analyzing trace with hash -1348629730, now seen corresponding path program 10 times [2018-11-23 13:05:05,844 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:05,844 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:05,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:05,845 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:05,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:05,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:06,206 INFO L256 TraceCheckUtils]: 0: Hoare triple {1494#true} call ULTIMATE.init(); {1494#true} is VALID [2018-11-23 13:05:06,207 INFO L273 TraceCheckUtils]: 1: Hoare triple {1494#true} assume true; {1494#true} is VALID [2018-11-23 13:05:06,207 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1494#true} {1494#true} #31#return; {1494#true} is VALID [2018-11-23 13:05:06,207 INFO L256 TraceCheckUtils]: 3: Hoare triple {1494#true} call #t~ret1 := main(); {1494#true} is VALID [2018-11-23 13:05:06,208 INFO L273 TraceCheckUtils]: 4: Hoare triple {1494#true} ~x~0 := 1;~y~0 := 0; {1496#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:06,209 INFO L273 TraceCheckUtils]: 5: Hoare triple {1496#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1497#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:06,209 INFO L273 TraceCheckUtils]: 6: Hoare triple {1497#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1498#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:06,210 INFO L273 TraceCheckUtils]: 7: Hoare triple {1498#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1499#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:06,211 INFO L273 TraceCheckUtils]: 8: Hoare triple {1499#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1500#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:06,211 INFO L273 TraceCheckUtils]: 9: Hoare triple {1500#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1501#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:06,212 INFO L273 TraceCheckUtils]: 10: Hoare triple {1501#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1502#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:06,213 INFO L273 TraceCheckUtils]: 11: Hoare triple {1502#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1503#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:06,214 INFO L273 TraceCheckUtils]: 12: Hoare triple {1503#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1504#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:06,215 INFO L273 TraceCheckUtils]: 13: Hoare triple {1504#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1505#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:06,216 INFO L273 TraceCheckUtils]: 14: Hoare triple {1505#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1506#(and (<= main_~y~0 10) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:05:06,217 INFO L273 TraceCheckUtils]: 15: Hoare triple {1506#(and (<= main_~y~0 10) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {1495#false} is VALID [2018-11-23 13:05:06,217 INFO L256 TraceCheckUtils]: 16: Hoare triple {1495#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1495#false} is VALID [2018-11-23 13:05:06,218 INFO L273 TraceCheckUtils]: 17: Hoare triple {1495#false} ~cond := #in~cond; {1495#false} is VALID [2018-11-23 13:05:06,218 INFO L273 TraceCheckUtils]: 18: Hoare triple {1495#false} assume 0 == ~cond; {1495#false} is VALID [2018-11-23 13:05:06,218 INFO L273 TraceCheckUtils]: 19: Hoare triple {1495#false} assume !false; {1495#false} is VALID [2018-11-23 13:05:06,219 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:06,219 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:06,219 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:06,229 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 13:05:06,240 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 13:05:06,241 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:06,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:06,254 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:06,361 INFO L256 TraceCheckUtils]: 0: Hoare triple {1494#true} call ULTIMATE.init(); {1494#true} is VALID [2018-11-23 13:05:06,361 INFO L273 TraceCheckUtils]: 1: Hoare triple {1494#true} assume true; {1494#true} is VALID [2018-11-23 13:05:06,361 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1494#true} {1494#true} #31#return; {1494#true} is VALID [2018-11-23 13:05:06,362 INFO L256 TraceCheckUtils]: 3: Hoare triple {1494#true} call #t~ret1 := main(); {1494#true} is VALID [2018-11-23 13:05:06,368 INFO L273 TraceCheckUtils]: 4: Hoare triple {1494#true} ~x~0 := 1;~y~0 := 0; {1496#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:06,369 INFO L273 TraceCheckUtils]: 5: Hoare triple {1496#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1497#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:06,370 INFO L273 TraceCheckUtils]: 6: Hoare triple {1497#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1498#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:06,371 INFO L273 TraceCheckUtils]: 7: Hoare triple {1498#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1499#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:06,372 INFO L273 TraceCheckUtils]: 8: Hoare triple {1499#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1500#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:06,374 INFO L273 TraceCheckUtils]: 9: Hoare triple {1500#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1501#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:06,375 INFO L273 TraceCheckUtils]: 10: Hoare triple {1501#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1502#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:06,376 INFO L273 TraceCheckUtils]: 11: Hoare triple {1502#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1503#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:06,377 INFO L273 TraceCheckUtils]: 12: Hoare triple {1503#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1504#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:06,378 INFO L273 TraceCheckUtils]: 13: Hoare triple {1504#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1505#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:06,379 INFO L273 TraceCheckUtils]: 14: Hoare triple {1505#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1552#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:06,380 INFO L273 TraceCheckUtils]: 15: Hoare triple {1552#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {1495#false} is VALID [2018-11-23 13:05:06,380 INFO L256 TraceCheckUtils]: 16: Hoare triple {1495#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1495#false} is VALID [2018-11-23 13:05:06,380 INFO L273 TraceCheckUtils]: 17: Hoare triple {1495#false} ~cond := #in~cond; {1495#false} is VALID [2018-11-23 13:05:06,380 INFO L273 TraceCheckUtils]: 18: Hoare triple {1495#false} assume 0 == ~cond; {1495#false} is VALID [2018-11-23 13:05:06,381 INFO L273 TraceCheckUtils]: 19: Hoare triple {1495#false} assume !false; {1495#false} is VALID [2018-11-23 13:05:06,382 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:06,401 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:06,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-11-23 13:05:06,401 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 20 [2018-11-23 13:05:06,401 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:06,402 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 13:05:06,418 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:06,418 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 13:05:06,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 13:05:06,419 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-11-23 13:05:06,419 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 14 states. [2018-11-23 13:05:06,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:06,930 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-11-23 13:05:06,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 13:05:06,930 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 20 [2018-11-23 13:05:06,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:06,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 13:05:06,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 27 transitions. [2018-11-23 13:05:06,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 13:05:06,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 27 transitions. [2018-11-23 13:05:06,934 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 27 transitions. [2018-11-23 13:05:06,960 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:06,961 INFO L225 Difference]: With dead ends: 27 [2018-11-23 13:05:06,962 INFO L226 Difference]: Without dead ends: 22 [2018-11-23 13:05:06,962 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 19 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-11-23 13:05:06,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-11-23 13:05:07,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-11-23 13:05:07,025 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:07,025 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand 22 states. [2018-11-23 13:05:07,026 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-23 13:05:07,026 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-23 13:05:07,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:07,027 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2018-11-23 13:05:07,027 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-11-23 13:05:07,027 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:07,028 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:07,028 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-23 13:05:07,028 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-23 13:05:07,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:07,029 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2018-11-23 13:05:07,029 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-11-23 13:05:07,030 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:07,030 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:07,030 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:07,030 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:07,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 13:05:07,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-11-23 13:05:07,031 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-11-23 13:05:07,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:07,032 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-11-23 13:05:07,032 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 13:05:07,032 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-11-23 13:05:07,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-23 13:05:07,033 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:07,033 INFO L402 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:07,033 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:07,033 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:07,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1178612593, now seen corresponding path program 11 times [2018-11-23 13:05:07,034 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:07,034 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:07,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:07,035 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:07,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:07,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:07,549 INFO L256 TraceCheckUtils]: 0: Hoare triple {1698#true} call ULTIMATE.init(); {1698#true} is VALID [2018-11-23 13:05:07,550 INFO L273 TraceCheckUtils]: 1: Hoare triple {1698#true} assume true; {1698#true} is VALID [2018-11-23 13:05:07,550 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1698#true} {1698#true} #31#return; {1698#true} is VALID [2018-11-23 13:05:07,550 INFO L256 TraceCheckUtils]: 3: Hoare triple {1698#true} call #t~ret1 := main(); {1698#true} is VALID [2018-11-23 13:05:07,550 INFO L273 TraceCheckUtils]: 4: Hoare triple {1698#true} ~x~0 := 1;~y~0 := 0; {1700#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:07,551 INFO L273 TraceCheckUtils]: 5: Hoare triple {1700#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:07,552 INFO L273 TraceCheckUtils]: 6: Hoare triple {1701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1702#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:07,552 INFO L273 TraceCheckUtils]: 7: Hoare triple {1702#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:07,553 INFO L273 TraceCheckUtils]: 8: Hoare triple {1703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:07,554 INFO L273 TraceCheckUtils]: 9: Hoare triple {1704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1705#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:07,555 INFO L273 TraceCheckUtils]: 10: Hoare triple {1705#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1706#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:07,556 INFO L273 TraceCheckUtils]: 11: Hoare triple {1706#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1707#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:07,557 INFO L273 TraceCheckUtils]: 12: Hoare triple {1707#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1708#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:07,565 INFO L273 TraceCheckUtils]: 13: Hoare triple {1708#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1709#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:07,566 INFO L273 TraceCheckUtils]: 14: Hoare triple {1709#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1710#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:07,567 INFO L273 TraceCheckUtils]: 15: Hoare triple {1710#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1711#(and (<= main_~y~0 11) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:05:07,567 INFO L273 TraceCheckUtils]: 16: Hoare triple {1711#(and (<= main_~y~0 11) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {1699#false} is VALID [2018-11-23 13:05:07,568 INFO L256 TraceCheckUtils]: 17: Hoare triple {1699#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1699#false} is VALID [2018-11-23 13:05:07,568 INFO L273 TraceCheckUtils]: 18: Hoare triple {1699#false} ~cond := #in~cond; {1699#false} is VALID [2018-11-23 13:05:07,568 INFO L273 TraceCheckUtils]: 19: Hoare triple {1699#false} assume 0 == ~cond; {1699#false} is VALID [2018-11-23 13:05:07,568 INFO L273 TraceCheckUtils]: 20: Hoare triple {1699#false} assume !false; {1699#false} is VALID [2018-11-23 13:05:07,569 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:07,569 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:07,569 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:07,578 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 13:05:07,763 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-11-23 13:05:07,763 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:07,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:07,775 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:07,884 INFO L256 TraceCheckUtils]: 0: Hoare triple {1698#true} call ULTIMATE.init(); {1698#true} is VALID [2018-11-23 13:05:07,884 INFO L273 TraceCheckUtils]: 1: Hoare triple {1698#true} assume true; {1698#true} is VALID [2018-11-23 13:05:07,885 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1698#true} {1698#true} #31#return; {1698#true} is VALID [2018-11-23 13:05:07,885 INFO L256 TraceCheckUtils]: 3: Hoare triple {1698#true} call #t~ret1 := main(); {1698#true} is VALID [2018-11-23 13:05:07,885 INFO L273 TraceCheckUtils]: 4: Hoare triple {1698#true} ~x~0 := 1;~y~0 := 0; {1700#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:07,886 INFO L273 TraceCheckUtils]: 5: Hoare triple {1700#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:07,888 INFO L273 TraceCheckUtils]: 6: Hoare triple {1701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1702#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:07,888 INFO L273 TraceCheckUtils]: 7: Hoare triple {1702#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:07,889 INFO L273 TraceCheckUtils]: 8: Hoare triple {1703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:07,890 INFO L273 TraceCheckUtils]: 9: Hoare triple {1704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1705#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:07,891 INFO L273 TraceCheckUtils]: 10: Hoare triple {1705#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1706#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:07,892 INFO L273 TraceCheckUtils]: 11: Hoare triple {1706#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1707#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:07,893 INFO L273 TraceCheckUtils]: 12: Hoare triple {1707#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1708#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:07,894 INFO L273 TraceCheckUtils]: 13: Hoare triple {1708#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1709#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:07,895 INFO L273 TraceCheckUtils]: 14: Hoare triple {1709#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1710#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:07,896 INFO L273 TraceCheckUtils]: 15: Hoare triple {1710#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1760#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:07,897 INFO L273 TraceCheckUtils]: 16: Hoare triple {1760#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !(~y~0 % 4294967296 < 1024); {1699#false} is VALID [2018-11-23 13:05:07,897 INFO L256 TraceCheckUtils]: 17: Hoare triple {1699#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1699#false} is VALID [2018-11-23 13:05:07,897 INFO L273 TraceCheckUtils]: 18: Hoare triple {1699#false} ~cond := #in~cond; {1699#false} is VALID [2018-11-23 13:05:07,898 INFO L273 TraceCheckUtils]: 19: Hoare triple {1699#false} assume 0 == ~cond; {1699#false} is VALID [2018-11-23 13:05:07,898 INFO L273 TraceCheckUtils]: 20: Hoare triple {1699#false} assume !false; {1699#false} is VALID [2018-11-23 13:05:07,899 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:07,917 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:07,917 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-11-23 13:05:07,918 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 21 [2018-11-23 13:05:07,918 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:07,918 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states. [2018-11-23 13:05:07,937 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:07,937 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-23 13:05:07,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-23 13:05:07,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-11-23 13:05:07,938 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 15 states. [2018-11-23 13:05:08,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:08,449 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-11-23 13:05:08,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 13:05:08,450 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 21 [2018-11-23 13:05:08,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:08,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 13:05:08,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 28 transitions. [2018-11-23 13:05:08,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 13:05:08,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 28 transitions. [2018-11-23 13:05:08,453 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 28 transitions. [2018-11-23 13:05:08,488 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:08,489 INFO L225 Difference]: With dead ends: 28 [2018-11-23 13:05:08,489 INFO L226 Difference]: Without dead ends: 23 [2018-11-23 13:05:08,490 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 20 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-11-23 13:05:08,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-11-23 13:05:08,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-11-23 13:05:08,526 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:08,526 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand 23 states. [2018-11-23 13:05:08,526 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand 23 states. [2018-11-23 13:05:08,526 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 23 states. [2018-11-23 13:05:08,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:08,527 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-11-23 13:05:08,527 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-11-23 13:05:08,527 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:08,528 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:08,528 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand 23 states. [2018-11-23 13:05:08,528 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 23 states. [2018-11-23 13:05:08,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:08,528 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-11-23 13:05:08,528 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-11-23 13:05:08,529 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:08,529 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:08,529 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:08,529 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:08,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 13:05:08,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-11-23 13:05:08,530 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-11-23 13:05:08,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:08,530 INFO L480 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-11-23 13:05:08,530 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-23 13:05:08,530 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-11-23 13:05:08,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 13:05:08,531 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:08,531 INFO L402 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:08,531 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:08,531 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:08,531 INFO L82 PathProgramCache]: Analyzing trace with hash -2081254018, now seen corresponding path program 12 times [2018-11-23 13:05:08,532 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:08,532 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:08,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:08,532 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:08,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:08,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:08,921 INFO L256 TraceCheckUtils]: 0: Hoare triple {1912#true} call ULTIMATE.init(); {1912#true} is VALID [2018-11-23 13:05:08,921 INFO L273 TraceCheckUtils]: 1: Hoare triple {1912#true} assume true; {1912#true} is VALID [2018-11-23 13:05:08,921 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1912#true} {1912#true} #31#return; {1912#true} is VALID [2018-11-23 13:05:08,921 INFO L256 TraceCheckUtils]: 3: Hoare triple {1912#true} call #t~ret1 := main(); {1912#true} is VALID [2018-11-23 13:05:08,922 INFO L273 TraceCheckUtils]: 4: Hoare triple {1912#true} ~x~0 := 1;~y~0 := 0; {1914#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:08,922 INFO L273 TraceCheckUtils]: 5: Hoare triple {1914#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1915#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:08,923 INFO L273 TraceCheckUtils]: 6: Hoare triple {1915#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1916#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:08,924 INFO L273 TraceCheckUtils]: 7: Hoare triple {1916#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1917#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:08,925 INFO L273 TraceCheckUtils]: 8: Hoare triple {1917#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1918#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:08,926 INFO L273 TraceCheckUtils]: 9: Hoare triple {1918#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1919#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:08,927 INFO L273 TraceCheckUtils]: 10: Hoare triple {1919#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1920#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:08,928 INFO L273 TraceCheckUtils]: 11: Hoare triple {1920#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1921#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:08,929 INFO L273 TraceCheckUtils]: 12: Hoare triple {1921#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1922#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:08,930 INFO L273 TraceCheckUtils]: 13: Hoare triple {1922#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1923#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:08,931 INFO L273 TraceCheckUtils]: 14: Hoare triple {1923#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1924#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:08,932 INFO L273 TraceCheckUtils]: 15: Hoare triple {1924#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1925#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:08,937 INFO L273 TraceCheckUtils]: 16: Hoare triple {1925#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1926#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 12))} is VALID [2018-11-23 13:05:08,937 INFO L273 TraceCheckUtils]: 17: Hoare triple {1926#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 12))} assume !(~y~0 % 4294967296 < 1024); {1913#false} is VALID [2018-11-23 13:05:08,937 INFO L256 TraceCheckUtils]: 18: Hoare triple {1913#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1913#false} is VALID [2018-11-23 13:05:08,938 INFO L273 TraceCheckUtils]: 19: Hoare triple {1913#false} ~cond := #in~cond; {1913#false} is VALID [2018-11-23 13:05:08,938 INFO L273 TraceCheckUtils]: 20: Hoare triple {1913#false} assume 0 == ~cond; {1913#false} is VALID [2018-11-23 13:05:08,938 INFO L273 TraceCheckUtils]: 21: Hoare triple {1913#false} assume !false; {1913#false} is VALID [2018-11-23 13:05:08,939 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:08,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:08,939 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:08,957 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 13:05:08,996 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-23 13:05:08,996 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:09,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:09,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:09,159 INFO L256 TraceCheckUtils]: 0: Hoare triple {1912#true} call ULTIMATE.init(); {1912#true} is VALID [2018-11-23 13:05:09,159 INFO L273 TraceCheckUtils]: 1: Hoare triple {1912#true} assume true; {1912#true} is VALID [2018-11-23 13:05:09,159 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1912#true} {1912#true} #31#return; {1912#true} is VALID [2018-11-23 13:05:09,159 INFO L256 TraceCheckUtils]: 3: Hoare triple {1912#true} call #t~ret1 := main(); {1912#true} is VALID [2018-11-23 13:05:09,160 INFO L273 TraceCheckUtils]: 4: Hoare triple {1912#true} ~x~0 := 1;~y~0 := 0; {1914#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:09,161 INFO L273 TraceCheckUtils]: 5: Hoare triple {1914#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1915#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:09,161 INFO L273 TraceCheckUtils]: 6: Hoare triple {1915#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1916#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:09,162 INFO L273 TraceCheckUtils]: 7: Hoare triple {1916#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1917#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:09,163 INFO L273 TraceCheckUtils]: 8: Hoare triple {1917#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1918#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:09,163 INFO L273 TraceCheckUtils]: 9: Hoare triple {1918#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1919#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:09,164 INFO L273 TraceCheckUtils]: 10: Hoare triple {1919#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1920#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:09,165 INFO L273 TraceCheckUtils]: 11: Hoare triple {1920#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1921#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:09,166 INFO L273 TraceCheckUtils]: 12: Hoare triple {1921#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1922#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:09,167 INFO L273 TraceCheckUtils]: 13: Hoare triple {1922#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1923#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:09,168 INFO L273 TraceCheckUtils]: 14: Hoare triple {1923#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1924#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:09,169 INFO L273 TraceCheckUtils]: 15: Hoare triple {1924#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1925#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:09,170 INFO L273 TraceCheckUtils]: 16: Hoare triple {1925#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {1978#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:09,171 INFO L273 TraceCheckUtils]: 17: Hoare triple {1978#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {1913#false} is VALID [2018-11-23 13:05:09,171 INFO L256 TraceCheckUtils]: 18: Hoare triple {1913#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {1913#false} is VALID [2018-11-23 13:05:09,172 INFO L273 TraceCheckUtils]: 19: Hoare triple {1913#false} ~cond := #in~cond; {1913#false} is VALID [2018-11-23 13:05:09,172 INFO L273 TraceCheckUtils]: 20: Hoare triple {1913#false} assume 0 == ~cond; {1913#false} is VALID [2018-11-23 13:05:09,172 INFO L273 TraceCheckUtils]: 21: Hoare triple {1913#false} assume !false; {1913#false} is VALID [2018-11-23 13:05:09,173 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:09,191 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:09,191 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-11-23 13:05:09,192 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-11-23 13:05:09,192 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:09,192 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 13:05:09,210 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:09,210 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 13:05:09,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 13:05:09,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2018-11-23 13:05:09,211 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 16 states. [2018-11-23 13:05:09,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:09,853 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-11-23 13:05:09,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 13:05:09,854 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-11-23 13:05:09,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:09,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 13:05:09,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 29 transitions. [2018-11-23 13:05:09,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 13:05:09,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 29 transitions. [2018-11-23 13:05:09,858 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states and 29 transitions. [2018-11-23 13:05:09,887 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:09,888 INFO L225 Difference]: With dead ends: 29 [2018-11-23 13:05:09,888 INFO L226 Difference]: Without dead ends: 24 [2018-11-23 13:05:09,889 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2018-11-23 13:05:09,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-11-23 13:05:09,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-11-23 13:05:09,991 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:09,991 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand 24 states. [2018-11-23 13:05:09,991 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-23 13:05:09,991 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-23 13:05:09,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:09,992 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-11-23 13:05:09,992 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-11-23 13:05:09,993 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:09,993 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:09,993 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-23 13:05:09,993 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-23 13:05:09,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:09,994 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-11-23 13:05:09,994 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-11-23 13:05:09,995 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:09,995 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:09,995 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:09,995 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:09,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 13:05:09,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-11-23 13:05:09,996 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-11-23 13:05:09,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:09,997 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-11-23 13:05:09,997 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 13:05:09,997 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-11-23 13:05:09,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 13:05:09,997 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:09,998 INFO L402 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:09,998 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:09,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:09,998 INFO L82 PathProgramCache]: Analyzing trace with hash -57903855, now seen corresponding path program 13 times [2018-11-23 13:05:09,998 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:09,999 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:09,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:09,999 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:10,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:10,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:10,656 INFO L256 TraceCheckUtils]: 0: Hoare triple {2136#true} call ULTIMATE.init(); {2136#true} is VALID [2018-11-23 13:05:10,657 INFO L273 TraceCheckUtils]: 1: Hoare triple {2136#true} assume true; {2136#true} is VALID [2018-11-23 13:05:10,657 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2136#true} {2136#true} #31#return; {2136#true} is VALID [2018-11-23 13:05:10,657 INFO L256 TraceCheckUtils]: 3: Hoare triple {2136#true} call #t~ret1 := main(); {2136#true} is VALID [2018-11-23 13:05:10,658 INFO L273 TraceCheckUtils]: 4: Hoare triple {2136#true} ~x~0 := 1;~y~0 := 0; {2138#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:10,658 INFO L273 TraceCheckUtils]: 5: Hoare triple {2138#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2139#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:10,659 INFO L273 TraceCheckUtils]: 6: Hoare triple {2139#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2140#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:10,660 INFO L273 TraceCheckUtils]: 7: Hoare triple {2140#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2141#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:10,661 INFO L273 TraceCheckUtils]: 8: Hoare triple {2141#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2142#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:10,661 INFO L273 TraceCheckUtils]: 9: Hoare triple {2142#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2143#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:10,662 INFO L273 TraceCheckUtils]: 10: Hoare triple {2143#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2144#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:10,663 INFO L273 TraceCheckUtils]: 11: Hoare triple {2144#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2145#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:10,664 INFO L273 TraceCheckUtils]: 12: Hoare triple {2145#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2146#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:10,665 INFO L273 TraceCheckUtils]: 13: Hoare triple {2146#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2147#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:10,666 INFO L273 TraceCheckUtils]: 14: Hoare triple {2147#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2148#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:10,667 INFO L273 TraceCheckUtils]: 15: Hoare triple {2148#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2149#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:10,668 INFO L273 TraceCheckUtils]: 16: Hoare triple {2149#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2150#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:10,669 INFO L273 TraceCheckUtils]: 17: Hoare triple {2150#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2151#(and (<= main_~y~0 13) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:05:10,670 INFO L273 TraceCheckUtils]: 18: Hoare triple {2151#(and (<= main_~y~0 13) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {2137#false} is VALID [2018-11-23 13:05:10,671 INFO L256 TraceCheckUtils]: 19: Hoare triple {2137#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2137#false} is VALID [2018-11-23 13:05:10,671 INFO L273 TraceCheckUtils]: 20: Hoare triple {2137#false} ~cond := #in~cond; {2137#false} is VALID [2018-11-23 13:05:10,671 INFO L273 TraceCheckUtils]: 21: Hoare triple {2137#false} assume 0 == ~cond; {2137#false} is VALID [2018-11-23 13:05:10,671 INFO L273 TraceCheckUtils]: 22: Hoare triple {2137#false} assume !false; {2137#false} is VALID [2018-11-23 13:05:10,673 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:10,673 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:10,674 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:10,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:05:10,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:10,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:10,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:10,939 INFO L256 TraceCheckUtils]: 0: Hoare triple {2136#true} call ULTIMATE.init(); {2136#true} is VALID [2018-11-23 13:05:10,939 INFO L273 TraceCheckUtils]: 1: Hoare triple {2136#true} assume true; {2136#true} is VALID [2018-11-23 13:05:10,939 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2136#true} {2136#true} #31#return; {2136#true} is VALID [2018-11-23 13:05:10,940 INFO L256 TraceCheckUtils]: 3: Hoare triple {2136#true} call #t~ret1 := main(); {2136#true} is VALID [2018-11-23 13:05:10,941 INFO L273 TraceCheckUtils]: 4: Hoare triple {2136#true} ~x~0 := 1;~y~0 := 0; {2138#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:10,941 INFO L273 TraceCheckUtils]: 5: Hoare triple {2138#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2139#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:10,943 INFO L273 TraceCheckUtils]: 6: Hoare triple {2139#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2140#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:10,944 INFO L273 TraceCheckUtils]: 7: Hoare triple {2140#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2141#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:10,945 INFO L273 TraceCheckUtils]: 8: Hoare triple {2141#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2142#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:10,946 INFO L273 TraceCheckUtils]: 9: Hoare triple {2142#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2143#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:10,948 INFO L273 TraceCheckUtils]: 10: Hoare triple {2143#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2144#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:10,949 INFO L273 TraceCheckUtils]: 11: Hoare triple {2144#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2145#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:10,950 INFO L273 TraceCheckUtils]: 12: Hoare triple {2145#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2146#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:10,951 INFO L273 TraceCheckUtils]: 13: Hoare triple {2146#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2147#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:10,953 INFO L273 TraceCheckUtils]: 14: Hoare triple {2147#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2148#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:10,954 INFO L273 TraceCheckUtils]: 15: Hoare triple {2148#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2149#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:10,955 INFO L273 TraceCheckUtils]: 16: Hoare triple {2149#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2150#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:10,957 INFO L273 TraceCheckUtils]: 17: Hoare triple {2150#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2206#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:10,958 INFO L273 TraceCheckUtils]: 18: Hoare triple {2206#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {2137#false} is VALID [2018-11-23 13:05:10,958 INFO L256 TraceCheckUtils]: 19: Hoare triple {2137#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2137#false} is VALID [2018-11-23 13:05:10,958 INFO L273 TraceCheckUtils]: 20: Hoare triple {2137#false} ~cond := #in~cond; {2137#false} is VALID [2018-11-23 13:05:10,959 INFO L273 TraceCheckUtils]: 21: Hoare triple {2137#false} assume 0 == ~cond; {2137#false} is VALID [2018-11-23 13:05:10,959 INFO L273 TraceCheckUtils]: 22: Hoare triple {2137#false} assume !false; {2137#false} is VALID [2018-11-23 13:05:10,960 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:10,978 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:10,979 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-11-23 13:05:10,979 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 23 [2018-11-23 13:05:10,979 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:10,979 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 13:05:11,010 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:11,010 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 13:05:11,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 13:05:11,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-11-23 13:05:11,011 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 17 states. [2018-11-23 13:05:11,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:11,681 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-11-23 13:05:11,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 13:05:11,681 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 23 [2018-11-23 13:05:11,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:11,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 13:05:11,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 30 transitions. [2018-11-23 13:05:11,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 13:05:11,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 30 transitions. [2018-11-23 13:05:11,685 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states and 30 transitions. [2018-11-23 13:05:11,709 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:11,710 INFO L225 Difference]: With dead ends: 30 [2018-11-23 13:05:11,710 INFO L226 Difference]: Without dead ends: 25 [2018-11-23 13:05:11,711 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-11-23 13:05:11,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-11-23 13:05:11,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-11-23 13:05:11,734 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:11,734 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand 25 states. [2018-11-23 13:05:11,734 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand 25 states. [2018-11-23 13:05:11,734 INFO L87 Difference]: Start difference. First operand 25 states. Second operand 25 states. [2018-11-23 13:05:11,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:11,735 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2018-11-23 13:05:11,735 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-11-23 13:05:11,736 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:11,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:11,736 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand 25 states. [2018-11-23 13:05:11,736 INFO L87 Difference]: Start difference. First operand 25 states. Second operand 25 states. [2018-11-23 13:05:11,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:11,738 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2018-11-23 13:05:11,738 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-11-23 13:05:11,738 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:11,738 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:11,738 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:11,739 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:11,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 13:05:11,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-11-23 13:05:11,739 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-11-23 13:05:11,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:11,740 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-11-23 13:05:11,740 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 13:05:11,740 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-11-23 13:05:11,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 13:05:11,741 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:11,741 INFO L402 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:11,741 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:11,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:11,741 INFO L82 PathProgramCache]: Analyzing trace with hash -1758558242, now seen corresponding path program 14 times [2018-11-23 13:05:11,741 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:11,741 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:11,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:11,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:05:11,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:11,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:12,072 INFO L256 TraceCheckUtils]: 0: Hoare triple {2370#true} call ULTIMATE.init(); {2370#true} is VALID [2018-11-23 13:05:12,072 INFO L273 TraceCheckUtils]: 1: Hoare triple {2370#true} assume true; {2370#true} is VALID [2018-11-23 13:05:12,073 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2370#true} {2370#true} #31#return; {2370#true} is VALID [2018-11-23 13:05:12,073 INFO L256 TraceCheckUtils]: 3: Hoare triple {2370#true} call #t~ret1 := main(); {2370#true} is VALID [2018-11-23 13:05:12,073 INFO L273 TraceCheckUtils]: 4: Hoare triple {2370#true} ~x~0 := 1;~y~0 := 0; {2372#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:12,074 INFO L273 TraceCheckUtils]: 5: Hoare triple {2372#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2373#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:12,074 INFO L273 TraceCheckUtils]: 6: Hoare triple {2373#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2374#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:12,075 INFO L273 TraceCheckUtils]: 7: Hoare triple {2374#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2375#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:12,076 INFO L273 TraceCheckUtils]: 8: Hoare triple {2375#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2376#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:12,077 INFO L273 TraceCheckUtils]: 9: Hoare triple {2376#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2377#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:12,078 INFO L273 TraceCheckUtils]: 10: Hoare triple {2377#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2378#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:12,079 INFO L273 TraceCheckUtils]: 11: Hoare triple {2378#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2379#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:12,080 INFO L273 TraceCheckUtils]: 12: Hoare triple {2379#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2380#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:12,081 INFO L273 TraceCheckUtils]: 13: Hoare triple {2380#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2381#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:12,082 INFO L273 TraceCheckUtils]: 14: Hoare triple {2381#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2382#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:12,083 INFO L273 TraceCheckUtils]: 15: Hoare triple {2382#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2383#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:12,084 INFO L273 TraceCheckUtils]: 16: Hoare triple {2383#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2384#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:12,085 INFO L273 TraceCheckUtils]: 17: Hoare triple {2384#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2385#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:12,086 INFO L273 TraceCheckUtils]: 18: Hoare triple {2385#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2386#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 14))} is VALID [2018-11-23 13:05:12,087 INFO L273 TraceCheckUtils]: 19: Hoare triple {2386#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 14))} assume !(~y~0 % 4294967296 < 1024); {2371#false} is VALID [2018-11-23 13:05:12,087 INFO L256 TraceCheckUtils]: 20: Hoare triple {2371#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2371#false} is VALID [2018-11-23 13:05:12,088 INFO L273 TraceCheckUtils]: 21: Hoare triple {2371#false} ~cond := #in~cond; {2371#false} is VALID [2018-11-23 13:05:12,088 INFO L273 TraceCheckUtils]: 22: Hoare triple {2371#false} assume 0 == ~cond; {2371#false} is VALID [2018-11-23 13:05:12,088 INFO L273 TraceCheckUtils]: 23: Hoare triple {2371#false} assume !false; {2371#false} is VALID [2018-11-23 13:05:12,089 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:12,089 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:12,090 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:12,099 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:05:12,113 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:05:12,114 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:12,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:12,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:12,237 INFO L256 TraceCheckUtils]: 0: Hoare triple {2370#true} call ULTIMATE.init(); {2370#true} is VALID [2018-11-23 13:05:12,238 INFO L273 TraceCheckUtils]: 1: Hoare triple {2370#true} assume true; {2370#true} is VALID [2018-11-23 13:05:12,238 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2370#true} {2370#true} #31#return; {2370#true} is VALID [2018-11-23 13:05:12,238 INFO L256 TraceCheckUtils]: 3: Hoare triple {2370#true} call #t~ret1 := main(); {2370#true} is VALID [2018-11-23 13:05:12,238 INFO L273 TraceCheckUtils]: 4: Hoare triple {2370#true} ~x~0 := 1;~y~0 := 0; {2372#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:12,239 INFO L273 TraceCheckUtils]: 5: Hoare triple {2372#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2373#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:12,239 INFO L273 TraceCheckUtils]: 6: Hoare triple {2373#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2374#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:12,240 INFO L273 TraceCheckUtils]: 7: Hoare triple {2374#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2375#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:12,241 INFO L273 TraceCheckUtils]: 8: Hoare triple {2375#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2376#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:12,242 INFO L273 TraceCheckUtils]: 9: Hoare triple {2376#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2377#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:12,243 INFO L273 TraceCheckUtils]: 10: Hoare triple {2377#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2378#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:12,244 INFO L273 TraceCheckUtils]: 11: Hoare triple {2378#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2379#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:12,245 INFO L273 TraceCheckUtils]: 12: Hoare triple {2379#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2380#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:12,245 INFO L273 TraceCheckUtils]: 13: Hoare triple {2380#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2381#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:12,246 INFO L273 TraceCheckUtils]: 14: Hoare triple {2381#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2382#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:12,247 INFO L273 TraceCheckUtils]: 15: Hoare triple {2382#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2383#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:12,248 INFO L273 TraceCheckUtils]: 16: Hoare triple {2383#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2384#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:12,249 INFO L273 TraceCheckUtils]: 17: Hoare triple {2384#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2385#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:12,250 INFO L273 TraceCheckUtils]: 18: Hoare triple {2385#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2444#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:12,251 INFO L273 TraceCheckUtils]: 19: Hoare triple {2444#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {2371#false} is VALID [2018-11-23 13:05:12,251 INFO L256 TraceCheckUtils]: 20: Hoare triple {2371#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2371#false} is VALID [2018-11-23 13:05:12,252 INFO L273 TraceCheckUtils]: 21: Hoare triple {2371#false} ~cond := #in~cond; {2371#false} is VALID [2018-11-23 13:05:12,252 INFO L273 TraceCheckUtils]: 22: Hoare triple {2371#false} assume 0 == ~cond; {2371#false} is VALID [2018-11-23 13:05:12,252 INFO L273 TraceCheckUtils]: 23: Hoare triple {2371#false} assume !false; {2371#false} is VALID [2018-11-23 13:05:12,253 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:12,272 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:12,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-11-23 13:05:12,273 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 24 [2018-11-23 13:05:12,273 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:12,273 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 13:05:12,293 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:12,293 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 13:05:12,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 13:05:12,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-11-23 13:05:12,294 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 18 states. [2018-11-23 13:05:13,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:13,001 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-11-23 13:05:13,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 13:05:13,002 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 24 [2018-11-23 13:05:13,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:13,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 13:05:13,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 31 transitions. [2018-11-23 13:05:13,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 13:05:13,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 31 transitions. [2018-11-23 13:05:13,005 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 31 transitions. [2018-11-23 13:05:13,038 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:13,039 INFO L225 Difference]: With dead ends: 31 [2018-11-23 13:05:13,040 INFO L226 Difference]: Without dead ends: 26 [2018-11-23 13:05:13,040 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-11-23 13:05:13,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-11-23 13:05:13,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-11-23 13:05:13,067 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:13,068 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand 26 states. [2018-11-23 13:05:13,068 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand 26 states. [2018-11-23 13:05:13,068 INFO L87 Difference]: Start difference. First operand 26 states. Second operand 26 states. [2018-11-23 13:05:13,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:13,069 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-11-23 13:05:13,069 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-11-23 13:05:13,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:13,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:13,069 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand 26 states. [2018-11-23 13:05:13,069 INFO L87 Difference]: Start difference. First operand 26 states. Second operand 26 states. [2018-11-23 13:05:13,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:13,070 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-11-23 13:05:13,070 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-11-23 13:05:13,071 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:13,071 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:13,071 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:13,071 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:13,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 13:05:13,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-11-23 13:05:13,072 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-11-23 13:05:13,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:13,072 INFO L480 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-11-23 13:05:13,072 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 13:05:13,072 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-11-23 13:05:13,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 13:05:13,073 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:13,073 INFO L402 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:13,073 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:13,073 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:13,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1355730609, now seen corresponding path program 15 times [2018-11-23 13:05:13,074 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:13,074 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:13,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:13,075 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:13,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:13,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:13,414 INFO L256 TraceCheckUtils]: 0: Hoare triple {2614#true} call ULTIMATE.init(); {2614#true} is VALID [2018-11-23 13:05:13,414 INFO L273 TraceCheckUtils]: 1: Hoare triple {2614#true} assume true; {2614#true} is VALID [2018-11-23 13:05:13,414 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2614#true} {2614#true} #31#return; {2614#true} is VALID [2018-11-23 13:05:13,414 INFO L256 TraceCheckUtils]: 3: Hoare triple {2614#true} call #t~ret1 := main(); {2614#true} is VALID [2018-11-23 13:05:13,424 INFO L273 TraceCheckUtils]: 4: Hoare triple {2614#true} ~x~0 := 1;~y~0 := 0; {2616#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:13,425 INFO L273 TraceCheckUtils]: 5: Hoare triple {2616#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2617#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:13,426 INFO L273 TraceCheckUtils]: 6: Hoare triple {2617#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2618#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:13,427 INFO L273 TraceCheckUtils]: 7: Hoare triple {2618#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2619#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:13,427 INFO L273 TraceCheckUtils]: 8: Hoare triple {2619#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2620#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:13,428 INFO L273 TraceCheckUtils]: 9: Hoare triple {2620#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2621#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:13,428 INFO L273 TraceCheckUtils]: 10: Hoare triple {2621#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2622#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:13,429 INFO L273 TraceCheckUtils]: 11: Hoare triple {2622#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2623#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:13,446 INFO L273 TraceCheckUtils]: 12: Hoare triple {2623#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2624#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:13,447 INFO L273 TraceCheckUtils]: 13: Hoare triple {2624#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2625#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:13,447 INFO L273 TraceCheckUtils]: 14: Hoare triple {2625#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2626#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:13,448 INFO L273 TraceCheckUtils]: 15: Hoare triple {2626#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2627#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:13,449 INFO L273 TraceCheckUtils]: 16: Hoare triple {2627#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2628#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:13,449 INFO L273 TraceCheckUtils]: 17: Hoare triple {2628#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2629#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:13,450 INFO L273 TraceCheckUtils]: 18: Hoare triple {2629#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2630#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:13,451 INFO L273 TraceCheckUtils]: 19: Hoare triple {2630#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2631#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:13,452 INFO L273 TraceCheckUtils]: 20: Hoare triple {2631#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 15))} assume !(~y~0 % 4294967296 < 1024); {2615#false} is VALID [2018-11-23 13:05:13,452 INFO L256 TraceCheckUtils]: 21: Hoare triple {2615#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2615#false} is VALID [2018-11-23 13:05:13,452 INFO L273 TraceCheckUtils]: 22: Hoare triple {2615#false} ~cond := #in~cond; {2615#false} is VALID [2018-11-23 13:05:13,452 INFO L273 TraceCheckUtils]: 23: Hoare triple {2615#false} assume 0 == ~cond; {2615#false} is VALID [2018-11-23 13:05:13,453 INFO L273 TraceCheckUtils]: 24: Hoare triple {2615#false} assume !false; {2615#false} is VALID [2018-11-23 13:05:13,454 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:13,454 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:13,454 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:13,465 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 13:05:13,657 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-11-23 13:05:13,657 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:13,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:13,666 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:13,927 INFO L256 TraceCheckUtils]: 0: Hoare triple {2614#true} call ULTIMATE.init(); {2614#true} is VALID [2018-11-23 13:05:13,928 INFO L273 TraceCheckUtils]: 1: Hoare triple {2614#true} assume true; {2614#true} is VALID [2018-11-23 13:05:13,928 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2614#true} {2614#true} #31#return; {2614#true} is VALID [2018-11-23 13:05:13,928 INFO L256 TraceCheckUtils]: 3: Hoare triple {2614#true} call #t~ret1 := main(); {2614#true} is VALID [2018-11-23 13:05:13,929 INFO L273 TraceCheckUtils]: 4: Hoare triple {2614#true} ~x~0 := 1;~y~0 := 0; {2616#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:13,930 INFO L273 TraceCheckUtils]: 5: Hoare triple {2616#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2617#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:13,931 INFO L273 TraceCheckUtils]: 6: Hoare triple {2617#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2618#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:13,931 INFO L273 TraceCheckUtils]: 7: Hoare triple {2618#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2619#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:13,932 INFO L273 TraceCheckUtils]: 8: Hoare triple {2619#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2620#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:13,932 INFO L273 TraceCheckUtils]: 9: Hoare triple {2620#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2621#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:13,933 INFO L273 TraceCheckUtils]: 10: Hoare triple {2621#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2622#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:13,934 INFO L273 TraceCheckUtils]: 11: Hoare triple {2622#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2623#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:13,935 INFO L273 TraceCheckUtils]: 12: Hoare triple {2623#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2624#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:13,936 INFO L273 TraceCheckUtils]: 13: Hoare triple {2624#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2625#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:13,937 INFO L273 TraceCheckUtils]: 14: Hoare triple {2625#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2626#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:13,938 INFO L273 TraceCheckUtils]: 15: Hoare triple {2626#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2627#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:13,939 INFO L273 TraceCheckUtils]: 16: Hoare triple {2627#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2628#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:13,940 INFO L273 TraceCheckUtils]: 17: Hoare triple {2628#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2629#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:13,941 INFO L273 TraceCheckUtils]: 18: Hoare triple {2629#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2630#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:13,942 INFO L273 TraceCheckUtils]: 19: Hoare triple {2630#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2692#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:13,943 INFO L273 TraceCheckUtils]: 20: Hoare triple {2692#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !(~y~0 % 4294967296 < 1024); {2615#false} is VALID [2018-11-23 13:05:13,943 INFO L256 TraceCheckUtils]: 21: Hoare triple {2615#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2615#false} is VALID [2018-11-23 13:05:13,943 INFO L273 TraceCheckUtils]: 22: Hoare triple {2615#false} ~cond := #in~cond; {2615#false} is VALID [2018-11-23 13:05:13,943 INFO L273 TraceCheckUtils]: 23: Hoare triple {2615#false} assume 0 == ~cond; {2615#false} is VALID [2018-11-23 13:05:13,944 INFO L273 TraceCheckUtils]: 24: Hoare triple {2615#false} assume !false; {2615#false} is VALID [2018-11-23 13:05:13,945 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:13,965 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:13,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-11-23 13:05:13,965 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 25 [2018-11-23 13:05:13,966 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:13,966 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 13:05:13,987 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:13,987 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 13:05:13,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 13:05:13,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-11-23 13:05:13,988 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 19 states. [2018-11-23 13:05:14,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:14,712 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-11-23 13:05:14,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 13:05:14,712 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 25 [2018-11-23 13:05:14,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:14,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 13:05:14,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 32 transitions. [2018-11-23 13:05:14,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 13:05:14,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 32 transitions. [2018-11-23 13:05:14,715 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 32 transitions. [2018-11-23 13:05:14,739 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:14,740 INFO L225 Difference]: With dead ends: 32 [2018-11-23 13:05:14,740 INFO L226 Difference]: Without dead ends: 27 [2018-11-23 13:05:14,741 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 24 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-11-23 13:05:14,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-11-23 13:05:14,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-11-23 13:05:14,764 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:14,764 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand 27 states. [2018-11-23 13:05:14,765 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-23 13:05:14,765 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-23 13:05:14,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:14,766 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-11-23 13:05:14,766 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-11-23 13:05:14,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:14,767 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:14,767 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-23 13:05:14,767 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-23 13:05:14,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:14,768 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-11-23 13:05:14,768 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-11-23 13:05:14,768 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:14,768 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:14,768 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:14,768 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:14,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 13:05:14,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-11-23 13:05:14,769 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-11-23 13:05:14,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:14,769 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-11-23 13:05:14,770 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 13:05:14,770 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-11-23 13:05:14,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-23 13:05:14,770 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:14,770 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:14,770 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:14,771 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:14,771 INFO L82 PathProgramCache]: Analyzing trace with hash -885562818, now seen corresponding path program 16 times [2018-11-23 13:05:14,771 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:14,771 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:14,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:14,772 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:14,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:14,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:15,110 INFO L256 TraceCheckUtils]: 0: Hoare triple {2868#true} call ULTIMATE.init(); {2868#true} is VALID [2018-11-23 13:05:15,111 INFO L273 TraceCheckUtils]: 1: Hoare triple {2868#true} assume true; {2868#true} is VALID [2018-11-23 13:05:15,111 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2868#true} {2868#true} #31#return; {2868#true} is VALID [2018-11-23 13:05:15,111 INFO L256 TraceCheckUtils]: 3: Hoare triple {2868#true} call #t~ret1 := main(); {2868#true} is VALID [2018-11-23 13:05:15,111 INFO L273 TraceCheckUtils]: 4: Hoare triple {2868#true} ~x~0 := 1;~y~0 := 0; {2870#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:15,112 INFO L273 TraceCheckUtils]: 5: Hoare triple {2870#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:15,113 INFO L273 TraceCheckUtils]: 6: Hoare triple {2871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2872#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:15,113 INFO L273 TraceCheckUtils]: 7: Hoare triple {2872#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:15,114 INFO L273 TraceCheckUtils]: 8: Hoare triple {2873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:15,115 INFO L273 TraceCheckUtils]: 9: Hoare triple {2874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2875#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:15,116 INFO L273 TraceCheckUtils]: 10: Hoare triple {2875#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2876#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:15,117 INFO L273 TraceCheckUtils]: 11: Hoare triple {2876#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2877#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:15,118 INFO L273 TraceCheckUtils]: 12: Hoare triple {2877#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2878#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:15,119 INFO L273 TraceCheckUtils]: 13: Hoare triple {2878#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2879#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:15,120 INFO L273 TraceCheckUtils]: 14: Hoare triple {2879#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2880#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:15,121 INFO L273 TraceCheckUtils]: 15: Hoare triple {2880#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2881#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:15,122 INFO L273 TraceCheckUtils]: 16: Hoare triple {2881#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2882#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:15,123 INFO L273 TraceCheckUtils]: 17: Hoare triple {2882#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2883#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:15,124 INFO L273 TraceCheckUtils]: 18: Hoare triple {2883#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2884#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:15,125 INFO L273 TraceCheckUtils]: 19: Hoare triple {2884#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2885#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:15,126 INFO L273 TraceCheckUtils]: 20: Hoare triple {2885#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2886#(and (<= main_~y~0 16) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:05:15,127 INFO L273 TraceCheckUtils]: 21: Hoare triple {2886#(and (<= main_~y~0 16) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {2869#false} is VALID [2018-11-23 13:05:15,127 INFO L256 TraceCheckUtils]: 22: Hoare triple {2869#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2869#false} is VALID [2018-11-23 13:05:15,127 INFO L273 TraceCheckUtils]: 23: Hoare triple {2869#false} ~cond := #in~cond; {2869#false} is VALID [2018-11-23 13:05:15,127 INFO L273 TraceCheckUtils]: 24: Hoare triple {2869#false} assume 0 == ~cond; {2869#false} is VALID [2018-11-23 13:05:15,128 INFO L273 TraceCheckUtils]: 25: Hoare triple {2869#false} assume !false; {2869#false} is VALID [2018-11-23 13:05:15,129 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:15,129 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:15,129 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:15,139 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 13:05:15,153 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 13:05:15,153 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:15,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:15,170 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:15,341 INFO L256 TraceCheckUtils]: 0: Hoare triple {2868#true} call ULTIMATE.init(); {2868#true} is VALID [2018-11-23 13:05:15,342 INFO L273 TraceCheckUtils]: 1: Hoare triple {2868#true} assume true; {2868#true} is VALID [2018-11-23 13:05:15,342 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2868#true} {2868#true} #31#return; {2868#true} is VALID [2018-11-23 13:05:15,342 INFO L256 TraceCheckUtils]: 3: Hoare triple {2868#true} call #t~ret1 := main(); {2868#true} is VALID [2018-11-23 13:05:15,343 INFO L273 TraceCheckUtils]: 4: Hoare triple {2868#true} ~x~0 := 1;~y~0 := 0; {2870#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:15,344 INFO L273 TraceCheckUtils]: 5: Hoare triple {2870#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:15,344 INFO L273 TraceCheckUtils]: 6: Hoare triple {2871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2872#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:15,345 INFO L273 TraceCheckUtils]: 7: Hoare triple {2872#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:15,346 INFO L273 TraceCheckUtils]: 8: Hoare triple {2873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:15,346 INFO L273 TraceCheckUtils]: 9: Hoare triple {2874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2875#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:15,347 INFO L273 TraceCheckUtils]: 10: Hoare triple {2875#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2876#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:15,348 INFO L273 TraceCheckUtils]: 11: Hoare triple {2876#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2877#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:15,349 INFO L273 TraceCheckUtils]: 12: Hoare triple {2877#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2878#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:15,350 INFO L273 TraceCheckUtils]: 13: Hoare triple {2878#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2879#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:15,351 INFO L273 TraceCheckUtils]: 14: Hoare triple {2879#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2880#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:15,352 INFO L273 TraceCheckUtils]: 15: Hoare triple {2880#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2881#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:15,353 INFO L273 TraceCheckUtils]: 16: Hoare triple {2881#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2882#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:15,354 INFO L273 TraceCheckUtils]: 17: Hoare triple {2882#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2883#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:15,355 INFO L273 TraceCheckUtils]: 18: Hoare triple {2883#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2884#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:15,355 INFO L273 TraceCheckUtils]: 19: Hoare triple {2884#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2885#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:15,356 INFO L273 TraceCheckUtils]: 20: Hoare triple {2885#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {2950#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:05:15,357 INFO L273 TraceCheckUtils]: 21: Hoare triple {2950#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {2869#false} is VALID [2018-11-23 13:05:15,357 INFO L256 TraceCheckUtils]: 22: Hoare triple {2869#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {2869#false} is VALID [2018-11-23 13:05:15,358 INFO L273 TraceCheckUtils]: 23: Hoare triple {2869#false} ~cond := #in~cond; {2869#false} is VALID [2018-11-23 13:05:15,358 INFO L273 TraceCheckUtils]: 24: Hoare triple {2869#false} assume 0 == ~cond; {2869#false} is VALID [2018-11-23 13:05:15,358 INFO L273 TraceCheckUtils]: 25: Hoare triple {2869#false} assume !false; {2869#false} is VALID [2018-11-23 13:05:15,360 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:15,379 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:15,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-11-23 13:05:15,379 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 26 [2018-11-23 13:05:15,380 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:15,380 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 13:05:15,401 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:15,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 13:05:15,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 13:05:15,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-11-23 13:05:15,402 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 20 states. [2018-11-23 13:05:16,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:16,282 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-11-23 13:05:16,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 13:05:16,282 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 26 [2018-11-23 13:05:16,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:16,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 13:05:16,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 33 transitions. [2018-11-23 13:05:16,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 13:05:16,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 33 transitions. [2018-11-23 13:05:16,286 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states and 33 transitions. [2018-11-23 13:05:16,310 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:16,311 INFO L225 Difference]: With dead ends: 33 [2018-11-23 13:05:16,311 INFO L226 Difference]: Without dead ends: 28 [2018-11-23 13:05:16,312 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-11-23 13:05:16,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-11-23 13:05:16,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-11-23 13:05:16,337 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:16,337 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand 28 states. [2018-11-23 13:05:16,337 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-23 13:05:16,337 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-23 13:05:16,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:16,338 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-11-23 13:05:16,338 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-11-23 13:05:16,338 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:16,338 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:16,339 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-23 13:05:16,339 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-23 13:05:16,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:16,339 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-11-23 13:05:16,340 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-11-23 13:05:16,340 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:16,340 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:16,340 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:16,340 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:16,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-23 13:05:16,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-11-23 13:05:16,341 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-11-23 13:05:16,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:16,341 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-11-23 13:05:16,341 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 13:05:16,341 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-11-23 13:05:16,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 13:05:16,342 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:16,342 INFO L402 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:16,342 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:16,342 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:16,343 INFO L82 PathProgramCache]: Analyzing trace with hash -1646182319, now seen corresponding path program 17 times [2018-11-23 13:05:16,343 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:16,343 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:16,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:16,344 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:16,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:16,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:17,229 INFO L256 TraceCheckUtils]: 0: Hoare triple {3132#true} call ULTIMATE.init(); {3132#true} is VALID [2018-11-23 13:05:17,229 INFO L273 TraceCheckUtils]: 1: Hoare triple {3132#true} assume true; {3132#true} is VALID [2018-11-23 13:05:17,229 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3132#true} {3132#true} #31#return; {3132#true} is VALID [2018-11-23 13:05:17,229 INFO L256 TraceCheckUtils]: 3: Hoare triple {3132#true} call #t~ret1 := main(); {3132#true} is VALID [2018-11-23 13:05:17,230 INFO L273 TraceCheckUtils]: 4: Hoare triple {3132#true} ~x~0 := 1;~y~0 := 0; {3134#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:17,231 INFO L273 TraceCheckUtils]: 5: Hoare triple {3134#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3135#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:17,232 INFO L273 TraceCheckUtils]: 6: Hoare triple {3135#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3136#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:17,233 INFO L273 TraceCheckUtils]: 7: Hoare triple {3136#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3137#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:17,233 INFO L273 TraceCheckUtils]: 8: Hoare triple {3137#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3138#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:17,234 INFO L273 TraceCheckUtils]: 9: Hoare triple {3138#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3139#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:17,235 INFO L273 TraceCheckUtils]: 10: Hoare triple {3139#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3140#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:17,236 INFO L273 TraceCheckUtils]: 11: Hoare triple {3140#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3141#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:17,237 INFO L273 TraceCheckUtils]: 12: Hoare triple {3141#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3142#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:17,238 INFO L273 TraceCheckUtils]: 13: Hoare triple {3142#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3143#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:17,239 INFO L273 TraceCheckUtils]: 14: Hoare triple {3143#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3144#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:17,240 INFO L273 TraceCheckUtils]: 15: Hoare triple {3144#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3145#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:17,241 INFO L273 TraceCheckUtils]: 16: Hoare triple {3145#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3146#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:17,242 INFO L273 TraceCheckUtils]: 17: Hoare triple {3146#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3147#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:17,243 INFO L273 TraceCheckUtils]: 18: Hoare triple {3147#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3148#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:17,244 INFO L273 TraceCheckUtils]: 19: Hoare triple {3148#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3149#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:17,246 INFO L273 TraceCheckUtils]: 20: Hoare triple {3149#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3150#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:05:17,247 INFO L273 TraceCheckUtils]: 21: Hoare triple {3150#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3151#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 17))} is VALID [2018-11-23 13:05:17,248 INFO L273 TraceCheckUtils]: 22: Hoare triple {3151#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 17))} assume !(~y~0 % 4294967296 < 1024); {3133#false} is VALID [2018-11-23 13:05:17,248 INFO L256 TraceCheckUtils]: 23: Hoare triple {3133#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3133#false} is VALID [2018-11-23 13:05:17,248 INFO L273 TraceCheckUtils]: 24: Hoare triple {3133#false} ~cond := #in~cond; {3133#false} is VALID [2018-11-23 13:05:17,249 INFO L273 TraceCheckUtils]: 25: Hoare triple {3133#false} assume 0 == ~cond; {3133#false} is VALID [2018-11-23 13:05:17,249 INFO L273 TraceCheckUtils]: 26: Hoare triple {3133#false} assume !false; {3133#false} is VALID [2018-11-23 13:05:17,251 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:17,251 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:17,252 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:17,260 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 13:05:51,529 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-11-23 13:05:51,530 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:51,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:51,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:52,139 INFO L256 TraceCheckUtils]: 0: Hoare triple {3132#true} call ULTIMATE.init(); {3132#true} is VALID [2018-11-23 13:05:52,139 INFO L273 TraceCheckUtils]: 1: Hoare triple {3132#true} assume true; {3132#true} is VALID [2018-11-23 13:05:52,140 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3132#true} {3132#true} #31#return; {3132#true} is VALID [2018-11-23 13:05:52,140 INFO L256 TraceCheckUtils]: 3: Hoare triple {3132#true} call #t~ret1 := main(); {3132#true} is VALID [2018-11-23 13:05:52,140 INFO L273 TraceCheckUtils]: 4: Hoare triple {3132#true} ~x~0 := 1;~y~0 := 0; {3134#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:52,141 INFO L273 TraceCheckUtils]: 5: Hoare triple {3134#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3135#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:52,142 INFO L273 TraceCheckUtils]: 6: Hoare triple {3135#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3136#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:52,142 INFO L273 TraceCheckUtils]: 7: Hoare triple {3136#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3137#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:52,143 INFO L273 TraceCheckUtils]: 8: Hoare triple {3137#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3138#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:52,144 INFO L273 TraceCheckUtils]: 9: Hoare triple {3138#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3139#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:52,145 INFO L273 TraceCheckUtils]: 10: Hoare triple {3139#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3140#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:52,146 INFO L273 TraceCheckUtils]: 11: Hoare triple {3140#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3141#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:52,147 INFO L273 TraceCheckUtils]: 12: Hoare triple {3141#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3142#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:52,148 INFO L273 TraceCheckUtils]: 13: Hoare triple {3142#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3143#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:52,149 INFO L273 TraceCheckUtils]: 14: Hoare triple {3143#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3144#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:52,150 INFO L273 TraceCheckUtils]: 15: Hoare triple {3144#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3145#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:52,151 INFO L273 TraceCheckUtils]: 16: Hoare triple {3145#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3146#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:52,152 INFO L273 TraceCheckUtils]: 17: Hoare triple {3146#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3147#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:52,153 INFO L273 TraceCheckUtils]: 18: Hoare triple {3147#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3148#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:52,154 INFO L273 TraceCheckUtils]: 19: Hoare triple {3148#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3149#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:52,155 INFO L273 TraceCheckUtils]: 20: Hoare triple {3149#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3150#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:05:52,156 INFO L273 TraceCheckUtils]: 21: Hoare triple {3150#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3218#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:05:52,157 INFO L273 TraceCheckUtils]: 22: Hoare triple {3218#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {3133#false} is VALID [2018-11-23 13:05:52,158 INFO L256 TraceCheckUtils]: 23: Hoare triple {3133#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3133#false} is VALID [2018-11-23 13:05:52,158 INFO L273 TraceCheckUtils]: 24: Hoare triple {3133#false} ~cond := #in~cond; {3133#false} is VALID [2018-11-23 13:05:52,158 INFO L273 TraceCheckUtils]: 25: Hoare triple {3133#false} assume 0 == ~cond; {3133#false} is VALID [2018-11-23 13:05:52,158 INFO L273 TraceCheckUtils]: 26: Hoare triple {3133#false} assume !false; {3133#false} is VALID [2018-11-23 13:05:52,161 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:52,182 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:52,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 21 [2018-11-23 13:05:52,183 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 27 [2018-11-23 13:05:52,183 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:52,183 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-23 13:05:52,209 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:52,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 13:05:52,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 13:05:52,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-11-23 13:05:52,210 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 21 states. [2018-11-23 13:05:53,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:53,257 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-11-23 13:05:53,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 13:05:53,257 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 27 [2018-11-23 13:05:53,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:53,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 13:05:53,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 34 transitions. [2018-11-23 13:05:53,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 13:05:53,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 34 transitions. [2018-11-23 13:05:53,260 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states and 34 transitions. [2018-11-23 13:05:53,290 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:53,291 INFO L225 Difference]: With dead ends: 34 [2018-11-23 13:05:53,291 INFO L226 Difference]: Without dead ends: 29 [2018-11-23 13:05:53,292 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-11-23 13:05:53,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-23 13:05:53,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-11-23 13:05:53,317 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:53,317 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 29 states. [2018-11-23 13:05:53,317 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-23 13:05:53,317 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-23 13:05:53,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:53,318 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-11-23 13:05:53,319 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-11-23 13:05:53,319 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:53,319 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:53,319 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-23 13:05:53,319 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-23 13:05:53,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:53,320 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-11-23 13:05:53,320 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-11-23 13:05:53,320 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:53,320 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:53,320 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:53,320 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:53,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-23 13:05:53,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-11-23 13:05:53,321 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-11-23 13:05:53,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:53,321 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-11-23 13:05:53,321 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 13:05:53,321 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-11-23 13:05:53,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 13:05:53,322 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:53,322 INFO L402 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:53,322 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:53,322 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:53,322 INFO L82 PathProgramCache]: Analyzing trace with hash 544416926, now seen corresponding path program 18 times [2018-11-23 13:05:53,322 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:53,322 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:53,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:53,323 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:53,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:53,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:54,710 INFO L256 TraceCheckUtils]: 0: Hoare triple {3406#true} call ULTIMATE.init(); {3406#true} is VALID [2018-11-23 13:05:54,711 INFO L273 TraceCheckUtils]: 1: Hoare triple {3406#true} assume true; {3406#true} is VALID [2018-11-23 13:05:54,711 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3406#true} {3406#true} #31#return; {3406#true} is VALID [2018-11-23 13:05:54,711 INFO L256 TraceCheckUtils]: 3: Hoare triple {3406#true} call #t~ret1 := main(); {3406#true} is VALID [2018-11-23 13:05:54,729 INFO L273 TraceCheckUtils]: 4: Hoare triple {3406#true} ~x~0 := 1;~y~0 := 0; {3408#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:54,732 INFO L273 TraceCheckUtils]: 5: Hoare triple {3408#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3409#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:54,733 INFO L273 TraceCheckUtils]: 6: Hoare triple {3409#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3410#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:54,734 INFO L273 TraceCheckUtils]: 7: Hoare triple {3410#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3411#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:54,734 INFO L273 TraceCheckUtils]: 8: Hoare triple {3411#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3412#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:54,735 INFO L273 TraceCheckUtils]: 9: Hoare triple {3412#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3413#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:54,735 INFO L273 TraceCheckUtils]: 10: Hoare triple {3413#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3414#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:54,736 INFO L273 TraceCheckUtils]: 11: Hoare triple {3414#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3415#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:54,737 INFO L273 TraceCheckUtils]: 12: Hoare triple {3415#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3416#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:54,738 INFO L273 TraceCheckUtils]: 13: Hoare triple {3416#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3417#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:54,739 INFO L273 TraceCheckUtils]: 14: Hoare triple {3417#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:54,740 INFO L273 TraceCheckUtils]: 15: Hoare triple {3418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3419#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:54,741 INFO L273 TraceCheckUtils]: 16: Hoare triple {3419#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3420#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:54,742 INFO L273 TraceCheckUtils]: 17: Hoare triple {3420#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3421#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:54,743 INFO L273 TraceCheckUtils]: 18: Hoare triple {3421#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3422#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:54,744 INFO L273 TraceCheckUtils]: 19: Hoare triple {3422#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3423#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:54,745 INFO L273 TraceCheckUtils]: 20: Hoare triple {3423#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3424#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:05:54,745 INFO L273 TraceCheckUtils]: 21: Hoare triple {3424#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3425#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:05:54,747 INFO L273 TraceCheckUtils]: 22: Hoare triple {3425#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3426#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 18))} is VALID [2018-11-23 13:05:54,747 INFO L273 TraceCheckUtils]: 23: Hoare triple {3426#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 18))} assume !(~y~0 % 4294967296 < 1024); {3407#false} is VALID [2018-11-23 13:05:54,748 INFO L256 TraceCheckUtils]: 24: Hoare triple {3407#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3407#false} is VALID [2018-11-23 13:05:54,748 INFO L273 TraceCheckUtils]: 25: Hoare triple {3407#false} ~cond := #in~cond; {3407#false} is VALID [2018-11-23 13:05:54,748 INFO L273 TraceCheckUtils]: 26: Hoare triple {3407#false} assume 0 == ~cond; {3407#false} is VALID [2018-11-23 13:05:54,748 INFO L273 TraceCheckUtils]: 27: Hoare triple {3407#false} assume !false; {3407#false} is VALID [2018-11-23 13:05:54,750 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:54,750 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:54,750 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:54,758 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 13:05:55,213 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-11-23 13:05:55,213 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:05:55,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:55,223 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:55,349 INFO L256 TraceCheckUtils]: 0: Hoare triple {3406#true} call ULTIMATE.init(); {3406#true} is VALID [2018-11-23 13:05:55,349 INFO L273 TraceCheckUtils]: 1: Hoare triple {3406#true} assume true; {3406#true} is VALID [2018-11-23 13:05:55,350 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3406#true} {3406#true} #31#return; {3406#true} is VALID [2018-11-23 13:05:55,350 INFO L256 TraceCheckUtils]: 3: Hoare triple {3406#true} call #t~ret1 := main(); {3406#true} is VALID [2018-11-23 13:05:55,351 INFO L273 TraceCheckUtils]: 4: Hoare triple {3406#true} ~x~0 := 1;~y~0 := 0; {3408#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:55,351 INFO L273 TraceCheckUtils]: 5: Hoare triple {3408#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3409#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:55,352 INFO L273 TraceCheckUtils]: 6: Hoare triple {3409#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3410#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:55,353 INFO L273 TraceCheckUtils]: 7: Hoare triple {3410#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3411#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:55,353 INFO L273 TraceCheckUtils]: 8: Hoare triple {3411#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3412#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:55,354 INFO L273 TraceCheckUtils]: 9: Hoare triple {3412#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3413#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:55,354 INFO L273 TraceCheckUtils]: 10: Hoare triple {3413#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3414#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:55,355 INFO L273 TraceCheckUtils]: 11: Hoare triple {3414#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3415#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:55,356 INFO L273 TraceCheckUtils]: 12: Hoare triple {3415#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3416#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:55,357 INFO L273 TraceCheckUtils]: 13: Hoare triple {3416#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3417#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:55,358 INFO L273 TraceCheckUtils]: 14: Hoare triple {3417#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:55,359 INFO L273 TraceCheckUtils]: 15: Hoare triple {3418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3419#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:55,360 INFO L273 TraceCheckUtils]: 16: Hoare triple {3419#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3420#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:55,361 INFO L273 TraceCheckUtils]: 17: Hoare triple {3420#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3421#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:55,362 INFO L273 TraceCheckUtils]: 18: Hoare triple {3421#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3422#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:55,363 INFO L273 TraceCheckUtils]: 19: Hoare triple {3422#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3423#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:55,364 INFO L273 TraceCheckUtils]: 20: Hoare triple {3423#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3424#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:05:55,365 INFO L273 TraceCheckUtils]: 21: Hoare triple {3424#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3425#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:05:55,366 INFO L273 TraceCheckUtils]: 22: Hoare triple {3425#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3496#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:05:55,367 INFO L273 TraceCheckUtils]: 23: Hoare triple {3496#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !(~y~0 % 4294967296 < 1024); {3407#false} is VALID [2018-11-23 13:05:55,367 INFO L256 TraceCheckUtils]: 24: Hoare triple {3407#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3407#false} is VALID [2018-11-23 13:05:55,367 INFO L273 TraceCheckUtils]: 25: Hoare triple {3407#false} ~cond := #in~cond; {3407#false} is VALID [2018-11-23 13:05:55,367 INFO L273 TraceCheckUtils]: 26: Hoare triple {3407#false} assume 0 == ~cond; {3407#false} is VALID [2018-11-23 13:05:55,367 INFO L273 TraceCheckUtils]: 27: Hoare triple {3407#false} assume !false; {3407#false} is VALID [2018-11-23 13:05:55,369 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:55,388 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:55,389 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 22 [2018-11-23 13:05:55,389 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 28 [2018-11-23 13:05:55,389 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:55,389 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states. [2018-11-23 13:05:55,413 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:55,413 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-23 13:05:55,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-23 13:05:55,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=402, Unknown=0, NotChecked=0, Total=462 [2018-11-23 13:05:55,414 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 22 states. [2018-11-23 13:05:56,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:56,332 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-11-23 13:05:56,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-23 13:05:56,332 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 28 [2018-11-23 13:05:56,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:56,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 13:05:56,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 35 transitions. [2018-11-23 13:05:56,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 13:05:56,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 35 transitions. [2018-11-23 13:05:56,335 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states and 35 transitions. [2018-11-23 13:05:56,771 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:56,772 INFO L225 Difference]: With dead ends: 35 [2018-11-23 13:05:56,772 INFO L226 Difference]: Without dead ends: 30 [2018-11-23 13:05:56,772 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=60, Invalid=402, Unknown=0, NotChecked=0, Total=462 [2018-11-23 13:05:56,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-11-23 13:05:56,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-11-23 13:05:56,864 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:56,864 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand 30 states. [2018-11-23 13:05:56,864 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 30 states. [2018-11-23 13:05:56,864 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 30 states. [2018-11-23 13:05:56,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:56,866 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-11-23 13:05:56,866 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-11-23 13:05:56,866 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:56,866 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:56,866 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 30 states. [2018-11-23 13:05:56,867 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 30 states. [2018-11-23 13:05:56,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:56,867 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-11-23 13:05:56,867 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-11-23 13:05:56,868 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:56,868 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:56,868 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:56,868 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:56,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 13:05:56,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-11-23 13:05:56,870 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-11-23 13:05:56,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:56,870 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-11-23 13:05:56,871 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-23 13:05:56,871 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-11-23 13:05:56,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 13:05:56,871 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:56,871 INFO L402 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:56,871 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:56,872 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:56,872 INFO L82 PathProgramCache]: Analyzing trace with hash -266483215, now seen corresponding path program 19 times [2018-11-23 13:05:56,872 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:56,872 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:56,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:56,873 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:05:56,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:56,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:57,546 INFO L256 TraceCheckUtils]: 0: Hoare triple {3690#true} call ULTIMATE.init(); {3690#true} is VALID [2018-11-23 13:05:57,546 INFO L273 TraceCheckUtils]: 1: Hoare triple {3690#true} assume true; {3690#true} is VALID [2018-11-23 13:05:57,546 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3690#true} {3690#true} #31#return; {3690#true} is VALID [2018-11-23 13:05:57,547 INFO L256 TraceCheckUtils]: 3: Hoare triple {3690#true} call #t~ret1 := main(); {3690#true} is VALID [2018-11-23 13:05:57,547 INFO L273 TraceCheckUtils]: 4: Hoare triple {3690#true} ~x~0 := 1;~y~0 := 0; {3692#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:57,548 INFO L273 TraceCheckUtils]: 5: Hoare triple {3692#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3693#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:57,548 INFO L273 TraceCheckUtils]: 6: Hoare triple {3693#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3694#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:57,549 INFO L273 TraceCheckUtils]: 7: Hoare triple {3694#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3695#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:57,550 INFO L273 TraceCheckUtils]: 8: Hoare triple {3695#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3696#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:57,551 INFO L273 TraceCheckUtils]: 9: Hoare triple {3696#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3697#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:57,552 INFO L273 TraceCheckUtils]: 10: Hoare triple {3697#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3698#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:57,553 INFO L273 TraceCheckUtils]: 11: Hoare triple {3698#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3699#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:57,554 INFO L273 TraceCheckUtils]: 12: Hoare triple {3699#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3700#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:57,555 INFO L273 TraceCheckUtils]: 13: Hoare triple {3700#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3701#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:57,556 INFO L273 TraceCheckUtils]: 14: Hoare triple {3701#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3702#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:57,557 INFO L273 TraceCheckUtils]: 15: Hoare triple {3702#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3703#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:57,558 INFO L273 TraceCheckUtils]: 16: Hoare triple {3703#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3704#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:57,559 INFO L273 TraceCheckUtils]: 17: Hoare triple {3704#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3705#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:57,560 INFO L273 TraceCheckUtils]: 18: Hoare triple {3705#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3706#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:57,561 INFO L273 TraceCheckUtils]: 19: Hoare triple {3706#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3707#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:57,562 INFO L273 TraceCheckUtils]: 20: Hoare triple {3707#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3708#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:05:57,563 INFO L273 TraceCheckUtils]: 21: Hoare triple {3708#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3709#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:05:57,564 INFO L273 TraceCheckUtils]: 22: Hoare triple {3709#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3710#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:05:57,565 INFO L273 TraceCheckUtils]: 23: Hoare triple {3710#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3711#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 19))} is VALID [2018-11-23 13:05:57,566 INFO L273 TraceCheckUtils]: 24: Hoare triple {3711#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 19))} assume !(~y~0 % 4294967296 < 1024); {3691#false} is VALID [2018-11-23 13:05:57,566 INFO L256 TraceCheckUtils]: 25: Hoare triple {3691#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3691#false} is VALID [2018-11-23 13:05:57,566 INFO L273 TraceCheckUtils]: 26: Hoare triple {3691#false} ~cond := #in~cond; {3691#false} is VALID [2018-11-23 13:05:57,566 INFO L273 TraceCheckUtils]: 27: Hoare triple {3691#false} assume 0 == ~cond; {3691#false} is VALID [2018-11-23 13:05:57,566 INFO L273 TraceCheckUtils]: 28: Hoare triple {3691#false} assume !false; {3691#false} is VALID [2018-11-23 13:05:57,568 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:57,569 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:05:57,569 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:05:57,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:05:57,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:57,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:05:57,610 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:05:57,731 INFO L256 TraceCheckUtils]: 0: Hoare triple {3690#true} call ULTIMATE.init(); {3690#true} is VALID [2018-11-23 13:05:57,731 INFO L273 TraceCheckUtils]: 1: Hoare triple {3690#true} assume true; {3690#true} is VALID [2018-11-23 13:05:57,732 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3690#true} {3690#true} #31#return; {3690#true} is VALID [2018-11-23 13:05:57,732 INFO L256 TraceCheckUtils]: 3: Hoare triple {3690#true} call #t~ret1 := main(); {3690#true} is VALID [2018-11-23 13:05:57,732 INFO L273 TraceCheckUtils]: 4: Hoare triple {3690#true} ~x~0 := 1;~y~0 := 0; {3692#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:05:57,733 INFO L273 TraceCheckUtils]: 5: Hoare triple {3692#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3693#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:05:57,734 INFO L273 TraceCheckUtils]: 6: Hoare triple {3693#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3694#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:05:57,734 INFO L273 TraceCheckUtils]: 7: Hoare triple {3694#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3695#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:05:57,735 INFO L273 TraceCheckUtils]: 8: Hoare triple {3695#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3696#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:05:57,736 INFO L273 TraceCheckUtils]: 9: Hoare triple {3696#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3697#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:05:57,737 INFO L273 TraceCheckUtils]: 10: Hoare triple {3697#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3698#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:05:57,738 INFO L273 TraceCheckUtils]: 11: Hoare triple {3698#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3699#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:05:57,739 INFO L273 TraceCheckUtils]: 12: Hoare triple {3699#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3700#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:05:57,740 INFO L273 TraceCheckUtils]: 13: Hoare triple {3700#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3701#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:05:57,741 INFO L273 TraceCheckUtils]: 14: Hoare triple {3701#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3702#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:05:57,742 INFO L273 TraceCheckUtils]: 15: Hoare triple {3702#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3703#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:05:57,743 INFO L273 TraceCheckUtils]: 16: Hoare triple {3703#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3704#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:05:57,744 INFO L273 TraceCheckUtils]: 17: Hoare triple {3704#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3705#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:05:57,744 INFO L273 TraceCheckUtils]: 18: Hoare triple {3705#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3706#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:05:57,745 INFO L273 TraceCheckUtils]: 19: Hoare triple {3706#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3707#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:05:57,746 INFO L273 TraceCheckUtils]: 20: Hoare triple {3707#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3708#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:05:57,747 INFO L273 TraceCheckUtils]: 21: Hoare triple {3708#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3709#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:05:57,748 INFO L273 TraceCheckUtils]: 22: Hoare triple {3709#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3710#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:05:57,749 INFO L273 TraceCheckUtils]: 23: Hoare triple {3710#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3784#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:05:57,750 INFO L273 TraceCheckUtils]: 24: Hoare triple {3784#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !(~y~0 % 4294967296 < 1024); {3691#false} is VALID [2018-11-23 13:05:57,750 INFO L256 TraceCheckUtils]: 25: Hoare triple {3691#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3691#false} is VALID [2018-11-23 13:05:57,750 INFO L273 TraceCheckUtils]: 26: Hoare triple {3691#false} ~cond := #in~cond; {3691#false} is VALID [2018-11-23 13:05:57,751 INFO L273 TraceCheckUtils]: 27: Hoare triple {3691#false} assume 0 == ~cond; {3691#false} is VALID [2018-11-23 13:05:57,751 INFO L273 TraceCheckUtils]: 28: Hoare triple {3691#false} assume !false; {3691#false} is VALID [2018-11-23 13:05:57,753 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:05:57,772 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:05:57,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 23 [2018-11-23 13:05:57,772 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 29 [2018-11-23 13:05:57,773 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:05:57,773 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states. [2018-11-23 13:05:57,797 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:57,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-23 13:05:57,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-23 13:05:57,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=443, Unknown=0, NotChecked=0, Total=506 [2018-11-23 13:05:57,798 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 23 states. [2018-11-23 13:05:59,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:59,436 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-11-23 13:05:59,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-23 13:05:59,436 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 29 [2018-11-23 13:05:59,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:05:59,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 13:05:59,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 36 transitions. [2018-11-23 13:05:59,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 13:05:59,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 36 transitions. [2018-11-23 13:05:59,439 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states and 36 transitions. [2018-11-23 13:05:59,468 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:05:59,468 INFO L225 Difference]: With dead ends: 36 [2018-11-23 13:05:59,469 INFO L226 Difference]: Without dead ends: 31 [2018-11-23 13:05:59,469 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=63, Invalid=443, Unknown=0, NotChecked=0, Total=506 [2018-11-23 13:05:59,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-11-23 13:05:59,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-11-23 13:05:59,494 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:05:59,494 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand 31 states. [2018-11-23 13:05:59,494 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 31 states. [2018-11-23 13:05:59,495 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 31 states. [2018-11-23 13:05:59,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:59,496 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-11-23 13:05:59,496 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-11-23 13:05:59,496 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:59,497 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:59,497 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 31 states. [2018-11-23 13:05:59,497 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 31 states. [2018-11-23 13:05:59,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:05:59,498 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-11-23 13:05:59,498 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-11-23 13:05:59,498 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:05:59,498 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:05:59,498 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:05:59,499 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:05:59,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 13:05:59,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-11-23 13:05:59,500 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-11-23 13:05:59,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:05:59,500 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-11-23 13:05:59,500 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-23 13:05:59,500 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-11-23 13:05:59,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 13:05:59,500 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:05:59,501 INFO L402 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:05:59,501 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:05:59,501 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:05:59,501 INFO L82 PathProgramCache]: Analyzing trace with hash 365416190, now seen corresponding path program 20 times [2018-11-23 13:05:59,501 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:05:59,501 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:05:59,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:59,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:05:59,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:05:59,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:00,429 INFO L256 TraceCheckUtils]: 0: Hoare triple {3984#true} call ULTIMATE.init(); {3984#true} is VALID [2018-11-23 13:06:00,430 INFO L273 TraceCheckUtils]: 1: Hoare triple {3984#true} assume true; {3984#true} is VALID [2018-11-23 13:06:00,430 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3984#true} {3984#true} #31#return; {3984#true} is VALID [2018-11-23 13:06:00,430 INFO L256 TraceCheckUtils]: 3: Hoare triple {3984#true} call #t~ret1 := main(); {3984#true} is VALID [2018-11-23 13:06:00,430 INFO L273 TraceCheckUtils]: 4: Hoare triple {3984#true} ~x~0 := 1;~y~0 := 0; {3986#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:00,431 INFO L273 TraceCheckUtils]: 5: Hoare triple {3986#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3987#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:00,432 INFO L273 TraceCheckUtils]: 6: Hoare triple {3987#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3988#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:00,452 INFO L273 TraceCheckUtils]: 7: Hoare triple {3988#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3989#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:00,466 INFO L273 TraceCheckUtils]: 8: Hoare triple {3989#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3990#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:00,475 INFO L273 TraceCheckUtils]: 9: Hoare triple {3990#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3991#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:00,485 INFO L273 TraceCheckUtils]: 10: Hoare triple {3991#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3992#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:00,493 INFO L273 TraceCheckUtils]: 11: Hoare triple {3992#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3993#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:00,508 INFO L273 TraceCheckUtils]: 12: Hoare triple {3993#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3994#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:00,517 INFO L273 TraceCheckUtils]: 13: Hoare triple {3994#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3995#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:00,530 INFO L273 TraceCheckUtils]: 14: Hoare triple {3995#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3996#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:00,537 INFO L273 TraceCheckUtils]: 15: Hoare triple {3996#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3997#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:00,537 INFO L273 TraceCheckUtils]: 16: Hoare triple {3997#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3998#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:00,539 INFO L273 TraceCheckUtils]: 17: Hoare triple {3998#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3999#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:00,539 INFO L273 TraceCheckUtils]: 18: Hoare triple {3999#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4000#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:00,540 INFO L273 TraceCheckUtils]: 19: Hoare triple {4000#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4001#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:00,541 INFO L273 TraceCheckUtils]: 20: Hoare triple {4001#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4002#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:00,542 INFO L273 TraceCheckUtils]: 21: Hoare triple {4002#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4003#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:00,542 INFO L273 TraceCheckUtils]: 22: Hoare triple {4003#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4004#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:00,543 INFO L273 TraceCheckUtils]: 23: Hoare triple {4004#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4005#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:00,545 INFO L273 TraceCheckUtils]: 24: Hoare triple {4005#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4006#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:00,545 INFO L273 TraceCheckUtils]: 25: Hoare triple {4006#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 20))} assume !(~y~0 % 4294967296 < 1024); {3985#false} is VALID [2018-11-23 13:06:00,546 INFO L256 TraceCheckUtils]: 26: Hoare triple {3985#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3985#false} is VALID [2018-11-23 13:06:00,546 INFO L273 TraceCheckUtils]: 27: Hoare triple {3985#false} ~cond := #in~cond; {3985#false} is VALID [2018-11-23 13:06:00,546 INFO L273 TraceCheckUtils]: 28: Hoare triple {3985#false} assume 0 == ~cond; {3985#false} is VALID [2018-11-23 13:06:00,546 INFO L273 TraceCheckUtils]: 29: Hoare triple {3985#false} assume !false; {3985#false} is VALID [2018-11-23 13:06:00,548 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:00,548 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:06:00,548 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:06:00,556 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:06:00,575 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:06:00,575 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:06:00,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:00,585 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:06:00,734 INFO L256 TraceCheckUtils]: 0: Hoare triple {3984#true} call ULTIMATE.init(); {3984#true} is VALID [2018-11-23 13:06:00,734 INFO L273 TraceCheckUtils]: 1: Hoare triple {3984#true} assume true; {3984#true} is VALID [2018-11-23 13:06:00,734 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3984#true} {3984#true} #31#return; {3984#true} is VALID [2018-11-23 13:06:00,734 INFO L256 TraceCheckUtils]: 3: Hoare triple {3984#true} call #t~ret1 := main(); {3984#true} is VALID [2018-11-23 13:06:00,735 INFO L273 TraceCheckUtils]: 4: Hoare triple {3984#true} ~x~0 := 1;~y~0 := 0; {3986#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:00,735 INFO L273 TraceCheckUtils]: 5: Hoare triple {3986#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3987#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:00,736 INFO L273 TraceCheckUtils]: 6: Hoare triple {3987#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3988#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:00,737 INFO L273 TraceCheckUtils]: 7: Hoare triple {3988#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3989#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:00,738 INFO L273 TraceCheckUtils]: 8: Hoare triple {3989#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3990#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:00,739 INFO L273 TraceCheckUtils]: 9: Hoare triple {3990#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3991#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:00,740 INFO L273 TraceCheckUtils]: 10: Hoare triple {3991#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3992#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:00,741 INFO L273 TraceCheckUtils]: 11: Hoare triple {3992#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3993#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:00,742 INFO L273 TraceCheckUtils]: 12: Hoare triple {3993#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3994#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:00,743 INFO L273 TraceCheckUtils]: 13: Hoare triple {3994#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3995#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:00,744 INFO L273 TraceCheckUtils]: 14: Hoare triple {3995#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3996#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:00,745 INFO L273 TraceCheckUtils]: 15: Hoare triple {3996#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3997#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:00,746 INFO L273 TraceCheckUtils]: 16: Hoare triple {3997#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3998#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:00,747 INFO L273 TraceCheckUtils]: 17: Hoare triple {3998#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {3999#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:00,748 INFO L273 TraceCheckUtils]: 18: Hoare triple {3999#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4000#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:00,750 INFO L273 TraceCheckUtils]: 19: Hoare triple {4000#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4001#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:00,751 INFO L273 TraceCheckUtils]: 20: Hoare triple {4001#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4002#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:00,752 INFO L273 TraceCheckUtils]: 21: Hoare triple {4002#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4003#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:00,753 INFO L273 TraceCheckUtils]: 22: Hoare triple {4003#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4004#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:00,754 INFO L273 TraceCheckUtils]: 23: Hoare triple {4004#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4005#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:00,755 INFO L273 TraceCheckUtils]: 24: Hoare triple {4005#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:00,756 INFO L273 TraceCheckUtils]: 25: Hoare triple {4082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !(~y~0 % 4294967296 < 1024); {3985#false} is VALID [2018-11-23 13:06:00,756 INFO L256 TraceCheckUtils]: 26: Hoare triple {3985#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {3985#false} is VALID [2018-11-23 13:06:00,756 INFO L273 TraceCheckUtils]: 27: Hoare triple {3985#false} ~cond := #in~cond; {3985#false} is VALID [2018-11-23 13:06:00,756 INFO L273 TraceCheckUtils]: 28: Hoare triple {3985#false} assume 0 == ~cond; {3985#false} is VALID [2018-11-23 13:06:00,757 INFO L273 TraceCheckUtils]: 29: Hoare triple {3985#false} assume !false; {3985#false} is VALID [2018-11-23 13:06:00,759 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:00,777 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:06:00,777 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 24 [2018-11-23 13:06:00,778 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 30 [2018-11-23 13:06:00,778 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:06:00,778 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 13:06:00,839 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:00,839 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 13:06:00,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 13:06:00,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-11-23 13:06:00,840 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 24 states. [2018-11-23 13:06:02,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:02,123 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-11-23 13:06:02,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 13:06:02,123 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 30 [2018-11-23 13:06:02,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:06:02,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 13:06:02,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 37 transitions. [2018-11-23 13:06:02,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 13:06:02,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 37 transitions. [2018-11-23 13:06:02,130 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 37 transitions. [2018-11-23 13:06:02,172 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:02,173 INFO L225 Difference]: With dead ends: 37 [2018-11-23 13:06:02,173 INFO L226 Difference]: Without dead ends: 32 [2018-11-23 13:06:02,174 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-11-23 13:06:02,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-11-23 13:06:02,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-11-23 13:06:02,313 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:06:02,313 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand 32 states. [2018-11-23 13:06:02,313 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 32 states. [2018-11-23 13:06:02,313 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 32 states. [2018-11-23 13:06:02,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:02,314 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-11-23 13:06:02,314 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-11-23 13:06:02,314 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:02,314 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:02,315 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 32 states. [2018-11-23 13:06:02,315 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 32 states. [2018-11-23 13:06:02,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:02,316 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-11-23 13:06:02,316 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-11-23 13:06:02,316 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:02,316 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:02,316 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:06:02,316 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:06:02,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 13:06:02,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-11-23 13:06:02,317 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-11-23 13:06:02,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:06:02,317 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-11-23 13:06:02,317 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 13:06:02,317 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-11-23 13:06:02,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 13:06:02,318 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:06:02,318 INFO L402 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:06:02,318 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:06:02,318 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:06:02,318 INFO L82 PathProgramCache]: Analyzing trace with hash -1520538735, now seen corresponding path program 21 times [2018-11-23 13:06:02,318 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:06:02,319 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:06:02,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:02,319 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:06:02,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:02,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:03,239 INFO L256 TraceCheckUtils]: 0: Hoare triple {4288#true} call ULTIMATE.init(); {4288#true} is VALID [2018-11-23 13:06:03,239 INFO L273 TraceCheckUtils]: 1: Hoare triple {4288#true} assume true; {4288#true} is VALID [2018-11-23 13:06:03,239 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4288#true} {4288#true} #31#return; {4288#true} is VALID [2018-11-23 13:06:03,240 INFO L256 TraceCheckUtils]: 3: Hoare triple {4288#true} call #t~ret1 := main(); {4288#true} is VALID [2018-11-23 13:06:03,240 INFO L273 TraceCheckUtils]: 4: Hoare triple {4288#true} ~x~0 := 1;~y~0 := 0; {4290#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:03,241 INFO L273 TraceCheckUtils]: 5: Hoare triple {4290#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4291#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:03,242 INFO L273 TraceCheckUtils]: 6: Hoare triple {4291#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4292#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:03,242 INFO L273 TraceCheckUtils]: 7: Hoare triple {4292#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4293#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:03,243 INFO L273 TraceCheckUtils]: 8: Hoare triple {4293#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4294#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:03,244 INFO L273 TraceCheckUtils]: 9: Hoare triple {4294#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4295#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:03,244 INFO L273 TraceCheckUtils]: 10: Hoare triple {4295#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4296#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:03,245 INFO L273 TraceCheckUtils]: 11: Hoare triple {4296#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4297#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:03,246 INFO L273 TraceCheckUtils]: 12: Hoare triple {4297#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4298#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:03,247 INFO L273 TraceCheckUtils]: 13: Hoare triple {4298#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4299#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:03,248 INFO L273 TraceCheckUtils]: 14: Hoare triple {4299#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4300#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:03,249 INFO L273 TraceCheckUtils]: 15: Hoare triple {4300#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4301#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:03,250 INFO L273 TraceCheckUtils]: 16: Hoare triple {4301#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4302#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:03,251 INFO L273 TraceCheckUtils]: 17: Hoare triple {4302#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4303#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:03,252 INFO L273 TraceCheckUtils]: 18: Hoare triple {4303#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4304#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:03,253 INFO L273 TraceCheckUtils]: 19: Hoare triple {4304#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4305#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:03,254 INFO L273 TraceCheckUtils]: 20: Hoare triple {4305#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4306#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:03,255 INFO L273 TraceCheckUtils]: 21: Hoare triple {4306#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4307#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:03,255 INFO L273 TraceCheckUtils]: 22: Hoare triple {4307#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4308#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:03,256 INFO L273 TraceCheckUtils]: 23: Hoare triple {4308#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4309#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:03,257 INFO L273 TraceCheckUtils]: 24: Hoare triple {4309#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4310#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:03,258 INFO L273 TraceCheckUtils]: 25: Hoare triple {4310#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4311#(and (<= main_~y~0 21) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:06:03,259 INFO L273 TraceCheckUtils]: 26: Hoare triple {4311#(and (<= main_~y~0 21) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {4289#false} is VALID [2018-11-23 13:06:03,259 INFO L256 TraceCheckUtils]: 27: Hoare triple {4289#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {4289#false} is VALID [2018-11-23 13:06:03,260 INFO L273 TraceCheckUtils]: 28: Hoare triple {4289#false} ~cond := #in~cond; {4289#false} is VALID [2018-11-23 13:06:03,260 INFO L273 TraceCheckUtils]: 29: Hoare triple {4289#false} assume 0 == ~cond; {4289#false} is VALID [2018-11-23 13:06:03,260 INFO L273 TraceCheckUtils]: 30: Hoare triple {4289#false} assume !false; {4289#false} is VALID [2018-11-23 13:06:03,262 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:03,262 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:06:03,263 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:06:03,271 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 13:06:03,526 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-23 13:06:03,526 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:06:03,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:03,536 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:06:03,693 INFO L256 TraceCheckUtils]: 0: Hoare triple {4288#true} call ULTIMATE.init(); {4288#true} is VALID [2018-11-23 13:06:03,694 INFO L273 TraceCheckUtils]: 1: Hoare triple {4288#true} assume true; {4288#true} is VALID [2018-11-23 13:06:03,694 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4288#true} {4288#true} #31#return; {4288#true} is VALID [2018-11-23 13:06:03,694 INFO L256 TraceCheckUtils]: 3: Hoare triple {4288#true} call #t~ret1 := main(); {4288#true} is VALID [2018-11-23 13:06:03,694 INFO L273 TraceCheckUtils]: 4: Hoare triple {4288#true} ~x~0 := 1;~y~0 := 0; {4290#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:03,695 INFO L273 TraceCheckUtils]: 5: Hoare triple {4290#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4291#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:03,695 INFO L273 TraceCheckUtils]: 6: Hoare triple {4291#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4292#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:03,696 INFO L273 TraceCheckUtils]: 7: Hoare triple {4292#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4293#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:03,697 INFO L273 TraceCheckUtils]: 8: Hoare triple {4293#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4294#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:03,698 INFO L273 TraceCheckUtils]: 9: Hoare triple {4294#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4295#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:03,699 INFO L273 TraceCheckUtils]: 10: Hoare triple {4295#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4296#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:03,700 INFO L273 TraceCheckUtils]: 11: Hoare triple {4296#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4297#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:03,701 INFO L273 TraceCheckUtils]: 12: Hoare triple {4297#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4298#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:03,702 INFO L273 TraceCheckUtils]: 13: Hoare triple {4298#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4299#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:03,703 INFO L273 TraceCheckUtils]: 14: Hoare triple {4299#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4300#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:03,704 INFO L273 TraceCheckUtils]: 15: Hoare triple {4300#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4301#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:03,704 INFO L273 TraceCheckUtils]: 16: Hoare triple {4301#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4302#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:03,705 INFO L273 TraceCheckUtils]: 17: Hoare triple {4302#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4303#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:03,706 INFO L273 TraceCheckUtils]: 18: Hoare triple {4303#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4304#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:03,707 INFO L273 TraceCheckUtils]: 19: Hoare triple {4304#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4305#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:03,708 INFO L273 TraceCheckUtils]: 20: Hoare triple {4305#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4306#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:03,709 INFO L273 TraceCheckUtils]: 21: Hoare triple {4306#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4307#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:03,710 INFO L273 TraceCheckUtils]: 22: Hoare triple {4307#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4308#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:03,711 INFO L273 TraceCheckUtils]: 23: Hoare triple {4308#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4309#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:03,712 INFO L273 TraceCheckUtils]: 24: Hoare triple {4309#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4310#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:03,713 INFO L273 TraceCheckUtils]: 25: Hoare triple {4310#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4390#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:06:03,714 INFO L273 TraceCheckUtils]: 26: Hoare triple {4390#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {4289#false} is VALID [2018-11-23 13:06:03,714 INFO L256 TraceCheckUtils]: 27: Hoare triple {4289#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {4289#false} is VALID [2018-11-23 13:06:03,714 INFO L273 TraceCheckUtils]: 28: Hoare triple {4289#false} ~cond := #in~cond; {4289#false} is VALID [2018-11-23 13:06:03,714 INFO L273 TraceCheckUtils]: 29: Hoare triple {4289#false} assume 0 == ~cond; {4289#false} is VALID [2018-11-23 13:06:03,715 INFO L273 TraceCheckUtils]: 30: Hoare triple {4289#false} assume !false; {4289#false} is VALID [2018-11-23 13:06:03,717 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:03,738 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:06:03,739 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 25 [2018-11-23 13:06:03,739 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 31 [2018-11-23 13:06:03,739 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:06:03,739 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states. [2018-11-23 13:06:03,764 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:03,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-23 13:06:03,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-23 13:06:03,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=531, Unknown=0, NotChecked=0, Total=600 [2018-11-23 13:06:03,765 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 25 states. [2018-11-23 13:06:05,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:05,445 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-11-23 13:06:05,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 13:06:05,445 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 31 [2018-11-23 13:06:05,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:06:05,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 13:06:05,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 38 transitions. [2018-11-23 13:06:05,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 13:06:05,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 38 transitions. [2018-11-23 13:06:05,448 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 38 transitions. [2018-11-23 13:06:05,840 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:05,841 INFO L225 Difference]: With dead ends: 38 [2018-11-23 13:06:05,841 INFO L226 Difference]: Without dead ends: 33 [2018-11-23 13:06:05,841 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=69, Invalid=531, Unknown=0, NotChecked=0, Total=600 [2018-11-23 13:06:05,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-11-23 13:06:05,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-11-23 13:06:05,989 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:06:05,989 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand 33 states. [2018-11-23 13:06:05,989 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 33 states. [2018-11-23 13:06:05,989 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 33 states. [2018-11-23 13:06:05,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:05,990 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-11-23 13:06:05,990 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-11-23 13:06:05,990 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:05,991 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:05,991 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 33 states. [2018-11-23 13:06:05,991 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 33 states. [2018-11-23 13:06:05,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:05,992 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-11-23 13:06:05,992 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-11-23 13:06:05,992 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:05,992 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:05,992 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:06:05,992 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:06:05,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-23 13:06:05,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-11-23 13:06:05,994 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-11-23 13:06:05,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:06:05,994 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-11-23 13:06:05,994 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-23 13:06:05,994 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-11-23 13:06:05,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 13:06:05,995 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:06:05,995 INFO L402 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:06:05,995 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:06:05,995 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:06:05,995 INFO L82 PathProgramCache]: Analyzing trace with hash 144400734, now seen corresponding path program 22 times [2018-11-23 13:06:05,995 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:06:05,995 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:06:05,996 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:05,996 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:06:05,996 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:06,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:06,923 INFO L256 TraceCheckUtils]: 0: Hoare triple {4602#true} call ULTIMATE.init(); {4602#true} is VALID [2018-11-23 13:06:06,923 INFO L273 TraceCheckUtils]: 1: Hoare triple {4602#true} assume true; {4602#true} is VALID [2018-11-23 13:06:06,923 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4602#true} {4602#true} #31#return; {4602#true} is VALID [2018-11-23 13:06:06,924 INFO L256 TraceCheckUtils]: 3: Hoare triple {4602#true} call #t~ret1 := main(); {4602#true} is VALID [2018-11-23 13:06:06,924 INFO L273 TraceCheckUtils]: 4: Hoare triple {4602#true} ~x~0 := 1;~y~0 := 0; {4604#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:06,925 INFO L273 TraceCheckUtils]: 5: Hoare triple {4604#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4605#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:06,925 INFO L273 TraceCheckUtils]: 6: Hoare triple {4605#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4606#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:06,926 INFO L273 TraceCheckUtils]: 7: Hoare triple {4606#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4607#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:06,927 INFO L273 TraceCheckUtils]: 8: Hoare triple {4607#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4608#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:06,928 INFO L273 TraceCheckUtils]: 9: Hoare triple {4608#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4609#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:06,929 INFO L273 TraceCheckUtils]: 10: Hoare triple {4609#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4610#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:06,930 INFO L273 TraceCheckUtils]: 11: Hoare triple {4610#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4611#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:06,931 INFO L273 TraceCheckUtils]: 12: Hoare triple {4611#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4612#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:06,932 INFO L273 TraceCheckUtils]: 13: Hoare triple {4612#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4613#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:06,933 INFO L273 TraceCheckUtils]: 14: Hoare triple {4613#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4614#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:06,934 INFO L273 TraceCheckUtils]: 15: Hoare triple {4614#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4615#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:06,935 INFO L273 TraceCheckUtils]: 16: Hoare triple {4615#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4616#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:06,936 INFO L273 TraceCheckUtils]: 17: Hoare triple {4616#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4617#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:06,937 INFO L273 TraceCheckUtils]: 18: Hoare triple {4617#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4618#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:06,938 INFO L273 TraceCheckUtils]: 19: Hoare triple {4618#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4619#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:06,939 INFO L273 TraceCheckUtils]: 20: Hoare triple {4619#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4620#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:06,940 INFO L273 TraceCheckUtils]: 21: Hoare triple {4620#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4621#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:06,941 INFO L273 TraceCheckUtils]: 22: Hoare triple {4621#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4622#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:06,942 INFO L273 TraceCheckUtils]: 23: Hoare triple {4622#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4623#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:06,943 INFO L273 TraceCheckUtils]: 24: Hoare triple {4623#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4624#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:06,943 INFO L273 TraceCheckUtils]: 25: Hoare triple {4624#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4625#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:06:06,945 INFO L273 TraceCheckUtils]: 26: Hoare triple {4625#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4626#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 22))} is VALID [2018-11-23 13:06:06,945 INFO L273 TraceCheckUtils]: 27: Hoare triple {4626#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 22))} assume !(~y~0 % 4294967296 < 1024); {4603#false} is VALID [2018-11-23 13:06:06,946 INFO L256 TraceCheckUtils]: 28: Hoare triple {4603#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {4603#false} is VALID [2018-11-23 13:06:06,946 INFO L273 TraceCheckUtils]: 29: Hoare triple {4603#false} ~cond := #in~cond; {4603#false} is VALID [2018-11-23 13:06:06,946 INFO L273 TraceCheckUtils]: 30: Hoare triple {4603#false} assume 0 == ~cond; {4603#false} is VALID [2018-11-23 13:06:06,946 INFO L273 TraceCheckUtils]: 31: Hoare triple {4603#false} assume !false; {4603#false} is VALID [2018-11-23 13:06:06,948 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:06,948 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:06:06,948 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:06:06,957 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 13:06:06,977 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 13:06:06,977 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:06:06,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:06,987 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:06:07,203 INFO L256 TraceCheckUtils]: 0: Hoare triple {4602#true} call ULTIMATE.init(); {4602#true} is VALID [2018-11-23 13:06:07,203 INFO L273 TraceCheckUtils]: 1: Hoare triple {4602#true} assume true; {4602#true} is VALID [2018-11-23 13:06:07,203 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4602#true} {4602#true} #31#return; {4602#true} is VALID [2018-11-23 13:06:07,203 INFO L256 TraceCheckUtils]: 3: Hoare triple {4602#true} call #t~ret1 := main(); {4602#true} is VALID [2018-11-23 13:06:07,205 INFO L273 TraceCheckUtils]: 4: Hoare triple {4602#true} ~x~0 := 1;~y~0 := 0; {4604#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:07,205 INFO L273 TraceCheckUtils]: 5: Hoare triple {4604#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4605#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:07,207 INFO L273 TraceCheckUtils]: 6: Hoare triple {4605#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4606#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:07,208 INFO L273 TraceCheckUtils]: 7: Hoare triple {4606#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4607#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:07,209 INFO L273 TraceCheckUtils]: 8: Hoare triple {4607#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4608#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:07,210 INFO L273 TraceCheckUtils]: 9: Hoare triple {4608#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4609#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:07,211 INFO L273 TraceCheckUtils]: 10: Hoare triple {4609#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4610#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:07,212 INFO L273 TraceCheckUtils]: 11: Hoare triple {4610#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4611#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:07,213 INFO L273 TraceCheckUtils]: 12: Hoare triple {4611#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4612#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:07,214 INFO L273 TraceCheckUtils]: 13: Hoare triple {4612#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4613#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:07,215 INFO L273 TraceCheckUtils]: 14: Hoare triple {4613#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4614#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:07,216 INFO L273 TraceCheckUtils]: 15: Hoare triple {4614#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4615#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:07,217 INFO L273 TraceCheckUtils]: 16: Hoare triple {4615#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4616#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:07,218 INFO L273 TraceCheckUtils]: 17: Hoare triple {4616#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4617#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:07,219 INFO L273 TraceCheckUtils]: 18: Hoare triple {4617#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4618#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:07,220 INFO L273 TraceCheckUtils]: 19: Hoare triple {4618#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4619#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:07,221 INFO L273 TraceCheckUtils]: 20: Hoare triple {4619#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4620#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:07,222 INFO L273 TraceCheckUtils]: 21: Hoare triple {4620#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4621#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:07,223 INFO L273 TraceCheckUtils]: 22: Hoare triple {4621#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4622#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:07,224 INFO L273 TraceCheckUtils]: 23: Hoare triple {4622#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4623#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:07,225 INFO L273 TraceCheckUtils]: 24: Hoare triple {4623#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4624#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:07,226 INFO L273 TraceCheckUtils]: 25: Hoare triple {4624#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4625#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:06:07,229 INFO L273 TraceCheckUtils]: 26: Hoare triple {4625#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4708#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:06:07,230 INFO L273 TraceCheckUtils]: 27: Hoare triple {4708#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !(~y~0 % 4294967296 < 1024); {4603#false} is VALID [2018-11-23 13:06:07,230 INFO L256 TraceCheckUtils]: 28: Hoare triple {4603#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {4603#false} is VALID [2018-11-23 13:06:07,230 INFO L273 TraceCheckUtils]: 29: Hoare triple {4603#false} ~cond := #in~cond; {4603#false} is VALID [2018-11-23 13:06:07,230 INFO L273 TraceCheckUtils]: 30: Hoare triple {4603#false} assume 0 == ~cond; {4603#false} is VALID [2018-11-23 13:06:07,230 INFO L273 TraceCheckUtils]: 31: Hoare triple {4603#false} assume !false; {4603#false} is VALID [2018-11-23 13:06:07,232 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:07,250 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:06:07,251 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 26 [2018-11-23 13:06:07,251 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 32 [2018-11-23 13:06:07,251 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:06:07,251 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states. [2018-11-23 13:06:07,502 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:07,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-23 13:06:07,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-23 13:06:07,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=578, Unknown=0, NotChecked=0, Total=650 [2018-11-23 13:06:07,503 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 26 states. [2018-11-23 13:06:09,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:09,682 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-11-23 13:06:09,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-23 13:06:09,683 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 32 [2018-11-23 13:06:09,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:06:09,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 13:06:09,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 39 transitions. [2018-11-23 13:06:09,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 13:06:09,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 39 transitions. [2018-11-23 13:06:09,686 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states and 39 transitions. [2018-11-23 13:06:10,160 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:10,160 INFO L225 Difference]: With dead ends: 39 [2018-11-23 13:06:10,160 INFO L226 Difference]: Without dead ends: 34 [2018-11-23 13:06:10,161 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=72, Invalid=578, Unknown=0, NotChecked=0, Total=650 [2018-11-23 13:06:10,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-11-23 13:06:10,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-11-23 13:06:10,197 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:06:10,197 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand 34 states. [2018-11-23 13:06:10,197 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 34 states. [2018-11-23 13:06:10,197 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 34 states. [2018-11-23 13:06:10,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:10,199 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-11-23 13:06:10,199 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-11-23 13:06:10,199 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:10,199 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:10,200 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 34 states. [2018-11-23 13:06:10,200 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 34 states. [2018-11-23 13:06:10,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:10,201 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-11-23 13:06:10,201 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-11-23 13:06:10,201 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:10,201 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:10,202 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:06:10,202 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:06:10,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-11-23 13:06:10,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-11-23 13:06:10,203 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-11-23 13:06:10,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:06:10,203 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-11-23 13:06:10,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-23 13:06:10,203 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-11-23 13:06:10,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 13:06:10,204 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:06:10,204 INFO L402 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:06:10,204 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:06:10,204 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:06:10,205 INFO L82 PathProgramCache]: Analyzing trace with hash 217916721, now seen corresponding path program 23 times [2018-11-23 13:06:10,205 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:06:10,205 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:06:10,206 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:10,206 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:06:10,206 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:10,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:11,749 INFO L256 TraceCheckUtils]: 0: Hoare triple {4926#true} call ULTIMATE.init(); {4926#true} is VALID [2018-11-23 13:06:11,750 INFO L273 TraceCheckUtils]: 1: Hoare triple {4926#true} assume true; {4926#true} is VALID [2018-11-23 13:06:11,750 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4926#true} {4926#true} #31#return; {4926#true} is VALID [2018-11-23 13:06:11,750 INFO L256 TraceCheckUtils]: 3: Hoare triple {4926#true} call #t~ret1 := main(); {4926#true} is VALID [2018-11-23 13:06:11,750 INFO L273 TraceCheckUtils]: 4: Hoare triple {4926#true} ~x~0 := 1;~y~0 := 0; {4928#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:11,751 INFO L273 TraceCheckUtils]: 5: Hoare triple {4928#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4929#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:11,751 INFO L273 TraceCheckUtils]: 6: Hoare triple {4929#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4930#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:11,752 INFO L273 TraceCheckUtils]: 7: Hoare triple {4930#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4931#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:11,753 INFO L273 TraceCheckUtils]: 8: Hoare triple {4931#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4932#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:11,754 INFO L273 TraceCheckUtils]: 9: Hoare triple {4932#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4933#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:11,755 INFO L273 TraceCheckUtils]: 10: Hoare triple {4933#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4934#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:11,756 INFO L273 TraceCheckUtils]: 11: Hoare triple {4934#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4935#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:11,757 INFO L273 TraceCheckUtils]: 12: Hoare triple {4935#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4936#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:11,758 INFO L273 TraceCheckUtils]: 13: Hoare triple {4936#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4937#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:11,759 INFO L273 TraceCheckUtils]: 14: Hoare triple {4937#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4938#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:11,760 INFO L273 TraceCheckUtils]: 15: Hoare triple {4938#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4939#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:11,762 INFO L273 TraceCheckUtils]: 16: Hoare triple {4939#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4940#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:11,763 INFO L273 TraceCheckUtils]: 17: Hoare triple {4940#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4941#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:11,764 INFO L273 TraceCheckUtils]: 18: Hoare triple {4941#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4942#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:11,765 INFO L273 TraceCheckUtils]: 19: Hoare triple {4942#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4943#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:11,766 INFO L273 TraceCheckUtils]: 20: Hoare triple {4943#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4944#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:11,767 INFO L273 TraceCheckUtils]: 21: Hoare triple {4944#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4945#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:11,768 INFO L273 TraceCheckUtils]: 22: Hoare triple {4945#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4946#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:11,769 INFO L273 TraceCheckUtils]: 23: Hoare triple {4946#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4947#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:11,770 INFO L273 TraceCheckUtils]: 24: Hoare triple {4947#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4948#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:11,771 INFO L273 TraceCheckUtils]: 25: Hoare triple {4948#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4949#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:06:11,772 INFO L273 TraceCheckUtils]: 26: Hoare triple {4949#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4950#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:06:11,773 INFO L273 TraceCheckUtils]: 27: Hoare triple {4950#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4951#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 23))} is VALID [2018-11-23 13:06:11,774 INFO L273 TraceCheckUtils]: 28: Hoare triple {4951#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 23))} assume !(~y~0 % 4294967296 < 1024); {4927#false} is VALID [2018-11-23 13:06:11,774 INFO L256 TraceCheckUtils]: 29: Hoare triple {4927#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {4927#false} is VALID [2018-11-23 13:06:11,775 INFO L273 TraceCheckUtils]: 30: Hoare triple {4927#false} ~cond := #in~cond; {4927#false} is VALID [2018-11-23 13:06:11,775 INFO L273 TraceCheckUtils]: 31: Hoare triple {4927#false} assume 0 == ~cond; {4927#false} is VALID [2018-11-23 13:06:11,775 INFO L273 TraceCheckUtils]: 32: Hoare triple {4927#false} assume !false; {4927#false} is VALID [2018-11-23 13:06:11,778 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:11,778 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:06:11,779 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:06:11,802 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 13:06:53,960 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-11-23 13:06:53,960 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:06:54,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:54,069 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:06:54,212 INFO L256 TraceCheckUtils]: 0: Hoare triple {4926#true} call ULTIMATE.init(); {4926#true} is VALID [2018-11-23 13:06:54,212 INFO L273 TraceCheckUtils]: 1: Hoare triple {4926#true} assume true; {4926#true} is VALID [2018-11-23 13:06:54,212 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4926#true} {4926#true} #31#return; {4926#true} is VALID [2018-11-23 13:06:54,213 INFO L256 TraceCheckUtils]: 3: Hoare triple {4926#true} call #t~ret1 := main(); {4926#true} is VALID [2018-11-23 13:06:54,213 INFO L273 TraceCheckUtils]: 4: Hoare triple {4926#true} ~x~0 := 1;~y~0 := 0; {4928#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:54,214 INFO L273 TraceCheckUtils]: 5: Hoare triple {4928#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4929#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:54,215 INFO L273 TraceCheckUtils]: 6: Hoare triple {4929#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4930#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:54,215 INFO L273 TraceCheckUtils]: 7: Hoare triple {4930#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4931#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:54,216 INFO L273 TraceCheckUtils]: 8: Hoare triple {4931#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4932#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:54,216 INFO L273 TraceCheckUtils]: 9: Hoare triple {4932#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4933#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:54,217 INFO L273 TraceCheckUtils]: 10: Hoare triple {4933#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4934#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:54,218 INFO L273 TraceCheckUtils]: 11: Hoare triple {4934#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4935#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:54,219 INFO L273 TraceCheckUtils]: 12: Hoare triple {4935#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4936#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:54,220 INFO L273 TraceCheckUtils]: 13: Hoare triple {4936#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4937#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:54,221 INFO L273 TraceCheckUtils]: 14: Hoare triple {4937#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4938#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:54,222 INFO L273 TraceCheckUtils]: 15: Hoare triple {4938#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4939#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:54,223 INFO L273 TraceCheckUtils]: 16: Hoare triple {4939#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4940#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:54,224 INFO L273 TraceCheckUtils]: 17: Hoare triple {4940#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4941#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:54,225 INFO L273 TraceCheckUtils]: 18: Hoare triple {4941#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4942#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:54,225 INFO L273 TraceCheckUtils]: 19: Hoare triple {4942#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4943#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:54,226 INFO L273 TraceCheckUtils]: 20: Hoare triple {4943#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4944#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:54,227 INFO L273 TraceCheckUtils]: 21: Hoare triple {4944#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4945#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:54,228 INFO L273 TraceCheckUtils]: 22: Hoare triple {4945#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4946#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:54,229 INFO L273 TraceCheckUtils]: 23: Hoare triple {4946#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4947#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:54,230 INFO L273 TraceCheckUtils]: 24: Hoare triple {4947#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4948#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:54,231 INFO L273 TraceCheckUtils]: 25: Hoare triple {4948#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4949#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:06:54,232 INFO L273 TraceCheckUtils]: 26: Hoare triple {4949#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {4950#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:06:54,233 INFO L273 TraceCheckUtils]: 27: Hoare triple {4950#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5036#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:06:54,234 INFO L273 TraceCheckUtils]: 28: Hoare triple {5036#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !(~y~0 % 4294967296 < 1024); {4927#false} is VALID [2018-11-23 13:06:54,234 INFO L256 TraceCheckUtils]: 29: Hoare triple {4927#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {4927#false} is VALID [2018-11-23 13:06:54,234 INFO L273 TraceCheckUtils]: 30: Hoare triple {4927#false} ~cond := #in~cond; {4927#false} is VALID [2018-11-23 13:06:54,234 INFO L273 TraceCheckUtils]: 31: Hoare triple {4927#false} assume 0 == ~cond; {4927#false} is VALID [2018-11-23 13:06:54,235 INFO L273 TraceCheckUtils]: 32: Hoare triple {4927#false} assume !false; {4927#false} is VALID [2018-11-23 13:06:54,237 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:54,257 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:06:54,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 27 [2018-11-23 13:06:54,257 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 33 [2018-11-23 13:06:54,257 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:06:54,258 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 27 states. [2018-11-23 13:06:54,283 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:54,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-11-23 13:06:54,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-11-23 13:06:54,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=627, Unknown=0, NotChecked=0, Total=702 [2018-11-23 13:06:54,284 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 27 states. [2018-11-23 13:06:55,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:55,868 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-11-23 13:06:55,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 13:06:55,868 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 33 [2018-11-23 13:06:55,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:06:55,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 13:06:55,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 40 transitions. [2018-11-23 13:06:55,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 13:06:55,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 40 transitions. [2018-11-23 13:06:55,872 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 40 transitions. [2018-11-23 13:06:56,351 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:06:56,353 INFO L225 Difference]: With dead ends: 40 [2018-11-23 13:06:56,353 INFO L226 Difference]: Without dead ends: 35 [2018-11-23 13:06:56,353 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=75, Invalid=627, Unknown=0, NotChecked=0, Total=702 [2018-11-23 13:06:56,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-23 13:06:56,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-11-23 13:06:56,393 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:06:56,393 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 35 states. [2018-11-23 13:06:56,393 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 35 states. [2018-11-23 13:06:56,393 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 35 states. [2018-11-23 13:06:56,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:56,395 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-11-23 13:06:56,395 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-11-23 13:06:56,395 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:56,396 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:56,396 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 35 states. [2018-11-23 13:06:56,396 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 35 states. [2018-11-23 13:06:56,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:06:56,397 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-11-23 13:06:56,397 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-11-23 13:06:56,398 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:06:56,398 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:06:56,398 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:06:56,398 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:06:56,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-23 13:06:56,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-11-23 13:06:56,399 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-11-23 13:06:56,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:06:56,400 INFO L480 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-11-23 13:06:56,400 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-11-23 13:06:56,400 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-11-23 13:06:56,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-23 13:06:56,400 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:06:56,401 INFO L402 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:06:56,401 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:06:56,401 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:06:56,401 INFO L82 PathProgramCache]: Analyzing trace with hash -1798054978, now seen corresponding path program 24 times [2018-11-23 13:06:56,401 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:06:56,401 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:06:56,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:56,402 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:06:56,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:06:56,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:06:57,404 INFO L256 TraceCheckUtils]: 0: Hoare triple {5260#true} call ULTIMATE.init(); {5260#true} is VALID [2018-11-23 13:06:57,404 INFO L273 TraceCheckUtils]: 1: Hoare triple {5260#true} assume true; {5260#true} is VALID [2018-11-23 13:06:57,405 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5260#true} {5260#true} #31#return; {5260#true} is VALID [2018-11-23 13:06:57,405 INFO L256 TraceCheckUtils]: 3: Hoare triple {5260#true} call #t~ret1 := main(); {5260#true} is VALID [2018-11-23 13:06:57,405 INFO L273 TraceCheckUtils]: 4: Hoare triple {5260#true} ~x~0 := 1;~y~0 := 0; {5262#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:06:57,406 INFO L273 TraceCheckUtils]: 5: Hoare triple {5262#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5263#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:06:57,407 INFO L273 TraceCheckUtils]: 6: Hoare triple {5263#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5264#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:06:57,407 INFO L273 TraceCheckUtils]: 7: Hoare triple {5264#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5265#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:06:57,408 INFO L273 TraceCheckUtils]: 8: Hoare triple {5265#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5266#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:06:57,408 INFO L273 TraceCheckUtils]: 9: Hoare triple {5266#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5267#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:06:57,409 INFO L273 TraceCheckUtils]: 10: Hoare triple {5267#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5268#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:06:57,410 INFO L273 TraceCheckUtils]: 11: Hoare triple {5268#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5269#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:06:57,411 INFO L273 TraceCheckUtils]: 12: Hoare triple {5269#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5270#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:06:57,412 INFO L273 TraceCheckUtils]: 13: Hoare triple {5270#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5271#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:06:57,413 INFO L273 TraceCheckUtils]: 14: Hoare triple {5271#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5272#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:06:57,414 INFO L273 TraceCheckUtils]: 15: Hoare triple {5272#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5273#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:06:57,415 INFO L273 TraceCheckUtils]: 16: Hoare triple {5273#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5274#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:06:57,416 INFO L273 TraceCheckUtils]: 17: Hoare triple {5274#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5275#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:06:57,417 INFO L273 TraceCheckUtils]: 18: Hoare triple {5275#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5276#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:06:57,418 INFO L273 TraceCheckUtils]: 19: Hoare triple {5276#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5277#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:06:57,419 INFO L273 TraceCheckUtils]: 20: Hoare triple {5277#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5278#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:06:57,420 INFO L273 TraceCheckUtils]: 21: Hoare triple {5278#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5279#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:06:57,420 INFO L273 TraceCheckUtils]: 22: Hoare triple {5279#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5280#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:06:57,421 INFO L273 TraceCheckUtils]: 23: Hoare triple {5280#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5281#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:06:57,422 INFO L273 TraceCheckUtils]: 24: Hoare triple {5281#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5282#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:06:57,423 INFO L273 TraceCheckUtils]: 25: Hoare triple {5282#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5283#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:06:57,424 INFO L273 TraceCheckUtils]: 26: Hoare triple {5283#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5284#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:06:57,425 INFO L273 TraceCheckUtils]: 27: Hoare triple {5284#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5285#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:06:57,426 INFO L273 TraceCheckUtils]: 28: Hoare triple {5285#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5286#(and (<= main_~y~0 24) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:06:57,427 INFO L273 TraceCheckUtils]: 29: Hoare triple {5286#(and (<= main_~y~0 24) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {5261#false} is VALID [2018-11-23 13:06:57,427 INFO L256 TraceCheckUtils]: 30: Hoare triple {5261#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {5261#false} is VALID [2018-11-23 13:06:57,427 INFO L273 TraceCheckUtils]: 31: Hoare triple {5261#false} ~cond := #in~cond; {5261#false} is VALID [2018-11-23 13:06:57,428 INFO L273 TraceCheckUtils]: 32: Hoare triple {5261#false} assume 0 == ~cond; {5261#false} is VALID [2018-11-23 13:06:57,428 INFO L273 TraceCheckUtils]: 33: Hoare triple {5261#false} assume !false; {5261#false} is VALID [2018-11-23 13:06:57,430 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:06:57,430 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:06:57,430 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:06:57,440 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 13:07:01,779 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-11-23 13:07:01,779 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:07:01,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:01,804 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:07:01,986 INFO L256 TraceCheckUtils]: 0: Hoare triple {5260#true} call ULTIMATE.init(); {5260#true} is VALID [2018-11-23 13:07:01,986 INFO L273 TraceCheckUtils]: 1: Hoare triple {5260#true} assume true; {5260#true} is VALID [2018-11-23 13:07:01,986 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5260#true} {5260#true} #31#return; {5260#true} is VALID [2018-11-23 13:07:01,986 INFO L256 TraceCheckUtils]: 3: Hoare triple {5260#true} call #t~ret1 := main(); {5260#true} is VALID [2018-11-23 13:07:01,987 INFO L273 TraceCheckUtils]: 4: Hoare triple {5260#true} ~x~0 := 1;~y~0 := 0; {5262#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:01,988 INFO L273 TraceCheckUtils]: 5: Hoare triple {5262#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5263#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:01,988 INFO L273 TraceCheckUtils]: 6: Hoare triple {5263#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5264#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:01,989 INFO L273 TraceCheckUtils]: 7: Hoare triple {5264#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5265#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:01,990 INFO L273 TraceCheckUtils]: 8: Hoare triple {5265#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5266#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:01,990 INFO L273 TraceCheckUtils]: 9: Hoare triple {5266#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5267#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:01,991 INFO L273 TraceCheckUtils]: 10: Hoare triple {5267#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5268#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:01,992 INFO L273 TraceCheckUtils]: 11: Hoare triple {5268#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5269#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:01,993 INFO L273 TraceCheckUtils]: 12: Hoare triple {5269#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5270#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:01,994 INFO L273 TraceCheckUtils]: 13: Hoare triple {5270#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5271#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:01,995 INFO L273 TraceCheckUtils]: 14: Hoare triple {5271#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5272#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:01,996 INFO L273 TraceCheckUtils]: 15: Hoare triple {5272#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5273#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:01,997 INFO L273 TraceCheckUtils]: 16: Hoare triple {5273#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5274#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:01,997 INFO L273 TraceCheckUtils]: 17: Hoare triple {5274#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5275#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:01,998 INFO L273 TraceCheckUtils]: 18: Hoare triple {5275#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5276#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:01,999 INFO L273 TraceCheckUtils]: 19: Hoare triple {5276#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5277#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:02,000 INFO L273 TraceCheckUtils]: 20: Hoare triple {5277#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5278#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:02,001 INFO L273 TraceCheckUtils]: 21: Hoare triple {5278#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5279#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:02,002 INFO L273 TraceCheckUtils]: 22: Hoare triple {5279#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5280#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:02,003 INFO L273 TraceCheckUtils]: 23: Hoare triple {5280#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5281#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:02,004 INFO L273 TraceCheckUtils]: 24: Hoare triple {5281#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5282#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:02,005 INFO L273 TraceCheckUtils]: 25: Hoare triple {5282#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5283#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:02,006 INFO L273 TraceCheckUtils]: 26: Hoare triple {5283#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5284#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:02,007 INFO L273 TraceCheckUtils]: 27: Hoare triple {5284#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5285#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:02,008 INFO L273 TraceCheckUtils]: 28: Hoare triple {5285#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5374#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:02,009 INFO L273 TraceCheckUtils]: 29: Hoare triple {5374#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {5261#false} is VALID [2018-11-23 13:07:02,009 INFO L256 TraceCheckUtils]: 30: Hoare triple {5261#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {5261#false} is VALID [2018-11-23 13:07:02,009 INFO L273 TraceCheckUtils]: 31: Hoare triple {5261#false} ~cond := #in~cond; {5261#false} is VALID [2018-11-23 13:07:02,009 INFO L273 TraceCheckUtils]: 32: Hoare triple {5261#false} assume 0 == ~cond; {5261#false} is VALID [2018-11-23 13:07:02,009 INFO L273 TraceCheckUtils]: 33: Hoare triple {5261#false} assume !false; {5261#false} is VALID [2018-11-23 13:07:02,012 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:02,031 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:07:02,031 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 28 [2018-11-23 13:07:02,032 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 34 [2018-11-23 13:07:02,032 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:07:02,032 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 28 states. [2018-11-23 13:07:02,063 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:02,064 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-11-23 13:07:02,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-11-23 13:07:02,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=678, Unknown=0, NotChecked=0, Total=756 [2018-11-23 13:07:02,065 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 28 states. [2018-11-23 13:07:03,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:03,888 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-11-23 13:07:03,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-23 13:07:03,888 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 34 [2018-11-23 13:07:03,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:07:03,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-23 13:07:03,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 41 transitions. [2018-11-23 13:07:03,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-23 13:07:03,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 41 transitions. [2018-11-23 13:07:03,891 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 27 states and 41 transitions. [2018-11-23 13:07:03,923 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:03,924 INFO L225 Difference]: With dead ends: 41 [2018-11-23 13:07:03,924 INFO L226 Difference]: Without dead ends: 36 [2018-11-23 13:07:03,925 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=78, Invalid=678, Unknown=0, NotChecked=0, Total=756 [2018-11-23 13:07:03,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-11-23 13:07:03,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-11-23 13:07:03,959 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:07:03,959 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand 36 states. [2018-11-23 13:07:03,959 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand 36 states. [2018-11-23 13:07:03,960 INFO L87 Difference]: Start difference. First operand 36 states. Second operand 36 states. [2018-11-23 13:07:03,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:03,961 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-11-23 13:07:03,961 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-11-23 13:07:03,961 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:03,961 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:03,962 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand 36 states. [2018-11-23 13:07:03,962 INFO L87 Difference]: Start difference. First operand 36 states. Second operand 36 states. [2018-11-23 13:07:03,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:03,963 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-11-23 13:07:03,963 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-11-23 13:07:03,963 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:03,963 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:03,963 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:07:03,963 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:07:03,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-11-23 13:07:03,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-11-23 13:07:03,964 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-11-23 13:07:03,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:07:03,964 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-11-23 13:07:03,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-11-23 13:07:03,965 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-11-23 13:07:03,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-23 13:07:03,965 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:07:03,965 INFO L402 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:07:03,965 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:07:03,966 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:07:03,966 INFO L82 PathProgramCache]: Analyzing trace with hash 131331793, now seen corresponding path program 25 times [2018-11-23 13:07:03,966 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:07:03,966 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:07:03,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:03,967 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:07:03,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:03,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:04,939 INFO L256 TraceCheckUtils]: 0: Hoare triple {5604#true} call ULTIMATE.init(); {5604#true} is VALID [2018-11-23 13:07:04,939 INFO L273 TraceCheckUtils]: 1: Hoare triple {5604#true} assume true; {5604#true} is VALID [2018-11-23 13:07:04,939 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5604#true} {5604#true} #31#return; {5604#true} is VALID [2018-11-23 13:07:04,939 INFO L256 TraceCheckUtils]: 3: Hoare triple {5604#true} call #t~ret1 := main(); {5604#true} is VALID [2018-11-23 13:07:04,940 INFO L273 TraceCheckUtils]: 4: Hoare triple {5604#true} ~x~0 := 1;~y~0 := 0; {5606#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:04,940 INFO L273 TraceCheckUtils]: 5: Hoare triple {5606#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5607#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:04,941 INFO L273 TraceCheckUtils]: 6: Hoare triple {5607#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5608#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:04,942 INFO L273 TraceCheckUtils]: 7: Hoare triple {5608#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5609#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:04,943 INFO L273 TraceCheckUtils]: 8: Hoare triple {5609#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5610#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:04,944 INFO L273 TraceCheckUtils]: 9: Hoare triple {5610#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5611#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:04,945 INFO L273 TraceCheckUtils]: 10: Hoare triple {5611#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5612#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:04,945 INFO L273 TraceCheckUtils]: 11: Hoare triple {5612#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5613#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:04,946 INFO L273 TraceCheckUtils]: 12: Hoare triple {5613#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5614#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:04,947 INFO L273 TraceCheckUtils]: 13: Hoare triple {5614#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5615#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:04,948 INFO L273 TraceCheckUtils]: 14: Hoare triple {5615#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5616#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:04,949 INFO L273 TraceCheckUtils]: 15: Hoare triple {5616#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5617#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:04,950 INFO L273 TraceCheckUtils]: 16: Hoare triple {5617#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5618#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:04,951 INFO L273 TraceCheckUtils]: 17: Hoare triple {5618#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5619#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:04,952 INFO L273 TraceCheckUtils]: 18: Hoare triple {5619#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5620#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:04,953 INFO L273 TraceCheckUtils]: 19: Hoare triple {5620#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5621#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:04,954 INFO L273 TraceCheckUtils]: 20: Hoare triple {5621#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5622#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:04,955 INFO L273 TraceCheckUtils]: 21: Hoare triple {5622#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5623#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:04,956 INFO L273 TraceCheckUtils]: 22: Hoare triple {5623#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5624#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:04,957 INFO L273 TraceCheckUtils]: 23: Hoare triple {5624#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5625#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:04,958 INFO L273 TraceCheckUtils]: 24: Hoare triple {5625#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5626#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:04,958 INFO L273 TraceCheckUtils]: 25: Hoare triple {5626#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5627#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:04,959 INFO L273 TraceCheckUtils]: 26: Hoare triple {5627#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5628#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:04,960 INFO L273 TraceCheckUtils]: 27: Hoare triple {5628#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5629#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:04,961 INFO L273 TraceCheckUtils]: 28: Hoare triple {5629#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5630#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:04,962 INFO L273 TraceCheckUtils]: 29: Hoare triple {5630#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5631#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:04,963 INFO L273 TraceCheckUtils]: 30: Hoare triple {5631#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 25))} assume !(~y~0 % 4294967296 < 1024); {5605#false} is VALID [2018-11-23 13:07:04,963 INFO L256 TraceCheckUtils]: 31: Hoare triple {5605#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {5605#false} is VALID [2018-11-23 13:07:04,964 INFO L273 TraceCheckUtils]: 32: Hoare triple {5605#false} ~cond := #in~cond; {5605#false} is VALID [2018-11-23 13:07:04,964 INFO L273 TraceCheckUtils]: 33: Hoare triple {5605#false} assume 0 == ~cond; {5605#false} is VALID [2018-11-23 13:07:04,964 INFO L273 TraceCheckUtils]: 34: Hoare triple {5605#false} assume !false; {5605#false} is VALID [2018-11-23 13:07:04,967 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:04,967 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:07:04,967 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:07:04,977 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:07:04,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:05,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:05,009 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:07:05,188 INFO L256 TraceCheckUtils]: 0: Hoare triple {5604#true} call ULTIMATE.init(); {5604#true} is VALID [2018-11-23 13:07:05,188 INFO L273 TraceCheckUtils]: 1: Hoare triple {5604#true} assume true; {5604#true} is VALID [2018-11-23 13:07:05,188 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5604#true} {5604#true} #31#return; {5604#true} is VALID [2018-11-23 13:07:05,188 INFO L256 TraceCheckUtils]: 3: Hoare triple {5604#true} call #t~ret1 := main(); {5604#true} is VALID [2018-11-23 13:07:05,188 INFO L273 TraceCheckUtils]: 4: Hoare triple {5604#true} ~x~0 := 1;~y~0 := 0; {5606#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:05,189 INFO L273 TraceCheckUtils]: 5: Hoare triple {5606#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5607#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:05,190 INFO L273 TraceCheckUtils]: 6: Hoare triple {5607#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5608#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:05,190 INFO L273 TraceCheckUtils]: 7: Hoare triple {5608#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5609#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:05,191 INFO L273 TraceCheckUtils]: 8: Hoare triple {5609#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5610#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:05,192 INFO L273 TraceCheckUtils]: 9: Hoare triple {5610#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5611#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:05,193 INFO L273 TraceCheckUtils]: 10: Hoare triple {5611#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5612#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:05,194 INFO L273 TraceCheckUtils]: 11: Hoare triple {5612#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5613#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:05,195 INFO L273 TraceCheckUtils]: 12: Hoare triple {5613#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5614#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:05,196 INFO L273 TraceCheckUtils]: 13: Hoare triple {5614#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5615#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:05,197 INFO L273 TraceCheckUtils]: 14: Hoare triple {5615#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5616#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:05,198 INFO L273 TraceCheckUtils]: 15: Hoare triple {5616#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5617#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:05,199 INFO L273 TraceCheckUtils]: 16: Hoare triple {5617#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5618#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:05,200 INFO L273 TraceCheckUtils]: 17: Hoare triple {5618#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5619#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:05,200 INFO L273 TraceCheckUtils]: 18: Hoare triple {5619#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5620#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:05,201 INFO L273 TraceCheckUtils]: 19: Hoare triple {5620#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5621#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:05,202 INFO L273 TraceCheckUtils]: 20: Hoare triple {5621#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5622#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:05,203 INFO L273 TraceCheckUtils]: 21: Hoare triple {5622#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5623#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:05,204 INFO L273 TraceCheckUtils]: 22: Hoare triple {5623#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5624#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:05,205 INFO L273 TraceCheckUtils]: 23: Hoare triple {5624#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5625#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:05,206 INFO L273 TraceCheckUtils]: 24: Hoare triple {5625#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5626#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:05,207 INFO L273 TraceCheckUtils]: 25: Hoare triple {5626#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5627#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:05,208 INFO L273 TraceCheckUtils]: 26: Hoare triple {5627#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5628#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:05,209 INFO L273 TraceCheckUtils]: 27: Hoare triple {5628#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5629#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:05,210 INFO L273 TraceCheckUtils]: 28: Hoare triple {5629#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5630#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:05,211 INFO L273 TraceCheckUtils]: 29: Hoare triple {5630#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5722#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:05,212 INFO L273 TraceCheckUtils]: 30: Hoare triple {5722#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !(~y~0 % 4294967296 < 1024); {5605#false} is VALID [2018-11-23 13:07:05,212 INFO L256 TraceCheckUtils]: 31: Hoare triple {5605#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {5605#false} is VALID [2018-11-23 13:07:05,212 INFO L273 TraceCheckUtils]: 32: Hoare triple {5605#false} ~cond := #in~cond; {5605#false} is VALID [2018-11-23 13:07:05,212 INFO L273 TraceCheckUtils]: 33: Hoare triple {5605#false} assume 0 == ~cond; {5605#false} is VALID [2018-11-23 13:07:05,212 INFO L273 TraceCheckUtils]: 34: Hoare triple {5605#false} assume !false; {5605#false} is VALID [2018-11-23 13:07:05,215 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:05,233 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:07:05,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 29 [2018-11-23 13:07:05,234 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 35 [2018-11-23 13:07:05,234 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:07:05,234 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 29 states. [2018-11-23 13:07:05,262 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:05,262 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-11-23 13:07:05,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-11-23 13:07:05,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=731, Unknown=0, NotChecked=0, Total=812 [2018-11-23 13:07:05,264 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 29 states. [2018-11-23 13:07:07,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:07,127 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-11-23 13:07:07,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-23 13:07:07,127 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 35 [2018-11-23 13:07:07,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:07:07,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-23 13:07:07,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 42 transitions. [2018-11-23 13:07:07,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-23 13:07:07,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 42 transitions. [2018-11-23 13:07:07,129 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 28 states and 42 transitions. [2018-11-23 13:07:07,162 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:07,163 INFO L225 Difference]: With dead ends: 42 [2018-11-23 13:07:07,163 INFO L226 Difference]: Without dead ends: 37 [2018-11-23 13:07:07,164 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=81, Invalid=731, Unknown=0, NotChecked=0, Total=812 [2018-11-23 13:07:07,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-11-23 13:07:07,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-11-23 13:07:07,221 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:07:07,221 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand 37 states. [2018-11-23 13:07:07,221 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 37 states. [2018-11-23 13:07:07,221 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 37 states. [2018-11-23 13:07:07,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:07,222 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-11-23 13:07:07,222 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-11-23 13:07:07,222 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:07,222 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:07,223 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 37 states. [2018-11-23 13:07:07,223 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 37 states. [2018-11-23 13:07:07,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:07,223 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-11-23 13:07:07,224 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-11-23 13:07:07,224 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:07,224 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:07,224 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:07:07,224 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:07:07,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-23 13:07:07,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-11-23 13:07:07,225 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-11-23 13:07:07,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:07:07,225 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-11-23 13:07:07,225 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-11-23 13:07:07,226 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-11-23 13:07:07,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-23 13:07:07,226 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:07:07,226 INFO L402 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:07:07,227 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:07:07,227 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:07:07,227 INFO L82 PathProgramCache]: Analyzing trace with hash -187220450, now seen corresponding path program 26 times [2018-11-23 13:07:07,227 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:07:07,227 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:07:07,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:07,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:07:07,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:07,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:09,157 INFO L256 TraceCheckUtils]: 0: Hoare triple {5958#true} call ULTIMATE.init(); {5958#true} is VALID [2018-11-23 13:07:09,157 INFO L273 TraceCheckUtils]: 1: Hoare triple {5958#true} assume true; {5958#true} is VALID [2018-11-23 13:07:09,157 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5958#true} {5958#true} #31#return; {5958#true} is VALID [2018-11-23 13:07:09,157 INFO L256 TraceCheckUtils]: 3: Hoare triple {5958#true} call #t~ret1 := main(); {5958#true} is VALID [2018-11-23 13:07:09,158 INFO L273 TraceCheckUtils]: 4: Hoare triple {5958#true} ~x~0 := 1;~y~0 := 0; {5960#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:09,158 INFO L273 TraceCheckUtils]: 5: Hoare triple {5960#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5961#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:09,159 INFO L273 TraceCheckUtils]: 6: Hoare triple {5961#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5962#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:09,160 INFO L273 TraceCheckUtils]: 7: Hoare triple {5962#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5963#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:09,161 INFO L273 TraceCheckUtils]: 8: Hoare triple {5963#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5964#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:09,162 INFO L273 TraceCheckUtils]: 9: Hoare triple {5964#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5965#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:09,163 INFO L273 TraceCheckUtils]: 10: Hoare triple {5965#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5966#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:09,164 INFO L273 TraceCheckUtils]: 11: Hoare triple {5966#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5967#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:09,165 INFO L273 TraceCheckUtils]: 12: Hoare triple {5967#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5968#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:09,166 INFO L273 TraceCheckUtils]: 13: Hoare triple {5968#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5969#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:09,167 INFO L273 TraceCheckUtils]: 14: Hoare triple {5969#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5970#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:09,167 INFO L273 TraceCheckUtils]: 15: Hoare triple {5970#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5971#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:09,168 INFO L273 TraceCheckUtils]: 16: Hoare triple {5971#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5972#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:09,169 INFO L273 TraceCheckUtils]: 17: Hoare triple {5972#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5973#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:09,170 INFO L273 TraceCheckUtils]: 18: Hoare triple {5973#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5974#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:09,171 INFO L273 TraceCheckUtils]: 19: Hoare triple {5974#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5975#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:09,172 INFO L273 TraceCheckUtils]: 20: Hoare triple {5975#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5976#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:09,173 INFO L273 TraceCheckUtils]: 21: Hoare triple {5976#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5977#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:09,174 INFO L273 TraceCheckUtils]: 22: Hoare triple {5977#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5978#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:09,175 INFO L273 TraceCheckUtils]: 23: Hoare triple {5978#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5979#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:09,176 INFO L273 TraceCheckUtils]: 24: Hoare triple {5979#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5980#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:09,177 INFO L273 TraceCheckUtils]: 25: Hoare triple {5980#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5981#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:09,178 INFO L273 TraceCheckUtils]: 26: Hoare triple {5981#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5982#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:09,179 INFO L273 TraceCheckUtils]: 27: Hoare triple {5982#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5983#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:09,180 INFO L273 TraceCheckUtils]: 28: Hoare triple {5983#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5984#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:09,181 INFO L273 TraceCheckUtils]: 29: Hoare triple {5984#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5985#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:09,182 INFO L273 TraceCheckUtils]: 30: Hoare triple {5985#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5986#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 26))} is VALID [2018-11-23 13:07:09,183 INFO L273 TraceCheckUtils]: 31: Hoare triple {5986#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 26))} assume !(~y~0 % 4294967296 < 1024); {5959#false} is VALID [2018-11-23 13:07:09,183 INFO L256 TraceCheckUtils]: 32: Hoare triple {5959#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {5959#false} is VALID [2018-11-23 13:07:09,183 INFO L273 TraceCheckUtils]: 33: Hoare triple {5959#false} ~cond := #in~cond; {5959#false} is VALID [2018-11-23 13:07:09,183 INFO L273 TraceCheckUtils]: 34: Hoare triple {5959#false} assume 0 == ~cond; {5959#false} is VALID [2018-11-23 13:07:09,183 INFO L273 TraceCheckUtils]: 35: Hoare triple {5959#false} assume !false; {5959#false} is VALID [2018-11-23 13:07:09,186 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:09,186 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:07:09,187 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:07:09,198 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:07:09,222 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:07:09,222 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:07:09,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:09,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:07:09,608 INFO L256 TraceCheckUtils]: 0: Hoare triple {5958#true} call ULTIMATE.init(); {5958#true} is VALID [2018-11-23 13:07:09,609 INFO L273 TraceCheckUtils]: 1: Hoare triple {5958#true} assume true; {5958#true} is VALID [2018-11-23 13:07:09,609 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5958#true} {5958#true} #31#return; {5958#true} is VALID [2018-11-23 13:07:09,609 INFO L256 TraceCheckUtils]: 3: Hoare triple {5958#true} call #t~ret1 := main(); {5958#true} is VALID [2018-11-23 13:07:09,609 INFO L273 TraceCheckUtils]: 4: Hoare triple {5958#true} ~x~0 := 1;~y~0 := 0; {5960#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:09,610 INFO L273 TraceCheckUtils]: 5: Hoare triple {5960#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5961#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:09,610 INFO L273 TraceCheckUtils]: 6: Hoare triple {5961#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5962#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:09,611 INFO L273 TraceCheckUtils]: 7: Hoare triple {5962#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5963#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:09,612 INFO L273 TraceCheckUtils]: 8: Hoare triple {5963#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5964#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:09,613 INFO L273 TraceCheckUtils]: 9: Hoare triple {5964#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5965#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:09,613 INFO L273 TraceCheckUtils]: 10: Hoare triple {5965#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5966#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:09,614 INFO L273 TraceCheckUtils]: 11: Hoare triple {5966#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5967#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:09,615 INFO L273 TraceCheckUtils]: 12: Hoare triple {5967#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5968#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:09,616 INFO L273 TraceCheckUtils]: 13: Hoare triple {5968#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5969#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:09,617 INFO L273 TraceCheckUtils]: 14: Hoare triple {5969#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5970#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:09,618 INFO L273 TraceCheckUtils]: 15: Hoare triple {5970#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5971#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:09,619 INFO L273 TraceCheckUtils]: 16: Hoare triple {5971#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5972#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:09,620 INFO L273 TraceCheckUtils]: 17: Hoare triple {5972#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5973#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:09,621 INFO L273 TraceCheckUtils]: 18: Hoare triple {5973#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5974#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:09,622 INFO L273 TraceCheckUtils]: 19: Hoare triple {5974#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5975#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:09,623 INFO L273 TraceCheckUtils]: 20: Hoare triple {5975#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5976#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:09,624 INFO L273 TraceCheckUtils]: 21: Hoare triple {5976#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5977#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:09,625 INFO L273 TraceCheckUtils]: 22: Hoare triple {5977#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5978#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:09,626 INFO L273 TraceCheckUtils]: 23: Hoare triple {5978#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5979#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:09,626 INFO L273 TraceCheckUtils]: 24: Hoare triple {5979#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5980#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:09,627 INFO L273 TraceCheckUtils]: 25: Hoare triple {5980#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5981#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:09,628 INFO L273 TraceCheckUtils]: 26: Hoare triple {5981#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5982#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:09,629 INFO L273 TraceCheckUtils]: 27: Hoare triple {5982#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5983#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:09,630 INFO L273 TraceCheckUtils]: 28: Hoare triple {5983#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5984#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:09,631 INFO L273 TraceCheckUtils]: 29: Hoare triple {5984#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {5985#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:09,632 INFO L273 TraceCheckUtils]: 30: Hoare triple {5985#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6080#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:07:09,633 INFO L273 TraceCheckUtils]: 31: Hoare triple {6080#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !(~y~0 % 4294967296 < 1024); {5959#false} is VALID [2018-11-23 13:07:09,633 INFO L256 TraceCheckUtils]: 32: Hoare triple {5959#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {5959#false} is VALID [2018-11-23 13:07:09,633 INFO L273 TraceCheckUtils]: 33: Hoare triple {5959#false} ~cond := #in~cond; {5959#false} is VALID [2018-11-23 13:07:09,633 INFO L273 TraceCheckUtils]: 34: Hoare triple {5959#false} assume 0 == ~cond; {5959#false} is VALID [2018-11-23 13:07:09,634 INFO L273 TraceCheckUtils]: 35: Hoare triple {5959#false} assume !false; {5959#false} is VALID [2018-11-23 13:07:09,636 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:09,656 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:07:09,656 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 30 [2018-11-23 13:07:09,656 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 36 [2018-11-23 13:07:09,657 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:07:09,657 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 30 states. [2018-11-23 13:07:09,686 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:09,686 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-11-23 13:07:09,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-11-23 13:07:09,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=786, Unknown=0, NotChecked=0, Total=870 [2018-11-23 13:07:09,687 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 30 states. [2018-11-23 13:07:11,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:11,879 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-11-23 13:07:11,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-23 13:07:11,879 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 36 [2018-11-23 13:07:11,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:07:11,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 13:07:11,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 43 transitions. [2018-11-23 13:07:11,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 13:07:11,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 43 transitions. [2018-11-23 13:07:11,884 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 29 states and 43 transitions. [2018-11-23 13:07:12,333 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:12,334 INFO L225 Difference]: With dead ends: 43 [2018-11-23 13:07:12,334 INFO L226 Difference]: Without dead ends: 38 [2018-11-23 13:07:12,335 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=84, Invalid=786, Unknown=0, NotChecked=0, Total=870 [2018-11-23 13:07:12,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-11-23 13:07:12,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-11-23 13:07:12,377 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:07:12,377 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand 38 states. [2018-11-23 13:07:12,378 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand 38 states. [2018-11-23 13:07:12,378 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 38 states. [2018-11-23 13:07:12,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:12,379 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-11-23 13:07:12,379 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-11-23 13:07:12,379 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:12,379 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:12,380 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand 38 states. [2018-11-23 13:07:12,380 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 38 states. [2018-11-23 13:07:12,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:12,380 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-11-23 13:07:12,380 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-11-23 13:07:12,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:12,381 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:12,381 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:07:12,381 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:07:12,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-11-23 13:07:12,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-11-23 13:07:12,382 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-11-23 13:07:12,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:07:12,382 INFO L480 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-11-23 13:07:12,382 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-11-23 13:07:12,382 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-11-23 13:07:12,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-23 13:07:12,382 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:07:12,382 INFO L402 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:07:12,383 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:07:12,383 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:07:12,383 INFO L82 PathProgramCache]: Analyzing trace with hash -1472405391, now seen corresponding path program 27 times [2018-11-23 13:07:12,383 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:07:12,383 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:07:12,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:12,384 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:07:12,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:12,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:13,087 INFO L256 TraceCheckUtils]: 0: Hoare triple {6322#true} call ULTIMATE.init(); {6322#true} is VALID [2018-11-23 13:07:13,087 INFO L273 TraceCheckUtils]: 1: Hoare triple {6322#true} assume true; {6322#true} is VALID [2018-11-23 13:07:13,088 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6322#true} {6322#true} #31#return; {6322#true} is VALID [2018-11-23 13:07:13,088 INFO L256 TraceCheckUtils]: 3: Hoare triple {6322#true} call #t~ret1 := main(); {6322#true} is VALID [2018-11-23 13:07:13,088 INFO L273 TraceCheckUtils]: 4: Hoare triple {6322#true} ~x~0 := 1;~y~0 := 0; {6324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:13,089 INFO L273 TraceCheckUtils]: 5: Hoare triple {6324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:13,089 INFO L273 TraceCheckUtils]: 6: Hoare triple {6325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6326#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:13,090 INFO L273 TraceCheckUtils]: 7: Hoare triple {6326#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6327#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:13,091 INFO L273 TraceCheckUtils]: 8: Hoare triple {6327#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6328#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:13,092 INFO L273 TraceCheckUtils]: 9: Hoare triple {6328#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6329#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:13,093 INFO L273 TraceCheckUtils]: 10: Hoare triple {6329#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6330#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:13,094 INFO L273 TraceCheckUtils]: 11: Hoare triple {6330#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6331#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:13,095 INFO L273 TraceCheckUtils]: 12: Hoare triple {6331#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6332#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:13,096 INFO L273 TraceCheckUtils]: 13: Hoare triple {6332#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6333#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:13,097 INFO L273 TraceCheckUtils]: 14: Hoare triple {6333#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6334#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:13,097 INFO L273 TraceCheckUtils]: 15: Hoare triple {6334#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6335#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:13,098 INFO L273 TraceCheckUtils]: 16: Hoare triple {6335#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6336#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:13,099 INFO L273 TraceCheckUtils]: 17: Hoare triple {6336#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6337#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:13,100 INFO L273 TraceCheckUtils]: 18: Hoare triple {6337#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6338#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:13,101 INFO L273 TraceCheckUtils]: 19: Hoare triple {6338#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6339#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:13,102 INFO L273 TraceCheckUtils]: 20: Hoare triple {6339#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6340#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:13,103 INFO L273 TraceCheckUtils]: 21: Hoare triple {6340#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6341#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:13,104 INFO L273 TraceCheckUtils]: 22: Hoare triple {6341#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6342#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:13,105 INFO L273 TraceCheckUtils]: 23: Hoare triple {6342#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6343#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:13,106 INFO L273 TraceCheckUtils]: 24: Hoare triple {6343#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6344#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:13,107 INFO L273 TraceCheckUtils]: 25: Hoare triple {6344#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6345#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:13,108 INFO L273 TraceCheckUtils]: 26: Hoare triple {6345#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6346#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:13,109 INFO L273 TraceCheckUtils]: 27: Hoare triple {6346#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6347#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:13,110 INFO L273 TraceCheckUtils]: 28: Hoare triple {6347#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6348#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:13,111 INFO L273 TraceCheckUtils]: 29: Hoare triple {6348#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6349#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:13,111 INFO L273 TraceCheckUtils]: 30: Hoare triple {6349#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6350#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:07:13,113 INFO L273 TraceCheckUtils]: 31: Hoare triple {6350#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6351#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 27))} is VALID [2018-11-23 13:07:13,113 INFO L273 TraceCheckUtils]: 32: Hoare triple {6351#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 27))} assume !(~y~0 % 4294967296 < 1024); {6323#false} is VALID [2018-11-23 13:07:13,114 INFO L256 TraceCheckUtils]: 33: Hoare triple {6323#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {6323#false} is VALID [2018-11-23 13:07:13,114 INFO L273 TraceCheckUtils]: 34: Hoare triple {6323#false} ~cond := #in~cond; {6323#false} is VALID [2018-11-23 13:07:13,114 INFO L273 TraceCheckUtils]: 35: Hoare triple {6323#false} assume 0 == ~cond; {6323#false} is VALID [2018-11-23 13:07:13,114 INFO L273 TraceCheckUtils]: 36: Hoare triple {6323#false} assume !false; {6323#false} is VALID [2018-11-23 13:07:13,117 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:13,117 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:07:13,117 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:07:13,128 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 13:07:14,060 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-11-23 13:07:14,060 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:07:14,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:14,073 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:07:14,267 INFO L256 TraceCheckUtils]: 0: Hoare triple {6322#true} call ULTIMATE.init(); {6322#true} is VALID [2018-11-23 13:07:14,267 INFO L273 TraceCheckUtils]: 1: Hoare triple {6322#true} assume true; {6322#true} is VALID [2018-11-23 13:07:14,267 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6322#true} {6322#true} #31#return; {6322#true} is VALID [2018-11-23 13:07:14,267 INFO L256 TraceCheckUtils]: 3: Hoare triple {6322#true} call #t~ret1 := main(); {6322#true} is VALID [2018-11-23 13:07:14,268 INFO L273 TraceCheckUtils]: 4: Hoare triple {6322#true} ~x~0 := 1;~y~0 := 0; {6324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:14,269 INFO L273 TraceCheckUtils]: 5: Hoare triple {6324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:14,270 INFO L273 TraceCheckUtils]: 6: Hoare triple {6325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6326#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:14,271 INFO L273 TraceCheckUtils]: 7: Hoare triple {6326#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6327#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:14,272 INFO L273 TraceCheckUtils]: 8: Hoare triple {6327#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6328#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:14,273 INFO L273 TraceCheckUtils]: 9: Hoare triple {6328#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6329#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:14,274 INFO L273 TraceCheckUtils]: 10: Hoare triple {6329#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6330#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:14,275 INFO L273 TraceCheckUtils]: 11: Hoare triple {6330#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6331#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:14,275 INFO L273 TraceCheckUtils]: 12: Hoare triple {6331#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6332#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:14,276 INFO L273 TraceCheckUtils]: 13: Hoare triple {6332#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6333#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:14,277 INFO L273 TraceCheckUtils]: 14: Hoare triple {6333#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6334#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:14,278 INFO L273 TraceCheckUtils]: 15: Hoare triple {6334#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6335#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:14,279 INFO L273 TraceCheckUtils]: 16: Hoare triple {6335#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6336#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:14,280 INFO L273 TraceCheckUtils]: 17: Hoare triple {6336#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6337#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:14,281 INFO L273 TraceCheckUtils]: 18: Hoare triple {6337#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6338#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:14,282 INFO L273 TraceCheckUtils]: 19: Hoare triple {6338#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6339#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:14,283 INFO L273 TraceCheckUtils]: 20: Hoare triple {6339#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6340#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:14,284 INFO L273 TraceCheckUtils]: 21: Hoare triple {6340#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6341#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:14,285 INFO L273 TraceCheckUtils]: 22: Hoare triple {6341#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6342#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:14,286 INFO L273 TraceCheckUtils]: 23: Hoare triple {6342#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6343#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:14,287 INFO L273 TraceCheckUtils]: 24: Hoare triple {6343#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6344#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:14,288 INFO L273 TraceCheckUtils]: 25: Hoare triple {6344#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6345#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:14,288 INFO L273 TraceCheckUtils]: 26: Hoare triple {6345#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6346#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:14,289 INFO L273 TraceCheckUtils]: 27: Hoare triple {6346#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6347#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:14,290 INFO L273 TraceCheckUtils]: 28: Hoare triple {6347#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6348#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:14,291 INFO L273 TraceCheckUtils]: 29: Hoare triple {6348#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6349#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:14,292 INFO L273 TraceCheckUtils]: 30: Hoare triple {6349#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6350#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:07:14,293 INFO L273 TraceCheckUtils]: 31: Hoare triple {6350#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6448#(and (<= 27 main_~y~0) (<= main_~y~0 27))} is VALID [2018-11-23 13:07:14,294 INFO L273 TraceCheckUtils]: 32: Hoare triple {6448#(and (<= 27 main_~y~0) (<= main_~y~0 27))} assume !(~y~0 % 4294967296 < 1024); {6323#false} is VALID [2018-11-23 13:07:14,294 INFO L256 TraceCheckUtils]: 33: Hoare triple {6323#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {6323#false} is VALID [2018-11-23 13:07:14,294 INFO L273 TraceCheckUtils]: 34: Hoare triple {6323#false} ~cond := #in~cond; {6323#false} is VALID [2018-11-23 13:07:14,295 INFO L273 TraceCheckUtils]: 35: Hoare triple {6323#false} assume 0 == ~cond; {6323#false} is VALID [2018-11-23 13:07:14,295 INFO L273 TraceCheckUtils]: 36: Hoare triple {6323#false} assume !false; {6323#false} is VALID [2018-11-23 13:07:14,297 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:14,316 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:07:14,316 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 31 [2018-11-23 13:07:14,316 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 37 [2018-11-23 13:07:14,317 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:07:14,317 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 31 states. [2018-11-23 13:07:14,347 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:14,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-11-23 13:07:14,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-11-23 13:07:14,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=843, Unknown=0, NotChecked=0, Total=930 [2018-11-23 13:07:14,348 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 31 states. [2018-11-23 13:07:16,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:16,364 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-11-23 13:07:16,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-11-23 13:07:16,364 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 37 [2018-11-23 13:07:16,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:07:16,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 13:07:16,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 44 transitions. [2018-11-23 13:07:16,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 13:07:16,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 44 transitions. [2018-11-23 13:07:16,366 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 30 states and 44 transitions. [2018-11-23 13:07:16,421 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:16,422 INFO L225 Difference]: With dead ends: 44 [2018-11-23 13:07:16,422 INFO L226 Difference]: Without dead ends: 39 [2018-11-23 13:07:16,423 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=87, Invalid=843, Unknown=0, NotChecked=0, Total=930 [2018-11-23 13:07:16,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-23 13:07:16,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-11-23 13:07:16,457 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:07:16,457 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 39 states. [2018-11-23 13:07:16,457 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 39 states. [2018-11-23 13:07:16,457 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 39 states. [2018-11-23 13:07:16,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:16,458 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-11-23 13:07:16,458 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-11-23 13:07:16,459 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:16,459 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:16,459 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 39 states. [2018-11-23 13:07:16,459 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 39 states. [2018-11-23 13:07:16,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:16,460 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-11-23 13:07:16,460 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-11-23 13:07:16,460 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:16,460 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:16,460 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:07:16,461 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:07:16,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-11-23 13:07:16,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-11-23 13:07:16,461 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-11-23 13:07:16,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:07:16,461 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-11-23 13:07:16,461 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-11-23 13:07:16,461 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-11-23 13:07:16,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 13:07:16,462 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:07:16,462 INFO L402 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:07:16,462 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:07:16,462 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:07:16,462 INFO L82 PathProgramCache]: Analyzing trace with hash 1636534398, now seen corresponding path program 28 times [2018-11-23 13:07:16,462 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:07:16,463 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:07:16,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:16,463 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:07:16,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:16,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:18,361 INFO L256 TraceCheckUtils]: 0: Hoare triple {6696#true} call ULTIMATE.init(); {6696#true} is VALID [2018-11-23 13:07:18,362 INFO L273 TraceCheckUtils]: 1: Hoare triple {6696#true} assume true; {6696#true} is VALID [2018-11-23 13:07:18,362 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6696#true} {6696#true} #31#return; {6696#true} is VALID [2018-11-23 13:07:18,362 INFO L256 TraceCheckUtils]: 3: Hoare triple {6696#true} call #t~ret1 := main(); {6696#true} is VALID [2018-11-23 13:07:18,362 INFO L273 TraceCheckUtils]: 4: Hoare triple {6696#true} ~x~0 := 1;~y~0 := 0; {6698#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:18,363 INFO L273 TraceCheckUtils]: 5: Hoare triple {6698#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6699#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:18,364 INFO L273 TraceCheckUtils]: 6: Hoare triple {6699#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6700#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:18,365 INFO L273 TraceCheckUtils]: 7: Hoare triple {6700#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6701#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:18,365 INFO L273 TraceCheckUtils]: 8: Hoare triple {6701#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6702#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:18,366 INFO L273 TraceCheckUtils]: 9: Hoare triple {6702#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6703#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:18,367 INFO L273 TraceCheckUtils]: 10: Hoare triple {6703#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6704#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:18,368 INFO L273 TraceCheckUtils]: 11: Hoare triple {6704#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6705#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:18,369 INFO L273 TraceCheckUtils]: 12: Hoare triple {6705#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6706#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:18,370 INFO L273 TraceCheckUtils]: 13: Hoare triple {6706#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6707#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:18,371 INFO L273 TraceCheckUtils]: 14: Hoare triple {6707#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6708#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:18,372 INFO L273 TraceCheckUtils]: 15: Hoare triple {6708#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6709#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:18,373 INFO L273 TraceCheckUtils]: 16: Hoare triple {6709#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6710#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:18,374 INFO L273 TraceCheckUtils]: 17: Hoare triple {6710#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6711#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:18,375 INFO L273 TraceCheckUtils]: 18: Hoare triple {6711#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6712#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:18,376 INFO L273 TraceCheckUtils]: 19: Hoare triple {6712#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6713#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:18,377 INFO L273 TraceCheckUtils]: 20: Hoare triple {6713#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6714#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:18,377 INFO L273 TraceCheckUtils]: 21: Hoare triple {6714#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6715#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:18,378 INFO L273 TraceCheckUtils]: 22: Hoare triple {6715#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6716#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:18,379 INFO L273 TraceCheckUtils]: 23: Hoare triple {6716#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6717#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:18,380 INFO L273 TraceCheckUtils]: 24: Hoare triple {6717#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6718#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:18,381 INFO L273 TraceCheckUtils]: 25: Hoare triple {6718#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6719#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:18,382 INFO L273 TraceCheckUtils]: 26: Hoare triple {6719#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6720#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:18,383 INFO L273 TraceCheckUtils]: 27: Hoare triple {6720#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6721#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:18,384 INFO L273 TraceCheckUtils]: 28: Hoare triple {6721#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6722#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:18,385 INFO L273 TraceCheckUtils]: 29: Hoare triple {6722#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6723#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:18,386 INFO L273 TraceCheckUtils]: 30: Hoare triple {6723#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6724#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:07:18,387 INFO L273 TraceCheckUtils]: 31: Hoare triple {6724#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6725#(and (<= 27 main_~y~0) (<= main_~y~0 27))} is VALID [2018-11-23 13:07:18,388 INFO L273 TraceCheckUtils]: 32: Hoare triple {6725#(and (<= 27 main_~y~0) (<= main_~y~0 27))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6726#(and (<= main_~y~0 28) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-23 13:07:18,389 INFO L273 TraceCheckUtils]: 33: Hoare triple {6726#(and (<= main_~y~0 28) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {6697#false} is VALID [2018-11-23 13:07:18,389 INFO L256 TraceCheckUtils]: 34: Hoare triple {6697#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {6697#false} is VALID [2018-11-23 13:07:18,389 INFO L273 TraceCheckUtils]: 35: Hoare triple {6697#false} ~cond := #in~cond; {6697#false} is VALID [2018-11-23 13:07:18,389 INFO L273 TraceCheckUtils]: 36: Hoare triple {6697#false} assume 0 == ~cond; {6697#false} is VALID [2018-11-23 13:07:18,389 INFO L273 TraceCheckUtils]: 37: Hoare triple {6697#false} assume !false; {6697#false} is VALID [2018-11-23 13:07:18,395 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:18,395 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:07:18,395 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:07:18,406 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 13:07:18,430 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 13:07:18,430 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:07:18,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:18,443 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:07:18,639 INFO L256 TraceCheckUtils]: 0: Hoare triple {6696#true} call ULTIMATE.init(); {6696#true} is VALID [2018-11-23 13:07:18,639 INFO L273 TraceCheckUtils]: 1: Hoare triple {6696#true} assume true; {6696#true} is VALID [2018-11-23 13:07:18,639 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6696#true} {6696#true} #31#return; {6696#true} is VALID [2018-11-23 13:07:18,640 INFO L256 TraceCheckUtils]: 3: Hoare triple {6696#true} call #t~ret1 := main(); {6696#true} is VALID [2018-11-23 13:07:18,640 INFO L273 TraceCheckUtils]: 4: Hoare triple {6696#true} ~x~0 := 1;~y~0 := 0; {6698#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:18,640 INFO L273 TraceCheckUtils]: 5: Hoare triple {6698#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6699#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:18,641 INFO L273 TraceCheckUtils]: 6: Hoare triple {6699#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6700#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:18,642 INFO L273 TraceCheckUtils]: 7: Hoare triple {6700#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6701#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:18,642 INFO L273 TraceCheckUtils]: 8: Hoare triple {6701#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6702#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:18,643 INFO L273 TraceCheckUtils]: 9: Hoare triple {6702#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6703#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:18,644 INFO L273 TraceCheckUtils]: 10: Hoare triple {6703#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6704#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:18,645 INFO L273 TraceCheckUtils]: 11: Hoare triple {6704#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6705#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:18,646 INFO L273 TraceCheckUtils]: 12: Hoare triple {6705#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6706#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:18,646 INFO L273 TraceCheckUtils]: 13: Hoare triple {6706#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6707#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:18,647 INFO L273 TraceCheckUtils]: 14: Hoare triple {6707#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6708#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:18,648 INFO L273 TraceCheckUtils]: 15: Hoare triple {6708#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6709#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:18,649 INFO L273 TraceCheckUtils]: 16: Hoare triple {6709#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6710#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:18,650 INFO L273 TraceCheckUtils]: 17: Hoare triple {6710#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6711#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:18,651 INFO L273 TraceCheckUtils]: 18: Hoare triple {6711#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6712#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:18,652 INFO L273 TraceCheckUtils]: 19: Hoare triple {6712#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6713#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:18,653 INFO L273 TraceCheckUtils]: 20: Hoare triple {6713#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6714#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:18,654 INFO L273 TraceCheckUtils]: 21: Hoare triple {6714#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6715#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:18,655 INFO L273 TraceCheckUtils]: 22: Hoare triple {6715#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6716#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:18,656 INFO L273 TraceCheckUtils]: 23: Hoare triple {6716#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6717#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:18,657 INFO L273 TraceCheckUtils]: 24: Hoare triple {6717#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6718#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:18,658 INFO L273 TraceCheckUtils]: 25: Hoare triple {6718#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6719#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:18,658 INFO L273 TraceCheckUtils]: 26: Hoare triple {6719#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6720#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:18,659 INFO L273 TraceCheckUtils]: 27: Hoare triple {6720#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6721#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:18,660 INFO L273 TraceCheckUtils]: 28: Hoare triple {6721#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6722#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:18,661 INFO L273 TraceCheckUtils]: 29: Hoare triple {6722#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6723#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:18,662 INFO L273 TraceCheckUtils]: 30: Hoare triple {6723#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6724#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:07:18,663 INFO L273 TraceCheckUtils]: 31: Hoare triple {6724#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6725#(and (<= 27 main_~y~0) (<= main_~y~0 27))} is VALID [2018-11-23 13:07:18,664 INFO L273 TraceCheckUtils]: 32: Hoare triple {6725#(and (<= 27 main_~y~0) (<= main_~y~0 27))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {6826#(and (<= main_~y~0 28) (<= 28 main_~y~0))} is VALID [2018-11-23 13:07:18,665 INFO L273 TraceCheckUtils]: 33: Hoare triple {6826#(and (<= main_~y~0 28) (<= 28 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {6697#false} is VALID [2018-11-23 13:07:18,665 INFO L256 TraceCheckUtils]: 34: Hoare triple {6697#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {6697#false} is VALID [2018-11-23 13:07:18,665 INFO L273 TraceCheckUtils]: 35: Hoare triple {6697#false} ~cond := #in~cond; {6697#false} is VALID [2018-11-23 13:07:18,666 INFO L273 TraceCheckUtils]: 36: Hoare triple {6697#false} assume 0 == ~cond; {6697#false} is VALID [2018-11-23 13:07:18,666 INFO L273 TraceCheckUtils]: 37: Hoare triple {6697#false} assume !false; {6697#false} is VALID [2018-11-23 13:07:18,668 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:18,688 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:07:18,688 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 32 [2018-11-23 13:07:18,688 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 38 [2018-11-23 13:07:18,688 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:07:18,688 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 32 states. [2018-11-23 13:07:18,723 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:18,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-11-23 13:07:18,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-11-23 13:07:18,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=902, Unknown=0, NotChecked=0, Total=992 [2018-11-23 13:07:18,724 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 32 states. [2018-11-23 13:07:20,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:20,905 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-11-23 13:07:20,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-11-23 13:07:20,905 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 38 [2018-11-23 13:07:20,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:07:20,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 13:07:20,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 45 transitions. [2018-11-23 13:07:20,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 13:07:20,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 45 transitions. [2018-11-23 13:07:20,907 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 31 states and 45 transitions. [2018-11-23 13:07:20,941 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:07:20,942 INFO L225 Difference]: With dead ends: 45 [2018-11-23 13:07:20,942 INFO L226 Difference]: Without dead ends: 40 [2018-11-23 13:07:20,943 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=90, Invalid=902, Unknown=0, NotChecked=0, Total=992 [2018-11-23 13:07:20,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-23 13:07:20,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-11-23 13:07:20,992 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:07:20,992 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 40 states. [2018-11-23 13:07:20,992 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-23 13:07:20,992 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-23 13:07:20,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:20,993 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-11-23 13:07:20,993 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-11-23 13:07:20,993 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:20,994 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:20,994 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-23 13:07:20,994 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-23 13:07:20,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:07:20,995 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-11-23 13:07:20,995 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-11-23 13:07:20,995 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:07:20,995 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:07:20,996 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:07:20,996 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:07:20,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-11-23 13:07:20,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-11-23 13:07:20,997 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-11-23 13:07:20,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:07:20,997 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-11-23 13:07:20,997 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-11-23 13:07:20,997 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-11-23 13:07:20,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-23 13:07:20,998 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:07:20,998 INFO L402 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:07:20,998 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:07:20,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:07:20,998 INFO L82 PathProgramCache]: Analyzing trace with hash -770579951, now seen corresponding path program 29 times [2018-11-23 13:07:20,998 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:07:20,998 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:07:20,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:20,999 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:07:20,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:07:21,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:07:21,765 INFO L256 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7080#true} is VALID [2018-11-23 13:07:21,765 INFO L273 TraceCheckUtils]: 1: Hoare triple {7080#true} assume true; {7080#true} is VALID [2018-11-23 13:07:21,765 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {7080#true} {7080#true} #31#return; {7080#true} is VALID [2018-11-23 13:07:21,765 INFO L256 TraceCheckUtils]: 3: Hoare triple {7080#true} call #t~ret1 := main(); {7080#true} is VALID [2018-11-23 13:07:21,765 INFO L273 TraceCheckUtils]: 4: Hoare triple {7080#true} ~x~0 := 1;~y~0 := 0; {7082#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:07:21,766 INFO L273 TraceCheckUtils]: 5: Hoare triple {7082#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7083#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:07:21,767 INFO L273 TraceCheckUtils]: 6: Hoare triple {7083#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7084#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:07:21,767 INFO L273 TraceCheckUtils]: 7: Hoare triple {7084#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7085#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:07:21,768 INFO L273 TraceCheckUtils]: 8: Hoare triple {7085#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7086#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:07:21,769 INFO L273 TraceCheckUtils]: 9: Hoare triple {7086#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7087#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:07:21,770 INFO L273 TraceCheckUtils]: 10: Hoare triple {7087#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7088#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:07:21,771 INFO L273 TraceCheckUtils]: 11: Hoare triple {7088#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7089#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:07:21,772 INFO L273 TraceCheckUtils]: 12: Hoare triple {7089#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7090#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:07:21,773 INFO L273 TraceCheckUtils]: 13: Hoare triple {7090#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7091#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:07:21,774 INFO L273 TraceCheckUtils]: 14: Hoare triple {7091#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7092#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:07:21,775 INFO L273 TraceCheckUtils]: 15: Hoare triple {7092#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7093#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:07:21,776 INFO L273 TraceCheckUtils]: 16: Hoare triple {7093#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7094#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:07:21,777 INFO L273 TraceCheckUtils]: 17: Hoare triple {7094#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7095#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:07:21,778 INFO L273 TraceCheckUtils]: 18: Hoare triple {7095#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7096#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:07:21,778 INFO L273 TraceCheckUtils]: 19: Hoare triple {7096#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7097#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:07:21,779 INFO L273 TraceCheckUtils]: 20: Hoare triple {7097#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7098#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:07:21,780 INFO L273 TraceCheckUtils]: 21: Hoare triple {7098#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7099#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:07:21,781 INFO L273 TraceCheckUtils]: 22: Hoare triple {7099#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7100#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:07:21,782 INFO L273 TraceCheckUtils]: 23: Hoare triple {7100#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7101#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:07:21,783 INFO L273 TraceCheckUtils]: 24: Hoare triple {7101#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7102#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:07:21,784 INFO L273 TraceCheckUtils]: 25: Hoare triple {7102#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7103#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:07:21,785 INFO L273 TraceCheckUtils]: 26: Hoare triple {7103#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7104#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:07:21,786 INFO L273 TraceCheckUtils]: 27: Hoare triple {7104#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7105#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:07:21,787 INFO L273 TraceCheckUtils]: 28: Hoare triple {7105#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7106#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:07:21,788 INFO L273 TraceCheckUtils]: 29: Hoare triple {7106#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7107#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:07:21,789 INFO L273 TraceCheckUtils]: 30: Hoare triple {7107#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7108#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:07:21,790 INFO L273 TraceCheckUtils]: 31: Hoare triple {7108#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7109#(and (<= 27 main_~y~0) (<= main_~y~0 27))} is VALID [2018-11-23 13:07:21,790 INFO L273 TraceCheckUtils]: 32: Hoare triple {7109#(and (<= 27 main_~y~0) (<= main_~y~0 27))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7110#(and (<= main_~y~0 28) (<= 28 main_~y~0))} is VALID [2018-11-23 13:07:21,792 INFO L273 TraceCheckUtils]: 33: Hoare triple {7110#(and (<= main_~y~0 28) (<= 28 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7111#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 29))} is VALID [2018-11-23 13:07:21,792 INFO L273 TraceCheckUtils]: 34: Hoare triple {7111#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 29))} assume !(~y~0 % 4294967296 < 1024); {7081#false} is VALID [2018-11-23 13:07:21,793 INFO L256 TraceCheckUtils]: 35: Hoare triple {7081#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {7081#false} is VALID [2018-11-23 13:07:21,793 INFO L273 TraceCheckUtils]: 36: Hoare triple {7081#false} ~cond := #in~cond; {7081#false} is VALID [2018-11-23 13:07:21,793 INFO L273 TraceCheckUtils]: 37: Hoare triple {7081#false} assume 0 == ~cond; {7081#false} is VALID [2018-11-23 13:07:21,793 INFO L273 TraceCheckUtils]: 38: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2018-11-23 13:07:21,796 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:07:21,797 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:07:21,797 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:07:21,806 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 13:08:18,203 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2018-11-23 13:08:18,203 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:08:18,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:08:18,287 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:08:18,473 INFO L256 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7080#true} is VALID [2018-11-23 13:08:18,473 INFO L273 TraceCheckUtils]: 1: Hoare triple {7080#true} assume true; {7080#true} is VALID [2018-11-23 13:08:18,473 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {7080#true} {7080#true} #31#return; {7080#true} is VALID [2018-11-23 13:08:18,474 INFO L256 TraceCheckUtils]: 3: Hoare triple {7080#true} call #t~ret1 := main(); {7080#true} is VALID [2018-11-23 13:08:18,474 INFO L273 TraceCheckUtils]: 4: Hoare triple {7080#true} ~x~0 := 1;~y~0 := 0; {7082#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:08:18,475 INFO L273 TraceCheckUtils]: 5: Hoare triple {7082#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7083#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:08:18,476 INFO L273 TraceCheckUtils]: 6: Hoare triple {7083#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7084#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:08:18,476 INFO L273 TraceCheckUtils]: 7: Hoare triple {7084#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7085#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:08:18,477 INFO L273 TraceCheckUtils]: 8: Hoare triple {7085#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7086#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:08:18,478 INFO L273 TraceCheckUtils]: 9: Hoare triple {7086#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7087#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:08:18,479 INFO L273 TraceCheckUtils]: 10: Hoare triple {7087#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7088#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:08:18,479 INFO L273 TraceCheckUtils]: 11: Hoare triple {7088#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7089#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:08:18,480 INFO L273 TraceCheckUtils]: 12: Hoare triple {7089#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7090#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:08:18,481 INFO L273 TraceCheckUtils]: 13: Hoare triple {7090#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7091#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:08:18,482 INFO L273 TraceCheckUtils]: 14: Hoare triple {7091#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7092#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:08:18,483 INFO L273 TraceCheckUtils]: 15: Hoare triple {7092#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7093#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:08:18,484 INFO L273 TraceCheckUtils]: 16: Hoare triple {7093#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7094#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:08:18,485 INFO L273 TraceCheckUtils]: 17: Hoare triple {7094#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7095#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:08:18,486 INFO L273 TraceCheckUtils]: 18: Hoare triple {7095#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7096#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:08:18,487 INFO L273 TraceCheckUtils]: 19: Hoare triple {7096#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7097#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:08:18,488 INFO L273 TraceCheckUtils]: 20: Hoare triple {7097#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7098#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:08:18,489 INFO L273 TraceCheckUtils]: 21: Hoare triple {7098#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7099#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:08:18,490 INFO L273 TraceCheckUtils]: 22: Hoare triple {7099#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7100#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:08:18,491 INFO L273 TraceCheckUtils]: 23: Hoare triple {7100#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7101#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:08:18,492 INFO L273 TraceCheckUtils]: 24: Hoare triple {7101#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7102#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:08:18,492 INFO L273 TraceCheckUtils]: 25: Hoare triple {7102#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7103#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:08:18,493 INFO L273 TraceCheckUtils]: 26: Hoare triple {7103#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7104#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:08:18,494 INFO L273 TraceCheckUtils]: 27: Hoare triple {7104#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7105#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:08:18,495 INFO L273 TraceCheckUtils]: 28: Hoare triple {7105#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7106#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:08:18,496 INFO L273 TraceCheckUtils]: 29: Hoare triple {7106#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7107#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:08:18,497 INFO L273 TraceCheckUtils]: 30: Hoare triple {7107#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7108#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:08:18,498 INFO L273 TraceCheckUtils]: 31: Hoare triple {7108#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7109#(and (<= 27 main_~y~0) (<= main_~y~0 27))} is VALID [2018-11-23 13:08:18,499 INFO L273 TraceCheckUtils]: 32: Hoare triple {7109#(and (<= 27 main_~y~0) (<= main_~y~0 27))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7110#(and (<= main_~y~0 28) (<= 28 main_~y~0))} is VALID [2018-11-23 13:08:18,500 INFO L273 TraceCheckUtils]: 33: Hoare triple {7110#(and (<= main_~y~0 28) (<= 28 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7214#(and (<= main_~y~0 29) (<= 29 main_~y~0))} is VALID [2018-11-23 13:08:18,501 INFO L273 TraceCheckUtils]: 34: Hoare triple {7214#(and (<= main_~y~0 29) (<= 29 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {7081#false} is VALID [2018-11-23 13:08:18,501 INFO L256 TraceCheckUtils]: 35: Hoare triple {7081#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {7081#false} is VALID [2018-11-23 13:08:18,501 INFO L273 TraceCheckUtils]: 36: Hoare triple {7081#false} ~cond := #in~cond; {7081#false} is VALID [2018-11-23 13:08:18,501 INFO L273 TraceCheckUtils]: 37: Hoare triple {7081#false} assume 0 == ~cond; {7081#false} is VALID [2018-11-23 13:08:18,502 INFO L273 TraceCheckUtils]: 38: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2018-11-23 13:08:18,504 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:08:18,510 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:08:18,510 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 33 [2018-11-23 13:08:18,510 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 39 [2018-11-23 13:08:18,510 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:08:18,511 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 33 states. [2018-11-23 13:08:18,552 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:08:18,552 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-23 13:08:18,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-23 13:08:18,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=963, Unknown=0, NotChecked=0, Total=1056 [2018-11-23 13:08:18,553 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 33 states. [2018-11-23 13:08:20,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:08:20,874 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-11-23 13:08:20,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-23 13:08:20,874 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 39 [2018-11-23 13:08:20,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:08:20,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-23 13:08:20,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 46 transitions. [2018-11-23 13:08:20,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-23 13:08:20,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 46 transitions. [2018-11-23 13:08:20,877 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 32 states and 46 transitions. [2018-11-23 13:08:20,914 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:08:20,914 INFO L225 Difference]: With dead ends: 46 [2018-11-23 13:08:20,915 INFO L226 Difference]: Without dead ends: 41 [2018-11-23 13:08:20,916 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=93, Invalid=963, Unknown=0, NotChecked=0, Total=1056 [2018-11-23 13:08:20,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-11-23 13:08:20,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-11-23 13:08:20,953 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:08:20,953 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand 41 states. [2018-11-23 13:08:20,953 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 41 states. [2018-11-23 13:08:20,953 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 41 states. [2018-11-23 13:08:20,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:08:20,954 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-11-23 13:08:20,954 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-11-23 13:08:20,955 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:08:20,955 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:08:20,955 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 41 states. [2018-11-23 13:08:20,955 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 41 states. [2018-11-23 13:08:20,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:08:20,956 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-11-23 13:08:20,956 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-11-23 13:08:20,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:08:20,957 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:08:20,957 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:08:20,957 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:08:20,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-23 13:08:20,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-11-23 13:08:20,958 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-11-23 13:08:20,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:08:20,958 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-11-23 13:08:20,958 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-23 13:08:20,958 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-11-23 13:08:20,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 13:08:20,959 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:08:20,959 INFO L402 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:08:20,959 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:08:20,959 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:08:20,959 INFO L82 PathProgramCache]: Analyzing trace with hash 1918286558, now seen corresponding path program 30 times [2018-11-23 13:08:20,959 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:08:20,959 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:08:20,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:08:20,960 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:08:20,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:08:20,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:08:21,779 INFO L256 TraceCheckUtils]: 0: Hoare triple {7474#true} call ULTIMATE.init(); {7474#true} is VALID [2018-11-23 13:08:21,779 INFO L273 TraceCheckUtils]: 1: Hoare triple {7474#true} assume true; {7474#true} is VALID [2018-11-23 13:08:21,779 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {7474#true} {7474#true} #31#return; {7474#true} is VALID [2018-11-23 13:08:21,779 INFO L256 TraceCheckUtils]: 3: Hoare triple {7474#true} call #t~ret1 := main(); {7474#true} is VALID [2018-11-23 13:08:21,780 INFO L273 TraceCheckUtils]: 4: Hoare triple {7474#true} ~x~0 := 1;~y~0 := 0; {7476#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-23 13:08:21,781 INFO L273 TraceCheckUtils]: 5: Hoare triple {7476#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7477#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-23 13:08:21,781 INFO L273 TraceCheckUtils]: 6: Hoare triple {7477#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7478#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-23 13:08:21,782 INFO L273 TraceCheckUtils]: 7: Hoare triple {7478#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7479#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-23 13:08:21,782 INFO L273 TraceCheckUtils]: 8: Hoare triple {7479#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7480#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-23 13:08:21,783 INFO L273 TraceCheckUtils]: 9: Hoare triple {7480#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7481#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-23 13:08:21,784 INFO L273 TraceCheckUtils]: 10: Hoare triple {7481#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7482#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-23 13:08:21,785 INFO L273 TraceCheckUtils]: 11: Hoare triple {7482#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7483#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-23 13:08:21,786 INFO L273 TraceCheckUtils]: 12: Hoare triple {7483#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7484#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-23 13:08:21,787 INFO L273 TraceCheckUtils]: 13: Hoare triple {7484#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7485#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-23 13:08:21,788 INFO L273 TraceCheckUtils]: 14: Hoare triple {7485#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7486#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-23 13:08:21,789 INFO L273 TraceCheckUtils]: 15: Hoare triple {7486#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7487#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-23 13:08:21,790 INFO L273 TraceCheckUtils]: 16: Hoare triple {7487#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7488#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-23 13:08:21,791 INFO L273 TraceCheckUtils]: 17: Hoare triple {7488#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7489#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-23 13:08:21,792 INFO L273 TraceCheckUtils]: 18: Hoare triple {7489#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7490#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-23 13:08:21,793 INFO L273 TraceCheckUtils]: 19: Hoare triple {7490#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7491#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-23 13:08:21,794 INFO L273 TraceCheckUtils]: 20: Hoare triple {7491#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7492#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-23 13:08:21,794 INFO L273 TraceCheckUtils]: 21: Hoare triple {7492#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7493#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-23 13:08:21,795 INFO L273 TraceCheckUtils]: 22: Hoare triple {7493#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7494#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-23 13:08:21,796 INFO L273 TraceCheckUtils]: 23: Hoare triple {7494#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7495#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-23 13:08:21,797 INFO L273 TraceCheckUtils]: 24: Hoare triple {7495#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7496#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-23 13:08:21,798 INFO L273 TraceCheckUtils]: 25: Hoare triple {7496#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7497#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-23 13:08:21,799 INFO L273 TraceCheckUtils]: 26: Hoare triple {7497#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7498#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-23 13:08:21,800 INFO L273 TraceCheckUtils]: 27: Hoare triple {7498#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7499#(and (<= 23 main_~y~0) (<= main_~y~0 23))} is VALID [2018-11-23 13:08:21,801 INFO L273 TraceCheckUtils]: 28: Hoare triple {7499#(and (<= 23 main_~y~0) (<= main_~y~0 23))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7500#(and (<= main_~y~0 24) (<= 24 main_~y~0))} is VALID [2018-11-23 13:08:21,802 INFO L273 TraceCheckUtils]: 29: Hoare triple {7500#(and (<= main_~y~0 24) (<= 24 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7501#(and (<= 25 main_~y~0) (<= main_~y~0 25))} is VALID [2018-11-23 13:08:21,803 INFO L273 TraceCheckUtils]: 30: Hoare triple {7501#(and (<= 25 main_~y~0) (<= main_~y~0 25))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7502#(and (<= 26 main_~y~0) (<= main_~y~0 26))} is VALID [2018-11-23 13:08:21,804 INFO L273 TraceCheckUtils]: 31: Hoare triple {7502#(and (<= 26 main_~y~0) (<= main_~y~0 26))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7503#(and (<= 27 main_~y~0) (<= main_~y~0 27))} is VALID [2018-11-23 13:08:21,805 INFO L273 TraceCheckUtils]: 32: Hoare triple {7503#(and (<= 27 main_~y~0) (<= main_~y~0 27))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7504#(and (<= main_~y~0 28) (<= 28 main_~y~0))} is VALID [2018-11-23 13:08:21,806 INFO L273 TraceCheckUtils]: 33: Hoare triple {7504#(and (<= main_~y~0 28) (<= 28 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7505#(and (<= main_~y~0 29) (<= 29 main_~y~0))} is VALID [2018-11-23 13:08:21,807 INFO L273 TraceCheckUtils]: 34: Hoare triple {7505#(and (<= main_~y~0 29) (<= 29 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := 1 + #t~post0;havoc #t~post0; {7506#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 30))} is VALID [2018-11-23 13:08:21,808 INFO L273 TraceCheckUtils]: 35: Hoare triple {7506#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 30))} assume !(~y~0 % 4294967296 < 1024); {7475#false} is VALID [2018-11-23 13:08:21,808 INFO L256 TraceCheckUtils]: 36: Hoare triple {7475#false} call __VERIFIER_assert((if 1 == ~x~0 % 4294967296 then 1 else 0)); {7475#false} is VALID [2018-11-23 13:08:21,808 INFO L273 TraceCheckUtils]: 37: Hoare triple {7475#false} ~cond := #in~cond; {7475#false} is VALID [2018-11-23 13:08:21,808 INFO L273 TraceCheckUtils]: 38: Hoare triple {7475#false} assume 0 == ~cond; {7475#false} is VALID [2018-11-23 13:08:21,808 INFO L273 TraceCheckUtils]: 39: Hoare triple {7475#false} assume !false; {7475#false} is VALID [2018-11-23 13:08:21,812 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:08:21,812 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:08:21,812 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:08:21,821 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE