java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/nested5_false-unreach-call.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 13:16:20,986 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 13:16:20,988 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 13:16:21,003 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 13:16:21,003 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 13:16:21,004 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 13:16:21,005 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 13:16:21,007 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 13:16:21,009 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 13:16:21,009 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 13:16:21,010 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 13:16:21,011 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 13:16:21,012 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 13:16:21,013 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 13:16:21,014 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 13:16:21,015 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 13:16:21,015 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 13:16:21,019 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 13:16:21,026 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 13:16:21,028 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 13:16:21,031 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 13:16:21,032 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 13:16:21,034 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 13:16:21,035 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 13:16:21,035 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 13:16:21,036 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 13:16:21,037 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 13:16:21,037 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 13:16:21,038 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 13:16:21,039 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 13:16:21,039 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 13:16:21,040 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 13:16:21,040 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 13:16:21,040 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 13:16:21,041 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 13:16:21,042 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 13:16:21,042 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 13:16:21,056 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 13:16:21,057 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 13:16:21,057 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 13:16:21,057 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 13:16:21,058 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 13:16:21,058 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 13:16:21,058 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 13:16:21,059 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 13:16:21,059 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 13:16:21,059 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 13:16:21,059 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 13:16:21,059 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 13:16:21,060 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 13:16:21,060 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 13:16:21,060 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 13:16:21,060 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 13:16:21,060 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 13:16:21,061 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 13:16:21,061 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 13:16:21,061 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 13:16:21,061 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 13:16:21,061 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 13:16:21,061 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 13:16:21,062 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 13:16:21,062 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 13:16:21,062 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 13:16:21,062 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 13:16:21,062 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 13:16:21,063 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 13:16:21,063 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 13:16:21,063 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 13:16:21,115 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 13:16:21,128 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 13:16:21,131 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 13:16:21,133 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 13:16:21,133 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 13:16:21,134 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/nested5_false-unreach-call.c [2018-11-23 13:16:21,192 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8e3d5da26/f164247b303d4caba66708f612605bcc/FLAG72099643c [2018-11-23 13:16:21,673 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 13:16:21,674 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/nested5_false-unreach-call.c [2018-11-23 13:16:21,680 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8e3d5da26/f164247b303d4caba66708f612605bcc/FLAG72099643c [2018-11-23 13:16:22,015 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8e3d5da26/f164247b303d4caba66708f612605bcc [2018-11-23 13:16:22,027 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 13:16:22,028 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 13:16:22,030 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 13:16:22,030 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 13:16:22,033 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 13:16:22,035 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,038 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@53a325ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22, skipping insertion in model container [2018-11-23 13:16:22,038 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,048 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 13:16:22,070 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 13:16:22,266 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 13:16:22,270 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 13:16:22,291 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 13:16:22,306 INFO L195 MainTranslator]: Completed translation [2018-11-23 13:16:22,307 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22 WrapperNode [2018-11-23 13:16:22,307 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 13:16:22,308 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 13:16:22,308 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 13:16:22,308 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 13:16:22,318 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,324 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,331 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 13:16:22,331 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 13:16:22,332 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 13:16:22,332 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 13:16:22,342 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,342 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,343 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,344 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,350 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,358 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,359 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... [2018-11-23 13:16:22,361 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 13:16:22,361 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 13:16:22,361 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 13:16:22,362 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 13:16:22,362 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 13:16:22,498 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 13:16:22,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 13:16:22,499 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 13:16:22,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 13:16:22,499 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 13:16:22,499 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 13:16:22,499 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 13:16:22,500 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 13:16:23,104 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 13:16:23,104 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-11-23 13:16:23,105 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 01:16:23 BoogieIcfgContainer [2018-11-23 13:16:23,105 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 13:16:23,106 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 13:16:23,106 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 13:16:23,109 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 13:16:23,110 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 01:16:22" (1/3) ... [2018-11-23 13:16:23,110 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4248a33c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 01:16:23, skipping insertion in model container [2018-11-23 13:16:23,111 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:16:22" (2/3) ... [2018-11-23 13:16:23,111 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4248a33c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 01:16:23, skipping insertion in model container [2018-11-23 13:16:23,111 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 01:16:23" (3/3) ... [2018-11-23 13:16:23,113 INFO L112 eAbstractionObserver]: Analyzing ICFG nested5_false-unreach-call.c [2018-11-23 13:16:23,123 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 13:16:23,130 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 13:16:23,144 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 13:16:23,178 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 13:16:23,179 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 13:16:23,179 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 13:16:23,179 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 13:16:23,179 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 13:16:23,179 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 13:16:23,179 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 13:16:23,180 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 13:16:23,180 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 13:16:23,205 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states. [2018-11-23 13:16:23,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 13:16:23,212 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:23,213 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:23,218 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:23,224 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:23,224 INFO L82 PathProgramCache]: Analyzing trace with hash -84144223, now seen corresponding path program 1 times [2018-11-23 13:16:23,226 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:23,227 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:23,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:23,276 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:23,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:23,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:23,405 INFO L256 TraceCheckUtils]: 0: Hoare triple {29#true} call ULTIMATE.init(); {29#true} is VALID [2018-11-23 13:16:23,408 INFO L273 TraceCheckUtils]: 1: Hoare triple {29#true} assume true; {29#true} is VALID [2018-11-23 13:16:23,409 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {29#true} {29#true} #81#return; {29#true} is VALID [2018-11-23 13:16:23,409 INFO L256 TraceCheckUtils]: 3: Hoare triple {29#true} call #t~ret5 := main(); {29#true} is VALID [2018-11-23 13:16:23,409 INFO L273 TraceCheckUtils]: 4: Hoare triple {29#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {29#true} is VALID [2018-11-23 13:16:23,410 INFO L273 TraceCheckUtils]: 5: Hoare triple {29#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {29#true} is VALID [2018-11-23 13:16:23,410 INFO L273 TraceCheckUtils]: 6: Hoare triple {29#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {29#true} is VALID [2018-11-23 13:16:23,411 INFO L273 TraceCheckUtils]: 7: Hoare triple {29#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {29#true} is VALID [2018-11-23 13:16:23,411 INFO L273 TraceCheckUtils]: 8: Hoare triple {29#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {29#true} is VALID [2018-11-23 13:16:23,418 INFO L273 TraceCheckUtils]: 9: Hoare triple {29#true} assume !true; {30#false} is VALID [2018-11-23 13:16:23,418 INFO L256 TraceCheckUtils]: 10: Hoare triple {30#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {30#false} is VALID [2018-11-23 13:16:23,419 INFO L273 TraceCheckUtils]: 11: Hoare triple {30#false} ~cond := #in~cond; {30#false} is VALID [2018-11-23 13:16:23,419 INFO L273 TraceCheckUtils]: 12: Hoare triple {30#false} assume 0 == ~cond; {30#false} is VALID [2018-11-23 13:16:23,419 INFO L273 TraceCheckUtils]: 13: Hoare triple {30#false} assume !false; {30#false} is VALID [2018-11-23 13:16:23,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:23,424 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:16:23,424 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 13:16:23,429 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 13:16:23,432 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:23,436 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 13:16:23,497 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:23,497 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 13:16:23,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 13:16:23,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 13:16:23,508 INFO L87 Difference]: Start difference. First operand 26 states. Second operand 2 states. [2018-11-23 13:16:23,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:23,691 INFO L93 Difference]: Finished difference Result 47 states and 68 transitions. [2018-11-23 13:16:23,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 13:16:23,692 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-23 13:16:23,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:23,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 13:16:23,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 68 transitions. [2018-11-23 13:16:23,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 13:16:23,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 68 transitions. [2018-11-23 13:16:23,722 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 68 transitions. [2018-11-23 13:16:23,995 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:24,012 INFO L225 Difference]: With dead ends: 47 [2018-11-23 13:16:24,012 INFO L226 Difference]: Without dead ends: 22 [2018-11-23 13:16:24,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 13:16:24,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-11-23 13:16:24,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-11-23 13:16:24,112 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:24,112 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand 22 states. [2018-11-23 13:16:24,113 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-23 13:16:24,113 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-23 13:16:24,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:24,118 INFO L93 Difference]: Finished difference Result 22 states and 26 transitions. [2018-11-23 13:16:24,118 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2018-11-23 13:16:24,118 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:24,119 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:24,119 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-23 13:16:24,119 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-23 13:16:24,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:24,122 INFO L93 Difference]: Finished difference Result 22 states and 26 transitions. [2018-11-23 13:16:24,123 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2018-11-23 13:16:24,123 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:24,123 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:24,124 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:24,124 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:24,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-23 13:16:24,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2018-11-23 13:16:24,128 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 14 [2018-11-23 13:16:24,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:24,129 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2018-11-23 13:16:24,129 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 13:16:24,129 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2018-11-23 13:16:24,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 13:16:24,130 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:24,130 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:24,130 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:24,131 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:24,131 INFO L82 PathProgramCache]: Analyzing trace with hash -89685349, now seen corresponding path program 1 times [2018-11-23 13:16:24,131 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:24,131 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:24,132 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:24,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:24,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:24,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:24,290 INFO L256 TraceCheckUtils]: 0: Hoare triple {175#true} call ULTIMATE.init(); {175#true} is VALID [2018-11-23 13:16:24,290 INFO L273 TraceCheckUtils]: 1: Hoare triple {175#true} assume true; {175#true} is VALID [2018-11-23 13:16:24,291 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {175#true} {175#true} #81#return; {175#true} is VALID [2018-11-23 13:16:24,291 INFO L256 TraceCheckUtils]: 3: Hoare triple {175#true} call #t~ret5 := main(); {175#true} is VALID [2018-11-23 13:16:24,291 INFO L273 TraceCheckUtils]: 4: Hoare triple {175#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {175#true} is VALID [2018-11-23 13:16:24,292 INFO L273 TraceCheckUtils]: 5: Hoare triple {175#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {175#true} is VALID [2018-11-23 13:16:24,292 INFO L273 TraceCheckUtils]: 6: Hoare triple {175#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {175#true} is VALID [2018-11-23 13:16:24,295 INFO L273 TraceCheckUtils]: 7: Hoare triple {175#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {175#true} is VALID [2018-11-23 13:16:24,304 INFO L273 TraceCheckUtils]: 8: Hoare triple {175#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {177#(and (<= main_~v~0 0) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:24,315 INFO L273 TraceCheckUtils]: 9: Hoare triple {177#(and (<= main_~v~0 0) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {176#false} is VALID [2018-11-23 13:16:24,315 INFO L256 TraceCheckUtils]: 10: Hoare triple {176#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {176#false} is VALID [2018-11-23 13:16:24,316 INFO L273 TraceCheckUtils]: 11: Hoare triple {176#false} ~cond := #in~cond; {176#false} is VALID [2018-11-23 13:16:24,316 INFO L273 TraceCheckUtils]: 12: Hoare triple {176#false} assume 0 == ~cond; {176#false} is VALID [2018-11-23 13:16:24,316 INFO L273 TraceCheckUtils]: 13: Hoare triple {176#false} assume !false; {176#false} is VALID [2018-11-23 13:16:24,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:24,318 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:16:24,319 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 13:16:24,320 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 13:16:24,321 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:24,321 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 13:16:24,408 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:24,408 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 13:16:24,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 13:16:24,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:16:24,409 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 3 states. [2018-11-23 13:16:24,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:24,662 INFO L93 Difference]: Finished difference Result 48 states and 60 transitions. [2018-11-23 13:16:24,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 13:16:24,662 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-23 13:16:24,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:24,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 13:16:24,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2018-11-23 13:16:24,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 13:16:24,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2018-11-23 13:16:24,680 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 60 transitions. [2018-11-23 13:16:25,022 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:25,025 INFO L225 Difference]: With dead ends: 48 [2018-11-23 13:16:25,025 INFO L226 Difference]: Without dead ends: 31 [2018-11-23 13:16:25,026 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:16:25,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-11-23 13:16:25,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 23. [2018-11-23 13:16:25,084 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:25,084 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand 23 states. [2018-11-23 13:16:25,085 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 23 states. [2018-11-23 13:16:25,085 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 23 states. [2018-11-23 13:16:25,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:25,088 INFO L93 Difference]: Finished difference Result 31 states and 38 transitions. [2018-11-23 13:16:25,088 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 38 transitions. [2018-11-23 13:16:25,089 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:25,089 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:25,089 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand 31 states. [2018-11-23 13:16:25,089 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 31 states. [2018-11-23 13:16:25,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:25,092 INFO L93 Difference]: Finished difference Result 31 states and 38 transitions. [2018-11-23 13:16:25,093 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 38 transitions. [2018-11-23 13:16:25,093 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:25,093 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:25,094 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:25,094 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:25,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-23 13:16:25,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2018-11-23 13:16:25,096 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 27 transitions. Word has length 14 [2018-11-23 13:16:25,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:25,097 INFO L480 AbstractCegarLoop]: Abstraction has 23 states and 27 transitions. [2018-11-23 13:16:25,097 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 13:16:25,097 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2018-11-23 13:16:25,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 13:16:25,098 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:25,098 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:25,098 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:25,098 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:25,099 INFO L82 PathProgramCache]: Analyzing trace with hash 374245081, now seen corresponding path program 1 times [2018-11-23 13:16:25,099 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:25,099 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:25,100 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:25,100 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:25,100 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:25,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:25,295 INFO L256 TraceCheckUtils]: 0: Hoare triple {348#true} call ULTIMATE.init(); {348#true} is VALID [2018-11-23 13:16:25,295 INFO L273 TraceCheckUtils]: 1: Hoare triple {348#true} assume true; {348#true} is VALID [2018-11-23 13:16:25,296 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {348#true} {348#true} #81#return; {348#true} is VALID [2018-11-23 13:16:25,296 INFO L256 TraceCheckUtils]: 3: Hoare triple {348#true} call #t~ret5 := main(); {348#true} is VALID [2018-11-23 13:16:25,296 INFO L273 TraceCheckUtils]: 4: Hoare triple {348#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,297 INFO L273 TraceCheckUtils]: 5: Hoare triple {348#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,297 INFO L273 TraceCheckUtils]: 6: Hoare triple {348#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,297 INFO L273 TraceCheckUtils]: 7: Hoare triple {348#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,298 INFO L273 TraceCheckUtils]: 8: Hoare triple {348#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:25,302 INFO L273 TraceCheckUtils]: 9: Hoare triple {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:25,303 INFO L273 TraceCheckUtils]: 10: Hoare triple {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {351#(and (<= main_~v~0 1) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:25,303 INFO L273 TraceCheckUtils]: 11: Hoare triple {351#(and (<= main_~v~0 1) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {349#false} is VALID [2018-11-23 13:16:25,304 INFO L256 TraceCheckUtils]: 12: Hoare triple {349#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {349#false} is VALID [2018-11-23 13:16:25,304 INFO L273 TraceCheckUtils]: 13: Hoare triple {349#false} ~cond := #in~cond; {349#false} is VALID [2018-11-23 13:16:25,304 INFO L273 TraceCheckUtils]: 14: Hoare triple {349#false} assume 0 == ~cond; {349#false} is VALID [2018-11-23 13:16:25,304 INFO L273 TraceCheckUtils]: 15: Hoare triple {349#false} assume !false; {349#false} is VALID [2018-11-23 13:16:25,306 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:25,307 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:25,307 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:25,323 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:25,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:25,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:25,350 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:25,515 INFO L256 TraceCheckUtils]: 0: Hoare triple {348#true} call ULTIMATE.init(); {348#true} is VALID [2018-11-23 13:16:25,515 INFO L273 TraceCheckUtils]: 1: Hoare triple {348#true} assume true; {348#true} is VALID [2018-11-23 13:16:25,516 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {348#true} {348#true} #81#return; {348#true} is VALID [2018-11-23 13:16:25,516 INFO L256 TraceCheckUtils]: 3: Hoare triple {348#true} call #t~ret5 := main(); {348#true} is VALID [2018-11-23 13:16:25,517 INFO L273 TraceCheckUtils]: 4: Hoare triple {348#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,517 INFO L273 TraceCheckUtils]: 5: Hoare triple {348#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,518 INFO L273 TraceCheckUtils]: 6: Hoare triple {348#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,518 INFO L273 TraceCheckUtils]: 7: Hoare triple {348#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {348#true} is VALID [2018-11-23 13:16:25,522 INFO L273 TraceCheckUtils]: 8: Hoare triple {348#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:25,524 INFO L273 TraceCheckUtils]: 9: Hoare triple {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:25,525 INFO L273 TraceCheckUtils]: 10: Hoare triple {350#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {385#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:25,525 INFO L273 TraceCheckUtils]: 11: Hoare triple {385#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {349#false} is VALID [2018-11-23 13:16:25,526 INFO L256 TraceCheckUtils]: 12: Hoare triple {349#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {349#false} is VALID [2018-11-23 13:16:25,526 INFO L273 TraceCheckUtils]: 13: Hoare triple {349#false} ~cond := #in~cond; {349#false} is VALID [2018-11-23 13:16:25,526 INFO L273 TraceCheckUtils]: 14: Hoare triple {349#false} assume 0 == ~cond; {349#false} is VALID [2018-11-23 13:16:25,526 INFO L273 TraceCheckUtils]: 15: Hoare triple {349#false} assume !false; {349#false} is VALID [2018-11-23 13:16:25,528 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:25,548 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:25,548 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-23 13:16:25,549 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 13:16:25,551 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:25,551 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 13:16:25,581 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:25,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:16:25,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:16:25,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:16:25,582 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. Second operand 5 states. [2018-11-23 13:16:25,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:25,925 INFO L93 Difference]: Finished difference Result 51 states and 63 transitions. [2018-11-23 13:16:25,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 13:16:25,925 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-23 13:16:25,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:25,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 13:16:25,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 62 transitions. [2018-11-23 13:16:25,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 13:16:25,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 62 transitions. [2018-11-23 13:16:25,932 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 62 transitions. [2018-11-23 13:16:26,110 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:26,113 INFO L225 Difference]: With dead ends: 51 [2018-11-23 13:16:26,113 INFO L226 Difference]: Without dead ends: 33 [2018-11-23 13:16:26,114 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:16:26,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-11-23 13:16:26,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 25. [2018-11-23 13:16:26,136 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:26,137 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand 25 states. [2018-11-23 13:16:26,137 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 25 states. [2018-11-23 13:16:26,137 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 25 states. [2018-11-23 13:16:26,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:26,140 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2018-11-23 13:16:26,140 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2018-11-23 13:16:26,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:26,141 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:26,142 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand 33 states. [2018-11-23 13:16:26,142 INFO L87 Difference]: Start difference. First operand 25 states. Second operand 33 states. [2018-11-23 13:16:26,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:26,145 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2018-11-23 13:16:26,145 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2018-11-23 13:16:26,146 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:26,146 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:26,146 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:26,146 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:26,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-23 13:16:26,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2018-11-23 13:16:26,148 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 16 [2018-11-23 13:16:26,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:26,149 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2018-11-23 13:16:26,149 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:16:26,149 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2018-11-23 13:16:26,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-23 13:16:26,150 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:26,150 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:26,150 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:26,151 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:26,151 INFO L82 PathProgramCache]: Analyzing trace with hash -465210473, now seen corresponding path program 2 times [2018-11-23 13:16:26,151 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:26,151 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:26,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:26,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:26,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:26,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:26,335 INFO L256 TraceCheckUtils]: 0: Hoare triple {580#true} call ULTIMATE.init(); {580#true} is VALID [2018-11-23 13:16:26,335 INFO L273 TraceCheckUtils]: 1: Hoare triple {580#true} assume true; {580#true} is VALID [2018-11-23 13:16:26,335 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {580#true} {580#true} #81#return; {580#true} is VALID [2018-11-23 13:16:26,336 INFO L256 TraceCheckUtils]: 3: Hoare triple {580#true} call #t~ret5 := main(); {580#true} is VALID [2018-11-23 13:16:26,336 INFO L273 TraceCheckUtils]: 4: Hoare triple {580#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,337 INFO L273 TraceCheckUtils]: 5: Hoare triple {580#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,337 INFO L273 TraceCheckUtils]: 6: Hoare triple {580#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,338 INFO L273 TraceCheckUtils]: 7: Hoare triple {580#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,339 INFO L273 TraceCheckUtils]: 8: Hoare triple {580#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:26,360 INFO L273 TraceCheckUtils]: 9: Hoare triple {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:26,374 INFO L273 TraceCheckUtils]: 10: Hoare triple {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:26,379 INFO L273 TraceCheckUtils]: 11: Hoare triple {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:26,380 INFO L273 TraceCheckUtils]: 12: Hoare triple {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {584#(and (<= main_~v~0 2) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:26,380 INFO L273 TraceCheckUtils]: 13: Hoare triple {584#(and (<= main_~v~0 2) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {581#false} is VALID [2018-11-23 13:16:26,381 INFO L256 TraceCheckUtils]: 14: Hoare triple {581#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {581#false} is VALID [2018-11-23 13:16:26,381 INFO L273 TraceCheckUtils]: 15: Hoare triple {581#false} ~cond := #in~cond; {581#false} is VALID [2018-11-23 13:16:26,381 INFO L273 TraceCheckUtils]: 16: Hoare triple {581#false} assume 0 == ~cond; {581#false} is VALID [2018-11-23 13:16:26,381 INFO L273 TraceCheckUtils]: 17: Hoare triple {581#false} assume !false; {581#false} is VALID [2018-11-23 13:16:26,382 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:26,383 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:26,383 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:26,393 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:16:26,410 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:16:26,410 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:16:26,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:26,419 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:26,508 INFO L256 TraceCheckUtils]: 0: Hoare triple {580#true} call ULTIMATE.init(); {580#true} is VALID [2018-11-23 13:16:26,509 INFO L273 TraceCheckUtils]: 1: Hoare triple {580#true} assume true; {580#true} is VALID [2018-11-23 13:16:26,509 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {580#true} {580#true} #81#return; {580#true} is VALID [2018-11-23 13:16:26,509 INFO L256 TraceCheckUtils]: 3: Hoare triple {580#true} call #t~ret5 := main(); {580#true} is VALID [2018-11-23 13:16:26,509 INFO L273 TraceCheckUtils]: 4: Hoare triple {580#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,509 INFO L273 TraceCheckUtils]: 5: Hoare triple {580#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,510 INFO L273 TraceCheckUtils]: 6: Hoare triple {580#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,510 INFO L273 TraceCheckUtils]: 7: Hoare triple {580#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {580#true} is VALID [2018-11-23 13:16:26,528 INFO L273 TraceCheckUtils]: 8: Hoare triple {580#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:26,537 INFO L273 TraceCheckUtils]: 9: Hoare triple {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:26,550 INFO L273 TraceCheckUtils]: 10: Hoare triple {582#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:26,559 INFO L273 TraceCheckUtils]: 11: Hoare triple {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:26,574 INFO L273 TraceCheckUtils]: 12: Hoare triple {583#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {624#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:26,583 INFO L273 TraceCheckUtils]: 13: Hoare triple {624#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {581#false} is VALID [2018-11-23 13:16:26,583 INFO L256 TraceCheckUtils]: 14: Hoare triple {581#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {581#false} is VALID [2018-11-23 13:16:26,583 INFO L273 TraceCheckUtils]: 15: Hoare triple {581#false} ~cond := #in~cond; {581#false} is VALID [2018-11-23 13:16:26,584 INFO L273 TraceCheckUtils]: 16: Hoare triple {581#false} assume 0 == ~cond; {581#false} is VALID [2018-11-23 13:16:26,584 INFO L273 TraceCheckUtils]: 17: Hoare triple {581#false} assume !false; {581#false} is VALID [2018-11-23 13:16:26,585 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:26,607 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:26,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-11-23 13:16:26,607 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-11-23 13:16:26,608 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:26,608 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 13:16:26,651 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:26,651 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:16:26,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:16:26,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:16:26,652 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 6 states. [2018-11-23 13:16:26,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:26,977 INFO L93 Difference]: Finished difference Result 55 states and 67 transitions. [2018-11-23 13:16:26,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 13:16:26,977 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-11-23 13:16:26,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:26,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 13:16:26,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 64 transitions. [2018-11-23 13:16:26,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 13:16:26,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 64 transitions. [2018-11-23 13:16:26,983 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 64 transitions. [2018-11-23 13:16:27,059 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:27,062 INFO L225 Difference]: With dead ends: 55 [2018-11-23 13:16:27,062 INFO L226 Difference]: Without dead ends: 35 [2018-11-23 13:16:27,063 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 17 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:16:27,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-23 13:16:27,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 27. [2018-11-23 13:16:27,079 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:27,079 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 27 states. [2018-11-23 13:16:27,079 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 27 states. [2018-11-23 13:16:27,079 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 27 states. [2018-11-23 13:16:27,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:27,082 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2018-11-23 13:16:27,082 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2018-11-23 13:16:27,082 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:27,083 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:27,083 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 35 states. [2018-11-23 13:16:27,083 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 35 states. [2018-11-23 13:16:27,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:27,086 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2018-11-23 13:16:27,086 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2018-11-23 13:16:27,087 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:27,087 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:27,087 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:27,087 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:27,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 13:16:27,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2018-11-23 13:16:27,089 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 31 transitions. Word has length 18 [2018-11-23 13:16:27,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:27,090 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 31 transitions. [2018-11-23 13:16:27,090 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:16:27,090 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 31 transitions. [2018-11-23 13:16:27,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 13:16:27,091 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:27,091 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:27,091 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:27,091 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:27,092 INFO L82 PathProgramCache]: Analyzing trace with hash 271853781, now seen corresponding path program 3 times [2018-11-23 13:16:27,092 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:27,092 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:27,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:27,093 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:16:27,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:27,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:27,640 INFO L256 TraceCheckUtils]: 0: Hoare triple {832#true} call ULTIMATE.init(); {832#true} is VALID [2018-11-23 13:16:27,640 INFO L273 TraceCheckUtils]: 1: Hoare triple {832#true} assume true; {832#true} is VALID [2018-11-23 13:16:27,641 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {832#true} {832#true} #81#return; {832#true} is VALID [2018-11-23 13:16:27,641 INFO L256 TraceCheckUtils]: 3: Hoare triple {832#true} call #t~ret5 := main(); {832#true} is VALID [2018-11-23 13:16:27,641 INFO L273 TraceCheckUtils]: 4: Hoare triple {832#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {832#true} is VALID [2018-11-23 13:16:27,641 INFO L273 TraceCheckUtils]: 5: Hoare triple {832#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {832#true} is VALID [2018-11-23 13:16:27,642 INFO L273 TraceCheckUtils]: 6: Hoare triple {832#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {832#true} is VALID [2018-11-23 13:16:27,642 INFO L273 TraceCheckUtils]: 7: Hoare triple {832#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {832#true} is VALID [2018-11-23 13:16:27,642 INFO L273 TraceCheckUtils]: 8: Hoare triple {832#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:27,647 INFO L273 TraceCheckUtils]: 9: Hoare triple {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:27,648 INFO L273 TraceCheckUtils]: 10: Hoare triple {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:27,649 INFO L273 TraceCheckUtils]: 11: Hoare triple {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:27,649 INFO L273 TraceCheckUtils]: 12: Hoare triple {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:27,650 INFO L273 TraceCheckUtils]: 13: Hoare triple {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:27,653 INFO L273 TraceCheckUtils]: 14: Hoare triple {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {837#(and (<= main_~v~0 3) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:27,654 INFO L273 TraceCheckUtils]: 15: Hoare triple {837#(and (<= main_~v~0 3) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {833#false} is VALID [2018-11-23 13:16:27,655 INFO L256 TraceCheckUtils]: 16: Hoare triple {833#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {833#false} is VALID [2018-11-23 13:16:27,655 INFO L273 TraceCheckUtils]: 17: Hoare triple {833#false} ~cond := #in~cond; {833#false} is VALID [2018-11-23 13:16:27,655 INFO L273 TraceCheckUtils]: 18: Hoare triple {833#false} assume 0 == ~cond; {833#false} is VALID [2018-11-23 13:16:27,656 INFO L273 TraceCheckUtils]: 19: Hoare triple {833#false} assume !false; {833#false} is VALID [2018-11-23 13:16:27,657 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:27,657 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:27,657 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:27,666 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 13:16:39,702 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 13:16:39,702 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:16:39,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:39,711 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:39,795 INFO L256 TraceCheckUtils]: 0: Hoare triple {832#true} call ULTIMATE.init(); {832#true} is VALID [2018-11-23 13:16:39,796 INFO L273 TraceCheckUtils]: 1: Hoare triple {832#true} assume true; {832#true} is VALID [2018-11-23 13:16:39,796 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {832#true} {832#true} #81#return; {832#true} is VALID [2018-11-23 13:16:39,796 INFO L256 TraceCheckUtils]: 3: Hoare triple {832#true} call #t~ret5 := main(); {832#true} is VALID [2018-11-23 13:16:39,796 INFO L273 TraceCheckUtils]: 4: Hoare triple {832#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {832#true} is VALID [2018-11-23 13:16:39,797 INFO L273 TraceCheckUtils]: 5: Hoare triple {832#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {832#true} is VALID [2018-11-23 13:16:39,797 INFO L273 TraceCheckUtils]: 6: Hoare triple {832#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {832#true} is VALID [2018-11-23 13:16:39,797 INFO L273 TraceCheckUtils]: 7: Hoare triple {832#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {832#true} is VALID [2018-11-23 13:16:39,812 INFO L273 TraceCheckUtils]: 8: Hoare triple {832#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:39,813 INFO L273 TraceCheckUtils]: 9: Hoare triple {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:39,817 INFO L273 TraceCheckUtils]: 10: Hoare triple {834#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:39,817 INFO L273 TraceCheckUtils]: 11: Hoare triple {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:39,821 INFO L273 TraceCheckUtils]: 12: Hoare triple {835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:39,821 INFO L273 TraceCheckUtils]: 13: Hoare triple {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:39,822 INFO L273 TraceCheckUtils]: 14: Hoare triple {836#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {883#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:39,823 INFO L273 TraceCheckUtils]: 15: Hoare triple {883#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {833#false} is VALID [2018-11-23 13:16:39,823 INFO L256 TraceCheckUtils]: 16: Hoare triple {833#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {833#false} is VALID [2018-11-23 13:16:39,824 INFO L273 TraceCheckUtils]: 17: Hoare triple {833#false} ~cond := #in~cond; {833#false} is VALID [2018-11-23 13:16:39,824 INFO L273 TraceCheckUtils]: 18: Hoare triple {833#false} assume 0 == ~cond; {833#false} is VALID [2018-11-23 13:16:39,824 INFO L273 TraceCheckUtils]: 19: Hoare triple {833#false} assume !false; {833#false} is VALID [2018-11-23 13:16:39,825 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:39,846 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:39,847 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-11-23 13:16:39,847 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-11-23 13:16:39,847 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:39,847 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-23 13:16:39,936 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:39,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 13:16:39,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 13:16:39,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:16:39,937 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. Second operand 7 states. [2018-11-23 13:16:40,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:40,334 INFO L93 Difference]: Finished difference Result 59 states and 71 transitions. [2018-11-23 13:16:40,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 13:16:40,335 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-11-23 13:16:40,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:40,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 13:16:40,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 66 transitions. [2018-11-23 13:16:40,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 13:16:40,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 66 transitions. [2018-11-23 13:16:40,339 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 66 transitions. [2018-11-23 13:16:40,407 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:40,409 INFO L225 Difference]: With dead ends: 59 [2018-11-23 13:16:40,409 INFO L226 Difference]: Without dead ends: 37 [2018-11-23 13:16:40,410 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 19 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:16:40,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-11-23 13:16:40,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 29. [2018-11-23 13:16:40,588 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:40,588 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand 29 states. [2018-11-23 13:16:40,588 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 29 states. [2018-11-23 13:16:40,589 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 29 states. [2018-11-23 13:16:40,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:40,591 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2018-11-23 13:16:40,591 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 44 transitions. [2018-11-23 13:16:40,591 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:40,592 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:40,592 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 37 states. [2018-11-23 13:16:40,592 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 37 states. [2018-11-23 13:16:40,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:40,594 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2018-11-23 13:16:40,594 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 44 transitions. [2018-11-23 13:16:40,595 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:40,595 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:40,595 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:40,596 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:40,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-23 13:16:40,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2018-11-23 13:16:40,597 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 20 [2018-11-23 13:16:40,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:40,598 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2018-11-23 13:16:40,598 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 13:16:40,598 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2018-11-23 13:16:40,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 13:16:40,599 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:40,599 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:40,599 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:40,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:40,600 INFO L82 PathProgramCache]: Analyzing trace with hash -79001965, now seen corresponding path program 4 times [2018-11-23 13:16:40,600 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:40,600 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:40,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:40,601 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:16:40,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:40,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:40,857 INFO L256 TraceCheckUtils]: 0: Hoare triple {1104#true} call ULTIMATE.init(); {1104#true} is VALID [2018-11-23 13:16:40,857 INFO L273 TraceCheckUtils]: 1: Hoare triple {1104#true} assume true; {1104#true} is VALID [2018-11-23 13:16:40,858 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1104#true} {1104#true} #81#return; {1104#true} is VALID [2018-11-23 13:16:40,858 INFO L256 TraceCheckUtils]: 3: Hoare triple {1104#true} call #t~ret5 := main(); {1104#true} is VALID [2018-11-23 13:16:40,858 INFO L273 TraceCheckUtils]: 4: Hoare triple {1104#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {1104#true} is VALID [2018-11-23 13:16:40,858 INFO L273 TraceCheckUtils]: 5: Hoare triple {1104#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {1104#true} is VALID [2018-11-23 13:16:40,859 INFO L273 TraceCheckUtils]: 6: Hoare triple {1104#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {1104#true} is VALID [2018-11-23 13:16:40,859 INFO L273 TraceCheckUtils]: 7: Hoare triple {1104#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {1104#true} is VALID [2018-11-23 13:16:40,859 INFO L273 TraceCheckUtils]: 8: Hoare triple {1104#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:40,860 INFO L273 TraceCheckUtils]: 9: Hoare triple {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:40,861 INFO L273 TraceCheckUtils]: 10: Hoare triple {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:40,863 INFO L273 TraceCheckUtils]: 11: Hoare triple {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:40,863 INFO L273 TraceCheckUtils]: 12: Hoare triple {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:40,864 INFO L273 TraceCheckUtils]: 13: Hoare triple {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:40,865 INFO L273 TraceCheckUtils]: 14: Hoare triple {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:40,866 INFO L273 TraceCheckUtils]: 15: Hoare triple {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:40,867 INFO L273 TraceCheckUtils]: 16: Hoare triple {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1110#(and (<= main_~v~0 4) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:40,868 INFO L273 TraceCheckUtils]: 17: Hoare triple {1110#(and (<= main_~v~0 4) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {1105#false} is VALID [2018-11-23 13:16:40,868 INFO L256 TraceCheckUtils]: 18: Hoare triple {1105#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {1105#false} is VALID [2018-11-23 13:16:40,869 INFO L273 TraceCheckUtils]: 19: Hoare triple {1105#false} ~cond := #in~cond; {1105#false} is VALID [2018-11-23 13:16:40,869 INFO L273 TraceCheckUtils]: 20: Hoare triple {1105#false} assume 0 == ~cond; {1105#false} is VALID [2018-11-23 13:16:40,869 INFO L273 TraceCheckUtils]: 21: Hoare triple {1105#false} assume !false; {1105#false} is VALID [2018-11-23 13:16:40,871 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:40,872 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:40,872 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:40,890 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 13:16:40,899 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 13:16:40,900 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:16:40,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:40,922 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:41,079 INFO L256 TraceCheckUtils]: 0: Hoare triple {1104#true} call ULTIMATE.init(); {1104#true} is VALID [2018-11-23 13:16:41,080 INFO L273 TraceCheckUtils]: 1: Hoare triple {1104#true} assume true; {1104#true} is VALID [2018-11-23 13:16:41,080 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1104#true} {1104#true} #81#return; {1104#true} is VALID [2018-11-23 13:16:41,081 INFO L256 TraceCheckUtils]: 3: Hoare triple {1104#true} call #t~ret5 := main(); {1104#true} is VALID [2018-11-23 13:16:41,081 INFO L273 TraceCheckUtils]: 4: Hoare triple {1104#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {1104#true} is VALID [2018-11-23 13:16:41,081 INFO L273 TraceCheckUtils]: 5: Hoare triple {1104#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {1104#true} is VALID [2018-11-23 13:16:41,082 INFO L273 TraceCheckUtils]: 6: Hoare triple {1104#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {1104#true} is VALID [2018-11-23 13:16:41,082 INFO L273 TraceCheckUtils]: 7: Hoare triple {1104#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {1104#true} is VALID [2018-11-23 13:16:41,083 INFO L273 TraceCheckUtils]: 8: Hoare triple {1104#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:41,083 INFO L273 TraceCheckUtils]: 9: Hoare triple {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:41,084 INFO L273 TraceCheckUtils]: 10: Hoare triple {1106#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:41,084 INFO L273 TraceCheckUtils]: 11: Hoare triple {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:41,085 INFO L273 TraceCheckUtils]: 12: Hoare triple {1107#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:41,086 INFO L273 TraceCheckUtils]: 13: Hoare triple {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:41,087 INFO L273 TraceCheckUtils]: 14: Hoare triple {1108#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:41,088 INFO L273 TraceCheckUtils]: 15: Hoare triple {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:41,089 INFO L273 TraceCheckUtils]: 16: Hoare triple {1109#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:41,090 INFO L273 TraceCheckUtils]: 17: Hoare triple {1162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {1105#false} is VALID [2018-11-23 13:16:41,091 INFO L256 TraceCheckUtils]: 18: Hoare triple {1105#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {1105#false} is VALID [2018-11-23 13:16:41,091 INFO L273 TraceCheckUtils]: 19: Hoare triple {1105#false} ~cond := #in~cond; {1105#false} is VALID [2018-11-23 13:16:41,091 INFO L273 TraceCheckUtils]: 20: Hoare triple {1105#false} assume 0 == ~cond; {1105#false} is VALID [2018-11-23 13:16:41,092 INFO L273 TraceCheckUtils]: 21: Hoare triple {1105#false} assume !false; {1105#false} is VALID [2018-11-23 13:16:41,093 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:41,111 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:41,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-11-23 13:16:41,112 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 22 [2018-11-23 13:16:41,112 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:41,112 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 13:16:41,148 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:41,148 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 13:16:41,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 13:16:41,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-23 13:16:41,149 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 8 states. [2018-11-23 13:16:41,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:41,482 INFO L93 Difference]: Finished difference Result 63 states and 75 transitions. [2018-11-23 13:16:41,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:16:41,482 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 22 [2018-11-23 13:16:41,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:41,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 13:16:41,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 68 transitions. [2018-11-23 13:16:41,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 13:16:41,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 68 transitions. [2018-11-23 13:16:41,487 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 68 transitions. [2018-11-23 13:16:41,600 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:41,601 INFO L225 Difference]: With dead ends: 63 [2018-11-23 13:16:41,601 INFO L226 Difference]: Without dead ends: 39 [2018-11-23 13:16:41,602 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 21 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-23 13:16:41,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-23 13:16:41,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 31. [2018-11-23 13:16:41,657 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:41,657 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 31 states. [2018-11-23 13:16:41,657 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 31 states. [2018-11-23 13:16:41,657 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 31 states. [2018-11-23 13:16:41,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:41,660 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-23 13:16:41,660 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-23 13:16:41,660 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:41,661 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:41,661 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 39 states. [2018-11-23 13:16:41,661 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 39 states. [2018-11-23 13:16:41,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:41,663 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-23 13:16:41,663 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-23 13:16:41,664 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:41,664 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:41,664 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:41,664 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:41,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 13:16:41,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 35 transitions. [2018-11-23 13:16:41,666 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 35 transitions. Word has length 22 [2018-11-23 13:16:41,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:41,666 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 35 transitions. [2018-11-23 13:16:41,667 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 13:16:41,667 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 35 transitions. [2018-11-23 13:16:41,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 13:16:41,668 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:41,668 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:41,668 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:41,668 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:41,668 INFO L82 PathProgramCache]: Analyzing trace with hash 2051042513, now seen corresponding path program 5 times [2018-11-23 13:16:41,669 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:41,669 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:41,670 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:41,670 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:16:41,670 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:41,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:42,153 INFO L256 TraceCheckUtils]: 0: Hoare triple {1396#true} call ULTIMATE.init(); {1396#true} is VALID [2018-11-23 13:16:42,154 INFO L273 TraceCheckUtils]: 1: Hoare triple {1396#true} assume true; {1396#true} is VALID [2018-11-23 13:16:42,154 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1396#true} {1396#true} #81#return; {1396#true} is VALID [2018-11-23 13:16:42,154 INFO L256 TraceCheckUtils]: 3: Hoare triple {1396#true} call #t~ret5 := main(); {1396#true} is VALID [2018-11-23 13:16:42,154 INFO L273 TraceCheckUtils]: 4: Hoare triple {1396#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,155 INFO L273 TraceCheckUtils]: 5: Hoare triple {1396#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,155 INFO L273 TraceCheckUtils]: 6: Hoare triple {1396#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,155 INFO L273 TraceCheckUtils]: 7: Hoare triple {1396#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,156 INFO L273 TraceCheckUtils]: 8: Hoare triple {1396#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:42,172 INFO L273 TraceCheckUtils]: 9: Hoare triple {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:42,173 INFO L273 TraceCheckUtils]: 10: Hoare triple {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:42,174 INFO L273 TraceCheckUtils]: 11: Hoare triple {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:42,177 INFO L273 TraceCheckUtils]: 12: Hoare triple {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:42,178 INFO L273 TraceCheckUtils]: 13: Hoare triple {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:42,179 INFO L273 TraceCheckUtils]: 14: Hoare triple {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:42,179 INFO L273 TraceCheckUtils]: 15: Hoare triple {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:42,180 INFO L273 TraceCheckUtils]: 16: Hoare triple {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:42,181 INFO L273 TraceCheckUtils]: 17: Hoare triple {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:42,182 INFO L273 TraceCheckUtils]: 18: Hoare triple {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1403#(and (<= main_~v~0 5) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:42,183 INFO L273 TraceCheckUtils]: 19: Hoare triple {1403#(and (<= main_~v~0 5) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {1397#false} is VALID [2018-11-23 13:16:42,183 INFO L256 TraceCheckUtils]: 20: Hoare triple {1397#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {1397#false} is VALID [2018-11-23 13:16:42,184 INFO L273 TraceCheckUtils]: 21: Hoare triple {1397#false} ~cond := #in~cond; {1397#false} is VALID [2018-11-23 13:16:42,184 INFO L273 TraceCheckUtils]: 22: Hoare triple {1397#false} assume 0 == ~cond; {1397#false} is VALID [2018-11-23 13:16:42,184 INFO L273 TraceCheckUtils]: 23: Hoare triple {1397#false} assume !false; {1397#false} is VALID [2018-11-23 13:16:42,187 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:42,187 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:42,187 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:42,201 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 13:16:42,222 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-11-23 13:16:42,223 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:16:42,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:42,232 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:42,332 INFO L256 TraceCheckUtils]: 0: Hoare triple {1396#true} call ULTIMATE.init(); {1396#true} is VALID [2018-11-23 13:16:42,333 INFO L273 TraceCheckUtils]: 1: Hoare triple {1396#true} assume true; {1396#true} is VALID [2018-11-23 13:16:42,333 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1396#true} {1396#true} #81#return; {1396#true} is VALID [2018-11-23 13:16:42,333 INFO L256 TraceCheckUtils]: 3: Hoare triple {1396#true} call #t~ret5 := main(); {1396#true} is VALID [2018-11-23 13:16:42,333 INFO L273 TraceCheckUtils]: 4: Hoare triple {1396#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,333 INFO L273 TraceCheckUtils]: 5: Hoare triple {1396#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,334 INFO L273 TraceCheckUtils]: 6: Hoare triple {1396#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,334 INFO L273 TraceCheckUtils]: 7: Hoare triple {1396#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {1396#true} is VALID [2018-11-23 13:16:42,342 INFO L273 TraceCheckUtils]: 8: Hoare triple {1396#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:42,344 INFO L273 TraceCheckUtils]: 9: Hoare triple {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:42,344 INFO L273 TraceCheckUtils]: 10: Hoare triple {1398#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:42,345 INFO L273 TraceCheckUtils]: 11: Hoare triple {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:42,346 INFO L273 TraceCheckUtils]: 12: Hoare triple {1399#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:42,346 INFO L273 TraceCheckUtils]: 13: Hoare triple {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:42,347 INFO L273 TraceCheckUtils]: 14: Hoare triple {1400#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:42,350 INFO L273 TraceCheckUtils]: 15: Hoare triple {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:42,351 INFO L273 TraceCheckUtils]: 16: Hoare triple {1401#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:42,352 INFO L273 TraceCheckUtils]: 17: Hoare triple {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:42,352 INFO L273 TraceCheckUtils]: 18: Hoare triple {1402#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1461#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:42,353 INFO L273 TraceCheckUtils]: 19: Hoare triple {1461#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !(~v~0 % 4294967296 < 268435455); {1397#false} is VALID [2018-11-23 13:16:42,353 INFO L256 TraceCheckUtils]: 20: Hoare triple {1397#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {1397#false} is VALID [2018-11-23 13:16:42,353 INFO L273 TraceCheckUtils]: 21: Hoare triple {1397#false} ~cond := #in~cond; {1397#false} is VALID [2018-11-23 13:16:42,354 INFO L273 TraceCheckUtils]: 22: Hoare triple {1397#false} assume 0 == ~cond; {1397#false} is VALID [2018-11-23 13:16:42,354 INFO L273 TraceCheckUtils]: 23: Hoare triple {1397#false} assume !false; {1397#false} is VALID [2018-11-23 13:16:42,356 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:42,374 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:42,374 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-23 13:16:42,375 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-11-23 13:16:42,375 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:42,375 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-23 13:16:42,409 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:42,410 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 13:16:42,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 13:16:42,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:16:42,411 INFO L87 Difference]: Start difference. First operand 31 states and 35 transitions. Second operand 9 states. [2018-11-23 13:16:42,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:42,913 INFO L93 Difference]: Finished difference Result 67 states and 79 transitions. [2018-11-23 13:16:42,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 13:16:42,913 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-11-23 13:16:42,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:42,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-23 13:16:42,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 70 transitions. [2018-11-23 13:16:42,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-23 13:16:42,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 70 transitions. [2018-11-23 13:16:42,918 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 70 transitions. [2018-11-23 13:16:43,066 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:43,068 INFO L225 Difference]: With dead ends: 67 [2018-11-23 13:16:43,068 INFO L226 Difference]: Without dead ends: 41 [2018-11-23 13:16:43,069 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:16:43,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-11-23 13:16:43,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 33. [2018-11-23 13:16:43,089 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:43,089 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand 33 states. [2018-11-23 13:16:43,089 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 33 states. [2018-11-23 13:16:43,089 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 33 states. [2018-11-23 13:16:43,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:43,091 INFO L93 Difference]: Finished difference Result 41 states and 48 transitions. [2018-11-23 13:16:43,091 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2018-11-23 13:16:43,092 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:43,092 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:43,092 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 41 states. [2018-11-23 13:16:43,092 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 41 states. [2018-11-23 13:16:43,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:43,094 INFO L93 Difference]: Finished difference Result 41 states and 48 transitions. [2018-11-23 13:16:43,094 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2018-11-23 13:16:43,095 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:43,095 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:43,095 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:43,095 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:43,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-23 13:16:43,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2018-11-23 13:16:43,097 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 24 [2018-11-23 13:16:43,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:43,097 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2018-11-23 13:16:43,097 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 13:16:43,098 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2018-11-23 13:16:43,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-23 13:16:43,098 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:43,098 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:43,099 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:43,099 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:43,099 INFO L82 PathProgramCache]: Analyzing trace with hash 324385679, now seen corresponding path program 6 times [2018-11-23 13:16:43,099 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:43,099 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:43,100 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:43,100 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:16:43,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:43,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:43,401 INFO L256 TraceCheckUtils]: 0: Hoare triple {1708#true} call ULTIMATE.init(); {1708#true} is VALID [2018-11-23 13:16:43,402 INFO L273 TraceCheckUtils]: 1: Hoare triple {1708#true} assume true; {1708#true} is VALID [2018-11-23 13:16:43,402 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1708#true} {1708#true} #81#return; {1708#true} is VALID [2018-11-23 13:16:43,403 INFO L256 TraceCheckUtils]: 3: Hoare triple {1708#true} call #t~ret5 := main(); {1708#true} is VALID [2018-11-23 13:16:43,403 INFO L273 TraceCheckUtils]: 4: Hoare triple {1708#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,403 INFO L273 TraceCheckUtils]: 5: Hoare triple {1708#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,404 INFO L273 TraceCheckUtils]: 6: Hoare triple {1708#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,404 INFO L273 TraceCheckUtils]: 7: Hoare triple {1708#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,405 INFO L273 TraceCheckUtils]: 8: Hoare triple {1708#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:43,405 INFO L273 TraceCheckUtils]: 9: Hoare triple {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:43,406 INFO L273 TraceCheckUtils]: 10: Hoare triple {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:43,407 INFO L273 TraceCheckUtils]: 11: Hoare triple {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:43,407 INFO L273 TraceCheckUtils]: 12: Hoare triple {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:43,408 INFO L273 TraceCheckUtils]: 13: Hoare triple {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:43,409 INFO L273 TraceCheckUtils]: 14: Hoare triple {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:43,410 INFO L273 TraceCheckUtils]: 15: Hoare triple {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:43,411 INFO L273 TraceCheckUtils]: 16: Hoare triple {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:43,412 INFO L273 TraceCheckUtils]: 17: Hoare triple {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:43,413 INFO L273 TraceCheckUtils]: 18: Hoare triple {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:43,414 INFO L273 TraceCheckUtils]: 19: Hoare triple {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:43,415 INFO L273 TraceCheckUtils]: 20: Hoare triple {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1716#(and (<= main_~v~0 6) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:43,416 INFO L273 TraceCheckUtils]: 21: Hoare triple {1716#(and (<= main_~v~0 6) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {1709#false} is VALID [2018-11-23 13:16:43,416 INFO L256 TraceCheckUtils]: 22: Hoare triple {1709#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {1709#false} is VALID [2018-11-23 13:16:43,416 INFO L273 TraceCheckUtils]: 23: Hoare triple {1709#false} ~cond := #in~cond; {1709#false} is VALID [2018-11-23 13:16:43,417 INFO L273 TraceCheckUtils]: 24: Hoare triple {1709#false} assume 0 == ~cond; {1709#false} is VALID [2018-11-23 13:16:43,417 INFO L273 TraceCheckUtils]: 25: Hoare triple {1709#false} assume !false; {1709#false} is VALID [2018-11-23 13:16:43,419 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:43,420 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:43,420 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:43,448 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 13:16:43,516 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-23 13:16:43,517 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:16:43,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:43,536 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:43,662 INFO L256 TraceCheckUtils]: 0: Hoare triple {1708#true} call ULTIMATE.init(); {1708#true} is VALID [2018-11-23 13:16:43,662 INFO L273 TraceCheckUtils]: 1: Hoare triple {1708#true} assume true; {1708#true} is VALID [2018-11-23 13:16:43,663 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1708#true} {1708#true} #81#return; {1708#true} is VALID [2018-11-23 13:16:43,663 INFO L256 TraceCheckUtils]: 3: Hoare triple {1708#true} call #t~ret5 := main(); {1708#true} is VALID [2018-11-23 13:16:43,664 INFO L273 TraceCheckUtils]: 4: Hoare triple {1708#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,664 INFO L273 TraceCheckUtils]: 5: Hoare triple {1708#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,664 INFO L273 TraceCheckUtils]: 6: Hoare triple {1708#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,665 INFO L273 TraceCheckUtils]: 7: Hoare triple {1708#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {1708#true} is VALID [2018-11-23 13:16:43,668 INFO L273 TraceCheckUtils]: 8: Hoare triple {1708#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:43,669 INFO L273 TraceCheckUtils]: 9: Hoare triple {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:43,669 INFO L273 TraceCheckUtils]: 10: Hoare triple {1710#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:43,670 INFO L273 TraceCheckUtils]: 11: Hoare triple {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:43,670 INFO L273 TraceCheckUtils]: 12: Hoare triple {1711#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:43,671 INFO L273 TraceCheckUtils]: 13: Hoare triple {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:43,671 INFO L273 TraceCheckUtils]: 14: Hoare triple {1712#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:43,672 INFO L273 TraceCheckUtils]: 15: Hoare triple {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:43,673 INFO L273 TraceCheckUtils]: 16: Hoare triple {1713#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:43,674 INFO L273 TraceCheckUtils]: 17: Hoare triple {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:43,674 INFO L273 TraceCheckUtils]: 18: Hoare triple {1714#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:43,675 INFO L273 TraceCheckUtils]: 19: Hoare triple {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:43,676 INFO L273 TraceCheckUtils]: 20: Hoare triple {1715#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {1780#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:43,677 INFO L273 TraceCheckUtils]: 21: Hoare triple {1780#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {1709#false} is VALID [2018-11-23 13:16:43,677 INFO L256 TraceCheckUtils]: 22: Hoare triple {1709#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {1709#false} is VALID [2018-11-23 13:16:43,677 INFO L273 TraceCheckUtils]: 23: Hoare triple {1709#false} ~cond := #in~cond; {1709#false} is VALID [2018-11-23 13:16:43,678 INFO L273 TraceCheckUtils]: 24: Hoare triple {1709#false} assume 0 == ~cond; {1709#false} is VALID [2018-11-23 13:16:43,678 INFO L273 TraceCheckUtils]: 25: Hoare triple {1709#false} assume !false; {1709#false} is VALID [2018-11-23 13:16:43,680 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:43,701 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:43,701 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-11-23 13:16:43,701 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 26 [2018-11-23 13:16:43,702 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:43,702 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 13:16:43,731 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:43,731 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 13:16:43,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 13:16:43,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:16:43,732 INFO L87 Difference]: Start difference. First operand 33 states and 37 transitions. Second operand 10 states. [2018-11-23 13:16:44,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:44,162 INFO L93 Difference]: Finished difference Result 71 states and 83 transitions. [2018-11-23 13:16:44,162 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 13:16:44,162 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 26 [2018-11-23 13:16:44,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:44,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 13:16:44,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 72 transitions. [2018-11-23 13:16:44,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 13:16:44,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 72 transitions. [2018-11-23 13:16:44,166 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 72 transitions. [2018-11-23 13:16:44,242 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:44,243 INFO L225 Difference]: With dead ends: 71 [2018-11-23 13:16:44,243 INFO L226 Difference]: Without dead ends: 43 [2018-11-23 13:16:44,244 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:16:44,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-11-23 13:16:44,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 35. [2018-11-23 13:16:44,269 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:44,269 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand 35 states. [2018-11-23 13:16:44,269 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand 35 states. [2018-11-23 13:16:44,269 INFO L87 Difference]: Start difference. First operand 43 states. Second operand 35 states. [2018-11-23 13:16:44,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:44,271 INFO L93 Difference]: Finished difference Result 43 states and 50 transitions. [2018-11-23 13:16:44,271 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 50 transitions. [2018-11-23 13:16:44,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:44,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:44,272 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 43 states. [2018-11-23 13:16:44,272 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 43 states. [2018-11-23 13:16:44,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:44,274 INFO L93 Difference]: Finished difference Result 43 states and 50 transitions. [2018-11-23 13:16:44,274 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 50 transitions. [2018-11-23 13:16:44,274 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:44,274 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:44,274 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:44,275 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:44,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-23 13:16:44,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 39 transitions. [2018-11-23 13:16:44,276 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 39 transitions. Word has length 26 [2018-11-23 13:16:44,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:44,278 INFO L480 AbstractCegarLoop]: Abstraction has 35 states and 39 transitions. [2018-11-23 13:16:44,278 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 13:16:44,278 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 39 transitions. [2018-11-23 13:16:44,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 13:16:44,279 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:44,279 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:44,279 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:44,280 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:44,280 INFO L82 PathProgramCache]: Analyzing trace with hash -1135455539, now seen corresponding path program 7 times [2018-11-23 13:16:44,280 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:44,280 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:44,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:44,283 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:16:44,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:44,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:45,454 INFO L256 TraceCheckUtils]: 0: Hoare triple {2040#true} call ULTIMATE.init(); {2040#true} is VALID [2018-11-23 13:16:45,455 INFO L273 TraceCheckUtils]: 1: Hoare triple {2040#true} assume true; {2040#true} is VALID [2018-11-23 13:16:45,455 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2040#true} {2040#true} #81#return; {2040#true} is VALID [2018-11-23 13:16:45,455 INFO L256 TraceCheckUtils]: 3: Hoare triple {2040#true} call #t~ret5 := main(); {2040#true} is VALID [2018-11-23 13:16:45,455 INFO L273 TraceCheckUtils]: 4: Hoare triple {2040#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,455 INFO L273 TraceCheckUtils]: 5: Hoare triple {2040#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,455 INFO L273 TraceCheckUtils]: 6: Hoare triple {2040#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,456 INFO L273 TraceCheckUtils]: 7: Hoare triple {2040#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,457 INFO L273 TraceCheckUtils]: 8: Hoare triple {2040#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:45,457 INFO L273 TraceCheckUtils]: 9: Hoare triple {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:45,458 INFO L273 TraceCheckUtils]: 10: Hoare triple {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:45,459 INFO L273 TraceCheckUtils]: 11: Hoare triple {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:45,460 INFO L273 TraceCheckUtils]: 12: Hoare triple {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:45,460 INFO L273 TraceCheckUtils]: 13: Hoare triple {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:45,461 INFO L273 TraceCheckUtils]: 14: Hoare triple {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:45,462 INFO L273 TraceCheckUtils]: 15: Hoare triple {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:45,463 INFO L273 TraceCheckUtils]: 16: Hoare triple {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:45,464 INFO L273 TraceCheckUtils]: 17: Hoare triple {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:45,464 INFO L273 TraceCheckUtils]: 18: Hoare triple {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:45,465 INFO L273 TraceCheckUtils]: 19: Hoare triple {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:45,466 INFO L273 TraceCheckUtils]: 20: Hoare triple {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:45,467 INFO L273 TraceCheckUtils]: 21: Hoare triple {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:45,468 INFO L273 TraceCheckUtils]: 22: Hoare triple {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2049#(and (<= main_~v~0 7) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:45,468 INFO L273 TraceCheckUtils]: 23: Hoare triple {2049#(and (<= main_~v~0 7) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {2041#false} is VALID [2018-11-23 13:16:45,469 INFO L256 TraceCheckUtils]: 24: Hoare triple {2041#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {2041#false} is VALID [2018-11-23 13:16:45,469 INFO L273 TraceCheckUtils]: 25: Hoare triple {2041#false} ~cond := #in~cond; {2041#false} is VALID [2018-11-23 13:16:45,469 INFO L273 TraceCheckUtils]: 26: Hoare triple {2041#false} assume 0 == ~cond; {2041#false} is VALID [2018-11-23 13:16:45,469 INFO L273 TraceCheckUtils]: 27: Hoare triple {2041#false} assume !false; {2041#false} is VALID [2018-11-23 13:16:45,471 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:45,471 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:45,472 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:45,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:45,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:45,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:45,522 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:45,630 INFO L256 TraceCheckUtils]: 0: Hoare triple {2040#true} call ULTIMATE.init(); {2040#true} is VALID [2018-11-23 13:16:45,630 INFO L273 TraceCheckUtils]: 1: Hoare triple {2040#true} assume true; {2040#true} is VALID [2018-11-23 13:16:45,630 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2040#true} {2040#true} #81#return; {2040#true} is VALID [2018-11-23 13:16:45,631 INFO L256 TraceCheckUtils]: 3: Hoare triple {2040#true} call #t~ret5 := main(); {2040#true} is VALID [2018-11-23 13:16:45,631 INFO L273 TraceCheckUtils]: 4: Hoare triple {2040#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,631 INFO L273 TraceCheckUtils]: 5: Hoare triple {2040#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,632 INFO L273 TraceCheckUtils]: 6: Hoare triple {2040#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,632 INFO L273 TraceCheckUtils]: 7: Hoare triple {2040#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {2040#true} is VALID [2018-11-23 13:16:45,632 INFO L273 TraceCheckUtils]: 8: Hoare triple {2040#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:45,633 INFO L273 TraceCheckUtils]: 9: Hoare triple {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:45,633 INFO L273 TraceCheckUtils]: 10: Hoare triple {2042#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:45,635 INFO L273 TraceCheckUtils]: 11: Hoare triple {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:45,635 INFO L273 TraceCheckUtils]: 12: Hoare triple {2043#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:45,636 INFO L273 TraceCheckUtils]: 13: Hoare triple {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:45,637 INFO L273 TraceCheckUtils]: 14: Hoare triple {2044#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:45,637 INFO L273 TraceCheckUtils]: 15: Hoare triple {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:45,638 INFO L273 TraceCheckUtils]: 16: Hoare triple {2045#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:45,639 INFO L273 TraceCheckUtils]: 17: Hoare triple {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:45,640 INFO L273 TraceCheckUtils]: 18: Hoare triple {2046#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:45,640 INFO L273 TraceCheckUtils]: 19: Hoare triple {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:45,641 INFO L273 TraceCheckUtils]: 20: Hoare triple {2047#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:45,642 INFO L273 TraceCheckUtils]: 21: Hoare triple {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:45,643 INFO L273 TraceCheckUtils]: 22: Hoare triple {2048#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2119#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:16:45,644 INFO L273 TraceCheckUtils]: 23: Hoare triple {2119#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {2041#false} is VALID [2018-11-23 13:16:45,644 INFO L256 TraceCheckUtils]: 24: Hoare triple {2041#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {2041#false} is VALID [2018-11-23 13:16:45,644 INFO L273 TraceCheckUtils]: 25: Hoare triple {2041#false} ~cond := #in~cond; {2041#false} is VALID [2018-11-23 13:16:45,644 INFO L273 TraceCheckUtils]: 26: Hoare triple {2041#false} assume 0 == ~cond; {2041#false} is VALID [2018-11-23 13:16:45,645 INFO L273 TraceCheckUtils]: 27: Hoare triple {2041#false} assume !false; {2041#false} is VALID [2018-11-23 13:16:45,646 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:45,665 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:45,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-11-23 13:16:45,665 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 28 [2018-11-23 13:16:45,666 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:45,666 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states. [2018-11-23 13:16:45,693 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:45,693 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 13:16:45,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 13:16:45,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-11-23 13:16:45,694 INFO L87 Difference]: Start difference. First operand 35 states and 39 transitions. Second operand 11 states. [2018-11-23 13:16:46,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:46,286 INFO L93 Difference]: Finished difference Result 75 states and 87 transitions. [2018-11-23 13:16:46,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 13:16:46,286 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 28 [2018-11-23 13:16:46,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:46,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-23 13:16:46,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 74 transitions. [2018-11-23 13:16:46,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-23 13:16:46,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 74 transitions. [2018-11-23 13:16:46,290 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 74 transitions. [2018-11-23 13:16:46,409 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:46,410 INFO L225 Difference]: With dead ends: 75 [2018-11-23 13:16:46,411 INFO L226 Difference]: Without dead ends: 45 [2018-11-23 13:16:46,411 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-11-23 13:16:46,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-11-23 13:16:46,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 37. [2018-11-23 13:16:46,434 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:46,434 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand 37 states. [2018-11-23 13:16:46,434 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 37 states. [2018-11-23 13:16:46,434 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 37 states. [2018-11-23 13:16:46,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:46,437 INFO L93 Difference]: Finished difference Result 45 states and 52 transitions. [2018-11-23 13:16:46,437 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2018-11-23 13:16:46,437 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:46,437 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:46,437 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 45 states. [2018-11-23 13:16:46,438 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 45 states. [2018-11-23 13:16:46,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:46,439 INFO L93 Difference]: Finished difference Result 45 states and 52 transitions. [2018-11-23 13:16:46,439 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2018-11-23 13:16:46,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:46,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:46,440 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:46,440 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:46,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-23 13:16:46,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 41 transitions. [2018-11-23 13:16:46,441 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 41 transitions. Word has length 28 [2018-11-23 13:16:46,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:46,441 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 41 transitions. [2018-11-23 13:16:46,441 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 13:16:46,441 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 41 transitions. [2018-11-23 13:16:46,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 13:16:46,442 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:46,442 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:46,442 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:46,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:46,443 INFO L82 PathProgramCache]: Analyzing trace with hash 411439755, now seen corresponding path program 8 times [2018-11-23 13:16:46,443 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:46,443 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:46,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:46,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:46,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:46,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:46,677 INFO L256 TraceCheckUtils]: 0: Hoare triple {2392#true} call ULTIMATE.init(); {2392#true} is VALID [2018-11-23 13:16:46,678 INFO L273 TraceCheckUtils]: 1: Hoare triple {2392#true} assume true; {2392#true} is VALID [2018-11-23 13:16:46,678 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2392#true} {2392#true} #81#return; {2392#true} is VALID [2018-11-23 13:16:46,678 INFO L256 TraceCheckUtils]: 3: Hoare triple {2392#true} call #t~ret5 := main(); {2392#true} is VALID [2018-11-23 13:16:46,678 INFO L273 TraceCheckUtils]: 4: Hoare triple {2392#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,679 INFO L273 TraceCheckUtils]: 5: Hoare triple {2392#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,679 INFO L273 TraceCheckUtils]: 6: Hoare triple {2392#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,679 INFO L273 TraceCheckUtils]: 7: Hoare triple {2392#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,687 INFO L273 TraceCheckUtils]: 8: Hoare triple {2392#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:46,687 INFO L273 TraceCheckUtils]: 9: Hoare triple {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:46,688 INFO L273 TraceCheckUtils]: 10: Hoare triple {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:46,688 INFO L273 TraceCheckUtils]: 11: Hoare triple {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:46,689 INFO L273 TraceCheckUtils]: 12: Hoare triple {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:46,689 INFO L273 TraceCheckUtils]: 13: Hoare triple {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:46,690 INFO L273 TraceCheckUtils]: 14: Hoare triple {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:46,690 INFO L273 TraceCheckUtils]: 15: Hoare triple {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:46,691 INFO L273 TraceCheckUtils]: 16: Hoare triple {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:46,691 INFO L273 TraceCheckUtils]: 17: Hoare triple {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:46,692 INFO L273 TraceCheckUtils]: 18: Hoare triple {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:46,693 INFO L273 TraceCheckUtils]: 19: Hoare triple {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:46,693 INFO L273 TraceCheckUtils]: 20: Hoare triple {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:46,694 INFO L273 TraceCheckUtils]: 21: Hoare triple {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:46,695 INFO L273 TraceCheckUtils]: 22: Hoare triple {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:16:46,696 INFO L273 TraceCheckUtils]: 23: Hoare triple {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:16:46,697 INFO L273 TraceCheckUtils]: 24: Hoare triple {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2402#(and (<= main_~v~0 8) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:46,698 INFO L273 TraceCheckUtils]: 25: Hoare triple {2402#(and (<= main_~v~0 8) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {2393#false} is VALID [2018-11-23 13:16:46,698 INFO L256 TraceCheckUtils]: 26: Hoare triple {2393#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {2393#false} is VALID [2018-11-23 13:16:46,698 INFO L273 TraceCheckUtils]: 27: Hoare triple {2393#false} ~cond := #in~cond; {2393#false} is VALID [2018-11-23 13:16:46,698 INFO L273 TraceCheckUtils]: 28: Hoare triple {2393#false} assume 0 == ~cond; {2393#false} is VALID [2018-11-23 13:16:46,698 INFO L273 TraceCheckUtils]: 29: Hoare triple {2393#false} assume !false; {2393#false} is VALID [2018-11-23 13:16:46,700 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:46,700 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:46,700 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:46,712 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:16:46,723 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:16:46,723 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:16:46,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:46,748 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:16:46,849 INFO L256 TraceCheckUtils]: 0: Hoare triple {2392#true} call ULTIMATE.init(); {2392#true} is VALID [2018-11-23 13:16:46,849 INFO L273 TraceCheckUtils]: 1: Hoare triple {2392#true} assume true; {2392#true} is VALID [2018-11-23 13:16:46,849 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2392#true} {2392#true} #81#return; {2392#true} is VALID [2018-11-23 13:16:46,849 INFO L256 TraceCheckUtils]: 3: Hoare triple {2392#true} call #t~ret5 := main(); {2392#true} is VALID [2018-11-23 13:16:46,849 INFO L273 TraceCheckUtils]: 4: Hoare triple {2392#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,850 INFO L273 TraceCheckUtils]: 5: Hoare triple {2392#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,850 INFO L273 TraceCheckUtils]: 6: Hoare triple {2392#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,850 INFO L273 TraceCheckUtils]: 7: Hoare triple {2392#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {2392#true} is VALID [2018-11-23 13:16:46,850 INFO L273 TraceCheckUtils]: 8: Hoare triple {2392#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:46,851 INFO L273 TraceCheckUtils]: 9: Hoare triple {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:46,851 INFO L273 TraceCheckUtils]: 10: Hoare triple {2394#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:46,852 INFO L273 TraceCheckUtils]: 11: Hoare triple {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:46,852 INFO L273 TraceCheckUtils]: 12: Hoare triple {2395#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:46,853 INFO L273 TraceCheckUtils]: 13: Hoare triple {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:46,856 INFO L273 TraceCheckUtils]: 14: Hoare triple {2396#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:46,856 INFO L273 TraceCheckUtils]: 15: Hoare triple {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:46,858 INFO L273 TraceCheckUtils]: 16: Hoare triple {2397#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:46,859 INFO L273 TraceCheckUtils]: 17: Hoare triple {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:46,862 INFO L273 TraceCheckUtils]: 18: Hoare triple {2398#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:46,863 INFO L273 TraceCheckUtils]: 19: Hoare triple {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:46,870 INFO L273 TraceCheckUtils]: 20: Hoare triple {2399#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:46,870 INFO L273 TraceCheckUtils]: 21: Hoare triple {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:46,871 INFO L273 TraceCheckUtils]: 22: Hoare triple {2400#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:16:46,871 INFO L273 TraceCheckUtils]: 23: Hoare triple {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:16:46,872 INFO L273 TraceCheckUtils]: 24: Hoare triple {2401#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2478#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:16:46,872 INFO L273 TraceCheckUtils]: 25: Hoare triple {2478#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {2393#false} is VALID [2018-11-23 13:16:46,872 INFO L256 TraceCheckUtils]: 26: Hoare triple {2393#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {2393#false} is VALID [2018-11-23 13:16:46,873 INFO L273 TraceCheckUtils]: 27: Hoare triple {2393#false} ~cond := #in~cond; {2393#false} is VALID [2018-11-23 13:16:46,873 INFO L273 TraceCheckUtils]: 28: Hoare triple {2393#false} assume 0 == ~cond; {2393#false} is VALID [2018-11-23 13:16:46,873 INFO L273 TraceCheckUtils]: 29: Hoare triple {2393#false} assume !false; {2393#false} is VALID [2018-11-23 13:16:46,874 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:46,893 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:16:46,893 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-11-23 13:16:46,894 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 30 [2018-11-23 13:16:46,894 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:16:46,894 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 13:16:46,923 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:46,923 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 13:16:46,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 13:16:46,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-23 13:16:46,924 INFO L87 Difference]: Start difference. First operand 37 states and 41 transitions. Second operand 12 states. [2018-11-23 13:16:47,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:47,552 INFO L93 Difference]: Finished difference Result 79 states and 91 transitions. [2018-11-23 13:16:47,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 13:16:47,552 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 30 [2018-11-23 13:16:47,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:47,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 13:16:47,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 76 transitions. [2018-11-23 13:16:47,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 13:16:47,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 76 transitions. [2018-11-23 13:16:47,557 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states and 76 transitions. [2018-11-23 13:16:47,695 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:16:47,696 INFO L225 Difference]: With dead ends: 79 [2018-11-23 13:16:47,696 INFO L226 Difference]: Without dead ends: 47 [2018-11-23 13:16:47,697 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-23 13:16:47,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-23 13:16:47,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 39. [2018-11-23 13:16:47,719 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:16:47,719 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand 39 states. [2018-11-23 13:16:47,719 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 39 states. [2018-11-23 13:16:47,720 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 39 states. [2018-11-23 13:16:47,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:47,721 INFO L93 Difference]: Finished difference Result 47 states and 54 transitions. [2018-11-23 13:16:47,721 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 54 transitions. [2018-11-23 13:16:47,722 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:47,722 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:47,722 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 47 states. [2018-11-23 13:16:47,722 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 47 states. [2018-11-23 13:16:47,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:47,723 INFO L93 Difference]: Finished difference Result 47 states and 54 transitions. [2018-11-23 13:16:47,724 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 54 transitions. [2018-11-23 13:16:47,724 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:16:47,724 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:16:47,724 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:16:47,724 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:16:47,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-11-23 13:16:47,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. [2018-11-23 13:16:47,726 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 43 transitions. Word has length 30 [2018-11-23 13:16:47,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:47,726 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 43 transitions. [2018-11-23 13:16:47,726 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 13:16:47,726 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 43 transitions. [2018-11-23 13:16:47,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 13:16:47,727 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:47,727 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:47,727 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:47,728 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:47,728 INFO L82 PathProgramCache]: Analyzing trace with hash 919132873, now seen corresponding path program 9 times [2018-11-23 13:16:47,728 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:47,728 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:47,729 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:47,729 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:16:47,729 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:47,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:48,336 INFO L256 TraceCheckUtils]: 0: Hoare triple {2764#true} call ULTIMATE.init(); {2764#true} is VALID [2018-11-23 13:16:48,336 INFO L273 TraceCheckUtils]: 1: Hoare triple {2764#true} assume true; {2764#true} is VALID [2018-11-23 13:16:48,336 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2764#true} {2764#true} #81#return; {2764#true} is VALID [2018-11-23 13:16:48,336 INFO L256 TraceCheckUtils]: 3: Hoare triple {2764#true} call #t~ret5 := main(); {2764#true} is VALID [2018-11-23 13:16:48,337 INFO L273 TraceCheckUtils]: 4: Hoare triple {2764#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {2764#true} is VALID [2018-11-23 13:16:48,337 INFO L273 TraceCheckUtils]: 5: Hoare triple {2764#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {2764#true} is VALID [2018-11-23 13:16:48,337 INFO L273 TraceCheckUtils]: 6: Hoare triple {2764#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {2764#true} is VALID [2018-11-23 13:16:48,337 INFO L273 TraceCheckUtils]: 7: Hoare triple {2764#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {2764#true} is VALID [2018-11-23 13:16:48,338 INFO L273 TraceCheckUtils]: 8: Hoare triple {2764#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:48,339 INFO L273 TraceCheckUtils]: 9: Hoare triple {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:16:48,339 INFO L273 TraceCheckUtils]: 10: Hoare triple {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:48,340 INFO L273 TraceCheckUtils]: 11: Hoare triple {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:16:48,341 INFO L273 TraceCheckUtils]: 12: Hoare triple {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:48,342 INFO L273 TraceCheckUtils]: 13: Hoare triple {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:16:48,342 INFO L273 TraceCheckUtils]: 14: Hoare triple {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:48,343 INFO L273 TraceCheckUtils]: 15: Hoare triple {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:16:48,344 INFO L273 TraceCheckUtils]: 16: Hoare triple {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:48,345 INFO L273 TraceCheckUtils]: 17: Hoare triple {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:16:48,345 INFO L273 TraceCheckUtils]: 18: Hoare triple {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:48,346 INFO L273 TraceCheckUtils]: 19: Hoare triple {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:16:48,347 INFO L273 TraceCheckUtils]: 20: Hoare triple {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:48,348 INFO L273 TraceCheckUtils]: 21: Hoare triple {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:16:48,348 INFO L273 TraceCheckUtils]: 22: Hoare triple {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:16:48,349 INFO L273 TraceCheckUtils]: 23: Hoare triple {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:16:48,350 INFO L273 TraceCheckUtils]: 24: Hoare triple {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:16:48,351 INFO L273 TraceCheckUtils]: 25: Hoare triple {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:16:48,351 INFO L273 TraceCheckUtils]: 26: Hoare triple {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2775#(and (<= main_~v~0 9) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:16:48,352 INFO L273 TraceCheckUtils]: 27: Hoare triple {2775#(and (<= main_~v~0 9) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {2765#false} is VALID [2018-11-23 13:16:48,353 INFO L256 TraceCheckUtils]: 28: Hoare triple {2765#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {2765#false} is VALID [2018-11-23 13:16:48,353 INFO L273 TraceCheckUtils]: 29: Hoare triple {2765#false} ~cond := #in~cond; {2765#false} is VALID [2018-11-23 13:16:48,353 INFO L273 TraceCheckUtils]: 30: Hoare triple {2765#false} assume 0 == ~cond; {2765#false} is VALID [2018-11-23 13:16:48,353 INFO L273 TraceCheckUtils]: 31: Hoare triple {2765#false} assume !false; {2765#false} is VALID [2018-11-23 13:16:48,355 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:48,355 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:16:48,356 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:16:48,364 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 13:17:27,626 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-11-23 13:17:27,626 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:17:28,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:28,435 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:17:28,578 INFO L256 TraceCheckUtils]: 0: Hoare triple {2764#true} call ULTIMATE.init(); {2764#true} is VALID [2018-11-23 13:17:28,578 INFO L273 TraceCheckUtils]: 1: Hoare triple {2764#true} assume true; {2764#true} is VALID [2018-11-23 13:17:28,578 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2764#true} {2764#true} #81#return; {2764#true} is VALID [2018-11-23 13:17:28,578 INFO L256 TraceCheckUtils]: 3: Hoare triple {2764#true} call #t~ret5 := main(); {2764#true} is VALID [2018-11-23 13:17:28,578 INFO L273 TraceCheckUtils]: 4: Hoare triple {2764#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {2764#true} is VALID [2018-11-23 13:17:28,579 INFO L273 TraceCheckUtils]: 5: Hoare triple {2764#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {2764#true} is VALID [2018-11-23 13:17:28,579 INFO L273 TraceCheckUtils]: 6: Hoare triple {2764#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {2764#true} is VALID [2018-11-23 13:17:28,579 INFO L273 TraceCheckUtils]: 7: Hoare triple {2764#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {2764#true} is VALID [2018-11-23 13:17:28,594 INFO L273 TraceCheckUtils]: 8: Hoare triple {2764#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:28,602 INFO L273 TraceCheckUtils]: 9: Hoare triple {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:28,617 INFO L273 TraceCheckUtils]: 10: Hoare triple {2766#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:28,625 INFO L273 TraceCheckUtils]: 11: Hoare triple {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:28,639 INFO L273 TraceCheckUtils]: 12: Hoare triple {2767#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:28,647 INFO L273 TraceCheckUtils]: 13: Hoare triple {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:28,653 INFO L273 TraceCheckUtils]: 14: Hoare triple {2768#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:28,654 INFO L273 TraceCheckUtils]: 15: Hoare triple {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:28,654 INFO L273 TraceCheckUtils]: 16: Hoare triple {2769#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:28,655 INFO L273 TraceCheckUtils]: 17: Hoare triple {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:28,655 INFO L273 TraceCheckUtils]: 18: Hoare triple {2770#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:28,656 INFO L273 TraceCheckUtils]: 19: Hoare triple {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:28,656 INFO L273 TraceCheckUtils]: 20: Hoare triple {2771#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:28,657 INFO L273 TraceCheckUtils]: 21: Hoare triple {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:28,658 INFO L273 TraceCheckUtils]: 22: Hoare triple {2772#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:28,658 INFO L273 TraceCheckUtils]: 23: Hoare triple {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:28,659 INFO L273 TraceCheckUtils]: 24: Hoare triple {2773#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:28,660 INFO L273 TraceCheckUtils]: 25: Hoare triple {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:28,661 INFO L273 TraceCheckUtils]: 26: Hoare triple {2774#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {2857#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:17:28,662 INFO L273 TraceCheckUtils]: 27: Hoare triple {2857#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !(~v~0 % 4294967296 < 268435455); {2765#false} is VALID [2018-11-23 13:17:28,662 INFO L256 TraceCheckUtils]: 28: Hoare triple {2765#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {2765#false} is VALID [2018-11-23 13:17:28,662 INFO L273 TraceCheckUtils]: 29: Hoare triple {2765#false} ~cond := #in~cond; {2765#false} is VALID [2018-11-23 13:17:28,662 INFO L273 TraceCheckUtils]: 30: Hoare triple {2765#false} assume 0 == ~cond; {2765#false} is VALID [2018-11-23 13:17:28,662 INFO L273 TraceCheckUtils]: 31: Hoare triple {2765#false} assume !false; {2765#false} is VALID [2018-11-23 13:17:28,664 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:28,685 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:17:28,686 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-11-23 13:17:28,686 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 32 [2018-11-23 13:17:28,686 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:17:28,686 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-23 13:17:28,718 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:17:28,718 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 13:17:28,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 13:17:28,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-23 13:17:28,719 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. Second operand 13 states. [2018-11-23 13:17:29,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:29,386 INFO L93 Difference]: Finished difference Result 83 states and 95 transitions. [2018-11-23 13:17:29,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 13:17:29,386 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 32 [2018-11-23 13:17:29,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:29,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 13:17:29,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 78 transitions. [2018-11-23 13:17:29,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 13:17:29,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 78 transitions. [2018-11-23 13:17:29,389 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 78 transitions. [2018-11-23 13:17:29,460 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:17:29,461 INFO L225 Difference]: With dead ends: 83 [2018-11-23 13:17:29,461 INFO L226 Difference]: Without dead ends: 49 [2018-11-23 13:17:29,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 31 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-23 13:17:29,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-11-23 13:17:29,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 41. [2018-11-23 13:17:29,482 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:17:29,482 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand 41 states. [2018-11-23 13:17:29,483 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand 41 states. [2018-11-23 13:17:29,483 INFO L87 Difference]: Start difference. First operand 49 states. Second operand 41 states. [2018-11-23 13:17:29,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:29,484 INFO L93 Difference]: Finished difference Result 49 states and 56 transitions. [2018-11-23 13:17:29,484 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2018-11-23 13:17:29,484 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:17:29,484 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:17:29,484 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 49 states. [2018-11-23 13:17:29,484 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 49 states. [2018-11-23 13:17:29,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:29,485 INFO L93 Difference]: Finished difference Result 49 states and 56 transitions. [2018-11-23 13:17:29,485 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2018-11-23 13:17:29,486 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:17:29,486 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:17:29,486 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:17:29,486 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:17:29,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-23 13:17:29,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2018-11-23 13:17:29,487 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 32 [2018-11-23 13:17:29,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:29,487 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2018-11-23 13:17:29,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 13:17:29,487 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2018-11-23 13:17:29,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-23 13:17:29,488 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:29,488 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:29,488 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:29,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:29,489 INFO L82 PathProgramCache]: Analyzing trace with hash -814052473, now seen corresponding path program 10 times [2018-11-23 13:17:29,489 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:29,489 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:29,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:29,490 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:17:29,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:29,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:29,966 INFO L256 TraceCheckUtils]: 0: Hoare triple {3156#true} call ULTIMATE.init(); {3156#true} is VALID [2018-11-23 13:17:29,967 INFO L273 TraceCheckUtils]: 1: Hoare triple {3156#true} assume true; {3156#true} is VALID [2018-11-23 13:17:29,967 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3156#true} {3156#true} #81#return; {3156#true} is VALID [2018-11-23 13:17:29,967 INFO L256 TraceCheckUtils]: 3: Hoare triple {3156#true} call #t~ret5 := main(); {3156#true} is VALID [2018-11-23 13:17:29,968 INFO L273 TraceCheckUtils]: 4: Hoare triple {3156#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {3156#true} is VALID [2018-11-23 13:17:29,968 INFO L273 TraceCheckUtils]: 5: Hoare triple {3156#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {3156#true} is VALID [2018-11-23 13:17:29,968 INFO L273 TraceCheckUtils]: 6: Hoare triple {3156#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {3156#true} is VALID [2018-11-23 13:17:29,968 INFO L273 TraceCheckUtils]: 7: Hoare triple {3156#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {3156#true} is VALID [2018-11-23 13:17:29,969 INFO L273 TraceCheckUtils]: 8: Hoare triple {3156#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:29,970 INFO L273 TraceCheckUtils]: 9: Hoare triple {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:29,970 INFO L273 TraceCheckUtils]: 10: Hoare triple {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:29,971 INFO L273 TraceCheckUtils]: 11: Hoare triple {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:29,972 INFO L273 TraceCheckUtils]: 12: Hoare triple {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:29,972 INFO L273 TraceCheckUtils]: 13: Hoare triple {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:29,973 INFO L273 TraceCheckUtils]: 14: Hoare triple {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:29,973 INFO L273 TraceCheckUtils]: 15: Hoare triple {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:29,974 INFO L273 TraceCheckUtils]: 16: Hoare triple {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:29,975 INFO L273 TraceCheckUtils]: 17: Hoare triple {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:29,976 INFO L273 TraceCheckUtils]: 18: Hoare triple {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:29,977 INFO L273 TraceCheckUtils]: 19: Hoare triple {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:29,978 INFO L273 TraceCheckUtils]: 20: Hoare triple {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:29,978 INFO L273 TraceCheckUtils]: 21: Hoare triple {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:29,979 INFO L273 TraceCheckUtils]: 22: Hoare triple {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:29,980 INFO L273 TraceCheckUtils]: 23: Hoare triple {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:29,981 INFO L273 TraceCheckUtils]: 24: Hoare triple {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:29,982 INFO L273 TraceCheckUtils]: 25: Hoare triple {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:29,983 INFO L273 TraceCheckUtils]: 26: Hoare triple {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:17:29,983 INFO L273 TraceCheckUtils]: 27: Hoare triple {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:17:29,984 INFO L273 TraceCheckUtils]: 28: Hoare triple {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3168#(and (<= main_~v~0 10) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:17:29,985 INFO L273 TraceCheckUtils]: 29: Hoare triple {3168#(and (<= main_~v~0 10) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {3157#false} is VALID [2018-11-23 13:17:29,986 INFO L256 TraceCheckUtils]: 30: Hoare triple {3157#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {3157#false} is VALID [2018-11-23 13:17:29,986 INFO L273 TraceCheckUtils]: 31: Hoare triple {3157#false} ~cond := #in~cond; {3157#false} is VALID [2018-11-23 13:17:29,986 INFO L273 TraceCheckUtils]: 32: Hoare triple {3157#false} assume 0 == ~cond; {3157#false} is VALID [2018-11-23 13:17:29,986 INFO L273 TraceCheckUtils]: 33: Hoare triple {3157#false} assume !false; {3157#false} is VALID [2018-11-23 13:17:29,990 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:29,990 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:17:29,990 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:17:30,000 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 13:17:30,014 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 13:17:30,015 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:17:30,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:30,023 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:17:30,150 INFO L256 TraceCheckUtils]: 0: Hoare triple {3156#true} call ULTIMATE.init(); {3156#true} is VALID [2018-11-23 13:17:30,151 INFO L273 TraceCheckUtils]: 1: Hoare triple {3156#true} assume true; {3156#true} is VALID [2018-11-23 13:17:30,151 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3156#true} {3156#true} #81#return; {3156#true} is VALID [2018-11-23 13:17:30,151 INFO L256 TraceCheckUtils]: 3: Hoare triple {3156#true} call #t~ret5 := main(); {3156#true} is VALID [2018-11-23 13:17:30,152 INFO L273 TraceCheckUtils]: 4: Hoare triple {3156#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {3156#true} is VALID [2018-11-23 13:17:30,152 INFO L273 TraceCheckUtils]: 5: Hoare triple {3156#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {3156#true} is VALID [2018-11-23 13:17:30,152 INFO L273 TraceCheckUtils]: 6: Hoare triple {3156#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {3156#true} is VALID [2018-11-23 13:17:30,152 INFO L273 TraceCheckUtils]: 7: Hoare triple {3156#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {3156#true} is VALID [2018-11-23 13:17:30,153 INFO L273 TraceCheckUtils]: 8: Hoare triple {3156#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:30,153 INFO L273 TraceCheckUtils]: 9: Hoare triple {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:30,154 INFO L273 TraceCheckUtils]: 10: Hoare triple {3158#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:30,154 INFO L273 TraceCheckUtils]: 11: Hoare triple {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:30,155 INFO L273 TraceCheckUtils]: 12: Hoare triple {3159#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:30,156 INFO L273 TraceCheckUtils]: 13: Hoare triple {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:30,156 INFO L273 TraceCheckUtils]: 14: Hoare triple {3160#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:30,157 INFO L273 TraceCheckUtils]: 15: Hoare triple {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:30,158 INFO L273 TraceCheckUtils]: 16: Hoare triple {3161#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:30,159 INFO L273 TraceCheckUtils]: 17: Hoare triple {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:30,173 INFO L273 TraceCheckUtils]: 18: Hoare triple {3162#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:30,174 INFO L273 TraceCheckUtils]: 19: Hoare triple {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:30,175 INFO L273 TraceCheckUtils]: 20: Hoare triple {3163#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:30,175 INFO L273 TraceCheckUtils]: 21: Hoare triple {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:30,176 INFO L273 TraceCheckUtils]: 22: Hoare triple {3164#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:30,176 INFO L273 TraceCheckUtils]: 23: Hoare triple {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:30,177 INFO L273 TraceCheckUtils]: 24: Hoare triple {3165#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:30,178 INFO L273 TraceCheckUtils]: 25: Hoare triple {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:30,179 INFO L273 TraceCheckUtils]: 26: Hoare triple {3166#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:17:30,179 INFO L273 TraceCheckUtils]: 27: Hoare triple {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:17:30,180 INFO L273 TraceCheckUtils]: 28: Hoare triple {3167#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3256#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:17:30,181 INFO L273 TraceCheckUtils]: 29: Hoare triple {3256#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !(~v~0 % 4294967296 < 268435455); {3157#false} is VALID [2018-11-23 13:17:30,182 INFO L256 TraceCheckUtils]: 30: Hoare triple {3157#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {3157#false} is VALID [2018-11-23 13:17:30,182 INFO L273 TraceCheckUtils]: 31: Hoare triple {3157#false} ~cond := #in~cond; {3157#false} is VALID [2018-11-23 13:17:30,182 INFO L273 TraceCheckUtils]: 32: Hoare triple {3157#false} assume 0 == ~cond; {3157#false} is VALID [2018-11-23 13:17:30,182 INFO L273 TraceCheckUtils]: 33: Hoare triple {3157#false} assume !false; {3157#false} is VALID [2018-11-23 13:17:30,186 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:30,204 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:17:30,204 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-11-23 13:17:30,204 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 34 [2018-11-23 13:17:30,205 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:17:30,205 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 13:17:30,241 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:17:30,241 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 13:17:30,242 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 13:17:30,242 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-11-23 13:17:30,242 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand 14 states. [2018-11-23 13:17:31,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:31,010 INFO L93 Difference]: Finished difference Result 87 states and 99 transitions. [2018-11-23 13:17:31,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 13:17:31,010 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 34 [2018-11-23 13:17:31,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:31,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 13:17:31,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 80 transitions. [2018-11-23 13:17:31,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 13:17:31,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 80 transitions. [2018-11-23 13:17:31,013 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 80 transitions. [2018-11-23 13:17:31,101 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 80 edges. 80 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:17:31,102 INFO L225 Difference]: With dead ends: 87 [2018-11-23 13:17:31,102 INFO L226 Difference]: Without dead ends: 51 [2018-11-23 13:17:31,103 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-11-23 13:17:31,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-11-23 13:17:31,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 43. [2018-11-23 13:17:31,129 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:17:31,129 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand 43 states. [2018-11-23 13:17:31,129 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand 43 states. [2018-11-23 13:17:31,129 INFO L87 Difference]: Start difference. First operand 51 states. Second operand 43 states. [2018-11-23 13:17:31,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:31,130 INFO L93 Difference]: Finished difference Result 51 states and 58 transitions. [2018-11-23 13:17:31,130 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 58 transitions. [2018-11-23 13:17:31,131 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:17:31,131 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:17:31,131 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand 51 states. [2018-11-23 13:17:31,131 INFO L87 Difference]: Start difference. First operand 43 states. Second operand 51 states. [2018-11-23 13:17:31,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:31,132 INFO L93 Difference]: Finished difference Result 51 states and 58 transitions. [2018-11-23 13:17:31,132 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 58 transitions. [2018-11-23 13:17:31,132 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:17:31,132 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:17:31,132 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:17:31,132 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:17:31,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-11-23 13:17:31,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2018-11-23 13:17:31,134 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 34 [2018-11-23 13:17:31,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:31,134 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2018-11-23 13:17:31,134 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 13:17:31,134 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2018-11-23 13:17:31,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-23 13:17:31,134 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:31,134 INFO L402 BasicCegarLoop]: trace histogram [11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:31,135 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:31,135 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:31,135 INFO L82 PathProgramCache]: Analyzing trace with hash 42140869, now seen corresponding path program 11 times [2018-11-23 13:17:31,135 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:31,135 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:31,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:31,136 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:17:31,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:31,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:31,692 INFO L256 TraceCheckUtils]: 0: Hoare triple {3568#true} call ULTIMATE.init(); {3568#true} is VALID [2018-11-23 13:17:31,693 INFO L273 TraceCheckUtils]: 1: Hoare triple {3568#true} assume true; {3568#true} is VALID [2018-11-23 13:17:31,693 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3568#true} {3568#true} #81#return; {3568#true} is VALID [2018-11-23 13:17:31,693 INFO L256 TraceCheckUtils]: 3: Hoare triple {3568#true} call #t~ret5 := main(); {3568#true} is VALID [2018-11-23 13:17:31,693 INFO L273 TraceCheckUtils]: 4: Hoare triple {3568#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {3568#true} is VALID [2018-11-23 13:17:31,693 INFO L273 TraceCheckUtils]: 5: Hoare triple {3568#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {3568#true} is VALID [2018-11-23 13:17:31,693 INFO L273 TraceCheckUtils]: 6: Hoare triple {3568#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {3568#true} is VALID [2018-11-23 13:17:31,694 INFO L273 TraceCheckUtils]: 7: Hoare triple {3568#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {3568#true} is VALID [2018-11-23 13:17:31,694 INFO L273 TraceCheckUtils]: 8: Hoare triple {3568#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:31,694 INFO L273 TraceCheckUtils]: 9: Hoare triple {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:17:31,695 INFO L273 TraceCheckUtils]: 10: Hoare triple {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:31,695 INFO L273 TraceCheckUtils]: 11: Hoare triple {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:17:31,696 INFO L273 TraceCheckUtils]: 12: Hoare triple {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:31,696 INFO L273 TraceCheckUtils]: 13: Hoare triple {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:17:31,697 INFO L273 TraceCheckUtils]: 14: Hoare triple {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:31,701 INFO L273 TraceCheckUtils]: 15: Hoare triple {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:17:31,702 INFO L273 TraceCheckUtils]: 16: Hoare triple {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:31,702 INFO L273 TraceCheckUtils]: 17: Hoare triple {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:17:31,703 INFO L273 TraceCheckUtils]: 18: Hoare triple {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:31,703 INFO L273 TraceCheckUtils]: 19: Hoare triple {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:17:31,704 INFO L273 TraceCheckUtils]: 20: Hoare triple {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:31,705 INFO L273 TraceCheckUtils]: 21: Hoare triple {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:17:31,706 INFO L273 TraceCheckUtils]: 22: Hoare triple {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:31,706 INFO L273 TraceCheckUtils]: 23: Hoare triple {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:17:31,707 INFO L273 TraceCheckUtils]: 24: Hoare triple {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:31,708 INFO L273 TraceCheckUtils]: 25: Hoare triple {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:17:31,708 INFO L273 TraceCheckUtils]: 26: Hoare triple {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:17:31,709 INFO L273 TraceCheckUtils]: 27: Hoare triple {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:17:31,711 INFO L273 TraceCheckUtils]: 28: Hoare triple {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:17:31,712 INFO L273 TraceCheckUtils]: 29: Hoare triple {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:17:31,713 INFO L273 TraceCheckUtils]: 30: Hoare triple {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3581#(and (<= main_~v~0 11) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:17:31,713 INFO L273 TraceCheckUtils]: 31: Hoare triple {3581#(and (<= main_~v~0 11) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {3569#false} is VALID [2018-11-23 13:17:31,713 INFO L256 TraceCheckUtils]: 32: Hoare triple {3569#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {3569#false} is VALID [2018-11-23 13:17:31,713 INFO L273 TraceCheckUtils]: 33: Hoare triple {3569#false} ~cond := #in~cond; {3569#false} is VALID [2018-11-23 13:17:31,714 INFO L273 TraceCheckUtils]: 34: Hoare triple {3569#false} assume 0 == ~cond; {3569#false} is VALID [2018-11-23 13:17:31,714 INFO L273 TraceCheckUtils]: 35: Hoare triple {3569#false} assume !false; {3569#false} is VALID [2018-11-23 13:17:31,716 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:31,716 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:17:31,716 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:17:31,728 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 13:18:53,157 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-11-23 13:18:53,179 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:18:53,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:18:53,213 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:18:53,325 INFO L256 TraceCheckUtils]: 0: Hoare triple {3568#true} call ULTIMATE.init(); {3568#true} is VALID [2018-11-23 13:18:53,325 INFO L273 TraceCheckUtils]: 1: Hoare triple {3568#true} assume true; {3568#true} is VALID [2018-11-23 13:18:53,325 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3568#true} {3568#true} #81#return; {3568#true} is VALID [2018-11-23 13:18:53,326 INFO L256 TraceCheckUtils]: 3: Hoare triple {3568#true} call #t~ret5 := main(); {3568#true} is VALID [2018-11-23 13:18:53,326 INFO L273 TraceCheckUtils]: 4: Hoare triple {3568#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {3568#true} is VALID [2018-11-23 13:18:53,326 INFO L273 TraceCheckUtils]: 5: Hoare triple {3568#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {3568#true} is VALID [2018-11-23 13:18:53,326 INFO L273 TraceCheckUtils]: 6: Hoare triple {3568#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {3568#true} is VALID [2018-11-23 13:18:53,326 INFO L273 TraceCheckUtils]: 7: Hoare triple {3568#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {3568#true} is VALID [2018-11-23 13:18:53,327 INFO L273 TraceCheckUtils]: 8: Hoare triple {3568#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:53,327 INFO L273 TraceCheckUtils]: 9: Hoare triple {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:53,328 INFO L273 TraceCheckUtils]: 10: Hoare triple {3570#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:53,328 INFO L273 TraceCheckUtils]: 11: Hoare triple {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:53,329 INFO L273 TraceCheckUtils]: 12: Hoare triple {3571#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:53,329 INFO L273 TraceCheckUtils]: 13: Hoare triple {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:53,330 INFO L273 TraceCheckUtils]: 14: Hoare triple {3572#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:53,330 INFO L273 TraceCheckUtils]: 15: Hoare triple {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:53,330 INFO L273 TraceCheckUtils]: 16: Hoare triple {3573#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:53,331 INFO L273 TraceCheckUtils]: 17: Hoare triple {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:53,331 INFO L273 TraceCheckUtils]: 18: Hoare triple {3574#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:53,332 INFO L273 TraceCheckUtils]: 19: Hoare triple {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:53,333 INFO L273 TraceCheckUtils]: 20: Hoare triple {3575#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:53,333 INFO L273 TraceCheckUtils]: 21: Hoare triple {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:53,334 INFO L273 TraceCheckUtils]: 22: Hoare triple {3576#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:53,335 INFO L273 TraceCheckUtils]: 23: Hoare triple {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:53,336 INFO L273 TraceCheckUtils]: 24: Hoare triple {3577#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:53,336 INFO L273 TraceCheckUtils]: 25: Hoare triple {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:53,337 INFO L273 TraceCheckUtils]: 26: Hoare triple {3578#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:53,338 INFO L273 TraceCheckUtils]: 27: Hoare triple {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:53,338 INFO L273 TraceCheckUtils]: 28: Hoare triple {3579#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:53,339 INFO L273 TraceCheckUtils]: 29: Hoare triple {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:53,340 INFO L273 TraceCheckUtils]: 30: Hoare triple {3580#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {3675#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:53,341 INFO L273 TraceCheckUtils]: 31: Hoare triple {3675#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !(~v~0 % 4294967296 < 268435455); {3569#false} is VALID [2018-11-23 13:18:53,341 INFO L256 TraceCheckUtils]: 32: Hoare triple {3569#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {3569#false} is VALID [2018-11-23 13:18:53,341 INFO L273 TraceCheckUtils]: 33: Hoare triple {3569#false} ~cond := #in~cond; {3569#false} is VALID [2018-11-23 13:18:53,341 INFO L273 TraceCheckUtils]: 34: Hoare triple {3569#false} assume 0 == ~cond; {3569#false} is VALID [2018-11-23 13:18:53,342 INFO L273 TraceCheckUtils]: 35: Hoare triple {3569#false} assume !false; {3569#false} is VALID [2018-11-23 13:18:53,344 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:18:53,348 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:18:53,348 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-11-23 13:18:53,349 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-11-23 13:18:53,349 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:18:53,349 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states. [2018-11-23 13:18:53,383 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:18:53,384 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-23 13:18:53,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-23 13:18:53,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-11-23 13:18:53,384 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 15 states. [2018-11-23 13:18:54,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:18:54,705 INFO L93 Difference]: Finished difference Result 91 states and 103 transitions. [2018-11-23 13:18:54,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 13:18:54,705 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-11-23 13:18:54,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:18:54,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 13:18:54,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 82 transitions. [2018-11-23 13:18:54,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 13:18:54,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 82 transitions. [2018-11-23 13:18:54,709 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 82 transitions. [2018-11-23 13:18:54,816 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:18:54,817 INFO L225 Difference]: With dead ends: 91 [2018-11-23 13:18:54,817 INFO L226 Difference]: Without dead ends: 53 [2018-11-23 13:18:54,819 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 35 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-11-23 13:18:54,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-23 13:18:54,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 45. [2018-11-23 13:18:54,838 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:18:54,838 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 45 states. [2018-11-23 13:18:54,838 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 45 states. [2018-11-23 13:18:54,838 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 45 states. [2018-11-23 13:18:54,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:18:54,840 INFO L93 Difference]: Finished difference Result 53 states and 60 transitions. [2018-11-23 13:18:54,840 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 60 transitions. [2018-11-23 13:18:54,840 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:18:54,841 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:18:54,841 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 53 states. [2018-11-23 13:18:54,841 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 53 states. [2018-11-23 13:18:54,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:18:54,842 INFO L93 Difference]: Finished difference Result 53 states and 60 transitions. [2018-11-23 13:18:54,842 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 60 transitions. [2018-11-23 13:18:54,842 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:18:54,842 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:18:54,843 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:18:54,843 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:18:54,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-11-23 13:18:54,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2018-11-23 13:18:54,844 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 36 [2018-11-23 13:18:54,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:18:54,844 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2018-11-23 13:18:54,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-23 13:18:54,844 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2018-11-23 13:18:54,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 13:18:54,845 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:18:54,845 INFO L402 BasicCegarLoop]: trace histogram [12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:18:54,845 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:18:54,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:18:54,846 INFO L82 PathProgramCache]: Analyzing trace with hash -1789778301, now seen corresponding path program 12 times [2018-11-23 13:18:54,846 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:18:54,846 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:18:54,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:54,847 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:18:54,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:54,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:18:55,501 INFO L256 TraceCheckUtils]: 0: Hoare triple {4000#true} call ULTIMATE.init(); {4000#true} is VALID [2018-11-23 13:18:55,501 INFO L273 TraceCheckUtils]: 1: Hoare triple {4000#true} assume true; {4000#true} is VALID [2018-11-23 13:18:55,502 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4000#true} {4000#true} #81#return; {4000#true} is VALID [2018-11-23 13:18:55,502 INFO L256 TraceCheckUtils]: 3: Hoare triple {4000#true} call #t~ret5 := main(); {4000#true} is VALID [2018-11-23 13:18:55,502 INFO L273 TraceCheckUtils]: 4: Hoare triple {4000#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,502 INFO L273 TraceCheckUtils]: 5: Hoare triple {4000#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,502 INFO L273 TraceCheckUtils]: 6: Hoare triple {4000#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,503 INFO L273 TraceCheckUtils]: 7: Hoare triple {4000#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,503 INFO L273 TraceCheckUtils]: 8: Hoare triple {4000#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:55,504 INFO L273 TraceCheckUtils]: 9: Hoare triple {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:55,504 INFO L273 TraceCheckUtils]: 10: Hoare triple {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:55,505 INFO L273 TraceCheckUtils]: 11: Hoare triple {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:55,505 INFO L273 TraceCheckUtils]: 12: Hoare triple {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:55,506 INFO L273 TraceCheckUtils]: 13: Hoare triple {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:55,506 INFO L273 TraceCheckUtils]: 14: Hoare triple {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:55,506 INFO L273 TraceCheckUtils]: 15: Hoare triple {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:55,507 INFO L273 TraceCheckUtils]: 16: Hoare triple {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:55,508 INFO L273 TraceCheckUtils]: 17: Hoare triple {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:55,509 INFO L273 TraceCheckUtils]: 18: Hoare triple {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:55,509 INFO L273 TraceCheckUtils]: 19: Hoare triple {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:55,510 INFO L273 TraceCheckUtils]: 20: Hoare triple {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:55,511 INFO L273 TraceCheckUtils]: 21: Hoare triple {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:55,511 INFO L273 TraceCheckUtils]: 22: Hoare triple {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:55,512 INFO L273 TraceCheckUtils]: 23: Hoare triple {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:55,513 INFO L273 TraceCheckUtils]: 24: Hoare triple {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:55,514 INFO L273 TraceCheckUtils]: 25: Hoare triple {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:55,514 INFO L273 TraceCheckUtils]: 26: Hoare triple {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:55,515 INFO L273 TraceCheckUtils]: 27: Hoare triple {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:55,516 INFO L273 TraceCheckUtils]: 28: Hoare triple {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:55,516 INFO L273 TraceCheckUtils]: 29: Hoare triple {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:55,517 INFO L273 TraceCheckUtils]: 30: Hoare triple {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:55,518 INFO L273 TraceCheckUtils]: 31: Hoare triple {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !!(~v~0 % 4294967296 < 268435455); {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:55,519 INFO L273 TraceCheckUtils]: 32: Hoare triple {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4014#(and (<= main_~v~0 12) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:18:55,520 INFO L273 TraceCheckUtils]: 33: Hoare triple {4014#(and (<= main_~v~0 12) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {4001#false} is VALID [2018-11-23 13:18:55,520 INFO L256 TraceCheckUtils]: 34: Hoare triple {4001#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {4001#false} is VALID [2018-11-23 13:18:55,520 INFO L273 TraceCheckUtils]: 35: Hoare triple {4001#false} ~cond := #in~cond; {4001#false} is VALID [2018-11-23 13:18:55,520 INFO L273 TraceCheckUtils]: 36: Hoare triple {4001#false} assume 0 == ~cond; {4001#false} is VALID [2018-11-23 13:18:55,520 INFO L273 TraceCheckUtils]: 37: Hoare triple {4001#false} assume !false; {4001#false} is VALID [2018-11-23 13:18:55,523 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:18:55,524 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:18:55,524 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:18:55,537 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 13:18:55,602 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-11-23 13:18:55,602 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:18:55,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:18:55,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:18:55,732 INFO L256 TraceCheckUtils]: 0: Hoare triple {4000#true} call ULTIMATE.init(); {4000#true} is VALID [2018-11-23 13:18:55,732 INFO L273 TraceCheckUtils]: 1: Hoare triple {4000#true} assume true; {4000#true} is VALID [2018-11-23 13:18:55,732 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4000#true} {4000#true} #81#return; {4000#true} is VALID [2018-11-23 13:18:55,733 INFO L256 TraceCheckUtils]: 3: Hoare triple {4000#true} call #t~ret5 := main(); {4000#true} is VALID [2018-11-23 13:18:55,733 INFO L273 TraceCheckUtils]: 4: Hoare triple {4000#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,733 INFO L273 TraceCheckUtils]: 5: Hoare triple {4000#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,733 INFO L273 TraceCheckUtils]: 6: Hoare triple {4000#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,733 INFO L273 TraceCheckUtils]: 7: Hoare triple {4000#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {4000#true} is VALID [2018-11-23 13:18:55,734 INFO L273 TraceCheckUtils]: 8: Hoare triple {4000#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:55,735 INFO L273 TraceCheckUtils]: 9: Hoare triple {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:55,735 INFO L273 TraceCheckUtils]: 10: Hoare triple {4002#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:55,736 INFO L273 TraceCheckUtils]: 11: Hoare triple {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:55,736 INFO L273 TraceCheckUtils]: 12: Hoare triple {4003#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:55,737 INFO L273 TraceCheckUtils]: 13: Hoare triple {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:55,737 INFO L273 TraceCheckUtils]: 14: Hoare triple {4004#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:55,738 INFO L273 TraceCheckUtils]: 15: Hoare triple {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:55,739 INFO L273 TraceCheckUtils]: 16: Hoare triple {4005#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:55,739 INFO L273 TraceCheckUtils]: 17: Hoare triple {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:55,740 INFO L273 TraceCheckUtils]: 18: Hoare triple {4006#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:55,741 INFO L273 TraceCheckUtils]: 19: Hoare triple {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:55,741 INFO L273 TraceCheckUtils]: 20: Hoare triple {4007#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:55,742 INFO L273 TraceCheckUtils]: 21: Hoare triple {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:55,743 INFO L273 TraceCheckUtils]: 22: Hoare triple {4008#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:55,762 INFO L273 TraceCheckUtils]: 23: Hoare triple {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:55,766 INFO L273 TraceCheckUtils]: 24: Hoare triple {4009#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:55,767 INFO L273 TraceCheckUtils]: 25: Hoare triple {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:55,767 INFO L273 TraceCheckUtils]: 26: Hoare triple {4010#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:55,768 INFO L273 TraceCheckUtils]: 27: Hoare triple {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:55,768 INFO L273 TraceCheckUtils]: 28: Hoare triple {4011#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:55,769 INFO L273 TraceCheckUtils]: 29: Hoare triple {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:55,769 INFO L273 TraceCheckUtils]: 30: Hoare triple {4012#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:55,769 INFO L273 TraceCheckUtils]: 31: Hoare triple {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !!(~v~0 % 4294967296 < 268435455); {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:55,770 INFO L273 TraceCheckUtils]: 32: Hoare triple {4013#(and (<= 11 main_~v~0) (<= main_~v~0 11))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4114#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:18:55,770 INFO L273 TraceCheckUtils]: 33: Hoare triple {4114#(and (<= 12 main_~v~0) (<= main_~v~0 12))} assume !(~v~0 % 4294967296 < 268435455); {4001#false} is VALID [2018-11-23 13:18:55,771 INFO L256 TraceCheckUtils]: 34: Hoare triple {4001#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {4001#false} is VALID [2018-11-23 13:18:55,771 INFO L273 TraceCheckUtils]: 35: Hoare triple {4001#false} ~cond := #in~cond; {4001#false} is VALID [2018-11-23 13:18:55,771 INFO L273 TraceCheckUtils]: 36: Hoare triple {4001#false} assume 0 == ~cond; {4001#false} is VALID [2018-11-23 13:18:55,771 INFO L273 TraceCheckUtils]: 37: Hoare triple {4001#false} assume !false; {4001#false} is VALID [2018-11-23 13:18:55,774 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:18:55,793 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:18:55,793 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-11-23 13:18:55,794 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-11-23 13:18:55,794 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:18:55,794 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 13:18:55,832 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:18:55,832 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 13:18:55,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 13:18:55,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2018-11-23 13:18:55,833 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand 16 states. [2018-11-23 13:18:57,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:18:57,089 INFO L93 Difference]: Finished difference Result 95 states and 107 transitions. [2018-11-23 13:18:57,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 13:18:57,090 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-11-23 13:18:57,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:18:57,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 13:18:57,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 84 transitions. [2018-11-23 13:18:57,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 13:18:57,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 84 transitions. [2018-11-23 13:18:57,092 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states and 84 transitions. [2018-11-23 13:18:57,367 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:18:57,368 INFO L225 Difference]: With dead ends: 95 [2018-11-23 13:18:57,368 INFO L226 Difference]: Without dead ends: 55 [2018-11-23 13:18:57,369 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 37 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2018-11-23 13:18:57,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-11-23 13:18:57,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 47. [2018-11-23 13:18:57,392 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:18:57,393 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand 47 states. [2018-11-23 13:18:57,393 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand 47 states. [2018-11-23 13:18:57,393 INFO L87 Difference]: Start difference. First operand 55 states. Second operand 47 states. [2018-11-23 13:18:57,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:18:57,394 INFO L93 Difference]: Finished difference Result 55 states and 62 transitions. [2018-11-23 13:18:57,394 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 62 transitions. [2018-11-23 13:18:57,395 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:18:57,395 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:18:57,395 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 55 states. [2018-11-23 13:18:57,395 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 55 states. [2018-11-23 13:18:57,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:18:57,396 INFO L93 Difference]: Finished difference Result 55 states and 62 transitions. [2018-11-23 13:18:57,396 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 62 transitions. [2018-11-23 13:18:57,396 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:18:57,397 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:18:57,397 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:18:57,397 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:18:57,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-11-23 13:18:57,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 51 transitions. [2018-11-23 13:18:57,398 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 51 transitions. Word has length 38 [2018-11-23 13:18:57,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:18:57,398 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 51 transitions. [2018-11-23 13:18:57,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 13:18:57,399 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2018-11-23 13:18:57,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-23 13:18:57,399 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:18:57,399 INFO L402 BasicCegarLoop]: trace histogram [13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:18:57,400 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:18:57,400 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:18:57,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1327509311, now seen corresponding path program 13 times [2018-11-23 13:18:57,400 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:18:57,400 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:18:57,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:57,401 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:18:57,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:57,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:18:58,618 INFO L256 TraceCheckUtils]: 0: Hoare triple {4452#true} call ULTIMATE.init(); {4452#true} is VALID [2018-11-23 13:18:58,618 INFO L273 TraceCheckUtils]: 1: Hoare triple {4452#true} assume true; {4452#true} is VALID [2018-11-23 13:18:58,618 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4452#true} {4452#true} #81#return; {4452#true} is VALID [2018-11-23 13:18:58,618 INFO L256 TraceCheckUtils]: 3: Hoare triple {4452#true} call #t~ret5 := main(); {4452#true} is VALID [2018-11-23 13:18:58,619 INFO L273 TraceCheckUtils]: 4: Hoare triple {4452#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,619 INFO L273 TraceCheckUtils]: 5: Hoare triple {4452#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,619 INFO L273 TraceCheckUtils]: 6: Hoare triple {4452#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,619 INFO L273 TraceCheckUtils]: 7: Hoare triple {4452#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,620 INFO L273 TraceCheckUtils]: 8: Hoare triple {4452#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:58,620 INFO L273 TraceCheckUtils]: 9: Hoare triple {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:58,621 INFO L273 TraceCheckUtils]: 10: Hoare triple {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:58,621 INFO L273 TraceCheckUtils]: 11: Hoare triple {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:58,622 INFO L273 TraceCheckUtils]: 12: Hoare triple {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:58,622 INFO L273 TraceCheckUtils]: 13: Hoare triple {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:58,623 INFO L273 TraceCheckUtils]: 14: Hoare triple {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:58,624 INFO L273 TraceCheckUtils]: 15: Hoare triple {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:58,624 INFO L273 TraceCheckUtils]: 16: Hoare triple {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:58,625 INFO L273 TraceCheckUtils]: 17: Hoare triple {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:58,626 INFO L273 TraceCheckUtils]: 18: Hoare triple {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:58,626 INFO L273 TraceCheckUtils]: 19: Hoare triple {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:58,627 INFO L273 TraceCheckUtils]: 20: Hoare triple {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:58,628 INFO L273 TraceCheckUtils]: 21: Hoare triple {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:58,629 INFO L273 TraceCheckUtils]: 22: Hoare triple {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:58,629 INFO L273 TraceCheckUtils]: 23: Hoare triple {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:58,630 INFO L273 TraceCheckUtils]: 24: Hoare triple {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:58,631 INFO L273 TraceCheckUtils]: 25: Hoare triple {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:58,631 INFO L273 TraceCheckUtils]: 26: Hoare triple {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:58,632 INFO L273 TraceCheckUtils]: 27: Hoare triple {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:58,633 INFO L273 TraceCheckUtils]: 28: Hoare triple {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:58,634 INFO L273 TraceCheckUtils]: 29: Hoare triple {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:58,634 INFO L273 TraceCheckUtils]: 30: Hoare triple {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:58,635 INFO L273 TraceCheckUtils]: 31: Hoare triple {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !!(~v~0 % 4294967296 < 268435455); {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:58,636 INFO L273 TraceCheckUtils]: 32: Hoare triple {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:18:58,636 INFO L273 TraceCheckUtils]: 33: Hoare triple {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} assume !!(~v~0 % 4294967296 < 268435455); {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:18:58,637 INFO L273 TraceCheckUtils]: 34: Hoare triple {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4467#(and (<= main_~v~0 13) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:18:58,638 INFO L273 TraceCheckUtils]: 35: Hoare triple {4467#(and (<= main_~v~0 13) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {4453#false} is VALID [2018-11-23 13:18:58,638 INFO L256 TraceCheckUtils]: 36: Hoare triple {4453#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {4453#false} is VALID [2018-11-23 13:18:58,639 INFO L273 TraceCheckUtils]: 37: Hoare triple {4453#false} ~cond := #in~cond; {4453#false} is VALID [2018-11-23 13:18:58,639 INFO L273 TraceCheckUtils]: 38: Hoare triple {4453#false} assume 0 == ~cond; {4453#false} is VALID [2018-11-23 13:18:58,639 INFO L273 TraceCheckUtils]: 39: Hoare triple {4453#false} assume !false; {4453#false} is VALID [2018-11-23 13:18:58,642 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:18:58,642 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:18:58,642 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:18:58,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:18:58,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:18:58,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:18:58,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:18:58,787 INFO L256 TraceCheckUtils]: 0: Hoare triple {4452#true} call ULTIMATE.init(); {4452#true} is VALID [2018-11-23 13:18:58,788 INFO L273 TraceCheckUtils]: 1: Hoare triple {4452#true} assume true; {4452#true} is VALID [2018-11-23 13:18:58,788 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4452#true} {4452#true} #81#return; {4452#true} is VALID [2018-11-23 13:18:58,788 INFO L256 TraceCheckUtils]: 3: Hoare triple {4452#true} call #t~ret5 := main(); {4452#true} is VALID [2018-11-23 13:18:58,788 INFO L273 TraceCheckUtils]: 4: Hoare triple {4452#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,788 INFO L273 TraceCheckUtils]: 5: Hoare triple {4452#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,788 INFO L273 TraceCheckUtils]: 6: Hoare triple {4452#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,789 INFO L273 TraceCheckUtils]: 7: Hoare triple {4452#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {4452#true} is VALID [2018-11-23 13:18:58,789 INFO L273 TraceCheckUtils]: 8: Hoare triple {4452#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:58,789 INFO L273 TraceCheckUtils]: 9: Hoare triple {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:18:58,790 INFO L273 TraceCheckUtils]: 10: Hoare triple {4454#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:58,791 INFO L273 TraceCheckUtils]: 11: Hoare triple {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:18:58,791 INFO L273 TraceCheckUtils]: 12: Hoare triple {4455#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:58,792 INFO L273 TraceCheckUtils]: 13: Hoare triple {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:18:58,793 INFO L273 TraceCheckUtils]: 14: Hoare triple {4456#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:58,793 INFO L273 TraceCheckUtils]: 15: Hoare triple {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:18:58,794 INFO L273 TraceCheckUtils]: 16: Hoare triple {4457#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:58,795 INFO L273 TraceCheckUtils]: 17: Hoare triple {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:18:58,796 INFO L273 TraceCheckUtils]: 18: Hoare triple {4458#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:58,796 INFO L273 TraceCheckUtils]: 19: Hoare triple {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:18:58,797 INFO L273 TraceCheckUtils]: 20: Hoare triple {4459#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:58,798 INFO L273 TraceCheckUtils]: 21: Hoare triple {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:18:58,798 INFO L273 TraceCheckUtils]: 22: Hoare triple {4460#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:58,799 INFO L273 TraceCheckUtils]: 23: Hoare triple {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:18:58,800 INFO L273 TraceCheckUtils]: 24: Hoare triple {4461#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:58,801 INFO L273 TraceCheckUtils]: 25: Hoare triple {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:18:58,801 INFO L273 TraceCheckUtils]: 26: Hoare triple {4462#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:58,802 INFO L273 TraceCheckUtils]: 27: Hoare triple {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:18:58,803 INFO L273 TraceCheckUtils]: 28: Hoare triple {4463#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:58,803 INFO L273 TraceCheckUtils]: 29: Hoare triple {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:18:58,804 INFO L273 TraceCheckUtils]: 30: Hoare triple {4464#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:58,805 INFO L273 TraceCheckUtils]: 31: Hoare triple {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !!(~v~0 % 4294967296 < 268435455); {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:18:58,806 INFO L273 TraceCheckUtils]: 32: Hoare triple {4465#(and (<= 11 main_~v~0) (<= main_~v~0 11))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:18:58,806 INFO L273 TraceCheckUtils]: 33: Hoare triple {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} assume !!(~v~0 % 4294967296 < 268435455); {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:18:58,807 INFO L273 TraceCheckUtils]: 34: Hoare triple {4466#(and (<= 12 main_~v~0) (<= main_~v~0 12))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4573#(and (<= main_~v~0 13) (<= 13 main_~v~0))} is VALID [2018-11-23 13:18:58,808 INFO L273 TraceCheckUtils]: 35: Hoare triple {4573#(and (<= main_~v~0 13) (<= 13 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {4453#false} is VALID [2018-11-23 13:18:58,808 INFO L256 TraceCheckUtils]: 36: Hoare triple {4453#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {4453#false} is VALID [2018-11-23 13:18:58,808 INFO L273 TraceCheckUtils]: 37: Hoare triple {4453#false} ~cond := #in~cond; {4453#false} is VALID [2018-11-23 13:18:58,808 INFO L273 TraceCheckUtils]: 38: Hoare triple {4453#false} assume 0 == ~cond; {4453#false} is VALID [2018-11-23 13:18:58,809 INFO L273 TraceCheckUtils]: 39: Hoare triple {4453#false} assume !false; {4453#false} is VALID [2018-11-23 13:18:58,812 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:18:58,830 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:18:58,831 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-11-23 13:18:58,831 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-11-23 13:18:58,831 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:18:58,831 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 13:18:58,871 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:18:58,871 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 13:18:58,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 13:18:58,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-11-23 13:18:58,872 INFO L87 Difference]: Start difference. First operand 47 states and 51 transitions. Second operand 17 states. [2018-11-23 13:19:00,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:19:00,088 INFO L93 Difference]: Finished difference Result 99 states and 111 transitions. [2018-11-23 13:19:00,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 13:19:00,088 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-11-23 13:19:00,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:19:00,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 13:19:00,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 86 transitions. [2018-11-23 13:19:00,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 13:19:00,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 86 transitions. [2018-11-23 13:19:00,092 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states and 86 transitions. [2018-11-23 13:19:00,524 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:19:00,526 INFO L225 Difference]: With dead ends: 99 [2018-11-23 13:19:00,526 INFO L226 Difference]: Without dead ends: 57 [2018-11-23 13:19:00,527 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 39 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-11-23 13:19:00,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-11-23 13:19:00,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 49. [2018-11-23 13:19:00,564 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:19:00,564 INFO L82 GeneralOperation]: Start isEquivalent. First operand 57 states. Second operand 49 states. [2018-11-23 13:19:00,564 INFO L74 IsIncluded]: Start isIncluded. First operand 57 states. Second operand 49 states. [2018-11-23 13:19:00,564 INFO L87 Difference]: Start difference. First operand 57 states. Second operand 49 states. [2018-11-23 13:19:00,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:19:00,566 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2018-11-23 13:19:00,566 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 64 transitions. [2018-11-23 13:19:00,566 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:19:00,566 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:19:00,566 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand 57 states. [2018-11-23 13:19:00,566 INFO L87 Difference]: Start difference. First operand 49 states. Second operand 57 states. [2018-11-23 13:19:00,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:19:00,568 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2018-11-23 13:19:00,568 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 64 transitions. [2018-11-23 13:19:00,568 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:19:00,568 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:19:00,568 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:19:00,568 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:19:00,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-11-23 13:19:00,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 53 transitions. [2018-11-23 13:19:00,570 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 53 transitions. Word has length 40 [2018-11-23 13:19:00,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:19:00,570 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 53 transitions. [2018-11-23 13:19:00,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 13:19:00,570 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 53 transitions. [2018-11-23 13:19:00,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-23 13:19:00,571 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:19:00,571 INFO L402 BasicCegarLoop]: trace histogram [14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:19:00,571 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:19:00,571 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:19:00,572 INFO L82 PathProgramCache]: Analyzing trace with hash 531358591, now seen corresponding path program 14 times [2018-11-23 13:19:00,572 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:19:00,572 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:19:00,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:19:00,573 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:19:00,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:19:00,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:19:01,351 INFO L256 TraceCheckUtils]: 0: Hoare triple {4924#true} call ULTIMATE.init(); {4924#true} is VALID [2018-11-23 13:19:01,351 INFO L273 TraceCheckUtils]: 1: Hoare triple {4924#true} assume true; {4924#true} is VALID [2018-11-23 13:19:01,351 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4924#true} {4924#true} #81#return; {4924#true} is VALID [2018-11-23 13:19:01,352 INFO L256 TraceCheckUtils]: 3: Hoare triple {4924#true} call #t~ret5 := main(); {4924#true} is VALID [2018-11-23 13:19:01,352 INFO L273 TraceCheckUtils]: 4: Hoare triple {4924#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,352 INFO L273 TraceCheckUtils]: 5: Hoare triple {4924#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,352 INFO L273 TraceCheckUtils]: 6: Hoare triple {4924#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,353 INFO L273 TraceCheckUtils]: 7: Hoare triple {4924#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,353 INFO L273 TraceCheckUtils]: 8: Hoare triple {4924#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:19:01,354 INFO L273 TraceCheckUtils]: 9: Hoare triple {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:19:01,354 INFO L273 TraceCheckUtils]: 10: Hoare triple {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:19:01,355 INFO L273 TraceCheckUtils]: 11: Hoare triple {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:19:01,355 INFO L273 TraceCheckUtils]: 12: Hoare triple {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:19:01,356 INFO L273 TraceCheckUtils]: 13: Hoare triple {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:19:01,356 INFO L273 TraceCheckUtils]: 14: Hoare triple {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:19:01,357 INFO L273 TraceCheckUtils]: 15: Hoare triple {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:19:01,358 INFO L273 TraceCheckUtils]: 16: Hoare triple {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:19:01,359 INFO L273 TraceCheckUtils]: 17: Hoare triple {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:19:01,360 INFO L273 TraceCheckUtils]: 18: Hoare triple {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:19:01,360 INFO L273 TraceCheckUtils]: 19: Hoare triple {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:19:01,361 INFO L273 TraceCheckUtils]: 20: Hoare triple {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:19:01,362 INFO L273 TraceCheckUtils]: 21: Hoare triple {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:19:01,381 INFO L273 TraceCheckUtils]: 22: Hoare triple {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:19:01,395 INFO L273 TraceCheckUtils]: 23: Hoare triple {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:19:01,408 INFO L273 TraceCheckUtils]: 24: Hoare triple {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:19:01,416 INFO L273 TraceCheckUtils]: 25: Hoare triple {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:19:01,429 INFO L273 TraceCheckUtils]: 26: Hoare triple {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:19:01,442 INFO L273 TraceCheckUtils]: 27: Hoare triple {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:19:01,451 INFO L273 TraceCheckUtils]: 28: Hoare triple {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:19:01,464 INFO L273 TraceCheckUtils]: 29: Hoare triple {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:19:01,470 INFO L273 TraceCheckUtils]: 30: Hoare triple {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:19:01,470 INFO L273 TraceCheckUtils]: 31: Hoare triple {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !!(~v~0 % 4294967296 < 268435455); {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:19:01,471 INFO L273 TraceCheckUtils]: 32: Hoare triple {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:19:01,471 INFO L273 TraceCheckUtils]: 33: Hoare triple {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} assume !!(~v~0 % 4294967296 < 268435455); {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:19:01,472 INFO L273 TraceCheckUtils]: 34: Hoare triple {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} is VALID [2018-11-23 13:19:01,472 INFO L273 TraceCheckUtils]: 35: Hoare triple {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} is VALID [2018-11-23 13:19:01,473 INFO L273 TraceCheckUtils]: 36: Hoare triple {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4940#(and (<= main_~v~0 14) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:19:01,474 INFO L273 TraceCheckUtils]: 37: Hoare triple {4940#(and (<= main_~v~0 14) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {4925#false} is VALID [2018-11-23 13:19:01,474 INFO L256 TraceCheckUtils]: 38: Hoare triple {4925#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {4925#false} is VALID [2018-11-23 13:19:01,474 INFO L273 TraceCheckUtils]: 39: Hoare triple {4925#false} ~cond := #in~cond; {4925#false} is VALID [2018-11-23 13:19:01,474 INFO L273 TraceCheckUtils]: 40: Hoare triple {4925#false} assume 0 == ~cond; {4925#false} is VALID [2018-11-23 13:19:01,475 INFO L273 TraceCheckUtils]: 41: Hoare triple {4925#false} assume !false; {4925#false} is VALID [2018-11-23 13:19:01,479 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:19:01,479 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:19:01,479 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:19:01,502 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 13:19:01,516 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 13:19:01,516 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 13:19:01,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:19:01,532 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 13:19:01,769 INFO L256 TraceCheckUtils]: 0: Hoare triple {4924#true} call ULTIMATE.init(); {4924#true} is VALID [2018-11-23 13:19:01,769 INFO L273 TraceCheckUtils]: 1: Hoare triple {4924#true} assume true; {4924#true} is VALID [2018-11-23 13:19:01,769 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4924#true} {4924#true} #81#return; {4924#true} is VALID [2018-11-23 13:19:01,770 INFO L256 TraceCheckUtils]: 3: Hoare triple {4924#true} call #t~ret5 := main(); {4924#true} is VALID [2018-11-23 13:19:01,770 INFO L273 TraceCheckUtils]: 4: Hoare triple {4924#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,770 INFO L273 TraceCheckUtils]: 5: Hoare triple {4924#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,770 INFO L273 TraceCheckUtils]: 6: Hoare triple {4924#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,770 INFO L273 TraceCheckUtils]: 7: Hoare triple {4924#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {4924#true} is VALID [2018-11-23 13:19:01,771 INFO L273 TraceCheckUtils]: 8: Hoare triple {4924#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:19:01,771 INFO L273 TraceCheckUtils]: 9: Hoare triple {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:19:01,772 INFO L273 TraceCheckUtils]: 10: Hoare triple {4926#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:19:01,773 INFO L273 TraceCheckUtils]: 11: Hoare triple {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:19:01,773 INFO L273 TraceCheckUtils]: 12: Hoare triple {4927#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:19:01,774 INFO L273 TraceCheckUtils]: 13: Hoare triple {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:19:01,775 INFO L273 TraceCheckUtils]: 14: Hoare triple {4928#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:19:01,775 INFO L273 TraceCheckUtils]: 15: Hoare triple {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:19:01,776 INFO L273 TraceCheckUtils]: 16: Hoare triple {4929#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:19:01,777 INFO L273 TraceCheckUtils]: 17: Hoare triple {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:19:01,778 INFO L273 TraceCheckUtils]: 18: Hoare triple {4930#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:19:01,778 INFO L273 TraceCheckUtils]: 19: Hoare triple {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:19:01,779 INFO L273 TraceCheckUtils]: 20: Hoare triple {4931#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:19:01,780 INFO L273 TraceCheckUtils]: 21: Hoare triple {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:19:01,780 INFO L273 TraceCheckUtils]: 22: Hoare triple {4932#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:19:01,781 INFO L273 TraceCheckUtils]: 23: Hoare triple {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:19:01,782 INFO L273 TraceCheckUtils]: 24: Hoare triple {4933#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:19:01,782 INFO L273 TraceCheckUtils]: 25: Hoare triple {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:19:01,783 INFO L273 TraceCheckUtils]: 26: Hoare triple {4934#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:19:01,784 INFO L273 TraceCheckUtils]: 27: Hoare triple {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:19:01,785 INFO L273 TraceCheckUtils]: 28: Hoare triple {4935#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:19:01,785 INFO L273 TraceCheckUtils]: 29: Hoare triple {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:19:01,786 INFO L273 TraceCheckUtils]: 30: Hoare triple {4936#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:19:01,787 INFO L273 TraceCheckUtils]: 31: Hoare triple {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !!(~v~0 % 4294967296 < 268435455); {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:19:01,787 INFO L273 TraceCheckUtils]: 32: Hoare triple {4937#(and (<= 11 main_~v~0) (<= main_~v~0 11))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:19:01,788 INFO L273 TraceCheckUtils]: 33: Hoare triple {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} assume !!(~v~0 % 4294967296 < 268435455); {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:19:01,789 INFO L273 TraceCheckUtils]: 34: Hoare triple {4938#(and (<= 12 main_~v~0) (<= main_~v~0 12))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} is VALID [2018-11-23 13:19:01,790 INFO L273 TraceCheckUtils]: 35: Hoare triple {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} is VALID [2018-11-23 13:19:01,790 INFO L273 TraceCheckUtils]: 36: Hoare triple {4939#(and (<= main_~v~0 13) (<= 13 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5052#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2018-11-23 13:19:01,791 INFO L273 TraceCheckUtils]: 37: Hoare triple {5052#(and (<= main_~v~0 14) (<= 14 main_~v~0))} assume !(~v~0 % 4294967296 < 268435455); {4925#false} is VALID [2018-11-23 13:19:01,791 INFO L256 TraceCheckUtils]: 38: Hoare triple {4925#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {4925#false} is VALID [2018-11-23 13:19:01,792 INFO L273 TraceCheckUtils]: 39: Hoare triple {4925#false} ~cond := #in~cond; {4925#false} is VALID [2018-11-23 13:19:01,792 INFO L273 TraceCheckUtils]: 40: Hoare triple {4925#false} assume 0 == ~cond; {4925#false} is VALID [2018-11-23 13:19:01,792 INFO L273 TraceCheckUtils]: 41: Hoare triple {4925#false} assume !false; {4925#false} is VALID [2018-11-23 13:19:01,795 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:19:01,813 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 13:19:01,814 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-11-23 13:19:01,814 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 42 [2018-11-23 13:19:01,814 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 13:19:01,814 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 13:19:01,856 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:19:01,856 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 13:19:01,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 13:19:01,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-11-23 13:19:01,857 INFO L87 Difference]: Start difference. First operand 49 states and 53 transitions. Second operand 18 states. [2018-11-23 13:19:03,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:19:03,258 INFO L93 Difference]: Finished difference Result 103 states and 115 transitions. [2018-11-23 13:19:03,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 13:19:03,259 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 42 [2018-11-23 13:19:03,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:19:03,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 13:19:03,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 88 transitions. [2018-11-23 13:19:03,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-23 13:19:03,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 88 transitions. [2018-11-23 13:19:03,262 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 88 transitions. [2018-11-23 13:19:03,340 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 13:19:03,341 INFO L225 Difference]: With dead ends: 103 [2018-11-23 13:19:03,342 INFO L226 Difference]: Without dead ends: 59 [2018-11-23 13:19:03,343 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 41 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-11-23 13:19:03,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-11-23 13:19:03,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 51. [2018-11-23 13:19:03,369 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 13:19:03,369 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand 51 states. [2018-11-23 13:19:03,369 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand 51 states. [2018-11-23 13:19:03,369 INFO L87 Difference]: Start difference. First operand 59 states. Second operand 51 states. [2018-11-23 13:19:03,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:19:03,371 INFO L93 Difference]: Finished difference Result 59 states and 66 transitions. [2018-11-23 13:19:03,371 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 66 transitions. [2018-11-23 13:19:03,372 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:19:03,372 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:19:03,372 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand 59 states. [2018-11-23 13:19:03,372 INFO L87 Difference]: Start difference. First operand 51 states. Second operand 59 states. [2018-11-23 13:19:03,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:19:03,373 INFO L93 Difference]: Finished difference Result 59 states and 66 transitions. [2018-11-23 13:19:03,374 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 66 transitions. [2018-11-23 13:19:03,374 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 13:19:03,374 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 13:19:03,374 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 13:19:03,374 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 13:19:03,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-11-23 13:19:03,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 55 transitions. [2018-11-23 13:19:03,376 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 55 transitions. Word has length 42 [2018-11-23 13:19:03,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:19:03,376 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 55 transitions. [2018-11-23 13:19:03,376 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 13:19:03,376 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 55 transitions. [2018-11-23 13:19:03,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 13:19:03,377 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:19:03,377 INFO L402 BasicCegarLoop]: trace histogram [15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:19:03,377 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:19:03,377 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:19:03,377 INFO L82 PathProgramCache]: Analyzing trace with hash 197017277, now seen corresponding path program 15 times [2018-11-23 13:19:03,377 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:19:03,378 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:19:03,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:19:03,378 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:19:03,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:19:03,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:19:04,368 INFO L256 TraceCheckUtils]: 0: Hoare triple {5416#true} call ULTIMATE.init(); {5416#true} is VALID [2018-11-23 13:19:04,368 INFO L273 TraceCheckUtils]: 1: Hoare triple {5416#true} assume true; {5416#true} is VALID [2018-11-23 13:19:04,368 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5416#true} {5416#true} #81#return; {5416#true} is VALID [2018-11-23 13:19:04,368 INFO L256 TraceCheckUtils]: 3: Hoare triple {5416#true} call #t~ret5 := main(); {5416#true} is VALID [2018-11-23 13:19:04,369 INFO L273 TraceCheckUtils]: 4: Hoare triple {5416#true} ~x~0 := 0;~y~0 := 0;~z~0 := 0;~w~0 := 0;~v~0 := 0;~w~0 := 0; {5416#true} is VALID [2018-11-23 13:19:04,369 INFO L273 TraceCheckUtils]: 5: Hoare triple {5416#true} assume !!(~w~0 % 4294967296 < 268435455);~x~0 := 0; {5416#true} is VALID [2018-11-23 13:19:04,369 INFO L273 TraceCheckUtils]: 6: Hoare triple {5416#true} assume !!(~x~0 % 4294967296 < 10);~y~0 := 0; {5416#true} is VALID [2018-11-23 13:19:04,369 INFO L273 TraceCheckUtils]: 7: Hoare triple {5416#true} assume !!(~y~0 % 4294967296 < 10);~z~0 := 0; {5416#true} is VALID [2018-11-23 13:19:04,370 INFO L273 TraceCheckUtils]: 8: Hoare triple {5416#true} assume !!(~z~0 % 4294967296 < 10);~v~0 := 0; {5418#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:19:04,370 INFO L273 TraceCheckUtils]: 9: Hoare triple {5418#(and (<= main_~v~0 0) (<= 0 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5418#(and (<= main_~v~0 0) (<= 0 main_~v~0))} is VALID [2018-11-23 13:19:04,371 INFO L273 TraceCheckUtils]: 10: Hoare triple {5418#(and (<= main_~v~0 0) (<= 0 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5419#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:19:04,371 INFO L273 TraceCheckUtils]: 11: Hoare triple {5419#(and (<= main_~v~0 1) (<= 1 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5419#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2018-11-23 13:19:04,372 INFO L273 TraceCheckUtils]: 12: Hoare triple {5419#(and (<= main_~v~0 1) (<= 1 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5420#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:19:04,372 INFO L273 TraceCheckUtils]: 13: Hoare triple {5420#(and (<= main_~v~0 2) (<= 2 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5420#(and (<= main_~v~0 2) (<= 2 main_~v~0))} is VALID [2018-11-23 13:19:04,373 INFO L273 TraceCheckUtils]: 14: Hoare triple {5420#(and (<= main_~v~0 2) (<= 2 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5421#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:19:04,374 INFO L273 TraceCheckUtils]: 15: Hoare triple {5421#(and (<= main_~v~0 3) (<= 3 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5421#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2018-11-23 13:19:04,374 INFO L273 TraceCheckUtils]: 16: Hoare triple {5421#(and (<= main_~v~0 3) (<= 3 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5422#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:19:04,375 INFO L273 TraceCheckUtils]: 17: Hoare triple {5422#(and (<= main_~v~0 4) (<= 4 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5422#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2018-11-23 13:19:04,376 INFO L273 TraceCheckUtils]: 18: Hoare triple {5422#(and (<= main_~v~0 4) (<= 4 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5423#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:19:04,376 INFO L273 TraceCheckUtils]: 19: Hoare triple {5423#(and (<= 5 main_~v~0) (<= main_~v~0 5))} assume !!(~v~0 % 4294967296 < 268435455); {5423#(and (<= 5 main_~v~0) (<= main_~v~0 5))} is VALID [2018-11-23 13:19:04,377 INFO L273 TraceCheckUtils]: 20: Hoare triple {5423#(and (<= 5 main_~v~0) (<= main_~v~0 5))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5424#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:19:04,378 INFO L273 TraceCheckUtils]: 21: Hoare triple {5424#(and (<= main_~v~0 6) (<= 6 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5424#(and (<= main_~v~0 6) (<= 6 main_~v~0))} is VALID [2018-11-23 13:19:04,378 INFO L273 TraceCheckUtils]: 22: Hoare triple {5424#(and (<= main_~v~0 6) (<= 6 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5425#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:19:04,379 INFO L273 TraceCheckUtils]: 23: Hoare triple {5425#(and (<= main_~v~0 7) (<= 7 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5425#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2018-11-23 13:19:04,380 INFO L273 TraceCheckUtils]: 24: Hoare triple {5425#(and (<= main_~v~0 7) (<= 7 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5426#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:19:04,381 INFO L273 TraceCheckUtils]: 25: Hoare triple {5426#(and (<= main_~v~0 8) (<= 8 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5426#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2018-11-23 13:19:04,381 INFO L273 TraceCheckUtils]: 26: Hoare triple {5426#(and (<= main_~v~0 8) (<= 8 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5427#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:19:04,382 INFO L273 TraceCheckUtils]: 27: Hoare triple {5427#(and (<= 9 main_~v~0) (<= main_~v~0 9))} assume !!(~v~0 % 4294967296 < 268435455); {5427#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2018-11-23 13:19:04,383 INFO L273 TraceCheckUtils]: 28: Hoare triple {5427#(and (<= 9 main_~v~0) (<= main_~v~0 9))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5428#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:19:04,383 INFO L273 TraceCheckUtils]: 29: Hoare triple {5428#(and (<= 10 main_~v~0) (<= main_~v~0 10))} assume !!(~v~0 % 4294967296 < 268435455); {5428#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2018-11-23 13:19:04,384 INFO L273 TraceCheckUtils]: 30: Hoare triple {5428#(and (<= 10 main_~v~0) (<= main_~v~0 10))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5429#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:19:04,385 INFO L273 TraceCheckUtils]: 31: Hoare triple {5429#(and (<= 11 main_~v~0) (<= main_~v~0 11))} assume !!(~v~0 % 4294967296 < 268435455); {5429#(and (<= 11 main_~v~0) (<= main_~v~0 11))} is VALID [2018-11-23 13:19:04,385 INFO L273 TraceCheckUtils]: 32: Hoare triple {5429#(and (<= 11 main_~v~0) (<= main_~v~0 11))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5430#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:19:04,386 INFO L273 TraceCheckUtils]: 33: Hoare triple {5430#(and (<= 12 main_~v~0) (<= main_~v~0 12))} assume !!(~v~0 % 4294967296 < 268435455); {5430#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2018-11-23 13:19:04,387 INFO L273 TraceCheckUtils]: 34: Hoare triple {5430#(and (<= 12 main_~v~0) (<= main_~v~0 12))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5431#(and (<= main_~v~0 13) (<= 13 main_~v~0))} is VALID [2018-11-23 13:19:04,388 INFO L273 TraceCheckUtils]: 35: Hoare triple {5431#(and (<= main_~v~0 13) (<= 13 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5431#(and (<= main_~v~0 13) (<= 13 main_~v~0))} is VALID [2018-11-23 13:19:04,388 INFO L273 TraceCheckUtils]: 36: Hoare triple {5431#(and (<= main_~v~0 13) (<= 13 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5432#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2018-11-23 13:19:04,389 INFO L273 TraceCheckUtils]: 37: Hoare triple {5432#(and (<= main_~v~0 14) (<= 14 main_~v~0))} assume !!(~v~0 % 4294967296 < 268435455); {5432#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2018-11-23 13:19:04,390 INFO L273 TraceCheckUtils]: 38: Hoare triple {5432#(and (<= main_~v~0 14) (<= 14 main_~v~0))} #t~post4 := ~v~0;~v~0 := 1 + #t~post4;havoc #t~post4; {5433#(and (<= main_~v~0 15) (< 0 (+ (div main_~v~0 4294967296) 1)))} is VALID [2018-11-23 13:19:04,391 INFO L273 TraceCheckUtils]: 39: Hoare triple {5433#(and (<= main_~v~0 15) (< 0 (+ (div main_~v~0 4294967296) 1)))} assume !(~v~0 % 4294967296 < 268435455); {5417#false} is VALID [2018-11-23 13:19:04,391 INFO L256 TraceCheckUtils]: 40: Hoare triple {5417#false} call __VERIFIER_assert((if 0 == (if ~v~0 % 4294967296 < 0 && 0 != ~v~0 % 4294967296 % 4 then ~v~0 % 4294967296 % 4 - 4 else ~v~0 % 4294967296 % 4) % 4294967296 then 1 else 0)); {5417#false} is VALID [2018-11-23 13:19:04,391 INFO L273 TraceCheckUtils]: 41: Hoare triple {5417#false} ~cond := #in~cond; {5417#false} is VALID [2018-11-23 13:19:04,391 INFO L273 TraceCheckUtils]: 42: Hoare triple {5417#false} assume 0 == ~cond; {5417#false} is VALID [2018-11-23 13:19:04,391 INFO L273 TraceCheckUtils]: 43: Hoare triple {5417#false} assume !false; {5417#false} is VALID [2018-11-23 13:19:04,395 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:19:04,396 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 13:19:04,396 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 13:19:04,412 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2