java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --traceabstraction.dump.automata.to.the.following.directory dump -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/length_test03_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c5b1954-m [2018-10-10 11:30:32,817 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-10 11:30:32,819 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-10 11:30:32,836 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-10 11:30:32,836 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-10 11:30:32,839 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-10 11:30:32,841 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-10 11:30:32,843 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-10 11:30:32,847 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-10 11:30:32,848 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-10 11:30:32,849 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-10 11:30:32,850 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-10 11:30:32,851 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-10 11:30:32,852 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-10 11:30:32,857 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-10 11:30:32,858 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-10 11:30:32,859 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-10 11:30:32,861 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-10 11:30:32,863 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-10 11:30:32,865 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-10 11:30:32,866 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-10 11:30:32,867 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-10 11:30:32,869 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-10 11:30:32,870 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-10 11:30:32,870 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-10 11:30:32,871 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-10 11:30:32,872 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-10 11:30:32,873 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-10 11:30:32,873 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-10 11:30:32,874 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-10 11:30:32,875 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-10 11:30:32,875 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-10 11:30:32,876 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-10 11:30:32,876 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-10 11:30:32,879 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-10 11:30:32,880 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-10 11:30:32,880 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-10-10 11:30:32,895 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-10 11:30:32,895 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-10 11:30:32,896 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-10 11:30:32,897 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-10 11:30:32,897 INFO L133 SettingsManager]: * Use SBE=true [2018-10-10 11:30:32,897 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-10 11:30:32,897 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-10 11:30:32,898 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-10 11:30:32,898 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-10 11:30:32,898 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-10 11:30:32,898 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-10 11:30:32,898 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-10 11:30:32,899 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-10 11:30:32,899 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-10 11:30:32,899 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-10 11:30:32,899 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-10-10 11:30:32,899 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-10-10 11:30:32,900 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-10 11:30:32,900 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-10 11:30:32,900 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-10 11:30:32,900 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-10 11:30:32,900 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-10 11:30:32,901 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 11:30:32,901 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-10 11:30:32,901 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-10 11:30:32,901 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-10-10 11:30:32,902 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-10 11:30:32,902 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-10-10 11:30:32,902 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Dump automata to the following directory -> dump [2018-10-10 11:30:32,969 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-10 11:30:32,985 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-10 11:30:32,990 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-10 11:30:32,991 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-10 11:30:32,992 INFO L276 PluginConnector]: CDTParser initialized [2018-10-10 11:30:32,993 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/length_test03_false-valid-memtrack.i [2018-10-10 11:30:33,290 INFO L217 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cf8881856/2012500d058b4ac688da34fe4ddf69fa/FLAG992d2e49e [2018-10-10 11:30:33,530 INFO L289 CDTParser]: Found 1 translation units. [2018-10-10 11:30:33,531 INFO L157 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/memsafety-ext2/length_test03_false-valid-memtrack.i [2018-10-10 11:30:33,544 INFO L337 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cf8881856/2012500d058b4ac688da34fe4ddf69fa/FLAG992d2e49e [2018-10-10 11:30:33,558 INFO L345 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cf8881856/2012500d058b4ac688da34fe4ddf69fa [2018-10-10 11:30:33,569 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-10 11:30:33,570 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-10-10 11:30:33,571 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-10 11:30:33,571 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-10 11:30:33,575 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-10 11:30:33,576 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 11:30:33" (1/1) ... [2018-10-10 11:30:33,579 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c589107 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:33, skipping insertion in model container [2018-10-10 11:30:33,580 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 11:30:33" (1/1) ... [2018-10-10 11:30:33,589 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-10 11:30:33,635 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-10 11:30:33,917 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 11:30:33,934 INFO L189 MainTranslator]: Completed pre-run [2018-10-10 11:30:34,021 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 11:30:34,089 INFO L193 MainTranslator]: Completed translation [2018-10-10 11:30:34,090 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34 WrapperNode [2018-10-10 11:30:34,090 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-10 11:30:34,091 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-10 11:30:34,092 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-10 11:30:34,092 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-10 11:30:34,103 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,147 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,219 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-10 11:30:34,222 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-10 11:30:34,222 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-10 11:30:34,223 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-10 11:30:34,358 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,358 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,368 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,368 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,390 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,401 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,407 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... [2018-10-10 11:30:34,413 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-10 11:30:34,414 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-10 11:30:34,414 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-10 11:30:34,414 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-10 11:30:34,415 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 11:30:34,500 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-10 11:30:34,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-10 11:30:36,785 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-10 11:30:36,786 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 11:30:36 BoogieIcfgContainer [2018-10-10 11:30:36,786 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-10 11:30:36,787 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-10 11:30:36,787 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-10 11:30:36,791 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-10 11:30:36,791 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.10 11:30:33" (1/3) ... [2018-10-10 11:30:36,792 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7a9e587d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 11:30:36, skipping insertion in model container [2018-10-10 11:30:36,792 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:34" (2/3) ... [2018-10-10 11:30:36,793 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7a9e587d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 11:30:36, skipping insertion in model container [2018-10-10 11:30:36,793 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 11:30:36" (3/3) ... [2018-10-10 11:30:36,795 INFO L112 eAbstractionObserver]: Analyzing ICFG length_test03_false-valid-memtrack.i [2018-10-10 11:30:36,805 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-10 11:30:36,814 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 81 error locations. [2018-10-10 11:30:36,835 INFO L257 AbstractCegarLoop]: Starting to check reachability of 81 error locations. [2018-10-10 11:30:36,861 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-10 11:30:36,862 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-10 11:30:36,862 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-10 11:30:36,863 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-10 11:30:36,863 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-10 11:30:36,863 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-10 11:30:36,863 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-10 11:30:36,864 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-10 11:30:36,864 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-10 11:30:36,886 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states. [2018-10-10 11:30:36,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-10-10 11:30:36,896 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:36,897 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-10-10 11:30:36,902 INFO L424 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:36,909 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:36,909 INFO L82 PathProgramCache]: Analyzing trace with hash 29856, now seen corresponding path program 1 times [2018-10-10 11:30:36,914 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:36,915 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:36,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:36,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:36,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:37,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:37,066 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:37,097 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:37,097 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:37,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:37,158 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:37,164 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:37,164 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:37,168 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:37,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:37,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:37,189 INFO L87 Difference]: Start difference. First operand 186 states. Second operand 3 states. [2018-10-10 11:30:38,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:38,578 INFO L93 Difference]: Finished difference Result 218 states and 227 transitions. [2018-10-10 11:30:38,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:38,581 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2018-10-10 11:30:38,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:38,596 INFO L225 Difference]: With dead ends: 218 [2018-10-10 11:30:38,596 INFO L226 Difference]: Without dead ends: 216 [2018-10-10 11:30:38,598 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:38,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-10-10 11:30:38,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 182. [2018-10-10 11:30:38,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-10-10 11:30:38,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 189 transitions. [2018-10-10 11:30:38,650 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 189 transitions. Word has length 3 [2018-10-10 11:30:38,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:38,650 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 189 transitions. [2018-10-10 11:30:38,650 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:38,651 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 189 transitions. [2018-10-10 11:30:38,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-10-10 11:30:38,651 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:38,651 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-10-10 11:30:38,653 INFO L424 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:38,654 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:38,654 INFO L82 PathProgramCache]: Analyzing trace with hash 925572, now seen corresponding path program 1 times [2018-10-10 11:30:38,655 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:38,655 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:38,676 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:38,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:38,708 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:38,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:38,734 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:38,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:38,798 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-10 11:30:38,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:38,822 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:38,824 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:38,824 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:38,825 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:38,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:38,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:38,827 INFO L87 Difference]: Start difference. First operand 182 states and 189 transitions. Second operand 3 states. [2018-10-10 11:30:39,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:39,555 INFO L93 Difference]: Finished difference Result 180 states and 187 transitions. [2018-10-10 11:30:39,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:39,557 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-10-10 11:30:39,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:39,559 INFO L225 Difference]: With dead ends: 180 [2018-10-10 11:30:39,559 INFO L226 Difference]: Without dead ends: 180 [2018-10-10 11:30:39,560 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:39,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-10-10 11:30:39,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-10-10 11:30:39,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-10-10 11:30:39,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 187 transitions. [2018-10-10 11:30:39,574 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 187 transitions. Word has length 4 [2018-10-10 11:30:39,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:39,574 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 187 transitions. [2018-10-10 11:30:39,574 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:39,574 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 187 transitions. [2018-10-10 11:30:39,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-10-10 11:30:39,575 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:39,575 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-10-10 11:30:39,577 INFO L424 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:39,577 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:39,578 INFO L82 PathProgramCache]: Analyzing trace with hash 28692770, now seen corresponding path program 1 times [2018-10-10 11:30:39,578 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:39,578 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:39,598 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:39,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:39,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:39,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:39,664 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:39,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:39,688 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:39,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:39,872 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:39,881 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:39,881 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 11:30:39,882 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 11:30:39,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 11:30:39,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:39,883 INFO L87 Difference]: Start difference. First operand 180 states and 187 transitions. Second operand 5 states. [2018-10-10 11:30:41,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:41,334 INFO L93 Difference]: Finished difference Result 213 states and 222 transitions. [2018-10-10 11:30:41,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-10 11:30:41,339 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2018-10-10 11:30:41,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:41,341 INFO L225 Difference]: With dead ends: 213 [2018-10-10 11:30:41,341 INFO L226 Difference]: Without dead ends: 213 [2018-10-10 11:30:41,342 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-10-10 11:30:41,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-10-10 11:30:41,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 179. [2018-10-10 11:30:41,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-10 11:30:41,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 186 transitions. [2018-10-10 11:30:41,358 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 186 transitions. Word has length 5 [2018-10-10 11:30:41,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:41,359 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 186 transitions. [2018-10-10 11:30:41,359 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 11:30:41,359 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 186 transitions. [2018-10-10 11:30:41,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2018-10-10 11:30:41,360 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:41,360 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2018-10-10 11:30:41,365 INFO L424 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:41,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:41,366 INFO L82 PathProgramCache]: Analyzing trace with hash 889475910, now seen corresponding path program 1 times [2018-10-10 11:30:41,366 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:41,366 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:41,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:41,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:41,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:41,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:41,462 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:41,476 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:41,477 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:41,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:41,578 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:41,581 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:41,581 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:41,582 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:41,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:41,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:41,583 INFO L87 Difference]: Start difference. First operand 179 states and 186 transitions. Second operand 4 states. [2018-10-10 11:30:42,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:42,678 INFO L93 Difference]: Finished difference Result 179 states and 186 transitions. [2018-10-10 11:30:42,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:30:42,679 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 6 [2018-10-10 11:30:42,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:42,680 INFO L225 Difference]: With dead ends: 179 [2018-10-10 11:30:42,680 INFO L226 Difference]: Without dead ends: 179 [2018-10-10 11:30:42,681 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:42,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-10-10 11:30:42,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 178. [2018-10-10 11:30:42,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-10 11:30:42,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 185 transitions. [2018-10-10 11:30:42,691 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 185 transitions. Word has length 6 [2018-10-10 11:30:42,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:42,691 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 185 transitions. [2018-10-10 11:30:42,692 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:42,692 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 185 transitions. [2018-10-10 11:30:42,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-10 11:30:42,692 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:42,693 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:42,695 INFO L424 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:42,695 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:42,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1571339738, now seen corresponding path program 1 times [2018-10-10 11:30:42,696 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:42,696 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:42,718 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:42,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:42,783 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:42,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:42,801 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:42,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:42,803 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:42,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:42,832 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:42,834 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:42,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:42,834 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:42,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:42,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:42,837 INFO L87 Difference]: Start difference. First operand 178 states and 185 transitions. Second operand 4 states. [2018-10-10 11:30:43,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:43,634 INFO L93 Difference]: Finished difference Result 210 states and 219 transitions. [2018-10-10 11:30:43,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-10 11:30:43,635 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2018-10-10 11:30:43,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:43,638 INFO L225 Difference]: With dead ends: 210 [2018-10-10 11:30:43,639 INFO L226 Difference]: Without dead ends: 210 [2018-10-10 11:30:43,639 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:43,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-10-10 11:30:43,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 189. [2018-10-10 11:30:43,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-10-10 11:30:43,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 203 transitions. [2018-10-10 11:30:43,648 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 203 transitions. Word has length 9 [2018-10-10 11:30:43,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:43,648 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 203 transitions. [2018-10-10 11:30:43,649 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:43,649 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 203 transitions. [2018-10-10 11:30:43,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-10 11:30:43,649 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:43,649 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:43,652 INFO L424 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:43,652 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:43,652 INFO L82 PathProgramCache]: Analyzing trace with hash -1466891574, now seen corresponding path program 1 times [2018-10-10 11:30:43,653 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:43,653 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:43,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:43,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:43,755 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:43,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:43,776 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:43,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:43,785 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:43,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:43,817 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:43,823 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:43,823 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:43,824 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:43,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:43,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:43,825 INFO L87 Difference]: Start difference. First operand 189 states and 203 transitions. Second operand 4 states. [2018-10-10 11:30:44,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:44,761 INFO L93 Difference]: Finished difference Result 189 states and 203 transitions. [2018-10-10 11:30:44,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:30:44,764 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-10 11:30:44,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:44,765 INFO L225 Difference]: With dead ends: 189 [2018-10-10 11:30:44,765 INFO L226 Difference]: Without dead ends: 189 [2018-10-10 11:30:44,765 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:44,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-10-10 11:30:44,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 188. [2018-10-10 11:30:44,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-10 11:30:44,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 202 transitions. [2018-10-10 11:30:44,772 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 202 transitions. Word has length 10 [2018-10-10 11:30:44,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:44,773 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 202 transitions. [2018-10-10 11:30:44,773 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:44,773 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 202 transitions. [2018-10-10 11:30:44,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-10 11:30:44,774 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:44,774 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:44,776 INFO L424 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:44,777 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:44,777 INFO L82 PathProgramCache]: Analyzing trace with hash -933527860, now seen corresponding path program 1 times [2018-10-10 11:30:44,777 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:44,778 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:44,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:44,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:44,904 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:44,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:44,928 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:44,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:44,933 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:44,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:44,938 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:44,942 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:44,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:44,943 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:44,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:44,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:44,944 INFO L87 Difference]: Start difference. First operand 188 states and 202 transitions. Second operand 3 states. [2018-10-10 11:30:45,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:45,485 INFO L93 Difference]: Finished difference Result 208 states and 217 transitions. [2018-10-10 11:30:45,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:45,486 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-10-10 11:30:45,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:45,488 INFO L225 Difference]: With dead ends: 208 [2018-10-10 11:30:45,488 INFO L226 Difference]: Without dead ends: 208 [2018-10-10 11:30:45,489 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:45,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-10-10 11:30:45,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 186. [2018-10-10 11:30:45,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-10-10 11:30:45,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 200 transitions. [2018-10-10 11:30:45,494 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 200 transitions. Word has length 12 [2018-10-10 11:30:45,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:45,495 INFO L481 AbstractCegarLoop]: Abstraction has 186 states and 200 transitions. [2018-10-10 11:30:45,495 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:45,495 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 200 transitions. [2018-10-10 11:30:45,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-10-10 11:30:45,496 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:45,496 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:45,498 INFO L424 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:45,499 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:45,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1125407468, now seen corresponding path program 1 times [2018-10-10 11:30:45,499 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:45,499 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:45,522 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:45,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:45,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:45,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:45,651 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:45,665 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:45,666 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-10 11:30:45,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:45,679 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:45,682 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:45,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:45,683 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:45,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:45,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:45,684 INFO L87 Difference]: Start difference. First operand 186 states and 200 transitions. Second operand 3 states. [2018-10-10 11:30:46,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:46,236 INFO L93 Difference]: Finished difference Result 185 states and 199 transitions. [2018-10-10 11:30:46,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:46,237 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-10-10 11:30:46,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:46,238 INFO L225 Difference]: With dead ends: 185 [2018-10-10 11:30:46,239 INFO L226 Difference]: Without dead ends: 185 [2018-10-10 11:30:46,239 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:46,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-10-10 11:30:46,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 184. [2018-10-10 11:30:46,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-10-10 11:30:46,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 198 transitions. [2018-10-10 11:30:46,245 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 198 transitions. Word has length 13 [2018-10-10 11:30:46,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:46,245 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 198 transitions. [2018-10-10 11:30:46,245 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:46,245 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 198 transitions. [2018-10-10 11:30:46,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-10 11:30:46,246 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:46,246 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:46,248 INFO L424 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:46,248 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:46,248 INFO L82 PathProgramCache]: Analyzing trace with hash 527893198, now seen corresponding path program 1 times [2018-10-10 11:30:46,249 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:46,249 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:46,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:46,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:46,391 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:46,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:46,400 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:46,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:46,410 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:46,451 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:46,452 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:46,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 11:30:46,454 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:46,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:30:46,467 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:16 [2018-10-10 11:30:46,537 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:30:46,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-10-10 11:30:46,539 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:46,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-10 11:30:46,551 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:20 [2018-10-10 11:30:46,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:46,651 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:46,656 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:46,657 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:30:46,657 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:30:46,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:30:46,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:30:46,658 INFO L87 Difference]: Start difference. First operand 184 states and 198 transitions. Second operand 7 states. [2018-10-10 11:30:47,022 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 19 [2018-10-10 11:30:49,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:49,345 INFO L93 Difference]: Finished difference Result 246 states and 258 transitions. [2018-10-10 11:30:49,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:30:49,345 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-10-10 11:30:49,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:49,348 INFO L225 Difference]: With dead ends: 246 [2018-10-10 11:30:49,348 INFO L226 Difference]: Without dead ends: 246 [2018-10-10 11:30:49,348 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:30:49,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-10-10 11:30:49,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 179. [2018-10-10 11:30:49,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-10 11:30:49,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 193 transitions. [2018-10-10 11:30:49,355 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 193 transitions. Word has length 14 [2018-10-10 11:30:49,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:49,355 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 193 transitions. [2018-10-10 11:30:49,355 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:30:49,355 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 193 transitions. [2018-10-10 11:30:49,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-10 11:30:49,356 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:49,356 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:49,358 INFO L424 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:49,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:49,359 INFO L82 PathProgramCache]: Analyzing trace with hash -815179986, now seen corresponding path program 1 times [2018-10-10 11:30:49,359 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:49,359 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:49,381 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:49,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:49,532 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:49,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:49,538 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:49,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:49,552 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:49,562 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:49,563 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:30:49,583 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:49,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:30:49,587 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:49,617 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:49,619 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:49,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:30:49,621 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:49,679 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:49,679 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-10-10 11:30:49,704 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:49,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:30:49,721 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:30:49,745 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:30:49,746 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:30:49,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:49,947 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:49,950 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:49,950 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 11:30:49,950 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 11:30:49,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 11:30:49,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-10 11:30:49,951 INFO L87 Difference]: Start difference. First operand 179 states and 193 transitions. Second operand 6 states. [2018-10-10 11:30:50,697 WARN L178 SmtUtils]: Spent 321.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 45 [2018-10-10 11:30:52,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:52,724 INFO L93 Difference]: Finished difference Result 309 states and 325 transitions. [2018-10-10 11:30:52,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-10 11:30:52,725 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-10-10 11:30:52,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:52,727 INFO L225 Difference]: With dead ends: 309 [2018-10-10 11:30:52,727 INFO L226 Difference]: Without dead ends: 309 [2018-10-10 11:30:52,728 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:30:52,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-10-10 11:30:52,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 182. [2018-10-10 11:30:52,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-10-10 11:30:52,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 197 transitions. [2018-10-10 11:30:52,733 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 197 transitions. Word has length 15 [2018-10-10 11:30:52,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:52,734 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 197 transitions. [2018-10-10 11:30:52,734 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 11:30:52,734 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 197 transitions. [2018-10-10 11:30:52,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-10 11:30:52,735 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:52,735 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:52,737 INFO L424 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:52,737 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:52,737 INFO L82 PathProgramCache]: Analyzing trace with hash -1281808717, now seen corresponding path program 1 times [2018-10-10 11:30:52,738 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:52,738 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:52,757 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:52,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:52,948 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:52,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:52,966 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:53,033 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,041 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,041 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:30:53,065 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:53,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:30:53,069 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,091 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:53,093 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:53,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:30:53,094 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,109 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-10-10 11:30:53,155 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:53,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:30:53,169 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:30:53,189 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:30:53,190 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:30:53,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:53,343 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:53,346 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:53,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:30:53,347 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:30:53,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:30:53,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:30:53,347 INFO L87 Difference]: Start difference. First operand 182 states and 197 transitions. Second operand 7 states. [2018-10-10 11:30:53,834 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 45 [2018-10-10 11:30:55,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:55,912 INFO L93 Difference]: Finished difference Result 306 states and 322 transitions. [2018-10-10 11:30:55,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 11:30:55,913 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 18 [2018-10-10 11:30:55,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:55,915 INFO L225 Difference]: With dead ends: 306 [2018-10-10 11:30:55,915 INFO L226 Difference]: Without dead ends: 306 [2018-10-10 11:30:55,915 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-10-10 11:30:55,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-10-10 11:30:55,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 179. [2018-10-10 11:30:55,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-10 11:30:55,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 194 transitions. [2018-10-10 11:30:55,920 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 194 transitions. Word has length 18 [2018-10-10 11:30:55,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:55,921 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 194 transitions. [2018-10-10 11:30:55,921 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:30:55,921 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 194 transitions. [2018-10-10 11:30:55,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-10 11:30:55,921 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:55,922 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:55,923 INFO L424 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:55,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:55,924 INFO L82 PathProgramCache]: Analyzing trace with hash -1281802695, now seen corresponding path program 1 times [2018-10-10 11:30:55,924 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:55,924 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:55,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:56,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:56,015 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:56,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:56,020 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:56,021 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:56,022 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:56,022 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:56,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:56,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:56,023 INFO L87 Difference]: Start difference. First operand 179 states and 194 transitions. Second operand 3 states. [2018-10-10 11:30:56,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:56,078 INFO L93 Difference]: Finished difference Result 181 states and 196 transitions. [2018-10-10 11:30:56,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:56,079 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-10-10 11:30:56,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:56,080 INFO L225 Difference]: With dead ends: 181 [2018-10-10 11:30:56,080 INFO L226 Difference]: Without dead ends: 181 [2018-10-10 11:30:56,081 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:56,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-10-10 11:30:56,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 181. [2018-10-10 11:30:56,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-10-10 11:30:56,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 196 transitions. [2018-10-10 11:30:56,085 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 196 transitions. Word has length 18 [2018-10-10 11:30:56,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:56,086 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 196 transitions. [2018-10-10 11:30:56,086 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:56,086 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 196 transitions. [2018-10-10 11:30:56,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-10 11:30:56,086 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:56,087 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:56,087 INFO L424 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:56,087 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:56,087 INFO L82 PathProgramCache]: Analyzing trace with hash 837439253, now seen corresponding path program 1 times [2018-10-10 11:30:56,088 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:56,088 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:56,108 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:56,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:56,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:56,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:56,288 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:56,290 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:56,291 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 11:30:56,291 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 11:30:56,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 11:30:56,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:56,292 INFO L87 Difference]: Start difference. First operand 181 states and 196 transitions. Second operand 5 states. [2018-10-10 11:30:57,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:57,505 INFO L93 Difference]: Finished difference Result 194 states and 204 transitions. [2018-10-10 11:30:57,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:30:57,506 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-10-10 11:30:57,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:57,507 INFO L225 Difference]: With dead ends: 194 [2018-10-10 11:30:57,507 INFO L226 Difference]: Without dead ends: 194 [2018-10-10 11:30:57,512 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-10 11:30:57,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-10-10 11:30:57,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 172. [2018-10-10 11:30:57,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-10-10 11:30:57,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 187 transitions. [2018-10-10 11:30:57,517 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 187 transitions. Word has length 20 [2018-10-10 11:30:57,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:57,518 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 187 transitions. [2018-10-10 11:30:57,520 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 11:30:57,520 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 187 transitions. [2018-10-10 11:30:57,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-10 11:30:57,521 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:57,521 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:57,522 INFO L424 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:57,522 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:57,522 INFO L82 PathProgramCache]: Analyzing trace with hash 843780635, now seen corresponding path program 1 times [2018-10-10 11:30:57,522 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:57,522 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:57,551 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:57,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:57,682 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:57,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:57,695 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:57,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:57,697 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:57,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:57,721 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:57,722 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:57,723 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:57,723 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:57,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:57,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:57,724 INFO L87 Difference]: Start difference. First operand 172 states and 187 transitions. Second operand 4 states. [2018-10-10 11:30:58,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:58,502 INFO L93 Difference]: Finished difference Result 186 states and 196 transitions. [2018-10-10 11:30:58,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-10 11:30:58,502 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-10-10 11:30:58,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:58,504 INFO L225 Difference]: With dead ends: 186 [2018-10-10 11:30:58,504 INFO L226 Difference]: Without dead ends: 186 [2018-10-10 11:30:58,504 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:58,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-10-10 11:30:58,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 164. [2018-10-10 11:30:58,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-10-10 11:30:58,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 179 transitions. [2018-10-10 11:30:58,509 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 179 transitions. Word has length 20 [2018-10-10 11:30:58,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:58,509 INFO L481 AbstractCegarLoop]: Abstraction has 164 states and 179 transitions. [2018-10-10 11:30:58,509 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:58,509 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 179 transitions. [2018-10-10 11:30:58,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-10 11:30:58,510 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:58,510 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:58,511 INFO L424 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:58,511 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:58,511 INFO L82 PathProgramCache]: Analyzing trace with hash 190813144, now seen corresponding path program 1 times [2018-10-10 11:30:58,511 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:58,512 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:58,538 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:58,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:58,681 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:58,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:58,759 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:58,761 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:58,761 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:30:58,762 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:30:58,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:30:58,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:30:58,762 INFO L87 Difference]: Start difference. First operand 164 states and 179 transitions. Second operand 7 states. [2018-10-10 11:31:00,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:00,090 INFO L93 Difference]: Finished difference Result 222 states and 245 transitions. [2018-10-10 11:31:00,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 11:31:00,091 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-10-10 11:31:00,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:00,092 INFO L225 Difference]: With dead ends: 222 [2018-10-10 11:31:00,092 INFO L226 Difference]: Without dead ends: 222 [2018-10-10 11:31:00,092 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-10-10 11:31:00,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-10-10 11:31:00,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 163. [2018-10-10 11:31:00,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-10-10 11:31:00,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 178 transitions. [2018-10-10 11:31:00,098 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 178 transitions. Word has length 21 [2018-10-10 11:31:00,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:00,099 INFO L481 AbstractCegarLoop]: Abstraction has 163 states and 178 transitions. [2018-10-10 11:31:00,099 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:00,099 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 178 transitions. [2018-10-10 11:31:00,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-10 11:31:00,100 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:00,100 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:00,101 INFO L424 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:00,101 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:00,101 INFO L82 PathProgramCache]: Analyzing trace with hash 387396008, now seen corresponding path program 1 times [2018-10-10 11:31:00,101 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:00,101 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:00,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:00,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:00,270 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:00,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:00,277 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:00,288 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:00,288 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:31:00,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:00,315 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:00,318 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:00,318 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:31:00,318 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:31:00,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:31:00,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:31:00,319 INFO L87 Difference]: Start difference. First operand 163 states and 178 transitions. Second operand 4 states. [2018-10-10 11:31:01,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:01,384 INFO L93 Difference]: Finished difference Result 160 states and 175 transitions. [2018-10-10 11:31:01,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:31:01,385 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2018-10-10 11:31:01,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:01,387 INFO L225 Difference]: With dead ends: 160 [2018-10-10 11:31:01,387 INFO L226 Difference]: Without dead ends: 160 [2018-10-10 11:31:01,387 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:31:01,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-10-10 11:31:01,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 159. [2018-10-10 11:31:01,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-10-10 11:31:01,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 174 transitions. [2018-10-10 11:31:01,391 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 174 transitions. Word has length 21 [2018-10-10 11:31:01,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:01,392 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 174 transitions. [2018-10-10 11:31:01,392 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:31:01,392 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 174 transitions. [2018-10-10 11:31:01,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-10 11:31:01,392 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:01,393 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:01,393 INFO L424 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:01,393 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:01,394 INFO L82 PathProgramCache]: Analyzing trace with hash -1312159814, now seen corresponding path program 1 times [2018-10-10 11:31:01,394 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:01,394 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:01,424 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:01,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:01,635 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:01,998 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:01,999 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:02,001 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:02,001 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:02,002 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:02,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:02,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:02,003 INFO L87 Difference]: Start difference. First operand 159 states and 174 transitions. Second operand 7 states. [2018-10-10 11:31:03,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:03,868 INFO L93 Difference]: Finished difference Result 309 states and 346 transitions. [2018-10-10 11:31:03,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-10 11:31:03,868 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-10-10 11:31:03,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:03,871 INFO L225 Difference]: With dead ends: 309 [2018-10-10 11:31:03,872 INFO L226 Difference]: Without dead ends: 309 [2018-10-10 11:31:03,872 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=84, Invalid=156, Unknown=0, NotChecked=0, Total=240 [2018-10-10 11:31:03,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-10-10 11:31:03,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 157. [2018-10-10 11:31:03,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-10-10 11:31:03,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 172 transitions. [2018-10-10 11:31:03,880 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 172 transitions. Word has length 23 [2018-10-10 11:31:03,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:03,880 INFO L481 AbstractCegarLoop]: Abstraction has 157 states and 172 transitions. [2018-10-10 11:31:03,880 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:03,880 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 172 transitions. [2018-10-10 11:31:03,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-10 11:31:03,881 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:03,881 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:03,882 INFO L424 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:03,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:03,882 INFO L82 PathProgramCache]: Analyzing trace with hash -1374587830, now seen corresponding path program 1 times [2018-10-10 11:31:03,883 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:03,883 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:03,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:04,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:04,081 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:04,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:04,089 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:04,099 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:04,100 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:31:04,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:04,152 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:04,154 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:04,155 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:31:04,155 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:31:04,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:31:04,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:31:04,156 INFO L87 Difference]: Start difference. First operand 157 states and 172 transitions. Second operand 4 states. [2018-10-10 11:31:05,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:05,029 INFO L93 Difference]: Finished difference Result 253 states and 283 transitions. [2018-10-10 11:31:05,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:31:05,036 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-10-10 11:31:05,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:05,037 INFO L225 Difference]: With dead ends: 253 [2018-10-10 11:31:05,037 INFO L226 Difference]: Without dead ends: 253 [2018-10-10 11:31:05,039 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:31:05,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2018-10-10 11:31:05,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 153. [2018-10-10 11:31:05,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-10-10 11:31:05,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 168 transitions. [2018-10-10 11:31:05,046 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 168 transitions. Word has length 23 [2018-10-10 11:31:05,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:05,046 INFO L481 AbstractCegarLoop]: Abstraction has 153 states and 168 transitions. [2018-10-10 11:31:05,046 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:31:05,047 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 168 transitions. [2018-10-10 11:31:05,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-10 11:31:05,047 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:05,047 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:05,049 INFO L424 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:05,049 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:05,050 INFO L82 PathProgramCache]: Analyzing trace with hash -2127739135, now seen corresponding path program 1 times [2018-10-10 11:31:05,050 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:05,050 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:05,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:05,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:05,335 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:05,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:05,351 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,376 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-10-10 11:31:05,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 11:31:05,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:05,414 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,417 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 11:31:05,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:05,455 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,460 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,480 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,481 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:41, output treesize:33 [2018-10-10 11:31:05,682 WARN L178 SmtUtils]: Spent 143.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-10-10 11:31:05,709 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:05,713 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:05,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:31:05,714 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-10 11:31:05,860 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:05,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 11:31:05,887 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,955 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-10 11:31:06,046 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:06,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 11:31:06,051 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,067 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,098 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,098 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:57, output treesize:25 [2018-10-10 11:31:06,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,154 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,166 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,257 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,273 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,298 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,299 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:44, output treesize:22 [2018-10-10 11:31:06,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,348 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,360 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,409 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,427 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,451 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:44, output treesize:18 [2018-10-10 11:31:06,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-10 11:31:06,528 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-10 11:31:06,535 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,537 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,537 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:1 [2018-10-10 11:31:06,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:06,554 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:06,560 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:06,560 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-10 11:31:06,560 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 11:31:06,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 11:31:06,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:31:06,561 INFO L87 Difference]: Start difference. First operand 153 states and 168 transitions. Second operand 10 states. [2018-10-10 11:31:09,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:09,247 INFO L93 Difference]: Finished difference Result 168 states and 184 transitions. [2018-10-10 11:31:09,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-10 11:31:09,248 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 26 [2018-10-10 11:31:09,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:09,249 INFO L225 Difference]: With dead ends: 168 [2018-10-10 11:31:09,249 INFO L226 Difference]: Without dead ends: 168 [2018-10-10 11:31:09,249 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2018-10-10 11:31:09,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-10-10 11:31:09,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 159. [2018-10-10 11:31:09,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-10-10 11:31:09,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 174 transitions. [2018-10-10 11:31:09,252 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 174 transitions. Word has length 26 [2018-10-10 11:31:09,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:09,253 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 174 transitions. [2018-10-10 11:31:09,253 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 11:31:09,253 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 174 transitions. [2018-10-10 11:31:09,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-10 11:31:09,254 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:09,254 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:09,254 INFO L424 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:09,255 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:09,255 INFO L82 PathProgramCache]: Analyzing trace with hash -801260579, now seen corresponding path program 1 times [2018-10-10 11:31:09,255 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:09,255 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:09,278 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:09,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:09,578 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:09,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:09,582 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,590 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,591 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:31:09,647 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:09,649 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:09,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:31:09,650 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-10 11:31:09,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-10 11:31:09,704 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,707 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-10 11:31:09,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-10 11:31:09,734 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,737 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,756 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:43, output treesize:29 [2018-10-10 11:31:09,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:09,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:09,812 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,827 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:09,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:09,876 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,951 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,980 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,980 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:48, output treesize:26 [2018-10-10 11:31:10,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:10,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:10,053 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,067 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:10,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:10,201 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,300 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,452 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:48, output treesize:22 [2018-10-10 11:31:10,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:10,622 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (21)] Exception during sending of exit command (exit): Broken pipe [2018-10-10 11:31:10,625 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:10,625 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-10 11:31:10,625 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 11:31:10,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 11:31:10,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:31:10,626 INFO L87 Difference]: Start difference. First operand 159 states and 174 transitions. Second operand 10 states. [2018-10-10 11:31:12,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:12,938 INFO L93 Difference]: Finished difference Result 185 states and 195 transitions. [2018-10-10 11:31:12,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-10 11:31:12,939 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 28 [2018-10-10 11:31:12,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:12,940 INFO L225 Difference]: With dead ends: 185 [2018-10-10 11:31:12,941 INFO L226 Difference]: Without dead ends: 185 [2018-10-10 11:31:12,941 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-10-10 11:31:12,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-10-10 11:31:12,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 162. [2018-10-10 11:31:12,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-10-10 11:31:12,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 177 transitions. [2018-10-10 11:31:12,945 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 177 transitions. Word has length 28 [2018-10-10 11:31:12,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:12,946 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 177 transitions. [2018-10-10 11:31:12,946 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 11:31:12,946 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 177 transitions. [2018-10-10 11:31:12,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-10 11:31:12,946 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:12,947 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:12,947 INFO L424 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:12,947 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:12,948 INFO L82 PathProgramCache]: Analyzing trace with hash 224079114, now seen corresponding path program 1 times [2018-10-10 11:31:12,948 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:12,948 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:12,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:13,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:13,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:13,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:13,308 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,333 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,334 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:31:13,344 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:13,346 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:13,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-10 11:31:13,347 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,357 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,358 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:16 [2018-10-10 11:31:13,437 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:13,439 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2018-10-10 11:31:13,440 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,454 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:13,454 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:22, output treesize:20 [2018-10-10 11:31:13,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:13,510 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (22)] Exception during sending of exit command (exit): Broken pipe [2018-10-10 11:31:13,514 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:13,514 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:13,515 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:13,515 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:13,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:13,515 INFO L87 Difference]: Start difference. First operand 162 states and 177 transitions. Second operand 7 states. [2018-10-10 11:31:15,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:15,024 INFO L93 Difference]: Finished difference Result 217 states and 229 transitions. [2018-10-10 11:31:15,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:31:15,024 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2018-10-10 11:31:15,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:15,026 INFO L225 Difference]: With dead ends: 217 [2018-10-10 11:31:15,026 INFO L226 Difference]: Without dead ends: 217 [2018-10-10 11:31:15,026 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:31:15,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-10-10 11:31:15,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 161. [2018-10-10 11:31:15,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-10 11:31:15,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 175 transitions. [2018-10-10 11:31:15,031 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 175 transitions. Word has length 35 [2018-10-10 11:31:15,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:15,031 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 175 transitions. [2018-10-10 11:31:15,031 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:15,031 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 175 transitions. [2018-10-10 11:31:15,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-10 11:31:15,032 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:15,032 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:15,033 INFO L424 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:15,033 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:15,033 INFO L82 PathProgramCache]: Analyzing trace with hash -1643204860, now seen corresponding path program 1 times [2018-10-10 11:31:15,033 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:15,033 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:15,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:15,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:15,257 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:15,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:15,265 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:15,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:15,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:31:15,267 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:31:15,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:31:15,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:31:15,268 INFO L87 Difference]: Start difference. First operand 161 states and 175 transitions. Second operand 3 states. [2018-10-10 11:31:15,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:15,301 INFO L93 Difference]: Finished difference Result 206 states and 219 transitions. [2018-10-10 11:31:15,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:31:15,303 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2018-10-10 11:31:15,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:15,304 INFO L225 Difference]: With dead ends: 206 [2018-10-10 11:31:15,305 INFO L226 Difference]: Without dead ends: 206 [2018-10-10 11:31:15,305 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:31:15,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-10-10 11:31:15,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 152. [2018-10-10 11:31:15,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-10-10 11:31:15,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 160 transitions. [2018-10-10 11:31:15,308 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 160 transitions. Word has length 36 [2018-10-10 11:31:15,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:15,308 INFO L481 AbstractCegarLoop]: Abstraction has 152 states and 160 transitions. [2018-10-10 11:31:15,309 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:31:15,309 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 160 transitions. [2018-10-10 11:31:15,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-10 11:31:15,309 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:15,309 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:15,310 INFO L424 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:15,310 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:15,310 INFO L82 PathProgramCache]: Analyzing trace with hash -1643481914, now seen corresponding path program 1 times [2018-10-10 11:31:15,313 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:15,314 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:15,342 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:15,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:15,682 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:15,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:15,709 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:15,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:15,818 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:15,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:15,837 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:31:15,864 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:15,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:31:15,866 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:15,891 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:15,893 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:15,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-10 11:31:15,894 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:15,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:15,910 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-10-10 11:31:15,943 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:15,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:31:15,955 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:15,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:31:15,974 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:31:16,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:16,050 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:16,053 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:16,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:16,054 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:16,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:16,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:16,054 INFO L87 Difference]: Start difference. First operand 152 states and 160 transitions. Second operand 7 states. [2018-10-10 11:31:16,816 WARN L178 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2018-10-10 11:31:17,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:17,989 INFO L93 Difference]: Finished difference Result 174 states and 182 transitions. [2018-10-10 11:31:17,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:31:17,989 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-10-10 11:31:17,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:17,990 INFO L225 Difference]: With dead ends: 174 [2018-10-10 11:31:17,990 INFO L226 Difference]: Without dead ends: 174 [2018-10-10 11:31:17,990 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2018-10-10 11:31:17,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-10-10 11:31:17,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 150. [2018-10-10 11:31:17,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-10-10 11:31:17,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-10-10 11:31:17,993 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 36 [2018-10-10 11:31:17,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:17,994 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-10-10 11:31:17,994 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:17,994 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-10-10 11:31:17,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-10 11:31:17,995 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:17,995 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:17,995 INFO L424 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:17,995 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:17,996 INFO L82 PathProgramCache]: Analyzing trace with hash 1657620463, now seen corresponding path program 1 times [2018-10-10 11:31:17,996 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:17,996 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:18,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:18,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:18,502 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:18,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:18,520 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:18,548 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,574 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,574 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:31:18,598 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:31:18,602 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,631 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,632 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-10 11:31:18,634 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,648 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,648 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-10-10 11:31:18,764 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:31:18,777 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:18,798 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:31:18,799 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:31:19,286 WARN L178 SmtUtils]: Spent 328.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2018-10-10 11:31:19,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:19,365 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (25)] Exception during sending of exit command (exit): Broken pipe [2018-10-10 11:31:19,371 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:19,371 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 11:31:19,372 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 11:31:19,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 11:31:19,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-10 11:31:19,372 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 8 states. [2018-10-10 11:31:20,198 WARN L178 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2018-10-10 11:31:20,406 WARN L178 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2018-10-10 11:31:21,560 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 43 [2018-10-10 11:31:21,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:21,737 INFO L93 Difference]: Finished difference Result 171 states and 179 transitions. [2018-10-10 11:31:21,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 11:31:21,738 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 39 [2018-10-10 11:31:21,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:21,738 INFO L225 Difference]: With dead ends: 171 [2018-10-10 11:31:21,738 INFO L226 Difference]: Without dead ends: 171 [2018-10-10 11:31:21,739 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=62, Invalid=120, Unknown=0, NotChecked=0, Total=182 [2018-10-10 11:31:21,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-10-10 11:31:21,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 146. [2018-10-10 11:31:21,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-10-10 11:31:21,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-10-10 11:31:21,741 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 39 [2018-10-10 11:31:21,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:21,742 INFO L481 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-10-10 11:31:21,742 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 11:31:21,742 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-10-10 11:31:21,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-10 11:31:21,742 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:21,742 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:21,743 INFO L424 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:21,743 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:21,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1362600208, now seen corresponding path program 1 times [2018-10-10 11:31:21,743 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:21,743 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:21,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:21,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:22,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:22,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:22,152 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:22,154 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:22,154 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:22,154 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:22,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:22,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:22,155 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 7 states. [2018-10-10 11:31:23,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:23,299 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-10-10 11:31:23,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 11:31:23,303 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 42 [2018-10-10 11:31:23,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:23,304 INFO L225 Difference]: With dead ends: 147 [2018-10-10 11:31:23,304 INFO L226 Difference]: Without dead ends: 147 [2018-10-10 11:31:23,305 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-10-10 11:31:23,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-10-10 11:31:23,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-10-10 11:31:23,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-10-10 11:31:23,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-10-10 11:31:23,308 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 42 [2018-10-10 11:31:23,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:23,308 INFO L481 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-10-10 11:31:23,309 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:23,309 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-10-10 11:31:23,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-10-10 11:31:23,309 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:23,310 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:23,310 INFO L424 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:23,311 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:23,311 INFO L82 PathProgramCache]: Analyzing trace with hash 506230610, now seen corresponding path program 1 times [2018-10-10 11:31:23,311 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:23,312 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:23,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:23,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:23,649 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:23,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:23,728 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:23,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:23,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:23,731 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:23,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:23,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:23,732 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 7 states. [2018-10-10 11:31:25,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:25,238 INFO L93 Difference]: Finished difference Result 214 states and 227 transitions. [2018-10-10 11:31:25,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-10 11:31:25,239 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 44 [2018-10-10 11:31:25,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:25,240 INFO L225 Difference]: With dead ends: 214 [2018-10-10 11:31:25,240 INFO L226 Difference]: Without dead ends: 214 [2018-10-10 11:31:25,241 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=76, Invalid=134, Unknown=0, NotChecked=0, Total=210 [2018-10-10 11:31:25,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-10-10 11:31:25,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 143. [2018-10-10 11:31:25,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-10-10 11:31:25,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-10-10 11:31:25,259 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 44 [2018-10-10 11:31:25,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:25,259 INFO L481 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-10-10 11:31:25,259 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:25,259 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-10-10 11:31:25,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-10 11:31:25,260 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:25,260 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:25,260 INFO L424 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:25,261 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:25,261 INFO L82 PathProgramCache]: Analyzing trace with hash -553249061, now seen corresponding path program 1 times [2018-10-10 11:31:25,262 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:25,262 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:25,279 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:25,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:25,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:25,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:25,922 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:25,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:25,933 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-10 11:31:25,965 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:25,966 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:25,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 11:31:25,967 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:25,980 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:25,980 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:19 [2018-10-10 11:31:26,030 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,032 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,032 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:26,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 42 [2018-10-10 11:31:26,034 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,068 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,068 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:36, output treesize:39 [2018-10-10 11:31:26,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-10 11:31:26,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-10 11:31:26,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,285 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,319 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,319 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:51, output treesize:47 [2018-10-10 11:31:26,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:26,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:26,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,420 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,467 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:55, output treesize:44 [2018-10-10 11:31:26,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 51 [2018-10-10 11:31:26,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-10 11:31:26,559 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,576 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,615 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,616 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:53 [2018-10-10 11:31:26,687 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,688 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:26,688 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:26,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 81 [2018-10-10 11:31:26,689 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,742 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:56, output treesize:68 [2018-10-10 11:31:27,147 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-10-10 11:31:27,573 WARN L178 SmtUtils]: Spent 248.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-10-10 11:31:27,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-10-10 11:31:27,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-10 11:31:27,680 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:27,862 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:27,923 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:27,923 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:87, output treesize:83 [2018-10-10 11:31:28,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 57 [2018-10-10 11:31:28,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-10-10 11:31:28,073 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:28,122 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 11:31:28,225 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-10-10 11:31:28,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:92, output treesize:152 [2018-10-10 11:31:28,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 33 [2018-10-10 11:31:28,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 20 [2018-10-10 11:31:28,372 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:28,383 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:28,416 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:28,416 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:74, output treesize:51 [2018-10-10 11:31:28,531 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:28,531 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-10 11:31:36,789 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_subst_1 (_ BitVec 32)) (|ULTIMATE.start_write~$Pointer$_#ptr.offset| (_ BitVec 32)) (v_subst_2 (_ BitVec 32))) (= (_ bv1 1) (select |c_#valid| (let ((.cse0 (bvadd c_ULTIMATE.start_append_~head.offset (_ bv4 32)))) (select (select (store |c_#memory_$Pointer$.base| c_ULTIMATE.start_append_~node~0.base (store (store (select |c_#memory_$Pointer$.base| c_ULTIMATE.start_append_~node~0.base) |ULTIMATE.start_write~$Pointer$_#ptr.offset| (select (select |c_#memory_$Pointer$.base| c_ULTIMATE.start_append_~head.base) .cse0)) v_subst_1 v_subst_2)) c_ULTIMATE.start_append_~head.base) .cse0))))) is different from false [2018-10-10 11:32:16,382 WARN L178 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 41 [2018-10-10 11:32:16,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 76 [2018-10-10 11:32:16,716 WARN L178 SmtUtils]: Spent 302.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 54 [2018-10-10 11:32:16,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-10 11:32:16,724 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:32:17,071 INFO L303 Elim1Store]: Index analysis took 218 ms [2018-10-10 11:32:17,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 12 case distinctions, treesize of input 107 treesize of output 144 [2018-10-10 11:32:17,296 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 6 [2018-10-10 11:32:44,754 WARN L178 SmtUtils]: Spent 27.42 s on a formula simplification. DAG size of input: 920 DAG size of output: 739 [2018-10-10 11:32:44,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 50 [2018-10-10 11:32:44,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-10 11:32:44,808 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:44,894 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 11:32:44,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 93 [2018-10-10 11:32:45,191 WARN L178 SmtUtils]: Spent 287.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 63 [2018-10-10 11:32:45,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 64 treesize of output 91 [2018-10-10 11:32:45,400 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-10 11:32:45,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 50 [2018-10-10 11:32:45,470 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:46,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 53 [2018-10-10 11:32:46,097 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:49,333 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-10-10 11:32:49,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 103 [2018-10-10 11:32:49,562 WARN L178 SmtUtils]: Spent 203.00 ms on a formula simplification that was a NOOP. DAG size: 64 [2018-10-10 11:32:49,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 55 [2018-10-10 11:32:49,923 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:50,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 64 treesize of output 91 [2018-10-10 11:32:50,248 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-10 11:32:50,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 48 [2018-10-10 11:32:50,427 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:51,787 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-10 11:33:10,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 56 [2018-10-10 11:33:10,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 49 treesize of output 55 [2018-10-10 11:33:10,821 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 2 xjuncts. [2018-10-10 11:33:11,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 51 treesize of output 72 [2018-10-10 11:33:11,137 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 8 xjuncts. [2018-10-10 11:33:11,489 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-10 11:33:11,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 94 treesize of output 96 [2018-10-10 11:33:11,886 WARN L178 SmtUtils]: Spent 338.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2018-10-10 11:33:12,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 88 treesize of output 108 [2018-10-10 11:33:12,200 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 8 xjuncts. [2018-10-10 11:33:12,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 7 case distinctions, treesize of input 93 treesize of output 115 [2018-10-10 11:33:12,784 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 8 xjuncts. [2018-10-10 11:33:12,888 INFO L303 Elim1Store]: Index analysis took 103 ms [2018-10-10 11:33:13,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 9 case distinctions, treesize of input 109 treesize of output 161 [2018-10-10 11:33:13,287 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 6 [2018-10-10 11:33:13,306 INFO L267 ElimStorePlain]: Start of recursive call 21: 8 dim-0 vars, End of recursive call: 8 dim-0 vars, and 64 xjuncts. [2018-10-10 11:33:56,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 86 treesize of output 91 [2018-10-10 11:33:56,669 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 2 xjuncts. [2018-10-10 11:33:56,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 89 treesize of output 96 [2018-10-10 11:33:56,822 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 2 xjuncts. [2018-10-10 11:34:10,827 INFO L267 ElimStorePlain]: Start of recursive call 18: 2 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-10-10 11:34:39,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 54 [2018-10-10 11:34:39,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 53 [2018-10-10 11:34:39,295 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 2 xjuncts. [2018-10-10 11:34:39,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 49 treesize of output 70 [2018-10-10 11:34:39,580 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 8 xjuncts. [2018-10-10 11:34:39,875 INFO L267 ElimStorePlain]: Start of recursive call 24: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-10 11:35:08,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 50 [2018-10-10 11:35:08,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-10 11:35:08,310 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 2 xjuncts. [2018-10-10 11:35:08,377 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 11:35:34,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 50 [2018-10-10 11:35:34,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-10 11:35:34,147 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 2 xjuncts. [2018-10-10 11:35:34,217 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 11:35:58,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 90 treesize of output 109 [2018-10-10 11:35:59,359 WARN L178 SmtUtils]: Spent 837.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 97 [2018-10-10 11:35:59,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 99 [2018-10-10 11:35:59,375 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-10-10 11:35:59,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 78 [2018-10-10 11:35:59,389 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-10-10 11:35:59,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 83 [2018-10-10 11:35:59,403 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-10-10 11:35:59,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 85 [2018-10-10 11:35:59,416 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:35:59,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 101 [2018-10-10 11:35:59,468 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:35:59,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 80 [2018-10-10 11:35:59,495 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:36:00,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 74 treesize of output 75 [2018-10-10 11:36:00,599 INFO L267 ElimStorePlain]: Start of recursive call 38: End of recursive call: and 2 xjuncts. [2018-10-10 11:36:00,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 97 treesize of output 97 [2018-10-10 11:36:00,684 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 2 xjuncts. [2018-10-10 11:36:00,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 72 [2018-10-10 11:36:00,695 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-10-10 11:36:00,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 84 [2018-10-10 11:36:00,712 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-10-10 11:36:02,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 70 [2018-10-10 11:36:02,037 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-10-10 11:36:02,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 62 [2018-10-10 11:36:02,052 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 1 xjuncts. [2018-10-10 11:36:02,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 59 [2018-10-10 11:36:02,064 INFO L267 ElimStorePlain]: Start of recursive call 44: End of recursive call: and 1 xjuncts. [2018-10-10 11:36:03,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 70 treesize of output 98 [2018-10-10 11:36:03,092 INFO L267 ElimStorePlain]: Start of recursive call 45: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-10 11:36:03,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 59 treesize of output 67 [2018-10-10 11:36:03,233 INFO L267 ElimStorePlain]: Start of recursive call 46: End of recursive call: and 2 xjuncts. [2018-10-10 11:36:03,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 62 treesize of output 67 [2018-10-10 11:36:03,278 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 2 xjuncts. [2018-10-10 11:36:40,751 INFO L267 ElimStorePlain]: Start of recursive call 31: 4 dim-1 vars, End of recursive call: 3 dim-0 vars, and 9 xjuncts. [2018-10-10 11:37:37,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 54 [2018-10-10 11:37:37,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 49 treesize of output 70 [2018-10-10 11:37:37,164 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 8 xjuncts. [2018-10-10 11:37:37,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 53 [2018-10-10 11:37:37,537 INFO L267 ElimStorePlain]: Start of recursive call 50: End of recursive call: and 2 xjuncts. [2018-10-10 11:37:37,816 INFO L267 ElimStorePlain]: Start of recursive call 48: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-10 11:38:35,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 7 case distinctions, treesize of input 87 treesize of output 132 [2018-10-10 11:39:09,784 WARN L178 SmtUtils]: Spent 33.87 s on a formula simplification. DAG size of input: 617 DAG size of output: 484 [2018-10-10 11:39:09,793 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:39:09,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 86 treesize of output 99 [2018-10-10 11:39:09,869 INFO L267 ElimStorePlain]: Start of recursive call 52: End of recursive call: and 2 xjuncts. [2018-10-10 11:39:09,878 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:39:10,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 105 treesize of output 124 [2018-10-10 11:39:10,099 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 4 xjuncts. [2018-10-10 11:39:10,108 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:39:10,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 102 treesize of output 121 [2018-10-10 11:39:10,296 INFO L267 ElimStorePlain]: Start of recursive call 54: End of recursive call: and 4 xjuncts. [2018-10-10 11:39:10,302 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:39:10,413 INFO L303 Elim1Store]: Index analysis took 115 ms [2018-10-10 11:39:10,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 110 treesize of output 129 [2018-10-10 11:39:10,510 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 4 xjuncts. [2018-10-10 11:39:10,543 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:39:10,655 INFO L303 Elim1Store]: Index analysis took 144 ms [2018-10-10 11:39:10,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 94 treesize of output 107 [2018-10-10 11:39:10,814 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 2 xjuncts. [2018-10-10 11:39:10,843 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:39:10,933 INFO L303 Elim1Store]: Index analysis took 118 ms [2018-10-10 11:39:10,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 89 treesize of output 102 [2018-10-10 11:39:10,994 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 2 xjuncts. [2018-10-10 11:39:49,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 90 treesize of output 101 [2018-10-10 11:39:49,788 INFO L267 ElimStorePlain]: Start of recursive call 58: End of recursive call: and 4 xjuncts. [2018-10-10 11:39:49,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 96 treesize of output 107 [2018-10-10 11:39:49,908 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 4 xjuncts.