java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --traceabstraction.dump.automata.to.the.following.directory dump -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/length_test03_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c5b1954-m [2018-10-10 11:30:34,664 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-10 11:30:34,666 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-10 11:30:34,680 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-10 11:30:34,681 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-10 11:30:34,682 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-10 11:30:34,683 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-10 11:30:34,685 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-10 11:30:34,687 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-10 11:30:34,688 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-10 11:30:34,688 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-10 11:30:34,689 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-10 11:30:34,690 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-10 11:30:34,691 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-10 11:30:34,692 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-10 11:30:34,693 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-10 11:30:34,693 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-10 11:30:34,695 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-10 11:30:34,697 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-10 11:30:34,699 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-10 11:30:34,700 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-10 11:30:34,701 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-10 11:30:34,703 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-10 11:30:34,703 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-10 11:30:34,704 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-10 11:30:34,705 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-10 11:30:34,706 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-10 11:30:34,706 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-10 11:30:34,707 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-10 11:30:34,708 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-10 11:30:34,709 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-10 11:30:34,709 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-10 11:30:34,710 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-10 11:30:34,710 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-10 11:30:34,711 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-10 11:30:34,712 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-10 11:30:34,712 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-10-10 11:30:34,726 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-10 11:30:34,727 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-10 11:30:34,728 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-10 11:30:34,728 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-10 11:30:34,728 INFO L133 SettingsManager]: * Use SBE=true [2018-10-10 11:30:34,729 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-10 11:30:34,729 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-10 11:30:34,729 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-10 11:30:34,729 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-10 11:30:34,729 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-10 11:30:34,730 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-10 11:30:34,730 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-10 11:30:34,730 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-10 11:30:34,730 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-10 11:30:34,730 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-10 11:30:34,731 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-10-10 11:30:34,731 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-10-10 11:30:34,731 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-10 11:30:34,731 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-10 11:30:34,731 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-10 11:30:34,732 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-10 11:30:34,732 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-10 11:30:34,732 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 11:30:34,732 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-10 11:30:34,732 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-10 11:30:34,733 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-10-10 11:30:34,733 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-10 11:30:34,733 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-10-10 11:30:34,733 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Dump automata to the following directory -> dump [2018-10-10 11:30:34,781 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-10 11:30:34,796 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-10 11:30:34,801 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-10 11:30:34,803 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-10 11:30:34,803 INFO L276 PluginConnector]: CDTParser initialized [2018-10-10 11:30:34,804 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-10-10 11:30:35,104 INFO L217 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/06501dbe0/bf602af70f7e45019ebccd638b1f2f31/FLAG648bffffc [2018-10-10 11:30:35,401 INFO L289 CDTParser]: Found 1 translation units. [2018-10-10 11:30:35,402 INFO L157 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-10-10 11:30:35,413 INFO L337 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/06501dbe0/bf602af70f7e45019ebccd638b1f2f31/FLAG648bffffc [2018-10-10 11:30:35,429 INFO L345 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/06501dbe0/bf602af70f7e45019ebccd638b1f2f31 [2018-10-10 11:30:35,440 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-10 11:30:35,441 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-10-10 11:30:35,442 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-10 11:30:35,443 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-10 11:30:35,446 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-10 11:30:35,448 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:35,451 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5831cc4a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35, skipping insertion in model container [2018-10-10 11:30:35,451 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:35,461 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-10 11:30:35,503 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-10 11:30:35,756 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 11:30:35,772 INFO L189 MainTranslator]: Completed pre-run [2018-10-10 11:30:35,889 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 11:30:35,950 INFO L193 MainTranslator]: Completed translation [2018-10-10 11:30:35,951 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35 WrapperNode [2018-10-10 11:30:35,951 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-10 11:30:35,952 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-10 11:30:35,952 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-10 11:30:35,952 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-10 11:30:35,962 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:35,984 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,033 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-10 11:30:36,034 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-10 11:30:36,034 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-10 11:30:36,034 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-10 11:30:36,129 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,130 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,143 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,143 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,164 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,170 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,175 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... [2018-10-10 11:30:36,182 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-10 11:30:36,182 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-10 11:30:36,183 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-10 11:30:36,186 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-10 11:30:36,187 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 11:30:36,264 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-10 11:30:36,264 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-10 11:30:38,400 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-10 11:30:38,401 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 11:30:38 BoogieIcfgContainer [2018-10-10 11:30:38,401 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-10 11:30:38,402 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-10 11:30:38,403 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-10 11:30:38,406 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-10 11:30:38,406 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.10 11:30:35" (1/3) ... [2018-10-10 11:30:38,407 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@364c3c34 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 11:30:38, skipping insertion in model container [2018-10-10 11:30:38,407 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 11:30:35" (2/3) ... [2018-10-10 11:30:38,408 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@364c3c34 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 11:30:38, skipping insertion in model container [2018-10-10 11:30:38,408 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 11:30:38" (3/3) ... [2018-10-10 11:30:38,410 INFO L112 eAbstractionObserver]: Analyzing ICFG length_test03_true-valid-memsafety.i [2018-10-10 11:30:38,419 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-10 11:30:38,430 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 81 error locations. [2018-10-10 11:30:38,448 INFO L257 AbstractCegarLoop]: Starting to check reachability of 81 error locations. [2018-10-10 11:30:38,476 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-10 11:30:38,477 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-10 11:30:38,477 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-10 11:30:38,478 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-10 11:30:38,478 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-10 11:30:38,478 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-10 11:30:38,478 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-10 11:30:38,478 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-10 11:30:38,478 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-10 11:30:38,503 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states. [2018-10-10 11:30:38,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-10-10 11:30:38,511 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:38,512 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-10-10 11:30:38,518 INFO L424 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:38,523 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:38,524 INFO L82 PathProgramCache]: Analyzing trace with hash 29856, now seen corresponding path program 1 times [2018-10-10 11:30:38,528 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:38,529 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:38,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:38,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:38,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:38,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:38,649 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:38,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:38,681 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:38,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:38,739 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:38,742 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:38,742 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:38,747 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:38,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:38,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:38,771 INFO L87 Difference]: Start difference. First operand 186 states. Second operand 3 states. [2018-10-10 11:30:40,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:40,139 INFO L93 Difference]: Finished difference Result 218 states and 227 transitions. [2018-10-10 11:30:40,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:40,140 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2018-10-10 11:30:40,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:40,155 INFO L225 Difference]: With dead ends: 218 [2018-10-10 11:30:40,156 INFO L226 Difference]: Without dead ends: 216 [2018-10-10 11:30:40,158 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:40,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-10-10 11:30:40,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 182. [2018-10-10 11:30:40,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-10-10 11:30:40,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 189 transitions. [2018-10-10 11:30:40,211 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 189 transitions. Word has length 3 [2018-10-10 11:30:40,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:40,212 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 189 transitions. [2018-10-10 11:30:40,212 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:40,212 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 189 transitions. [2018-10-10 11:30:40,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-10-10 11:30:40,213 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:40,213 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-10-10 11:30:40,217 INFO L424 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:40,218 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:40,218 INFO L82 PathProgramCache]: Analyzing trace with hash 925572, now seen corresponding path program 1 times [2018-10-10 11:30:40,218 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:40,219 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:40,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:40,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:40,290 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:40,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:40,319 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:40,412 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:40,413 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-10 11:30:40,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:40,517 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:40,519 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:40,519 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:40,520 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:40,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:40,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:40,521 INFO L87 Difference]: Start difference. First operand 182 states and 189 transitions. Second operand 3 states. [2018-10-10 11:30:41,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:41,273 INFO L93 Difference]: Finished difference Result 180 states and 187 transitions. [2018-10-10 11:30:41,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:41,275 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-10-10 11:30:41,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:41,278 INFO L225 Difference]: With dead ends: 180 [2018-10-10 11:30:41,278 INFO L226 Difference]: Without dead ends: 180 [2018-10-10 11:30:41,279 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:41,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-10-10 11:30:41,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-10-10 11:30:41,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-10-10 11:30:41,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 187 transitions. [2018-10-10 11:30:41,293 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 187 transitions. Word has length 4 [2018-10-10 11:30:41,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:41,293 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 187 transitions. [2018-10-10 11:30:41,293 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:41,293 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 187 transitions. [2018-10-10 11:30:41,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-10-10 11:30:41,294 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:41,294 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-10-10 11:30:41,296 INFO L424 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:41,297 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:41,297 INFO L82 PathProgramCache]: Analyzing trace with hash 28692770, now seen corresponding path program 1 times [2018-10-10 11:30:41,297 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:41,297 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:41,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:41,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:41,354 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:41,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:41,370 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:41,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:41,377 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:41,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:41,588 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:41,591 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:41,592 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 11:30:41,592 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 11:30:41,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 11:30:41,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:41,596 INFO L87 Difference]: Start difference. First operand 180 states and 187 transitions. Second operand 5 states. [2018-10-10 11:30:42,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:42,986 INFO L93 Difference]: Finished difference Result 213 states and 222 transitions. [2018-10-10 11:30:42,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-10 11:30:42,987 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2018-10-10 11:30:42,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:42,989 INFO L225 Difference]: With dead ends: 213 [2018-10-10 11:30:42,989 INFO L226 Difference]: Without dead ends: 213 [2018-10-10 11:30:42,989 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-10-10 11:30:42,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-10-10 11:30:43,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 179. [2018-10-10 11:30:43,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-10 11:30:43,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 186 transitions. [2018-10-10 11:30:43,002 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 186 transitions. Word has length 5 [2018-10-10 11:30:43,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:43,003 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 186 transitions. [2018-10-10 11:30:43,003 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 11:30:43,003 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 186 transitions. [2018-10-10 11:30:43,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2018-10-10 11:30:43,003 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:43,004 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2018-10-10 11:30:43,006 INFO L424 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:43,006 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:43,006 INFO L82 PathProgramCache]: Analyzing trace with hash 889475910, now seen corresponding path program 1 times [2018-10-10 11:30:43,007 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:43,007 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:43,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:43,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:43,070 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:43,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:43,086 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:43,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:43,130 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:43,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:43,227 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:43,229 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:43,229 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:43,230 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:43,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:43,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:43,231 INFO L87 Difference]: Start difference. First operand 179 states and 186 transitions. Second operand 4 states. [2018-10-10 11:30:44,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:44,173 INFO L93 Difference]: Finished difference Result 179 states and 186 transitions. [2018-10-10 11:30:44,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:30:44,174 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 6 [2018-10-10 11:30:44,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:44,176 INFO L225 Difference]: With dead ends: 179 [2018-10-10 11:30:44,176 INFO L226 Difference]: Without dead ends: 179 [2018-10-10 11:30:44,176 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:44,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-10-10 11:30:44,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 178. [2018-10-10 11:30:44,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-10 11:30:44,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 185 transitions. [2018-10-10 11:30:44,185 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 185 transitions. Word has length 6 [2018-10-10 11:30:44,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:44,185 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 185 transitions. [2018-10-10 11:30:44,186 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:44,186 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 185 transitions. [2018-10-10 11:30:44,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-10 11:30:44,186 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:44,187 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:44,189 INFO L424 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:44,189 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:44,189 INFO L82 PathProgramCache]: Analyzing trace with hash -1571339738, now seen corresponding path program 1 times [2018-10-10 11:30:44,190 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:44,190 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:44,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:44,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:44,283 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:44,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:44,291 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:44,295 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:44,296 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:44,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:44,314 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:44,315 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:44,316 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:44,316 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:44,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:44,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:44,317 INFO L87 Difference]: Start difference. First operand 178 states and 185 transitions. Second operand 4 states. [2018-10-10 11:30:45,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:45,107 INFO L93 Difference]: Finished difference Result 210 states and 219 transitions. [2018-10-10 11:30:45,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-10 11:30:45,108 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2018-10-10 11:30:45,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:45,110 INFO L225 Difference]: With dead ends: 210 [2018-10-10 11:30:45,110 INFO L226 Difference]: Without dead ends: 210 [2018-10-10 11:30:45,111 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:45,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-10-10 11:30:45,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 189. [2018-10-10 11:30:45,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-10-10 11:30:45,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 203 transitions. [2018-10-10 11:30:45,125 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 203 transitions. Word has length 9 [2018-10-10 11:30:45,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:45,126 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 203 transitions. [2018-10-10 11:30:45,126 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:45,126 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 203 transitions. [2018-10-10 11:30:45,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-10 11:30:45,126 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:45,127 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:45,129 INFO L424 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:45,129 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:45,129 INFO L82 PathProgramCache]: Analyzing trace with hash -1466891574, now seen corresponding path program 1 times [2018-10-10 11:30:45,130 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:45,130 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:45,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:45,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:45,235 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:45,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:45,246 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:45,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:45,253 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:45,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:45,282 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:45,285 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:45,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:45,286 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:45,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:45,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:45,287 INFO L87 Difference]: Start difference. First operand 189 states and 203 transitions. Second operand 4 states. [2018-10-10 11:30:46,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:46,174 INFO L93 Difference]: Finished difference Result 189 states and 203 transitions. [2018-10-10 11:30:46,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:30:46,174 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-10 11:30:46,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:46,176 INFO L225 Difference]: With dead ends: 189 [2018-10-10 11:30:46,176 INFO L226 Difference]: Without dead ends: 189 [2018-10-10 11:30:46,177 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:46,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-10-10 11:30:46,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 188. [2018-10-10 11:30:46,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-10 11:30:46,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 202 transitions. [2018-10-10 11:30:46,182 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 202 transitions. Word has length 10 [2018-10-10 11:30:46,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:46,183 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 202 transitions. [2018-10-10 11:30:46,183 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:46,183 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 202 transitions. [2018-10-10 11:30:46,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-10 11:30:46,183 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:46,184 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:46,186 INFO L424 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:46,186 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:46,187 INFO L82 PathProgramCache]: Analyzing trace with hash -933527860, now seen corresponding path program 1 times [2018-10-10 11:30:46,187 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:46,187 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:46,210 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:46,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:46,297 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:46,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:46,317 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:46,319 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:46,319 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:46,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:46,328 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:46,332 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:46,332 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:46,332 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:46,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:46,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:46,334 INFO L87 Difference]: Start difference. First operand 188 states and 202 transitions. Second operand 3 states. [2018-10-10 11:30:46,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:46,854 INFO L93 Difference]: Finished difference Result 208 states and 217 transitions. [2018-10-10 11:30:46,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:46,855 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-10-10 11:30:46,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:46,856 INFO L225 Difference]: With dead ends: 208 [2018-10-10 11:30:46,856 INFO L226 Difference]: Without dead ends: 208 [2018-10-10 11:30:46,857 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:46,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-10-10 11:30:46,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 186. [2018-10-10 11:30:46,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-10-10 11:30:46,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 200 transitions. [2018-10-10 11:30:46,861 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 200 transitions. Word has length 12 [2018-10-10 11:30:46,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:46,862 INFO L481 AbstractCegarLoop]: Abstraction has 186 states and 200 transitions. [2018-10-10 11:30:46,862 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:46,862 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 200 transitions. [2018-10-10 11:30:46,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-10-10 11:30:46,862 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:46,863 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:46,864 INFO L424 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:46,864 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:46,865 INFO L82 PathProgramCache]: Analyzing trace with hash 1125407468, now seen corresponding path program 1 times [2018-10-10 11:30:46,865 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:46,865 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:46,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:46,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:46,983 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:46,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:46,989 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:47,000 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:47,000 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-10 11:30:47,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:47,015 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:47,017 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:47,018 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-10 11:30:47,018 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:47,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:47,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:47,019 INFO L87 Difference]: Start difference. First operand 186 states and 200 transitions. Second operand 3 states. [2018-10-10 11:30:47,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:47,535 INFO L93 Difference]: Finished difference Result 185 states and 199 transitions. [2018-10-10 11:30:47,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:47,536 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-10-10 11:30:47,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:47,537 INFO L225 Difference]: With dead ends: 185 [2018-10-10 11:30:47,537 INFO L226 Difference]: Without dead ends: 185 [2018-10-10 11:30:47,538 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:47,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-10-10 11:30:47,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 184. [2018-10-10 11:30:47,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-10-10 11:30:47,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 198 transitions. [2018-10-10 11:30:47,542 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 198 transitions. Word has length 13 [2018-10-10 11:30:47,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:47,542 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 198 transitions. [2018-10-10 11:30:47,543 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:47,543 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 198 transitions. [2018-10-10 11:30:47,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-10 11:30:47,543 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:47,543 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:47,544 INFO L424 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:47,545 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:47,545 INFO L82 PathProgramCache]: Analyzing trace with hash 527893198, now seen corresponding path program 1 times [2018-10-10 11:30:47,545 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:47,546 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:47,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:47,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:47,690 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:47,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:47,695 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:47,706 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:47,706 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:30:47,733 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:47,754 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:47,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 11:30:47,756 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:47,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:30:47,780 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:16 [2018-10-10 11:30:47,910 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:30:47,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-10-10 11:30:47,914 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:48,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-10 11:30:48,029 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:20 [2018-10-10 11:30:48,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:48,092 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:48,094 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:48,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:30:48,095 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:30:48,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:30:48,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:30:48,099 INFO L87 Difference]: Start difference. First operand 184 states and 198 transitions. Second operand 7 states. [2018-10-10 11:30:50,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:50,526 INFO L93 Difference]: Finished difference Result 246 states and 258 transitions. [2018-10-10 11:30:50,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:30:50,526 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-10-10 11:30:50,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:50,529 INFO L225 Difference]: With dead ends: 246 [2018-10-10 11:30:50,529 INFO L226 Difference]: Without dead ends: 246 [2018-10-10 11:30:50,529 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:30:50,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-10-10 11:30:50,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 179. [2018-10-10 11:30:50,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-10 11:30:50,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 193 transitions. [2018-10-10 11:30:50,535 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 193 transitions. Word has length 14 [2018-10-10 11:30:50,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:50,535 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 193 transitions. [2018-10-10 11:30:50,535 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:30:50,536 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 193 transitions. [2018-10-10 11:30:50,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-10 11:30:50,536 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:50,536 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:50,537 INFO L424 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:50,537 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:50,538 INFO L82 PathProgramCache]: Analyzing trace with hash -815179986, now seen corresponding path program 1 times [2018-10-10 11:30:50,538 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:50,538 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:50,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:50,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:50,706 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:50,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:50,717 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:50,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:50,762 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:50,770 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:50,771 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:30:50,812 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:50,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:30:50,819 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:50,846 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:50,847 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:50,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:30:50,849 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:50,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:50,896 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-10-10 11:30:50,980 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:50,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:30:50,996 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:30:51,019 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:30:51,020 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:30:51,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:51,161 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:51,165 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:51,166 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 11:30:51,166 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 11:30:51,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 11:30:51,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-10 11:30:51,167 INFO L87 Difference]: Start difference. First operand 179 states and 193 transitions. Second operand 6 states. [2018-10-10 11:30:51,723 WARN L178 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 45 [2018-10-10 11:30:53,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:53,687 INFO L93 Difference]: Finished difference Result 309 states and 325 transitions. [2018-10-10 11:30:53,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-10 11:30:53,688 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-10-10 11:30:53,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:53,690 INFO L225 Difference]: With dead ends: 309 [2018-10-10 11:30:53,691 INFO L226 Difference]: Without dead ends: 309 [2018-10-10 11:30:53,691 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:30:53,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-10-10 11:30:53,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 182. [2018-10-10 11:30:53,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-10-10 11:30:53,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 197 transitions. [2018-10-10 11:30:53,696 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 197 transitions. Word has length 15 [2018-10-10 11:30:53,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:53,697 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 197 transitions. [2018-10-10 11:30:53,697 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 11:30:53,697 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 197 transitions. [2018-10-10 11:30:53,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-10 11:30:53,697 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:53,698 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:53,698 INFO L424 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:53,698 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:53,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1281808717, now seen corresponding path program 1 times [2018-10-10 11:30:53,699 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:53,699 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:53,717 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:53,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:53,867 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:53,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:53,876 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:53,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,899 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,899 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:30:53,923 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:53,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:30:53,926 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,950 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:53,951 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:53,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:30:53,952 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,966 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:53,966 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-10-10 11:30:54,042 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:30:54,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:30:54,063 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:30:54,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:30:54,086 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:30:54,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:54,247 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:54,250 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:54,250 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:30:54,250 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:30:54,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:30:54,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:30:54,251 INFO L87 Difference]: Start difference. First operand 182 states and 197 transitions. Second operand 7 states. [2018-10-10 11:30:54,741 WARN L178 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 45 [2018-10-10 11:30:56,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:56,714 INFO L93 Difference]: Finished difference Result 306 states and 322 transitions. [2018-10-10 11:30:56,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 11:30:56,715 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 18 [2018-10-10 11:30:56,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:56,717 INFO L225 Difference]: With dead ends: 306 [2018-10-10 11:30:56,717 INFO L226 Difference]: Without dead ends: 306 [2018-10-10 11:30:56,718 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-10-10 11:30:56,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-10-10 11:30:56,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 179. [2018-10-10 11:30:56,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-10 11:30:56,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 194 transitions. [2018-10-10 11:30:56,722 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 194 transitions. Word has length 18 [2018-10-10 11:30:56,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:56,723 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 194 transitions. [2018-10-10 11:30:56,723 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:30:56,723 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 194 transitions. [2018-10-10 11:30:56,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-10 11:30:56,724 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:56,724 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:56,724 INFO L424 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:56,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:56,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1281802695, now seen corresponding path program 1 times [2018-10-10 11:30:56,725 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:56,725 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:56,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:56,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:56,804 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:56,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:56,837 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:56,840 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:56,840 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:56,840 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:30:56,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:30:56,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:56,841 INFO L87 Difference]: Start difference. First operand 179 states and 194 transitions. Second operand 3 states. [2018-10-10 11:30:56,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:56,891 INFO L93 Difference]: Finished difference Result 181 states and 196 transitions. [2018-10-10 11:30:56,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:30:56,896 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-10-10 11:30:56,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:56,897 INFO L225 Difference]: With dead ends: 181 [2018-10-10 11:30:56,898 INFO L226 Difference]: Without dead ends: 181 [2018-10-10 11:30:56,898 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:30:56,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-10-10 11:30:56,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 181. [2018-10-10 11:30:56,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-10-10 11:30:56,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 196 transitions. [2018-10-10 11:30:56,902 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 196 transitions. Word has length 18 [2018-10-10 11:30:56,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:56,902 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 196 transitions. [2018-10-10 11:30:56,902 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:30:56,902 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 196 transitions. [2018-10-10 11:30:56,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-10 11:30:56,903 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:56,903 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:56,904 INFO L424 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:56,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:56,904 INFO L82 PathProgramCache]: Analyzing trace with hash 837439253, now seen corresponding path program 1 times [2018-10-10 11:30:56,905 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:56,905 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:56,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:57,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:57,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:57,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:57,089 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:57,091 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:57,091 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 11:30:57,091 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 11:30:57,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 11:30:57,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:57,092 INFO L87 Difference]: Start difference. First operand 181 states and 196 transitions. Second operand 5 states. [2018-10-10 11:30:58,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:58,324 INFO L93 Difference]: Finished difference Result 194 states and 204 transitions. [2018-10-10 11:30:58,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:30:58,325 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-10-10 11:30:58,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:58,326 INFO L225 Difference]: With dead ends: 194 [2018-10-10 11:30:58,326 INFO L226 Difference]: Without dead ends: 194 [2018-10-10 11:30:58,331 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-10 11:30:58,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-10-10 11:30:58,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 172. [2018-10-10 11:30:58,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-10-10 11:30:58,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 187 transitions. [2018-10-10 11:30:58,336 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 187 transitions. Word has length 20 [2018-10-10 11:30:58,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:58,337 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 187 transitions. [2018-10-10 11:30:58,337 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 11:30:58,337 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 187 transitions. [2018-10-10 11:30:58,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-10 11:30:58,338 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:58,338 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:58,339 INFO L424 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:58,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:58,339 INFO L82 PathProgramCache]: Analyzing trace with hash 843780635, now seen corresponding path program 1 times [2018-10-10 11:30:58,340 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:58,340 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:58,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:58,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:58,491 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:58,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:30:58,501 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:30:58,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:30:58,503 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:30:58,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:58,526 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:58,528 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:58,528 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:30:58,528 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:30:58,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:30:58,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:30:58,529 INFO L87 Difference]: Start difference. First operand 172 states and 187 transitions. Second operand 4 states. [2018-10-10 11:30:59,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:30:59,213 INFO L93 Difference]: Finished difference Result 186 states and 196 transitions. [2018-10-10 11:30:59,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-10 11:30:59,214 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-10-10 11:30:59,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:30:59,215 INFO L225 Difference]: With dead ends: 186 [2018-10-10 11:30:59,216 INFO L226 Difference]: Without dead ends: 186 [2018-10-10 11:30:59,216 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:30:59,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-10-10 11:30:59,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 164. [2018-10-10 11:30:59,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-10-10 11:30:59,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 179 transitions. [2018-10-10 11:30:59,220 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 179 transitions. Word has length 20 [2018-10-10 11:30:59,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:30:59,221 INFO L481 AbstractCegarLoop]: Abstraction has 164 states and 179 transitions. [2018-10-10 11:30:59,221 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:30:59,221 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 179 transitions. [2018-10-10 11:30:59,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-10 11:30:59,222 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:30:59,222 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:30:59,222 INFO L424 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:30:59,223 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:30:59,223 INFO L82 PathProgramCache]: Analyzing trace with hash 190813144, now seen corresponding path program 1 times [2018-10-10 11:30:59,223 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:30:59,223 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:30:59,251 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:30:59,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:30:59,388 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:30:59,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:30:59,465 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:30:59,468 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:30:59,469 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:30:59,469 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:30:59,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:30:59,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:30:59,469 INFO L87 Difference]: Start difference. First operand 164 states and 179 transitions. Second operand 7 states. [2018-10-10 11:31:00,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:00,795 INFO L93 Difference]: Finished difference Result 222 states and 245 transitions. [2018-10-10 11:31:00,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 11:31:00,797 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-10-10 11:31:00,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:00,799 INFO L225 Difference]: With dead ends: 222 [2018-10-10 11:31:00,799 INFO L226 Difference]: Without dead ends: 222 [2018-10-10 11:31:00,800 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-10-10 11:31:00,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-10-10 11:31:00,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 163. [2018-10-10 11:31:00,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-10-10 11:31:00,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 178 transitions. [2018-10-10 11:31:00,804 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 178 transitions. Word has length 21 [2018-10-10 11:31:00,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:00,805 INFO L481 AbstractCegarLoop]: Abstraction has 163 states and 178 transitions. [2018-10-10 11:31:00,805 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:00,805 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 178 transitions. [2018-10-10 11:31:00,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-10 11:31:00,806 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:00,806 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:00,807 INFO L424 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:00,807 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:00,807 INFO L82 PathProgramCache]: Analyzing trace with hash 387396008, now seen corresponding path program 1 times [2018-10-10 11:31:00,808 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:00,808 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:00,835 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:00,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:00,965 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:00,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:00,970 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:00,977 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:00,977 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:31:01,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:01,011 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:01,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:01,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:31:01,013 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:31:01,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:31:01,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:31:01,014 INFO L87 Difference]: Start difference. First operand 163 states and 178 transitions. Second operand 4 states. [2018-10-10 11:31:01,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:01,994 INFO L93 Difference]: Finished difference Result 160 states and 175 transitions. [2018-10-10 11:31:01,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:31:01,995 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2018-10-10 11:31:01,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:01,997 INFO L225 Difference]: With dead ends: 160 [2018-10-10 11:31:01,997 INFO L226 Difference]: Without dead ends: 160 [2018-10-10 11:31:01,997 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:31:01,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-10-10 11:31:02,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 159. [2018-10-10 11:31:02,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-10-10 11:31:02,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 174 transitions. [2018-10-10 11:31:02,001 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 174 transitions. Word has length 21 [2018-10-10 11:31:02,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:02,001 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 174 transitions. [2018-10-10 11:31:02,001 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:31:02,001 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 174 transitions. [2018-10-10 11:31:02,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-10 11:31:02,002 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:02,002 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:02,003 INFO L424 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:02,003 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:02,003 INFO L82 PathProgramCache]: Analyzing trace with hash -1312159814, now seen corresponding path program 1 times [2018-10-10 11:31:02,003 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:02,004 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:02,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:02,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:02,232 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:02,547 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-10-10 11:31:02,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:02,599 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:02,601 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:02,601 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:02,601 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:02,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:02,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:02,602 INFO L87 Difference]: Start difference. First operand 159 states and 174 transitions. Second operand 7 states. [2018-10-10 11:31:04,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:04,428 INFO L93 Difference]: Finished difference Result 309 states and 346 transitions. [2018-10-10 11:31:04,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-10 11:31:04,428 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-10-10 11:31:04,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:04,432 INFO L225 Difference]: With dead ends: 309 [2018-10-10 11:31:04,432 INFO L226 Difference]: Without dead ends: 309 [2018-10-10 11:31:04,433 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=84, Invalid=156, Unknown=0, NotChecked=0, Total=240 [2018-10-10 11:31:04,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-10-10 11:31:04,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 157. [2018-10-10 11:31:04,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-10-10 11:31:04,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 172 transitions. [2018-10-10 11:31:04,440 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 172 transitions. Word has length 23 [2018-10-10 11:31:04,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:04,441 INFO L481 AbstractCegarLoop]: Abstraction has 157 states and 172 transitions. [2018-10-10 11:31:04,441 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:04,441 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 172 transitions. [2018-10-10 11:31:04,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-10 11:31:04,442 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:04,442 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:04,443 INFO L424 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:04,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:04,443 INFO L82 PathProgramCache]: Analyzing trace with hash -1374587830, now seen corresponding path program 1 times [2018-10-10 11:31:04,443 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:04,444 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:04,464 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:04,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:04,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:04,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:04,633 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:04,640 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:04,641 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:31:04,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:04,684 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:04,687 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:04,687 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:31:04,688 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-10 11:31:04,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-10 11:31:04,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-10 11:31:04,689 INFO L87 Difference]: Start difference. First operand 157 states and 172 transitions. Second operand 4 states. [2018-10-10 11:31:05,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:05,518 INFO L93 Difference]: Finished difference Result 253 states and 283 transitions. [2018-10-10 11:31:05,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-10 11:31:05,519 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-10-10 11:31:05,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:05,520 INFO L225 Difference]: With dead ends: 253 [2018-10-10 11:31:05,520 INFO L226 Difference]: Without dead ends: 253 [2018-10-10 11:31:05,521 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-10 11:31:05,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2018-10-10 11:31:05,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 153. [2018-10-10 11:31:05,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-10-10 11:31:05,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 168 transitions. [2018-10-10 11:31:05,525 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 168 transitions. Word has length 23 [2018-10-10 11:31:05,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:05,526 INFO L481 AbstractCegarLoop]: Abstraction has 153 states and 168 transitions. [2018-10-10 11:31:05,526 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-10 11:31:05,526 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 168 transitions. [2018-10-10 11:31:05,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-10 11:31:05,527 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:05,527 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:05,528 INFO L424 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:05,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:05,540 INFO L82 PathProgramCache]: Analyzing trace with hash -2127739135, now seen corresponding path program 1 times [2018-10-10 11:31:05,540 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:05,541 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:05,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:05,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:05,826 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:05,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:05,835 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,862 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-10-10 11:31:05,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 11:31:05,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:05,894 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,897 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 11:31:05,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:05,929 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,932 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:05,950 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:41, output treesize:33 [2018-10-10 11:31:06,185 WARN L178 SmtUtils]: Spent 174.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-10-10 11:31:06,227 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:06,252 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:06,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:31:06,254 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-10 11:31:06,339 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:06,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 11:31:06,343 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,361 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-10 11:31:06,442 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:06,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 11:31:06,446 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,460 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,490 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,490 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:57, output treesize:25 [2018-10-10 11:31:06,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,542 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,555 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,635 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,654 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,676 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,677 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:44, output treesize:22 [2018-10-10 11:31:06,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,726 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,738 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 11:31:06,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:06,782 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,793 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,817 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,817 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:44, output treesize:18 [2018-10-10 11:31:06,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-10 11:31:06,900 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-10 11:31:06,907 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,908 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:06,909 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:1 [2018-10-10 11:31:06,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:06,934 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:06,936 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:06,937 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-10 11:31:06,937 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 11:31:06,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 11:31:06,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:31:06,938 INFO L87 Difference]: Start difference. First operand 153 states and 168 transitions. Second operand 10 states. [2018-10-10 11:31:09,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:09,633 INFO L93 Difference]: Finished difference Result 168 states and 184 transitions. [2018-10-10 11:31:09,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-10 11:31:09,634 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 26 [2018-10-10 11:31:09,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:09,635 INFO L225 Difference]: With dead ends: 168 [2018-10-10 11:31:09,635 INFO L226 Difference]: Without dead ends: 168 [2018-10-10 11:31:09,635 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2018-10-10 11:31:09,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-10-10 11:31:09,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 159. [2018-10-10 11:31:09,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-10-10 11:31:09,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 174 transitions. [2018-10-10 11:31:09,639 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 174 transitions. Word has length 26 [2018-10-10 11:31:09,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:09,639 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 174 transitions. [2018-10-10 11:31:09,639 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 11:31:09,639 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 174 transitions. [2018-10-10 11:31:09,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-10 11:31:09,640 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:09,640 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:09,641 INFO L424 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:09,641 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:09,641 INFO L82 PathProgramCache]: Analyzing trace with hash -801260579, now seen corresponding path program 1 times [2018-10-10 11:31:09,641 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:09,641 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:09,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:09,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:09,971 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:09,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:09,995 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,999 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:09,999 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 11:31:10,036 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:10,040 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:10,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 11:31:10,041 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-10 11:31:10,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-10 11:31:10,096 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,100 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-10 11:31:10,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-10 11:31:10,127 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,131 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,147 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,147 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:43, output treesize:29 [2018-10-10 11:31:10,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:10,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:10,246 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,258 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:10,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:10,366 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,461 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,617 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,618 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:48, output treesize:26 [2018-10-10 11:31:10,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:10,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:10,673 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,686 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,730 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:10,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:10,735 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,748 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:10,775 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:48, output treesize:22 [2018-10-10 11:31:10,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:10,907 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:10,909 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:10,910 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-10 11:31:10,910 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 11:31:10,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 11:31:10,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:31:10,910 INFO L87 Difference]: Start difference. First operand 159 states and 174 transitions. Second operand 10 states. [2018-10-10 11:31:13,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:13,206 INFO L93 Difference]: Finished difference Result 185 states and 195 transitions. [2018-10-10 11:31:13,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-10 11:31:13,207 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 28 [2018-10-10 11:31:13,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:13,208 INFO L225 Difference]: With dead ends: 185 [2018-10-10 11:31:13,209 INFO L226 Difference]: Without dead ends: 185 [2018-10-10 11:31:13,209 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-10-10 11:31:13,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-10-10 11:31:13,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 162. [2018-10-10 11:31:13,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-10-10 11:31:13,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 177 transitions. [2018-10-10 11:31:13,213 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 177 transitions. Word has length 28 [2018-10-10 11:31:13,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:13,214 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 177 transitions. [2018-10-10 11:31:13,214 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 11:31:13,214 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 177 transitions. [2018-10-10 11:31:13,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-10 11:31:13,215 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:13,215 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:13,215 INFO L424 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:13,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:13,216 INFO L82 PathProgramCache]: Analyzing trace with hash 224079114, now seen corresponding path program 1 times [2018-10-10 11:31:13,216 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:13,216 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:13,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:13,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:13,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:13,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:13,584 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,586 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,586 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 11:31:13,598 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:13,600 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:13,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-10 11:31:13,601 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,609 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,610 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:16 [2018-10-10 11:31:13,713 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:13,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2018-10-10 11:31:13,714 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:13,725 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:13,725 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:22, output treesize:20 [2018-10-10 11:31:13,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:13,768 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:13,771 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:13,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:13,772 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:13,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:13,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:13,773 INFO L87 Difference]: Start difference. First operand 162 states and 177 transitions. Second operand 7 states. [2018-10-10 11:31:15,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:15,496 INFO L93 Difference]: Finished difference Result 217 states and 229 transitions. [2018-10-10 11:31:15,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:31:15,497 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2018-10-10 11:31:15,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:15,498 INFO L225 Difference]: With dead ends: 217 [2018-10-10 11:31:15,498 INFO L226 Difference]: Without dead ends: 217 [2018-10-10 11:31:15,498 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-10-10 11:31:15,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-10-10 11:31:15,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 161. [2018-10-10 11:31:15,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-10 11:31:15,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 175 transitions. [2018-10-10 11:31:15,504 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 175 transitions. Word has length 35 [2018-10-10 11:31:15,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:15,504 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 175 transitions. [2018-10-10 11:31:15,505 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:15,505 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 175 transitions. [2018-10-10 11:31:15,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-10 11:31:15,505 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:15,506 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:15,506 INFO L424 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:15,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:15,506 INFO L82 PathProgramCache]: Analyzing trace with hash -1643204860, now seen corresponding path program 1 times [2018-10-10 11:31:15,507 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:15,507 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:15,532 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:15,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:15,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:15,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:15,736 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:15,739 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:15,739 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-10 11:31:15,739 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-10 11:31:15,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-10 11:31:15,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:31:15,740 INFO L87 Difference]: Start difference. First operand 161 states and 175 transitions. Second operand 3 states. [2018-10-10 11:31:15,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:15,774 INFO L93 Difference]: Finished difference Result 206 states and 219 transitions. [2018-10-10 11:31:15,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-10 11:31:15,777 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2018-10-10 11:31:15,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:15,778 INFO L225 Difference]: With dead ends: 206 [2018-10-10 11:31:15,778 INFO L226 Difference]: Without dead ends: 206 [2018-10-10 11:31:15,779 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-10 11:31:15,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-10-10 11:31:15,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 152. [2018-10-10 11:31:15,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-10-10 11:31:15,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 160 transitions. [2018-10-10 11:31:15,782 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 160 transitions. Word has length 36 [2018-10-10 11:31:15,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:15,782 INFO L481 AbstractCegarLoop]: Abstraction has 152 states and 160 transitions. [2018-10-10 11:31:15,782 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-10 11:31:15,783 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 160 transitions. [2018-10-10 11:31:15,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-10 11:31:15,783 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:15,783 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:15,784 INFO L424 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:15,784 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:15,784 INFO L82 PathProgramCache]: Analyzing trace with hash -1643481914, now seen corresponding path program 1 times [2018-10-10 11:31:15,784 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:15,785 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:15,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:16,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:16,137 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:16,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:16,173 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:16,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:16,206 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:16,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:16,215 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:31:16,238 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:16,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:31:16,242 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:16,264 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:16,266 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:16,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-10 11:31:16,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:16,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:16,282 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-10-10 11:31:16,313 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:16,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:31:16,326 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:16,347 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:31:16,348 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:31:16,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:16,418 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:16,420 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:16,421 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:16,421 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:16,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:16,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:16,421 INFO L87 Difference]: Start difference. First operand 152 states and 160 transitions. Second operand 7 states. [2018-10-10 11:31:17,112 WARN L178 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2018-10-10 11:31:18,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:18,231 INFO L93 Difference]: Finished difference Result 174 states and 182 transitions. [2018-10-10 11:31:18,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 11:31:18,231 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-10-10 11:31:18,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:18,232 INFO L225 Difference]: With dead ends: 174 [2018-10-10 11:31:18,232 INFO L226 Difference]: Without dead ends: 174 [2018-10-10 11:31:18,232 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2018-10-10 11:31:18,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-10-10 11:31:18,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 150. [2018-10-10 11:31:18,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-10-10 11:31:18,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-10-10 11:31:18,237 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 36 [2018-10-10 11:31:18,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:18,237 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-10-10 11:31:18,237 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:18,237 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-10-10 11:31:18,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-10 11:31:18,238 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:18,238 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:18,238 INFO L424 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:18,238 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:18,239 INFO L82 PathProgramCache]: Analyzing trace with hash 1657620463, now seen corresponding path program 1 times [2018-10-10 11:31:18,239 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:18,239 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:18,262 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:18,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:18,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:18,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:18,739 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:18,751 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,768 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,768 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-10 11:31:18,794 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 11:31:18,797 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,825 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,827 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-10 11:31:18,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,842 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:18,842 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-10-10 11:31:18,873 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:18,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-10 11:31:18,885 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:18,906 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:31:18,907 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-10 11:31:19,489 WARN L178 SmtUtils]: Spent 418.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2018-10-10 11:31:19,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:19,556 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:19,560 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:19,560 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 11:31:19,561 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 11:31:19,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 11:31:19,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-10 11:31:19,561 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 8 states. [2018-10-10 11:31:20,415 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2018-10-10 11:31:20,607 WARN L178 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2018-10-10 11:31:21,753 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 43 [2018-10-10 11:31:21,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:21,939 INFO L93 Difference]: Finished difference Result 171 states and 179 transitions. [2018-10-10 11:31:21,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 11:31:21,939 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 39 [2018-10-10 11:31:21,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:21,940 INFO L225 Difference]: With dead ends: 171 [2018-10-10 11:31:21,940 INFO L226 Difference]: Without dead ends: 171 [2018-10-10 11:31:21,941 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=62, Invalid=120, Unknown=0, NotChecked=0, Total=182 [2018-10-10 11:31:21,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-10-10 11:31:21,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 146. [2018-10-10 11:31:21,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-10-10 11:31:21,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-10-10 11:31:21,944 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 39 [2018-10-10 11:31:21,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:21,945 INFO L481 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-10-10 11:31:21,945 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 11:31:21,945 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-10-10 11:31:21,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-10 11:31:21,945 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:21,946 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:21,946 INFO L424 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:21,947 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:21,947 INFO L82 PathProgramCache]: Analyzing trace with hash -1362600208, now seen corresponding path program 1 times [2018-10-10 11:31:21,947 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:21,947 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:21,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:22,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:22,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:22,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:22,368 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:22,370 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:22,370 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:22,370 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:22,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:22,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:22,371 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 7 states. [2018-10-10 11:31:23,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:23,544 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-10-10 11:31:23,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 11:31:23,545 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 42 [2018-10-10 11:31:23,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:23,546 INFO L225 Difference]: With dead ends: 147 [2018-10-10 11:31:23,546 INFO L226 Difference]: Without dead ends: 147 [2018-10-10 11:31:23,546 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-10-10 11:31:23,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-10-10 11:31:23,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-10-10 11:31:23,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-10-10 11:31:23,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-10-10 11:31:23,549 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 42 [2018-10-10 11:31:23,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:23,549 INFO L481 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-10-10 11:31:23,550 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:23,550 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-10-10 11:31:23,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-10-10 11:31:23,550 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:23,550 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:23,551 INFO L424 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:23,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:23,551 INFO L82 PathProgramCache]: Analyzing trace with hash 506230610, now seen corresponding path program 1 times [2018-10-10 11:31:23,552 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:23,552 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:23,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:23,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:23,885 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:23,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:23,964 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-10 11:31:23,967 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 11:31:23,967 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 11:31:23,967 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 11:31:23,968 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 11:31:23,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 11:31:23,968 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 7 states. [2018-10-10 11:31:25,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 11:31:25,422 INFO L93 Difference]: Finished difference Result 214 states and 227 transitions. [2018-10-10 11:31:25,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-10 11:31:25,423 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 44 [2018-10-10 11:31:25,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 11:31:25,425 INFO L225 Difference]: With dead ends: 214 [2018-10-10 11:31:25,425 INFO L226 Difference]: Without dead ends: 214 [2018-10-10 11:31:25,425 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=134, Unknown=0, NotChecked=0, Total=210 [2018-10-10 11:31:25,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-10-10 11:31:25,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 143. [2018-10-10 11:31:25,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-10-10 11:31:25,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-10-10 11:31:25,429 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 44 [2018-10-10 11:31:25,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 11:31:25,430 INFO L481 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-10-10 11:31:25,430 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 11:31:25,430 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-10-10 11:31:25,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-10 11:31:25,430 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 11:31:25,431 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 11:31:25,431 INFO L424 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr75ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr78ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr73ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr74ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr72ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr79ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr68ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr67ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr76ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr66ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr65ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr77ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr69ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr71ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr70ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr80ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 11:31:25,431 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 11:31:25,432 INFO L82 PathProgramCache]: Analyzing trace with hash -553249061, now seen corresponding path program 1 times [2018-10-10 11:31:25,432 INFO L227 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-10 11:31:25,432 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-10 11:31:25,461 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 11:31:25,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 11:31:26,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 11:31:26,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 11:31:26,051 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,063 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-10 11:31:26,094 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,095 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 11:31:26,095 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,109 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:19 [2018-10-10 11:31:26,183 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,205 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,220 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:26,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 42 [2018-10-10 11:31:26,222 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,350 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,350 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:36, output treesize:39 [2018-10-10 11:31:26,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-10 11:31:26,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-10 11:31:26,502 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,505 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,537 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,537 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:51, output treesize:47 [2018-10-10 11:31:26,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-10 11:31:26,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 11:31:26,684 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,696 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,734 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,735 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:55, output treesize:44 [2018-10-10 11:31:26,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 51 [2018-10-10 11:31:26,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-10 11:31:26,815 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,830 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,867 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,867 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:53 [2018-10-10 11:31:26,935 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:31:26,935 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:26,936 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 11:31:26,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 81 [2018-10-10 11:31:26,938 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:26,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:26,978 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:56, output treesize:68 [2018-10-10 11:31:27,353 WARN L178 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-10-10 11:31:27,807 WARN L178 SmtUtils]: Spent 256.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-10-10 11:31:27,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-10-10 11:31:27,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-10 11:31:27,837 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:27,863 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:27,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:27,920 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:87, output treesize:83 [2018-10-10 11:31:28,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 57 [2018-10-10 11:31:28,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-10-10 11:31:28,071 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:28,117 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 11:31:28,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-10-10 11:31:28,232 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:92, output treesize:152 [2018-10-10 11:31:28,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 33 [2018-10-10 11:31:28,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 20 [2018-10-10 11:31:28,383 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:28,449 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 11:31:28,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-10-10 11:31:28,494 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:74, output treesize:51 [2018-10-10 11:31:28,587 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 11:31:28,587 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-10 11:31:40,093 WARN L178 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 24 [2018-10-10 11:31:47,737 WARN L832 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_read~$Pointer$_#ptr.offset| (_ BitVec 32)) (|ULTIMATE.start_read~$Pointer$_#ptr.base| (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_subst_1 (_ BitVec 32)) (|ULTIMATE.start_write~$Pointer$_#ptr.offset| (_ BitVec 32)) (v_subst_2 (_ BitVec 32)) (|ULTIMATE.start_write~$Pointer$_#value.base| (_ BitVec 32)) (|v_ULTIMATE.start_append_#t~malloc2.base_5| (_ BitVec 32))) (or (= (bvadd (select (store |c_#valid| |v_ULTIMATE.start_append_#t~malloc2.base_5| (_ bv1 1)) (select (select (let ((.cse0 (store |c_ULTIMATE.start_write~$Pointer$_old_#memory_$Pointer$.base| |c_ULTIMATE.start_write~$Pointer$_#ptr.base| (store (select |c_ULTIMATE.start_write~$Pointer$_old_#memory_$Pointer$.base| |c_ULTIMATE.start_write~$Pointer$_#ptr.base|) |ULTIMATE.start_write~$Pointer$_#ptr.offset| |ULTIMATE.start_write~$Pointer$_#value.base|)))) (store .cse0 |v_ULTIMATE.start_append_#t~malloc2.base_5| (store (store (select .cse0 |v_ULTIMATE.start_append_#t~malloc2.base_5|) v_subst_3 (select (select .cse0 |ULTIMATE.start_read~$Pointer$_#ptr.base|) |ULTIMATE.start_read~$Pointer$_#ptr.offset|)) v_subst_1 v_subst_2))) c_ULTIMATE.start_main_~list~0.base) (bvadd c_ULTIMATE.start_main_~list~0.offset (_ bv4 32)))) (_ bv1 1)) (_ bv0 1)) (not (= (_ bv0 1) (select |c_#valid| |v_ULTIMATE.start_append_#t~malloc2.base_5|))))) is different from false [2018-10-10 11:31:49,758 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_subst_5 (_ BitVec 32)) (|ULTIMATE.start_read~$Pointer$_#ptr.offset| (_ BitVec 32)) (|ULTIMATE.start_read~$Pointer$_#ptr.base| (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_subst_4 (_ BitVec 32)) (v_subst_1 (_ BitVec 32)) (|ULTIMATE.start_write~$Pointer$_#ptr.offset| (_ BitVec 32)) (v_subst_2 (_ BitVec 32)) (|ULTIMATE.start_write~$Pointer$_#value.base| (_ BitVec 32)) (|v_ULTIMATE.start_append_#t~malloc2.base_5| (_ BitVec 32))) (or (= (_ bv1 1) (select (store |c_#valid| |v_ULTIMATE.start_append_#t~malloc2.base_5| (_ bv1 1)) (select (select (let ((.cse0 (let ((.cse1 (store |c_ULTIMATE.start_write~$Pointer$_old_#memory_$Pointer$.base| |c_ULTIMATE.start_write~$Pointer$_#ptr.base| (store (select |c_ULTIMATE.start_write~$Pointer$_old_#memory_$Pointer$.base| |c_ULTIMATE.start_write~$Pointer$_#ptr.base|) |ULTIMATE.start_write~$Pointer$_#ptr.offset| |ULTIMATE.start_write~$Pointer$_#value.base|)))) (store .cse1 c_ULTIMATE.start_append_~node~0.base (store (select .cse1 c_ULTIMATE.start_append_~node~0.base) v_subst_4 v_subst_5))))) (store .cse0 |v_ULTIMATE.start_append_#t~malloc2.base_5| (store (store (select .cse0 |v_ULTIMATE.start_append_#t~malloc2.base_5|) v_subst_3 (select (select .cse0 |ULTIMATE.start_read~$Pointer$_#ptr.base|) |ULTIMATE.start_read~$Pointer$_#ptr.offset|)) v_subst_1 v_subst_2))) c_ULTIMATE.start_main_~list~0.base) (bvadd c_ULTIMATE.start_main_~list~0.offset (_ bv4 32))))) (not (= (_ bv0 1) (select |c_#valid| |v_ULTIMATE.start_append_#t~malloc2.base_5|))))) is different from false [2018-10-10 11:31:49,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 72 [2018-10-10 11:31:50,214 WARN L178 SmtUtils]: Spent 385.00 ms on a formula simplification that was a NOOP. DAG size: 78 [2018-10-10 11:31:50,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-10 11:31:50,223 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:51,145 INFO L303 Elim1Store]: Index analysis took 350 ms [2018-10-10 11:31:51,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 9 case distinctions, treesize of input 159 treesize of output 162 [2018-10-10 11:31:57,485 WARN L178 SmtUtils]: Spent 6.06 s on a formula simplification. DAG size of input: 395 DAG size of output: 322 [2018-10-10 11:31:57,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 89 treesize of output 95 [2018-10-10 11:31:58,218 WARN L178 SmtUtils]: Spent 666.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 88 [2018-10-10 11:31:58,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 85 [2018-10-10 11:31:58,234 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:58,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 107 treesize of output 110 [2018-10-10 11:31:58,329 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:58,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 90 [2018-10-10 11:31:58,349 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-10 11:31:59,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 88 treesize of output 97 [2018-10-10 11:31:59,014 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-10-10 11:31:59,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 83 treesize of output 107 [2018-10-10 11:31:59,171 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-10 11:31:59,797 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 5 xjuncts. [2018-10-10 11:31:59,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 101 treesize of output 107 [2018-10-10 11:32:00,580 WARN L178 SmtUtils]: Spent 710.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 92 [2018-10-10 11:32:00,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 107 [2018-10-10 11:32:00,603 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-10 11:32:00,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 121 treesize of output 124 [2018-10-10 11:32:00,677 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:00,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 99 [2018-10-10 11:32:00,703 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-10-10 11:32:01,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 95 treesize of output 119 [2018-10-10 11:32:01,468 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-10 11:32:01,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 109 [2018-10-10 11:32:01,565 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:02,145 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-10-10 11:32:02,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 53 [2018-10-10 11:32:02,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-10 11:32:02,370 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:02,552 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 11:32:08,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 5 case distinctions, treesize of input 90 treesize of output 109 [2018-10-10 11:32:11,565 WARN L178 SmtUtils]: Spent 3.40 s on a formula simplification. DAG size of input: 230 DAG size of output: 204 [2018-10-10 11:32:11,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 107 treesize of output 120 [2018-10-10 11:32:11,691 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 4 xjuncts. [2018-10-10 11:32:11,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 90 treesize of output 105 [2018-10-10 11:32:11,764 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:11,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 90 [2018-10-10 11:32:11,789 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-10-10 11:32:15,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 92 treesize of output 116 [2018-10-10 11:32:15,751 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 8 xjuncts. [2018-10-10 11:32:15,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 8 case distinctions, treesize of input 85 treesize of output 124 [2018-10-10 11:32:15,956 INFO L267 ElimStorePlain]: Start of recursive call 24: 8 dim-0 vars, End of recursive call: 8 dim-0 vars, and 32 xjuncts. [2018-10-10 11:32:19,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 83 treesize of output 102 [2018-10-10 11:32:19,929 INFO L267 ElimStorePlain]: Start of recursive call 25: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-10-10 11:32:19,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 88 treesize of output 100 [2018-10-10 11:32:19,983 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:22,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 89 treesize of output 98 [2018-10-10 11:32:22,784 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:22,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 86 treesize of output 97 [2018-10-10 11:32:22,854 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 3 xjuncts. [2018-10-10 11:32:24,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 80 treesize of output 85 [2018-10-10 11:32:24,822 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:24,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 81 treesize of output 88 [2018-10-10 11:32:24,884 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:26,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 8 case distinctions, treesize of input 84 treesize of output 119 [2018-10-10 11:32:26,363 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 16 xjuncts. [2018-10-10 11:32:26,619 INFO L303 Elim1Store]: Index analysis took 255 ms [2018-10-10 11:32:26,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 7 case distinctions, treesize of input 85 treesize of output 107 [2018-10-10 11:32:26,721 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 8 xjuncts. [2018-10-10 11:32:28,827 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, 7 dim-1 vars, End of recursive call: 1 dim-0 vars, and 11 xjuncts. [2018-10-10 11:32:28,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 55 [2018-10-10 11:32:28,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 54 [2018-10-10 11:32:28,911 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:29,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 50 treesize of output 71 [2018-10-10 11:32:29,201 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 8 xjuncts. [2018-10-10 11:32:29,526 INFO L267 ElimStorePlain]: Start of recursive call 33: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-10 11:32:36,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 56 [2018-10-10 11:32:36,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 51 treesize of output 72 [2018-10-10 11:32:36,449 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 8 xjuncts. [2018-10-10 11:32:36,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 49 treesize of output 55 [2018-10-10 11:32:36,801 INFO L267 ElimStorePlain]: Start of recursive call 38: End of recursive call: and 2 xjuncts. [2018-10-10 11:32:37,091 INFO L267 ElimStorePlain]: Start of recursive call 36: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-10 11:32:37,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 9 case distinctions, treesize of input 89 treesize of output 133 [2018-10-10 11:33:29,692 WARN L178 SmtUtils]: Spent 52.25 s on a formula simplification. DAG size of input: 1060 DAG size of output: 847 [2018-10-10 11:33:29,753 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:33:29,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 100 treesize of output 112 [2018-10-10 11:33:29,831 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:33:30,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 99 treesize of output 111 [2018-10-10 11:33:30,155 INFO L267 ElimStorePlain]: Start of recursive call 41: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-10 11:33:30,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 89 [2018-10-10 11:33:30,232 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 2 xjuncts. [2018-10-10 11:33:30,260 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:33:30,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 86 [2018-10-10 11:33:30,261 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 1 xjuncts. [2018-10-10 11:34:55,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 94 treesize of output 103 [2018-10-10 11:34:55,972 INFO L267 ElimStorePlain]: Start of recursive call 44: End of recursive call: and 3 xjuncts. [2018-10-10 11:34:56,099 INFO L303 Elim1Store]: Index analysis took 126 ms [2018-10-10 11:34:56,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 95 treesize of output 121 [2018-10-10 11:34:56,189 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 8 xjuncts. [2018-10-10 11:34:56,342 INFO L303 Elim1Store]: Index analysis took 152 ms [2018-10-10 11:34:56,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 102 treesize of output 111 [2018-10-10 11:34:56,403 INFO L267 ElimStorePlain]: Start of recursive call 46: End of recursive call: and 3 xjuncts. [2018-10-10 11:34:56,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 103 treesize of output 129 [2018-10-10 11:34:56,590 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 8 xjuncts. [2018-10-10 11:36:23,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 93 treesize of output 100 [2018-10-10 11:36:23,846 INFO L267 ElimStorePlain]: Start of recursive call 48: End of recursive call: and 3 xjuncts. [2018-10-10 11:36:24,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 8 case distinctions, treesize of input 80 treesize of output 113 [2018-10-10 11:36:24,070 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 16 xjuncts. [2018-10-10 11:36:24,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 8 case distinctions, treesize of input 89 treesize of output 122 [2018-10-10 11:36:24,286 INFO L267 ElimStorePlain]: Start of recursive call 50: End of recursive call: and 16 xjuncts. [2018-10-10 11:36:24,403 INFO L303 Elim1Store]: Index analysis took 115 ms [2018-10-10 11:36:24,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 80 treesize of output 104 [2018-10-10 11:36:24,484 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 8 xjuncts. [2018-10-10 11:36:24,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 91 treesize of output 98 [2018-10-10 11:36:24,580 INFO L267 ElimStorePlain]: Start of recursive call 52: End of recursive call: and 3 xjuncts. [2018-10-10 11:36:24,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 84 treesize of output 110 [2018-10-10 11:36:24,751 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 8 xjuncts. [2018-10-10 11:36:24,877 INFO L303 Elim1Store]: Index analysis took 125 ms [2018-10-10 11:36:24,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 85 treesize of output 108 [2018-10-10 11:36:24,946 INFO L267 ElimStorePlain]: Start of recursive call 54: End of recursive call: and 4 xjuncts. [2018-10-10 11:36:25,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 92 treesize of output 86 [2018-10-10 11:36:25,045 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 1 xjuncts. [2018-10-10 11:36:25,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 87 treesize of output 111 [2018-10-10 11:36:25,212 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 8 xjuncts. [2018-10-10 11:36:25,322 INFO L303 Elim1Store]: Index analysis took 109 ms [2018-10-10 11:36:25,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 81 treesize of output 104 [2018-10-10 11:36:25,405 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 4 xjuncts. [2018-10-10 11:38:01,703 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:38:01,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 95 treesize of output 101 [2018-10-10 11:38:01,770 INFO L267 ElimStorePlain]: Start of recursive call 58: End of recursive call: and 2 xjuncts. [2018-10-10 11:38:01,843 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:38:01,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 104 treesize of output 120 [2018-10-10 11:38:01,951 INFO L267 ElimStorePlain]: Start of recursive call 59: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 11:38:01,990 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:38:01,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 80 [2018-10-10 11:38:01,991 INFO L267 ElimStorePlain]: Start of recursive call 60: End of recursive call: and 1 xjuncts. [2018-10-10 11:38:02,076 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 11:38:02,104 INFO L303 Elim1Store]: Index analysis took 112 ms [2018-10-10 11:38:02,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 103 treesize of output 139 [2018-10-10 11:38:02,361 INFO L267 ElimStorePlain]: Start of recursive call 61: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-10 11:39:37,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 86 treesize of output 102 [2018-10-10 11:39:37,573 INFO L267 ElimStorePlain]: Start of recursive call 62: End of recursive call: and 8 xjuncts. [2018-10-10 11:39:37,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 74 treesize of output 83 [2018-10-10 11:39:37,642 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 2 xjuncts. [2018-10-10 11:39:37,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 78 treesize of output 89 [2018-10-10 11:39:37,708 INFO L267 ElimStorePlain]: Start of recursive call 64: End of recursive call: and 2 xjuncts. [2018-10-10 11:39:37,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 90 treesize of output 80 [2018-10-10 11:39:37,770 INFO L267 ElimStorePlain]: Start of recursive call 65: End of recursive call: and 1 xjuncts. [2018-10-10 11:39:37,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 77 treesize of output 88 [2018-10-10 11:39:37,857 INFO L267 ElimStorePlain]: Start of recursive call 66: End of recursive call: and 4 xjuncts. [2018-10-10 11:39:37,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 83 treesize of output 92 [2018-10-10 11:39:37,958 INFO L267 ElimStorePlain]: Start of recursive call 67: End of recursive call: and 2 xjuncts. [2018-10-10 11:39:38,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 93 treesize of output 98 [2018-10-10 11:39:38,061 INFO L267 ElimStorePlain]: Start of recursive call 68: End of recursive call: and 3 xjuncts. [2018-10-10 11:39:38,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 77 treesize of output 95 [2018-10-10 11:39:38,172 INFO L267 ElimStorePlain]: Start of recursive call 69: End of recursive call: and 8 xjuncts. [2018-10-10 11:39:38,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 81 treesize of output 90 [2018-10-10 11:39:38,246 INFO L267 ElimStorePlain]: Start of recursive call 70: End of recursive call: and 4 xjuncts. [2018-10-10 11:39:38,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 105 [2018-10-10 11:39:38,348 INFO L267 ElimStorePlain]: Start of recursive call 71: End of recursive call: and 3 xjuncts.