java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --traceabstraction.dump.automata.to.the.following.directory dump --rcfgbuilder.size.of.a.code.block SingleStatement --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/forester-heap/sll-buckets_true-unreach-call_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c5b1954-m [2018-10-10 14:55:12,001 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-10 14:55:12,003 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-10 14:55:12,015 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-10 14:55:12,015 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-10 14:55:12,016 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-10 14:55:12,018 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-10 14:55:12,019 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-10 14:55:12,021 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-10 14:55:12,022 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-10 14:55:12,023 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-10 14:55:12,023 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-10 14:55:12,024 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-10 14:55:12,025 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-10 14:55:12,026 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-10 14:55:12,027 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-10 14:55:12,028 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-10 14:55:12,030 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-10 14:55:12,032 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-10 14:55:12,034 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-10 14:55:12,035 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-10 14:55:12,036 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-10 14:55:12,039 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-10 14:55:12,039 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-10 14:55:12,039 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-10 14:55:12,040 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-10 14:55:12,041 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-10 14:55:12,042 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-10 14:55:12,043 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-10 14:55:12,044 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-10 14:55:12,044 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-10 14:55:12,045 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-10 14:55:12,045 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-10 14:55:12,046 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-10 14:55:12,047 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-10 14:55:12,047 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-10 14:55:12,048 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-10-10 14:55:12,063 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-10 14:55:12,064 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-10 14:55:12,065 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-10 14:55:12,065 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-10 14:55:12,065 INFO L133 SettingsManager]: * Use SBE=true [2018-10-10 14:55:12,066 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-10 14:55:12,066 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-10 14:55:12,066 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-10 14:55:12,066 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-10 14:55:12,066 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-10 14:55:12,067 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-10 14:55:12,067 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-10 14:55:12,067 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-10 14:55:12,067 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-10 14:55:12,067 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-10 14:55:12,068 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-10 14:55:12,068 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-10 14:55:12,068 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-10 14:55:12,068 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-10 14:55:12,068 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-10 14:55:12,069 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 14:55:12,069 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-10 14:55:12,069 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-10 14:55:12,069 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-10-10 14:55:12,069 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-10 14:55:12,070 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Dump automata to the following directory -> dump Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> SingleStatement Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-10-10 14:55:12,114 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-10 14:55:12,128 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-10 14:55:12,133 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-10 14:55:12,135 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-10 14:55:12,135 INFO L276 PluginConnector]: CDTParser initialized [2018-10-10 14:55:12,136 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/forester-heap/sll-buckets_true-unreach-call_true-valid-memsafety.i [2018-10-10 14:55:12,452 INFO L217 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f256c492c/a1396ffefc4b48bc9be4f28f3880d1f1/FLAG2b7ead85f [2018-10-10 14:55:12,761 INFO L289 CDTParser]: Found 1 translation units. [2018-10-10 14:55:12,761 INFO L157 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/forester-heap/sll-buckets_true-unreach-call_true-valid-memsafety.i [2018-10-10 14:55:12,776 INFO L337 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f256c492c/a1396ffefc4b48bc9be4f28f3880d1f1/FLAG2b7ead85f [2018-10-10 14:55:12,790 INFO L345 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f256c492c/a1396ffefc4b48bc9be4f28f3880d1f1 [2018-10-10 14:55:12,799 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-10 14:55:12,800 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-10-10 14:55:12,802 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-10 14:55:12,802 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-10 14:55:12,806 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-10 14:55:12,807 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 02:55:12" (1/1) ... [2018-10-10 14:55:12,810 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12925d49 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:12, skipping insertion in model container [2018-10-10 14:55:12,810 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 02:55:12" (1/1) ... [2018-10-10 14:55:12,820 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-10 14:55:12,887 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-10 14:55:13,237 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 14:55:13,259 INFO L189 MainTranslator]: Completed pre-run [2018-10-10 14:55:13,337 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 14:55:13,408 INFO L193 MainTranslator]: Completed translation [2018-10-10 14:55:13,408 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13 WrapperNode [2018-10-10 14:55:13,409 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-10 14:55:13,410 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-10 14:55:13,410 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-10 14:55:13,410 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-10 14:55:13,423 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,454 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,518 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-10 14:55:13,519 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-10 14:55:13,519 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-10 14:55:13,519 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-10 14:55:13,620 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,620 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,637 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,637 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,655 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,670 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,677 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... [2018-10-10 14:55:13,683 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-10 14:55:13,689 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-10 14:55:13,689 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-10 14:55:13,689 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-10 14:55:13,691 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 14:55:13,757 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-10 14:55:13,758 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-10 14:55:15,852 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-10 14:55:15,853 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 02:55:15 BoogieIcfgContainer [2018-10-10 14:55:15,853 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-10 14:55:15,854 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-10 14:55:15,854 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-10 14:55:15,858 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-10 14:55:15,858 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.10 02:55:12" (1/3) ... [2018-10-10 14:55:15,859 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@32e5facd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 02:55:15, skipping insertion in model container [2018-10-10 14:55:15,859 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:55:13" (2/3) ... [2018-10-10 14:55:15,860 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@32e5facd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 02:55:15, skipping insertion in model container [2018-10-10 14:55:15,860 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 02:55:15" (3/3) ... [2018-10-10 14:55:15,862 INFO L112 eAbstractionObserver]: Analyzing ICFG sll-buckets_true-unreach-call_true-valid-memsafety.i [2018-10-10 14:55:15,871 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-10 14:55:15,880 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 65 error locations. [2018-10-10 14:55:15,897 INFO L257 AbstractCegarLoop]: Starting to check reachability of 65 error locations. [2018-10-10 14:55:15,926 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-10 14:55:15,927 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-10 14:55:15,927 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-10 14:55:15,927 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-10 14:55:15,927 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-10 14:55:15,928 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-10 14:55:15,928 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-10 14:55:15,928 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-10 14:55:15,928 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-10 14:55:15,973 INFO L276 IsEmpty]: Start isEmpty. Operand 523 states. [2018-10-10 14:55:15,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-10 14:55:15,981 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:15,982 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:15,988 INFO L424 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:15,995 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:15,995 INFO L82 PathProgramCache]: Analyzing trace with hash -218556917, now seen corresponding path program 1 times [2018-10-10 14:55:15,997 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:15,998 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:16,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:16,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:16,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:16,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:16,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:16,485 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:16,486 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:16,491 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:16,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:16,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:16,512 INFO L87 Difference]: Start difference. First operand 523 states. Second operand 6 states. [2018-10-10 14:55:17,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:17,824 INFO L93 Difference]: Finished difference Result 642 states and 650 transitions. [2018-10-10 14:55:17,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:55:17,828 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-10-10 14:55:17,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:17,846 INFO L225 Difference]: With dead ends: 642 [2018-10-10 14:55:17,846 INFO L226 Difference]: Without dead ends: 621 [2018-10-10 14:55:17,848 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:55:17,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2018-10-10 14:55:17,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 510. [2018-10-10 14:55:17,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 510 states. [2018-10-10 14:55:17,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 510 states to 510 states and 517 transitions. [2018-10-10 14:55:17,925 INFO L78 Accepts]: Start accepts. Automaton has 510 states and 517 transitions. Word has length 25 [2018-10-10 14:55:17,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:17,925 INFO L481 AbstractCegarLoop]: Abstraction has 510 states and 517 transitions. [2018-10-10 14:55:17,925 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:17,925 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 517 transitions. [2018-10-10 14:55:17,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-10 14:55:17,926 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:17,926 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:17,929 INFO L424 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:17,929 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:17,929 INFO L82 PathProgramCache]: Analyzing trace with hash 1814670223, now seen corresponding path program 1 times [2018-10-10 14:55:17,929 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:17,930 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:17,931 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:17,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:17,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:17,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:18,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:18,130 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:18,130 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:55:18,132 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:55:18,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:55:18,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:18,133 INFO L87 Difference]: Start difference. First operand 510 states and 517 transitions. Second operand 8 states. [2018-10-10 14:55:19,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:19,301 INFO L93 Difference]: Finished difference Result 635 states and 644 transitions. [2018-10-10 14:55:19,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 14:55:19,309 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-10-10 14:55:19,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:19,315 INFO L225 Difference]: With dead ends: 635 [2018-10-10 14:55:19,315 INFO L226 Difference]: Without dead ends: 635 [2018-10-10 14:55:19,317 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:19,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 635 states. [2018-10-10 14:55:19,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 635 to 509. [2018-10-10 14:55:19,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 509 states. [2018-10-10 14:55:19,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 509 states to 509 states and 516 transitions. [2018-10-10 14:55:19,351 INFO L78 Accepts]: Start accepts. Automaton has 509 states and 516 transitions. Word has length 26 [2018-10-10 14:55:19,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:19,353 INFO L481 AbstractCegarLoop]: Abstraction has 509 states and 516 transitions. [2018-10-10 14:55:19,354 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:55:19,354 INFO L276 IsEmpty]: Start isEmpty. Operand 509 states and 516 transitions. [2018-10-10 14:55:19,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-10 14:55:19,355 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:19,356 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:19,357 INFO L424 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:19,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:19,358 INFO L82 PathProgramCache]: Analyzing trace with hash 1113026705, now seen corresponding path program 1 times [2018-10-10 14:55:19,358 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:19,358 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:19,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:19,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:19,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:19,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:19,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:19,490 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:19,490 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:19,491 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:19,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:19,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:19,492 INFO L87 Difference]: Start difference. First operand 509 states and 516 transitions. Second operand 6 states. [2018-10-10 14:55:20,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:20,207 INFO L93 Difference]: Finished difference Result 699 states and 708 transitions. [2018-10-10 14:55:20,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:55:20,207 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-10-10 14:55:20,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:20,212 INFO L225 Difference]: With dead ends: 699 [2018-10-10 14:55:20,212 INFO L226 Difference]: Without dead ends: 699 [2018-10-10 14:55:20,213 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:55:20,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2018-10-10 14:55:20,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 508. [2018-10-10 14:55:20,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 508 states. [2018-10-10 14:55:20,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 508 states and 515 transitions. [2018-10-10 14:55:20,229 INFO L78 Accepts]: Start accepts. Automaton has 508 states and 515 transitions. Word has length 35 [2018-10-10 14:55:20,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:20,229 INFO L481 AbstractCegarLoop]: Abstraction has 508 states and 515 transitions. [2018-10-10 14:55:20,229 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:20,230 INFO L276 IsEmpty]: Start isEmpty. Operand 508 states and 515 transitions. [2018-10-10 14:55:20,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-10 14:55:20,231 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:20,231 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:20,232 INFO L424 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:20,233 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:20,233 INFO L82 PathProgramCache]: Analyzing trace with hash 144089557, now seen corresponding path program 1 times [2018-10-10 14:55:20,233 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:20,233 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:20,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:20,235 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:20,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:20,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:20,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:20,405 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:20,405 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:55:20,405 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:55:20,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:55:20,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:20,406 INFO L87 Difference]: Start difference. First operand 508 states and 515 transitions. Second operand 8 states. [2018-10-10 14:55:21,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:21,332 INFO L93 Difference]: Finished difference Result 633 states and 642 transitions. [2018-10-10 14:55:21,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 14:55:21,335 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 36 [2018-10-10 14:55:21,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:21,339 INFO L225 Difference]: With dead ends: 633 [2018-10-10 14:55:21,339 INFO L226 Difference]: Without dead ends: 633 [2018-10-10 14:55:21,340 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:21,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 633 states. [2018-10-10 14:55:21,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 633 to 507. [2018-10-10 14:55:21,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 507 states. [2018-10-10 14:55:21,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 514 transitions. [2018-10-10 14:55:21,351 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 514 transitions. Word has length 36 [2018-10-10 14:55:21,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:21,351 INFO L481 AbstractCegarLoop]: Abstraction has 507 states and 514 transitions. [2018-10-10 14:55:21,352 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:55:21,352 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 514 transitions. [2018-10-10 14:55:21,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-10-10 14:55:21,353 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:21,353 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:21,355 INFO L424 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:21,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:21,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1808782819, now seen corresponding path program 1 times [2018-10-10 14:55:21,356 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:21,356 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:21,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:21,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:21,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:21,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:21,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:21,595 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:21,595 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:55:21,596 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:55:21,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:55:21,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:21,597 INFO L87 Difference]: Start difference. First operand 507 states and 514 transitions. Second operand 8 states. [2018-10-10 14:55:22,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:22,755 INFO L93 Difference]: Finished difference Result 757 states and 767 transitions. [2018-10-10 14:55:22,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-10 14:55:22,756 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 57 [2018-10-10 14:55:22,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:22,760 INFO L225 Difference]: With dead ends: 757 [2018-10-10 14:55:22,760 INFO L226 Difference]: Without dead ends: 757 [2018-10-10 14:55:22,761 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=83, Invalid=189, Unknown=0, NotChecked=0, Total=272 [2018-10-10 14:55:22,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 757 states. [2018-10-10 14:55:22,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 757 to 506. [2018-10-10 14:55:22,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 506 states. [2018-10-10 14:55:22,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 513 transitions. [2018-10-10 14:55:22,772 INFO L78 Accepts]: Start accepts. Automaton has 506 states and 513 transitions. Word has length 57 [2018-10-10 14:55:22,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:22,773 INFO L481 AbstractCegarLoop]: Abstraction has 506 states and 513 transitions. [2018-10-10 14:55:22,773 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:55:22,773 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 513 transitions. [2018-10-10 14:55:22,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-10-10 14:55:22,774 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:22,775 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:22,776 INFO L424 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:22,777 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:22,777 INFO L82 PathProgramCache]: Analyzing trace with hash -237692447, now seen corresponding path program 1 times [2018-10-10 14:55:22,777 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:22,777 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:22,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:22,779 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:22,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:22,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:23,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:23,163 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:23,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-10-10 14:55:23,163 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-10 14:55:23,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-10 14:55:23,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-10-10 14:55:23,164 INFO L87 Difference]: Start difference. First operand 506 states and 513 transitions. Second operand 12 states. [2018-10-10 14:55:25,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:25,573 INFO L93 Difference]: Finished difference Result 742 states and 752 transitions. [2018-10-10 14:55:25,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-10 14:55:25,574 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 58 [2018-10-10 14:55:25,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:25,577 INFO L225 Difference]: With dead ends: 742 [2018-10-10 14:55:25,578 INFO L226 Difference]: Without dead ends: 742 [2018-10-10 14:55:25,579 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=152, Invalid=448, Unknown=0, NotChecked=0, Total=600 [2018-10-10 14:55:25,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 742 states. [2018-10-10 14:55:25,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 742 to 505. [2018-10-10 14:55:25,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 505 states. [2018-10-10 14:55:25,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 505 states to 505 states and 512 transitions. [2018-10-10 14:55:25,589 INFO L78 Accepts]: Start accepts. Automaton has 505 states and 512 transitions. Word has length 58 [2018-10-10 14:55:25,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:25,589 INFO L481 AbstractCegarLoop]: Abstraction has 505 states and 512 transitions. [2018-10-10 14:55:25,589 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-10 14:55:25,589 INFO L276 IsEmpty]: Start isEmpty. Operand 505 states and 512 transitions. [2018-10-10 14:55:25,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-10 14:55:25,590 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:25,590 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:25,592 INFO L424 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:25,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:25,592 INFO L82 PathProgramCache]: Analyzing trace with hash 1506877542, now seen corresponding path program 1 times [2018-10-10 14:55:25,592 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:25,593 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:25,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:25,594 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:25,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:25,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:25,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:25,926 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:25,926 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:25,927 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:25,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:25,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:25,927 INFO L87 Difference]: Start difference. First operand 505 states and 512 transitions. Second operand 6 states. [2018-10-10 14:55:26,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:26,480 INFO L93 Difference]: Finished difference Result 559 states and 568 transitions. [2018-10-10 14:55:26,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:55:26,480 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-10-10 14:55:26,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:26,484 INFO L225 Difference]: With dead ends: 559 [2018-10-10 14:55:26,484 INFO L226 Difference]: Without dead ends: 559 [2018-10-10 14:55:26,485 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:26,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 559 states. [2018-10-10 14:55:26,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 559 to 504. [2018-10-10 14:55:26,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 504 states. [2018-10-10 14:55:26,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 511 transitions. [2018-10-10 14:55:26,494 INFO L78 Accepts]: Start accepts. Automaton has 504 states and 511 transitions. Word has length 66 [2018-10-10 14:55:26,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:26,494 INFO L481 AbstractCegarLoop]: Abstraction has 504 states and 511 transitions. [2018-10-10 14:55:26,494 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:26,495 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 511 transitions. [2018-10-10 14:55:26,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-10-10 14:55:26,496 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:26,496 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:26,497 INFO L424 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:26,498 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:26,498 INFO L82 PathProgramCache]: Analyzing trace with hash -531436349, now seen corresponding path program 1 times [2018-10-10 14:55:26,498 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:26,498 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:26,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:26,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:26,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:26,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:26,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:26,674 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:26,674 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-10 14:55:26,674 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-10 14:55:26,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-10 14:55:26,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-10-10 14:55:26,675 INFO L87 Difference]: Start difference. First operand 504 states and 511 transitions. Second operand 9 states. [2018-10-10 14:55:27,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:27,590 INFO L93 Difference]: Finished difference Result 503 states and 510 transitions. [2018-10-10 14:55:27,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-10 14:55:27,590 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2018-10-10 14:55:27,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:27,593 INFO L225 Difference]: With dead ends: 503 [2018-10-10 14:55:27,593 INFO L226 Difference]: Without dead ends: 503 [2018-10-10 14:55:27,593 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=89, Invalid=183, Unknown=0, NotChecked=0, Total=272 [2018-10-10 14:55:27,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 503 states. [2018-10-10 14:55:27,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 503 to 503. [2018-10-10 14:55:27,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 503 states. [2018-10-10 14:55:27,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 503 states to 503 states and 510 transitions. [2018-10-10 14:55:27,602 INFO L78 Accepts]: Start accepts. Automaton has 503 states and 510 transitions. Word has length 67 [2018-10-10 14:55:27,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:27,603 INFO L481 AbstractCegarLoop]: Abstraction has 503 states and 510 transitions. [2018-10-10 14:55:27,603 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-10 14:55:27,603 INFO L276 IsEmpty]: Start isEmpty. Operand 503 states and 510 transitions. [2018-10-10 14:55:27,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-10 14:55:27,604 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:27,604 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:27,606 INFO L424 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:27,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:27,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1619311562, now seen corresponding path program 1 times [2018-10-10 14:55:27,606 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:27,606 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:27,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:27,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:27,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:27,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:27,925 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-10 14:55:28,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:28,730 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:28,730 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-10 14:55:28,730 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-10 14:55:28,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-10 14:55:28,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:55:28,732 INFO L87 Difference]: Start difference. First operand 503 states and 510 transitions. Second operand 11 states. [2018-10-10 14:55:29,368 WARN L178 SmtUtils]: Spent 165.00 ms on a formula simplification that was a NOOP. DAG size: 23 [2018-10-10 14:55:30,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:30,807 INFO L93 Difference]: Finished difference Result 613 states and 621 transitions. [2018-10-10 14:55:30,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-10 14:55:30,807 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 79 [2018-10-10 14:55:30,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:30,811 INFO L225 Difference]: With dead ends: 613 [2018-10-10 14:55:30,811 INFO L226 Difference]: Without dead ends: 613 [2018-10-10 14:55:30,812 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=157, Invalid=395, Unknown=0, NotChecked=0, Total=552 [2018-10-10 14:55:30,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 613 states. [2018-10-10 14:55:30,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 613 to 502. [2018-10-10 14:55:30,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 502 states. [2018-10-10 14:55:30,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502 states to 502 states and 509 transitions. [2018-10-10 14:55:30,821 INFO L78 Accepts]: Start accepts. Automaton has 502 states and 509 transitions. Word has length 79 [2018-10-10 14:55:30,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:30,821 INFO L481 AbstractCegarLoop]: Abstraction has 502 states and 509 transitions. [2018-10-10 14:55:30,821 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-10 14:55:30,821 INFO L276 IsEmpty]: Start isEmpty. Operand 502 states and 509 transitions. [2018-10-10 14:55:30,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-10-10 14:55:30,823 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:30,823 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:30,824 INFO L424 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:30,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:30,825 INFO L82 PathProgramCache]: Analyzing trace with hash -1340949010, now seen corresponding path program 1 times [2018-10-10 14:55:30,825 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:30,825 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:30,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:30,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:30,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:30,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:31,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:31,055 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:31,056 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:55:31,056 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:55:31,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:55:31,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:31,057 INFO L87 Difference]: Start difference. First operand 502 states and 509 transitions. Second operand 13 states. [2018-10-10 14:55:32,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:32,845 INFO L93 Difference]: Finished difference Result 627 states and 636 transitions. [2018-10-10 14:55:32,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-10 14:55:32,845 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 80 [2018-10-10 14:55:32,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:32,849 INFO L225 Difference]: With dead ends: 627 [2018-10-10 14:55:32,849 INFO L226 Difference]: Without dead ends: 627 [2018-10-10 14:55:32,850 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=194, Invalid=456, Unknown=0, NotChecked=0, Total=650 [2018-10-10 14:55:32,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 627 states. [2018-10-10 14:55:32,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 627 to 501. [2018-10-10 14:55:32,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 501 states. [2018-10-10 14:55:32,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 501 states to 501 states and 508 transitions. [2018-10-10 14:55:32,858 INFO L78 Accepts]: Start accepts. Automaton has 501 states and 508 transitions. Word has length 80 [2018-10-10 14:55:32,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:32,859 INFO L481 AbstractCegarLoop]: Abstraction has 501 states and 508 transitions. [2018-10-10 14:55:32,859 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:55:32,859 INFO L276 IsEmpty]: Start isEmpty. Operand 501 states and 508 transitions. [2018-10-10 14:55:32,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-10 14:55:32,860 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:32,860 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:32,862 INFO L424 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:32,862 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:32,862 INFO L82 PathProgramCache]: Analyzing trace with hash 1945434704, now seen corresponding path program 1 times [2018-10-10 14:55:32,862 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:32,863 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:32,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:32,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:32,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:32,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:33,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:33,225 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:33,225 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:33,226 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:33,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:33,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:33,226 INFO L87 Difference]: Start difference. First operand 501 states and 508 transitions. Second operand 6 states. [2018-10-10 14:55:33,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:33,703 INFO L93 Difference]: Finished difference Result 648 states and 659 transitions. [2018-10-10 14:55:33,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-10 14:55:33,703 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 89 [2018-10-10 14:55:33,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:33,707 INFO L225 Difference]: With dead ends: 648 [2018-10-10 14:55:33,707 INFO L226 Difference]: Without dead ends: 648 [2018-10-10 14:55:33,708 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:33,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 648 states. [2018-10-10 14:55:33,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 648 to 498. [2018-10-10 14:55:33,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 498 states. [2018-10-10 14:55:33,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 498 states to 498 states and 505 transitions. [2018-10-10 14:55:33,716 INFO L78 Accepts]: Start accepts. Automaton has 498 states and 505 transitions. Word has length 89 [2018-10-10 14:55:33,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:33,716 INFO L481 AbstractCegarLoop]: Abstraction has 498 states and 505 transitions. [2018-10-10 14:55:33,716 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:33,717 INFO L276 IsEmpty]: Start isEmpty. Operand 498 states and 505 transitions. [2018-10-10 14:55:33,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-10-10 14:55:33,717 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:33,718 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:33,719 INFO L424 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:33,719 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:33,719 INFO L82 PathProgramCache]: Analyzing trace with hash 178933812, now seen corresponding path program 1 times [2018-10-10 14:55:33,719 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:33,719 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:33,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:33,720 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:33,721 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:33,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:34,405 WARN L178 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2018-10-10 14:55:34,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:34,530 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:34,530 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:55:34,530 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:55:34,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:55:34,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:34,531 INFO L87 Difference]: Start difference. First operand 498 states and 505 transitions. Second operand 13 states. [2018-10-10 14:55:36,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:36,235 INFO L93 Difference]: Finished difference Result 623 states and 632 transitions. [2018-10-10 14:55:36,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-10 14:55:36,237 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 90 [2018-10-10 14:55:36,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:36,241 INFO L225 Difference]: With dead ends: 623 [2018-10-10 14:55:36,241 INFO L226 Difference]: Without dead ends: 623 [2018-10-10 14:55:36,242 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=172, Invalid=428, Unknown=0, NotChecked=0, Total=600 [2018-10-10 14:55:36,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 623 states. [2018-10-10 14:55:36,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 623 to 497. [2018-10-10 14:55:36,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2018-10-10 14:55:36,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 504 transitions. [2018-10-10 14:55:36,250 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 504 transitions. Word has length 90 [2018-10-10 14:55:36,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:36,250 INFO L481 AbstractCegarLoop]: Abstraction has 497 states and 504 transitions. [2018-10-10 14:55:36,250 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:55:36,250 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 504 transitions. [2018-10-10 14:55:36,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-10-10 14:55:36,251 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:36,251 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:36,252 INFO L424 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:36,252 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:36,252 INFO L82 PathProgramCache]: Analyzing trace with hash -692252708, now seen corresponding path program 1 times [2018-10-10 14:55:36,253 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:36,253 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:36,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:36,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:36,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:36,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:36,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:36,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:36,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:55:36,391 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:55:36,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:55:36,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:36,392 INFO L87 Difference]: Start difference. First operand 497 states and 504 transitions. Second operand 8 states. [2018-10-10 14:55:37,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:37,053 INFO L93 Difference]: Finished difference Result 674 states and 685 transitions. [2018-10-10 14:55:37,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:55:37,054 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2018-10-10 14:55:37,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:37,058 INFO L225 Difference]: With dead ends: 674 [2018-10-10 14:55:37,058 INFO L226 Difference]: Without dead ends: 674 [2018-10-10 14:55:37,058 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2018-10-10 14:55:37,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 674 states. [2018-10-10 14:55:37,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 674 to 496. [2018-10-10 14:55:37,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 496 states. [2018-10-10 14:55:37,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 503 transitions. [2018-10-10 14:55:37,066 INFO L78 Accepts]: Start accepts. Automaton has 496 states and 503 transitions. Word has length 111 [2018-10-10 14:55:37,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:37,067 INFO L481 AbstractCegarLoop]: Abstraction has 496 states and 503 transitions. [2018-10-10 14:55:37,067 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:55:37,067 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 503 transitions. [2018-10-10 14:55:37,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-10-10 14:55:37,068 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:37,068 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:37,069 INFO L424 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:37,069 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:37,069 INFO L82 PathProgramCache]: Analyzing trace with hash 15002688, now seen corresponding path program 1 times [2018-10-10 14:55:37,069 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:37,069 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:37,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:37,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:37,071 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:37,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:37,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:37,544 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:37,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-10-10 14:55:37,545 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-10 14:55:37,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-10 14:55:37,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2018-10-10 14:55:37,545 INFO L87 Difference]: Start difference. First operand 496 states and 503 transitions. Second operand 18 states. [2018-10-10 14:55:40,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:40,135 INFO L93 Difference]: Finished difference Result 621 states and 630 transitions. [2018-10-10 14:55:40,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-10-10 14:55:40,136 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 112 [2018-10-10 14:55:40,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:40,139 INFO L225 Difference]: With dead ends: 621 [2018-10-10 14:55:40,139 INFO L226 Difference]: Without dead ends: 621 [2018-10-10 14:55:40,140 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=305, Invalid=1177, Unknown=0, NotChecked=0, Total=1482 [2018-10-10 14:55:40,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2018-10-10 14:55:40,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 495. [2018-10-10 14:55:40,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 495 states. [2018-10-10 14:55:40,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 495 states to 495 states and 502 transitions. [2018-10-10 14:55:40,148 INFO L78 Accepts]: Start accepts. Automaton has 495 states and 502 transitions. Word has length 112 [2018-10-10 14:55:40,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:40,148 INFO L481 AbstractCegarLoop]: Abstraction has 495 states and 502 transitions. [2018-10-10 14:55:40,148 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-10 14:55:40,149 INFO L276 IsEmpty]: Start isEmpty. Operand 495 states and 502 transitions. [2018-10-10 14:55:40,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-10-10 14:55:40,150 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:40,150 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:40,150 INFO L424 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:40,151 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:40,151 INFO L82 PathProgramCache]: Analyzing trace with hash 2012390085, now seen corresponding path program 1 times [2018-10-10 14:55:40,151 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:40,151 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:40,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:40,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:40,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:40,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:40,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:40,278 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:40,278 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 14:55:40,279 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 14:55:40,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 14:55:40,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-10 14:55:40,279 INFO L87 Difference]: Start difference. First operand 495 states and 502 transitions. Second operand 5 states. [2018-10-10 14:55:40,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:40,764 INFO L93 Difference]: Finished difference Result 630 states and 640 transitions. [2018-10-10 14:55:40,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:55:40,769 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-10-10 14:55:40,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:40,771 INFO L225 Difference]: With dead ends: 630 [2018-10-10 14:55:40,771 INFO L226 Difference]: Without dead ends: 630 [2018-10-10 14:55:40,771 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:40,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 630 states. [2018-10-10 14:55:40,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 630 to 503. [2018-10-10 14:55:40,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 503 states. [2018-10-10 14:55:40,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 503 states to 503 states and 511 transitions. [2018-10-10 14:55:40,781 INFO L78 Accepts]: Start accepts. Automaton has 503 states and 511 transitions. Word has length 120 [2018-10-10 14:55:40,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:40,781 INFO L481 AbstractCegarLoop]: Abstraction has 503 states and 511 transitions. [2018-10-10 14:55:40,781 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 14:55:40,781 INFO L276 IsEmpty]: Start isEmpty. Operand 503 states and 511 transitions. [2018-10-10 14:55:40,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-10-10 14:55:40,783 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:40,783 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:40,783 INFO L424 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:40,783 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:40,784 INFO L82 PathProgramCache]: Analyzing trace with hash -2040416638, now seen corresponding path program 1 times [2018-10-10 14:55:40,784 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:40,784 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:40,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:40,785 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:40,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:40,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:41,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:41,510 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:41,510 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-10-10 14:55:41,510 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-10 14:55:41,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-10 14:55:41,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2018-10-10 14:55:41,511 INFO L87 Difference]: Start difference. First operand 503 states and 511 transitions. Second operand 14 states. [2018-10-10 14:55:42,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:42,897 INFO L93 Difference]: Finished difference Result 539 states and 548 transitions. [2018-10-10 14:55:42,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-10 14:55:42,904 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 121 [2018-10-10 14:55:42,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:42,906 INFO L225 Difference]: With dead ends: 539 [2018-10-10 14:55:42,906 INFO L226 Difference]: Without dead ends: 539 [2018-10-10 14:55:42,907 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 188 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=275, Invalid=847, Unknown=0, NotChecked=0, Total=1122 [2018-10-10 14:55:42,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2018-10-10 14:55:42,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 502. [2018-10-10 14:55:42,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 502 states. [2018-10-10 14:55:42,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502 states to 502 states and 510 transitions. [2018-10-10 14:55:42,915 INFO L78 Accepts]: Start accepts. Automaton has 502 states and 510 transitions. Word has length 121 [2018-10-10 14:55:42,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:42,915 INFO L481 AbstractCegarLoop]: Abstraction has 502 states and 510 transitions. [2018-10-10 14:55:42,915 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-10 14:55:42,916 INFO L276 IsEmpty]: Start isEmpty. Operand 502 states and 510 transitions. [2018-10-10 14:55:42,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-10-10 14:55:42,917 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:42,917 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:42,917 INFO L424 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:42,918 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:42,918 INFO L82 PathProgramCache]: Analyzing trace with hash -1714160247, now seen corresponding path program 1 times [2018-10-10 14:55:42,918 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:42,918 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:42,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:42,919 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:42,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:42,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:43,240 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-10 14:55:43,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:43,590 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:43,590 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-10 14:55:43,590 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-10 14:55:43,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-10 14:55:43,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:55:43,591 INFO L87 Difference]: Start difference. First operand 502 states and 510 transitions. Second operand 11 states. [2018-10-10 14:55:45,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:45,033 INFO L93 Difference]: Finished difference Result 732 states and 743 transitions. [2018-10-10 14:55:45,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-10 14:55:45,033 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 133 [2018-10-10 14:55:45,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:45,037 INFO L225 Difference]: With dead ends: 732 [2018-10-10 14:55:45,037 INFO L226 Difference]: Without dead ends: 732 [2018-10-10 14:55:45,038 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=163, Invalid=487, Unknown=0, NotChecked=0, Total=650 [2018-10-10 14:55:45,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 732 states. [2018-10-10 14:55:45,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 732 to 501. [2018-10-10 14:55:45,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 501 states. [2018-10-10 14:55:45,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 501 states to 501 states and 509 transitions. [2018-10-10 14:55:45,046 INFO L78 Accepts]: Start accepts. Automaton has 501 states and 509 transitions. Word has length 133 [2018-10-10 14:55:45,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:45,046 INFO L481 AbstractCegarLoop]: Abstraction has 501 states and 509 transitions. [2018-10-10 14:55:45,046 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-10 14:55:45,046 INFO L276 IsEmpty]: Start isEmpty. Operand 501 states and 509 transitions. [2018-10-10 14:55:45,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-10-10 14:55:45,048 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:45,048 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:45,048 INFO L424 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:45,048 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:45,049 INFO L82 PathProgramCache]: Analyzing trace with hash -1599359923, now seen corresponding path program 1 times [2018-10-10 14:55:45,049 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:45,049 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:45,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:45,050 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:45,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:45,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:45,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:45,278 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:45,278 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:55:45,278 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:55:45,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:55:45,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:45,279 INFO L87 Difference]: Start difference. First operand 501 states and 509 transitions. Second operand 13 states. [2018-10-10 14:55:46,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:46,856 INFO L93 Difference]: Finished difference Result 650 states and 661 transitions. [2018-10-10 14:55:46,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-10 14:55:46,856 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 134 [2018-10-10 14:55:46,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:46,860 INFO L225 Difference]: With dead ends: 650 [2018-10-10 14:55:46,860 INFO L226 Difference]: Without dead ends: 650 [2018-10-10 14:55:46,860 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=192, Invalid=564, Unknown=0, NotChecked=0, Total=756 [2018-10-10 14:55:46,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 650 states. [2018-10-10 14:55:46,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 650 to 500. [2018-10-10 14:55:46,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 500 states. [2018-10-10 14:55:46,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 500 states to 500 states and 508 transitions. [2018-10-10 14:55:46,867 INFO L78 Accepts]: Start accepts. Automaton has 500 states and 508 transitions. Word has length 134 [2018-10-10 14:55:46,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:46,867 INFO L481 AbstractCegarLoop]: Abstraction has 500 states and 508 transitions. [2018-10-10 14:55:46,867 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:55:46,867 INFO L276 IsEmpty]: Start isEmpty. Operand 500 states and 508 transitions. [2018-10-10 14:55:46,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-10-10 14:55:46,869 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:46,869 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:46,869 INFO L424 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:46,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:46,870 INFO L82 PathProgramCache]: Analyzing trace with hash -1713315181, now seen corresponding path program 1 times [2018-10-10 14:55:46,870 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:46,870 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:46,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:46,871 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:46,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:46,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:47,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:47,226 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:47,226 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:55:47,227 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:55:47,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:55:47,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:47,227 INFO L87 Difference]: Start difference. First operand 500 states and 508 transitions. Second operand 13 states. [2018-10-10 14:55:48,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:48,868 INFO L93 Difference]: Finished difference Result 649 states and 660 transitions. [2018-10-10 14:55:48,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-10 14:55:48,868 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 144 [2018-10-10 14:55:48,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:48,870 INFO L225 Difference]: With dead ends: 649 [2018-10-10 14:55:48,870 INFO L226 Difference]: Without dead ends: 649 [2018-10-10 14:55:48,871 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=202, Invalid=554, Unknown=0, NotChecked=0, Total=756 [2018-10-10 14:55:48,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 649 states. [2018-10-10 14:55:48,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 649 to 499. [2018-10-10 14:55:48,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2018-10-10 14:55:48,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 507 transitions. [2018-10-10 14:55:48,878 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 507 transitions. Word has length 144 [2018-10-10 14:55:48,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:48,879 INFO L481 AbstractCegarLoop]: Abstraction has 499 states and 507 transitions. [2018-10-10 14:55:48,879 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:55:48,879 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 507 transitions. [2018-10-10 14:55:48,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-10-10 14:55:48,880 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:48,880 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:48,881 INFO L424 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:48,881 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:48,881 INFO L82 PathProgramCache]: Analyzing trace with hash -123356967, now seen corresponding path program 1 times [2018-10-10 14:55:48,881 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:48,881 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:48,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:48,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:48,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:48,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:49,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:49,219 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:49,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:55:49,220 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:55:49,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:55:49,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:49,220 INFO L87 Difference]: Start difference. First operand 499 states and 507 transitions. Second operand 13 states. [2018-10-10 14:55:50,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:50,785 INFO L93 Difference]: Finished difference Result 656 states and 667 transitions. [2018-10-10 14:55:50,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-10 14:55:50,786 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 154 [2018-10-10 14:55:50,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:50,789 INFO L225 Difference]: With dead ends: 656 [2018-10-10 14:55:50,789 INFO L226 Difference]: Without dead ends: 656 [2018-10-10 14:55:50,790 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=187, Invalid=569, Unknown=0, NotChecked=0, Total=756 [2018-10-10 14:55:50,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 656 states. [2018-10-10 14:55:50,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 656 to 498. [2018-10-10 14:55:50,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 498 states. [2018-10-10 14:55:50,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 498 states to 498 states and 506 transitions. [2018-10-10 14:55:50,797 INFO L78 Accepts]: Start accepts. Automaton has 498 states and 506 transitions. Word has length 154 [2018-10-10 14:55:50,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:50,798 INFO L481 AbstractCegarLoop]: Abstraction has 498 states and 506 transitions. [2018-10-10 14:55:50,798 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:55:50,798 INFO L276 IsEmpty]: Start isEmpty. Operand 498 states and 506 transitions. [2018-10-10 14:55:50,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-10-10 14:55:50,799 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:50,799 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:50,800 INFO L424 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:50,800 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:50,800 INFO L82 PathProgramCache]: Analyzing trace with hash -434049936, now seen corresponding path program 1 times [2018-10-10 14:55:50,800 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:50,800 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:50,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:50,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:50,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:50,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:50,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:50,993 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:50,993 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 14:55:50,994 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:50,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:50,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:50,995 INFO L87 Difference]: Start difference. First operand 498 states and 506 transitions. Second operand 6 states. [2018-10-10 14:55:51,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:51,153 INFO L93 Difference]: Finished difference Result 824 states and 841 transitions. [2018-10-10 14:55:51,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-10 14:55:51,153 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 170 [2018-10-10 14:55:51,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:51,157 INFO L225 Difference]: With dead ends: 824 [2018-10-10 14:55:51,157 INFO L226 Difference]: Without dead ends: 824 [2018-10-10 14:55:51,157 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:55:51,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 824 states. [2018-10-10 14:55:51,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 824 to 500. [2018-10-10 14:55:51,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 500 states. [2018-10-10 14:55:51,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 500 states to 500 states and 508 transitions. [2018-10-10 14:55:51,165 INFO L78 Accepts]: Start accepts. Automaton has 500 states and 508 transitions. Word has length 170 [2018-10-10 14:55:51,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:51,166 INFO L481 AbstractCegarLoop]: Abstraction has 500 states and 508 transitions. [2018-10-10 14:55:51,166 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:51,166 INFO L276 IsEmpty]: Start isEmpty. Operand 500 states and 508 transitions. [2018-10-10 14:55:51,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2018-10-10 14:55:51,167 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:51,167 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:51,168 INFO L424 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:51,168 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:51,168 INFO L82 PathProgramCache]: Analyzing trace with hash -570742813, now seen corresponding path program 1 times [2018-10-10 14:55:51,168 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:51,169 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:51,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:51,170 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:51,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:51,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:51,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:51,648 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:51,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-10 14:55:51,649 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-10 14:55:51,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-10 14:55:51,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-10 14:55:51,649 INFO L87 Difference]: Start difference. First operand 500 states and 508 transitions. Second operand 9 states. [2018-10-10 14:55:52,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:52,625 INFO L93 Difference]: Finished difference Result 803 states and 817 transitions. [2018-10-10 14:55:52,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-10 14:55:52,628 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 171 [2018-10-10 14:55:52,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:52,631 INFO L225 Difference]: With dead ends: 803 [2018-10-10 14:55:52,631 INFO L226 Difference]: Without dead ends: 803 [2018-10-10 14:55:52,631 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=130, Invalid=376, Unknown=0, NotChecked=0, Total=506 [2018-10-10 14:55:52,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 803 states. [2018-10-10 14:55:52,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 803 to 589. [2018-10-10 14:55:52,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 589 states. [2018-10-10 14:55:52,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 589 states to 589 states and 610 transitions. [2018-10-10 14:55:52,642 INFO L78 Accepts]: Start accepts. Automaton has 589 states and 610 transitions. Word has length 171 [2018-10-10 14:55:52,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:52,642 INFO L481 AbstractCegarLoop]: Abstraction has 589 states and 610 transitions. [2018-10-10 14:55:52,642 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-10 14:55:52,643 INFO L276 IsEmpty]: Start isEmpty. Operand 589 states and 610 transitions. [2018-10-10 14:55:52,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-10-10 14:55:52,644 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:52,644 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:52,645 INFO L424 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:52,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:52,645 INFO L82 PathProgramCache]: Analyzing trace with hash -513157486, now seen corresponding path program 1 times [2018-10-10 14:55:52,645 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:52,645 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:52,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:52,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:52,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:52,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:53,261 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-10-10 14:55:53,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:53,551 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:53,551 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-10-10 14:55:53,552 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-10 14:55:53,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-10 14:55:53,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2018-10-10 14:55:53,552 INFO L87 Difference]: Start difference. First operand 589 states and 610 transitions. Second operand 15 states. [2018-10-10 14:55:55,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:55,722 INFO L93 Difference]: Finished difference Result 912 states and 938 transitions. [2018-10-10 14:55:55,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-10-10 14:55:55,722 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 172 [2018-10-10 14:55:55,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:55,726 INFO L225 Difference]: With dead ends: 912 [2018-10-10 14:55:55,726 INFO L226 Difference]: Without dead ends: 912 [2018-10-10 14:55:55,727 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=353, Invalid=1207, Unknown=0, NotChecked=0, Total=1560 [2018-10-10 14:55:55,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 912 states. [2018-10-10 14:55:55,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 912 to 702. [2018-10-10 14:55:55,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 702 states. [2018-10-10 14:55:55,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 702 states to 702 states and 739 transitions. [2018-10-10 14:55:55,736 INFO L78 Accepts]: Start accepts. Automaton has 702 states and 739 transitions. Word has length 172 [2018-10-10 14:55:55,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:55,737 INFO L481 AbstractCegarLoop]: Abstraction has 702 states and 739 transitions. [2018-10-10 14:55:55,737 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-10 14:55:55,737 INFO L276 IsEmpty]: Start isEmpty. Operand 702 states and 739 transitions. [2018-10-10 14:55:55,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-10-10 14:55:55,738 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:55,738 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:55,739 INFO L424 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:55,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:55,739 INFO L82 PathProgramCache]: Analyzing trace with hash 1478929296, now seen corresponding path program 1 times [2018-10-10 14:55:55,739 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:55,739 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:55,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:55,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:55,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:55,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:56,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:56,053 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:56,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:56,053 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:56,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:56,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:56,054 INFO L87 Difference]: Start difference. First operand 702 states and 739 transitions. Second operand 6 states. [2018-10-10 14:55:56,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:56,694 INFO L93 Difference]: Finished difference Result 898 states and 927 transitions. [2018-10-10 14:55:56,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 14:55:56,694 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 182 [2018-10-10 14:55:56,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:56,701 INFO L225 Difference]: With dead ends: 898 [2018-10-10 14:55:56,701 INFO L226 Difference]: Without dead ends: 898 [2018-10-10 14:55:56,703 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-10-10 14:55:56,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 898 states. [2018-10-10 14:55:56,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 898 to 701. [2018-10-10 14:55:56,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 701 states. [2018-10-10 14:55:56,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 701 states to 701 states and 738 transitions. [2018-10-10 14:55:56,719 INFO L78 Accepts]: Start accepts. Automaton has 701 states and 738 transitions. Word has length 182 [2018-10-10 14:55:56,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:56,720 INFO L481 AbstractCegarLoop]: Abstraction has 701 states and 738 transitions. [2018-10-10 14:55:56,720 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:56,720 INFO L276 IsEmpty]: Start isEmpty. Operand 701 states and 738 transitions. [2018-10-10 14:55:56,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2018-10-10 14:55:56,721 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:56,721 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:56,722 INFO L424 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:56,722 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:56,722 INFO L82 PathProgramCache]: Analyzing trace with hash -1397831834, now seen corresponding path program 1 times [2018-10-10 14:55:56,722 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:56,722 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:56,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:56,723 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:56,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:56,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:57,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:57,503 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:57,503 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:55:57,503 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:55:57,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:55:57,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:57,504 INFO L87 Difference]: Start difference. First operand 701 states and 738 transitions. Second operand 8 states. [2018-10-10 14:55:58,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:58,052 INFO L93 Difference]: Finished difference Result 833 states and 871 transitions. [2018-10-10 14:55:58,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:55:58,053 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 183 [2018-10-10 14:55:58,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:58,059 INFO L225 Difference]: With dead ends: 833 [2018-10-10 14:55:58,059 INFO L226 Difference]: Without dead ends: 833 [2018-10-10 14:55:58,060 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:58,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 833 states. [2018-10-10 14:55:58,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 833 to 700. [2018-10-10 14:55:58,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 700 states. [2018-10-10 14:55:58,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 737 transitions. [2018-10-10 14:55:58,070 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 737 transitions. Word has length 183 [2018-10-10 14:55:58,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:58,070 INFO L481 AbstractCegarLoop]: Abstraction has 700 states and 737 transitions. [2018-10-10 14:55:58,070 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:55:58,071 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 737 transitions. [2018-10-10 14:55:58,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-10-10 14:55:58,072 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:58,072 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:58,072 INFO L424 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:58,072 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:58,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1239742439, now seen corresponding path program 1 times [2018-10-10 14:55:58,073 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:58,073 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:58,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:58,074 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:58,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:58,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:58,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:58,265 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:58,265 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 14:55:58,265 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 14:55:58,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 14:55:58,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-10 14:55:58,266 INFO L87 Difference]: Start difference. First operand 700 states and 737 transitions. Second operand 5 states. [2018-10-10 14:55:58,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:58,829 INFO L93 Difference]: Finished difference Result 895 states and 940 transitions. [2018-10-10 14:55:58,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:55:58,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 184 [2018-10-10 14:55:58,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:58,833 INFO L225 Difference]: With dead ends: 895 [2018-10-10 14:55:58,833 INFO L226 Difference]: Without dead ends: 895 [2018-10-10 14:55:58,834 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-10 14:55:58,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 895 states. [2018-10-10 14:55:58,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 895 to 685. [2018-10-10 14:55:58,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 685 states. [2018-10-10 14:55:58,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 685 states to 685 states and 718 transitions. [2018-10-10 14:55:58,845 INFO L78 Accepts]: Start accepts. Automaton has 685 states and 718 transitions. Word has length 184 [2018-10-10 14:55:58,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:58,845 INFO L481 AbstractCegarLoop]: Abstraction has 685 states and 718 transitions. [2018-10-10 14:55:58,845 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 14:55:58,845 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 718 transitions. [2018-10-10 14:55:58,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-10-10 14:55:58,846 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:58,847 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:58,847 INFO L424 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:58,847 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:58,847 INFO L82 PathProgramCache]: Analyzing trace with hash 222690603, now seen corresponding path program 1 times [2018-10-10 14:55:58,848 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:58,848 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:58,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:58,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:58,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:58,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:59,445 WARN L178 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-10-10 14:55:59,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:59,885 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:59,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:55:59,886 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:55:59,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:55:59,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:55:59,886 INFO L87 Difference]: Start difference. First operand 685 states and 718 transitions. Second operand 10 states. [2018-10-10 14:56:00,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:00,766 INFO L93 Difference]: Finished difference Result 1056 states and 1090 transitions. [2018-10-10 14:56:00,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-10 14:56:00,767 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 185 [2018-10-10 14:56:00,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:00,771 INFO L225 Difference]: With dead ends: 1056 [2018-10-10 14:56:00,772 INFO L226 Difference]: Without dead ends: 1056 [2018-10-10 14:56:00,772 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=226, Invalid=476, Unknown=0, NotChecked=0, Total=702 [2018-10-10 14:56:00,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1056 states. [2018-10-10 14:56:00,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1056 to 662. [2018-10-10 14:56:00,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 662 states. [2018-10-10 14:56:00,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 692 transitions. [2018-10-10 14:56:00,783 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 692 transitions. Word has length 185 [2018-10-10 14:56:00,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:00,784 INFO L481 AbstractCegarLoop]: Abstraction has 662 states and 692 transitions. [2018-10-10 14:56:00,784 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:56:00,784 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 692 transitions. [2018-10-10 14:56:00,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-10-10 14:56:00,785 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:00,785 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:00,786 INFO L424 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:00,786 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:00,786 INFO L82 PathProgramCache]: Analyzing trace with hash -1203413907, now seen corresponding path program 1 times [2018-10-10 14:56:00,786 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:00,786 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:00,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:00,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:00,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:00,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:01,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:01,188 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:01,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:56:01,189 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:56:01,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:56:01,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:56:01,189 INFO L87 Difference]: Start difference. First operand 662 states and 692 transitions. Second operand 6 states. [2018-10-10 14:56:01,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:01,627 INFO L93 Difference]: Finished difference Result 730 states and 758 transitions. [2018-10-10 14:56:01,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:56:01,628 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 195 [2018-10-10 14:56:01,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:01,632 INFO L225 Difference]: With dead ends: 730 [2018-10-10 14:56:01,632 INFO L226 Difference]: Without dead ends: 730 [2018-10-10 14:56:01,632 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:56:01,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 730 states. [2018-10-10 14:56:01,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 730 to 659. [2018-10-10 14:56:01,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 659 states. [2018-10-10 14:56:01,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 689 transitions. [2018-10-10 14:56:01,641 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 689 transitions. Word has length 195 [2018-10-10 14:56:01,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:01,641 INFO L481 AbstractCegarLoop]: Abstraction has 659 states and 689 transitions. [2018-10-10 14:56:01,641 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:56:01,641 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 689 transitions. [2018-10-10 14:56:01,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-10-10 14:56:01,642 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:01,643 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:01,643 INFO L424 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:01,643 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:01,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1647793787, now seen corresponding path program 1 times [2018-10-10 14:56:01,644 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:01,644 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:01,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:01,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:01,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:01,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:02,934 WARN L178 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 26 [2018-10-10 14:56:04,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:04,807 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:04,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [42] imperfect sequences [] total 42 [2018-10-10 14:56:04,808 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-10-10 14:56:04,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-10-10 14:56:04,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=1583, Unknown=0, NotChecked=0, Total=1722 [2018-10-10 14:56:04,809 INFO L87 Difference]: Start difference. First operand 659 states and 689 transitions. Second operand 42 states. [2018-10-10 14:56:08,980 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 65 [2018-10-10 14:56:13,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:13,577 INFO L93 Difference]: Finished difference Result 1096 states and 1138 transitions. [2018-10-10 14:56:13,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-10-10 14:56:13,577 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 196 [2018-10-10 14:56:13,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:13,582 INFO L225 Difference]: With dead ends: 1096 [2018-10-10 14:56:13,582 INFO L226 Difference]: Without dead ends: 1096 [2018-10-10 14:56:13,585 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2530 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=1353, Invalid=8949, Unknown=0, NotChecked=0, Total=10302 [2018-10-10 14:56:13,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1096 states. [2018-10-10 14:56:13,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1096 to 679. [2018-10-10 14:56:13,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 679 states. [2018-10-10 14:56:13,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 679 states to 679 states and 709 transitions. [2018-10-10 14:56:13,594 INFO L78 Accepts]: Start accepts. Automaton has 679 states and 709 transitions. Word has length 196 [2018-10-10 14:56:13,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:13,594 INFO L481 AbstractCegarLoop]: Abstraction has 679 states and 709 transitions. [2018-10-10 14:56:13,594 INFO L482 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-10-10 14:56:13,594 INFO L276 IsEmpty]: Start isEmpty. Operand 679 states and 709 transitions. [2018-10-10 14:56:13,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-10-10 14:56:13,596 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:13,596 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:13,596 INFO L424 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:13,597 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:13,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1348874810, now seen corresponding path program 1 times [2018-10-10 14:56:13,597 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:13,597 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:13,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:13,598 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:13,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:13,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:13,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:13,825 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:13,825 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:56:13,825 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:56:13,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:56:13,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:56:13,826 INFO L87 Difference]: Start difference. First operand 679 states and 709 transitions. Second operand 8 states. [2018-10-10 14:56:14,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:14,436 INFO L93 Difference]: Finished difference Result 825 states and 857 transitions. [2018-10-10 14:56:14,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 14:56:14,437 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 196 [2018-10-10 14:56:14,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:14,441 INFO L225 Difference]: With dead ends: 825 [2018-10-10 14:56:14,441 INFO L226 Difference]: Without dead ends: 825 [2018-10-10 14:56:14,442 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=63, Invalid=119, Unknown=0, NotChecked=0, Total=182 [2018-10-10 14:56:14,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 825 states. [2018-10-10 14:56:14,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 825 to 676. [2018-10-10 14:56:14,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 676 states. [2018-10-10 14:56:14,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 676 states to 676 states and 706 transitions. [2018-10-10 14:56:14,450 INFO L78 Accepts]: Start accepts. Automaton has 676 states and 706 transitions. Word has length 196 [2018-10-10 14:56:14,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:14,450 INFO L481 AbstractCegarLoop]: Abstraction has 676 states and 706 transitions. [2018-10-10 14:56:14,450 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:56:14,450 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 706 transitions. [2018-10-10 14:56:14,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-10-10 14:56:14,451 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:14,452 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:14,452 INFO L424 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:14,452 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:14,452 INFO L82 PathProgramCache]: Analyzing trace with hash 1840655407, now seen corresponding path program 1 times [2018-10-10 14:56:14,452 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:14,453 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:14,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:14,454 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:14,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:14,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:14,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:14,733 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:14,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:56:14,734 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:56:14,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:56:14,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:56:14,734 INFO L87 Difference]: Start difference. First operand 676 states and 706 transitions. Second operand 10 states. [2018-10-10 14:56:15,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:15,355 INFO L93 Difference]: Finished difference Result 867 states and 885 transitions. [2018-10-10 14:56:15,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-10 14:56:15,361 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 200 [2018-10-10 14:56:15,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:15,364 INFO L225 Difference]: With dead ends: 867 [2018-10-10 14:56:15,364 INFO L226 Difference]: Without dead ends: 867 [2018-10-10 14:56:15,364 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=144, Invalid=318, Unknown=0, NotChecked=0, Total=462 [2018-10-10 14:56:15,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 867 states. [2018-10-10 14:56:15,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 867 to 676. [2018-10-10 14:56:15,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 676 states. [2018-10-10 14:56:15,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 676 states to 676 states and 704 transitions. [2018-10-10 14:56:15,372 INFO L78 Accepts]: Start accepts. Automaton has 676 states and 704 transitions. Word has length 200 [2018-10-10 14:56:15,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:15,372 INFO L481 AbstractCegarLoop]: Abstraction has 676 states and 704 transitions. [2018-10-10 14:56:15,372 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:56:15,373 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 704 transitions. [2018-10-10 14:56:15,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-10-10 14:56:15,374 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:15,374 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:15,374 INFO L424 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:15,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:15,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1548562679, now seen corresponding path program 1 times [2018-10-10 14:56:15,375 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:15,375 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:15,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:15,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:15,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:15,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:16,408 WARN L178 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 8 [2018-10-10 14:56:16,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:16,572 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:16,572 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:56:16,573 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:56:16,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:56:16,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:56:16,574 INFO L87 Difference]: Start difference. First operand 676 states and 704 transitions. Second operand 10 states. [2018-10-10 14:56:17,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:17,416 INFO L93 Difference]: Finished difference Result 853 states and 869 transitions. [2018-10-10 14:56:17,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-10 14:56:17,417 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 212 [2018-10-10 14:56:17,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:17,420 INFO L225 Difference]: With dead ends: 853 [2018-10-10 14:56:17,421 INFO L226 Difference]: Without dead ends: 853 [2018-10-10 14:56:17,421 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=149, Invalid=451, Unknown=0, NotChecked=0, Total=600 [2018-10-10 14:56:17,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 853 states. [2018-10-10 14:56:17,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 853 to 703. [2018-10-10 14:56:17,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 703 states. [2018-10-10 14:56:17,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 703 states to 703 states and 734 transitions. [2018-10-10 14:56:17,429 INFO L78 Accepts]: Start accepts. Automaton has 703 states and 734 transitions. Word has length 212 [2018-10-10 14:56:17,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:17,429 INFO L481 AbstractCegarLoop]: Abstraction has 703 states and 734 transitions. [2018-10-10 14:56:17,429 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:56:17,429 INFO L276 IsEmpty]: Start isEmpty. Operand 703 states and 734 transitions. [2018-10-10 14:56:17,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2018-10-10 14:56:17,433 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:17,433 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:17,433 INFO L424 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:17,433 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:17,433 INFO L82 PathProgramCache]: Analyzing trace with hash 760803145, now seen corresponding path program 1 times [2018-10-10 14:56:17,433 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:17,434 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:17,434 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:17,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:17,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:17,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:18,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:18,116 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:18,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-10-10 14:56:18,117 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-10 14:56:18,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-10 14:56:18,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-10-10 14:56:18,118 INFO L87 Difference]: Start difference. First operand 703 states and 734 transitions. Second operand 17 states. [2018-10-10 14:56:18,663 WARN L178 SmtUtils]: Spent 131.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-10-10 14:56:19,019 WARN L178 SmtUtils]: Spent 152.00 ms on a formula simplification that was a NOOP. DAG size: 23 [2018-10-10 14:56:21,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:21,265 INFO L93 Difference]: Finished difference Result 1067 states and 1085 transitions. [2018-10-10 14:56:21,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-10-10 14:56:21,266 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 213 [2018-10-10 14:56:21,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:21,270 INFO L225 Difference]: With dead ends: 1067 [2018-10-10 14:56:21,270 INFO L226 Difference]: Without dead ends: 1067 [2018-10-10 14:56:21,271 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 516 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=382, Invalid=1688, Unknown=0, NotChecked=0, Total=2070 [2018-10-10 14:56:21,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1067 states. [2018-10-10 14:56:21,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1067 to 703. [2018-10-10 14:56:21,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 703 states. [2018-10-10 14:56:21,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 703 states to 703 states and 732 transitions. [2018-10-10 14:56:21,279 INFO L78 Accepts]: Start accepts. Automaton has 703 states and 732 transitions. Word has length 213 [2018-10-10 14:56:21,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:21,279 INFO L481 AbstractCegarLoop]: Abstraction has 703 states and 732 transitions. [2018-10-10 14:56:21,279 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-10 14:56:21,279 INFO L276 IsEmpty]: Start isEmpty. Operand 703 states and 732 transitions. [2018-10-10 14:56:21,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-10-10 14:56:21,281 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:21,281 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:21,281 INFO L424 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:21,282 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:21,282 INFO L82 PathProgramCache]: Analyzing trace with hash -1279014855, now seen corresponding path program 1 times [2018-10-10 14:56:21,282 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:21,282 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:21,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:21,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:21,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:21,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:22,987 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:22,987 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:22,987 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:22,996 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:23,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:23,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:23,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:56:23,168 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,193 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,194 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:56:23,332 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:23,353 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:23,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:23,355 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,388 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 14:56:23,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:23,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:23,533 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,550 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,558 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,558 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:25 [2018-10-10 14:56:23,975 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:23,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 14:56:23,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:23,984 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:23,995 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:24,006 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:24,007 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:25 [2018-10-10 14:56:24,118 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:24,120 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:24,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:24,121 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:24,128 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:24,128 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:34, output treesize:28 [2018-10-10 14:56:24,576 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 20 [2018-10-10 14:56:24,590 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:24,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 14:56:24,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:24,596 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:24,602 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:24,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:24,612 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:28 [2018-10-10 14:56:26,317 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:26,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 64 [2018-10-10 14:56:26,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 46 [2018-10-10 14:56:26,439 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 14:56:26,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 39 [2018-10-10 14:56:26,497 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:26,694 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:56:26,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:56:26,962 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:51, output treesize:53 [2018-10-10 14:56:27,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 56 treesize of output 60 [2018-10-10 14:56:27,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 42 treesize of output 44 [2018-10-10 14:56:27,409 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 14:56:27,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-10-10 14:56:27,465 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:27,518 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:56:27,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-10-10 14:56:27,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:56:27,573 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:27,577 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:27,605 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:56:27,605 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 7 variables, input treesize:93, output treesize:47 [2018-10-10 14:56:28,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-10-10 14:56:28,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 41 [2018-10-10 14:56:28,337 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 3 xjuncts. [2018-10-10 14:56:28,365 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:56:28,385 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:56:28,385 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:38 [2018-10-10 14:56:28,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-10-10 14:56:28,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2018-10-10 14:56:28,666 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 14:56:28,698 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:56:28,707 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:56:28,708 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:23 [2018-10-10 14:56:29,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:29,172 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:56:29,173 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 50] total 78 [2018-10-10 14:56:29,235 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_34.bpl [2018-10-10 14:56:29,241 INFO L460 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-10-10 14:56:29,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-10-10 14:56:29,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=5752, Unknown=0, NotChecked=0, Total=6006 [2018-10-10 14:56:29,243 INFO L87 Difference]: Start difference. First operand 703 states and 732 transitions. Second operand 78 states. [2018-10-10 14:56:32,657 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 50 [2018-10-10 14:56:32,863 WARN L178 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 52 [2018-10-10 14:56:33,098 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 54 [2018-10-10 14:56:33,299 WARN L178 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 52 [2018-10-10 14:56:33,738 WARN L178 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 56 [2018-10-10 14:56:34,016 WARN L178 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 49 [2018-10-10 14:56:34,524 WARN L178 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 45 [2018-10-10 14:56:34,997 WARN L178 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 50 [2018-10-10 14:56:35,242 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 54 [2018-10-10 14:56:35,503 WARN L178 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 60 [2018-10-10 14:56:35,747 WARN L178 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 62 [2018-10-10 14:56:36,123 WARN L178 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 62 [2018-10-10 14:56:36,442 WARN L178 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 65 [2018-10-10 14:56:36,856 WARN L178 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 55 [2018-10-10 14:56:37,363 WARN L178 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 58 [2018-10-10 14:56:37,588 WARN L178 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 65 [2018-10-10 14:56:37,877 WARN L178 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 62 [2018-10-10 14:56:38,163 WARN L178 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 70 [2018-10-10 14:56:38,539 WARN L178 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 115 DAG size of output: 74 [2018-10-10 14:56:38,805 WARN L178 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 77 [2018-10-10 14:56:39,014 WARN L178 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 73 [2018-10-10 14:56:39,429 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 73 [2018-10-10 14:56:39,675 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 72 [2018-10-10 14:56:40,179 WARN L178 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 64 [2018-10-10 14:56:40,482 WARN L178 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 72 [2018-10-10 14:56:40,922 WARN L178 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 56 [2018-10-10 14:56:41,183 WARN L178 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 63 [2018-10-10 14:56:41,430 WARN L178 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 69 [2018-10-10 14:56:41,808 WARN L178 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 71 [2018-10-10 14:56:41,987 WARN L178 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 54 [2018-10-10 14:56:42,274 WARN L178 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 75 [2018-10-10 14:56:42,514 WARN L178 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 51 [2018-10-10 14:56:42,756 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 55 [2018-10-10 14:56:43,034 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 60 [2018-10-10 14:56:43,277 WARN L178 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 62 [2018-10-10 14:56:43,558 WARN L178 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 64 [2018-10-10 14:56:43,896 WARN L178 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 78 [2018-10-10 14:56:44,237 WARN L178 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 80 [2018-10-10 14:56:44,554 WARN L178 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 82 [2018-10-10 14:56:44,987 WARN L178 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 80 [2018-10-10 14:56:45,258 WARN L178 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 74 [2018-10-10 14:56:45,690 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 71 [2018-10-10 14:56:46,484 WARN L178 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 55 [2018-10-10 14:56:47,138 WARN L178 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 61 [2018-10-10 14:56:47,911 WARN L178 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 66 [2018-10-10 14:56:48,318 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 69 [2018-10-10 14:56:54,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:54,299 INFO L93 Difference]: Finished difference Result 1131 states and 1158 transitions. [2018-10-10 14:56:54,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2018-10-10 14:56:54,299 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 221 [2018-10-10 14:56:54,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:54,305 INFO L225 Difference]: With dead ends: 1131 [2018-10-10 14:56:54,305 INFO L226 Difference]: Without dead ends: 1131 [2018-10-10 14:56:54,312 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 180 SyntacticMatches, 11 SemanticMatches, 164 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7309 ImplicationChecksByTransitivity, 18.9s TimeCoverageRelationStatistics Valid=3244, Invalid=24146, Unknown=0, NotChecked=0, Total=27390 [2018-10-10 14:56:54,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1131 states. [2018-10-10 14:56:54,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1131 to 730. [2018-10-10 14:56:54,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 730 states. [2018-10-10 14:56:54,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 730 states to 730 states and 759 transitions. [2018-10-10 14:56:54,325 INFO L78 Accepts]: Start accepts. Automaton has 730 states and 759 transitions. Word has length 221 [2018-10-10 14:56:54,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:54,326 INFO L481 AbstractCegarLoop]: Abstraction has 730 states and 759 transitions. [2018-10-10 14:56:54,326 INFO L482 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-10-10 14:56:54,326 INFO L276 IsEmpty]: Start isEmpty. Operand 730 states and 759 transitions. [2018-10-10 14:56:54,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2018-10-10 14:56:54,327 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:54,327 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:54,328 INFO L424 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:54,328 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:54,328 INFO L82 PathProgramCache]: Analyzing trace with hash -994851526, now seen corresponding path program 1 times [2018-10-10 14:56:54,328 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:54,329 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:54,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:54,330 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:54,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:54,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:56,839 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:56,840 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:56,840 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:56,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:56,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:56,963 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:56,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:56:56,997 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:57,022 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:57,023 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:56:57,347 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:57,348 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:57,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:57,349 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:57,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:57,426 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 14:56:57,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:57,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:57,682 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:57,684 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:57,692 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:57,692 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:25 [2018-10-10 14:56:58,157 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:58,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 14:56:58,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:58,164 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,174 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,184 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,185 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:25 [2018-10-10 14:56:58,291 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:58,292 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:58,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:58,293 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,298 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,299 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:34, output treesize:28 [2018-10-10 14:56:58,658 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:58,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 14:56:58,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:58,666 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,675 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,686 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:58,686 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:33 [2018-10-10 14:56:59,414 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:59,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 60 treesize of output 73 [2018-10-10 14:56:59,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-10-10 14:56:59,440 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:59,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 42 treesize of output 47 [2018-10-10 14:56:59,498 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-10 14:56:59,535 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:56:59,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:56:59,566 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:60, output treesize:71 [2018-10-10 14:56:59,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 41 [2018-10-10 14:56:59,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:56:59,910 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:59,918 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:59,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 65 treesize of output 69 [2018-10-10 14:56:59,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 53 [2018-10-10 14:56:59,984 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-10-10 14:57:00,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 53 [2018-10-10 14:57:00,035 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:00,063 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:00,097 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:00,098 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 7 variables, input treesize:111, output treesize:65 [2018-10-10 14:57:00,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-10-10 14:57:00,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 37 treesize of output 46 [2018-10-10 14:57:00,836 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 3 xjuncts. [2018-10-10 14:57:00,865 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:00,891 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:00,892 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:52 [2018-10-10 14:57:01,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25 [2018-10-10 14:57:01,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 22 [2018-10-10 14:57:01,286 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:01,305 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:01,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:01,323 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:45 [2018-10-10 14:57:01,942 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:01,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-10-10 14:57:01,943 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:01,955 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:57:01,955 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:15 [2018-10-10 14:57:02,337 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:02,357 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:57:02,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 54] total 93 [2018-10-10 14:57:02,390 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_35.bpl [2018-10-10 14:57:02,392 INFO L460 AbstractCegarLoop]: Interpolant automaton has 94 states [2018-10-10 14:57:02,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 94 interpolants. [2018-10-10 14:57:02,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=271, Invalid=8471, Unknown=0, NotChecked=0, Total=8742 [2018-10-10 14:57:02,393 INFO L87 Difference]: Start difference. First operand 730 states and 759 transitions. Second operand 94 states. [2018-10-10 14:57:05,117 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 49 [2018-10-10 14:57:05,347 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 51 [2018-10-10 14:57:05,594 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 53 [2018-10-10 14:57:05,790 WARN L178 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 51 [2018-10-10 14:57:06,252 WARN L178 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 55 [2018-10-10 14:57:06,484 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 48 [2018-10-10 14:57:06,851 WARN L178 SmtUtils]: Spent 217.00 ms on a formula simplification. DAG size of input: 157 DAG size of output: 53 [2018-10-10 14:57:07,201 WARN L178 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 52 [2018-10-10 14:57:07,550 WARN L178 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 57 [2018-10-10 14:57:07,994 WARN L178 SmtUtils]: Spent 290.00 ms on a formula simplification. DAG size of input: 124 DAG size of output: 48 [2018-10-10 14:57:09,303 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 52 [2018-10-10 14:57:09,599 WARN L178 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 118 DAG size of output: 54 [2018-10-10 14:57:10,161 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 57 [2018-10-10 14:57:10,444 WARN L178 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 122 DAG size of output: 64 [2018-10-10 14:57:10,907 WARN L178 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 72 [2018-10-10 14:57:11,244 WARN L178 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 75 [2018-10-10 14:57:11,611 WARN L178 SmtUtils]: Spent 204.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 80 [2018-10-10 14:57:11,912 WARN L178 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 76 [2018-10-10 14:57:12,470 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 75 [2018-10-10 14:57:12,776 WARN L178 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 74 [2018-10-10 14:57:13,078 WARN L178 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 76 [2018-10-10 14:57:13,686 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 69 [2018-10-10 14:57:14,068 WARN L178 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 76 [2018-10-10 14:57:14,596 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 59 [2018-10-10 14:57:15,009 WARN L178 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 69 [2018-10-10 14:57:15,351 WARN L178 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 69 [2018-10-10 14:57:15,709 WARN L178 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 60 [2018-10-10 14:57:16,059 WARN L178 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 71 [2018-10-10 14:57:17,011 WARN L178 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 74 [2018-10-10 14:57:17,425 WARN L178 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 76 [2018-10-10 14:57:17,841 WARN L178 SmtUtils]: Spent 240.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 78 [2018-10-10 14:57:18,198 WARN L178 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 76 [2018-10-10 14:57:18,505 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 68 [2018-10-10 14:57:18,881 WARN L178 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 70 [2018-10-10 14:57:19,637 WARN L178 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 64 [2018-10-10 14:57:20,074 WARN L178 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 53 [2018-10-10 14:57:20,410 WARN L178 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 53 [2018-10-10 14:57:21,277 WARN L178 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 58 [2018-10-10 14:57:21,670 WARN L178 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 65 [2018-10-10 14:57:21,960 WARN L178 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 115 DAG size of output: 53 [2018-10-10 14:57:22,183 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 46 [2018-10-10 14:57:22,571 WARN L178 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 49 [2018-10-10 14:57:22,931 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 52 [2018-10-10 14:57:30,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:57:30,765 INFO L93 Difference]: Finished difference Result 1018 states and 1036 transitions. [2018-10-10 14:57:30,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2018-10-10 14:57:30,766 INFO L78 Accepts]: Start accepts. Automaton has 94 states. Word has length 222 [2018-10-10 14:57:30,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:57:30,769 INFO L225 Difference]: With dead ends: 1018 [2018-10-10 14:57:30,769 INFO L226 Difference]: Without dead ends: 1018 [2018-10-10 14:57:30,771 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 175 SyntacticMatches, 6 SemanticMatches, 178 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7843 ImplicationChecksByTransitivity, 21.4s TimeCoverageRelationStatistics Valid=2991, Invalid=29229, Unknown=0, NotChecked=0, Total=32220 [2018-10-10 14:57:30,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1018 states. [2018-10-10 14:57:30,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1018 to 733. [2018-10-10 14:57:30,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 733 states. [2018-10-10 14:57:30,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 733 states to 733 states and 762 transitions. [2018-10-10 14:57:30,782 INFO L78 Accepts]: Start accepts. Automaton has 733 states and 762 transitions. Word has length 222 [2018-10-10 14:57:30,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:57:30,783 INFO L481 AbstractCegarLoop]: Abstraction has 733 states and 762 transitions. [2018-10-10 14:57:30,783 INFO L482 AbstractCegarLoop]: Interpolant automaton has 94 states. [2018-10-10 14:57:30,783 INFO L276 IsEmpty]: Start isEmpty. Operand 733 states and 762 transitions. [2018-10-10 14:57:30,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2018-10-10 14:57:30,784 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:57:30,784 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:57:30,785 INFO L424 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:57:30,785 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:57:30,785 INFO L82 PathProgramCache]: Analyzing trace with hash 1979886653, now seen corresponding path program 1 times [2018-10-10 14:57:30,785 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:57:30,786 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:57:30,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:30,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:30,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:30,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:31,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:31,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:57:31,089 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 14:57:31,089 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 14:57:31,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 14:57:31,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-10 14:57:31,090 INFO L87 Difference]: Start difference. First operand 733 states and 762 transitions. Second operand 5 states. [2018-10-10 14:57:31,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:57:31,612 INFO L93 Difference]: Finished difference Result 745 states and 770 transitions. [2018-10-10 14:57:31,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:57:31,613 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 222 [2018-10-10 14:57:31,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:57:31,617 INFO L225 Difference]: With dead ends: 745 [2018-10-10 14:57:31,617 INFO L226 Difference]: Without dead ends: 745 [2018-10-10 14:57:31,617 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:57:31,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 745 states. [2018-10-10 14:57:31,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 745 to 732. [2018-10-10 14:57:31,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 732 states. [2018-10-10 14:57:31,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 732 states to 732 states and 760 transitions. [2018-10-10 14:57:31,625 INFO L78 Accepts]: Start accepts. Automaton has 732 states and 760 transitions. Word has length 222 [2018-10-10 14:57:31,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:57:31,625 INFO L481 AbstractCegarLoop]: Abstraction has 732 states and 760 transitions. [2018-10-10 14:57:31,625 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 14:57:31,625 INFO L276 IsEmpty]: Start isEmpty. Operand 732 states and 760 transitions. [2018-10-10 14:57:31,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2018-10-10 14:57:31,627 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:57:31,627 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:57:31,627 INFO L424 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:57:31,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:57:31,628 INFO L82 PathProgramCache]: Analyzing trace with hash -775625701, now seen corresponding path program 1 times [2018-10-10 14:57:31,628 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:57:31,628 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:57:31,629 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:31,629 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:31,629 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:31,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:34,893 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:34,894 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:57:34,894 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:57:34,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:34,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:34,992 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:57:35,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:57:35,013 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,030 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:57:35,260 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:35,261 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:35,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:57:35,262 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,266 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 14:57:35,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:35,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:35,617 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,619 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:35,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:35,637 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,639 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,651 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:35,651 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:32 [2018-10-10 14:57:36,578 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:36,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 14:57:36,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:36,587 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:36,598 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:36,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 14:57:36,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:57:36,642 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:36,658 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:36,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:36,681 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:78, output treesize:49 [2018-10-10 14:57:36,884 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:36,885 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:36,886 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:36,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-10-10 14:57:36,888 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,117 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:54, output treesize:47 [2018-10-10 14:57:37,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 21 [2018-10-10 14:57:37,261 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,278 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:53, output treesize:51 [2018-10-10 14:57:37,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 39 [2018-10-10 14:57:37,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:37,710 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,738 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 14:57:37,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:57:37,791 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,797 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,818 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:37,818 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:73, output treesize:59 [2018-10-10 14:57:39,090 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:39,091 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:39,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 82 [2018-10-10 14:57:39,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:39,104 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,124 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 28 [2018-10-10 14:57:39,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 14:57:39,157 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,164 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,186 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:57:39,186 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:101, output treesize:71 [2018-10-10 14:57:39,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 89 [2018-10-10 14:57:39,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 14:57:39,464 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,480 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 14:57:39,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 14:57:39,524 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,533 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:39,554 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:57:39,554 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:122, output treesize:68 [2018-10-10 14:57:40,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 62 [2018-10-10 14:57:40,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 61 treesize of output 64 [2018-10-10 14:57:40,995 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 3 xjuncts. [2018-10-10 14:57:41,139 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:41,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-10 14:57:41,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 14:57:41,204 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-10-10 14:57:41,220 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:41,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-10-10 14:57:41,276 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:103, output treesize:166 [2018-10-10 14:57:42,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 46 [2018-10-10 14:57:42,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 30 [2018-10-10 14:57:42,145 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:42,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-10-10 14:57:42,171 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:42,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 28 [2018-10-10 14:57:42,173 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:42,190 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:42,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 14:57:42,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:42,226 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-10-10 14:57:42,230 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:42,258 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-10-10 14:57:42,258 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:88, output treesize:83 [2018-10-10 14:57:43,272 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:43,292 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:57:43,293 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 55] total 104 [2018-10-10 14:57:43,319 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_37.bpl [2018-10-10 14:57:43,321 INFO L460 AbstractCegarLoop]: Interpolant automaton has 105 states [2018-10-10 14:57:43,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 105 interpolants. [2018-10-10 14:57:43,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=330, Invalid=10590, Unknown=0, NotChecked=0, Total=10920 [2018-10-10 14:57:43,323 INFO L87 Difference]: Start difference. First operand 732 states and 760 transitions. Second operand 105 states. [2018-10-10 14:57:46,378 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 57 [2018-10-10 14:57:47,052 WARN L178 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 70 [2018-10-10 14:57:47,470 WARN L178 SmtUtils]: Spent 229.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 78 [2018-10-10 14:57:48,181 WARN L178 SmtUtils]: Spent 272.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 82 [2018-10-10 14:57:48,676 WARN L178 SmtUtils]: Spent 296.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 81 [2018-10-10 14:57:49,197 WARN L178 SmtUtils]: Spent 317.00 ms on a formula simplification. DAG size of input: 154 DAG size of output: 83 [2018-10-10 14:57:49,666 WARN L178 SmtUtils]: Spent 309.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 81 [2018-10-10 14:57:50,258 WARN L178 SmtUtils]: Spent 331.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 91 [2018-10-10 14:57:50,815 WARN L178 SmtUtils]: Spent 348.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 93 [2018-10-10 14:57:51,510 WARN L178 SmtUtils]: Spent 360.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 95 [2018-10-10 14:57:52,325 WARN L178 SmtUtils]: Spent 399.00 ms on a formula simplification. DAG size of input: 180 DAG size of output: 103 [2018-10-10 14:57:52,869 WARN L178 SmtUtils]: Spent 330.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 94 [2018-10-10 14:57:53,469 WARN L178 SmtUtils]: Spent 354.00 ms on a formula simplification. DAG size of input: 168 DAG size of output: 95 [2018-10-10 14:57:53,967 WARN L178 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 78 [2018-10-10 14:57:54,448 WARN L178 SmtUtils]: Spent 257.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 85 [2018-10-10 14:57:54,967 WARN L178 SmtUtils]: Spent 304.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 89 [2018-10-10 14:57:55,340 WARN L178 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 79 [2018-10-10 14:57:55,807 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 53 [2018-10-10 14:57:56,091 WARN L178 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 57 [2018-10-10 14:57:56,324 WARN L178 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 59 [2018-10-10 14:57:56,621 WARN L178 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 61 [2018-10-10 14:57:57,002 WARN L178 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 69 [2018-10-10 14:57:57,397 WARN L178 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 74 [2018-10-10 14:57:57,821 WARN L178 SmtUtils]: Spent 236.00 ms on a formula simplification. DAG size of input: 115 DAG size of output: 82 [2018-10-10 14:57:58,300 WARN L178 SmtUtils]: Spent 291.00 ms on a formula simplification. DAG size of input: 130 DAG size of output: 91 [2018-10-10 14:57:58,806 WARN L178 SmtUtils]: Spent 308.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 92 [2018-10-10 14:57:59,352 WARN L178 SmtUtils]: Spent 342.00 ms on a formula simplification. DAG size of input: 156 DAG size of output: 88 [2018-10-10 14:57:59,855 WARN L178 SmtUtils]: Spent 247.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 74 [2018-10-10 14:58:00,390 WARN L178 SmtUtils]: Spent 332.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 86 [2018-10-10 14:58:00,974 WARN L178 SmtUtils]: Spent 399.00 ms on a formula simplification. DAG size of input: 172 DAG size of output: 102 [2018-10-10 14:58:01,812 WARN L178 SmtUtils]: Spent 436.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 113 [2018-10-10 14:58:02,492 WARN L178 SmtUtils]: Spent 468.00 ms on a formula simplification. DAG size of input: 194 DAG size of output: 117 [2018-10-10 14:58:03,010 WARN L178 SmtUtils]: Spent 297.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 100 [2018-10-10 14:58:03,430 WARN L178 SmtUtils]: Spent 268.00 ms on a formula simplification. DAG size of input: 125 DAG size of output: 96 [2018-10-10 14:58:04,429 WARN L178 SmtUtils]: Spent 308.00 ms on a formula simplification. DAG size of input: 143 DAG size of output: 112 [2018-10-10 14:58:04,982 WARN L178 SmtUtils]: Spent 306.00 ms on a formula simplification. DAG size of input: 144 DAG size of output: 111 [2018-10-10 14:58:05,544 WARN L178 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 74 [2018-10-10 14:58:05,969 WARN L178 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 120 DAG size of output: 99 [2018-10-10 14:58:07,040 WARN L178 SmtUtils]: Spent 341.00 ms on a formula simplification. DAG size of input: 159 DAG size of output: 134 [2018-10-10 14:58:07,724 WARN L178 SmtUtils]: Spent 370.00 ms on a formula simplification. DAG size of input: 178 DAG size of output: 136 [2018-10-10 14:58:08,053 WARN L178 SmtUtils]: Spent 203.00 ms on a formula simplification. DAG size of input: 115 DAG size of output: 97 [2018-10-10 14:58:08,339 WARN L178 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 86 [2018-10-10 14:58:09,017 WARN L178 SmtUtils]: Spent 439.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 141 [2018-10-10 14:58:10,960 WARN L178 SmtUtils]: Spent 449.00 ms on a formula simplification. DAG size of input: 194 DAG size of output: 145 [2018-10-10 14:58:11,753 WARN L178 SmtUtils]: Spent 488.00 ms on a formula simplification. DAG size of input: 196 DAG size of output: 147 [2018-10-10 14:58:12,477 WARN L178 SmtUtils]: Spent 471.00 ms on a formula simplification. DAG size of input: 198 DAG size of output: 149 [2018-10-10 14:58:13,209 WARN L178 SmtUtils]: Spent 462.00 ms on a formula simplification. DAG size of input: 196 DAG size of output: 147 [2018-10-10 14:58:13,978 WARN L178 SmtUtils]: Spent 489.00 ms on a formula simplification. DAG size of input: 197 DAG size of output: 150 [2018-10-10 14:58:14,807 WARN L178 SmtUtils]: Spent 490.00 ms on a formula simplification. DAG size of input: 201 DAG size of output: 145 [2018-10-10 14:58:15,786 WARN L178 SmtUtils]: Spent 277.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 98 [2018-10-10 14:58:16,397 WARN L178 SmtUtils]: Spent 355.00 ms on a formula simplification. DAG size of input: 163 DAG size of output: 122 [2018-10-10 14:58:17,240 WARN L178 SmtUtils]: Spent 302.00 ms on a formula simplification. DAG size of input: 162 DAG size of output: 126 [2018-10-10 14:58:17,932 WARN L178 SmtUtils]: Spent 316.00 ms on a formula simplification. DAG size of input: 177 DAG size of output: 139 [2018-10-10 14:58:19,665 WARN L178 SmtUtils]: Spent 381.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 146 [2018-10-10 14:58:20,588 WARN L178 SmtUtils]: Spent 442.00 ms on a formula simplification. DAG size of input: 199 DAG size of output: 153 [2018-10-10 14:58:21,003 WARN L178 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 128 DAG size of output: 98 [2018-10-10 14:58:21,324 WARN L178 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 91 [2018-10-10 14:58:21,999 WARN L178 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 81 [2018-10-10 14:58:22,393 WARN L178 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 62 [2018-10-10 14:58:22,720 WARN L178 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 41 [2018-10-10 14:58:24,116 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 57 [2018-10-10 14:58:26,634 WARN L178 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 55 [2018-10-10 14:58:27,322 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 49 [2018-10-10 14:58:31,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:58:31,990 INFO L93 Difference]: Finished difference Result 1101 states and 1121 transitions. [2018-10-10 14:58:31,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2018-10-10 14:58:31,991 INFO L78 Accepts]: Start accepts. Automaton has 105 states. Word has length 223 [2018-10-10 14:58:31,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:58:31,995 INFO L225 Difference]: With dead ends: 1101 [2018-10-10 14:58:31,995 INFO L226 Difference]: Without dead ends: 1101 [2018-10-10 14:58:31,997 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 172 SyntacticMatches, 9 SemanticMatches, 194 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9127 ImplicationChecksByTransitivity, 39.9s TimeCoverageRelationStatistics Valid=3840, Invalid=34380, Unknown=0, NotChecked=0, Total=38220 [2018-10-10 14:58:31,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2018-10-10 14:58:32,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 738. [2018-10-10 14:58:32,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 738 states. [2018-10-10 14:58:32,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 764 transitions. [2018-10-10 14:58:32,007 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 764 transitions. Word has length 223 [2018-10-10 14:58:32,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:58:32,007 INFO L481 AbstractCegarLoop]: Abstraction has 738 states and 764 transitions. [2018-10-10 14:58:32,007 INFO L482 AbstractCegarLoop]: Interpolant automaton has 105 states. [2018-10-10 14:58:32,007 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 764 transitions. [2018-10-10 14:58:32,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2018-10-10 14:58:32,008 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:58:32,009 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:58:32,009 INFO L424 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:58:32,009 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:58:32,009 INFO L82 PathProgramCache]: Analyzing trace with hash 1246944463, now seen corresponding path program 1 times [2018-10-10 14:58:32,010 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:58:32,010 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:58:32,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:32,011 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:58:32,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:32,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:58:32,468 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-10-10 14:58:32,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:58:32,917 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:58:32,917 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:58:32,917 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:58:32,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:58:32,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:58:32,918 INFO L87 Difference]: Start difference. First operand 738 states and 764 transitions. Second operand 10 states. [2018-10-10 14:58:33,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:58:33,508 INFO L93 Difference]: Finished difference Result 953 states and 981 transitions. [2018-10-10 14:58:33,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-10 14:58:33,509 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 223 [2018-10-10 14:58:33,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:58:33,513 INFO L225 Difference]: With dead ends: 953 [2018-10-10 14:58:33,514 INFO L226 Difference]: Without dead ends: 953 [2018-10-10 14:58:33,514 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=112, Invalid=268, Unknown=0, NotChecked=0, Total=380 [2018-10-10 14:58:33,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 953 states. [2018-10-10 14:58:33,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 953 to 737. [2018-10-10 14:58:33,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 737 states. [2018-10-10 14:58:33,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 737 states and 762 transitions. [2018-10-10 14:58:33,521 INFO L78 Accepts]: Start accepts. Automaton has 737 states and 762 transitions. Word has length 223 [2018-10-10 14:58:33,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:58:33,522 INFO L481 AbstractCegarLoop]: Abstraction has 737 states and 762 transitions. [2018-10-10 14:58:33,522 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:58:33,522 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 762 transitions. [2018-10-10 14:58:33,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2018-10-10 14:58:33,523 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:58:33,523 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:58:33,524 INFO L424 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:58:33,524 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:58:33,524 INFO L82 PathProgramCache]: Analyzing trace with hash -340199870, now seen corresponding path program 1 times [2018-10-10 14:58:33,524 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:58:33,524 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:58:33,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:33,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:58:33,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:33,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:58:33,810 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-10 14:58:33,810 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:58:33,810 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:58:33,810 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:58:33,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:58:33,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:58:33,811 INFO L87 Difference]: Start difference. First operand 737 states and 762 transitions. Second operand 6 states. [2018-10-10 14:58:34,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:58:34,421 INFO L93 Difference]: Finished difference Result 815 states and 843 transitions. [2018-10-10 14:58:34,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:58:34,421 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 236 [2018-10-10 14:58:34,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:58:34,426 INFO L225 Difference]: With dead ends: 815 [2018-10-10 14:58:34,426 INFO L226 Difference]: Without dead ends: 815 [2018-10-10 14:58:34,426 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:58:34,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 815 states. [2018-10-10 14:58:34,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 815 to 729. [2018-10-10 14:58:34,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 729 states. [2018-10-10 14:58:34,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 729 states to 729 states and 754 transitions. [2018-10-10 14:58:34,434 INFO L78 Accepts]: Start accepts. Automaton has 729 states and 754 transitions. Word has length 236 [2018-10-10 14:58:34,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:58:34,434 INFO L481 AbstractCegarLoop]: Abstraction has 729 states and 754 transitions. [2018-10-10 14:58:34,434 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:58:34,435 INFO L276 IsEmpty]: Start isEmpty. Operand 729 states and 754 transitions. [2018-10-10 14:58:34,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2018-10-10 14:58:34,436 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:58:34,436 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:58:34,437 INFO L424 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:58:34,437 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:58:34,437 INFO L82 PathProgramCache]: Analyzing trace with hash -797080085, now seen corresponding path program 1 times [2018-10-10 14:58:34,437 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:58:34,437 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:58:34,438 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:34,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:58:34,438 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:34,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:58:34,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:58:34,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:58:34,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:58:34,869 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:58:34,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:58:34,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:58:34,869 INFO L87 Difference]: Start difference. First operand 729 states and 754 transitions. Second operand 10 states. [2018-10-10 14:58:35,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:58:35,597 INFO L93 Difference]: Finished difference Result 931 states and 949 transitions. [2018-10-10 14:58:35,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-10 14:58:35,598 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 236 [2018-10-10 14:58:35,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:58:35,601 INFO L225 Difference]: With dead ends: 931 [2018-10-10 14:58:35,601 INFO L226 Difference]: Without dead ends: 931 [2018-10-10 14:58:35,601 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=163, Invalid=343, Unknown=0, NotChecked=0, Total=506 [2018-10-10 14:58:35,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 931 states. [2018-10-10 14:58:35,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 931 to 730. [2018-10-10 14:58:35,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 730 states. [2018-10-10 14:58:35,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 730 states to 730 states and 755 transitions. [2018-10-10 14:58:35,612 INFO L78 Accepts]: Start accepts. Automaton has 730 states and 755 transitions. Word has length 236 [2018-10-10 14:58:35,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:58:35,612 INFO L481 AbstractCegarLoop]: Abstraction has 730 states and 755 transitions. [2018-10-10 14:58:35,613 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:58:35,613 INFO L276 IsEmpty]: Start isEmpty. Operand 730 states and 755 transitions. [2018-10-10 14:58:35,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2018-10-10 14:58:35,614 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:58:35,614 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:58:35,614 INFO L424 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:58:35,614 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:58:35,614 INFO L82 PathProgramCache]: Analyzing trace with hash 518384654, now seen corresponding path program 1 times [2018-10-10 14:58:35,615 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:58:35,615 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:58:35,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:35,616 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:58:35,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:58:35,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:58:39,730 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:58:39,731 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:58:39,731 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:58:39,738 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:58:39,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:58:39,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:58:39,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:58:39,868 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:39,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:39,895 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:58:40,000 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:40,001 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:40,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:58:40,002 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:40,005 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:40,006 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 14:58:40,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:58:40,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:58:40,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:40,269 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:40,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:58:40,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:58:40,287 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:40,290 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:40,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:40,301 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:32 [2018-10-10 14:58:40,996 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-10-10 14:58:41,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-10 14:58:41,004 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,014 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 33 [2018-10-10 14:58:41,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-10 14:58:41,044 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,051 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,071 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:74, output treesize:66 [2018-10-10 14:58:41,271 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,272 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,273 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-10-10 14:58:41,274 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,292 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,292 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:71, output treesize:64 [2018-10-10 14:58:41,832 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 57 [2018-10-10 14:58:41,894 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 35 [2018-10-10 14:58:41,912 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,928 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,956 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 56 [2018-10-10 14:58:41,968 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:41,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 35 [2018-10-10 14:58:41,970 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:41,987 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:42,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:42,010 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:86, output treesize:76 [2018-10-10 14:58:42,763 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:42,764 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:42,766 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:42,767 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:42,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 121 [2018-10-10 14:58:42,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:58:42,779 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:42,803 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:42,829 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:42,830 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:42,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 105 [2018-10-10 14:58:42,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:58:42,842 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:42,861 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:42,881 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:42,881 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:123, output treesize:77 [2018-10-10 14:58:43,119 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:43,124 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:43,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 136 [2018-10-10 14:58:43,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-10-10 14:58:43,132 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:43,155 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:43,179 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:43,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 132 treesize of output 128 [2018-10-10 14:58:43,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-10-10 14:58:43,191 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:43,209 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:43,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:43,228 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:156, output treesize:86 [2018-10-10 14:58:44,255 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,259 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 95 [2018-10-10 14:58:44,330 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 7 case distinctions, treesize of input 98 treesize of output 122 [2018-10-10 14:58:44,334 INFO L267 ElimStorePlain]: Start of recursive call 3: 6 dim-0 vars, End of recursive call: 6 dim-0 vars, and 9 xjuncts. [2018-10-10 14:58:44,532 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 6 xjuncts. [2018-10-10 14:58:44,811 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 132 [2018-10-10 14:58:44,821 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 93 [2018-10-10 14:58:44,823 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:44,852 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:44,856 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 131 [2018-10-10 14:58:44,865 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 93 [2018-10-10 14:58:44,867 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:44,895 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:44,899 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 123 [2018-10-10 14:58:44,907 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 93 [2018-10-10 14:58:44,909 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:44,935 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:44,941 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:44,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 105 [2018-10-10 14:58:44,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 62 treesize of output 57 [2018-10-10 14:58:44,961 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-10-10 14:58:45,011 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:58:45,015 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:45,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 104 [2018-10-10 14:58:45,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 62 treesize of output 57 [2018-10-10 14:58:45,035 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-10-10 14:58:45,087 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:58:45,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 80 [2018-10-10 14:58:45,097 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 14:58:45,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 43 [2018-10-10 14:58:45,102 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:45,120 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:45,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 4 dim-0 vars, and 6 xjuncts. [2018-10-10 14:58:45,335 INFO L202 ElimStorePlain]: Needed 15 recursive calls to eliminate 4 variables, input treesize:121, output treesize:531 [2018-10-10 14:58:45,723 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 49 [2018-10-10 14:58:46,921 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:46,922 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:46,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 88 [2018-10-10 14:58:46,926 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:46,927 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:58:46,929 INFO L682 Elim1Store]: detected equality via solver [2018-10-10 14:58:46,948 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 45 treesize of output 96 [2018-10-10 14:58:46,951 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-10 14:58:46,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-10-10 14:58:46,981 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:58:46,991 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:58:47,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 36 [2018-10-10 14:58:47,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-10-10 14:58:47,011 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:47,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-10-10 14:58:47,021 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-10 14:58:47,027 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:47,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:58:47,036 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:119, output treesize:10 [2018-10-10 14:58:47,493 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:58:47,515 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:58:47,515 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 57] total 96 [2018-10-10 14:58:47,538 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_41.bpl [2018-10-10 14:58:47,539 INFO L460 AbstractCegarLoop]: Interpolant automaton has 96 states [2018-10-10 14:58:47,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2018-10-10 14:58:47,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=8822, Unknown=12, NotChecked=0, Total=9120 [2018-10-10 14:58:47,540 INFO L87 Difference]: Start difference. First operand 730 states and 755 transitions. Second operand 96 states. [2018-10-10 14:58:50,569 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 55 [2018-10-10 14:58:51,103 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 61 [2018-10-10 14:58:51,429 WARN L178 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 65 [2018-10-10 14:58:51,799 WARN L178 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 69 [2018-10-10 14:58:52,083 WARN L178 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 65 [2018-10-10 14:58:52,481 WARN L178 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 67 [2018-10-10 14:58:52,843 WARN L178 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 69 [2018-10-10 14:58:53,496 WARN L178 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 77 [2018-10-10 14:58:53,885 WARN L178 SmtUtils]: Spent 213.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 76 [2018-10-10 14:58:54,314 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 57 [2018-10-10 14:58:54,681 WARN L178 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 71 [2018-10-10 14:58:55,043 WARN L178 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 73 [2018-10-10 14:58:55,303 WARN L178 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 64 [2018-10-10 14:58:55,939 WARN L178 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 55 [2018-10-10 14:58:56,162 WARN L178 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 57 [2018-10-10 14:58:56,456 WARN L178 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 59 [2018-10-10 14:58:56,815 WARN L178 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 64 [2018-10-10 14:58:57,189 WARN L178 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 79 [2018-10-10 14:58:57,636 WARN L178 SmtUtils]: Spent 255.00 ms on a formula simplification. DAG size of input: 139 DAG size of output: 87 [2018-10-10 14:58:58,145 WARN L178 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 70 [2018-10-10 14:58:58,641 WARN L178 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 174 DAG size of output: 87 [2018-10-10 14:58:59,162 WARN L178 SmtUtils]: Spent 305.00 ms on a formula simplification. DAG size of input: 192 DAG size of output: 93 [2018-10-10 14:58:59,923 WARN L178 SmtUtils]: Spent 348.00 ms on a formula simplification. DAG size of input: 206 DAG size of output: 95 [2018-10-10 14:59:00,518 WARN L178 SmtUtils]: Spent 368.00 ms on a formula simplification. DAG size of input: 212 DAG size of output: 97 [2018-10-10 14:59:00,889 WARN L178 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 120 DAG size of output: 81 [2018-10-10 14:59:01,200 WARN L178 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 114 DAG size of output: 79 [2018-10-10 14:59:01,916 WARN L178 SmtUtils]: Spent 224.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 84 [2018-10-10 14:59:02,346 WARN L178 SmtUtils]: Spent 240.00 ms on a formula simplification. DAG size of input: 138 DAG size of output: 86 [2018-10-10 14:59:02,788 WARN L178 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 58 [2018-10-10 14:59:03,202 WARN L178 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 115 DAG size of output: 80 [2018-10-10 14:59:04,091 WARN L178 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 84 [2018-10-10 14:59:04,677 WARN L178 SmtUtils]: Spent 335.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 119 [2018-10-10 14:59:05,077 WARN L178 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 75 [2018-10-10 14:59:05,657 WARN L178 SmtUtils]: Spent 352.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 124 [2018-10-10 14:59:05,902 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 72 [2018-10-10 14:59:06,275 WARN L178 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 75 [2018-10-10 14:59:06,702 WARN L178 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 114 DAG size of output: 80 [2018-10-10 14:59:07,100 WARN L178 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 82 [2018-10-10 14:59:07,883 WARN L178 SmtUtils]: Spent 368.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 127 [2018-10-10 14:59:08,543 WARN L178 SmtUtils]: Spent 383.00 ms on a formula simplification. DAG size of input: 169 DAG size of output: 129 [2018-10-10 14:59:09,132 WARN L178 SmtUtils]: Spent 364.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 127 [2018-10-10 14:59:09,719 WARN L178 SmtUtils]: Spent 364.00 ms on a formula simplification. DAG size of input: 165 DAG size of output: 125 [2018-10-10 14:59:10,243 WARN L178 SmtUtils]: Spent 299.00 ms on a formula simplification. DAG size of input: 148 DAG size of output: 108 [2018-10-10 14:59:10,555 WARN L178 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 78 [2018-10-10 14:59:11,166 WARN L178 SmtUtils]: Spent 339.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 116 [2018-10-10 14:59:12,120 WARN L178 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 67 [2018-10-10 14:59:12,545 WARN L178 SmtUtils]: Spent 213.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 90 [2018-10-10 14:59:12,953 WARN L178 SmtUtils]: Spent 225.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 93 [2018-10-10 14:59:13,606 WARN L178 SmtUtils]: Spent 227.00 ms on a formula simplification. DAG size of input: 130 DAG size of output: 97 [2018-10-10 14:59:14,180 WARN L178 SmtUtils]: Spent 316.00 ms on a formula simplification. DAG size of input: 163 DAG size of output: 118 [2018-10-10 14:59:16,062 WARN L178 SmtUtils]: Spent 511.00 ms on a formula simplification. DAG size of input: 178 DAG size of output: 133 [2018-10-10 14:59:16,808 WARN L178 SmtUtils]: Spent 450.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 139 [2018-10-10 14:59:17,237 WARN L178 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 122 DAG size of output: 92 [2018-10-10 14:59:17,567 WARN L178 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 86 [2018-10-10 14:59:18,231 WARN L178 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 79 [2018-10-10 14:59:18,658 WARN L178 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 69 [2018-10-10 14:59:24,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:59:24,975 INFO L93 Difference]: Finished difference Result 966 states and 985 transitions. [2018-10-10 14:59:24,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2018-10-10 14:59:24,976 INFO L78 Accepts]: Start accepts. Automaton has 96 states. Word has length 247 [2018-10-10 14:59:24,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:59:24,978 INFO L225 Difference]: With dead ends: 966 [2018-10-10 14:59:24,978 INFO L226 Difference]: Without dead ends: 966 [2018-10-10 14:59:24,979 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 393 GetRequests, 200 SyntacticMatches, 13 SemanticMatches, 180 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8627 ImplicationChecksByTransitivity, 31.6s TimeCoverageRelationStatistics Valid=2662, Invalid=30268, Unknown=12, NotChecked=0, Total=32942 [2018-10-10 14:59:24,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 966 states. [2018-10-10 14:59:24,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 966 to 750. [2018-10-10 14:59:24,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 750 states. [2018-10-10 14:59:24,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 750 states to 750 states and 775 transitions. [2018-10-10 14:59:24,988 INFO L78 Accepts]: Start accepts. Automaton has 750 states and 775 transitions. Word has length 247 [2018-10-10 14:59:24,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:59:24,989 INFO L481 AbstractCegarLoop]: Abstraction has 750 states and 775 transitions. [2018-10-10 14:59:24,989 INFO L482 AbstractCegarLoop]: Interpolant automaton has 96 states. [2018-10-10 14:59:24,989 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 775 transitions. [2018-10-10 14:59:24,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2018-10-10 14:59:24,990 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:59:24,991 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:59:24,991 INFO L424 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:59:24,991 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:59:24,992 INFO L82 PathProgramCache]: Analyzing trace with hash -60462445, now seen corresponding path program 1 times [2018-10-10 14:59:24,992 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:59:24,992 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:59:24,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:59:24,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:59:24,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:59:25,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:59:27,710 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:59:27,710 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:59:27,710 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:59:27,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:59:27,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:59:27,811 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:59:27,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:59:27,832 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:27,845 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:27,845 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:59:28,024 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:28,025 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:28,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:59:28,026 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,028 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,028 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-10-10 14:59:28,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:59:28,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:59:28,237 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,239 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,245 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,246 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:14 [2018-10-10 14:59:28,681 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:28,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-10 14:59:28,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:59:28,687 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,693 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,702 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:17 [2018-10-10 14:59:28,890 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:28,892 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:28,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 14:59:28,893 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,904 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:28,904 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:32, output treesize:30 [2018-10-10 14:59:29,314 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:29,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-10 14:59:29,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:59:29,324 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:29,330 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:29,344 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:29,344 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:39 [2018-10-10 14:59:30,032 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:30,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 65 treesize of output 72 [2018-10-10 14:59:30,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 73 [2018-10-10 14:59:30,100 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:30,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 35 [2018-10-10 14:59:30,175 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-10 14:59:30,215 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:59:30,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:59:30,246 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:70, output treesize:74 [2018-10-10 14:59:30,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-10-10 14:59:30,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:59:30,642 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:30,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:30,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 75 treesize of output 73 [2018-10-10 14:59:30,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 55 treesize of output 50 [2018-10-10 14:59:30,713 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-10-10 14:59:30,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 63 [2018-10-10 14:59:30,771 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:30,805 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:59:30,843 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:59:30,844 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 7 variables, input treesize:118, output treesize:72 [2018-10-10 14:59:31,114 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:31,116 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:31,117 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:59:31,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 50 [2018-10-10 14:59:31,118 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:31,131 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:31,131 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:34, output treesize:40 [2018-10-10 14:59:31,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-10-10 14:59:31,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:59:31,589 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:31,598 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:31,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:59:31,612 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:51, output treesize:40 [2018-10-10 14:59:31,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25 [2018-10-10 14:59:31,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-10-10 14:59:31,970 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:59:32,063 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:59:32,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-10 14:59:32,221 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:47, output treesize:28 [2018-10-10 14:59:32,880 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:59:32,916 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:59:32,917 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 48] total 102 [2018-10-10 14:59:32,935 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_42.bpl [2018-10-10 14:59:32,936 INFO L460 AbstractCegarLoop]: Interpolant automaton has 103 states [2018-10-10 14:59:32,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2018-10-10 14:59:32,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=453, Invalid=10053, Unknown=0, NotChecked=0, Total=10506 [2018-10-10 14:59:32,937 INFO L87 Difference]: Start difference. First operand 750 states and 775 transitions. Second operand 103 states. [2018-10-10 14:59:35,806 WARN L178 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 54 [2018-10-10 14:59:36,245 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 56 [2018-10-10 14:59:36,494 WARN L178 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 58 [2018-10-10 14:59:36,766 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 60 [2018-10-10 14:59:36,985 WARN L178 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 58 [2018-10-10 14:59:37,602 WARN L178 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 62 [2018-10-10 14:59:37,849 WARN L178 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 56 [2018-10-10 14:59:38,211 WARN L178 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 125 DAG size of output: 59 [2018-10-10 14:59:38,618 WARN L178 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 52 [2018-10-10 14:59:39,100 WARN L178 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 56 [2018-10-10 14:59:39,544 WARN L178 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 58 [2018-10-10 14:59:39,800 WARN L178 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 48 [2018-10-10 14:59:40,747 WARN L178 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 48 [2018-10-10 14:59:41,040 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 53 [2018-10-10 14:59:41,338 WARN L178 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 112 DAG size of output: 57 [2018-10-10 14:59:41,652 WARN L178 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 112 DAG size of output: 67 [2018-10-10 14:59:42,040 WARN L178 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 73 [2018-10-10 14:59:42,368 WARN L178 SmtUtils]: Spent 204.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 79 [2018-10-10 14:59:42,722 WARN L178 SmtUtils]: Spent 235.00 ms on a formula simplification. DAG size of input: 125 DAG size of output: 88 [2018-10-10 14:59:43,265 WARN L178 SmtUtils]: Spent 279.00 ms on a formula simplification. DAG size of input: 139 DAG size of output: 96 [2018-10-10 14:59:43,691 WARN L178 SmtUtils]: Spent 289.00 ms on a formula simplification. DAG size of input: 145 DAG size of output: 100 [2018-10-10 14:59:44,144 WARN L178 SmtUtils]: Spent 273.00 ms on a formula simplification. DAG size of input: 137 DAG size of output: 98 [2018-10-10 14:59:44,524 WARN L178 SmtUtils]: Spent 256.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 94 [2018-10-10 14:59:45,350 WARN L178 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 129 DAG size of output: 92 [2018-10-10 14:59:45,744 WARN L178 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 129 DAG size of output: 91 [2018-10-10 14:59:46,150 WARN L178 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 73 [2018-10-10 14:59:46,535 WARN L178 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 123 DAG size of output: 90 [2018-10-10 14:59:47,239 WARN L178 SmtUtils]: Spent 467.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 100 [2018-10-10 14:59:47,880 WARN L178 SmtUtils]: Spent 204.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 83 [2018-10-10 14:59:48,332 WARN L178 SmtUtils]: Spent 240.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 90 [2018-10-10 14:59:48,716 WARN L178 SmtUtils]: Spent 218.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 94 [2018-10-10 14:59:49,198 WARN L178 SmtUtils]: Spent 275.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 92 [2018-10-10 14:59:49,755 WARN L178 SmtUtils]: Spent 407.00 ms on a formula simplification. DAG size of input: 122 DAG size of output: 92 [2018-10-10 14:59:50,075 WARN L178 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 82 [2018-10-10 14:59:51,063 WARN L178 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 86 [2018-10-10 14:59:51,691 WARN L178 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2018-10-10 14:59:51,932 WARN L178 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 64 [2018-10-10 14:59:52,232 WARN L178 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 72 [2018-10-10 14:59:52,504 WARN L178 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 71 [2018-10-10 14:59:52,818 WARN L178 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 65 [2018-10-10 14:59:53,537 WARN L178 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 59 [2018-10-10 14:59:55,381 WARN L178 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 71 [2018-10-10 14:59:56,127 WARN L178 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 74 [2018-10-10 14:59:57,243 WARN L178 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 86 [2018-10-10 14:59:58,010 WARN L178 SmtUtils]: Spent 238.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 91 [2018-10-10 14:59:58,466 WARN L178 SmtUtils]: Spent 261.00 ms on a formula simplification. DAG size of input: 141 DAG size of output: 94 [2018-10-10 14:59:58,911 WARN L178 SmtUtils]: Spent 222.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 85 [2018-10-10 14:59:59,246 WARN L178 SmtUtils]: Spent 211.00 ms on a formula simplification. DAG size of input: 123 DAG size of output: 82 [2018-10-10 14:59:59,593 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 70 [2018-10-10 15:00:00,105 WARN L178 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 67 [2018-10-10 15:00:02,657 WARN L178 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 70 [2018-10-10 15:00:04,007 WARN L178 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 65 [2018-10-10 15:00:04,925 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 62 [2018-10-10 15:00:05,560 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 61 [2018-10-10 15:00:05,918 WARN L178 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 58 [2018-10-10 15:00:06,354 WARN L178 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 29 [2018-10-10 15:00:09,431 WARN L178 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 58 [2018-10-10 15:00:09,852 WARN L178 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 55 [2018-10-10 15:00:17,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 15:00:17,615 INFO L93 Difference]: Finished difference Result 1537 states and 1569 transitions. [2018-10-10 15:00:17,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 111 states. [2018-10-10 15:00:17,615 INFO L78 Accepts]: Start accepts. Automaton has 103 states. Word has length 248 [2018-10-10 15:00:17,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 15:00:17,618 INFO L225 Difference]: With dead ends: 1537 [2018-10-10 15:00:17,618 INFO L226 Difference]: Without dead ends: 1537 [2018-10-10 15:00:17,619 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 417 GetRequests, 207 SyntacticMatches, 4 SemanticMatches, 206 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11967 ImplicationChecksByTransitivity, 27.4s TimeCoverageRelationStatistics Valid=4642, Invalid=38414, Unknown=0, NotChecked=0, Total=43056 [2018-10-10 15:00:17,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1537 states. [2018-10-10 15:00:17,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1537 to 859. [2018-10-10 15:00:17,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 859 states. [2018-10-10 15:00:17,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 859 states to 859 states and 887 transitions. [2018-10-10 15:00:17,629 INFO L78 Accepts]: Start accepts. Automaton has 859 states and 887 transitions. Word has length 248 [2018-10-10 15:00:17,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 15:00:17,630 INFO L481 AbstractCegarLoop]: Abstraction has 859 states and 887 transitions. [2018-10-10 15:00:17,630 INFO L482 AbstractCegarLoop]: Interpolant automaton has 103 states. [2018-10-10 15:00:17,630 INFO L276 IsEmpty]: Start isEmpty. Operand 859 states and 887 transitions. [2018-10-10 15:00:17,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2018-10-10 15:00:17,631 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 15:00:17,631 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 15:00:17,632 INFO L424 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 15:00:17,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 15:00:17,632 INFO L82 PathProgramCache]: Analyzing trace with hash -1874335443, now seen corresponding path program 1 times [2018-10-10 15:00:17,632 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 15:00:17,632 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 15:00:17,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:00:17,633 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:00:17,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:00:17,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:00:21,326 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:00:21,327 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 15:00:21,327 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 15:00:21,335 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:00:21,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:00:21,435 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 15:00:21,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 15:00:21,451 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:21,474 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:21,474 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 15:00:21,855 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:21,856 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:21,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 15:00:21,857 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:21,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:21,861 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 15:00:21,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 15:00:21,981 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:21,986 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:21,986 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:13 [2018-10-10 15:00:22,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:00:22,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:00:22,263 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:22,265 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:22,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:00:22,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:00:22,301 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:22,304 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:22,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:22,313 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:37, output treesize:30 [2018-10-10 15:00:22,703 WARN L178 SmtUtils]: Spent 158.00 ms on a formula simplification that was a NOOP. DAG size: 23 [2018-10-10 15:00:23,645 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:23,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-10-10 15:00:23,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:00:23,652 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:23,664 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:23,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 15:00:23,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:00:23,692 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:23,698 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:23,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:23,717 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:66, output treesize:40 [2018-10-10 15:00:24,118 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:24,119 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:24,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 15:00:24,120 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:24,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:24,141 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:58, output treesize:56 [2018-10-10 15:00:24,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 25 [2018-10-10 15:00:24,266 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:24,285 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:24,286 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:59, output treesize:54 [2018-10-10 15:00:25,113 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:25,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-10-10 15:00:25,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:00:25,139 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:25,149 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:25,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 15:00:25,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:00:25,191 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:25,198 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:25,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:25,226 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:84, output treesize:70 [2018-10-10 15:00:26,290 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:26,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 87 treesize of output 88 [2018-10-10 15:00:26,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 95 [2018-10-10 15:00:26,324 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:26,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 40 [2018-10-10 15:00:26,401 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-10 15:00:26,442 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:00:26,495 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:26,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 15:00:26,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:00:26,505 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:26,512 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:26,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 15:00:26,559 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:116, output treesize:121 [2018-10-10 15:00:27,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 73 [2018-10-10 15:00:27,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:00:27,147 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,162 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 137 treesize of output 117 [2018-10-10 15:00:27,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 142 treesize of output 141 [2018-10-10 15:00:27,257 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 77 treesize of output 91 [2018-10-10 15:00:27,396 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-10-10 15:00:27,491 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:00:27,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 71 [2018-10-10 15:00:27,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:00:27,601 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,621 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 114 [2018-10-10 15:00:27,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 15:00:27,631 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,658 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 62 [2018-10-10 15:00:27,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:00:27,756 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,772 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:27,855 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 15:00:27,855 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 11 variables, input treesize:215, output treesize:123 [2018-10-10 15:00:28,150 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:28,150 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:28,151 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:00:28,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-10-10 15:00:28,152 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,162 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:44, output treesize:37 [2018-10-10 15:00:28,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 15:00:28,273 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,285 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,285 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:43, output treesize:37 [2018-10-10 15:00:28,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-10-10 15:00:28,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:00:28,829 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,840 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 15:00:28,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:00:28,864 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,870 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,885 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:28,886 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:59, output treesize:37 [2018-10-10 15:00:29,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-10 15:00:29,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-10 15:00:29,186 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:29,191 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:29,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 15:00:29,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-10 15:00:29,201 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:00:29,202 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:29,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:00:29,208 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:9 [2018-10-10 15:00:29,912 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:00:29,934 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 15:00:29,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 56] total 113 [2018-10-10 15:00:29,950 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_43.bpl [2018-10-10 15:00:29,952 INFO L460 AbstractCegarLoop]: Interpolant automaton has 114 states [2018-10-10 15:00:29,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2018-10-10 15:00:29,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=464, Invalid=12418, Unknown=0, NotChecked=0, Total=12882 [2018-10-10 15:00:29,953 INFO L87 Difference]: Start difference. First operand 859 states and 887 transitions. Second operand 114 states. [2018-10-10 15:00:32,698 WARN L178 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 54 [2018-10-10 15:00:32,989 WARN L178 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 58 [2018-10-10 15:00:33,490 WARN L178 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 62 [2018-10-10 15:00:33,817 WARN L178 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 64 [2018-10-10 15:00:34,166 WARN L178 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 66 [2018-10-10 15:00:34,464 WARN L178 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 64 [2018-10-10 15:00:34,900 WARN L178 SmtUtils]: Spent 225.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 74 [2018-10-10 15:00:35,337 WARN L178 SmtUtils]: Spent 252.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 76 [2018-10-10 15:00:35,789 WARN L178 SmtUtils]: Spent 259.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 77 [2018-10-10 15:00:36,480 WARN L178 SmtUtils]: Spent 321.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 87 [2018-10-10 15:00:36,976 WARN L178 SmtUtils]: Spent 278.00 ms on a formula simplification. DAG size of input: 162 DAG size of output: 79 [2018-10-10 15:00:37,440 WARN L178 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 59 [2018-10-10 15:00:37,865 WARN L178 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 65 [2018-10-10 15:00:38,324 WARN L178 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 141 DAG size of output: 70 [2018-10-10 15:00:38,677 WARN L178 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 128 DAG size of output: 63 [2018-10-10 15:00:39,835 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 52 [2018-10-10 15:00:40,123 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 60 [2018-10-10 15:00:40,492 WARN L178 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 71 [2018-10-10 15:00:40,902 WARN L178 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 73 [2018-10-10 15:00:41,350 WARN L178 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 74 [2018-10-10 15:00:41,683 WARN L178 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 61 [2018-10-10 15:00:42,076 WARN L178 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 75 [2018-10-10 15:00:42,488 WARN L178 SmtUtils]: Spent 260.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 82 [2018-10-10 15:00:43,116 WARN L178 SmtUtils]: Spent 280.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 84 [2018-10-10 15:00:43,597 WARN L178 SmtUtils]: Spent 310.00 ms on a formula simplification. DAG size of input: 138 DAG size of output: 88 [2018-10-10 15:00:44,054 WARN L178 SmtUtils]: Spent 252.00 ms on a formula simplification. DAG size of input: 120 DAG size of output: 92 [2018-10-10 15:00:44,432 WARN L178 SmtUtils]: Spent 234.00 ms on a formula simplification. DAG size of input: 114 DAG size of output: 88 [2018-10-10 15:00:45,253 WARN L178 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 82 [2018-10-10 15:00:45,650 WARN L178 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 81 [2018-10-10 15:00:46,417 WARN L178 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 76 [2018-10-10 15:00:46,921 WARN L178 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 92 [2018-10-10 15:00:47,574 WARN L178 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 68 [2018-10-10 15:00:48,025 WARN L178 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 81 [2018-10-10 15:00:48,409 WARN L178 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 85 [2018-10-10 15:00:48,877 WARN L178 SmtUtils]: Spent 229.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 86 [2018-10-10 15:00:49,301 WARN L178 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 87 [2018-10-10 15:00:49,655 WARN L178 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 78 [2018-10-10 15:00:51,558 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 63 [2018-10-10 15:00:51,842 WARN L178 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 65 [2018-10-10 15:00:52,154 WARN L178 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 65 [2018-10-10 15:00:55,028 WARN L178 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 63 [2018-10-10 15:00:56,567 WARN L178 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 74 [2018-10-10 15:00:57,362 WARN L178 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 79 [2018-10-10 15:00:57,758 WARN L178 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 84 [2018-10-10 15:00:58,144 WARN L178 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 78 [2018-10-10 15:00:58,405 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 73 [2018-10-10 15:00:58,742 WARN L178 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 81 [2018-10-10 15:00:59,284 WARN L178 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 61 [2018-10-10 15:01:01,873 WARN L178 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 62 [2018-10-10 15:01:03,083 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 57 [2018-10-10 15:01:03,358 WARN L178 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 64 [2018-10-10 15:01:07,572 WARN L178 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 58 [2018-10-10 15:01:08,715 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 50 [2018-10-10 15:01:09,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 15:01:09,535 INFO L93 Difference]: Finished difference Result 1249 states and 1276 transitions. [2018-10-10 15:01:09,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-10-10 15:01:09,535 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 249 [2018-10-10 15:01:09,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 15:01:09,538 INFO L225 Difference]: With dead ends: 1249 [2018-10-10 15:01:09,538 INFO L226 Difference]: Without dead ends: 1249 [2018-10-10 15:01:09,540 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 202 SyntacticMatches, 3 SemanticMatches, 203 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10829 ImplicationChecksByTransitivity, 30.3s TimeCoverageRelationStatistics Valid=3703, Invalid=38117, Unknown=0, NotChecked=0, Total=41820 [2018-10-10 15:01:09,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2018-10-10 15:01:09,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 860. [2018-10-10 15:01:09,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 860 states. [2018-10-10 15:01:09,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 860 states to 860 states and 888 transitions. [2018-10-10 15:01:09,549 INFO L78 Accepts]: Start accepts. Automaton has 860 states and 888 transitions. Word has length 249 [2018-10-10 15:01:09,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 15:01:09,550 INFO L481 AbstractCegarLoop]: Abstraction has 860 states and 888 transitions. [2018-10-10 15:01:09,550 INFO L482 AbstractCegarLoop]: Interpolant automaton has 114 states. [2018-10-10 15:01:09,550 INFO L276 IsEmpty]: Start isEmpty. Operand 860 states and 888 transitions. [2018-10-10 15:01:09,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2018-10-10 15:01:09,551 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 15:01:09,551 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 15:01:09,552 INFO L424 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 15:01:09,552 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 15:01:09,552 INFO L82 PathProgramCache]: Analyzing trace with hash -1041432008, now seen corresponding path program 1 times [2018-10-10 15:01:09,552 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 15:01:09,553 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 15:01:09,553 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:01:09,553 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:01:09,553 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:01:09,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:01:11,229 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:01:11,229 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 15:01:11,229 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 15:01:11,239 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:01:11,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:01:11,332 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 15:01:11,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 15:01:11,349 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,372 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 15:01:11,528 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:11,529 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:11,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 15:01:11,529 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,539 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,539 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 15:01:11,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:01:11,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:11,722 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,728 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:01:11,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:11,745 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,746 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,757 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:11,757 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:32 [2018-10-10 15:01:12,124 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:12,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 15:01:12,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:12,133 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,143 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 15:01:12,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:12,169 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,174 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,188 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,189 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:58, output treesize:32 [2018-10-10 15:01:12,295 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:12,296 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:12,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 15:01:12,296 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,306 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,306 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:41, output treesize:35 [2018-10-10 15:01:12,551 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:12,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 15:01:12,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:12,559 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,567 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 15:01:12,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:12,588 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,594 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,606 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:12,607 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:57, output treesize:35 [2018-10-10 15:01:13,137 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:13,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 64 [2018-10-10 15:01:13,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 59 [2018-10-10 15:01:13,163 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:13,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 38 [2018-10-10 15:01:13,258 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:13,293 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:13,328 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:13,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 15:01:13,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:13,335 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:13,340 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:13,372 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 15:01:13,373 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:69, output treesize:67 [2018-10-10 15:01:13,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 63 [2018-10-10 15:01:13,730 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:13,730 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:13,741 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:13,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 90 treesize of output 82 [2018-10-10 15:01:13,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 94 [2018-10-10 15:01:13,810 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:13,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 70 [2018-10-10 15:01:13,885 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:13,934 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:13,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2018-10-10 15:01:13,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:13,998 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,007 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 67 [2018-10-10 15:01:14,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 15:01:14,066 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,077 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 50 [2018-10-10 15:01:14,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:14,087 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,099 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 15:01:14,141 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 11 variables, input treesize:153, output treesize:61 [2018-10-10 15:01:14,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-10-10 15:01:14,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 19 [2018-10-10 15:01:14,634 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:14,641 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:14,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:14,651 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:31 [2018-10-10 15:01:14,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-10-10 15:01:14,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 15:01:14,846 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:14,861 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:14,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22 [2018-10-10 15:01:14,900 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:14,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 15:01:14,902 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,909 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:14,940 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-10 15:01:14,941 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:57, output treesize:45 [2018-10-10 15:01:15,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 15:01:15,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:01:15,256 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:15,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:15,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:15,266 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:22 [2018-10-10 15:01:15,929 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:01:15,952 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 15:01:15,952 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 53] total 86 [2018-10-10 15:01:15,965 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_44.bpl [2018-10-10 15:01:15,966 INFO L460 AbstractCegarLoop]: Interpolant automaton has 87 states [2018-10-10 15:01:15,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2018-10-10 15:01:15,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=7201, Unknown=0, NotChecked=0, Total=7482 [2018-10-10 15:01:15,967 INFO L87 Difference]: Start difference. First operand 860 states and 888 transitions. Second operand 87 states. [2018-10-10 15:01:18,087 WARN L178 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 55 [2018-10-10 15:01:18,507 WARN L178 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 59 [2018-10-10 15:01:18,794 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 61 [2018-10-10 15:01:19,068 WARN L178 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 63 [2018-10-10 15:01:19,305 WARN L178 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 61 [2018-10-10 15:01:19,782 WARN L178 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 69 [2018-10-10 15:01:20,037 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 60 [2018-10-10 15:01:20,561 WARN L178 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 54 [2018-10-10 15:01:20,978 WARN L178 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 58 [2018-10-10 15:01:21,244 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 61 [2018-10-10 15:01:21,564 WARN L178 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 67 [2018-10-10 15:01:21,839 WARN L178 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 69 [2018-10-10 15:01:22,157 WARN L178 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 71 [2018-10-10 15:01:22,513 WARN L178 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 74 [2018-10-10 15:01:22,731 WARN L178 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 58 [2018-10-10 15:01:22,969 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 63 [2018-10-10 15:01:23,298 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 54 [2018-10-10 15:01:23,561 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 67 [2018-10-10 15:01:23,835 WARN L178 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 112 DAG size of output: 74 [2018-10-10 15:01:24,163 WARN L178 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 72 [2018-10-10 15:01:24,441 WARN L178 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 80 [2018-10-10 15:01:24,726 WARN L178 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 84 [2018-10-10 15:01:25,043 WARN L178 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 88 [2018-10-10 15:01:25,309 WARN L178 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 84 [2018-10-10 15:01:25,772 WARN L178 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 83 [2018-10-10 15:01:26,047 WARN L178 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 82 [2018-10-10 15:01:26,628 WARN L178 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 73 [2018-10-10 15:01:26,984 WARN L178 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 82 [2018-10-10 15:01:27,483 WARN L178 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 62 [2018-10-10 15:01:27,788 WARN L178 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 73 [2018-10-10 15:01:28,102 WARN L178 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 80 [2018-10-10 15:01:28,412 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 64 [2018-10-10 15:01:28,755 WARN L178 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 87 [2018-10-10 15:01:28,978 WARN L178 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 61 [2018-10-10 15:01:29,283 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 64 [2018-10-10 15:01:29,648 WARN L178 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 92 [2018-10-10 15:01:29,936 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 69 [2018-10-10 15:01:30,232 WARN L178 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 71 [2018-10-10 15:01:30,745 WARN L178 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 95 [2018-10-10 15:01:31,167 WARN L178 SmtUtils]: Spent 228.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 97 [2018-10-10 15:01:31,561 WARN L178 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 99 [2018-10-10 15:01:32,092 WARN L178 SmtUtils]: Spent 226.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 97 [2018-10-10 15:01:32,392 WARN L178 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 82 [2018-10-10 15:01:32,901 WARN L178 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 83 [2018-10-10 15:01:33,501 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 55 [2018-10-10 15:01:33,762 WARN L178 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 59 [2018-10-10 15:01:35,120 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 53 [2018-10-10 15:01:35,377 WARN L178 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 55 [2018-10-10 15:01:45,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 15:01:45,334 INFO L93 Difference]: Finished difference Result 1201 states and 1226 transitions. [2018-10-10 15:01:45,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 115 states. [2018-10-10 15:01:45,335 INFO L78 Accepts]: Start accepts. Automaton has 87 states. Word has length 251 [2018-10-10 15:01:45,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 15:01:45,336 INFO L225 Difference]: With dead ends: 1201 [2018-10-10 15:01:45,337 INFO L226 Difference]: Without dead ends: 1201 [2018-10-10 15:01:45,339 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 206 SyntacticMatches, 9 SemanticMatches, 193 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10263 ImplicationChecksByTransitivity, 22.1s TimeCoverageRelationStatistics Valid=3802, Invalid=34028, Unknown=0, NotChecked=0, Total=37830 [2018-10-10 15:01:45,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1201 states. [2018-10-10 15:01:45,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1201 to 868. [2018-10-10 15:01:45,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 868 states. [2018-10-10 15:01:45,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 868 states to 868 states and 896 transitions. [2018-10-10 15:01:45,346 INFO L78 Accepts]: Start accepts. Automaton has 868 states and 896 transitions. Word has length 251 [2018-10-10 15:01:45,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 15:01:45,347 INFO L481 AbstractCegarLoop]: Abstraction has 868 states and 896 transitions. [2018-10-10 15:01:45,347 INFO L482 AbstractCegarLoop]: Interpolant automaton has 87 states. [2018-10-10 15:01:45,347 INFO L276 IsEmpty]: Start isEmpty. Operand 868 states and 896 transitions. [2018-10-10 15:01:45,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-10-10 15:01:45,348 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 15:01:45,348 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 15:01:45,349 INFO L424 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 15:01:45,349 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 15:01:45,349 INFO L82 PathProgramCache]: Analyzing trace with hash -1137075227, now seen corresponding path program 1 times [2018-10-10 15:01:45,349 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 15:01:45,350 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 15:01:45,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:01:45,351 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:01:45,351 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:01:45,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:01:46,890 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:01:46,890 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 15:01:46,890 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 15:01:46,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:01:46,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:01:46,992 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 15:01:47,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 15:01:47,008 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,016 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 15:01:47,069 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:47,070 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:47,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 15:01:47,070 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,074 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 15:01:47,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:01:47,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:47,256 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,258 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:01:47,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:47,273 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,276 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,287 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,288 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:32 [2018-10-10 15:01:47,661 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:47,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 15:01:47,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:47,669 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,679 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 15:01:47,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:47,703 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,710 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:47,724 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:58, output treesize:32 [2018-10-10 15:01:47,871 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:47,892 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:47,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 15:01:47,893 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:48,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:48,036 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:41, output treesize:35 [2018-10-10 15:01:48,325 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:48,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-10-10 15:01:48,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:48,332 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:48,343 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:48,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 15:01:48,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:48,367 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:48,373 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:48,387 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:48,388 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:57, output treesize:35 [2018-10-10 15:01:48,976 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:49,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 64 [2018-10-10 15:01:49,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 46 [2018-10-10 15:01:49,015 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:49,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 39 [2018-10-10 15:01:49,074 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,106 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:49,142 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:49,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 15:01:49,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:01:49,150 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,157 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 15:01:49,192 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:69, output treesize:67 [2018-10-10 15:01:49,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 55 [2018-10-10 15:01:49,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:49,534 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,549 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2018-10-10 15:01:49,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:49,591 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,600 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 90 treesize of output 82 [2018-10-10 15:01:49,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 94 [2018-10-10 15:01:49,667 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 70 [2018-10-10 15:01:49,749 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:49,797 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:49,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 67 [2018-10-10 15:01:49,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 15:01:49,860 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,874 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 50 [2018-10-10 15:01:49,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 15:01:49,887 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,898 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:49,941 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 15:01:49,942 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 11 variables, input treesize:153, output treesize:61 [2018-10-10 15:01:50,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-10-10 15:01:50,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 19 [2018-10-10 15:01:50,453 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:50,460 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:50,470 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:50,470 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:31 [2018-10-10 15:01:50,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22 [2018-10-10 15:01:50,653 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:01:50,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 15:01:50,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:01:50,660 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:01:50,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-10-10 15:01:50,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 23 [2018-10-10 15:01:50,694 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:50,710 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:50,739 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-10 15:01:50,739 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:57, output treesize:45 [2018-10-10 15:01:51,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 15:01:51,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:01:51,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 15:01:51,079 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:51,086 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:01:51,087 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:22 [2018-10-10 15:01:51,542 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:01:51,561 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 15:01:51,562 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 51] total 83 [2018-10-10 15:01:51,574 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-buckets_true-unreach-call_true-valid-memsafety.i_45.bpl [2018-10-10 15:01:51,575 INFO L460 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-10-10 15:01:51,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-10-10 15:01:51,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=6667, Unknown=0, NotChecked=0, Total=6972 [2018-10-10 15:01:51,576 INFO L87 Difference]: Start difference. First operand 868 states and 896 transitions. Second operand 84 states. [2018-10-10 15:01:53,454 WARN L178 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 55 [2018-10-10 15:01:53,867 WARN L178 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 59 [2018-10-10 15:01:54,150 WARN L178 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 61 [2018-10-10 15:01:54,427 WARN L178 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 63 [2018-10-10 15:01:54,676 WARN L178 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 61 [2018-10-10 15:01:55,159 WARN L178 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 69 [2018-10-10 15:01:55,428 WARN L178 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 60 [2018-10-10 15:01:55,938 WARN L178 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 54 [2018-10-10 15:01:56,361 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 58 [2018-10-10 15:01:56,617 WARN L178 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 62 [2018-10-10 15:01:56,926 WARN L178 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 68 [2018-10-10 15:01:57,201 WARN L178 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 70 [2018-10-10 15:01:57,517 WARN L178 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 72 [2018-10-10 15:01:57,883 WARN L178 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 75 [2018-10-10 15:01:58,118 WARN L178 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 59 [2018-10-10 15:01:58,378 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 64 [2018-10-10 15:01:58,673 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 54 [2018-10-10 15:01:58,936 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 67 [2018-10-10 15:01:59,209 WARN L178 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 112 DAG size of output: 74 [2018-10-10 15:01:59,536 WARN L178 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 72 [2018-10-10 15:01:59,803 WARN L178 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 80 [2018-10-10 15:02:00,100 WARN L178 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 84 [2018-10-10 15:02:00,419 WARN L178 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 88 [2018-10-10 15:02:00,695 WARN L178 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 84 [2018-10-10 15:02:01,181 WARN L178 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 83 [2018-10-10 15:02:01,474 WARN L178 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 82 [2018-10-10 15:02:02,062 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 73 [2018-10-10 15:02:02,446 WARN L178 SmtUtils]: Spent 224.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 82 [2018-10-10 15:02:02,921 WARN L178 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 62 [2018-10-10 15:02:03,239 WARN L178 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 73 [2018-10-10 15:02:03,566 WARN L178 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 80 [2018-10-10 15:02:03,890 WARN L178 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 64 [2018-10-10 15:02:04,217 WARN L178 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 85 [2018-10-10 15:02:04,455 WARN L178 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 61 [2018-10-10 15:02:04,762 WARN L178 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 65 [2018-10-10 15:02:05,084 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 70 [2018-10-10 15:02:05,381 WARN L178 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 72 [2018-10-10 15:02:05,730 WARN L178 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 74 [2018-10-10 15:02:06,124 WARN L178 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 88 [2018-10-10 15:02:06,533 WARN L178 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 90 [2018-10-10 15:02:06,892 WARN L178 SmtUtils]: Spent 215.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 92 [2018-10-10 15:02:07,405 WARN L178 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 90 [2018-10-10 15:02:07,672 WARN L178 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 75 [2018-10-10 15:02:08,146 WARN L178 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 73 [2018-10-10 15:02:13,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 15:02:13,923 INFO L93 Difference]: Finished difference Result 1110 states and 1132 transitions. [2018-10-10 15:02:13,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2018-10-10 15:02:13,924 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 260 [2018-10-10 15:02:13,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 15:02:13,926 INFO L225 Difference]: With dead ends: 1110 [2018-10-10 15:02:13,926 INFO L226 Difference]: Without dead ends: 1110 [2018-10-10 15:02:13,927 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 394 GetRequests, 218 SyntacticMatches, 6 SemanticMatches, 170 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7291 ImplicationChecksByTransitivity, 19.1s TimeCoverageRelationStatistics Valid=3331, Invalid=26081, Unknown=0, NotChecked=0, Total=29412 [2018-10-10 15:02:13,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1110 states. [2018-10-10 15:02:13,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1110 to 867. [2018-10-10 15:02:13,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 867 states. [2018-10-10 15:02:13,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 867 states to 867 states and 895 transitions. [2018-10-10 15:02:13,933 INFO L78 Accepts]: Start accepts. Automaton has 867 states and 895 transitions. Word has length 260 [2018-10-10 15:02:13,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 15:02:13,933 INFO L481 AbstractCegarLoop]: Abstraction has 867 states and 895 transitions. [2018-10-10 15:02:13,933 INFO L482 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-10-10 15:02:13,933 INFO L276 IsEmpty]: Start isEmpty. Operand 867 states and 895 transitions. [2018-10-10 15:02:13,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-10-10 15:02:13,935 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 15:02:13,935 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 15:02:13,935 INFO L424 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 15:02:13,935 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 15:02:13,936 INFO L82 PathProgramCache]: Analyzing trace with hash -889592994, now seen corresponding path program 1 times [2018-10-10 15:02:13,936 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 15:02:13,936 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 15:02:13,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:13,936 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:02:13,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:13,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:02:14,250 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-10 15:02:14,251 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 15:02:14,251 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 15:02:14,251 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 15:02:14,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 15:02:14,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 15:02:14,251 INFO L87 Difference]: Start difference. First operand 867 states and 895 transitions. Second operand 6 states. [2018-10-10 15:02:14,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 15:02:14,600 INFO L93 Difference]: Finished difference Result 1034 states and 1067 transitions. [2018-10-10 15:02:14,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 15:02:14,602 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 261 [2018-10-10 15:02:14,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 15:02:14,604 INFO L225 Difference]: With dead ends: 1034 [2018-10-10 15:02:14,604 INFO L226 Difference]: Without dead ends: 1034 [2018-10-10 15:02:14,604 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-10 15:02:14,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1034 states. [2018-10-10 15:02:14,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1034 to 870. [2018-10-10 15:02:14,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 870 states. [2018-10-10 15:02:14,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 870 states to 870 states and 900 transitions. [2018-10-10 15:02:14,611 INFO L78 Accepts]: Start accepts. Automaton has 870 states and 900 transitions. Word has length 261 [2018-10-10 15:02:14,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 15:02:14,611 INFO L481 AbstractCegarLoop]: Abstraction has 870 states and 900 transitions. [2018-10-10 15:02:14,611 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 15:02:14,611 INFO L276 IsEmpty]: Start isEmpty. Operand 870 states and 900 transitions. [2018-10-10 15:02:14,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2018-10-10 15:02:14,613 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 15:02:14,613 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 15:02:14,613 INFO L424 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 15:02:14,613 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 15:02:14,614 INFO L82 PathProgramCache]: Analyzing trace with hash -359996287, now seen corresponding path program 1 times [2018-10-10 15:02:14,614 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 15:02:14,614 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 15:02:14,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:14,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:02:14,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:14,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:02:17,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:02:17,842 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 15:02:17,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [51] imperfect sequences [] total 51 [2018-10-10 15:02:17,842 INFO L460 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-10-10 15:02:17,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-10-10 15:02:17,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=242, Invalid=2308, Unknown=0, NotChecked=0, Total=2550 [2018-10-10 15:02:17,843 INFO L87 Difference]: Start difference. First operand 870 states and 900 transitions. Second operand 51 states. [2018-10-10 15:02:25,051 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 67 [2018-10-10 15:02:25,916 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 59 [2018-10-10 15:02:26,578 WARN L178 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 66 [2018-10-10 15:02:26,991 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 75 [2018-10-10 15:02:27,232 WARN L178 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 62 [2018-10-10 15:02:27,749 WARN L178 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 66 [2018-10-10 15:02:28,130 WARN L178 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 72 [2018-10-10 15:02:28,289 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 54 [2018-10-10 15:02:28,513 WARN L178 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 76 [2018-10-10 15:02:28,727 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 68 [2018-10-10 15:02:31,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 15:02:31,565 INFO L93 Difference]: Finished difference Result 1156 states and 1187 transitions. [2018-10-10 15:02:31,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 75 states. [2018-10-10 15:02:31,565 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 263 [2018-10-10 15:02:31,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 15:02:31,571 INFO L225 Difference]: With dead ends: 1156 [2018-10-10 15:02:31,571 INFO L226 Difference]: Without dead ends: 1156 [2018-10-10 15:02:31,571 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 7 SyntacticMatches, 6 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3731 ImplicationChecksByTransitivity, 9.5s TimeCoverageRelationStatistics Valid=1967, Invalid=12313, Unknown=0, NotChecked=0, Total=14280 [2018-10-10 15:02:31,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1156 states. [2018-10-10 15:02:31,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1156 to 886. [2018-10-10 15:02:31,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 886 states. [2018-10-10 15:02:31,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 886 states to 886 states and 916 transitions. [2018-10-10 15:02:31,582 INFO L78 Accepts]: Start accepts. Automaton has 886 states and 916 transitions. Word has length 263 [2018-10-10 15:02:31,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 15:02:31,582 INFO L481 AbstractCegarLoop]: Abstraction has 886 states and 916 transitions. [2018-10-10 15:02:31,582 INFO L482 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-10-10 15:02:31,582 INFO L276 IsEmpty]: Start isEmpty. Operand 886 states and 916 transitions. [2018-10-10 15:02:31,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2018-10-10 15:02:31,584 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 15:02:31,584 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 15:02:31,584 INFO L424 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 15:02:31,585 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 15:02:31,585 INFO L82 PathProgramCache]: Analyzing trace with hash 2073427258, now seen corresponding path program 1 times [2018-10-10 15:02:31,585 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 15:02:31,585 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 15:02:31,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:31,586 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:02:31,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:31,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:02:31,999 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-10 15:02:32,000 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 15:02:32,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 15:02:32,000 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 15:02:32,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 15:02:32,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 15:02:32,001 INFO L87 Difference]: Start difference. First operand 886 states and 916 transitions. Second operand 6 states. [2018-10-10 15:02:33,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 15:02:33,013 INFO L93 Difference]: Finished difference Result 903 states and 932 transitions. [2018-10-10 15:02:33,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 15:02:33,014 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 271 [2018-10-10 15:02:33,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 15:02:33,016 INFO L225 Difference]: With dead ends: 903 [2018-10-10 15:02:33,016 INFO L226 Difference]: Without dead ends: 903 [2018-10-10 15:02:33,016 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-10 15:02:33,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 903 states. [2018-10-10 15:02:33,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 903 to 884. [2018-10-10 15:02:33,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 884 states. [2018-10-10 15:02:33,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 884 states to 884 states and 914 transitions. [2018-10-10 15:02:33,023 INFO L78 Accepts]: Start accepts. Automaton has 884 states and 914 transitions. Word has length 271 [2018-10-10 15:02:33,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 15:02:33,023 INFO L481 AbstractCegarLoop]: Abstraction has 884 states and 914 transitions. [2018-10-10 15:02:33,023 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 15:02:33,024 INFO L276 IsEmpty]: Start isEmpty. Operand 884 states and 914 transitions. [2018-10-10 15:02:33,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2018-10-10 15:02:33,025 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 15:02:33,025 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 15:02:33,025 INFO L424 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr63ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 15:02:33,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 15:02:33,025 INFO L82 PathProgramCache]: Analyzing trace with hash -1040039472, now seen corresponding path program 2 times [2018-10-10 15:02:33,025 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 15:02:33,025 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 15:02:33,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:33,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 15:02:33,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 15:02:33,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 15:02:35,946 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:02:35,947 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 15:02:35,947 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 15:02:35,954 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-10 15:02:36,105 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-10 15:02:36,106 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-10 15:02:36,115 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 15:02:36,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 15:02:36,145 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,158 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,158 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 15:02:36,181 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:36,182 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:36,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 15:02:36,182 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,185 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-10-10 15:02:36,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:02:36,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:02:36,206 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 15:02:36,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:02:36,221 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,223 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,230 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:30, output treesize:19 [2018-10-10 15:02:36,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 15:02:36,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2018-10-10 15:02:36,411 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,414 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,423 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,424 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:27 [2018-10-10 15:02:36,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 15:02:36,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:02:36,566 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,571 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,585 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-10-10 15:02:36,610 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:36,611 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:36,612 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:36,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-10-10 15:02:36,613 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,625 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,625 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:33, output treesize:26 [2018-10-10 15:02:36,693 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:36,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 41 [2018-10-10 15:02:36,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-10-10 15:02:36,697 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:36,720 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:57, output treesize:42 [2018-10-10 15:02:37,198 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,199 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,200 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,202 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 79 [2018-10-10 15:02:37,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 15:02:37,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,226 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,239 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:66, output treesize:47 [2018-10-10 15:02:37,367 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,372 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 67 [2018-10-10 15:02:37,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 15:02:37,378 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,390 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,400 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:71, output treesize:44 [2018-10-10 15:02:37,676 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,677 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,679 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 65 [2018-10-10 15:02:37,685 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:37,700 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 70 treesize of output 101 [2018-10-10 15:02:37,701 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 15:02:37,727 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,738 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 15:02:37,738 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:57, output treesize:44 [2018-10-10 15:02:38,347 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:38,348 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:38,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-10-10 15:02:38,382 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 39 treesize of output 68 [2018-10-10 15:02:38,385 INFO L267 ElimStorePlain]: Start of recursive call 3: 4 dim-0 vars, End of recursive call: 4 dim-0 vars, and 7 xjuncts. [2018-10-10 15:02:38,426 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:02:38,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-10 15:02:38,452 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:61, output treesize:58 [2018-10-10 15:02:38,769 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:38,770 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 15:02:38,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 41 [2018-10-10 15:02:38,777 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 25 [2018-10-10 15:02:38,778 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 15:02:38,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2018-10-10 15:02:38,791 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-10 15:02:38,796 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:02:38,810 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 15:02:38,810 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:78, output treesize:9 [2018-10-10 15:02:39,242 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 15:02:39,262 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 15:02:39,263 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 52] total 79 [2018-10-10 15:02:39,264 WARN L550 AbstractCegarLoop]: Verification canceled [2018-10-10 15:02:39,268 WARN L205 ceAbstractionStarter]: Timeout [2018-10-10 15:02:39,269 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.10 03:02:39 BoogieIcfgContainer [2018-10-10 15:02:39,269 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-10 15:02:39,269 INFO L168 Benchmark]: Toolchain (without parser) took 446469.66 ms. Allocated memory was 1.5 GB in the beginning and 2.1 GB in the end (delta: 506.5 MB). Free memory was 1.4 GB in the beginning and 1.8 GB in the end (delta: -387.4 MB). Peak memory consumption was 426.6 MB. Max. memory is 7.1 GB. [2018-10-10 15:02:39,270 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-10 15:02:39,270 INFO L168 Benchmark]: CACSL2BoogieTranslator took 607.40 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 7.1 GB. [2018-10-10 15:02:39,270 INFO L168 Benchmark]: Boogie Procedure Inliner took 108.79 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-10-10 15:02:39,270 INFO L168 Benchmark]: Boogie Preprocessor took 169.94 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 755.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -835.1 MB). Peak memory consumption was 17.6 MB. Max. memory is 7.1 GB. [2018-10-10 15:02:39,270 INFO L168 Benchmark]: RCFGBuilder took 2164.23 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 2.1 GB in the end (delta: 90.4 MB). Peak memory consumption was 90.4 MB. Max. memory is 7.1 GB. [2018-10-10 15:02:39,270 INFO L168 Benchmark]: TraceAbstraction took 443414.43 ms. Allocated memory was 2.3 GB in the beginning and 2.1 GB in the end (delta: -249.0 MB). Free memory was 2.1 GB in the beginning and 1.8 GB in the end (delta: 325.6 MB). Peak memory consumption was 384.1 MB. Max. memory is 7.1 GB. [2018-10-10 15:02:39,271 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 607.40 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 108.79 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 169.94 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 755.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -835.1 MB). Peak memory consumption was 17.6 MB. Max. memory is 7.1 GB. * RCFGBuilder took 2164.23 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 2.1 GB in the end (delta: 90.4 MB). Peak memory consumption was 90.4 MB. Max. memory is 7.1 GB. * TraceAbstraction took 443414.43 ms. Allocated memory was 2.3 GB in the beginning and 2.1 GB in the end (delta: -249.0 MB). Free memory was 2.1 GB in the beginning and 1.8 GB in the end (delta: 325.6 MB). Peak memory consumption was 384.1 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: 1051]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1051). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: 1056]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1056). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: 1056]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1056). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: 1051]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1051). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: 990]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 990). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 49). - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 523 locations, 65 error locations. TIMEOUT Result, 443.3s OverallTime, 49 OverallIterations, 3 TraceHistogramMax, 340.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 20225 SDtfs, 140867 SDslu, 218774 SDs, 0 SdLazy, 160271 SolverSat, 5605 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 139.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 4107 GetRequests, 1673 SyntacticMatches, 74 SemanticMatches, 2360 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81999 ImplicationChecksByTransitivity, 251.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=886occurred in iteration=47, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 48 MinimizatonAttempts, 9668 StatesRemovedByMinimization, 47 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.1s SatisfiabilityAnalysisTime, 91.0s InterpolantComputationTime, 9750 NumberOfCodeBlocks, 9750 NumberOfCodeBlocksAsserted, 56 NumberOfCheckSat, 9694 ConstructedInterpolants, 378 QuantifiedInterpolants, 30600756 SizeOfPredicates, 714 NumberOfNonLiveVariables, 4464 ConjunctsInSsa, 1072 ConjunctsInUnsatCore, 56 InterpolantComputations, 40 PerfectInterpolantSequences, 90/340 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Received shutdown request...