java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --traceabstraction.dump.automata.to.the.following.directory dump --rcfgbuilder.size.of.a.code.block SingleStatement --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/forester-heap/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c5b1954-m [2018-10-10 14:54:33,193 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-10 14:54:33,196 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-10 14:54:33,213 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-10 14:54:33,213 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-10 14:54:33,215 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-10 14:54:33,217 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-10 14:54:33,219 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-10 14:54:33,223 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-10 14:54:33,225 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-10 14:54:33,228 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-10 14:54:33,229 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-10 14:54:33,230 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-10 14:54:33,233 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-10 14:54:33,240 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-10 14:54:33,244 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-10 14:54:33,245 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-10 14:54:33,248 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-10 14:54:33,251 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-10 14:54:33,252 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-10 14:54:33,255 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-10 14:54:33,256 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-10 14:54:33,258 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-10 14:54:33,261 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-10 14:54:33,261 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-10 14:54:33,262 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-10 14:54:33,263 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-10 14:54:33,265 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-10 14:54:33,266 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-10 14:54:33,269 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-10 14:54:33,269 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-10 14:54:33,271 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-10 14:54:33,271 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-10 14:54:33,271 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-10 14:54:33,272 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-10 14:54:33,273 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-10 14:54:33,274 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-10-10 14:54:33,300 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-10 14:54:33,301 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-10 14:54:33,302 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-10 14:54:33,302 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-10 14:54:33,302 INFO L133 SettingsManager]: * Use SBE=true [2018-10-10 14:54:33,303 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-10 14:54:33,303 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-10 14:54:33,303 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-10 14:54:33,303 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-10 14:54:33,303 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-10 14:54:33,304 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-10 14:54:33,304 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-10 14:54:33,304 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-10 14:54:33,304 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-10 14:54:33,304 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-10 14:54:33,305 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-10 14:54:33,305 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-10 14:54:33,305 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-10 14:54:33,305 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-10 14:54:33,305 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-10 14:54:33,306 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 14:54:33,306 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-10 14:54:33,306 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-10 14:54:33,306 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-10-10 14:54:33,306 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-10 14:54:33,307 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Dump automata to the following directory -> dump Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> SingleStatement Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-10-10 14:54:33,361 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-10 14:54:33,374 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-10 14:54:33,381 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-10 14:54:33,383 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-10 14:54:33,383 INFO L276 PluginConnector]: CDTParser initialized [2018-10-10 14:54:33,384 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/forester-heap/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-10-10 14:54:33,734 INFO L217 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7ec63303f/4c6e7e29a13e46c8b4ef193ab6dcfa4c/FLAG0ee43dcf4 [2018-10-10 14:54:34,025 INFO L289 CDTParser]: Found 1 translation units. [2018-10-10 14:54:34,026 INFO L157 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/forester-heap/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-10-10 14:54:34,040 INFO L337 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7ec63303f/4c6e7e29a13e46c8b4ef193ab6dcfa4c/FLAG0ee43dcf4 [2018-10-10 14:54:34,056 INFO L345 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7ec63303f/4c6e7e29a13e46c8b4ef193ab6dcfa4c [2018-10-10 14:54:34,068 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-10 14:54:34,069 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-10-10 14:54:34,071 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-10 14:54:34,071 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-10 14:54:34,075 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-10 14:54:34,076 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,079 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60590a4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34, skipping insertion in model container [2018-10-10 14:54:34,079 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,090 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-10 14:54:34,150 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-10 14:54:34,377 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 14:54:34,388 INFO L189 MainTranslator]: Completed pre-run [2018-10-10 14:54:34,460 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-10 14:54:34,532 INFO L193 MainTranslator]: Completed translation [2018-10-10 14:54:34,533 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34 WrapperNode [2018-10-10 14:54:34,533 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-10 14:54:34,534 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-10 14:54:34,534 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-10 14:54:34,535 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-10 14:54:34,545 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,565 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,612 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-10 14:54:34,612 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-10 14:54:34,612 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-10 14:54:34,612 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-10 14:54:34,621 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,621 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,629 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,629 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,643 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,650 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,738 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... [2018-10-10 14:54:34,749 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-10 14:54:34,753 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-10 14:54:34,753 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-10 14:54:34,753 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-10 14:54:34,755 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-10 14:54:34,812 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-10 14:54:34,813 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-10 14:54:36,565 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-10 14:54:36,566 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 02:54:36 BoogieIcfgContainer [2018-10-10 14:54:36,566 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-10 14:54:36,568 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-10 14:54:36,568 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-10 14:54:36,572 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-10 14:54:36,572 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.10 02:54:34" (1/3) ... [2018-10-10 14:54:36,573 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@67105be6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 02:54:36, skipping insertion in model container [2018-10-10 14:54:36,573 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.10 02:54:34" (2/3) ... [2018-10-10 14:54:36,574 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@67105be6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.10 02:54:36, skipping insertion in model container [2018-10-10 14:54:36,574 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.10 02:54:36" (3/3) ... [2018-10-10 14:54:36,577 INFO L112 eAbstractionObserver]: Analyzing ICFG sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-10-10 14:54:36,591 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-10 14:54:36,603 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 43 error locations. [2018-10-10 14:54:36,621 INFO L257 AbstractCegarLoop]: Starting to check reachability of 43 error locations. [2018-10-10 14:54:36,650 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-10 14:54:36,651 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-10 14:54:36,651 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-10 14:54:36,651 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-10 14:54:36,651 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-10 14:54:36,653 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-10 14:54:36,653 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-10 14:54:36,653 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-10 14:54:36,653 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-10 14:54:36,682 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states. [2018-10-10 14:54:36,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-10 14:54:36,690 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:36,691 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:36,697 INFO L424 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:36,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:36,703 INFO L82 PathProgramCache]: Analyzing trace with hash -218556917, now seen corresponding path program 1 times [2018-10-10 14:54:36,705 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:36,705 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:36,760 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:36,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:36,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:36,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:37,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:37,104 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:37,105 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:54:37,109 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:54:37,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:54:37,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:54:37,128 INFO L87 Difference]: Start difference. First operand 368 states. Second operand 6 states. [2018-10-10 14:54:38,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:38,310 INFO L93 Difference]: Finished difference Result 472 states and 482 transitions. [2018-10-10 14:54:38,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:54:38,312 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-10-10 14:54:38,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:38,331 INFO L225 Difference]: With dead ends: 472 [2018-10-10 14:54:38,331 INFO L226 Difference]: Without dead ends: 458 [2018-10-10 14:54:38,333 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:54:38,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2018-10-10 14:54:38,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 357. [2018-10-10 14:54:38,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 357 states. [2018-10-10 14:54:38,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 363 transitions. [2018-10-10 14:54:38,398 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 363 transitions. Word has length 25 [2018-10-10 14:54:38,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:38,399 INFO L481 AbstractCegarLoop]: Abstraction has 357 states and 363 transitions. [2018-10-10 14:54:38,399 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:54:38,399 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 363 transitions. [2018-10-10 14:54:38,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-10 14:54:38,400 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:38,400 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:38,401 INFO L424 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:38,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:38,402 INFO L82 PathProgramCache]: Analyzing trace with hash 1814670223, now seen corresponding path program 1 times [2018-10-10 14:54:38,402 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:38,402 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:38,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:38,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:38,405 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:38,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:38,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:38,603 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:38,604 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:54:38,605 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:54:38,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:54:38,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:54:38,607 INFO L87 Difference]: Start difference. First operand 357 states and 363 transitions. Second operand 8 states. [2018-10-10 14:54:39,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:39,379 INFO L93 Difference]: Finished difference Result 429 states and 439 transitions. [2018-10-10 14:54:39,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:54:39,379 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-10-10 14:54:39,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:39,384 INFO L225 Difference]: With dead ends: 429 [2018-10-10 14:54:39,384 INFO L226 Difference]: Without dead ends: 429 [2018-10-10 14:54:39,385 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:54:39,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2018-10-10 14:54:39,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 356. [2018-10-10 14:54:39,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 356 states. [2018-10-10 14:54:39,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 362 transitions. [2018-10-10 14:54:39,406 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 362 transitions. Word has length 26 [2018-10-10 14:54:39,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:39,406 INFO L481 AbstractCegarLoop]: Abstraction has 356 states and 362 transitions. [2018-10-10 14:54:39,407 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:54:39,407 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 362 transitions. [2018-10-10 14:54:39,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-10 14:54:39,408 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:39,408 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:39,410 INFO L424 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:39,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:39,410 INFO L82 PathProgramCache]: Analyzing trace with hash 1113026705, now seen corresponding path program 1 times [2018-10-10 14:54:39,411 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:39,411 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:39,413 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:39,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:39,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:39,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:39,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:39,513 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:39,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:54:39,514 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:54:39,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:54:39,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:54:39,515 INFO L87 Difference]: Start difference. First operand 356 states and 362 transitions. Second operand 6 states. [2018-10-10 14:54:40,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:40,319 INFO L93 Difference]: Finished difference Result 456 states and 466 transitions. [2018-10-10 14:54:40,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:54:40,320 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-10-10 14:54:40,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:40,324 INFO L225 Difference]: With dead ends: 456 [2018-10-10 14:54:40,324 INFO L226 Difference]: Without dead ends: 456 [2018-10-10 14:54:40,325 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:54:40,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 456 states. [2018-10-10 14:54:40,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 355. [2018-10-10 14:54:40,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 355 states. [2018-10-10 14:54:40,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 355 states to 355 states and 361 transitions. [2018-10-10 14:54:40,340 INFO L78 Accepts]: Start accepts. Automaton has 355 states and 361 transitions. Word has length 35 [2018-10-10 14:54:40,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:40,341 INFO L481 AbstractCegarLoop]: Abstraction has 355 states and 361 transitions. [2018-10-10 14:54:40,341 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:54:40,341 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 361 transitions. [2018-10-10 14:54:40,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-10 14:54:40,342 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:40,342 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:40,344 INFO L424 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:40,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:40,344 INFO L82 PathProgramCache]: Analyzing trace with hash 144089557, now seen corresponding path program 1 times [2018-10-10 14:54:40,344 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:40,345 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:40,346 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:40,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:40,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:40,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:40,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:40,532 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:40,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:54:40,532 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:54:40,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:54:40,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:54:40,533 INFO L87 Difference]: Start difference. First operand 355 states and 361 transitions. Second operand 8 states. [2018-10-10 14:54:41,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:41,220 INFO L93 Difference]: Finished difference Result 427 states and 437 transitions. [2018-10-10 14:54:41,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:54:41,221 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 36 [2018-10-10 14:54:41,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:41,224 INFO L225 Difference]: With dead ends: 427 [2018-10-10 14:54:41,224 INFO L226 Difference]: Without dead ends: 427 [2018-10-10 14:54:41,225 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:54:41,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states. [2018-10-10 14:54:41,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 354. [2018-10-10 14:54:41,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-10-10 14:54:41,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 360 transitions. [2018-10-10 14:54:41,235 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 360 transitions. Word has length 36 [2018-10-10 14:54:41,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:41,236 INFO L481 AbstractCegarLoop]: Abstraction has 354 states and 360 transitions. [2018-10-10 14:54:41,236 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:54:41,236 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 360 transitions. [2018-10-10 14:54:41,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-10-10 14:54:41,238 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:41,238 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:41,239 INFO L424 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:41,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:41,240 INFO L82 PathProgramCache]: Analyzing trace with hash 2040651788, now seen corresponding path program 1 times [2018-10-10 14:54:41,240 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:41,240 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:41,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:41,242 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:41,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:41,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:41,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:41,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:41,357 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 14:54:41,357 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 14:54:41,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 14:54:41,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-10 14:54:41,358 INFO L87 Difference]: Start difference. First operand 354 states and 360 transitions. Second operand 7 states. [2018-10-10 14:54:42,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:42,624 INFO L93 Difference]: Finished difference Result 524 states and 537 transitions. [2018-10-10 14:54:42,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-10 14:54:42,625 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2018-10-10 14:54:42,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:42,630 INFO L225 Difference]: With dead ends: 524 [2018-10-10 14:54:42,630 INFO L226 Difference]: Without dead ends: 524 [2018-10-10 14:54:42,631 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=163, Unknown=0, NotChecked=0, Total=240 [2018-10-10 14:54:42,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 524 states. [2018-10-10 14:54:42,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 524 to 386. [2018-10-10 14:54:42,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 386 states. [2018-10-10 14:54:42,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 397 transitions. [2018-10-10 14:54:42,643 INFO L78 Accepts]: Start accepts. Automaton has 386 states and 397 transitions. Word has length 54 [2018-10-10 14:54:42,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:42,644 INFO L481 AbstractCegarLoop]: Abstraction has 386 states and 397 transitions. [2018-10-10 14:54:42,644 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 14:54:42,645 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 397 transitions. [2018-10-10 14:54:42,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-10-10 14:54:42,646 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:42,647 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:42,648 INFO L424 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:42,648 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:42,649 INFO L82 PathProgramCache]: Analyzing trace with hash -1164303800, now seen corresponding path program 1 times [2018-10-10 14:54:42,649 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:42,649 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:42,651 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:42,651 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:42,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:42,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:42,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:42,919 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:42,920 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-10 14:54:42,920 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-10 14:54:42,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-10 14:54:42,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-10-10 14:54:42,920 INFO L87 Difference]: Start difference. First operand 386 states and 397 transitions. Second operand 9 states. [2018-10-10 14:54:43,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:43,858 INFO L93 Difference]: Finished difference Result 477 states and 489 transitions. [2018-10-10 14:54:43,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-10 14:54:43,859 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 55 [2018-10-10 14:54:43,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:43,862 INFO L225 Difference]: With dead ends: 477 [2018-10-10 14:54:43,862 INFO L226 Difference]: Without dead ends: 477 [2018-10-10 14:54:43,862 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=101, Invalid=205, Unknown=0, NotChecked=0, Total=306 [2018-10-10 14:54:43,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states. [2018-10-10 14:54:43,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 388. [2018-10-10 14:54:43,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 388 states. [2018-10-10 14:54:43,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 388 states to 388 states and 398 transitions. [2018-10-10 14:54:43,872 INFO L78 Accepts]: Start accepts. Automaton has 388 states and 398 transitions. Word has length 55 [2018-10-10 14:54:43,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:43,872 INFO L481 AbstractCegarLoop]: Abstraction has 388 states and 398 transitions. [2018-10-10 14:54:43,872 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-10 14:54:43,873 INFO L276 IsEmpty]: Start isEmpty. Operand 388 states and 398 transitions. [2018-10-10 14:54:43,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-10-10 14:54:43,874 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:43,874 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:43,876 INFO L424 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:43,876 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:43,876 INFO L82 PathProgramCache]: Analyzing trace with hash 1651302724, now seen corresponding path program 1 times [2018-10-10 14:54:43,876 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:43,877 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:43,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:43,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:43,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:43,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:44,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:44,081 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:44,082 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-10 14:54:44,082 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-10 14:54:44,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-10 14:54:44,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-10-10 14:54:44,083 INFO L87 Difference]: Start difference. First operand 388 states and 398 transitions. Second operand 9 states. [2018-10-10 14:54:45,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:45,491 INFO L93 Difference]: Finished difference Result 582 states and 594 transitions. [2018-10-10 14:54:45,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-10 14:54:45,492 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 62 [2018-10-10 14:54:45,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:45,496 INFO L225 Difference]: With dead ends: 582 [2018-10-10 14:54:45,496 INFO L226 Difference]: Without dead ends: 582 [2018-10-10 14:54:45,496 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-10-10 14:54:45,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 582 states. [2018-10-10 14:54:45,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 582 to 449. [2018-10-10 14:54:45,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 449 states. [2018-10-10 14:54:45,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 462 transitions. [2018-10-10 14:54:45,509 INFO L78 Accepts]: Start accepts. Automaton has 449 states and 462 transitions. Word has length 62 [2018-10-10 14:54:45,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:45,510 INFO L481 AbstractCegarLoop]: Abstraction has 449 states and 462 transitions. [2018-10-10 14:54:45,510 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-10 14:54:45,510 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 462 transitions. [2018-10-10 14:54:45,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-10-10 14:54:45,512 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:45,515 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:45,516 INFO L424 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:45,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:45,516 INFO L82 PathProgramCache]: Analyzing trace with hash -349223000, now seen corresponding path program 1 times [2018-10-10 14:54:45,517 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:45,517 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:45,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:45,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:45,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:45,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:45,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:45,762 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:45,762 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:54:45,763 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:54:45,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:54:45,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:54:45,763 INFO L87 Difference]: Start difference. First operand 449 states and 462 transitions. Second operand 13 states. [2018-10-10 14:54:49,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:49,393 INFO L93 Difference]: Finished difference Result 728 states and 742 transitions. [2018-10-10 14:54:49,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-10 14:54:49,393 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 63 [2018-10-10 14:54:49,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:49,398 INFO L225 Difference]: With dead ends: 728 [2018-10-10 14:54:49,398 INFO L226 Difference]: Without dead ends: 728 [2018-10-10 14:54:49,399 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=198, Invalid=614, Unknown=0, NotChecked=0, Total=812 [2018-10-10 14:54:49,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states. [2018-10-10 14:54:49,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 451. [2018-10-10 14:54:49,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 451 states. [2018-10-10 14:54:49,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 463 transitions. [2018-10-10 14:54:49,408 INFO L78 Accepts]: Start accepts. Automaton has 451 states and 463 transitions. Word has length 63 [2018-10-10 14:54:49,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:49,409 INFO L481 AbstractCegarLoop]: Abstraction has 451 states and 463 transitions. [2018-10-10 14:54:49,409 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:54:49,409 INFO L276 IsEmpty]: Start isEmpty. Operand 451 states and 463 transitions. [2018-10-10 14:54:49,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-10 14:54:49,411 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:49,411 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:49,412 INFO L424 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:49,412 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:49,412 INFO L82 PathProgramCache]: Analyzing trace with hash 2041328872, now seen corresponding path program 1 times [2018-10-10 14:54:49,413 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:49,413 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:49,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:49,414 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:49,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:49,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:49,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:49,485 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:49,485 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:54:49,485 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:54:49,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:54:49,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:54:49,486 INFO L87 Difference]: Start difference. First operand 451 states and 463 transitions. Second operand 6 states. [2018-10-10 14:54:49,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:49,926 INFO L93 Difference]: Finished difference Result 582 states and 596 transitions. [2018-10-10 14:54:49,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:54:49,927 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-10-10 14:54:49,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:49,930 INFO L225 Difference]: With dead ends: 582 [2018-10-10 14:54:49,931 INFO L226 Difference]: Without dead ends: 582 [2018-10-10 14:54:49,931 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:54:49,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 582 states. [2018-10-10 14:54:49,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 582 to 450. [2018-10-10 14:54:49,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 450 states. [2018-10-10 14:54:49,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 462 transitions. [2018-10-10 14:54:49,940 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 462 transitions. Word has length 66 [2018-10-10 14:54:49,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:49,940 INFO L481 AbstractCegarLoop]: Abstraction has 450 states and 462 transitions. [2018-10-10 14:54:49,941 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:54:49,941 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 462 transitions. [2018-10-10 14:54:49,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-10-10 14:54:49,942 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:49,942 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:49,943 INFO L424 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:49,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:49,944 INFO L82 PathProgramCache]: Analyzing trace with hash -1143314229, now seen corresponding path program 1 times [2018-10-10 14:54:49,944 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:49,944 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:49,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:49,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:49,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:49,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:50,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:50,119 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:50,119 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:54:50,119 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:54:50,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:54:50,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:54:50,120 INFO L87 Difference]: Start difference. First operand 450 states and 462 transitions. Second operand 8 states. [2018-10-10 14:54:50,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:50,572 INFO L93 Difference]: Finished difference Result 555 states and 569 transitions. [2018-10-10 14:54:50,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:54:50,572 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2018-10-10 14:54:50,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:50,575 INFO L225 Difference]: With dead ends: 555 [2018-10-10 14:54:50,576 INFO L226 Difference]: Without dead ends: 555 [2018-10-10 14:54:50,576 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:54:50,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2018-10-10 14:54:50,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 449. [2018-10-10 14:54:50,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 449 states. [2018-10-10 14:54:50,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 461 transitions. [2018-10-10 14:54:50,585 INFO L78 Accepts]: Start accepts. Automaton has 449 states and 461 transitions. Word has length 67 [2018-10-10 14:54:50,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:50,586 INFO L481 AbstractCegarLoop]: Abstraction has 449 states and 461 transitions. [2018-10-10 14:54:50,586 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:54:50,586 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 461 transitions. [2018-10-10 14:54:50,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-10-10 14:54:50,587 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:50,587 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:50,588 INFO L424 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:50,589 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:50,589 INFO L82 PathProgramCache]: Analyzing trace with hash 1299709485, now seen corresponding path program 1 times [2018-10-10 14:54:50,589 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:50,589 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:50,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:50,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:50,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:50,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:50,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:50,827 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:50,827 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:54:50,828 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:54:50,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:54:50,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:54:50,828 INFO L87 Difference]: Start difference. First operand 449 states and 461 transitions. Second operand 6 states. [2018-10-10 14:54:51,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:51,309 INFO L93 Difference]: Finished difference Result 489 states and 502 transitions. [2018-10-10 14:54:51,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:54:51,309 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2018-10-10 14:54:51,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:51,313 INFO L225 Difference]: With dead ends: 489 [2018-10-10 14:54:51,313 INFO L226 Difference]: Without dead ends: 489 [2018-10-10 14:54:51,314 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:54:51,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 489 states. [2018-10-10 14:54:51,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 489 to 447. [2018-10-10 14:54:51,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 447 states. [2018-10-10 14:54:51,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 447 states to 447 states and 459 transitions. [2018-10-10 14:54:51,321 INFO L78 Accepts]: Start accepts. Automaton has 447 states and 459 transitions. Word has length 71 [2018-10-10 14:54:51,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:51,322 INFO L481 AbstractCegarLoop]: Abstraction has 447 states and 459 transitions. [2018-10-10 14:54:51,322 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:54:51,322 INFO L276 IsEmpty]: Start isEmpty. Operand 447 states and 459 transitions. [2018-10-10 14:54:51,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-10-10 14:54:51,323 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:51,323 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:51,325 INFO L424 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:51,325 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:51,325 INFO L82 PathProgramCache]: Analyzing trace with hash 1636288490, now seen corresponding path program 1 times [2018-10-10 14:54:51,326 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:51,326 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:51,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:51,327 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:51,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:51,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:51,915 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-10 14:54:52,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:52,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:52,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:54:52,014 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:54:52,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:54:52,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:54:52,014 INFO L87 Difference]: Start difference. First operand 447 states and 459 transitions. Second operand 10 states. [2018-10-10 14:54:52,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:52,951 INFO L93 Difference]: Finished difference Result 762 states and 782 transitions. [2018-10-10 14:54:52,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-10 14:54:52,952 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 72 [2018-10-10 14:54:52,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:52,957 INFO L225 Difference]: With dead ends: 762 [2018-10-10 14:54:52,957 INFO L226 Difference]: Without dead ends: 762 [2018-10-10 14:54:52,957 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=140, Invalid=322, Unknown=0, NotChecked=0, Total=462 [2018-10-10 14:54:52,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 762 states. [2018-10-10 14:54:52,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 762 to 538. [2018-10-10 14:54:52,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states. [2018-10-10 14:54:52,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 565 transitions. [2018-10-10 14:54:52,965 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 565 transitions. Word has length 72 [2018-10-10 14:54:52,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:52,966 INFO L481 AbstractCegarLoop]: Abstraction has 538 states and 565 transitions. [2018-10-10 14:54:52,966 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:54:52,966 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 565 transitions. [2018-10-10 14:54:52,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-10-10 14:54:52,967 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:52,967 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:52,968 INFO L424 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:52,969 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:52,969 INFO L82 PathProgramCache]: Analyzing trace with hash 374790862, now seen corresponding path program 1 times [2018-10-10 14:54:52,969 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:52,969 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:52,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:52,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:52,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:52,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:53,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:53,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:53,093 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-10 14:54:53,093 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-10 14:54:53,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-10 14:54:53,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-10 14:54:53,094 INFO L87 Difference]: Start difference. First operand 538 states and 565 transitions. Second operand 5 states. [2018-10-10 14:54:53,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:53,437 INFO L93 Difference]: Finished difference Result 585 states and 612 transitions. [2018-10-10 14:54:53,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:54:53,437 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2018-10-10 14:54:53,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:53,441 INFO L225 Difference]: With dead ends: 585 [2018-10-10 14:54:53,442 INFO L226 Difference]: Without dead ends: 585 [2018-10-10 14:54:53,442 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:54:53,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 585 states. [2018-10-10 14:54:53,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 585 to 536. [2018-10-10 14:54:53,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 536 states. [2018-10-10 14:54:53,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 563 transitions. [2018-10-10 14:54:53,450 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 563 transitions. Word has length 76 [2018-10-10 14:54:53,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:53,450 INFO L481 AbstractCegarLoop]: Abstraction has 536 states and 563 transitions. [2018-10-10 14:54:53,450 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-10 14:54:53,451 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 563 transitions. [2018-10-10 14:54:53,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-10-10 14:54:53,451 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:53,452 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:53,453 INFO L424 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:53,453 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:53,453 INFO L82 PathProgramCache]: Analyzing trace with hash -1266384975, now seen corresponding path program 1 times [2018-10-10 14:54:53,453 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:53,453 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:53,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:53,455 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:53,455 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:53,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:53,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:53,829 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:53,829 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:54:53,829 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:54:53,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:54:53,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:54:53,830 INFO L87 Difference]: Start difference. First operand 536 states and 563 transitions. Second operand 8 states. [2018-10-10 14:54:54,244 WARN L178 SmtUtils]: Spent 181.00 ms on a formula simplification that was a NOOP. DAG size: 21 [2018-10-10 14:54:54,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:54,688 INFO L93 Difference]: Finished difference Result 575 states and 592 transitions. [2018-10-10 14:54:54,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-10 14:54:54,688 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2018-10-10 14:54:54,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:54,692 INFO L225 Difference]: With dead ends: 575 [2018-10-10 14:54:54,692 INFO L226 Difference]: Without dead ends: 575 [2018-10-10 14:54:54,692 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:54:54,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 575 states. [2018-10-10 14:54:54,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 575 to 535. [2018-10-10 14:54:54,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2018-10-10 14:54:54,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 562 transitions. [2018-10-10 14:54:54,702 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 562 transitions. Word has length 77 [2018-10-10 14:54:54,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:54,702 INFO L481 AbstractCegarLoop]: Abstraction has 535 states and 562 transitions. [2018-10-10 14:54:54,702 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:54:54,702 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 562 transitions. [2018-10-10 14:54:54,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-10-10 14:54:54,703 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:54,704 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:54,705 INFO L424 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:54,705 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:54,705 INFO L82 PathProgramCache]: Analyzing trace with hash -730137150, now seen corresponding path program 1 times [2018-10-10 14:54:54,705 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:54,706 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:54,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:54,707 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:54,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:54,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:54,874 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:54,874 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:54,875 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-10 14:54:54,875 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:54:54,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:54:54,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:54:54,876 INFO L87 Difference]: Start difference. First operand 535 states and 562 transitions. Second operand 8 states. [2018-10-10 14:54:55,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:55,491 INFO L93 Difference]: Finished difference Result 600 states and 624 transitions. [2018-10-10 14:54:55,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-10 14:54:55,491 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2018-10-10 14:54:55,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:55,494 INFO L225 Difference]: With dead ends: 600 [2018-10-10 14:54:55,494 INFO L226 Difference]: Without dead ends: 600 [2018-10-10 14:54:55,495 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=140, Unknown=0, NotChecked=0, Total=210 [2018-10-10 14:54:55,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 600 states. [2018-10-10 14:54:55,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 600 to 526. [2018-10-10 14:54:55,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 526 states. [2018-10-10 14:54:55,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 526 states to 526 states and 551 transitions. [2018-10-10 14:54:55,503 INFO L78 Accepts]: Start accepts. Automaton has 526 states and 551 transitions. Word has length 82 [2018-10-10 14:54:55,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:55,503 INFO L481 AbstractCegarLoop]: Abstraction has 526 states and 551 transitions. [2018-10-10 14:54:55,503 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:54:55,503 INFO L276 IsEmpty]: Start isEmpty. Operand 526 states and 551 transitions. [2018-10-10 14:54:55,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-10-10 14:54:55,504 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:55,504 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:55,505 INFO L424 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:55,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:55,506 INFO L82 PathProgramCache]: Analyzing trace with hash -741241103, now seen corresponding path program 1 times [2018-10-10 14:54:55,506 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:55,506 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:55,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:55,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:55,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:55,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:55,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:55,815 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:55,815 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-10 14:54:55,815 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-10 14:54:55,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-10 14:54:55,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:54:55,816 INFO L87 Difference]: Start difference. First operand 526 states and 551 transitions. Second operand 11 states. [2018-10-10 14:54:57,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:57,102 INFO L93 Difference]: Finished difference Result 569 states and 594 transitions. [2018-10-10 14:54:57,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-10 14:54:57,106 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 84 [2018-10-10 14:54:57,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:57,108 INFO L225 Difference]: With dead ends: 569 [2018-10-10 14:54:57,108 INFO L226 Difference]: Without dead ends: 569 [2018-10-10 14:54:57,109 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=172, Invalid=530, Unknown=0, NotChecked=0, Total=702 [2018-10-10 14:54:57,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 569 states. [2018-10-10 14:54:57,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 569 to 525. [2018-10-10 14:54:57,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 525 states. [2018-10-10 14:54:57,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 525 states to 525 states and 550 transitions. [2018-10-10 14:54:57,116 INFO L78 Accepts]: Start accepts. Automaton has 525 states and 550 transitions. Word has length 84 [2018-10-10 14:54:57,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:57,116 INFO L481 AbstractCegarLoop]: Abstraction has 525 states and 550 transitions. [2018-10-10 14:54:57,117 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-10 14:54:57,117 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 550 transitions. [2018-10-10 14:54:57,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-10-10 14:54:57,118 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:57,118 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:57,119 INFO L424 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:57,119 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:57,119 INFO L82 PathProgramCache]: Analyzing trace with hash -1503637579, now seen corresponding path program 1 times [2018-10-10 14:54:57,120 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:57,120 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:57,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:57,121 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:57,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:57,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:57,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:57,427 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:57,428 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:54:57,428 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:54:57,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:54:57,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:54:57,429 INFO L87 Difference]: Start difference. First operand 525 states and 550 transitions. Second operand 13 states. [2018-10-10 14:54:58,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:58,865 INFO L93 Difference]: Finished difference Result 540 states and 565 transitions. [2018-10-10 14:54:58,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-10 14:54:58,865 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 85 [2018-10-10 14:54:58,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:58,868 INFO L225 Difference]: With dead ends: 540 [2018-10-10 14:54:58,868 INFO L226 Difference]: Without dead ends: 540 [2018-10-10 14:54:58,869 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=193, Invalid=563, Unknown=0, NotChecked=0, Total=756 [2018-10-10 14:54:58,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2018-10-10 14:54:58,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 524. [2018-10-10 14:54:58,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 524 states. [2018-10-10 14:54:58,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 524 states to 524 states and 549 transitions. [2018-10-10 14:54:58,875 INFO L78 Accepts]: Start accepts. Automaton has 524 states and 549 transitions. Word has length 85 [2018-10-10 14:54:58,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:58,876 INFO L481 AbstractCegarLoop]: Abstraction has 524 states and 549 transitions. [2018-10-10 14:54:58,876 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:54:58,876 INFO L276 IsEmpty]: Start isEmpty. Operand 524 states and 549 transitions. [2018-10-10 14:54:58,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-10-10 14:54:58,877 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:58,877 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:58,878 INFO L424 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:58,878 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:58,879 INFO L82 PathProgramCache]: Analyzing trace with hash -1184011990, now seen corresponding path program 1 times [2018-10-10 14:54:58,879 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:58,879 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:58,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:58,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:58,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:58,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:59,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:59,015 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:59,015 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 14:54:59,015 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-10 14:54:59,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-10 14:54:59,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-10 14:54:59,016 INFO L87 Difference]: Start difference. First operand 524 states and 549 transitions. Second operand 7 states. [2018-10-10 14:54:59,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:54:59,497 INFO L93 Difference]: Finished difference Result 637 states and 650 transitions. [2018-10-10 14:54:59,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 14:54:59,498 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 88 [2018-10-10 14:54:59,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:54:59,502 INFO L225 Difference]: With dead ends: 637 [2018-10-10 14:54:59,502 INFO L226 Difference]: Without dead ends: 637 [2018-10-10 14:54:59,502 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:54:59,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 637 states. [2018-10-10 14:54:59,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 637 to 545. [2018-10-10 14:54:59,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 545 states. [2018-10-10 14:54:59,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 574 transitions. [2018-10-10 14:54:59,510 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 574 transitions. Word has length 88 [2018-10-10 14:54:59,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:54:59,511 INFO L481 AbstractCegarLoop]: Abstraction has 545 states and 574 transitions. [2018-10-10 14:54:59,511 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-10 14:54:59,511 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 574 transitions. [2018-10-10 14:54:59,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-10 14:54:59,512 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:54:59,512 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:54:59,513 INFO L424 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:54:59,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:54:59,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1950334299, now seen corresponding path program 1 times [2018-10-10 14:54:59,514 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:54:59,514 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:54:59,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:59,515 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:54:59,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:54:59,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:54:59,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:54:59,705 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:54:59,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:54:59,706 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:54:59,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:54:59,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:54:59,707 INFO L87 Difference]: Start difference. First operand 545 states and 574 transitions. Second operand 10 states. [2018-10-10 14:55:00,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:00,461 INFO L93 Difference]: Finished difference Result 712 states and 729 transitions. [2018-10-10 14:55:00,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-10 14:55:00,461 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 89 [2018-10-10 14:55:00,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:00,464 INFO L225 Difference]: With dead ends: 712 [2018-10-10 14:55:00,464 INFO L226 Difference]: Without dead ends: 712 [2018-10-10 14:55:00,465 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=124, Invalid=256, Unknown=0, NotChecked=0, Total=380 [2018-10-10 14:55:00,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 712 states. [2018-10-10 14:55:00,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 712 to 546. [2018-10-10 14:55:00,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 546 states. [2018-10-10 14:55:00,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 574 transitions. [2018-10-10 14:55:00,472 INFO L78 Accepts]: Start accepts. Automaton has 546 states and 574 transitions. Word has length 89 [2018-10-10 14:55:00,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:00,473 INFO L481 AbstractCegarLoop]: Abstraction has 546 states and 574 transitions. [2018-10-10 14:55:00,473 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:55:00,473 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 574 transitions. [2018-10-10 14:55:00,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-10-10 14:55:00,474 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:00,474 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:00,474 INFO L424 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:00,475 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:00,475 INFO L82 PathProgramCache]: Analyzing trace with hash -1357431301, now seen corresponding path program 1 times [2018-10-10 14:55:00,475 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:00,475 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:00,476 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:00,476 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:00,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:00,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:00,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:00,946 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:00,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:55:00,946 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:55:00,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:55:00,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:00,947 INFO L87 Difference]: Start difference. First operand 546 states and 574 transitions. Second operand 13 states. [2018-10-10 14:55:02,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:02,584 INFO L93 Difference]: Finished difference Result 561 states and 589 transitions. [2018-10-10 14:55:02,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-10 14:55:02,585 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 95 [2018-10-10 14:55:02,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:02,588 INFO L225 Difference]: With dead ends: 561 [2018-10-10 14:55:02,588 INFO L226 Difference]: Without dead ends: 561 [2018-10-10 14:55:02,589 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=193, Invalid=563, Unknown=0, NotChecked=0, Total=756 [2018-10-10 14:55:02,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2018-10-10 14:55:02,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 545. [2018-10-10 14:55:02,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 545 states. [2018-10-10 14:55:02,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 573 transitions. [2018-10-10 14:55:02,595 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 573 transitions. Word has length 95 [2018-10-10 14:55:02,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:02,596 INFO L481 AbstractCegarLoop]: Abstraction has 545 states and 573 transitions. [2018-10-10 14:55:02,596 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:55:02,596 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 573 transitions. [2018-10-10 14:55:02,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-10-10 14:55:02,597 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:02,597 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:02,597 INFO L424 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:02,598 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:02,598 INFO L82 PathProgramCache]: Analyzing trace with hash 928431879, now seen corresponding path program 1 times [2018-10-10 14:55:02,598 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:02,598 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:02,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:02,599 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:02,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:02,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:02,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:02,679 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:02,679 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:02,679 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:02,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:02,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:02,680 INFO L87 Difference]: Start difference. First operand 545 states and 573 transitions. Second operand 6 states. [2018-10-10 14:55:03,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:03,231 INFO L93 Difference]: Finished difference Result 640 states and 656 transitions. [2018-10-10 14:55:03,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-10 14:55:03,232 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-10-10 14:55:03,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:03,235 INFO L225 Difference]: With dead ends: 640 [2018-10-10 14:55:03,235 INFO L226 Difference]: Without dead ends: 640 [2018-10-10 14:55:03,236 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:03,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 640 states. [2018-10-10 14:55:03,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 640 to 560. [2018-10-10 14:55:03,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 560 states. [2018-10-10 14:55:03,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 560 states to 560 states and 588 transitions. [2018-10-10 14:55:03,242 INFO L78 Accepts]: Start accepts. Automaton has 560 states and 588 transitions. Word has length 100 [2018-10-10 14:55:03,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:03,242 INFO L481 AbstractCegarLoop]: Abstraction has 560 states and 588 transitions. [2018-10-10 14:55:03,243 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:03,243 INFO L276 IsEmpty]: Start isEmpty. Operand 560 states and 588 transitions. [2018-10-10 14:55:03,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-10-10 14:55:03,244 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:03,244 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:03,244 INFO L424 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:03,244 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:03,245 INFO L82 PathProgramCache]: Analyzing trace with hash -1283382462, now seen corresponding path program 1 times [2018-10-10 14:55:03,245 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:03,245 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:03,246 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:03,246 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:03,246 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:03,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:03,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:03,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:03,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-10 14:55:03,392 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-10 14:55:03,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-10 14:55:03,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-10 14:55:03,392 INFO L87 Difference]: Start difference. First operand 560 states and 588 transitions. Second operand 10 states. [2018-10-10 14:55:04,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:04,040 INFO L93 Difference]: Finished difference Result 682 states and 700 transitions. [2018-10-10 14:55:04,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-10 14:55:04,043 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 101 [2018-10-10 14:55:04,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:04,046 INFO L225 Difference]: With dead ends: 682 [2018-10-10 14:55:04,046 INFO L226 Difference]: Without dead ends: 682 [2018-10-10 14:55:04,046 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=148, Invalid=358, Unknown=0, NotChecked=0, Total=506 [2018-10-10 14:55:04,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 682 states. [2018-10-10 14:55:04,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 682 to 562. [2018-10-10 14:55:04,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 562 states. [2018-10-10 14:55:04,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 562 states to 562 states and 589 transitions. [2018-10-10 14:55:04,053 INFO L78 Accepts]: Start accepts. Automaton has 562 states and 589 transitions. Word has length 101 [2018-10-10 14:55:04,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:04,053 INFO L481 AbstractCegarLoop]: Abstraction has 562 states and 589 transitions. [2018-10-10 14:55:04,053 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-10 14:55:04,054 INFO L276 IsEmpty]: Start isEmpty. Operand 562 states and 589 transitions. [2018-10-10 14:55:04,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-10-10 14:55:04,054 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:04,055 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:04,055 INFO L424 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:04,055 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:04,055 INFO L82 PathProgramCache]: Analyzing trace with hash 670321762, now seen corresponding path program 1 times [2018-10-10 14:55:04,055 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:04,056 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:04,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:04,057 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:04,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:04,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:04,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:04,116 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:04,117 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:04,117 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:04,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:04,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:04,117 INFO L87 Difference]: Start difference. First operand 562 states and 589 transitions. Second operand 6 states. [2018-10-10 14:55:04,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:04,511 INFO L93 Difference]: Finished difference Result 586 states and 609 transitions. [2018-10-10 14:55:04,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:55:04,512 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 101 [2018-10-10 14:55:04,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:04,515 INFO L225 Difference]: With dead ends: 586 [2018-10-10 14:55:04,515 INFO L226 Difference]: Without dead ends: 586 [2018-10-10 14:55:04,515 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:04,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states. [2018-10-10 14:55:04,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 561. [2018-10-10 14:55:04,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 561 states. [2018-10-10 14:55:04,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 587 transitions. [2018-10-10 14:55:04,521 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 587 transitions. Word has length 101 [2018-10-10 14:55:04,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:04,522 INFO L481 AbstractCegarLoop]: Abstraction has 561 states and 587 transitions. [2018-10-10 14:55:04,522 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:04,522 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 587 transitions. [2018-10-10 14:55:04,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-10-10 14:55:04,523 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:04,523 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:04,523 INFO L424 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:04,524 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:04,524 INFO L82 PathProgramCache]: Analyzing trace with hash -694861563, now seen corresponding path program 1 times [2018-10-10 14:55:04,524 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:04,524 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:04,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:04,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:04,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:04,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:05,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:05,317 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:05,317 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-10-10 14:55:05,317 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-10 14:55:05,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-10 14:55:05,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2018-10-10 14:55:05,318 INFO L87 Difference]: Start difference. First operand 561 states and 587 transitions. Second operand 14 states. [2018-10-10 14:55:07,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:07,462 INFO L93 Difference]: Finished difference Result 731 states and 755 transitions. [2018-10-10 14:55:07,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-10-10 14:55:07,462 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 102 [2018-10-10 14:55:07,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:07,466 INFO L225 Difference]: With dead ends: 731 [2018-10-10 14:55:07,466 INFO L226 Difference]: Without dead ends: 731 [2018-10-10 14:55:07,467 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=228, Invalid=702, Unknown=0, NotChecked=0, Total=930 [2018-10-10 14:55:07,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2018-10-10 14:55:07,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 561. [2018-10-10 14:55:07,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 561 states. [2018-10-10 14:55:07,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 586 transitions. [2018-10-10 14:55:07,473 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 586 transitions. Word has length 102 [2018-10-10 14:55:07,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:07,473 INFO L481 AbstractCegarLoop]: Abstraction has 561 states and 586 transitions. [2018-10-10 14:55:07,474 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-10 14:55:07,474 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 586 transitions. [2018-10-10 14:55:07,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-10-10 14:55:07,474 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:07,474 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:07,475 INFO L424 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:07,475 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:07,475 INFO L82 PathProgramCache]: Analyzing trace with hash 1991290702, now seen corresponding path program 1 times [2018-10-10 14:55:07,475 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:07,476 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:07,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:07,477 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:07,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:07,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:07,758 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:07,758 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:55:07,758 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:55:07,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:07,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:07,841 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:55:08,037 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:08,071 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:55:08,071 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 7 [2018-10-10 14:55:08,155 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_25.bpl [2018-10-10 14:55:08,162 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:55:08,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:55:08,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:08,168 INFO L87 Difference]: Start difference. First operand 561 states and 586 transitions. Second operand 8 states. [2018-10-10 14:55:08,959 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-10-10 14:55:09,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:09,892 INFO L93 Difference]: Finished difference Result 1039 states and 1075 transitions. [2018-10-10 14:55:09,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-10 14:55:09,898 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 112 [2018-10-10 14:55:09,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:09,902 INFO L225 Difference]: With dead ends: 1039 [2018-10-10 14:55:09,902 INFO L226 Difference]: Without dead ends: 1039 [2018-10-10 14:55:09,903 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 110 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=64, Invalid=146, Unknown=0, NotChecked=0, Total=210 [2018-10-10 14:55:09,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1039 states. [2018-10-10 14:55:09,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1039 to 785. [2018-10-10 14:55:09,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 785 states. [2018-10-10 14:55:09,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 785 states to 785 states and 842 transitions. [2018-10-10 14:55:09,918 INFO L78 Accepts]: Start accepts. Automaton has 785 states and 842 transitions. Word has length 112 [2018-10-10 14:55:09,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:09,918 INFO L481 AbstractCegarLoop]: Abstraction has 785 states and 842 transitions. [2018-10-10 14:55:09,918 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:55:09,919 INFO L276 IsEmpty]: Start isEmpty. Operand 785 states and 842 transitions. [2018-10-10 14:55:09,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-10-10 14:55:09,920 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:09,920 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:09,920 INFO L424 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:09,921 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:09,921 INFO L82 PathProgramCache]: Analyzing trace with hash -59863478, now seen corresponding path program 1 times [2018-10-10 14:55:09,921 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:09,921 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:09,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:09,923 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:09,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:09,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:10,544 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:10,544 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:55:10,544 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:55:10,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:10,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:10,605 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:55:10,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:55:10,641 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:10,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:10,651 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:55:10,772 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:55:10,776 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:55:10,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 14:55:10,778 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:10,826 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:55:10,826 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-10-10 14:55:11,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:55:11,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:55:11,120 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:11,146 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:11,271 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:55:11,271 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:26, output treesize:23 [2018-10-10 14:55:11,638 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-10 14:55:11,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-10 14:55:11,656 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:11,712 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:11,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:55:11,774 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:30, output treesize:15 [2018-10-10 14:55:12,030 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:12,052 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:55:12,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 24 [2018-10-10 14:55:12,071 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_26.bpl [2018-10-10 14:55:12,073 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-10-10 14:55:12,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-10-10 14:55:12,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2018-10-10 14:55:12,074 INFO L87 Difference]: Start difference. First operand 785 states and 842 transitions. Second operand 25 states. [2018-10-10 14:55:13,357 WARN L178 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 26 [2018-10-10 14:55:16,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:16,659 INFO L93 Difference]: Finished difference Result 999 states and 1042 transitions. [2018-10-10 14:55:16,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-10-10 14:55:16,660 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 113 [2018-10-10 14:55:16,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:16,664 INFO L225 Difference]: With dead ends: 999 [2018-10-10 14:55:16,664 INFO L226 Difference]: Without dead ends: 999 [2018-10-10 14:55:16,665 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 102 SyntacticMatches, 3 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 813 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=541, Invalid=2765, Unknown=0, NotChecked=0, Total=3306 [2018-10-10 14:55:16,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 999 states. [2018-10-10 14:55:16,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 999 to 791. [2018-10-10 14:55:16,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 791 states. [2018-10-10 14:55:16,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 791 states to 791 states and 846 transitions. [2018-10-10 14:55:16,675 INFO L78 Accepts]: Start accepts. Automaton has 791 states and 846 transitions. Word has length 113 [2018-10-10 14:55:16,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:16,675 INFO L481 AbstractCegarLoop]: Abstraction has 791 states and 846 transitions. [2018-10-10 14:55:16,675 INFO L482 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-10-10 14:55:16,675 INFO L276 IsEmpty]: Start isEmpty. Operand 791 states and 846 transitions. [2018-10-10 14:55:16,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-10-10 14:55:16,676 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:16,677 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:16,677 INFO L424 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:16,677 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:16,678 INFO L82 PathProgramCache]: Analyzing trace with hash 1600469830, now seen corresponding path program 1 times [2018-10-10 14:55:16,678 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:16,678 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:16,679 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:16,679 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:16,679 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:16,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:17,385 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:17,386 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:55:17,386 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:55:17,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:17,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:17,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:55:17,740 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:17,761 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:55:17,761 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 13 [2018-10-10 14:55:17,778 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_27.bpl [2018-10-10 14:55:17,779 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-10 14:55:17,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-10 14:55:17,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2018-10-10 14:55:17,780 INFO L87 Difference]: Start difference. First operand 791 states and 846 transitions. Second operand 14 states. [2018-10-10 14:55:20,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:20,279 INFO L93 Difference]: Finished difference Result 1133 states and 1158 transitions. [2018-10-10 14:55:20,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-10-10 14:55:20,279 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 113 [2018-10-10 14:55:20,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:20,284 INFO L225 Difference]: With dead ends: 1133 [2018-10-10 14:55:20,284 INFO L226 Difference]: Without dead ends: 1133 [2018-10-10 14:55:20,285 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=487, Invalid=1405, Unknown=0, NotChecked=0, Total=1892 [2018-10-10 14:55:20,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1133 states. [2018-10-10 14:55:20,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1133 to 721. [2018-10-10 14:55:20,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 721 states. [2018-10-10 14:55:20,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 721 states to 721 states and 761 transitions. [2018-10-10 14:55:20,292 INFO L78 Accepts]: Start accepts. Automaton has 721 states and 761 transitions. Word has length 113 [2018-10-10 14:55:20,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:20,293 INFO L481 AbstractCegarLoop]: Abstraction has 721 states and 761 transitions. [2018-10-10 14:55:20,293 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-10 14:55:20,293 INFO L276 IsEmpty]: Start isEmpty. Operand 721 states and 761 transitions. [2018-10-10 14:55:20,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-10-10 14:55:20,293 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:20,294 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:20,294 INFO L424 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:20,294 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:20,294 INFO L82 PathProgramCache]: Analyzing trace with hash -9398478, now seen corresponding path program 1 times [2018-10-10 14:55:20,295 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:20,295 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:20,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:20,296 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:20,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:20,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:20,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:20,531 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:20,531 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-10-10 14:55:20,531 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-10 14:55:20,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-10 14:55:20,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=182, Unknown=0, NotChecked=0, Total=210 [2018-10-10 14:55:20,532 INFO L87 Difference]: Start difference. First operand 721 states and 761 transitions. Second operand 15 states. [2018-10-10 14:55:22,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:22,998 INFO L93 Difference]: Finished difference Result 980 states and 1019 transitions. [2018-10-10 14:55:22,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-10-10 14:55:22,999 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 114 [2018-10-10 14:55:22,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:23,003 INFO L225 Difference]: With dead ends: 980 [2018-10-10 14:55:23,004 INFO L226 Difference]: Without dead ends: 980 [2018-10-10 14:55:23,005 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 481 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=378, Invalid=1692, Unknown=0, NotChecked=0, Total=2070 [2018-10-10 14:55:23,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 980 states. [2018-10-10 14:55:23,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 980 to 739. [2018-10-10 14:55:23,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 739 states. [2018-10-10 14:55:23,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 739 states to 739 states and 780 transitions. [2018-10-10 14:55:23,013 INFO L78 Accepts]: Start accepts. Automaton has 739 states and 780 transitions. Word has length 114 [2018-10-10 14:55:23,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:23,013 INFO L481 AbstractCegarLoop]: Abstraction has 739 states and 780 transitions. [2018-10-10 14:55:23,013 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-10 14:55:23,013 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 780 transitions. [2018-10-10 14:55:23,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-10-10 14:55:23,014 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:23,014 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:23,014 INFO L424 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:23,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:23,015 INFO L82 PathProgramCache]: Analyzing trace with hash -1855767493, now seen corresponding path program 1 times [2018-10-10 14:55:23,015 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:23,015 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:23,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:23,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:23,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:23,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:23,414 WARN L178 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-10 14:55:23,737 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:23,737 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:55:23,737 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:55:23,750 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:23,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:23,794 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:55:23,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:55:23,808 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,875 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 14:55:23,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:55:23,890 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,926 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-10-10 14:55:23,965 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:55:23,966 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:55:23,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:55:23,967 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,972 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,972 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:13 [2018-10-10 14:55:23,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-10 14:55:23,986 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,998 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:23,999 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:19, output treesize:9 [2018-10-10 14:55:24,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:55:24,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:55:24,084 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,086 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:55:24,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:55:24,098 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,100 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,106 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,106 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:28, output treesize:17 [2018-10-10 14:55:24,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-10 14:55:24,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-10 14:55:24,161 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,162 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 14:55:24,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-10 14:55:24,171 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,173 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,175 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:24,175 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:31, output treesize:9 [2018-10-10 14:55:24,257 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:24,277 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:55:24,278 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-10-10 14:55:24,296 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_29.bpl [2018-10-10 14:55:24,297 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-10 14:55:24,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-10 14:55:24,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=338, Unknown=0, NotChecked=0, Total=380 [2018-10-10 14:55:24,298 INFO L87 Difference]: Start difference. First operand 739 states and 780 transitions. Second operand 20 states. [2018-10-10 14:55:24,615 WARN L178 SmtUtils]: Spent 134.00 ms on a formula simplification that was a NOOP. DAG size: 29 [2018-10-10 14:55:29,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:29,845 INFO L93 Difference]: Finished difference Result 1374 states and 1425 transitions. [2018-10-10 14:55:29,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-10-10 14:55:29,845 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 114 [2018-10-10 14:55:29,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:29,851 INFO L225 Difference]: With dead ends: 1374 [2018-10-10 14:55:29,851 INFO L226 Difference]: Without dead ends: 1374 [2018-10-10 14:55:29,853 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 109 SyntacticMatches, 6 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1260 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=734, Invalid=4096, Unknown=0, NotChecked=0, Total=4830 [2018-10-10 14:55:29,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1374 states. [2018-10-10 14:55:29,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1374 to 816. [2018-10-10 14:55:29,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 816 states. [2018-10-10 14:55:29,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 816 states to 816 states and 858 transitions. [2018-10-10 14:55:29,863 INFO L78 Accepts]: Start accepts. Automaton has 816 states and 858 transitions. Word has length 114 [2018-10-10 14:55:29,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:29,863 INFO L481 AbstractCegarLoop]: Abstraction has 816 states and 858 transitions. [2018-10-10 14:55:29,863 INFO L482 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-10 14:55:29,863 INFO L276 IsEmpty]: Start isEmpty. Operand 816 states and 858 transitions. [2018-10-10 14:55:29,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-10-10 14:55:29,864 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:29,864 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:29,864 INFO L424 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:29,864 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:29,864 INFO L82 PathProgramCache]: Analyzing trace with hash -291352433, now seen corresponding path program 1 times [2018-10-10 14:55:29,865 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:29,865 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:29,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:29,866 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:29,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:29,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:30,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:30,358 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:30,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-10-10 14:55:30,358 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-10 14:55:30,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-10 14:55:30,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-10-10 14:55:30,359 INFO L87 Difference]: Start difference. First operand 816 states and 858 transitions. Second operand 19 states. [2018-10-10 14:55:32,168 WARN L178 SmtUtils]: Spent 198.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-10-10 14:55:36,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:36,006 INFO L93 Difference]: Finished difference Result 1365 states and 1416 transitions. [2018-10-10 14:55:36,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-10-10 14:55:36,007 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 115 [2018-10-10 14:55:36,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:36,013 INFO L225 Difference]: With dead ends: 1365 [2018-10-10 14:55:36,013 INFO L226 Difference]: Without dead ends: 1365 [2018-10-10 14:55:36,014 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1206 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=714, Invalid=3978, Unknown=0, NotChecked=0, Total=4692 [2018-10-10 14:55:36,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2018-10-10 14:55:36,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 835. [2018-10-10 14:55:36,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 835 states. [2018-10-10 14:55:36,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 835 states to 835 states and 878 transitions. [2018-10-10 14:55:36,024 INFO L78 Accepts]: Start accepts. Automaton has 835 states and 878 transitions. Word has length 115 [2018-10-10 14:55:36,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:36,024 INFO L481 AbstractCegarLoop]: Abstraction has 835 states and 878 transitions. [2018-10-10 14:55:36,024 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-10 14:55:36,024 INFO L276 IsEmpty]: Start isEmpty. Operand 835 states and 878 transitions. [2018-10-10 14:55:36,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-10-10 14:55:36,025 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:36,025 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:36,025 INFO L424 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:36,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:36,026 INFO L82 PathProgramCache]: Analyzing trace with hash -445712399, now seen corresponding path program 1 times [2018-10-10 14:55:36,026 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:36,026 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:36,027 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:36,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:36,027 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:36,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:36,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:36,221 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:36,221 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-10 14:55:36,222 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:36,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:36,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:36,222 INFO L87 Difference]: Start difference. First operand 835 states and 878 transitions. Second operand 6 states. [2018-10-10 14:55:36,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:36,372 INFO L93 Difference]: Finished difference Result 969 states and 1014 transitions. [2018-10-10 14:55:36,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-10 14:55:36,372 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 116 [2018-10-10 14:55:36,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:36,376 INFO L225 Difference]: With dead ends: 969 [2018-10-10 14:55:36,376 INFO L226 Difference]: Without dead ends: 969 [2018-10-10 14:55:36,376 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-10-10 14:55:36,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states. [2018-10-10 14:55:36,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 902. [2018-10-10 14:55:36,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 902 states. [2018-10-10 14:55:36,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 902 states to 902 states and 957 transitions. [2018-10-10 14:55:36,385 INFO L78 Accepts]: Start accepts. Automaton has 902 states and 957 transitions. Word has length 116 [2018-10-10 14:55:36,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:36,386 INFO L481 AbstractCegarLoop]: Abstraction has 902 states and 957 transitions. [2018-10-10 14:55:36,386 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:36,386 INFO L276 IsEmpty]: Start isEmpty. Operand 902 states and 957 transitions. [2018-10-10 14:55:36,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-10-10 14:55:36,387 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:36,387 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:36,388 INFO L424 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:36,388 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:36,388 INFO L82 PathProgramCache]: Analyzing trace with hash 14765702, now seen corresponding path program 1 times [2018-10-10 14:55:36,388 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:36,389 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:36,389 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:36,390 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:36,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:36,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:36,616 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:36,616 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:36,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-10 14:55:36,617 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-10 14:55:36,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-10 14:55:36,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:36,617 INFO L87 Difference]: Start difference. First operand 902 states and 957 transitions. Second operand 8 states. [2018-10-10 14:55:37,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:37,169 INFO L93 Difference]: Finished difference Result 909 states and 962 transitions. [2018-10-10 14:55:37,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-10 14:55:37,170 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 120 [2018-10-10 14:55:37,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:37,177 INFO L225 Difference]: With dead ends: 909 [2018-10-10 14:55:37,177 INFO L226 Difference]: Without dead ends: 909 [2018-10-10 14:55:37,178 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=52, Invalid=104, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:55:37,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 909 states. [2018-10-10 14:55:37,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 909 to 901. [2018-10-10 14:55:37,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 901 states. [2018-10-10 14:55:37,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 901 states to 901 states and 956 transitions. [2018-10-10 14:55:37,197 INFO L78 Accepts]: Start accepts. Automaton has 901 states and 956 transitions. Word has length 120 [2018-10-10 14:55:37,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:37,197 INFO L481 AbstractCegarLoop]: Abstraction has 901 states and 956 transitions. [2018-10-10 14:55:37,198 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-10 14:55:37,198 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 956 transitions. [2018-10-10 14:55:37,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-10-10 14:55:37,199 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:37,199 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:37,200 INFO L424 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:37,200 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:37,200 INFO L82 PathProgramCache]: Analyzing trace with hash 457736870, now seen corresponding path program 1 times [2018-10-10 14:55:37,200 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:37,200 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:37,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:37,202 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:37,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:37,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:37,906 WARN L178 SmtUtils]: Spent 119.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2018-10-10 14:55:38,408 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 7 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:38,408 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:55:38,408 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:55:38,417 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:38,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:38,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:55:38,627 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:55:38,628 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:55:38,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:55:38,629 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:38,635 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:38,635 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:21, output treesize:15 [2018-10-10 14:55:38,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 14:55:38,666 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:38,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:38,673 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:11 [2018-10-10 14:55:38,749 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:38,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-10-10 14:55:38,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [17] total 26 [2018-10-10 14:55:38,770 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-10-10 14:55:38,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-10-10 14:55:38,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=630, Unknown=0, NotChecked=0, Total=702 [2018-10-10 14:55:38,771 INFO L87 Difference]: Start difference. First operand 901 states and 956 transitions. Second operand 27 states. [2018-10-10 14:55:40,687 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2018-10-10 14:55:41,144 WARN L178 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 54 [2018-10-10 14:55:42,343 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 61 [2018-10-10 14:55:42,622 WARN L178 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 70 [2018-10-10 14:55:42,913 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 75 [2018-10-10 14:55:43,142 WARN L178 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 80 [2018-10-10 14:55:43,734 WARN L178 SmtUtils]: Spent 224.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 53 [2018-10-10 14:55:44,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:44,009 INFO L93 Difference]: Finished difference Result 902 states and 955 transitions. [2018-10-10 14:55:44,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-10-10 14:55:44,010 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 121 [2018-10-10 14:55:44,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:44,014 INFO L225 Difference]: With dead ends: 902 [2018-10-10 14:55:44,014 INFO L226 Difference]: Without dead ends: 902 [2018-10-10 14:55:44,017 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 727 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=859, Invalid=3301, Unknown=0, NotChecked=0, Total=4160 [2018-10-10 14:55:44,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 902 states. [2018-10-10 14:55:44,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 902 to 900. [2018-10-10 14:55:44,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 900 states. [2018-10-10 14:55:44,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 900 states to 900 states and 955 transitions. [2018-10-10 14:55:44,029 INFO L78 Accepts]: Start accepts. Automaton has 900 states and 955 transitions. Word has length 121 [2018-10-10 14:55:44,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:44,029 INFO L481 AbstractCegarLoop]: Abstraction has 900 states and 955 transitions. [2018-10-10 14:55:44,029 INFO L482 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-10-10 14:55:44,029 INFO L276 IsEmpty]: Start isEmpty. Operand 900 states and 955 transitions. [2018-10-10 14:55:44,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-10-10 14:55:44,031 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:44,031 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:44,031 INFO L424 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:44,031 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:44,032 INFO L82 PathProgramCache]: Analyzing trace with hash -1054264281, now seen corresponding path program 1 times [2018-10-10 14:55:44,032 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:44,032 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:44,033 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:44,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:44,033 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:44,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:44,311 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-10 14:55:44,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:44,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-10 14:55:44,312 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-10 14:55:44,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-10 14:55:44,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-10 14:55:44,312 INFO L87 Difference]: Start difference. First operand 900 states and 955 transitions. Second operand 6 states. [2018-10-10 14:55:44,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:44,618 INFO L93 Difference]: Finished difference Result 915 states and 964 transitions. [2018-10-10 14:55:44,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-10 14:55:44,618 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 125 [2018-10-10 14:55:44,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:44,623 INFO L225 Difference]: With dead ends: 915 [2018-10-10 14:55:44,623 INFO L226 Difference]: Without dead ends: 915 [2018-10-10 14:55:44,624 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-10 14:55:44,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 915 states. [2018-10-10 14:55:44,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 915 to 897. [2018-10-10 14:55:44,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 897 states. [2018-10-10 14:55:44,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 897 states to 897 states and 946 transitions. [2018-10-10 14:55:44,635 INFO L78 Accepts]: Start accepts. Automaton has 897 states and 946 transitions. Word has length 125 [2018-10-10 14:55:44,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:44,635 INFO L481 AbstractCegarLoop]: Abstraction has 897 states and 946 transitions. [2018-10-10 14:55:44,636 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-10 14:55:44,636 INFO L276 IsEmpty]: Start isEmpty. Operand 897 states and 946 transitions. [2018-10-10 14:55:44,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-10-10 14:55:44,637 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:44,637 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:44,637 INFO L424 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:44,638 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:44,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1677546018, now seen corresponding path program 1 times [2018-10-10 14:55:44,638 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:44,638 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:44,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:44,639 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:44,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:44,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:45,522 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:45,522 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:55:45,522 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:55:45,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:45,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:45,575 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:55:45,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:55:45,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:55:45,654 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:45,656 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:45,660 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:45,660 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:7 [2018-10-10 14:55:45,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 14:55:45,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2018-10-10 14:55:45,713 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:55:45,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:45,715 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:55:45,715 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-10-10 14:55:45,935 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:45,956 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:55:45,956 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14] total 28 [2018-10-10 14:55:45,969 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_35.bpl [2018-10-10 14:55:45,970 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-10-10 14:55:45,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-10-10 14:55:45,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=735, Unknown=0, NotChecked=0, Total=812 [2018-10-10 14:55:45,972 INFO L87 Difference]: Start difference. First operand 897 states and 946 transitions. Second operand 29 states. [2018-10-10 14:55:49,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:49,996 INFO L93 Difference]: Finished difference Result 1202 states and 1248 transitions. [2018-10-10 14:55:49,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-10-10 14:55:49,996 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 126 [2018-10-10 14:55:49,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:50,002 INFO L225 Difference]: With dead ends: 1202 [2018-10-10 14:55:50,003 INFO L226 Difference]: Without dead ends: 1202 [2018-10-10 14:55:50,004 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1195 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=919, Invalid=4337, Unknown=0, NotChecked=0, Total=5256 [2018-10-10 14:55:50,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1202 states. [2018-10-10 14:55:50,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1202 to 933. [2018-10-10 14:55:50,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 933 states. [2018-10-10 14:55:50,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 933 states to 933 states and 986 transitions. [2018-10-10 14:55:50,017 INFO L78 Accepts]: Start accepts. Automaton has 933 states and 986 transitions. Word has length 126 [2018-10-10 14:55:50,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:50,018 INFO L481 AbstractCegarLoop]: Abstraction has 933 states and 986 transitions. [2018-10-10 14:55:50,018 INFO L482 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-10-10 14:55:50,018 INFO L276 IsEmpty]: Start isEmpty. Operand 933 states and 986 transitions. [2018-10-10 14:55:50,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-10-10 14:55:50,019 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:50,020 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:50,020 INFO L424 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:50,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:50,020 INFO L82 PathProgramCache]: Analyzing trace with hash 1577361654, now seen corresponding path program 1 times [2018-10-10 14:55:50,021 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:50,021 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:50,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:50,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:50,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:50,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:50,459 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-10-10 14:55:50,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:50,609 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:50,609 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-10-10 14:55:50,609 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-10 14:55:50,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-10 14:55:50,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-10-10 14:55:50,610 INFO L87 Difference]: Start difference. First operand 933 states and 986 transitions. Second operand 16 states. [2018-10-10 14:55:52,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:52,711 INFO L93 Difference]: Finished difference Result 1176 states and 1221 transitions. [2018-10-10 14:55:52,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-10-10 14:55:52,711 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 127 [2018-10-10 14:55:52,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:52,716 INFO L225 Difference]: With dead ends: 1176 [2018-10-10 14:55:52,717 INFO L226 Difference]: Without dead ends: 1176 [2018-10-10 14:55:52,718 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 658 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=452, Invalid=2200, Unknown=0, NotChecked=0, Total=2652 [2018-10-10 14:55:52,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1176 states. [2018-10-10 14:55:52,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1176 to 946. [2018-10-10 14:55:52,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 946 states. [2018-10-10 14:55:52,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 946 states to 946 states and 1000 transitions. [2018-10-10 14:55:52,730 INFO L78 Accepts]: Start accepts. Automaton has 946 states and 1000 transitions. Word has length 127 [2018-10-10 14:55:52,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:52,731 INFO L481 AbstractCegarLoop]: Abstraction has 946 states and 1000 transitions. [2018-10-10 14:55:52,731 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-10 14:55:52,731 INFO L276 IsEmpty]: Start isEmpty. Operand 946 states and 1000 transitions. [2018-10-10 14:55:52,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-10-10 14:55:52,732 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:52,732 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:52,733 INFO L424 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:52,733 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:52,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1108216492, now seen corresponding path program 1 times [2018-10-10 14:55:52,733 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:52,733 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:52,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:52,734 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:52,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:52,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:52,983 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:52,983 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:55:52,983 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:55:52,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:53,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:53,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:55:53,241 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:55:53,263 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-10-10 14:55:53,263 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 18 [2018-10-10 14:55:53,263 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-10 14:55:53,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-10 14:55:53,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2018-10-10 14:55:53,266 INFO L87 Difference]: Start difference. First operand 946 states and 1000 transitions. Second operand 19 states. [2018-10-10 14:55:56,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:56,326 INFO L93 Difference]: Finished difference Result 1191 states and 1257 transitions. [2018-10-10 14:55:56,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-10-10 14:55:56,327 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 130 [2018-10-10 14:55:56,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:56,332 INFO L225 Difference]: With dead ends: 1191 [2018-10-10 14:55:56,332 INFO L226 Difference]: Without dead ends: 1191 [2018-10-10 14:55:56,333 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 820 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=844, Invalid=2578, Unknown=0, NotChecked=0, Total=3422 [2018-10-10 14:55:56,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1191 states. [2018-10-10 14:55:56,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1191 to 945. [2018-10-10 14:55:56,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 945 states. [2018-10-10 14:55:56,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 945 states to 945 states and 999 transitions. [2018-10-10 14:55:56,342 INFO L78 Accepts]: Start accepts. Automaton has 945 states and 999 transitions. Word has length 130 [2018-10-10 14:55:56,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:56,342 INFO L481 AbstractCegarLoop]: Abstraction has 945 states and 999 transitions. [2018-10-10 14:55:56,343 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-10 14:55:56,343 INFO L276 IsEmpty]: Start isEmpty. Operand 945 states and 999 transitions. [2018-10-10 14:55:56,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-10-10 14:55:56,346 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:56,346 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:56,347 INFO L424 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:56,347 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:56,347 INFO L82 PathProgramCache]: Analyzing trace with hash 280718634, now seen corresponding path program 2 times [2018-10-10 14:55:56,347 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:56,348 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:56,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:56,349 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:55:56,349 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:56,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:56,720 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-10-10 14:55:56,720 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:56,720 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-10-10 14:55:56,721 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-10 14:55:56,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-10 14:55:56,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2018-10-10 14:55:56,721 INFO L87 Difference]: Start difference. First operand 945 states and 999 transitions. Second operand 16 states. [2018-10-10 14:55:58,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:55:58,306 INFO L93 Difference]: Finished difference Result 1021 states and 1044 transitions. [2018-10-10 14:55:58,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-10-10 14:55:58,307 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 138 [2018-10-10 14:55:58,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:55:58,312 INFO L225 Difference]: With dead ends: 1021 [2018-10-10 14:55:58,312 INFO L226 Difference]: Without dead ends: 1021 [2018-10-10 14:55:58,313 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=588, Invalid=1668, Unknown=0, NotChecked=0, Total=2256 [2018-10-10 14:55:58,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1021 states. [2018-10-10 14:55:58,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1021 to 854. [2018-10-10 14:55:58,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 854 states. [2018-10-10 14:55:58,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 854 states to 854 states and 899 transitions. [2018-10-10 14:55:58,324 INFO L78 Accepts]: Start accepts. Automaton has 854 states and 899 transitions. Word has length 138 [2018-10-10 14:55:58,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:55:58,324 INFO L481 AbstractCegarLoop]: Abstraction has 854 states and 899 transitions. [2018-10-10 14:55:58,324 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-10 14:55:58,324 INFO L276 IsEmpty]: Start isEmpty. Operand 854 states and 899 transitions. [2018-10-10 14:55:58,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-10 14:55:58,325 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:55:58,325 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:55:58,326 INFO L424 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:55:58,326 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:55:58,326 INFO L82 PathProgramCache]: Analyzing trace with hash 483332706, now seen corresponding path program 1 times [2018-10-10 14:55:58,326 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:55:58,326 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:55:58,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:58,327 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-10 14:55:58,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:55:58,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:55:59,232 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-10 14:55:59,232 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:55:59,232 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-10 14:55:59,233 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-10 14:55:59,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-10 14:55:59,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-10-10 14:55:59,233 INFO L87 Difference]: Start difference. First operand 854 states and 899 transitions. Second operand 12 states. [2018-10-10 14:56:00,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:00,218 INFO L93 Difference]: Finished difference Result 958 states and 985 transitions. [2018-10-10 14:56:00,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-10 14:56:00,218 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 139 [2018-10-10 14:56:00,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:00,223 INFO L225 Difference]: With dead ends: 958 [2018-10-10 14:56:00,223 INFO L226 Difference]: Without dead ends: 958 [2018-10-10 14:56:00,224 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=214, Invalid=778, Unknown=0, NotChecked=0, Total=992 [2018-10-10 14:56:00,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 958 states. [2018-10-10 14:56:00,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 958 to 825. [2018-10-10 14:56:00,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 825 states. [2018-10-10 14:56:00,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 825 states to 825 states and 862 transitions. [2018-10-10 14:56:00,234 INFO L78 Accepts]: Start accepts. Automaton has 825 states and 862 transitions. Word has length 139 [2018-10-10 14:56:00,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:00,234 INFO L481 AbstractCegarLoop]: Abstraction has 825 states and 862 transitions. [2018-10-10 14:56:00,234 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-10 14:56:00,235 INFO L276 IsEmpty]: Start isEmpty. Operand 825 states and 862 transitions. [2018-10-10 14:56:00,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-10-10 14:56:00,239 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:00,239 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:00,239 INFO L424 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:00,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:00,240 INFO L82 PathProgramCache]: Analyzing trace with hash -1276223874, now seen corresponding path program 1 times [2018-10-10 14:56:00,240 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:00,240 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:00,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:00,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:00,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:00,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:00,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:00,846 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:00,846 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:00,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:00,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:00,909 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:00,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:56:00,920 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:00,922 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:00,922 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:56:00,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:00,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:00,991 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:00,993 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:01,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:01,012 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,013 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,018 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,019 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:28, output treesize:20 [2018-10-10 14:56:01,031 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:01,032 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:01,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:01,032 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,037 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:19 [2018-10-10 14:56:01,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-10 14:56:01,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:01,309 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-10-10 14:56:01,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:01,337 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,344 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:01,355 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:39 [2018-10-10 14:56:02,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-10-10 14:56:02,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-10-10 14:56:02,017 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:02,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-10-10 14:56:02,028 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:56:02,041 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:56:02,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-10-10 14:56:02,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-10-10 14:56:02,056 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:02,061 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:02,066 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:02,067 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:69, output treesize:7 [2018-10-10 14:56:02,210 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:02,231 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:56:02,232 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23] total 31 [2018-10-10 14:56:02,244 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_40.bpl [2018-10-10 14:56:02,246 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-10-10 14:56:02,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-10-10 14:56:02,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=826, Unknown=34, NotChecked=0, Total=930 [2018-10-10 14:56:02,247 INFO L87 Difference]: Start difference. First operand 825 states and 862 transitions. Second operand 31 states. [2018-10-10 14:56:08,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:08,774 INFO L93 Difference]: Finished difference Result 1069 states and 1110 transitions. [2018-10-10 14:56:08,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-10-10 14:56:08,774 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 140 [2018-10-10 14:56:08,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:08,777 INFO L225 Difference]: With dead ends: 1069 [2018-10-10 14:56:08,777 INFO L226 Difference]: Without dead ends: 1069 [2018-10-10 14:56:08,779 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 128 SyntacticMatches, 9 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1475 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=600, Invalid=5351, Unknown=55, NotChecked=0, Total=6006 [2018-10-10 14:56:08,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1069 states. [2018-10-10 14:56:08,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1069 to 847. [2018-10-10 14:56:08,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 847 states. [2018-10-10 14:56:08,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 847 states to 847 states and 884 transitions. [2018-10-10 14:56:08,789 INFO L78 Accepts]: Start accepts. Automaton has 847 states and 884 transitions. Word has length 140 [2018-10-10 14:56:08,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:08,789 INFO L481 AbstractCegarLoop]: Abstraction has 847 states and 884 transitions. [2018-10-10 14:56:08,789 INFO L482 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-10-10 14:56:08,789 INFO L276 IsEmpty]: Start isEmpty. Operand 847 states and 884 transitions. [2018-10-10 14:56:08,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-10-10 14:56:08,790 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:08,791 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:08,791 INFO L424 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:08,791 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:08,792 INFO L82 PathProgramCache]: Analyzing trace with hash 283522564, now seen corresponding path program 1 times [2018-10-10 14:56:08,792 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:08,792 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:08,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:08,793 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:08,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:08,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:09,546 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:09,546 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:09,546 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:09,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:09,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:09,604 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:09,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:56:09,606 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:09,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:09,612 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:56:09,662 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:09,664 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:09,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:09,665 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:09,669 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:09,670 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-10-10 14:56:09,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:09,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:09,689 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:09,701 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:09,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:09,712 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15 [2018-10-10 14:56:10,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-10-10 14:56:10,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:56:10,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:10,014 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:10,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:10,021 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:18 [2018-10-10 14:56:10,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-10 14:56:10,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-10 14:56:10,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:10,197 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:10,203 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:10,203 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-10-10 14:56:10,316 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:10,337 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:56:10,337 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 25] total 34 [2018-10-10 14:56:10,349 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_41.bpl [2018-10-10 14:56:10,350 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-10-10 14:56:10,350 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-10-10 14:56:10,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=1103, Unknown=0, NotChecked=0, Total=1190 [2018-10-10 14:56:10,351 INFO L87 Difference]: Start difference. First operand 847 states and 884 transitions. Second operand 35 states. [2018-10-10 14:56:17,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:17,201 INFO L93 Difference]: Finished difference Result 1198 states and 1241 transitions. [2018-10-10 14:56:17,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-10-10 14:56:17,202 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 140 [2018-10-10 14:56:17,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:17,205 INFO L225 Difference]: With dead ends: 1198 [2018-10-10 14:56:17,205 INFO L226 Difference]: Without dead ends: 1198 [2018-10-10 14:56:17,208 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 124 SyntacticMatches, 10 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1656 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=923, Invalid=6049, Unknown=0, NotChecked=0, Total=6972 [2018-10-10 14:56:17,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1198 states. [2018-10-10 14:56:17,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1198 to 880. [2018-10-10 14:56:17,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 880 states. [2018-10-10 14:56:17,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 880 states to 880 states and 920 transitions. [2018-10-10 14:56:17,215 INFO L78 Accepts]: Start accepts. Automaton has 880 states and 920 transitions. Word has length 140 [2018-10-10 14:56:17,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:17,216 INFO L481 AbstractCegarLoop]: Abstraction has 880 states and 920 transitions. [2018-10-10 14:56:17,216 INFO L482 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-10-10 14:56:17,216 INFO L276 IsEmpty]: Start isEmpty. Operand 880 states and 920 transitions. [2018-10-10 14:56:17,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-10-10 14:56:17,217 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:17,217 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:17,217 INFO L424 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:17,218 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:17,218 INFO L82 PathProgramCache]: Analyzing trace with hash 199265104, now seen corresponding path program 1 times [2018-10-10 14:56:17,218 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:17,218 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:17,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:17,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:17,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:17,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:18,002 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:18,002 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:18,002 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:18,017 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:18,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:18,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:18,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:56:18,069 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,072 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:56:18,090 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:18,092 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:18,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:18,093 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,103 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,103 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-10-10 14:56:18,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:18,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:18,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,272 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:18,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:18,289 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,290 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,299 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:33, output treesize:22 [2018-10-10 14:56:18,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-10-10 14:56:18,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:56:18,711 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,721 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-10 14:56:18,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-10 14:56:18,741 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,748 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,759 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:18,759 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:63, output treesize:25 [2018-10-10 14:56:19,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-10 14:56:19,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-10 14:56:19,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:19,080 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:19,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 14:56:19,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-10 14:56:19,103 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:19,128 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:19,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:19,163 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:9 [2018-10-10 14:56:20,769 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:20,789 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:56:20,790 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 28] total 49 [2018-10-10 14:56:20,799 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_42.bpl [2018-10-10 14:56:20,800 INFO L460 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-10-10 14:56:20,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-10-10 14:56:20,801 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=2327, Unknown=0, NotChecked=0, Total=2450 [2018-10-10 14:56:20,801 INFO L87 Difference]: Start difference. First operand 880 states and 920 transitions. Second operand 50 states. [2018-10-10 14:56:22,998 WARN L178 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 57 [2018-10-10 14:56:23,351 WARN L178 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 63 [2018-10-10 14:56:23,842 WARN L178 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 122 DAG size of output: 69 [2018-10-10 14:56:24,135 WARN L178 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 71 [2018-10-10 14:56:25,551 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 51 [2018-10-10 14:56:26,980 WARN L178 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 53 [2018-10-10 14:56:27,837 WARN L178 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 54 [2018-10-10 14:56:28,940 WARN L178 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 59 [2018-10-10 14:56:29,213 WARN L178 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 57 [2018-10-10 14:56:29,479 WARN L178 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 57 [2018-10-10 14:56:29,883 WARN L178 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 59 [2018-10-10 14:56:30,152 WARN L178 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 56 [2018-10-10 14:56:34,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:34,104 INFO L93 Difference]: Finished difference Result 1185 states and 1228 transitions. [2018-10-10 14:56:34,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-10-10 14:56:34,104 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 141 [2018-10-10 14:56:34,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:34,107 INFO L225 Difference]: With dead ends: 1185 [2018-10-10 14:56:34,107 INFO L226 Difference]: Without dead ends: 1185 [2018-10-10 14:56:34,108 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1675 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=1058, Invalid=8448, Unknown=0, NotChecked=0, Total=9506 [2018-10-10 14:56:34,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1185 states. [2018-10-10 14:56:34,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1185 to 881. [2018-10-10 14:56:34,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 881 states. [2018-10-10 14:56:34,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 881 states to 881 states and 920 transitions. [2018-10-10 14:56:34,115 INFO L78 Accepts]: Start accepts. Automaton has 881 states and 920 transitions. Word has length 141 [2018-10-10 14:56:34,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:34,115 INFO L481 AbstractCegarLoop]: Abstraction has 881 states and 920 transitions. [2018-10-10 14:56:34,115 INFO L482 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-10-10 14:56:34,116 INFO L276 IsEmpty]: Start isEmpty. Operand 881 states and 920 transitions. [2018-10-10 14:56:34,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-10-10 14:56:34,117 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:34,117 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:34,117 INFO L424 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:34,118 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:34,118 INFO L82 PathProgramCache]: Analyzing trace with hash 306701441, now seen corresponding path program 1 times [2018-10-10 14:56:34,118 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:34,118 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:34,119 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:34,119 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:34,119 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:34,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:34,731 WARN L178 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 9 [2018-10-10 14:56:34,882 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:34,883 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:34,883 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-10-10 14:56:34,883 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:56:34,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:56:34,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:56:34,884 INFO L87 Difference]: Start difference. First operand 881 states and 920 transitions. Second operand 13 states. [2018-10-10 14:56:35,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:35,919 INFO L93 Difference]: Finished difference Result 1022 states and 1043 transitions. [2018-10-10 14:56:35,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-10 14:56:35,920 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 147 [2018-10-10 14:56:35,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:35,922 INFO L225 Difference]: With dead ends: 1022 [2018-10-10 14:56:35,922 INFO L226 Difference]: Without dead ends: 1022 [2018-10-10 14:56:35,923 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=301, Invalid=821, Unknown=0, NotChecked=0, Total=1122 [2018-10-10 14:56:35,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1022 states. [2018-10-10 14:56:35,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1022 to 846. [2018-10-10 14:56:35,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2018-10-10 14:56:35,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 879 transitions. [2018-10-10 14:56:35,930 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 879 transitions. Word has length 147 [2018-10-10 14:56:35,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:35,930 INFO L481 AbstractCegarLoop]: Abstraction has 846 states and 879 transitions. [2018-10-10 14:56:35,930 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:56:35,931 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 879 transitions. [2018-10-10 14:56:35,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-10-10 14:56:35,932 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:35,932 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:35,932 INFO L424 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:35,932 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:35,933 INFO L82 PathProgramCache]: Analyzing trace with hash -1530787877, now seen corresponding path program 1 times [2018-10-10 14:56:35,933 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:35,933 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:35,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:35,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:35,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:35,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:36,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:36,271 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-10 14:56:36,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-10-10 14:56:36,271 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-10 14:56:36,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-10 14:56:36,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2018-10-10 14:56:36,272 INFO L87 Difference]: Start difference. First operand 846 states and 879 transitions. Second operand 18 states. [2018-10-10 14:56:39,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:39,042 INFO L93 Difference]: Finished difference Result 1008 states and 1031 transitions. [2018-10-10 14:56:39,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-10-10 14:56:39,042 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 148 [2018-10-10 14:56:39,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:39,044 INFO L225 Difference]: With dead ends: 1008 [2018-10-10 14:56:39,044 INFO L226 Difference]: Without dead ends: 1008 [2018-10-10 14:56:39,045 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 418 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=444, Invalid=1448, Unknown=0, NotChecked=0, Total=1892 [2018-10-10 14:56:39,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1008 states. [2018-10-10 14:56:39,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1008 to 929. [2018-10-10 14:56:39,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 929 states. [2018-10-10 14:56:39,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 929 states to 929 states and 968 transitions. [2018-10-10 14:56:39,052 INFO L78 Accepts]: Start accepts. Automaton has 929 states and 968 transitions. Word has length 148 [2018-10-10 14:56:39,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:39,052 INFO L481 AbstractCegarLoop]: Abstraction has 929 states and 968 transitions. [2018-10-10 14:56:39,052 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-10 14:56:39,052 INFO L276 IsEmpty]: Start isEmpty. Operand 929 states and 968 transitions. [2018-10-10 14:56:39,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-10-10 14:56:39,053 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:39,053 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:39,054 INFO L424 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:39,054 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:39,054 INFO L82 PathProgramCache]: Analyzing trace with hash -451362694, now seen corresponding path program 1 times [2018-10-10 14:56:39,054 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:39,054 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:39,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:39,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:39,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:39,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:39,252 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:39,253 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:39,253 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:39,260 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:39,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:39,309 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:39,353 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:39,354 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:39,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-10 14:56:39,355 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:39,363 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:56:39,364 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-10-10 14:56:39,437 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:39,457 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:56:39,457 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 12 [2018-10-10 14:56:39,466 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_45.bpl [2018-10-10 14:56:39,467 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-10 14:56:39,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-10 14:56:39,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-10-10 14:56:39,468 INFO L87 Difference]: Start difference. First operand 929 states and 968 transitions. Second operand 13 states. [2018-10-10 14:56:40,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:40,931 INFO L93 Difference]: Finished difference Result 1303 states and 1339 transitions. [2018-10-10 14:56:40,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-10-10 14:56:40,932 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 149 [2018-10-10 14:56:40,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:40,934 INFO L225 Difference]: With dead ends: 1303 [2018-10-10 14:56:40,934 INFO L226 Difference]: Without dead ends: 1303 [2018-10-10 14:56:40,935 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 143 SyntacticMatches, 5 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=187, Invalid=569, Unknown=0, NotChecked=0, Total=756 [2018-10-10 14:56:40,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1303 states. [2018-10-10 14:56:40,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1303 to 979. [2018-10-10 14:56:40,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 979 states. [2018-10-10 14:56:40,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 979 states to 979 states and 1018 transitions. [2018-10-10 14:56:40,942 INFO L78 Accepts]: Start accepts. Automaton has 979 states and 1018 transitions. Word has length 149 [2018-10-10 14:56:40,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:40,942 INFO L481 AbstractCegarLoop]: Abstraction has 979 states and 1018 transitions. [2018-10-10 14:56:40,942 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-10 14:56:40,943 INFO L276 IsEmpty]: Start isEmpty. Operand 979 states and 1018 transitions. [2018-10-10 14:56:40,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-10-10 14:56:40,943 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:40,943 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:40,944 INFO L424 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:40,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:40,944 INFO L82 PathProgramCache]: Analyzing trace with hash -1107341343, now seen corresponding path program 1 times [2018-10-10 14:56:40,944 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:40,945 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:40,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:40,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:40,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:40,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:41,564 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:41,565 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:41,565 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:41,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:41,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:41,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:41,917 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:41,918 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:41,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:41,919 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:41,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:41,924 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:21, output treesize:15 [2018-10-10 14:56:41,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-10 14:56:41,963 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:41,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:41,970 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:11 [2018-10-10 14:56:42,096 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:42,116 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:56:42,117 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 13] total 36 [2018-10-10 14:56:42,126 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_46.bpl [2018-10-10 14:56:42,127 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-10-10 14:56:42,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-10-10 14:56:42,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=1175, Unknown=0, NotChecked=0, Total=1260 [2018-10-10 14:56:42,128 INFO L87 Difference]: Start difference. First operand 979 states and 1018 transitions. Second operand 36 states. [2018-10-10 14:56:44,099 WARN L178 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 53 [2018-10-10 14:56:44,518 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2018-10-10 14:56:44,807 WARN L178 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 69 [2018-10-10 14:56:45,212 WARN L178 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 74 [2018-10-10 14:56:45,484 WARN L178 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 77 [2018-10-10 14:56:51,227 WARN L178 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 58 [2018-10-10 14:56:54,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:56:54,755 INFO L93 Difference]: Finished difference Result 1405 states and 1433 transitions. [2018-10-10 14:56:54,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2018-10-10 14:56:54,755 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 150 [2018-10-10 14:56:54,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:56:54,759 INFO L225 Difference]: With dead ends: 1405 [2018-10-10 14:56:54,759 INFO L226 Difference]: Without dead ends: 1405 [2018-10-10 14:56:54,760 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3676 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=2178, Invalid=11162, Unknown=0, NotChecked=0, Total=13340 [2018-10-10 14:56:54,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1405 states. [2018-10-10 14:56:54,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1405 to 971. [2018-10-10 14:56:54,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 971 states. [2018-10-10 14:56:54,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 971 states to 971 states and 1010 transitions. [2018-10-10 14:56:54,771 INFO L78 Accepts]: Start accepts. Automaton has 971 states and 1010 transitions. Word has length 150 [2018-10-10 14:56:54,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:56:54,772 INFO L481 AbstractCegarLoop]: Abstraction has 971 states and 1010 transitions. [2018-10-10 14:56:54,772 INFO L482 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-10-10 14:56:54,772 INFO L276 IsEmpty]: Start isEmpty. Operand 971 states and 1010 transitions. [2018-10-10 14:56:54,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-10-10 14:56:54,773 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:56:54,774 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:56:54,774 INFO L424 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:56:54,774 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:56:54,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1503218968, now seen corresponding path program 1 times [2018-10-10 14:56:54,775 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:56:54,775 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:56:54,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:54,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:54,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:56:54,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:55,563 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:55,563 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:56:55,563 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:56:55,571 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:56:55,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:56:55,630 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:56:55,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:56:55,653 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,703 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-10 14:56:55,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:56:55,721 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,792 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,793 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-10-10 14:56:55,870 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:55,871 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:55,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:55,872 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,879 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,880 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:16 [2018-10-10 14:56:55,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-10 14:56:55,884 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,892 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:55,892 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:16 [2018-10-10 14:56:56,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:56:56,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:56:56,074 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,076 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,086 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,086 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:25 [2018-10-10 14:56:56,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-10-10 14:56:56,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-10-10 14:56:56,165 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,167 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,174 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,174 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:18 [2018-10-10 14:56:56,280 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:56,281 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:56:56,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:56:56,282 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,289 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,289 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:13 [2018-10-10 14:56:56,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-10 14:56:56,314 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:56:56,322 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:19, output treesize:9 [2018-10-10 14:56:56,431 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:56:56,452 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:56:56,452 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 32 [2018-10-10 14:56:56,462 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_47.bpl [2018-10-10 14:56:56,463 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-10-10 14:56:56,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-10-10 14:56:56,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=113, Invalid=943, Unknown=0, NotChecked=0, Total=1056 [2018-10-10 14:56:56,464 INFO L87 Difference]: Start difference. First operand 971 states and 1010 transitions. Second operand 33 states. [2018-10-10 14:56:58,441 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 55 [2018-10-10 14:56:58,787 WARN L178 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 58 [2018-10-10 14:56:58,959 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 61 [2018-10-10 14:57:02,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:57:02,842 INFO L93 Difference]: Finished difference Result 1209 states and 1250 transitions. [2018-10-10 14:57:02,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-10-10 14:57:02,842 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 163 [2018-10-10 14:57:02,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:57:02,845 INFO L225 Difference]: With dead ends: 1209 [2018-10-10 14:57:02,845 INFO L226 Difference]: Without dead ends: 1209 [2018-10-10 14:57:02,846 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 153 SyntacticMatches, 6 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1558 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=1133, Invalid=5029, Unknown=0, NotChecked=0, Total=6162 [2018-10-10 14:57:02,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1209 states. [2018-10-10 14:57:02,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1209 to 971. [2018-10-10 14:57:02,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 971 states. [2018-10-10 14:57:02,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 971 states to 971 states and 1009 transitions. [2018-10-10 14:57:02,855 INFO L78 Accepts]: Start accepts. Automaton has 971 states and 1009 transitions. Word has length 163 [2018-10-10 14:57:02,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:57:02,856 INFO L481 AbstractCegarLoop]: Abstraction has 971 states and 1009 transitions. [2018-10-10 14:57:02,856 INFO L482 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-10-10 14:57:02,856 INFO L276 IsEmpty]: Start isEmpty. Operand 971 states and 1009 transitions. [2018-10-10 14:57:02,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2018-10-10 14:57:02,857 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:57:02,857 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:57:02,857 INFO L424 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:57:02,858 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:57:02,858 INFO L82 PathProgramCache]: Analyzing trace with hash -82585450, now seen corresponding path program 1 times [2018-10-10 14:57:02,858 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:57:02,858 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:57:02,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:02,859 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:02,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:02,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:03,964 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-10 14:57:03,964 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:57:03,964 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:57:03,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:04,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:04,020 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:57:04,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:04,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:04,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:04,269 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:04,273 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:04,274 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:8 [2018-10-10 14:57:04,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-10-10 14:57:04,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 13 [2018-10-10 14:57:04,346 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-10 14:57:04,350 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:04,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:04,354 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:9 [2018-10-10 14:57:04,452 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-10 14:57:04,473 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:57:04,474 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 17] total 23 [2018-10-10 14:57:04,482 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_48.bpl [2018-10-10 14:57:04,483 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-10-10 14:57:04,483 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-10-10 14:57:04,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=456, Unknown=0, NotChecked=0, Total=506 [2018-10-10 14:57:04,484 INFO L87 Difference]: Start difference. First operand 971 states and 1009 transitions. Second operand 23 states. [2018-10-10 14:57:06,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:57:06,783 INFO L93 Difference]: Finished difference Result 1106 states and 1135 transitions. [2018-10-10 14:57:06,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-10-10 14:57:06,784 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 165 [2018-10-10 14:57:06,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:57:06,786 INFO L225 Difference]: With dead ends: 1106 [2018-10-10 14:57:06,786 INFO L226 Difference]: Without dead ends: 1106 [2018-10-10 14:57:06,787 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 154 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 581 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=489, Invalid=2591, Unknown=0, NotChecked=0, Total=3080 [2018-10-10 14:57:06,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2018-10-10 14:57:06,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1025. [2018-10-10 14:57:06,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1025 states. [2018-10-10 14:57:06,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1025 states to 1025 states and 1067 transitions. [2018-10-10 14:57:06,795 INFO L78 Accepts]: Start accepts. Automaton has 1025 states and 1067 transitions. Word has length 165 [2018-10-10 14:57:06,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:57:06,795 INFO L481 AbstractCegarLoop]: Abstraction has 1025 states and 1067 transitions. [2018-10-10 14:57:06,795 INFO L482 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-10-10 14:57:06,795 INFO L276 IsEmpty]: Start isEmpty. Operand 1025 states and 1067 transitions. [2018-10-10 14:57:06,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-10-10 14:57:06,796 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:57:06,796 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:57:06,797 INFO L424 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:57:06,797 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:57:06,797 INFO L82 PathProgramCache]: Analyzing trace with hash -2054207688, now seen corresponding path program 1 times [2018-10-10 14:57:06,797 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:57:06,797 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:57:06,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:06,798 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:06,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:06,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:07,422 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:07,422 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:57:07,422 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:57:07,431 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:07,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:07,488 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:57:07,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:57:07,504 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:07,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:07,509 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:57:07,518 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:07,519 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:07,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:57:07,520 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:07,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:07,521 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-10-10 14:57:07,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:07,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:07,650 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:07,651 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:07,656 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:07,657 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:12 [2018-10-10 14:57:08,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-10 14:57:08,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2018-10-10 14:57:08,071 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:08,182 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:08,193 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:08,194 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:25 [2018-10-10 14:57:08,496 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:08,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-10-10 14:57:08,497 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:08,504 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:57:08,504 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-10-10 14:57:08,678 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:08,713 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:57:08,713 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 51 [2018-10-10 14:57:08,725 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_49.bpl [2018-10-10 14:57:08,726 INFO L460 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-10-10 14:57:08,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-10-10 14:57:08,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=2517, Unknown=0, NotChecked=0, Total=2652 [2018-10-10 14:57:08,727 INFO L87 Difference]: Start difference. First operand 1025 states and 1067 transitions. Second operand 52 states. [2018-10-10 14:57:17,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:57:17,876 INFO L93 Difference]: Finished difference Result 1117 states and 1149 transitions. [2018-10-10 14:57:17,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-10-10 14:57:17,877 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 167 [2018-10-10 14:57:17,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:57:17,882 INFO L225 Difference]: With dead ends: 1117 [2018-10-10 14:57:17,882 INFO L226 Difference]: Without dead ends: 1117 [2018-10-10 14:57:17,884 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 142 SyntacticMatches, 4 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3278 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=1266, Invalid=11390, Unknown=0, NotChecked=0, Total=12656 [2018-10-10 14:57:17,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1117 states. [2018-10-10 14:57:17,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1117 to 989. [2018-10-10 14:57:17,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 989 states. [2018-10-10 14:57:17,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 989 states to 989 states and 1024 transitions. [2018-10-10 14:57:17,894 INFO L78 Accepts]: Start accepts. Automaton has 989 states and 1024 transitions. Word has length 167 [2018-10-10 14:57:17,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:57:17,894 INFO L481 AbstractCegarLoop]: Abstraction has 989 states and 1024 transitions. [2018-10-10 14:57:17,894 INFO L482 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-10-10 14:57:17,894 INFO L276 IsEmpty]: Start isEmpty. Operand 989 states and 1024 transitions. [2018-10-10 14:57:17,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-10-10 14:57:17,896 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:57:17,896 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:57:17,897 INFO L424 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:57:17,897 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:57:17,897 INFO L82 PathProgramCache]: Analyzing trace with hash 744071565, now seen corresponding path program 1 times [2018-10-10 14:57:17,897 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:57:17,897 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:57:17,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:17,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:17,899 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:17,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:18,532 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:18,532 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:57:18,532 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:57:18,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:18,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:18,596 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:57:18,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:18,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:18,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:18,841 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:18,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:18,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:18,851 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:18,853 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:18,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:18,859 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:26, output treesize:11 [2018-10-10 14:57:19,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-10 14:57:19,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 14 [2018-10-10 14:57:19,296 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:19,302 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-10 14:57:19,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-10 14:57:19,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:19,325 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-10-10 14:57:19,329 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-10 14:57:19,341 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-10-10 14:57:19,341 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:31, output treesize:43 [2018-10-10 14:57:19,652 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:19,673 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:57:19,673 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 27] total 44 [2018-10-10 14:57:19,682 WARN L240 PathProgramDumper]: Writing path program to file /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/dump/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_50.bpl [2018-10-10 14:57:19,683 INFO L460 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-10-10 14:57:19,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-10-10 14:57:19,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=1868, Unknown=0, NotChecked=0, Total=1980 [2018-10-10 14:57:19,684 INFO L87 Difference]: Start difference. First operand 989 states and 1024 transitions. Second operand 45 states. [2018-10-10 14:57:24,088 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 39 [2018-10-10 14:57:24,265 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 44 [2018-10-10 14:57:24,430 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 45 [2018-10-10 14:57:25,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-10 14:57:25,869 INFO L93 Difference]: Finished difference Result 1072 states and 1096 transitions. [2018-10-10 14:57:25,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-10-10 14:57:25,870 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 168 [2018-10-10 14:57:25,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-10 14:57:25,872 INFO L225 Difference]: With dead ends: 1072 [2018-10-10 14:57:25,872 INFO L226 Difference]: Without dead ends: 1072 [2018-10-10 14:57:25,873 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 144 SyntacticMatches, 1 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1633 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1067, Invalid=6589, Unknown=0, NotChecked=0, Total=7656 [2018-10-10 14:57:25,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states. [2018-10-10 14:57:25,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 973. [2018-10-10 14:57:25,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 973 states. [2018-10-10 14:57:25,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 973 states to 973 states and 1006 transitions. [2018-10-10 14:57:25,882 INFO L78 Accepts]: Start accepts. Automaton has 973 states and 1006 transitions. Word has length 168 [2018-10-10 14:57:25,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-10 14:57:25,882 INFO L481 AbstractCegarLoop]: Abstraction has 973 states and 1006 transitions. [2018-10-10 14:57:25,882 INFO L482 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-10-10 14:57:25,883 INFO L276 IsEmpty]: Start isEmpty. Operand 973 states and 1006 transitions. [2018-10-10 14:57:25,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-10-10 14:57:25,883 INFO L367 BasicCegarLoop]: Found error trace [2018-10-10 14:57:25,884 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-10 14:57:25,884 INFO L424 AbstractCegarLoop]: === Iteration 51 === [ULTIMATE.startErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr40ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr42ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_FREE, ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-10 14:57:25,884 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-10 14:57:25,884 INFO L82 PathProgramCache]: Analyzing trace with hash 704851898, now seen corresponding path program 2 times [2018-10-10 14:57:25,884 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-10 14:57:25,885 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-10 14:57:25,885 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:25,885 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-10 14:57:25,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-10 14:57:25,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-10 14:57:26,652 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 24 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:26,653 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-10 14:57:26,653 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-10 14:57:26,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-10 14:57:26,716 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-10 14:57:26,716 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-10 14:57:26,720 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-10 14:57:26,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-10 14:57:26,727 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:26,730 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:26,730 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-10 14:57:26,910 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:26,910 INFO L700 Elim1Store]: detected not equals via solver [2018-10-10 14:57:26,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-10 14:57:26,911 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:26,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:26,918 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:14 [2018-10-10 14:57:27,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:27,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:27,033 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,035 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-10 14:57:27,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-10 14:57:27,052 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,055 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,066 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,066 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:36, output treesize:18 [2018-10-10 14:57:27,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-10 14:57:27,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 14:57:27,410 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,418 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-10-10 14:57:27,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-10-10 14:57:27,436 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,443 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,452 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:58, output treesize:42 [2018-10-10 14:57:27,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-10-10 14:57:27,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-10-10 14:57:27,951 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:57:27,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-10-10 14:57:27,961 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,968 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-10 14:57:27,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-10-10 14:57:27,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-10-10 14:57:27,981 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,986 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,992 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-10 14:57:27,992 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-10-10 14:57:28,136 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 24 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-10 14:57:28,156 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-10 14:57:28,156 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 49 [2018-10-10 14:57:28,157 WARN L550 AbstractCegarLoop]: Verification canceled [2018-10-10 14:57:28,162 WARN L205 ceAbstractionStarter]: Timeout [2018-10-10 14:57:28,163 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.10 02:57:28 BoogieIcfgContainer [2018-10-10 14:57:28,163 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-10 14:57:28,163 INFO L168 Benchmark]: Toolchain (without parser) took 174095.15 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.0 GB). Free memory was 1.4 GB in the beginning and 2.3 GB in the end (delta: -826.2 MB). Peak memory consumption was 185.7 MB. Max. memory is 7.1 GB. [2018-10-10 14:57:28,164 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-10 14:57:28,164 INFO L168 Benchmark]: CACSL2BoogieTranslator took 463.28 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 7.1 GB. [2018-10-10 14:57:28,164 INFO L168 Benchmark]: Boogie Procedure Inliner took 77.48 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-10 14:57:28,164 INFO L168 Benchmark]: Boogie Preprocessor took 137.42 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 752.4 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -834.8 MB). Peak memory consumption was 28.7 MB. Max. memory is 7.1 GB. [2018-10-10 14:57:28,165 INFO L168 Benchmark]: RCFGBuilder took 1813.73 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 80.9 MB). Peak memory consumption was 80.9 MB. Max. memory is 7.1 GB. [2018-10-10 14:57:28,165 INFO L168 Benchmark]: TraceAbstraction took 171595.33 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 259.5 MB). Free memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: -93.4 MB). Peak memory consumption was 166.2 MB. Max. memory is 7.1 GB. [2018-10-10 14:57:28,167 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 463.28 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 77.48 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 137.42 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 752.4 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -834.8 MB). Peak memory consumption was 28.7 MB. Max. memory is 7.1 GB. * RCFGBuilder took 1813.73 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 80.9 MB). Peak memory consumption was 80.9 MB. Max. memory is 7.1 GB. * TraceAbstraction took 171595.33 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 259.5 MB). Free memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: -93.4 MB). Peak memory consumption was 166.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: 1052]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1052). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: 985]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 985). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: 1052]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1052). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line -1). Cancelled while PathProgramDumpController was trying to verify (iteration 51). - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 368 locations, 43 error locations. TIMEOUT Result, 171.5s OverallTime, 51 OverallIterations, 3 TraceHistogramMax, 133.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 16322 SDtfs, 108043 SDslu, 130785 SDs, 0 SdLazy, 87443 SolverSat, 3793 SolverUnsat, 122 SolverUnknown, 0 SolverNotchecked, 69.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3976 GetRequests, 2125 SyntacticMatches, 61 SemanticMatches, 1790 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25599 ImplicationChecksByTransitivity, 76.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1025occurred in iteration=48, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 50 MinimizatonAttempts, 8127 StatesRemovedByMinimization, 50 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.0s SatisfiabilityAnalysisTime, 31.6s InterpolantComputationTime, 7425 NumberOfCodeBlocks, 7425 NumberOfCodeBlocksAsserted, 66 NumberOfCheckSat, 7359 ConstructedInterpolants, 109 QuantifiedInterpolants, 7253640 SizeOfPredicates, 416 NumberOfNonLiveVariables, 4884 ConjunctsInSsa, 711 ConjunctsInUnsatCore, 66 InterpolantComputations, 36 PerfectInterpolantSequences, 155/331 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Received shutdown request...