java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/complex_data_creation_test02_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 21:58:38,412 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 21:58:38,414 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 21:58:38,428 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 21:58:38,428 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 21:58:38,429 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 21:58:38,430 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 21:58:38,432 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 21:58:38,433 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 21:58:38,434 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 21:58:38,435 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 21:58:38,435 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 21:58:38,435 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 21:58:38,436 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 21:58:38,437 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 21:58:38,440 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 21:58:38,442 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 21:58:38,444 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 21:58:38,446 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 21:58:38,447 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 21:58:38,449 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-28 21:58:38,450 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-28 21:58:38,450 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-28 21:58:38,451 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-28 21:58:38,452 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-28 21:58:38,453 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-28 21:58:38,453 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-28 21:58:38,454 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-28 21:58:38,454 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-28 21:58:38,454 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 21:58:38,455 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 21:58:38,455 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 21:58:38,465 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 21:58:38,465 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 21:58:38,466 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 21:58:38,466 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 21:58:38,467 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 21:58:38,467 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 21:58:38,467 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 21:58:38,468 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 21:58:38,468 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 21:58:38,468 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 21:58:38,468 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 21:58:38,469 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 21:58:38,469 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 21:58:38,469 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 21:58:38,469 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 21:58:38,469 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 21:58:38,469 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 21:58:38,470 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 21:58:38,470 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 21:58:38,470 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 21:58:38,470 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 21:58:38,471 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 21:58:38,471 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 21:58:38,471 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 21:58:38,471 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 21:58:38,471 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 21:58:38,472 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 21:58:38,472 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 21:58:38,472 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 21:58:38,472 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 21:58:38,472 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 21:58:38,473 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 21:58:38,473 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 21:58:38,474 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 21:58:38,511 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 21:58:38,523 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 21:58:38,527 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 21:58:38,529 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 21:58:38,529 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 21:58:38,530 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/complex_data_creation_test02_false-valid-memtrack.i [2018-01-28 21:58:38,699 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 21:58:38,704 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 21:58:38,705 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 21:58:38,705 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 21:58:38,710 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 21:58:38,711 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,714 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3d4d4da0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38, skipping insertion in model container [2018-01-28 21:58:38,714 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,728 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 21:58:38,768 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 21:58:38,887 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 21:58:38,909 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 21:58:38,920 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38 WrapperNode [2018-01-28 21:58:38,920 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 21:58:38,921 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 21:58:38,921 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 21:58:38,922 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 21:58:38,938 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,938 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,952 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,953 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,962 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,967 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,968 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... [2018-01-28 21:58:38,971 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 21:58:38,971 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 21:58:38,971 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 21:58:38,971 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 21:58:38,973 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 21:58:39,022 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 21:58:39,022 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 21:58:39,022 INFO L136 BoogieDeclarations]: Found implementation of procedure create_data [2018-01-28 21:58:39,023 INFO L136 BoogieDeclarations]: Found implementation of procedure freeData [2018-01-28 21:58:39,023 INFO L136 BoogieDeclarations]: Found implementation of procedure append [2018-01-28 21:58:39,023 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 21:58:39,023 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 21:58:39,023 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 21:58:39,023 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 21:58:39,023 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 21:58:39,023 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 21:58:39,023 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure create_data [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure freeData [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure append [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 21:58:39,024 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 21:58:39,800 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 21:58:39,800 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 09:58:39 BoogieIcfgContainer [2018-01-28 21:58:39,801 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 21:58:39,802 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 21:58:39,802 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 21:58:39,805 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 21:58:39,805 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 09:58:38" (1/3) ... [2018-01-28 21:58:39,806 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@55367539 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 09:58:39, skipping insertion in model container [2018-01-28 21:58:39,806 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 09:58:38" (2/3) ... [2018-01-28 21:58:39,806 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@55367539 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 09:58:39, skipping insertion in model container [2018-01-28 21:58:39,806 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 09:58:39" (3/3) ... [2018-01-28 21:58:39,808 INFO L107 eAbstractionObserver]: Analyzing ICFG complex_data_creation_test02_false-valid-memtrack.i [2018-01-28 21:58:39,815 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 21:58:39,822 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 91 error locations. [2018-01-28 21:58:39,868 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 21:58:39,868 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 21:58:39,868 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 21:58:39,868 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 21:58:39,869 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 21:58:39,869 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 21:58:39,869 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 21:58:39,869 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 21:58:39,870 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 21:58:39,896 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states. [2018-01-28 21:58:39,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-28 21:58:39,901 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:39,902 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:39,902 INFO L371 AbstractCegarLoop]: === Iteration 1 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:39,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1520189232, now seen corresponding path program 1 times [2018-01-28 21:58:39,908 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:39,908 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:39,972 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:39,972 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:39,972 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:40,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:40,031 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:40,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:40,169 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:40,169 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 21:58:40,170 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 21:58:40,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 21:58:40,181 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 21:58:40,183 INFO L87 Difference]: Start difference. First operand 266 states. Second operand 3 states. [2018-01-28 21:58:40,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:40,469 INFO L93 Difference]: Finished difference Result 517 states and 558 transitions. [2018-01-28 21:58:40,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 21:58:40,471 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-01-28 21:58:40,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:40,486 INFO L225 Difference]: With dead ends: 517 [2018-01-28 21:58:40,486 INFO L226 Difference]: Without dead ends: 258 [2018-01-28 21:58:40,493 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 21:58:40,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2018-01-28 21:58:40,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 258. [2018-01-28 21:58:40,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-01-28 21:58:40,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 270 transitions. [2018-01-28 21:58:40,551 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 270 transitions. Word has length 8 [2018-01-28 21:58:40,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:40,551 INFO L432 AbstractCegarLoop]: Abstraction has 258 states and 270 transitions. [2018-01-28 21:58:40,551 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 21:58:40,552 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 270 transitions. [2018-01-28 21:58:40,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-28 21:58:40,552 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:40,552 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:40,552 INFO L371 AbstractCegarLoop]: === Iteration 2 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:40,553 INFO L82 PathProgramCache]: Analyzing trace with hash -1520189231, now seen corresponding path program 1 times [2018-01-28 21:58:40,553 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:40,553 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:40,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:40,554 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:40,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:40,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:40,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:40,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:40,615 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:40,616 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 21:58:40,617 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 21:58:40,618 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 21:58:40,618 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 21:58:40,618 INFO L87 Difference]: Start difference. First operand 258 states and 270 transitions. Second operand 3 states. [2018-01-28 21:58:40,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:40,863 INFO L93 Difference]: Finished difference Result 260 states and 273 transitions. [2018-01-28 21:58:40,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 21:58:40,893 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-01-28 21:58:40,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:40,897 INFO L225 Difference]: With dead ends: 260 [2018-01-28 21:58:40,897 INFO L226 Difference]: Without dead ends: 259 [2018-01-28 21:58:40,898 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 21:58:40,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-01-28 21:58:40,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 257. [2018-01-28 21:58:40,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257 states. [2018-01-28 21:58:40,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 269 transitions. [2018-01-28 21:58:40,916 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 269 transitions. Word has length 8 [2018-01-28 21:58:40,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:40,916 INFO L432 AbstractCegarLoop]: Abstraction has 257 states and 269 transitions. [2018-01-28 21:58:40,916 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 21:58:40,916 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 269 transitions. [2018-01-28 21:58:40,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 21:58:40,917 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:40,917 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:40,917 INFO L371 AbstractCegarLoop]: === Iteration 3 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:40,917 INFO L82 PathProgramCache]: Analyzing trace with hash 138897515, now seen corresponding path program 1 times [2018-01-28 21:58:40,917 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:40,917 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:40,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:40,918 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:40,919 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:40,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:40,940 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:41,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:41,010 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:41,011 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 21:58:41,011 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 21:58:41,011 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 21:58:41,011 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:41,012 INFO L87 Difference]: Start difference. First operand 257 states and 269 transitions. Second operand 5 states. [2018-01-28 21:58:41,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:41,244 INFO L93 Difference]: Finished difference Result 257 states and 269 transitions. [2018-01-28 21:58:41,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 21:58:41,245 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-01-28 21:58:41,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:41,246 INFO L225 Difference]: With dead ends: 257 [2018-01-28 21:58:41,246 INFO L226 Difference]: Without dead ends: 255 [2018-01-28 21:58:41,247 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 21:58:41,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2018-01-28 21:58:41,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 255. [2018-01-28 21:58:41,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 255 states. [2018-01-28 21:58:41,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 267 transitions. [2018-01-28 21:58:41,261 INFO L78 Accepts]: Start accepts. Automaton has 255 states and 267 transitions. Word has length 15 [2018-01-28 21:58:41,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:41,262 INFO L432 AbstractCegarLoop]: Abstraction has 255 states and 267 transitions. [2018-01-28 21:58:41,262 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 21:58:41,262 INFO L276 IsEmpty]: Start isEmpty. Operand 255 states and 267 transitions. [2018-01-28 21:58:41,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 21:58:41,263 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:41,263 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:41,263 INFO L371 AbstractCegarLoop]: === Iteration 4 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:41,263 INFO L82 PathProgramCache]: Analyzing trace with hash 138897516, now seen corresponding path program 1 times [2018-01-28 21:58:41,263 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:41,263 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:41,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:41,264 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:41,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:41,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:41,279 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:41,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:41,369 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:41,369 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 21:58:41,369 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 21:58:41,370 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 21:58:41,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-28 21:58:41,370 INFO L87 Difference]: Start difference. First operand 255 states and 267 transitions. Second operand 7 states. [2018-01-28 21:58:41,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:41,880 INFO L93 Difference]: Finished difference Result 279 states and 295 transitions. [2018-01-28 21:58:41,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 21:58:41,880 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-01-28 21:58:41,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:41,882 INFO L225 Difference]: With dead ends: 279 [2018-01-28 21:58:41,882 INFO L226 Difference]: Without dead ends: 277 [2018-01-28 21:58:41,882 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-01-28 21:58:41,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-01-28 21:58:41,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 264. [2018-01-28 21:58:41,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 264 states. [2018-01-28 21:58:41,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 279 transitions. [2018-01-28 21:58:41,893 INFO L78 Accepts]: Start accepts. Automaton has 264 states and 279 transitions. Word has length 15 [2018-01-28 21:58:41,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:41,894 INFO L432 AbstractCegarLoop]: Abstraction has 264 states and 279 transitions. [2018-01-28 21:58:41,894 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 21:58:41,894 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 279 transitions. [2018-01-28 21:58:41,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 21:58:41,894 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:41,894 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:41,894 INFO L371 AbstractCegarLoop]: === Iteration 5 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:41,895 INFO L82 PathProgramCache]: Analyzing trace with hash 10855949, now seen corresponding path program 1 times [2018-01-28 21:58:41,895 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:41,895 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:41,895 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:41,896 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:41,896 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:41,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:41,907 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:41,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:41,939 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:41,939 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 21:58:41,939 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 21:58:41,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 21:58:41,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 21:58:41,940 INFO L87 Difference]: Start difference. First operand 264 states and 279 transitions. Second operand 4 states. [2018-01-28 21:58:42,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:42,092 INFO L93 Difference]: Finished difference Result 264 states and 279 transitions. [2018-01-28 21:58:42,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 21:58:42,093 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-01-28 21:58:42,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:42,094 INFO L225 Difference]: With dead ends: 264 [2018-01-28 21:58:42,094 INFO L226 Difference]: Without dead ends: 262 [2018-01-28 21:58:42,094 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:42,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-01-28 21:58:42,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 262. [2018-01-28 21:58:42,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 262 states. [2018-01-28 21:58:42,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 276 transitions. [2018-01-28 21:58:42,103 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 276 transitions. Word has length 16 [2018-01-28 21:58:42,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:42,103 INFO L432 AbstractCegarLoop]: Abstraction has 262 states and 276 transitions. [2018-01-28 21:58:42,104 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 21:58:42,104 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 276 transitions. [2018-01-28 21:58:42,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 21:58:42,104 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:42,104 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:42,104 INFO L371 AbstractCegarLoop]: === Iteration 6 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:42,104 INFO L82 PathProgramCache]: Analyzing trace with hash 10855950, now seen corresponding path program 1 times [2018-01-28 21:58:42,105 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:42,105 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:42,105 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:42,105 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:42,106 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:42,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:42,115 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:42,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:42,148 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:42,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 21:58:42,148 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 21:58:42,149 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 21:58:42,149 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 21:58:42,149 INFO L87 Difference]: Start difference. First operand 262 states and 276 transitions. Second operand 4 states. [2018-01-28 21:58:42,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:42,299 INFO L93 Difference]: Finished difference Result 262 states and 276 transitions. [2018-01-28 21:58:42,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 21:58:42,299 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-01-28 21:58:42,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:42,301 INFO L225 Difference]: With dead ends: 262 [2018-01-28 21:58:42,301 INFO L226 Difference]: Without dead ends: 260 [2018-01-28 21:58:42,301 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:42,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states. [2018-01-28 21:58:42,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 260. [2018-01-28 21:58:42,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260 states. [2018-01-28 21:58:42,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 273 transitions. [2018-01-28 21:58:42,309 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 273 transitions. Word has length 16 [2018-01-28 21:58:42,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:42,310 INFO L432 AbstractCegarLoop]: Abstraction has 260 states and 273 transitions. [2018-01-28 21:58:42,310 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 21:58:42,310 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 273 transitions. [2018-01-28 21:58:42,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-28 21:58:42,311 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:42,311 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:42,311 INFO L371 AbstractCegarLoop]: === Iteration 7 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:42,311 INFO L82 PathProgramCache]: Analyzing trace with hash 505100658, now seen corresponding path program 1 times [2018-01-28 21:58:42,311 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:42,312 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:42,313 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:42,313 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:42,313 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:42,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:42,329 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:42,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:42,591 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:42,591 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-01-28 21:58:42,591 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 21:58:42,591 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 21:58:42,592 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2018-01-28 21:58:42,592 INFO L87 Difference]: Start difference. First operand 260 states and 273 transitions. Second operand 13 states. [2018-01-28 21:58:43,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:43,686 INFO L93 Difference]: Finished difference Result 505 states and 533 transitions. [2018-01-28 21:58:43,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 21:58:43,687 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 22 [2018-01-28 21:58:43,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:43,688 INFO L225 Difference]: With dead ends: 505 [2018-01-28 21:58:43,688 INFO L226 Difference]: Without dead ends: 263 [2018-01-28 21:58:43,689 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=78, Invalid=302, Unknown=0, NotChecked=0, Total=380 [2018-01-28 21:58:43,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-01-28 21:58:43,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 261. [2018-01-28 21:58:43,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2018-01-28 21:58:43,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 274 transitions. [2018-01-28 21:58:43,700 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 274 transitions. Word has length 22 [2018-01-28 21:58:43,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:43,700 INFO L432 AbstractCegarLoop]: Abstraction has 261 states and 274 transitions. [2018-01-28 21:58:43,701 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 21:58:43,701 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 274 transitions. [2018-01-28 21:58:43,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-28 21:58:43,701 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:43,702 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:43,702 INFO L371 AbstractCegarLoop]: === Iteration 8 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:43,702 INFO L82 PathProgramCache]: Analyzing trace with hash -836738536, now seen corresponding path program 1 times [2018-01-28 21:58:43,702 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:43,702 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:43,703 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:43,703 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:43,703 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:43,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:43,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:43,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:43,763 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:43,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 21:58:43,764 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 21:58:43,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 21:58:43,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:43,764 INFO L87 Difference]: Start difference. First operand 261 states and 274 transitions. Second operand 5 states. [2018-01-28 21:58:43,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:43,835 INFO L93 Difference]: Finished difference Result 617 states and 653 transitions. [2018-01-28 21:58:43,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 21:58:43,837 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-01-28 21:58:43,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:43,840 INFO L225 Difference]: With dead ends: 617 [2018-01-28 21:58:43,840 INFO L226 Difference]: Without dead ends: 375 [2018-01-28 21:58:43,841 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-28 21:58:43,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2018-01-28 21:58:43,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 339. [2018-01-28 21:58:43,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 339 states. [2018-01-28 21:58:43,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 392 transitions. [2018-01-28 21:58:43,856 INFO L78 Accepts]: Start accepts. Automaton has 339 states and 392 transitions. Word has length 25 [2018-01-28 21:58:43,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:43,856 INFO L432 AbstractCegarLoop]: Abstraction has 339 states and 392 transitions. [2018-01-28 21:58:43,856 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 21:58:43,856 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 392 transitions. [2018-01-28 21:58:43,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-28 21:58:43,857 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:43,857 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:43,857 INFO L371 AbstractCegarLoop]: === Iteration 9 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:43,858 INFO L82 PathProgramCache]: Analyzing trace with hash -1263755770, now seen corresponding path program 1 times [2018-01-28 21:58:43,858 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:43,858 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:43,859 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:43,859 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:43,859 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:43,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:43,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:43,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:43,948 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:43,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 21:58:43,948 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 21:58:43,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 21:58:43,948 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 21:58:43,949 INFO L87 Difference]: Start difference. First operand 339 states and 392 transitions. Second operand 4 states. [2018-01-28 21:58:44,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:44,087 INFO L93 Difference]: Finished difference Result 369 states and 428 transitions. [2018-01-28 21:58:44,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 21:58:44,087 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2018-01-28 21:58:44,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:44,090 INFO L225 Difference]: With dead ends: 369 [2018-01-28 21:58:44,090 INFO L226 Difference]: Without dead ends: 356 [2018-01-28 21:58:44,090 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:44,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states. [2018-01-28 21:58:44,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 343. [2018-01-28 21:58:44,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2018-01-28 21:58:44,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 392 transitions. [2018-01-28 21:58:44,105 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 392 transitions. Word has length 31 [2018-01-28 21:58:44,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:44,106 INFO L432 AbstractCegarLoop]: Abstraction has 343 states and 392 transitions. [2018-01-28 21:58:44,106 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 21:58:44,106 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 392 transitions. [2018-01-28 21:58:44,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-28 21:58:44,107 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:44,107 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:44,107 INFO L371 AbstractCegarLoop]: === Iteration 10 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:44,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1263755769, now seen corresponding path program 1 times [2018-01-28 21:58:44,108 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:44,108 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:44,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:44,109 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:44,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:44,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:44,125 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:44,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:44,209 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:44,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 21:58:44,210 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 21:58:44,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 21:58:44,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:44,210 INFO L87 Difference]: Start difference. First operand 343 states and 392 transitions. Second operand 5 states. [2018-01-28 21:58:44,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:44,483 INFO L93 Difference]: Finished difference Result 381 states and 436 transitions. [2018-01-28 21:58:44,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 21:58:44,484 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2018-01-28 21:58:44,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:44,485 INFO L225 Difference]: With dead ends: 381 [2018-01-28 21:58:44,485 INFO L226 Difference]: Without dead ends: 368 [2018-01-28 21:58:44,486 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-28 21:58:44,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2018-01-28 21:58:44,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 344. [2018-01-28 21:58:44,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2018-01-28 21:58:44,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 386 transitions. [2018-01-28 21:58:44,500 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 386 transitions. Word has length 31 [2018-01-28 21:58:44,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:44,500 INFO L432 AbstractCegarLoop]: Abstraction has 344 states and 386 transitions. [2018-01-28 21:58:44,500 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 21:58:44,500 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 386 transitions. [2018-01-28 21:58:44,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-28 21:58:44,501 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:44,501 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:44,501 INFO L371 AbstractCegarLoop]: === Iteration 11 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:44,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1820960830, now seen corresponding path program 1 times [2018-01-28 21:58:44,502 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:44,502 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:44,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:44,503 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:44,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:44,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:44,521 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:44,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:44,765 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:44,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 21:58:44,766 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 21:58:44,766 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 21:58:44,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-28 21:58:44,766 INFO L87 Difference]: Start difference. First operand 344 states and 386 transitions. Second operand 6 states. [2018-01-28 21:58:45,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:45,708 INFO L93 Difference]: Finished difference Result 690 states and 782 transitions. [2018-01-28 21:58:45,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 21:58:45,709 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 38 [2018-01-28 21:58:45,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:45,712 INFO L225 Difference]: With dead ends: 690 [2018-01-28 21:58:45,712 INFO L226 Difference]: Without dead ends: 365 [2018-01-28 21:58:45,713 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-28 21:58:45,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2018-01-28 21:58:45,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 354. [2018-01-28 21:58:45,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-01-28 21:58:45,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 398 transitions. [2018-01-28 21:58:45,726 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 398 transitions. Word has length 38 [2018-01-28 21:58:45,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:45,727 INFO L432 AbstractCegarLoop]: Abstraction has 354 states and 398 transitions. [2018-01-28 21:58:45,727 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 21:58:45,727 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 398 transitions. [2018-01-28 21:58:45,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-28 21:58:45,728 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:45,728 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:45,728 INFO L371 AbstractCegarLoop]: === Iteration 12 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:45,729 INFO L82 PathProgramCache]: Analyzing trace with hash -1820960831, now seen corresponding path program 1 times [2018-01-28 21:58:45,729 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:45,729 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:45,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:45,730 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:45,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:45,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:45,743 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:45,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:45,798 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:45,798 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 21:58:45,798 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 21:58:45,798 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 21:58:45,798 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:45,799 INFO L87 Difference]: Start difference. First operand 354 states and 398 transitions. Second operand 5 states. [2018-01-28 21:58:46,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:46,279 INFO L93 Difference]: Finished difference Result 357 states and 400 transitions. [2018-01-28 21:58:46,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 21:58:46,316 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2018-01-28 21:58:46,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:46,317 INFO L225 Difference]: With dead ends: 357 [2018-01-28 21:58:46,317 INFO L226 Difference]: Without dead ends: 356 [2018-01-28 21:58:46,318 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-28 21:58:46,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states. [2018-01-28 21:58:46,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 354. [2018-01-28 21:58:46,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-01-28 21:58:46,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 396 transitions. [2018-01-28 21:58:46,335 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 396 transitions. Word has length 38 [2018-01-28 21:58:46,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:46,335 INFO L432 AbstractCegarLoop]: Abstraction has 354 states and 396 transitions. [2018-01-28 21:58:46,335 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 21:58:46,335 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 396 transitions. [2018-01-28 21:58:46,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-28 21:58:46,336 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:46,337 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:46,337 INFO L371 AbstractCegarLoop]: === Iteration 13 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:46,337 INFO L82 PathProgramCache]: Analyzing trace with hash -1086085932, now seen corresponding path program 1 times [2018-01-28 21:58:46,337 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:46,337 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:46,338 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:46,339 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:46,339 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:46,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:46,361 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:46,567 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:46,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:58:46,568 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:58:46,575 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:46,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:46,620 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:58:46,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:58:46,657 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,659 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 21:58:46,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:58:46,686 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,695 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:58:46,695 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:58:46,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 21:58:46,699 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,705 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-28 21:58:46,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:58:46,730 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:58:46,731 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,733 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:58:46,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:58:46,747 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,750 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,760 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,760 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-28 21:58:46,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 21:58:46,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 21:58:46,903 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-28 21:58:46,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 21:58:46,940 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,946 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,958 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:46,958 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:119, output treesize:37 [2018-01-28 21:58:47,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-28 21:58:47,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-28 21:58:47,048 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:47,051 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:47,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-28 21:58:47,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-28 21:58:47,063 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:47,064 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:47,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:47,070 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:55, output treesize:15 [2018-01-28 21:58:47,089 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:47,110 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:58:47,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 17 [2018-01-28 21:58:47,111 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 21:58:47,111 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 21:58:47,111 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-01-28 21:58:47,111 INFO L87 Difference]: Start difference. First operand 354 states and 396 transitions. Second operand 18 states. [2018-01-28 21:58:47,954 WARN L146 SmtUtils]: Spent 149ms on a formula simplification. DAG size of input: 42 DAG size of output 37 [2018-01-28 21:58:49,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:49,122 INFO L93 Difference]: Finished difference Result 729 states and 820 transitions. [2018-01-28 21:58:49,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 21:58:49,123 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 48 [2018-01-28 21:58:49,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:49,125 INFO L225 Difference]: With dead ends: 729 [2018-01-28 21:58:49,125 INFO L226 Difference]: Without dead ends: 394 [2018-01-28 21:58:49,127 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 37 SyntacticMatches, 5 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=255, Invalid=801, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 21:58:49,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2018-01-28 21:58:49,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 367. [2018-01-28 21:58:49,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367 states. [2018-01-28 21:58:49,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367 states to 367 states and 408 transitions. [2018-01-28 21:58:49,141 INFO L78 Accepts]: Start accepts. Automaton has 367 states and 408 transitions. Word has length 48 [2018-01-28 21:58:49,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:49,141 INFO L432 AbstractCegarLoop]: Abstraction has 367 states and 408 transitions. [2018-01-28 21:58:49,141 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 21:58:49,141 INFO L276 IsEmpty]: Start isEmpty. Operand 367 states and 408 transitions. [2018-01-28 21:58:49,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-28 21:58:49,142 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:49,142 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:49,143 INFO L371 AbstractCegarLoop]: === Iteration 14 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:49,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1086085933, now seen corresponding path program 1 times [2018-01-28 21:58:49,143 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:49,143 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:49,144 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:49,144 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:49,144 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:49,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:49,165 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:49,375 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:49,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:58:49,375 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:58:49,389 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:49,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:49,418 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:58:49,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:58:49,427 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,428 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,428 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 21:58:49,446 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:58:49,446 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:58:49,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-28 21:58:49,447 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,452 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-28 21:58:49,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:58:49,469 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:58:49,470 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,471 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,477 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-28 21:58:49,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-28 21:58:49,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 21:58:49,549 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,575 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,606 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,606 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-28 21:58:49,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-28 21:58:49,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-28 21:58:49,633 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,648 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:58:49,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:58:49,671 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-28 21:58:49,760 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-28 21:58:49,781 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:58:49,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 12 [2018-01-28 21:58:49,782 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 21:58:49,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 21:58:49,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-01-28 21:58:49,783 INFO L87 Difference]: Start difference. First operand 367 states and 408 transitions. Second operand 13 states. [2018-01-28 21:58:50,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:50,295 INFO L93 Difference]: Finished difference Result 391 states and 432 transitions. [2018-01-28 21:58:50,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 21:58:50,295 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 48 [2018-01-28 21:58:50,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:50,298 INFO L225 Difference]: With dead ends: 391 [2018-01-28 21:58:50,298 INFO L226 Difference]: Without dead ends: 390 [2018-01-28 21:58:50,299 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 42 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=76, Invalid=196, Unknown=0, NotChecked=0, Total=272 [2018-01-28 21:58:50,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2018-01-28 21:58:50,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 366. [2018-01-28 21:58:50,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2018-01-28 21:58:50,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 406 transitions. [2018-01-28 21:58:50,319 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 406 transitions. Word has length 48 [2018-01-28 21:58:50,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:50,319 INFO L432 AbstractCegarLoop]: Abstraction has 366 states and 406 transitions. [2018-01-28 21:58:50,319 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 21:58:50,319 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 406 transitions. [2018-01-28 21:58:50,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-28 21:58:50,321 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:50,321 INFO L330 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:50,321 INFO L371 AbstractCegarLoop]: === Iteration 15 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:50,322 INFO L82 PathProgramCache]: Analyzing trace with hash -459434711, now seen corresponding path program 1 times [2018-01-28 21:58:50,322 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:50,322 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:50,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:50,323 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:50,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:50,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:50,348 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:50,415 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-28 21:58:50,415 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:50,415 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 21:58:50,416 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 21:58:50,416 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 21:58:50,416 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 21:58:50,416 INFO L87 Difference]: Start difference. First operand 366 states and 406 transitions. Second operand 4 states. [2018-01-28 21:58:50,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:50,622 INFO L93 Difference]: Finished difference Result 374 states and 414 transitions. [2018-01-28 21:58:50,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 21:58:50,622 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2018-01-28 21:58:50,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:50,624 INFO L225 Difference]: With dead ends: 374 [2018-01-28 21:58:50,624 INFO L226 Difference]: Without dead ends: 370 [2018-01-28 21:58:50,625 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:50,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-01-28 21:58:50,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 362. [2018-01-28 21:58:50,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 362 states. [2018-01-28 21:58:50,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 394 transitions. [2018-01-28 21:58:50,642 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 394 transitions. Word has length 80 [2018-01-28 21:58:50,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:50,643 INFO L432 AbstractCegarLoop]: Abstraction has 362 states and 394 transitions. [2018-01-28 21:58:50,643 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 21:58:50,643 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 394 transitions. [2018-01-28 21:58:50,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-28 21:58:50,644 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:50,645 INFO L330 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:50,645 INFO L371 AbstractCegarLoop]: === Iteration 16 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:50,645 INFO L82 PathProgramCache]: Analyzing trace with hash -459434710, now seen corresponding path program 1 times [2018-01-28 21:58:50,645 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:50,645 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:50,646 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:50,646 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:50,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:50,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:50,669 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:50,765 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:50,765 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:58:50,765 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:58:50,771 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:50,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:50,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:58:50,849 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 21:58:50,869 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:58:50,870 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2018-01-28 21:58:50,870 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 21:58:50,870 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 21:58:50,870 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-01-28 21:58:50,870 INFO L87 Difference]: Start difference. First operand 362 states and 394 transitions. Second operand 9 states. [2018-01-28 21:58:50,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:50,919 INFO L93 Difference]: Finished difference Result 725 states and 794 transitions. [2018-01-28 21:58:50,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 21:58:50,919 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 80 [2018-01-28 21:58:50,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:50,921 INFO L225 Difference]: With dead ends: 725 [2018-01-28 21:58:50,922 INFO L226 Difference]: Without dead ends: 382 [2018-01-28 21:58:50,923 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2018-01-28 21:58:50,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-01-28 21:58:50,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 382. [2018-01-28 21:58:50,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-01-28 21:58:50,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 414 transitions. [2018-01-28 21:58:50,939 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 414 transitions. Word has length 80 [2018-01-28 21:58:50,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:50,939 INFO L432 AbstractCegarLoop]: Abstraction has 382 states and 414 transitions. [2018-01-28 21:58:50,939 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 21:58:50,939 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 414 transitions. [2018-01-28 21:58:50,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-28 21:58:50,941 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:50,941 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:50,941 INFO L371 AbstractCegarLoop]: === Iteration 17 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:50,941 INFO L82 PathProgramCache]: Analyzing trace with hash -854299716, now seen corresponding path program 2 times [2018-01-28 21:58:50,941 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:50,941 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:50,942 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:50,942 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:50,942 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:50,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:50,965 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:51,049 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:51,049 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:51,049 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 21:58:51,049 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 21:58:51,050 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 21:58:51,050 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 21:58:51,050 INFO L87 Difference]: Start difference. First operand 382 states and 414 transitions. Second operand 4 states. [2018-01-28 21:58:51,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:51,254 INFO L93 Difference]: Finished difference Result 390 states and 422 transitions. [2018-01-28 21:58:51,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 21:58:51,254 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 90 [2018-01-28 21:58:51,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:51,257 INFO L225 Difference]: With dead ends: 390 [2018-01-28 21:58:51,257 INFO L226 Difference]: Without dead ends: 386 [2018-01-28 21:58:51,257 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:51,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2018-01-28 21:58:51,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 378. [2018-01-28 21:58:51,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 378 states. [2018-01-28 21:58:51,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 402 transitions. [2018-01-28 21:58:51,271 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 402 transitions. Word has length 90 [2018-01-28 21:58:51,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:51,272 INFO L432 AbstractCegarLoop]: Abstraction has 378 states and 402 transitions. [2018-01-28 21:58:51,272 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 21:58:51,272 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 402 transitions. [2018-01-28 21:58:51,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-28 21:58:51,273 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:51,273 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:51,273 INFO L371 AbstractCegarLoop]: === Iteration 18 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:51,274 INFO L82 PathProgramCache]: Analyzing trace with hash -801185260, now seen corresponding path program 1 times [2018-01-28 21:58:51,274 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:51,274 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:51,275 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:51,275 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 21:58:51,275 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:51,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:51,308 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:51,733 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:51,733 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:51,733 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 21:58:51,733 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 21:58:51,734 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 21:58:51,734 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 21:58:51,734 INFO L87 Difference]: Start difference. First operand 378 states and 402 transitions. Second operand 9 states. [2018-01-28 21:58:52,000 WARN L146 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 20 DAG size of output 14 [2018-01-28 21:58:52,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:52,856 INFO L93 Difference]: Finished difference Result 404 states and 429 transitions. [2018-01-28 21:58:52,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 21:58:52,857 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 91 [2018-01-28 21:58:52,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:52,858 INFO L225 Difference]: With dead ends: 404 [2018-01-28 21:58:52,859 INFO L226 Difference]: Without dead ends: 402 [2018-01-28 21:58:52,859 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-01-28 21:58:52,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 402 states. [2018-01-28 21:58:52,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 402 to 397. [2018-01-28 21:58:52,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 397 states. [2018-01-28 21:58:52,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 397 states to 397 states and 426 transitions. [2018-01-28 21:58:52,880 INFO L78 Accepts]: Start accepts. Automaton has 397 states and 426 transitions. Word has length 91 [2018-01-28 21:58:52,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:52,881 INFO L432 AbstractCegarLoop]: Abstraction has 397 states and 426 transitions. [2018-01-28 21:58:52,881 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 21:58:52,881 INFO L276 IsEmpty]: Start isEmpty. Operand 397 states and 426 transitions. [2018-01-28 21:58:52,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-28 21:58:52,882 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:52,882 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:52,882 INFO L371 AbstractCegarLoop]: === Iteration 19 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:52,883 INFO L82 PathProgramCache]: Analyzing trace with hash -801185259, now seen corresponding path program 1 times [2018-01-28 21:58:52,883 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:52,883 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:52,884 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:52,884 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:52,884 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:52,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:52,920 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:53,233 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:53,233 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:53,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-28 21:58:53,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 21:58:53,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 21:58:53,234 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-01-28 21:58:53,234 INFO L87 Difference]: Start difference. First operand 397 states and 426 transitions. Second operand 11 states. [2018-01-28 21:58:53,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:53,896 INFO L93 Difference]: Finished difference Result 410 states and 436 transitions. [2018-01-28 21:58:53,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 21:58:53,896 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 91 [2018-01-28 21:58:53,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:53,898 INFO L225 Difference]: With dead ends: 410 [2018-01-28 21:58:53,898 INFO L226 Difference]: Without dead ends: 408 [2018-01-28 21:58:53,898 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=131, Unknown=0, NotChecked=0, Total=182 [2018-01-28 21:58:53,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 408 states. [2018-01-28 21:58:53,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 408 to 397. [2018-01-28 21:58:53,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 397 states. [2018-01-28 21:58:53,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 397 states to 397 states and 423 transitions. [2018-01-28 21:58:53,922 INFO L78 Accepts]: Start accepts. Automaton has 397 states and 423 transitions. Word has length 91 [2018-01-28 21:58:53,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:53,922 INFO L432 AbstractCegarLoop]: Abstraction has 397 states and 423 transitions. [2018-01-28 21:58:53,923 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 21:58:53,923 INFO L276 IsEmpty]: Start isEmpty. Operand 397 states and 423 transitions. [2018-01-28 21:58:53,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-28 21:58:53,924 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:53,924 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:53,924 INFO L371 AbstractCegarLoop]: === Iteration 20 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:53,924 INFO L82 PathProgramCache]: Analyzing trace with hash -1139879418, now seen corresponding path program 1 times [2018-01-28 21:58:53,925 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:53,925 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:53,925 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:53,926 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:53,926 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:53,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:53,954 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:54,280 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:54,280 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:54,281 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 21:58:54,281 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 21:58:54,281 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 21:58:54,281 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-01-28 21:58:54,281 INFO L87 Difference]: Start difference. First operand 397 states and 423 transitions. Second operand 8 states. [2018-01-28 21:58:54,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:54,996 INFO L93 Difference]: Finished difference Result 405 states and 430 transitions. [2018-01-28 21:58:54,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 21:58:54,996 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 93 [2018-01-28 21:58:54,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:54,998 INFO L225 Difference]: With dead ends: 405 [2018-01-28 21:58:54,998 INFO L226 Difference]: Without dead ends: 404 [2018-01-28 21:58:54,998 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-01-28 21:58:54,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2018-01-28 21:58:55,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 402. [2018-01-28 21:58:55,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 402 states. [2018-01-28 21:58:55,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 402 states to 402 states and 428 transitions. [2018-01-28 21:58:55,017 INFO L78 Accepts]: Start accepts. Automaton has 402 states and 428 transitions. Word has length 93 [2018-01-28 21:58:55,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:55,017 INFO L432 AbstractCegarLoop]: Abstraction has 402 states and 428 transitions. [2018-01-28 21:58:55,017 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 21:58:55,017 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 428 transitions. [2018-01-28 21:58:55,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-28 21:58:55,018 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:55,019 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:55,019 INFO L371 AbstractCegarLoop]: === Iteration 21 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:55,019 INFO L82 PathProgramCache]: Analyzing trace with hash -1139879417, now seen corresponding path program 1 times [2018-01-28 21:58:55,019 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:55,019 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:55,020 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:55,020 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:55,020 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:55,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:55,061 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:55,487 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:55,487 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:55,487 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 21:58:55,488 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 21:58:55,488 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 21:58:55,488 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-01-28 21:58:55,488 INFO L87 Difference]: Start difference. First operand 402 states and 428 transitions. Second operand 12 states. [2018-01-28 21:58:56,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:56,357 INFO L93 Difference]: Finished difference Result 403 states and 428 transitions. [2018-01-28 21:58:56,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 21:58:56,400 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93 [2018-01-28 21:58:56,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:56,402 INFO L225 Difference]: With dead ends: 403 [2018-01-28 21:58:56,402 INFO L226 Difference]: Without dead ends: 401 [2018-01-28 21:58:56,402 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2018-01-28 21:58:56,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states. [2018-01-28 21:58:56,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 401. [2018-01-28 21:58:56,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 401 states. [2018-01-28 21:58:56,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 425 transitions. [2018-01-28 21:58:56,423 INFO L78 Accepts]: Start accepts. Automaton has 401 states and 425 transitions. Word has length 93 [2018-01-28 21:58:56,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:56,424 INFO L432 AbstractCegarLoop]: Abstraction has 401 states and 425 transitions. [2018-01-28 21:58:56,424 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 21:58:56,424 INFO L276 IsEmpty]: Start isEmpty. Operand 401 states and 425 transitions. [2018-01-28 21:58:56,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-01-28 21:58:56,425 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:56,425 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:56,426 INFO L371 AbstractCegarLoop]: === Iteration 22 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:56,426 INFO L82 PathProgramCache]: Analyzing trace with hash -2135985774, now seen corresponding path program 1 times [2018-01-28 21:58:56,426 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:56,426 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:56,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:56,427 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:56,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:56,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:56,447 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:56,500 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:56,501 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:56,501 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 21:58:56,501 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 21:58:56,502 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 21:58:56,502 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:56,502 INFO L87 Difference]: Start difference. First operand 401 states and 425 transitions. Second operand 5 states. [2018-01-28 21:58:56,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:56,799 INFO L93 Difference]: Finished difference Result 401 states and 425 transitions. [2018-01-28 21:58:56,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 21:58:56,799 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2018-01-28 21:58:56,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:56,800 INFO L225 Difference]: With dead ends: 401 [2018-01-28 21:58:56,800 INFO L226 Difference]: Without dead ends: 400 [2018-01-28 21:58:56,801 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 21:58:56,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 400 states. [2018-01-28 21:58:56,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 400 to 400. [2018-01-28 21:58:56,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 400 states. [2018-01-28 21:58:56,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 424 transitions. [2018-01-28 21:58:56,823 INFO L78 Accepts]: Start accepts. Automaton has 400 states and 424 transitions. Word has length 96 [2018-01-28 21:58:56,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:56,824 INFO L432 AbstractCegarLoop]: Abstraction has 400 states and 424 transitions. [2018-01-28 21:58:56,824 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 21:58:56,824 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 424 transitions. [2018-01-28 21:58:56,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-01-28 21:58:56,825 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:56,825 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:56,825 INFO L371 AbstractCegarLoop]: === Iteration 23 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:56,826 INFO L82 PathProgramCache]: Analyzing trace with hash -2135985773, now seen corresponding path program 1 times [2018-01-28 21:58:56,826 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:56,826 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:56,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:56,827 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:56,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:56,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:56,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:57,017 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:57,018 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:57,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 21:58:57,018 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 21:58:57,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 21:58:57,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-28 21:58:57,019 INFO L87 Difference]: Start difference. First operand 400 states and 424 transitions. Second operand 6 states. [2018-01-28 21:58:57,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:57,293 INFO L93 Difference]: Finished difference Result 402 states and 426 transitions. [2018-01-28 21:58:57,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 21:58:57,294 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2018-01-28 21:58:57,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:57,297 INFO L225 Difference]: With dead ends: 402 [2018-01-28 21:58:57,297 INFO L226 Difference]: Without dead ends: 395 [2018-01-28 21:58:57,297 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-01-28 21:58:57,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2018-01-28 21:58:57,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 395. [2018-01-28 21:58:57,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 395 states. [2018-01-28 21:58:57,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 419 transitions. [2018-01-28 21:58:57,320 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 419 transitions. Word has length 96 [2018-01-28 21:58:57,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:57,321 INFO L432 AbstractCegarLoop]: Abstraction has 395 states and 419 transitions. [2018-01-28 21:58:57,321 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 21:58:57,321 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 419 transitions. [2018-01-28 21:58:57,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-28 21:58:57,322 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:57,322 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:57,323 INFO L371 AbstractCegarLoop]: === Iteration 24 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:57,323 INFO L82 PathProgramCache]: Analyzing trace with hash -1791049397, now seen corresponding path program 1 times [2018-01-28 21:58:57,323 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:57,323 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:57,324 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:57,324 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:57,324 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:57,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:57,345 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:57,505 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:57,505 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:57,505 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 21:58:57,505 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 21:58:57,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 21:58:57,506 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-28 21:58:57,506 INFO L87 Difference]: Start difference. First operand 395 states and 419 transitions. Second operand 7 states. [2018-01-28 21:58:57,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:57,707 INFO L93 Difference]: Finished difference Result 414 states and 440 transitions. [2018-01-28 21:58:57,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 21:58:57,707 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 97 [2018-01-28 21:58:57,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:57,709 INFO L225 Difference]: With dead ends: 414 [2018-01-28 21:58:57,709 INFO L226 Difference]: Without dead ends: 413 [2018-01-28 21:58:57,709 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-28 21:58:57,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states. [2018-01-28 21:58:57,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 394. [2018-01-28 21:58:57,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 394 states. [2018-01-28 21:58:57,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 418 transitions. [2018-01-28 21:58:57,730 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 418 transitions. Word has length 97 [2018-01-28 21:58:57,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:57,731 INFO L432 AbstractCegarLoop]: Abstraction has 394 states and 418 transitions. [2018-01-28 21:58:57,731 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 21:58:57,731 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 418 transitions. [2018-01-28 21:58:57,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-28 21:58:57,732 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:57,732 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:57,733 INFO L371 AbstractCegarLoop]: === Iteration 25 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:57,733 INFO L82 PathProgramCache]: Analyzing trace with hash -1791049396, now seen corresponding path program 1 times [2018-01-28 21:58:57,733 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:57,733 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:57,734 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:57,734 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:57,734 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:57,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:57,754 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:57,970 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:57,971 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:57,971 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 21:58:57,971 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 21:58:57,971 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 21:58:57,972 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 21:58:57,972 INFO L87 Difference]: Start difference. First operand 394 states and 418 transitions. Second operand 9 states. [2018-01-28 21:58:58,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:58,281 INFO L93 Difference]: Finished difference Result 424 states and 450 transitions. [2018-01-28 21:58:58,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 21:58:58,281 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 97 [2018-01-28 21:58:58,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:58,282 INFO L225 Difference]: With dead ends: 424 [2018-01-28 21:58:58,282 INFO L226 Difference]: Without dead ends: 423 [2018-01-28 21:58:58,283 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-01-28 21:58:58,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 423 states. [2018-01-28 21:58:58,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 423 to 393. [2018-01-28 21:58:58,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 393 states. [2018-01-28 21:58:58,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 417 transitions. [2018-01-28 21:58:58,297 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 417 transitions. Word has length 97 [2018-01-28 21:58:58,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:58,297 INFO L432 AbstractCegarLoop]: Abstraction has 393 states and 417 transitions. [2018-01-28 21:58:58,297 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 21:58:58,298 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 417 transitions. [2018-01-28 21:58:58,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-01-28 21:58:58,298 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:58,298 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:58,298 INFO L371 AbstractCegarLoop]: === Iteration 26 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:58,298 INFO L82 PathProgramCache]: Analyzing trace with hash 1784829841, now seen corresponding path program 1 times [2018-01-28 21:58:58,299 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:58,299 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:58,299 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:58,299 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:58,299 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:58,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:58,317 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:58,367 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:58,367 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:58,367 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 21:58:58,367 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 21:58:58,368 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 21:58:58,368 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:58:58,368 INFO L87 Difference]: Start difference. First operand 393 states and 417 transitions. Second operand 5 states. [2018-01-28 21:58:58,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:58,582 INFO L93 Difference]: Finished difference Result 416 states and 442 transitions. [2018-01-28 21:58:58,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 21:58:58,582 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2018-01-28 21:58:58,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:58,584 INFO L225 Difference]: With dead ends: 416 [2018-01-28 21:58:58,585 INFO L226 Difference]: Without dead ends: 415 [2018-01-28 21:58:58,585 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-28 21:58:58,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415 states. [2018-01-28 21:58:58,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415 to 392. [2018-01-28 21:58:58,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 392 states. [2018-01-28 21:58:58,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 416 transitions. [2018-01-28 21:58:58,606 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 416 transitions. Word has length 101 [2018-01-28 21:58:58,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:58,607 INFO L432 AbstractCegarLoop]: Abstraction has 392 states and 416 transitions. [2018-01-28 21:58:58,607 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 21:58:58,607 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 416 transitions. [2018-01-28 21:58:58,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-01-28 21:58:58,608 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:58,608 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:58,608 INFO L371 AbstractCegarLoop]: === Iteration 27 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:58,608 INFO L82 PathProgramCache]: Analyzing trace with hash 1784829842, now seen corresponding path program 1 times [2018-01-28 21:58:58,609 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:58,609 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:58,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:58,610 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:58,610 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:58,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:58,658 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:58,921 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:58,921 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:58,921 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 21:58:58,922 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 21:58:58,922 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 21:58:58,922 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-28 21:58:58,922 INFO L87 Difference]: Start difference. First operand 392 states and 416 transitions. Second operand 10 states. [2018-01-28 21:58:59,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:58:59,245 INFO L93 Difference]: Finished difference Result 426 states and 452 transitions. [2018-01-28 21:58:59,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 21:58:59,245 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 101 [2018-01-28 21:58:59,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:58:59,247 INFO L225 Difference]: With dead ends: 426 [2018-01-28 21:58:59,247 INFO L226 Difference]: Without dead ends: 425 [2018-01-28 21:58:59,248 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=237, Unknown=0, NotChecked=0, Total=306 [2018-01-28 21:58:59,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 425 states. [2018-01-28 21:58:59,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 425 to 391. [2018-01-28 21:58:59,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 391 states. [2018-01-28 21:58:59,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 415 transitions. [2018-01-28 21:58:59,269 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 415 transitions. Word has length 101 [2018-01-28 21:58:59,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:58:59,269 INFO L432 AbstractCegarLoop]: Abstraction has 391 states and 415 transitions. [2018-01-28 21:58:59,270 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 21:58:59,270 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 415 transitions. [2018-01-28 21:58:59,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-28 21:58:59,270 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:58:59,271 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:58:59,271 INFO L371 AbstractCegarLoop]: === Iteration 28 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:58:59,271 INFO L82 PathProgramCache]: Analyzing trace with hash -504849607, now seen corresponding path program 1 times [2018-01-28 21:58:59,271 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:58:59,271 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:58:59,272 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:59,272 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:58:59,272 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:58:59,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:58:59,295 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:58:59,785 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:58:59,785 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:58:59,785 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-01-28 21:58:59,786 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-28 21:58:59,786 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-28 21:58:59,786 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2018-01-28 21:58:59,786 INFO L87 Difference]: Start difference. First operand 391 states and 415 transitions. Second operand 16 states. [2018-01-28 21:59:00,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:00,621 INFO L93 Difference]: Finished difference Result 459 states and 492 transitions. [2018-01-28 21:59:00,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-28 21:59:00,621 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 102 [2018-01-28 21:59:00,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:00,624 INFO L225 Difference]: With dead ends: 459 [2018-01-28 21:59:00,624 INFO L226 Difference]: Without dead ends: 458 [2018-01-28 21:59:00,625 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=143, Invalid=913, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 21:59:00,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2018-01-28 21:59:00,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 402. [2018-01-28 21:59:00,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 402 states. [2018-01-28 21:59:00,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 402 states to 402 states and 430 transitions. [2018-01-28 21:59:00,643 INFO L78 Accepts]: Start accepts. Automaton has 402 states and 430 transitions. Word has length 102 [2018-01-28 21:59:00,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:00,643 INFO L432 AbstractCegarLoop]: Abstraction has 402 states and 430 transitions. [2018-01-28 21:59:00,643 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-28 21:59:00,643 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 430 transitions. [2018-01-28 21:59:00,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-28 21:59:00,644 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:00,644 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:00,644 INFO L371 AbstractCegarLoop]: === Iteration 29 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:00,644 INFO L82 PathProgramCache]: Analyzing trace with hash -504849606, now seen corresponding path program 1 times [2018-01-28 21:59:00,644 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:00,644 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:00,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:00,645 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:00,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:00,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:00,672 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:01,069 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:01,069 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:01,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-28 21:59:01,069 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 21:59:01,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 21:59:01,070 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=268, Unknown=0, NotChecked=0, Total=306 [2018-01-28 21:59:01,070 INFO L87 Difference]: Start difference. First operand 402 states and 430 transitions. Second operand 18 states. [2018-01-28 21:59:01,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:01,925 INFO L93 Difference]: Finished difference Result 466 states and 499 transitions. [2018-01-28 21:59:01,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-28 21:59:01,925 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 102 [2018-01-28 21:59:01,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:01,927 INFO L225 Difference]: With dead ends: 466 [2018-01-28 21:59:01,927 INFO L226 Difference]: Without dead ends: 465 [2018-01-28 21:59:01,928 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 199 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=143, Invalid=979, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 21:59:01,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 465 states. [2018-01-28 21:59:01,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 465 to 402. [2018-01-28 21:59:01,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 402 states. [2018-01-28 21:59:01,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 402 states to 402 states and 429 transitions. [2018-01-28 21:59:01,941 INFO L78 Accepts]: Start accepts. Automaton has 402 states and 429 transitions. Word has length 102 [2018-01-28 21:59:01,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:01,941 INFO L432 AbstractCegarLoop]: Abstraction has 402 states and 429 transitions. [2018-01-28 21:59:01,941 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 21:59:01,942 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 429 transitions. [2018-01-28 21:59:01,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-28 21:59:01,943 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:01,943 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:01,943 INFO L371 AbstractCegarLoop]: === Iteration 30 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:01,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1754042649, now seen corresponding path program 1 times [2018-01-28 21:59:01,943 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:01,943 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:01,944 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:01,944 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:01,944 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:01,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:01,983 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:02,772 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:02,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:02,773 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:02,777 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:02,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:02,823 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:02,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:59:02,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:59:02,898 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:02,900 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:02,907 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:02,907 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:35 [2018-01-28 21:59:02,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-01-28 21:59:02,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2018-01-28 21:59:02,938 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:02,942 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:02,946 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:02,946 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:23 [2018-01-28 21:59:02,948 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_12 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= |c_#valid| (store .cse0 v_arrayElimCell_12 1)) (= 0 (select .cse0 v_arrayElimCell_12))))) is different from true [2018-01-28 21:59:03,016 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_12 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= 0 (select .cse0 v_arrayElimCell_12)) (= |c_#valid| (store (store .cse0 v_arrayElimCell_12 1) |c_create_data_#t~malloc24.base| 1))))) is different from true [2018-01-28 21:59:03,029 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_12 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (store (store .cse0 v_arrayElimCell_12 1) c_create_data_~nextData~8.base 1) |c_#valid|) (= 0 (select .cse0 v_arrayElimCell_12))))) is different from true [2018-01-28 21:59:03,142 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:03,143 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:03,144 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:03,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 43 [2018-01-28 21:59:03,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 40 [2018-01-28 21:59:03,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 33 [2018-01-28 21:59:03,153 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:03,160 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:03,169 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:03,177 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:03,177 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:36, output treesize:33 [2018-01-28 21:59:03,246 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 11 not checked. [2018-01-28 21:59:03,269 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:03,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 20 [2018-01-28 21:59:03,269 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-28 21:59:03,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-28 21:59:03,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=222, Unknown=6, NotChecked=102, Total=420 [2018-01-28 21:59:03,270 INFO L87 Difference]: Start difference. First operand 402 states and 429 transitions. Second operand 21 states. [2018-01-28 21:59:03,738 WARN L1033 $PredicateComparison]: unable to prove that (and (exists ((create_data_~nextData~8.base Int) (create_data_~data~4.base Int) (v_arrayElimCell_12 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (select |c_#valid| create_data_~nextData~8.base) 1) (= (store (store .cse0 v_arrayElimCell_12 1) create_data_~nextData~8.base 1) |c_#valid|) (= 0 (select .cse0 v_arrayElimCell_12))))) (exists ((create_data_~data~4.base Int) (v_arrayElimCell_12 Int)) (let ((.cse1 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= 0 (select .cse1 v_arrayElimCell_12)) (= |c_#valid| (store (store .cse1 v_arrayElimCell_12 1) |c_create_data_#t~malloc24.base| 1)))))) is different from true [2018-01-28 21:59:04,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:04,672 INFO L93 Difference]: Finished difference Result 441 states and 471 transitions. [2018-01-28 21:59:04,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 21:59:04,673 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 107 [2018-01-28 21:59:04,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:04,674 INFO L225 Difference]: With dead ends: 441 [2018-01-28 21:59:04,674 INFO L226 Difference]: Without dead ends: 439 [2018-01-28 21:59:04,675 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 102 SyntacticMatches, 10 SemanticMatches, 25 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=143, Invalid=363, Unknown=16, NotChecked=180, Total=702 [2018-01-28 21:59:04,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2018-01-28 21:59:04,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 424. [2018-01-28 21:59:04,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 424 states. [2018-01-28 21:59:04,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 455 transitions. [2018-01-28 21:59:04,692 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 455 transitions. Word has length 107 [2018-01-28 21:59:04,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:04,692 INFO L432 AbstractCegarLoop]: Abstraction has 424 states and 455 transitions. [2018-01-28 21:59:04,692 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-28 21:59:04,693 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 455 transitions. [2018-01-28 21:59:04,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-28 21:59:04,693 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:04,693 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:04,694 INFO L371 AbstractCegarLoop]: === Iteration 31 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:04,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1754042648, now seen corresponding path program 1 times [2018-01-28 21:59:04,694 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:04,694 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:04,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:04,695 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:04,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:04,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:04,727 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:05,358 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:05,359 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:05,359 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:05,363 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:05,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:05,407 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:05,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:59:05,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:59:05,532 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,534 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,541 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,541 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:50, output treesize:50 [2018-01-28 21:59:05,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 39 [2018-01-28 21:59:05,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-01-28 21:59:05,569 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:05,573 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:05,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:05,578 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:50, output treesize:32 [2018-01-28 21:59:05,666 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_15 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select (store .cse0 v_arrayElimCell_15 1) |c_create_data_#t~malloc24.base|) 0) (= (store (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_15 80) |c_create_data_#t~malloc24.base| 16) |c_#length|) (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (select .cse0 v_arrayElimCell_15) 0)))) is different from true [2018-01-28 21:59:05,669 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_15 Int) (|create_data_#t~malloc24.base| Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select (store .cse0 v_arrayElimCell_15 1) |create_data_#t~malloc24.base|) 0) (= (store (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_15 80) |create_data_#t~malloc24.base| 16) |c_#length|) (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (select .cse0 v_arrayElimCell_15) 0)))) is different from true [2018-01-28 21:59:05,741 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,742 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,743 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 42 [2018-01-28 21:59:05,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,773 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-01-28 21:59:05,775 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,801 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 26 [2018-01-28 21:59:05,819 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:05,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 7 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 42 [2018-01-28 21:59:05,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 53 [2018-01-28 21:59:05,827 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,844 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,852 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:05,866 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:05,866 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:52, output treesize:42 [2018-01-28 21:59:05,958 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 28 trivial. 3 not checked. [2018-01-28 21:59:05,977 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:05,978 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13] total 23 [2018-01-28 21:59:05,978 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-28 21:59:05,978 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-28 21:59:05,978 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=384, Unknown=3, NotChecked=82, Total=552 [2018-01-28 21:59:05,979 INFO L87 Difference]: Start difference. First operand 424 states and 455 transitions. Second operand 24 states. [2018-01-28 21:59:07,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:07,399 INFO L93 Difference]: Finished difference Result 441 states and 471 transitions. [2018-01-28 21:59:07,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 21:59:07,399 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-01-28 21:59:07,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:07,401 INFO L225 Difference]: With dead ends: 441 [2018-01-28 21:59:07,401 INFO L226 Difference]: Without dead ends: 439 [2018-01-28 21:59:07,401 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 102 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=176, Invalid=884, Unknown=4, NotChecked=126, Total=1190 [2018-01-28 21:59:07,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2018-01-28 21:59:07,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 417. [2018-01-28 21:59:07,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2018-01-28 21:59:07,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 446 transitions. [2018-01-28 21:59:07,417 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 446 transitions. Word has length 107 [2018-01-28 21:59:07,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:07,417 INFO L432 AbstractCegarLoop]: Abstraction has 417 states and 446 transitions. [2018-01-28 21:59:07,417 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-28 21:59:07,417 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 446 transitions. [2018-01-28 21:59:07,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-28 21:59:07,418 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:07,418 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:07,418 INFO L371 AbstractCegarLoop]: === Iteration 32 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:07,418 INFO L82 PathProgramCache]: Analyzing trace with hash -1666344724, now seen corresponding path program 1 times [2018-01-28 21:59:07,418 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:07,418 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:07,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:07,419 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:07,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:07,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:07,437 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:07,530 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:07,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:07,531 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:07,539 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:07,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:07,597 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:07,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-01-28 21:59:07,641 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:07,645 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:07,645 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-01-28 21:59:07,687 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:07,714 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:07,714 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 8 [2018-01-28 21:59:07,715 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 21:59:07,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 21:59:07,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-01-28 21:59:07,715 INFO L87 Difference]: Start difference. First operand 417 states and 446 transitions. Second operand 9 states. [2018-01-28 21:59:07,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:07,959 INFO L93 Difference]: Finished difference Result 419 states and 448 transitions. [2018-01-28 21:59:07,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 21:59:07,960 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 107 [2018-01-28 21:59:07,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:07,961 INFO L225 Difference]: With dead ends: 419 [2018-01-28 21:59:07,961 INFO L226 Difference]: Without dead ends: 418 [2018-01-28 21:59:07,962 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2018-01-28 21:59:07,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2018-01-28 21:59:07,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 416. [2018-01-28 21:59:07,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 416 states. [2018-01-28 21:59:07,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 416 states and 444 transitions. [2018-01-28 21:59:07,980 INFO L78 Accepts]: Start accepts. Automaton has 416 states and 444 transitions. Word has length 107 [2018-01-28 21:59:07,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:07,980 INFO L432 AbstractCegarLoop]: Abstraction has 416 states and 444 transitions. [2018-01-28 21:59:07,980 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 21:59:07,980 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 444 transitions. [2018-01-28 21:59:07,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-28 21:59:07,981 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:07,981 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:07,981 INFO L371 AbstractCegarLoop]: === Iteration 33 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:07,981 INFO L82 PathProgramCache]: Analyzing trace with hash -1666344723, now seen corresponding path program 1 times [2018-01-28 21:59:07,981 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:07,981 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:07,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:07,982 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:07,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:07,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:07,999 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:08,154 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:08,154 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:08,154 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:08,160 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:08,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:08,212 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:08,438 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:08,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-01-28 21:59:08,445 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:08,510 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:08,511 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:08,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 21:59:08,511 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:08,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:08,550 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-01-28 21:59:08,613 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:08,634 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:08,634 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6] total 9 [2018-01-28 21:59:08,635 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 21:59:08,635 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 21:59:08,635 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-01-28 21:59:08,635 INFO L87 Difference]: Start difference. First operand 416 states and 444 transitions. Second operand 10 states. [2018-01-28 21:59:09,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:09,104 INFO L93 Difference]: Finished difference Result 422 states and 450 transitions. [2018-01-28 21:59:09,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 21:59:09,104 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 107 [2018-01-28 21:59:09,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:09,106 INFO L225 Difference]: With dead ends: 422 [2018-01-28 21:59:09,106 INFO L226 Difference]: Without dead ends: 418 [2018-01-28 21:59:09,107 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 105 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=88, Invalid=184, Unknown=0, NotChecked=0, Total=272 [2018-01-28 21:59:09,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2018-01-28 21:59:09,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 412. [2018-01-28 21:59:09,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 412 states. [2018-01-28 21:59:09,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 412 states to 412 states and 436 transitions. [2018-01-28 21:59:09,127 INFO L78 Accepts]: Start accepts. Automaton has 412 states and 436 transitions. Word has length 107 [2018-01-28 21:59:09,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:09,128 INFO L432 AbstractCegarLoop]: Abstraction has 412 states and 436 transitions. [2018-01-28 21:59:09,128 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 21:59:09,128 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 436 transitions. [2018-01-28 21:59:09,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-01-28 21:59:09,128 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:09,128 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:09,128 INFO L371 AbstractCegarLoop]: === Iteration 34 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:09,129 INFO L82 PathProgramCache]: Analyzing trace with hash -2007796199, now seen corresponding path program 1 times [2018-01-28 21:59:09,129 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:09,129 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:09,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:09,129 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:09,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:09,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:09,174 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:09,877 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:09,877 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:09,878 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:09,883 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:09,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:09,923 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:09,944 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int)) (= |c_#valid| (store (store |c_old(#valid)| c_create_data_~data~4.base 1) |create_data_#t~malloc4.base| 1))) is different from true [2018-01-28 21:59:10,009 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (|create_data_#t~malloc4.base| Int)) (let ((.cse0 (store (store |c_old(#valid)| create_data_~data~4.base 1) |create_data_#t~malloc4.base| 1))) (and (= 0 (select .cse0 |c_create_data_#t~malloc24.base|)) (= |c_#valid| (store .cse0 |c_create_data_#t~malloc24.base| 1)) (= (select .cse0 create_data_~data~4.base) 1)))) is different from true [2018-01-28 21:59:10,018 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc24.base| Int)) (let ((.cse0 (store (store |c_old(#valid)| create_data_~data~4.base 1) |create_data_#t~malloc4.base| 1))) (and (= 0 (select .cse0 |create_data_#t~malloc24.base|)) (= |c_#valid| (store .cse0 |create_data_#t~malloc24.base| 1)) (= (select .cse0 create_data_~data~4.base) 1)))) is different from true [2018-01-28 21:59:10,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 36 [2018-01-28 21:59:10,066 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:10,069 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:10,072 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:10,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 45 [2018-01-28 21:59:10,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-01-28 21:59:10,079 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:10,098 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:10,117 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:10,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:10,127 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:40, output treesize:33 [2018-01-28 21:59:10,205 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 3 not checked. [2018-01-28 21:59:10,239 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:10,239 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 18 [2018-01-28 21:59:10,239 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 21:59:10,240 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 21:59:10,240 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=169, Unknown=7, NotChecked=90, Total=342 [2018-01-28 21:59:10,240 INFO L87 Difference]: Start difference. First operand 412 states and 436 transitions. Second operand 19 states. [2018-01-28 21:59:11,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:11,514 INFO L93 Difference]: Finished difference Result 434 states and 459 transitions. [2018-01-28 21:59:11,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 21:59:11,515 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 109 [2018-01-28 21:59:11,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:11,516 INFO L225 Difference]: With dead ends: 434 [2018-01-28 21:59:11,516 INFO L226 Difference]: Without dead ends: 433 [2018-01-28 21:59:11,516 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 108 SyntacticMatches, 4 SemanticMatches, 24 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=142, Invalid=360, Unknown=16, NotChecked=132, Total=650 [2018-01-28 21:59:11,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 433 states. [2018-01-28 21:59:11,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 433 to 417. [2018-01-28 21:59:11,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2018-01-28 21:59:11,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 442 transitions. [2018-01-28 21:59:11,539 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 442 transitions. Word has length 109 [2018-01-28 21:59:11,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:11,539 INFO L432 AbstractCegarLoop]: Abstraction has 417 states and 442 transitions. [2018-01-28 21:59:11,539 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 21:59:11,540 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 442 transitions. [2018-01-28 21:59:11,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-01-28 21:59:11,540 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:11,540 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:11,540 INFO L371 AbstractCegarLoop]: === Iteration 35 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:11,540 INFO L82 PathProgramCache]: Analyzing trace with hash -2007796198, now seen corresponding path program 1 times [2018-01-28 21:59:11,541 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:11,541 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:11,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:11,541 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:11,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:11,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:11,582 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:12,508 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:12,508 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:12,508 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:12,513 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:12,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:12,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:12,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:59:12,564 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:12,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:12,565 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 21:59:12,636 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:12,643 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:12,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-28 21:59:12,644 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:12,670 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:12,671 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-28 21:59:12,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:59:12,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:59:12,868 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:12,870 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:12,878 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:12,878 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:50, output treesize:50 [2018-01-28 21:59:12,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 39 [2018-01-28 21:59:12,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-01-28 21:59:12,923 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:12,928 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:12,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:12,935 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:50, output treesize:32 [2018-01-28 21:59:13,038 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_18 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select .cse0 v_arrayElimCell_18) 0) (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (store (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_18 80) |c_create_data_#t~malloc24.base| 16) |c_#length|) (= (select (store .cse0 v_arrayElimCell_18 1) |c_create_data_#t~malloc24.base|) 0)))) is different from true [2018-01-28 21:59:13,041 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_18 Int) (|create_data_#t~malloc24.base| Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select .cse0 v_arrayElimCell_18) 0) (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (store (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_18 80) |create_data_#t~malloc24.base| 16) |c_#length|) (= (select (store .cse0 v_arrayElimCell_18 1) |create_data_#t~malloc24.base|) 0)))) is different from true [2018-01-28 21:59:13,069 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 26 [2018-01-28 21:59:13,073 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,074 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 42 [2018-01-28 21:59:13,079 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,080 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,080 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 53 [2018-01-28 21:59:13,084 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:13,098 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:13,105 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:13,136 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,137 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,141 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 59 [2018-01-28 21:59:13,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:13,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 11 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-01-28 21:59:13,172 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:13,183 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:13,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:13,200 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:61, output treesize:42 [2018-01-28 21:59:13,287 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 28 trivial. 3 not checked. [2018-01-28 21:59:13,308 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:13,308 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16] total 28 [2018-01-28 21:59:13,309 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-28 21:59:13,309 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-28 21:59:13,309 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=615, Unknown=3, NotChecked=102, Total=812 [2018-01-28 21:59:13,309 INFO L87 Difference]: Start difference. First operand 417 states and 442 transitions. Second operand 29 states. [2018-01-28 21:59:15,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:15,462 INFO L93 Difference]: Finished difference Result 435 states and 460 transitions. [2018-01-28 21:59:15,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-28 21:59:15,462 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 109 [2018-01-28 21:59:15,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:15,463 INFO L225 Difference]: With dead ends: 435 [2018-01-28 21:59:15,463 INFO L226 Difference]: Without dead ends: 434 [2018-01-28 21:59:15,464 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 397 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=238, Invalid=1573, Unknown=3, NotChecked=166, Total=1980 [2018-01-28 21:59:15,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2018-01-28 21:59:15,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 417. [2018-01-28 21:59:15,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2018-01-28 21:59:15,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 441 transitions. [2018-01-28 21:59:15,481 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 441 transitions. Word has length 109 [2018-01-28 21:59:15,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:15,482 INFO L432 AbstractCegarLoop]: Abstraction has 417 states and 441 transitions. [2018-01-28 21:59:15,482 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-28 21:59:15,482 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 441 transitions. [2018-01-28 21:59:15,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-28 21:59:15,483 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:15,483 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:15,483 INFO L371 AbstractCegarLoop]: === Iteration 36 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:15,483 INFO L82 PathProgramCache]: Analyzing trace with hash -915713036, now seen corresponding path program 1 times [2018-01-28 21:59:15,484 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:15,484 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:15,484 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:15,484 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:15,484 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:15,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:15,498 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:15,574 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:15,574 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:15,574 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 21:59:15,575 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 21:59:15,575 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 21:59:15,575 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 21:59:15,575 INFO L87 Difference]: Start difference. First operand 417 states and 441 transitions. Second operand 5 states. [2018-01-28 21:59:15,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:15,734 INFO L93 Difference]: Finished difference Result 883 states and 938 transitions. [2018-01-28 21:59:15,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 21:59:15,734 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 117 [2018-01-28 21:59:15,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:15,736 INFO L225 Difference]: With dead ends: 883 [2018-01-28 21:59:15,736 INFO L226 Difference]: Without dead ends: 487 [2018-01-28 21:59:15,737 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-28 21:59:15,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 487 states. [2018-01-28 21:59:15,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 487 to 426. [2018-01-28 21:59:15,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 426 states. [2018-01-28 21:59:15,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 450 transitions. [2018-01-28 21:59:15,754 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 450 transitions. Word has length 117 [2018-01-28 21:59:15,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:15,754 INFO L432 AbstractCegarLoop]: Abstraction has 426 states and 450 transitions. [2018-01-28 21:59:15,754 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 21:59:15,754 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 450 transitions. [2018-01-28 21:59:15,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-01-28 21:59:15,755 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:15,755 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:15,755 INFO L371 AbstractCegarLoop]: === Iteration 37 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:15,755 INFO L82 PathProgramCache]: Analyzing trace with hash -2131880143, now seen corresponding path program 1 times [2018-01-28 21:59:15,755 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:15,755 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:15,756 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:15,756 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:15,756 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:15,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:15,768 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:16,324 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:16,324 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:16,325 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-28 21:59:16,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 21:59:16,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 21:59:16,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=239, Unknown=0, NotChecked=0, Total=272 [2018-01-28 21:59:16,325 INFO L87 Difference]: Start difference. First operand 426 states and 450 transitions. Second operand 17 states. [2018-01-28 21:59:17,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:17,334 INFO L93 Difference]: Finished difference Result 889 states and 941 transitions. [2018-01-28 21:59:17,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-28 21:59:17,334 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 119 [2018-01-28 21:59:17,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:17,336 INFO L225 Difference]: With dead ends: 889 [2018-01-28 21:59:17,336 INFO L226 Difference]: Without dead ends: 484 [2018-01-28 21:59:17,337 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=140, Invalid=982, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 21:59:17,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states. [2018-01-28 21:59:17,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 426. [2018-01-28 21:59:17,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 426 states. [2018-01-28 21:59:17,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 449 transitions. [2018-01-28 21:59:17,358 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 449 transitions. Word has length 119 [2018-01-28 21:59:17,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:17,358 INFO L432 AbstractCegarLoop]: Abstraction has 426 states and 449 transitions. [2018-01-28 21:59:17,358 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 21:59:17,358 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 449 transitions. [2018-01-28 21:59:17,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-28 21:59:17,359 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:17,360 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:17,360 INFO L371 AbstractCegarLoop]: === Iteration 38 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:17,360 INFO L82 PathProgramCache]: Analyzing trace with hash -804266874, now seen corresponding path program 1 times [2018-01-28 21:59:17,360 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:17,360 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:17,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:17,361 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:17,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:17,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:17,384 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:17,832 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:17,832 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:17,832 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-01-28 21:59:17,833 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 21:59:17,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 21:59:17,833 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-01-28 21:59:17,834 INFO L87 Difference]: Start difference. First operand 426 states and 449 transitions. Second operand 17 states. [2018-01-28 21:59:18,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:18,816 INFO L93 Difference]: Finished difference Result 497 states and 529 transitions. [2018-01-28 21:59:18,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-28 21:59:18,817 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 118 [2018-01-28 21:59:18,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:18,818 INFO L225 Difference]: With dead ends: 497 [2018-01-28 21:59:18,818 INFO L226 Difference]: Without dead ends: 496 [2018-01-28 21:59:18,819 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 240 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=157, Invalid=1103, Unknown=0, NotChecked=0, Total=1260 [2018-01-28 21:59:18,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states. [2018-01-28 21:59:18,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 426. [2018-01-28 21:59:18,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 426 states. [2018-01-28 21:59:18,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 454 transitions. [2018-01-28 21:59:18,843 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 454 transitions. Word has length 118 [2018-01-28 21:59:18,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:18,843 INFO L432 AbstractCegarLoop]: Abstraction has 426 states and 454 transitions. [2018-01-28 21:59:18,843 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 21:59:18,843 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 454 transitions. [2018-01-28 21:59:18,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-28 21:59:18,844 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:18,844 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:18,844 INFO L371 AbstractCegarLoop]: === Iteration 39 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:18,844 INFO L82 PathProgramCache]: Analyzing trace with hash -804266873, now seen corresponding path program 1 times [2018-01-28 21:59:18,844 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:18,844 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:18,845 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:18,845 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:18,845 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:18,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:18,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:19,504 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:19,505 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:19,505 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-28 21:59:19,505 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 21:59:19,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 21:59:19,506 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-01-28 21:59:19,506 INFO L87 Difference]: Start difference. First operand 426 states and 454 transitions. Second operand 18 states. [2018-01-28 21:59:20,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:20,673 INFO L93 Difference]: Finished difference Result 496 states and 527 transitions. [2018-01-28 21:59:20,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-28 21:59:20,673 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 118 [2018-01-28 21:59:20,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:20,676 INFO L225 Difference]: With dead ends: 496 [2018-01-28 21:59:20,676 INFO L226 Difference]: Without dead ends: 495 [2018-01-28 21:59:20,676 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=142, Invalid=980, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 21:59:20,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states. [2018-01-28 21:59:20,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 423. [2018-01-28 21:59:20,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 423 states. [2018-01-28 21:59:20,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 450 transitions. [2018-01-28 21:59:20,695 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 450 transitions. Word has length 118 [2018-01-28 21:59:20,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:20,695 INFO L432 AbstractCegarLoop]: Abstraction has 423 states and 450 transitions. [2018-01-28 21:59:20,695 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 21:59:20,695 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 450 transitions. [2018-01-28 21:59:20,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-28 21:59:20,696 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:20,696 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:20,696 INFO L371 AbstractCegarLoop]: === Iteration 40 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:20,696 INFO L82 PathProgramCache]: Analyzing trace with hash 834185070, now seen corresponding path program 1 times [2018-01-28 21:59:20,696 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:20,696 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:20,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:20,697 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:20,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:20,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:20,716 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:21,005 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:21,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:21,005 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:21,010 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:21,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:21,052 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:21,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:21,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-01-28 21:59:21,113 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:21,121 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:21,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:21,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 21:59:21,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:21,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:21,128 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:20 [2018-01-28 21:59:21,155 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:21,176 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 21:59:21,177 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [12] total 17 [2018-01-28 21:59:21,177 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 21:59:21,177 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 21:59:21,177 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=254, Unknown=0, NotChecked=0, Total=306 [2018-01-28 21:59:21,178 INFO L87 Difference]: Start difference. First operand 423 states and 450 transitions. Second operand 18 states. [2018-01-28 21:59:21,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:21,596 INFO L93 Difference]: Finished difference Result 442 states and 471 transitions. [2018-01-28 21:59:21,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 21:59:21,596 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 121 [2018-01-28 21:59:21,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:21,597 INFO L225 Difference]: With dead ends: 442 [2018-01-28 21:59:21,598 INFO L226 Difference]: Without dead ends: 440 [2018-01-28 21:59:21,598 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=410, Unknown=0, NotChecked=0, Total=506 [2018-01-28 21:59:21,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 440 states. [2018-01-28 21:59:21,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 440 to 419. [2018-01-28 21:59:21,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 419 states. [2018-01-28 21:59:21,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 444 transitions. [2018-01-28 21:59:21,621 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 444 transitions. Word has length 121 [2018-01-28 21:59:21,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:21,622 INFO L432 AbstractCegarLoop]: Abstraction has 419 states and 444 transitions. [2018-01-28 21:59:21,622 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 21:59:21,622 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 444 transitions. [2018-01-28 21:59:21,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-28 21:59:21,623 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:21,623 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:21,623 INFO L371 AbstractCegarLoop]: === Iteration 41 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:21,623 INFO L82 PathProgramCache]: Analyzing trace with hash -954561336, now seen corresponding path program 1 times [2018-01-28 21:59:21,623 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:21,624 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:21,624 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:21,624 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:21,624 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:21,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:21,639 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:21,679 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:21,680 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:21,680 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 21:59:21,680 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 21:59:21,680 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 21:59:21,680 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 21:59:21,681 INFO L87 Difference]: Start difference. First operand 419 states and 444 transitions. Second operand 3 states. [2018-01-28 21:59:21,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:21,714 INFO L93 Difference]: Finished difference Result 467 states and 493 transitions. [2018-01-28 21:59:21,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 21:59:21,714 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 121 [2018-01-28 21:59:21,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:21,716 INFO L225 Difference]: With dead ends: 467 [2018-01-28 21:59:21,716 INFO L226 Difference]: Without dead ends: 420 [2018-01-28 21:59:21,717 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 21:59:21,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states. [2018-01-28 21:59:21,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 420. [2018-01-28 21:59:21,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 420 states. [2018-01-28 21:59:21,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 445 transitions. [2018-01-28 21:59:21,746 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 445 transitions. Word has length 121 [2018-01-28 21:59:21,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:21,747 INFO L432 AbstractCegarLoop]: Abstraction has 420 states and 445 transitions. [2018-01-28 21:59:21,747 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 21:59:21,747 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 445 transitions. [2018-01-28 21:59:21,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-28 21:59:21,748 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:21,748 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:21,748 INFO L371 AbstractCegarLoop]: === Iteration 42 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:21,749 INFO L82 PathProgramCache]: Analyzing trace with hash -1600759419, now seen corresponding path program 1 times [2018-01-28 21:59:21,749 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:21,749 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:21,750 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:21,750 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:21,750 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:21,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:21,767 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:21,874 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:21,874 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:21,875 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 21:59:21,875 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 21:59:21,875 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 21:59:21,875 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-28 21:59:21,875 INFO L87 Difference]: Start difference. First operand 420 states and 445 transitions. Second operand 7 states. [2018-01-28 21:59:22,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:22,102 INFO L93 Difference]: Finished difference Result 439 states and 466 transitions. [2018-01-28 21:59:22,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 21:59:22,103 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 123 [2018-01-28 21:59:22,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:22,104 INFO L225 Difference]: With dead ends: 439 [2018-01-28 21:59:22,104 INFO L226 Difference]: Without dead ends: 438 [2018-01-28 21:59:22,104 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-28 21:59:22,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states. [2018-01-28 21:59:22,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 426. [2018-01-28 21:59:22,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 426 states. [2018-01-28 21:59:22,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 453 transitions. [2018-01-28 21:59:22,122 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 453 transitions. Word has length 123 [2018-01-28 21:59:22,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:22,123 INFO L432 AbstractCegarLoop]: Abstraction has 426 states and 453 transitions. [2018-01-28 21:59:22,123 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 21:59:22,123 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 453 transitions. [2018-01-28 21:59:22,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-28 21:59:22,123 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:22,123 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:22,123 INFO L371 AbstractCegarLoop]: === Iteration 43 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:22,124 INFO L82 PathProgramCache]: Analyzing trace with hash -1600759418, now seen corresponding path program 1 times [2018-01-28 21:59:22,124 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:22,124 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:22,124 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:22,124 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:22,124 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:22,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:22,138 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:22,731 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:22,731 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:22,731 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-01-28 21:59:22,732 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-28 21:59:22,732 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-28 21:59:22,732 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2018-01-28 21:59:22,732 INFO L87 Difference]: Start difference. First operand 426 states and 453 transitions. Second operand 16 states. [2018-01-28 21:59:23,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:23,650 INFO L93 Difference]: Finished difference Result 521 states and 558 transitions. [2018-01-28 21:59:23,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-28 21:59:23,651 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 123 [2018-01-28 21:59:23,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:23,652 INFO L225 Difference]: With dead ends: 521 [2018-01-28 21:59:23,652 INFO L226 Difference]: Without dead ends: 520 [2018-01-28 21:59:23,653 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 119 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=136, Invalid=566, Unknown=0, NotChecked=0, Total=702 [2018-01-28 21:59:23,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 520 states. [2018-01-28 21:59:23,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 520 to 477. [2018-01-28 21:59:23,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 477 states. [2018-01-28 21:59:23,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 477 states to 477 states and 510 transitions. [2018-01-28 21:59:23,672 INFO L78 Accepts]: Start accepts. Automaton has 477 states and 510 transitions. Word has length 123 [2018-01-28 21:59:23,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:23,672 INFO L432 AbstractCegarLoop]: Abstraction has 477 states and 510 transitions. [2018-01-28 21:59:23,672 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-28 21:59:23,672 INFO L276 IsEmpty]: Start isEmpty. Operand 477 states and 510 transitions. [2018-01-28 21:59:23,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-28 21:59:23,673 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:23,673 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:23,673 INFO L371 AbstractCegarLoop]: === Iteration 44 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:23,673 INFO L82 PathProgramCache]: Analyzing trace with hash -669911622, now seen corresponding path program 2 times [2018-01-28 21:59:23,674 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:23,674 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:23,674 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:23,674 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:23,674 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:23,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:23,695 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:25,257 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:25,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:25,257 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:25,264 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 21:59:25,287 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:25,319 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:25,326 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 21:59:25,330 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:25,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:59:25,333 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,334 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 21:59:25,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:59:25,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:59:25,392 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,393 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,398 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,398 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:35 [2018-01-28 21:59:25,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-01-28 21:59:25,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2018-01-28 21:59:25,418 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:25,421 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:25,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:25,425 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:23 [2018-01-28 21:59:25,427 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_21 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= |c_#valid| (store .cse0 v_arrayElimCell_21 1)) (= 0 (select .cse0 v_arrayElimCell_21))))) is different from true [2018-01-28 21:59:25,462 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_21 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= 0 (select .cse0 v_arrayElimCell_21)) (= (store (store .cse0 v_arrayElimCell_21 1) |c_create_data_#t~malloc24.base| 1) |c_#valid|)))) is different from true [2018-01-28 21:59:25,467 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_21 Int)) (let ((.cse0 (store |c_old(#valid)| create_data_~data~4.base 1))) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= |c_#valid| (store (store .cse0 v_arrayElimCell_21 1) c_create_data_~nextData~8.base 1)) (= 0 (select .cse0 v_arrayElimCell_21))))) is different from true [2018-01-28 21:59:25,478 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_arrayElimCell_21 Int) (v_subst_1 Int)) (let ((.cse0 (store |c_old(#valid)| v_subst_1 1))) (and (= 0 (select .cse0 v_arrayElimCell_21)) (= |c_#valid| (store (store .cse0 v_arrayElimCell_21 1) c_create_data_~data~4.base 1)) (= (select |c_old(#valid)| v_subst_1) 0)))) is different from true [2018-01-28 21:59:25,495 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_arrayElimCell_21 Int) (v_subst_1 Int)) (let ((.cse0 (store |c_old(#valid)| v_subst_1 1))) (and (= 0 (select .cse0 v_arrayElimCell_21)) (= |c_#valid| (store (store (store .cse0 v_arrayElimCell_21 1) c_create_data_~data~4.base 1) |c_create_data_#t~malloc24.base| 1)) (= (select |c_old(#valid)| v_subst_1) 0)))) is different from true [2018-01-28 21:59:25,498 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_arrayElimCell_21 Int) (v_subst_1 Int)) (let ((.cse0 (store |c_old(#valid)| v_subst_1 1))) (and (= 0 (select .cse0 v_arrayElimCell_21)) (= (select |c_old(#valid)| v_subst_1) 0) (= |c_#valid| (store (store (store .cse0 v_arrayElimCell_21 1) c_create_data_~data~4.base 1) c_create_data_~nextData~8.base 1))))) is different from true [2018-01-28 21:59:25,635 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:25,636 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:25,636 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:25,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 48 [2018-01-28 21:59:25,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 43 [2018-01-28 21:59:25,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 39 [2018-01-28 21:59:25,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-01-28 21:59:25,652 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,659 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,667 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,675 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:25,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:25,684 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:44, output treesize:38 [2018-01-28 21:59:25,762 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 30 not checked. [2018-01-28 21:59:25,783 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:25,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17] total 28 [2018-01-28 21:59:25,784 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-28 21:59:25,784 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-28 21:59:25,784 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=152, Invalid=367, Unknown=11, NotChecked=282, Total=812 [2018-01-28 21:59:25,784 INFO L87 Difference]: Start difference. First operand 477 states and 510 transitions. Second operand 29 states. [2018-01-28 21:59:27,279 WARN L1033 $PredicateComparison]: unable to prove that (and (exists ((create_data_~nextData~8.base Int) (v_arrayElimCell_21 Int) (v_subst_1 Int)) (let ((.cse0 (store |c_old(#valid)| v_subst_1 1))) (and (= 0 (select .cse0 v_arrayElimCell_21)) (= (select |c_#valid| create_data_~nextData~8.base) 1) (= (select |c_old(#valid)| v_subst_1) 0) (= |c_#valid| (store (store (store .cse0 v_arrayElimCell_21 1) c_create_data_~data~4.base 1) create_data_~nextData~8.base 1))))) (exists ((v_arrayElimCell_21 Int) (v_subst_1 Int)) (let ((.cse1 (store |c_old(#valid)| v_subst_1 1))) (and (= 0 (select .cse1 v_arrayElimCell_21)) (= (select |c_old(#valid)| v_subst_1) 0) (= |c_#valid| (store (store (store .cse1 v_arrayElimCell_21 1) c_create_data_~data~4.base 1) c_create_data_~nextData~8.base 1)))))) is different from true [2018-01-28 21:59:29,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:29,070 INFO L93 Difference]: Finished difference Result 596 states and 648 transitions. [2018-01-28 21:59:29,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 21:59:29,070 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 123 [2018-01-28 21:59:29,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:29,072 INFO L225 Difference]: With dead ends: 596 [2018-01-28 21:59:29,072 INFO L226 Difference]: Without dead ends: 594 [2018-01-28 21:59:29,073 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 121 SyntacticMatches, 10 SemanticMatches, 40 ConstructedPredicates, 7 IntricatePredicates, 0 DeprecatedPredicates, 322 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=299, Invalid=873, Unknown=46, NotChecked=504, Total=1722 [2018-01-28 21:59:29,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2018-01-28 21:59:29,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 519. [2018-01-28 21:59:29,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 519 states. [2018-01-28 21:59:29,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 556 transitions. [2018-01-28 21:59:29,098 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 556 transitions. Word has length 123 [2018-01-28 21:59:29,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:29,098 INFO L432 AbstractCegarLoop]: Abstraction has 519 states and 556 transitions. [2018-01-28 21:59:29,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-28 21:59:29,098 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 556 transitions. [2018-01-28 21:59:29,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-28 21:59:29,099 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:29,099 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:29,099 INFO L371 AbstractCegarLoop]: === Iteration 45 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:29,100 INFO L82 PathProgramCache]: Analyzing trace with hash -669911621, now seen corresponding path program 2 times [2018-01-28 21:59:29,100 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:29,100 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:29,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:29,101 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 21:59:29,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:29,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:29,129 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:30,181 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:30,181 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:30,181 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:30,186 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 21:59:30,207 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:30,238 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:30,246 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 21:59:30,249 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:30,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:59:30,252 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:30,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:59:30,262 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:30,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:30,272 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-01-28 21:59:30,386 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (and (= (store (store |c_old(#length)| |create_data_#t~malloc3.base| 16) |create_data_#t~malloc4.base| 80) |c_#length|) (= (select (store |c_old(#valid)| |create_data_#t~malloc3.base| 1) |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)))) is different from true [2018-01-28 21:59:30,423 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (and (= (select (store |c_old(#valid)| |create_data_#t~malloc3.base| 1) |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#length| (store (store (store |c_old(#length)| |create_data_#t~malloc3.base| 16) |create_data_#t~malloc4.base| 80) |c_create_data_#t~malloc24.base| 16)))) is different from true [2018-01-28 21:59:30,431 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (and (= (select (store |c_old(#valid)| |create_data_#t~malloc3.base| 1) |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#length| (store (store (store |c_old(#length)| |create_data_#t~malloc3.base| 16) |create_data_#t~malloc4.base| 80) c_create_data_~nextData~8.base 16)))) is different from true [2018-01-28 21:59:30,524 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,525 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 21:59:30,525 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:30,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:30,531 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:39, output treesize:33 [2018-01-28 21:59:30,533 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (and (= (select (store |c_old(#valid)| |create_data_#t~malloc3.base| 1) |create_data_#t~malloc4.base|) 0) (not (= create_data_~data~4.base |c_create_data_#t~malloc24.base|)) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#length| (store (store (store (store |c_old(#length)| |create_data_#t~malloc3.base| 16) |create_data_#t~malloc4.base| 80) create_data_~data~4.base 16) |c_create_data_#t~malloc24.base| 16)))) is different from true [2018-01-28 21:59:30,537 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (and (not (= create_data_~data~4.base c_create_data_~nextData~8.base)) (= (select (store |c_old(#valid)| |create_data_#t~malloc3.base| 1) |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= (store (store (store (store |c_old(#length)| |create_data_#t~malloc3.base| 16) |create_data_#t~malloc4.base| 80) create_data_~data~4.base 16) c_create_data_~nextData~8.base 16) |c_#length|))) is different from true [2018-01-28 21:59:30,670 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,671 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-01-28 21:59:30,674 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,675 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,675 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 55 [2018-01-28 21:59:30,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 43 treesize of output 47 [2018-01-28 21:59:30,691 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-01-28 21:59:30,691 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:30,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 50 [2018-01-28 21:59:30,727 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-01-28 21:59:30,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 50 [2018-01-28 21:59:30,774 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-01-28 21:59:30,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,823 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:30,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 9 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 27 treesize of output 70 [2018-01-28 21:59:30,838 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 4 xjuncts. [2018-01-28 21:59:30,913 INFO L267 ElimStorePlain]: Start of recursive call 4: 4 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-01-28 21:59:30,984 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-01-28 21:59:31,031 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-01-28 21:59:31,083 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:31,084 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:31,084 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:31,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-01-28 21:59:31,085 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:31,135 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 18 dim-0 vars, and 6 xjuncts. [2018-01-28 21:59:31,136 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:51, output treesize:217 [2018-01-28 21:59:31,306 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 36 trivial. 17 not checked. [2018-01-28 21:59:31,326 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:31,326 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 29 [2018-01-28 21:59:31,327 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-28 21:59:31,327 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-28 21:59:31,327 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=480, Unknown=23, NotChecked=250, Total=870 [2018-01-28 21:59:31,327 INFO L87 Difference]: Start difference. First operand 519 states and 556 transitions. Second operand 30 states. [2018-01-28 21:59:32,374 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 66 DAG size of output 63 [2018-01-28 21:59:32,838 WARN L146 SmtUtils]: Spent 143ms on a formula simplification. DAG size of input: 68 DAG size of output 65 [2018-01-28 21:59:33,014 WARN L146 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 50 DAG size of output 48 [2018-01-28 21:59:33,512 WARN L146 SmtUtils]: Spent 133ms on a formula simplification. DAG size of input: 67 DAG size of output 57 [2018-01-28 21:59:33,742 WARN L146 SmtUtils]: Spent 156ms on a formula simplification. DAG size of input: 64 DAG size of output 57 [2018-01-28 21:59:34,081 WARN L146 SmtUtils]: Spent 130ms on a formula simplification. DAG size of input: 81 DAG size of output 60 [2018-01-28 21:59:34,360 WARN L146 SmtUtils]: Spent 141ms on a formula simplification. DAG size of input: 77 DAG size of output 63 [2018-01-28 21:59:34,817 WARN L146 SmtUtils]: Spent 130ms on a formula simplification. DAG size of input: 76 DAG size of output 67 [2018-01-28 21:59:36,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:36,824 INFO L93 Difference]: Finished difference Result 747 states and 818 transitions. [2018-01-28 21:59:36,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-28 21:59:36,824 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 123 [2018-01-28 21:59:36,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:36,826 INFO L225 Difference]: With dead ends: 747 [2018-01-28 21:59:36,827 INFO L226 Difference]: Without dead ends: 745 [2018-01-28 21:59:36,827 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 334 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=262, Invalid=1346, Unknown=52, NotChecked=410, Total=2070 [2018-01-28 21:59:36,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 745 states. [2018-01-28 21:59:36,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 745 to 519. [2018-01-28 21:59:36,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 519 states. [2018-01-28 21:59:36,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 554 transitions. [2018-01-28 21:59:36,855 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 554 transitions. Word has length 123 [2018-01-28 21:59:36,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:36,855 INFO L432 AbstractCegarLoop]: Abstraction has 519 states and 554 transitions. [2018-01-28 21:59:36,855 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-28 21:59:36,855 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 554 transitions. [2018-01-28 21:59:36,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-01-28 21:59:36,857 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:36,857 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:36,857 INFO L371 AbstractCegarLoop]: === Iteration 46 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:36,857 INFO L82 PathProgramCache]: Analyzing trace with hash -819208220, now seen corresponding path program 1 times [2018-01-28 21:59:36,857 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:36,858 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:36,858 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:36,858 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 21:59:36,858 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:36,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:36,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:36,979 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:36,979 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 21:59:36,980 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 21:59:36,980 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 21:59:36,980 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 21:59:36,980 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-28 21:59:36,980 INFO L87 Difference]: Start difference. First operand 519 states and 554 transitions. Second operand 8 states. [2018-01-28 21:59:37,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:37,244 INFO L93 Difference]: Finished difference Result 544 states and 578 transitions. [2018-01-28 21:59:37,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 21:59:37,244 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 125 [2018-01-28 21:59:37,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:37,246 INFO L225 Difference]: With dead ends: 544 [2018-01-28 21:59:37,246 INFO L226 Difference]: Without dead ends: 538 [2018-01-28 21:59:37,246 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-28 21:59:37,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 538 states. [2018-01-28 21:59:37,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 538 to 519. [2018-01-28 21:59:37,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 519 states. [2018-01-28 21:59:37,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 552 transitions. [2018-01-28 21:59:37,273 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 552 transitions. Word has length 125 [2018-01-28 21:59:37,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:37,273 INFO L432 AbstractCegarLoop]: Abstraction has 519 states and 552 transitions. [2018-01-28 21:59:37,273 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 21:59:37,273 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 552 transitions. [2018-01-28 21:59:37,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-01-28 21:59:37,275 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:37,275 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:37,275 INFO L371 AbstractCegarLoop]: === Iteration 47 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:37,275 INFO L82 PathProgramCache]: Analyzing trace with hash 460035116, now seen corresponding path program 2 times [2018-01-28 21:59:37,275 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:37,276 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:37,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:37,276 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:37,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:37,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:37,318 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:38,708 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:38,709 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:38,709 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:38,715 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 21:59:38,739 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:38,771 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:38,779 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 21:59:38,783 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:38,812 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc3.base| Int)) (and (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#valid| (store |c_old(#valid)| |create_data_#t~malloc3.base| 1)))) is different from true [2018-01-28 21:59:38,814 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse0 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse0 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#valid| (store .cse0 |create_data_#t~malloc4.base| 1))))) is different from true [2018-01-28 21:59:38,841 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse0 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse0 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#valid| (store (store .cse0 |create_data_#t~malloc4.base| 1) |c_create_data_#t~malloc24.base| 1))))) is different from true [2018-01-28 21:59:38,844 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse0 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse0 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= (store (store .cse0 |create_data_#t~malloc4.base| 1) c_create_data_~nextData~8.base 1) |c_#valid|)))) is different from true [2018-01-28 21:59:38,851 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse0 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse0 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#valid| (store (store .cse0 |create_data_#t~malloc4.base| 1) c_create_data_~data~4.base 1))))) is different from true [2018-01-28 21:59:38,856 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse0 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse0 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#valid| (store (store (store .cse0 |create_data_#t~malloc4.base| 1) c_create_data_~data~4.base 1) |c_create_data_#t~malloc24.base| 1))))) is different from true [2018-01-28 21:59:38,858 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse0 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse0 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= (store (store (store .cse0 |create_data_#t~malloc4.base| 1) c_create_data_~data~4.base 1) c_create_data_~nextData~8.base 1) |c_#valid|)))) is different from true [2018-01-28 21:59:38,970 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:38,971 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:38,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:38,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 48 [2018-01-28 21:59:38,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 43 [2018-01-28 21:59:38,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 39 [2018-01-28 21:59:38,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-01-28 21:59:38,989 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:38,997 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:39,004 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:39,012 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:39,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:39,021 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:44, output treesize:38 [2018-01-28 21:59:39,094 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 22 not checked. [2018-01-28 21:59:39,114 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:39,114 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 25 [2018-01-28 21:59:39,114 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-28 21:59:39,114 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-28 21:59:39,115 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=242, Unknown=8, NotChecked=280, Total=650 [2018-01-28 21:59:39,115 INFO L87 Difference]: Start difference. First operand 519 states and 552 transitions. Second operand 26 states. [2018-01-28 21:59:40,301 WARN L1033 $PredicateComparison]: unable to prove that (and (exists ((create_data_~nextData~8.base Int) (|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse0 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse0 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= (select |c_#valid| create_data_~nextData~8.base) 1) (= (store (store (store .cse0 |create_data_#t~malloc4.base| 1) c_create_data_~data~4.base 1) create_data_~nextData~8.base 1) |c_#valid|)))) (exists ((|create_data_#t~malloc4.base| Int) (|create_data_#t~malloc3.base| Int)) (let ((.cse1 (store |c_old(#valid)| |create_data_#t~malloc3.base| 1))) (and (= (select .cse1 |create_data_#t~malloc4.base|) 0) (= 0 (select |c_old(#valid)| |create_data_#t~malloc3.base|)) (= |c_#valid| (store (store (store .cse1 |create_data_#t~malloc4.base| 1) c_create_data_~data~4.base 1) |c_create_data_#t~malloc24.base| 1)))))) is different from true [2018-01-28 21:59:41,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:41,949 INFO L93 Difference]: Finished difference Result 704 states and 768 transitions. [2018-01-28 21:59:41,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-28 21:59:41,950 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 125 [2018-01-28 21:59:41,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:41,952 INFO L225 Difference]: With dead ends: 704 [2018-01-28 21:59:41,952 INFO L226 Difference]: Without dead ends: 703 [2018-01-28 21:59:41,953 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 129 SyntacticMatches, 5 SemanticMatches, 34 ConstructedPredicates, 8 IntricatePredicates, 0 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=221, Invalid=527, Unknown=40, NotChecked=472, Total=1260 [2018-01-28 21:59:41,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 703 states. [2018-01-28 21:59:41,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 703 to 525. [2018-01-28 21:59:41,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 525 states. [2018-01-28 21:59:41,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 525 states to 525 states and 560 transitions. [2018-01-28 21:59:41,997 INFO L78 Accepts]: Start accepts. Automaton has 525 states and 560 transitions. Word has length 125 [2018-01-28 21:59:41,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:41,997 INFO L432 AbstractCegarLoop]: Abstraction has 525 states and 560 transitions. [2018-01-28 21:59:41,997 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-28 21:59:41,997 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 560 transitions. [2018-01-28 21:59:41,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-01-28 21:59:41,998 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:41,998 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:41,998 INFO L371 AbstractCegarLoop]: === Iteration 48 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:41,998 INFO L82 PathProgramCache]: Analyzing trace with hash 460035117, now seen corresponding path program 2 times [2018-01-28 21:59:41,998 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:41,998 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:41,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:41,999 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 21:59:41,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:42,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:42,032 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:43,318 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:43,318 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:43,318 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:43,323 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 21:59:43,346 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:43,377 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 21:59:43,388 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 21:59:43,392 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:43,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:59:43,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:59:43,527 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:43,528 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:43,534 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:43,534 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:35 [2018-01-28 21:59:43,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-01-28 21:59:43,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2018-01-28 21:59:43,566 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:43,569 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:43,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:43,573 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:23 [2018-01-28 21:59:43,574 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_24 Int)) (and (= 0 (select (store |c_old(#valid)| create_data_~data~4.base 1) v_arrayElimCell_24)) (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_24 80) |c_#length|))) is different from true [2018-01-28 21:59:43,615 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_24 Int)) (and (= 0 (select (store |c_old(#valid)| create_data_~data~4.base 1) v_arrayElimCell_24)) (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= (store (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_24 80) |c_create_data_#t~malloc24.base| 16) |c_#length|))) is different from true [2018-01-28 21:59:43,618 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_24 Int)) (and (= 0 (select (store |c_old(#valid)| create_data_~data~4.base 1) v_arrayElimCell_24)) (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= |c_#length| (store (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_24 80) c_create_data_~nextData~8.base 16)))) is different from true [2018-01-28 21:59:43,748 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:43,749 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:43,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 21:59:43,750 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:43,756 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:43,756 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:39, output treesize:33 [2018-01-28 21:59:43,759 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_24 Int) (v_subst_2 Int)) (and (not (= create_data_~data~4.base |c_create_data_#t~malloc24.base|)) (= 0 (select (store |c_old(#valid)| v_subst_2 1) v_arrayElimCell_24)) (= (store (store (store (store |c_old(#length)| v_subst_2 16) v_arrayElimCell_24 80) create_data_~data~4.base 16) |c_create_data_#t~malloc24.base| 16) |c_#length|) (= (select |c_old(#valid)| v_subst_2) 0))) is different from true [2018-01-28 21:59:43,762 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_24 Int) (v_subst_2 Int)) (and (not (= create_data_~data~4.base c_create_data_~nextData~8.base)) (= |c_#length| (store (store (store (store |c_old(#length)| v_subst_2 16) v_arrayElimCell_24 80) create_data_~data~4.base 16) c_create_data_~nextData~8.base 16)) (= 0 (select (store |c_old(#valid)| v_subst_2 1) v_arrayElimCell_24)) (= (select |c_old(#valid)| v_subst_2) 0))) is different from true [2018-01-28 21:59:43,857 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:43,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 29 [2018-01-28 21:59:43,863 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:43,865 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:43,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 45 [2018-01-28 21:59:43,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 33 treesize of output 52 [2018-01-28 21:59:43,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:43,901 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:43,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 41 treesize of output 65 [2018-01-28 21:59:43,914 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 4 xjuncts. [2018-01-28 21:59:44,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 49 [2018-01-28 21:59:44,016 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-01-28 21:59:44,044 INFO L267 ElimStorePlain]: Start of recursive call 4: 4 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-28 21:59:44,066 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-28 21:59:44,087 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-28 21:59:44,116 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:44,117 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:44,118 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:44,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-01-28 21:59:44,118 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:44,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 10 dim-0 vars, and 3 xjuncts. [2018-01-28 21:59:44,145 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 6 variables, input treesize:53, output treesize:132 [2018-01-28 21:59:47,260 WARN L146 SmtUtils]: Spent 3064ms on a formula simplification. DAG size of input: 77 DAG size of output 57 [2018-01-28 21:59:47,321 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 28 trivial. 26 not checked. [2018-01-28 21:59:47,341 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:47,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19] total 33 [2018-01-28 21:59:47,342 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-28 21:59:47,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-28 21:59:47,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=679, Unknown=14, NotChecked=290, Total=1122 [2018-01-28 21:59:47,343 INFO L87 Difference]: Start difference. First operand 525 states and 560 transitions. Second operand 34 states. [2018-01-28 21:59:48,581 WARN L146 SmtUtils]: Spent 131ms on a formula simplification. DAG size of input: 64 DAG size of output 61 [2018-01-28 21:59:48,986 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 66 DAG size of output 63 [2018-01-28 21:59:49,415 WARN L146 SmtUtils]: Spent 124ms on a formula simplification. DAG size of input: 66 DAG size of output 56 [2018-01-28 21:59:49,733 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 81 DAG size of output 60 [2018-01-28 21:59:50,007 WARN L146 SmtUtils]: Spent 144ms on a formula simplification. DAG size of input: 77 DAG size of output 63 [2018-01-28 21:59:50,866 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 75 DAG size of output 66 [2018-01-28 21:59:52,296 WARN L146 SmtUtils]: Spent 1072ms on a formula simplification. DAG size of input: 64 DAG size of output 64 [2018-01-28 21:59:53,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:53,581 INFO L93 Difference]: Finished difference Result 612 states and 660 transitions. [2018-01-28 21:59:53,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-28 21:59:53,581 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 125 [2018-01-28 21:59:53,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:53,583 INFO L225 Difference]: With dead ends: 612 [2018-01-28 21:59:53,584 INFO L226 Difference]: Without dead ends: 611 [2018-01-28 21:59:53,585 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 128 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 656 ImplicationChecksByTransitivity, 7.4s TimeCoverageRelationStatistics Valid=377, Invalid=2251, Unknown=44, NotChecked=520, Total=3192 [2018-01-28 21:59:53,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 611 states. [2018-01-28 21:59:53,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 611 to 509. [2018-01-28 21:59:53,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 509 states. [2018-01-28 21:59:53,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 509 states to 509 states and 542 transitions. [2018-01-28 21:59:53,614 INFO L78 Accepts]: Start accepts. Automaton has 509 states and 542 transitions. Word has length 125 [2018-01-28 21:59:53,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:53,614 INFO L432 AbstractCegarLoop]: Abstraction has 509 states and 542 transitions. [2018-01-28 21:59:53,614 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-28 21:59:53,615 INFO L276 IsEmpty]: Start isEmpty. Operand 509 states and 542 transitions. [2018-01-28 21:59:53,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 21:59:53,615 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:53,615 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:53,615 INFO L371 AbstractCegarLoop]: === Iteration 49 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:53,615 INFO L82 PathProgramCache]: Analyzing trace with hash -581471184, now seen corresponding path program 1 times [2018-01-28 21:59:53,616 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:53,616 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:53,616 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:53,616 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 21:59:53,616 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:53,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:53,627 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:53,836 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:53,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:53,836 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:53,841 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:53,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:53,883 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:53,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-01-28 21:59:53,941 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:53,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:53,944 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:18 [2018-01-28 21:59:53,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 27 treesize of output 37 [2018-01-28 21:59:54,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-01-28 21:59:54,002 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:54,013 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:54,017 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:54,017 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:28 [2018-01-28 21:59:54,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 32 [2018-01-28 21:59:54,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 17 [2018-01-28 21:59:54,044 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:54,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 5 [2018-01-28 21:59:54,053 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:54,056 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:54,059 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:54,059 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-01-28 21:59:54,079 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:54,099 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 21:59:54,099 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [11] total 20 [2018-01-28 21:59:54,100 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-28 21:59:54,100 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-28 21:59:54,100 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=361, Unknown=0, NotChecked=0, Total=420 [2018-01-28 21:59:54,100 INFO L87 Difference]: Start difference. First operand 509 states and 542 transitions. Second operand 21 states. [2018-01-28 21:59:54,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 21:59:54,925 INFO L93 Difference]: Finished difference Result 520 states and 556 transitions. [2018-01-28 21:59:54,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-28 21:59:54,925 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 128 [2018-01-28 21:59:54,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 21:59:54,927 INFO L225 Difference]: With dead ends: 520 [2018-01-28 21:59:54,927 INFO L226 Difference]: Without dead ends: 519 [2018-01-28 21:59:54,927 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=186, Invalid=684, Unknown=0, NotChecked=0, Total=870 [2018-01-28 21:59:54,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2018-01-28 21:59:54,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 508. [2018-01-28 21:59:54,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 508 states. [2018-01-28 21:59:54,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 508 states and 541 transitions. [2018-01-28 21:59:54,956 INFO L78 Accepts]: Start accepts. Automaton has 508 states and 541 transitions. Word has length 128 [2018-01-28 21:59:54,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 21:59:54,956 INFO L432 AbstractCegarLoop]: Abstraction has 508 states and 541 transitions. [2018-01-28 21:59:54,956 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-28 21:59:54,956 INFO L276 IsEmpty]: Start isEmpty. Operand 508 states and 541 transitions. [2018-01-28 21:59:54,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 21:59:54,957 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 21:59:54,957 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 21:59:54,957 INFO L371 AbstractCegarLoop]: === Iteration 50 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 21:59:54,957 INFO L82 PathProgramCache]: Analyzing trace with hash -581471183, now seen corresponding path program 1 times [2018-01-28 21:59:54,958 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 21:59:54,958 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 21:59:54,958 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:54,958 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:54,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 21:59:54,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:54,977 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 21:59:55,236 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 21:59:55,237 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 21:59:55,237 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 21:59:55,243 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 21:59:55,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 21:59:55,288 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 21:59:55,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 21:59:55,298 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,301 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-01-28 21:59:55,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 21:59:55,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 21:59:55,399 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,400 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,406 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:35 [2018-01-28 21:59:55,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-01-28 21:59:55,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2018-01-28 21:59:55,430 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:55,432 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:55,436 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:55,437 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:23 [2018-01-28 21:59:55,438 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (v_arrayElimCell_34 Int)) (and (= (select |c_old(#valid)| create_data_~data~4.base) 0) (= 0 (select (store |c_old(#valid)| create_data_~data~4.base 1) v_arrayElimCell_34)) (= |c_#length| (store (store |c_old(#length)| create_data_~data~4.base 16) v_arrayElimCell_34 80)))) is different from true [2018-01-28 21:59:55,472 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-01-28 21:59:55,474 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,484 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 27 [2018-01-28 21:59:55,486 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,487 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 46 [2018-01-28 21:59:55,488 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,500 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:55,511 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:39, output treesize:22 [2018-01-28 21:59:55,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 21:59:55,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 21:59:55,540 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,541 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:55,545 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 21:59:55,545 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:20 [2018-01-28 21:59:55,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,722 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,723 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,725 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,725 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,726 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 21:59:55,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 41 treesize of output 60 [2018-01-28 21:59:55,735 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 4 xjuncts. [2018-01-28 21:59:55,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-01-28 21:59:55,775 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:51, output treesize:133 [2018-01-28 21:59:55,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 73 treesize of output 81 [2018-01-28 21:59:56,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 73 [2018-01-28 21:59:56,001 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,053 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 76 treesize of output 84 [2018-01-28 21:59:56,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 70 [2018-01-28 21:59:56,134 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 72 [2018-01-28 21:59:56,168 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,186 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 72 treesize of output 80 [2018-01-28 21:59:56,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 72 [2018-01-28 21:59:56,255 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,286 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 76 treesize of output 84 [2018-01-28 21:59:56,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 76 [2018-01-28 21:59:56,349 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,382 INFO L267 ElimStorePlain]: Start of recursive call 9: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 69 treesize of output 79 [2018-01-28 21:59:56,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 69 [2018-01-28 21:59:56,437 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,468 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 72 treesize of output 80 [2018-01-28 21:59:56,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 72 [2018-01-28 21:59:56,520 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,565 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 6 dim-2 vars, End of recursive call: 7 dim-0 vars, and 3 xjuncts. [2018-01-28 21:59:56,598 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 13 variables, input treesize:226, output treesize:202 [2018-01-28 21:59:56,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 84 [2018-01-28 21:59:56,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 75 [2018-01-28 21:59:56,712 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 60 [2018-01-28 21:59:56,748 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 56 [2018-01-28 21:59:56,779 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,796 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 83 treesize of output 83 [2018-01-28 21:59:56,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 68 [2018-01-28 21:59:56,842 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 57 [2018-01-28 21:59:56,875 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,901 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 55 [2018-01-28 21:59:56,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 40 [2018-01-28 21:59:56,943 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 31 [2018-01-28 21:59:56,964 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 27 [2018-01-28 21:59:56,985 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:56,997 INFO L267 ElimStorePlain]: Start of recursive call 9: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 84 [2018-01-28 21:59:57,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 56 [2018-01-28 21:59:57,037 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,069 INFO L267 ElimStorePlain]: Start of recursive call 13: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 54 [2018-01-28 21:59:57,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 45 [2018-01-28 21:59:57,103 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 30 [2018-01-28 21:59:57,125 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 26 [2018-01-28 21:59:57,145 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,156 INFO L267 ElimStorePlain]: Start of recursive call 15: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 54 [2018-01-28 21:59:57,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-01-28 21:59:57,205 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-28 21:59:57,227 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 26 [2018-01-28 21:59:57,248 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,260 INFO L267 ElimStorePlain]: Start of recursive call 19: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 21:59:57,281 INFO L267 ElimStorePlain]: Start of recursive call 1: 13 dim-0 vars, 6 dim-2 vars, End of recursive call: 7 dim-0 vars, and 3 xjuncts. [2018-01-28 21:59:57,281 INFO L202 ElimStorePlain]: Needed 22 recursive calls to eliminate 19 variables, input treesize:256, output treesize:80 [2018-01-28 21:59:57,440 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 28 trivial. 8 not checked. [2018-01-28 21:59:57,460 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 21:59:57,461 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 24] total 34 [2018-01-28 21:59:57,461 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-28 21:59:57,461 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-28 21:59:57,461 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=1037, Unknown=1, NotChecked=64, Total=1190 [2018-01-28 21:59:57,462 INFO L87 Difference]: Start difference. First operand 508 states and 541 transitions. Second operand 35 states. [2018-01-28 21:59:58,956 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 72 DAG size of output 58 [2018-01-28 21:59:59,179 WARN L146 SmtUtils]: Spent 155ms on a formula simplification. DAG size of input: 121 DAG size of output 105 [2018-01-28 21:59:59,528 WARN L146 SmtUtils]: Spent 265ms on a formula simplification. DAG size of input: 151 DAG size of output 125 [2018-01-28 21:59:59,765 WARN L146 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 128 DAG size of output 112 [2018-01-28 22:00:00,063 WARN L146 SmtUtils]: Spent 199ms on a formula simplification. DAG size of input: 154 DAG size of output 100 [2018-01-28 22:00:01,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:00:01,527 INFO L93 Difference]: Finished difference Result 616 states and 670 transitions. [2018-01-28 22:00:01,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-28 22:00:01,528 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 128 [2018-01-28 22:00:01,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:00:01,529 INFO L225 Difference]: With dead ends: 616 [2018-01-28 22:00:01,529 INFO L226 Difference]: Without dead ends: 615 [2018-01-28 22:00:01,530 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 108 SyntacticMatches, 4 SemanticMatches, 66 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 981 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=516, Invalid=3906, Unknown=4, NotChecked=130, Total=4556 [2018-01-28 22:00:01,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 615 states. [2018-01-28 22:00:01,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 615 to 507. [2018-01-28 22:00:01,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 507 states. [2018-01-28 22:00:01,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 540 transitions. [2018-01-28 22:00:01,561 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 540 transitions. Word has length 128 [2018-01-28 22:00:01,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:00:01,561 INFO L432 AbstractCegarLoop]: Abstraction has 507 states and 540 transitions. [2018-01-28 22:00:01,561 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-28 22:00:01,561 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 540 transitions. [2018-01-28 22:00:01,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 22:00:01,562 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:00:01,562 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:00:01,562 INFO L371 AbstractCegarLoop]: === Iteration 51 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:00:01,562 INFO L82 PathProgramCache]: Analyzing trace with hash 474560065, now seen corresponding path program 1 times [2018-01-28 22:00:01,562 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:00:01,562 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:00:01,563 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:01,563 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:01,563 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:01,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:01,573 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:00:01,674 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:01,674 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:00:01,674 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:00:01,675 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:00:01,675 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:00:01,675 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:00:01,675 INFO L87 Difference]: Start difference. First operand 507 states and 540 transitions. Second operand 7 states. [2018-01-28 22:00:01,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:00:01,889 INFO L93 Difference]: Finished difference Result 516 states and 549 transitions. [2018-01-28 22:00:01,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:00:01,889 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 128 [2018-01-28 22:00:01,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:00:01,891 INFO L225 Difference]: With dead ends: 516 [2018-01-28 22:00:01,891 INFO L226 Difference]: Without dead ends: 515 [2018-01-28 22:00:01,891 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:00:01,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 515 states. [2018-01-28 22:00:01,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 515 to 512. [2018-01-28 22:00:01,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 512 states. [2018-01-28 22:00:01,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 512 states to 512 states and 546 transitions. [2018-01-28 22:00:01,920 INFO L78 Accepts]: Start accepts. Automaton has 512 states and 546 transitions. Word has length 128 [2018-01-28 22:00:01,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:00:01,920 INFO L432 AbstractCegarLoop]: Abstraction has 512 states and 546 transitions. [2018-01-28 22:00:01,920 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:00:01,921 INFO L276 IsEmpty]: Start isEmpty. Operand 512 states and 546 transitions. [2018-01-28 22:00:01,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 22:00:01,921 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:00:01,921 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:00:01,921 INFO L371 AbstractCegarLoop]: === Iteration 52 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:00:01,922 INFO L82 PathProgramCache]: Analyzing trace with hash 474560066, now seen corresponding path program 1 times [2018-01-28 22:00:01,922 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:00:01,922 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:00:01,922 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:01,922 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:01,922 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:01,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:01,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:00:02,037 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:02,037 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:00:02,037 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:00:02,038 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:00:02,038 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:00:02,038 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:00:02,038 INFO L87 Difference]: Start difference. First operand 512 states and 546 transitions. Second operand 10 states. [2018-01-28 22:00:02,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:00:02,257 INFO L93 Difference]: Finished difference Result 569 states and 609 transitions. [2018-01-28 22:00:02,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 22:00:02,257 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 128 [2018-01-28 22:00:02,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:00:02,259 INFO L225 Difference]: With dead ends: 569 [2018-01-28 22:00:02,259 INFO L226 Difference]: Without dead ends: 568 [2018-01-28 22:00:02,259 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=185, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:00:02,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2018-01-28 22:00:02,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 539. [2018-01-28 22:00:02,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 539 states. [2018-01-28 22:00:02,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 539 states to 539 states and 576 transitions. [2018-01-28 22:00:02,289 INFO L78 Accepts]: Start accepts. Automaton has 539 states and 576 transitions. Word has length 128 [2018-01-28 22:00:02,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:00:02,289 INFO L432 AbstractCegarLoop]: Abstraction has 539 states and 576 transitions. [2018-01-28 22:00:02,289 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:00:02,289 INFO L276 IsEmpty]: Start isEmpty. Operand 539 states and 576 transitions. [2018-01-28 22:00:02,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-01-28 22:00:02,290 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:00:02,290 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:00:02,290 INFO L371 AbstractCegarLoop]: === Iteration 53 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:00:02,290 INFO L82 PathProgramCache]: Analyzing trace with hash -1413127265, now seen corresponding path program 1 times [2018-01-28 22:00:02,290 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:00:02,291 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:00:02,291 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:02,291 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:02,291 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:02,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:02,302 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:00:02,383 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:02,383 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:00:02,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:00:02,383 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 22:00:02,383 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 22:00:02,384 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:00:02,384 INFO L87 Difference]: Start difference. First operand 539 states and 576 transitions. Second operand 9 states. [2018-01-28 22:00:02,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:00:02,700 INFO L93 Difference]: Finished difference Result 552 states and 593 transitions. [2018-01-28 22:00:02,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 22:00:02,700 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 131 [2018-01-28 22:00:02,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:00:02,702 INFO L225 Difference]: With dead ends: 552 [2018-01-28 22:00:02,702 INFO L226 Difference]: Without dead ends: 551 [2018-01-28 22:00:02,702 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:00:02,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2018-01-28 22:00:02,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 542. [2018-01-28 22:00:02,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 542 states. [2018-01-28 22:00:02,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 542 states to 542 states and 581 transitions. [2018-01-28 22:00:02,736 INFO L78 Accepts]: Start accepts. Automaton has 542 states and 581 transitions. Word has length 131 [2018-01-28 22:00:02,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:00:02,736 INFO L432 AbstractCegarLoop]: Abstraction has 542 states and 581 transitions. [2018-01-28 22:00:02,736 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 22:00:02,737 INFO L276 IsEmpty]: Start isEmpty. Operand 542 states and 581 transitions. [2018-01-28 22:00:02,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-01-28 22:00:02,738 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:00:02,738 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:00:02,738 INFO L371 AbstractCegarLoop]: === Iteration 54 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:00:02,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1413127264, now seen corresponding path program 1 times [2018-01-28 22:00:02,738 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:00:02,738 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:00:02,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:02,739 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:02,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:02,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:02,756 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:00:03,195 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:03,196 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:00:03,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-01-28 22:00:03,196 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:00:03,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:00:03,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=415, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:00:03,196 INFO L87 Difference]: Start difference. First operand 542 states and 581 transitions. Second operand 22 states. [2018-01-28 22:00:04,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:00:04,339 INFO L93 Difference]: Finished difference Result 603 states and 648 transitions. [2018-01-28 22:00:04,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-28 22:00:04,339 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 131 [2018-01-28 22:00:04,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:00:04,341 INFO L225 Difference]: With dead ends: 603 [2018-01-28 22:00:04,341 INFO L226 Difference]: Without dead ends: 601 [2018-01-28 22:00:04,341 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 420 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=214, Invalid=1948, Unknown=0, NotChecked=0, Total=2162 [2018-01-28 22:00:04,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 601 states. [2018-01-28 22:00:04,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 601 to 576. [2018-01-28 22:00:04,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 576 states. [2018-01-28 22:00:04,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 576 states to 576 states and 620 transitions. [2018-01-28 22:00:04,375 INFO L78 Accepts]: Start accepts. Automaton has 576 states and 620 transitions. Word has length 131 [2018-01-28 22:00:04,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:00:04,375 INFO L432 AbstractCegarLoop]: Abstraction has 576 states and 620 transitions. [2018-01-28 22:00:04,375 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:00:04,375 INFO L276 IsEmpty]: Start isEmpty. Operand 576 states and 620 transitions. [2018-01-28 22:00:04,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-01-28 22:00:04,376 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:00:04,376 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:00:04,376 INFO L371 AbstractCegarLoop]: === Iteration 55 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:00:04,376 INFO L82 PathProgramCache]: Analyzing trace with hash 923507801, now seen corresponding path program 1 times [2018-01-28 22:00:04,377 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:00:04,377 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:00:04,377 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:04,377 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:04,377 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:04,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:04,398 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:00:04,824 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:04,824 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:00:04,824 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:00:04,829 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:04,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:04,878 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:00:04,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:00:04,880 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:04,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:04,883 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-28 22:00:05,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:00:05,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:00:05,050 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,051 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,056 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,057 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-01-28 22:00:05,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-01-28 22:00:05,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-01-28 22:00:05,105 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:05,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-01-28 22:00:05,123 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,135 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:05,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:00:05,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:00:05,150 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,152 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:05,163 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:57 [2018-01-28 22:00:05,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:05,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:05,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-01-28 22:00:05,205 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,216 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:73, output treesize:29 [2018-01-28 22:00:05,379 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:05,380 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:05,381 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:05,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 74 [2018-01-28 22:00:05,382 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,391 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,391 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:49, output treesize:67 [2018-01-28 22:00:05,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 76 treesize of output 79 [2018-01-28 22:00:05,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 76 [2018-01-28 22:00:05,547 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,575 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 59 [2018-01-28 22:00:05,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 51 [2018-01-28 22:00:05,648 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,674 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,685 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:05,686 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:98, output treesize:90 [2018-01-28 22:00:05,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 54 [2018-01-28 22:00:05,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-01-28 22:00:05,760 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-28 22:00:05,774 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 26 [2018-01-28 22:00:05,787 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,794 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,805 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:05,806 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:108, output treesize:78 [2018-01-28 22:00:05,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 76 [2018-01-28 22:00:05,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 58 [2018-01-28 22:00:05,874 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 39 [2018-01-28 22:00:05,895 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-01-28 22:00:05,912 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:05,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-01-28 22:00:05,928 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:05,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 26 [2018-01-28 22:00:05,946 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:05,960 INFO L267 ElimStorePlain]: Start of recursive call 2: 5 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:05,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:05,976 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:82, output treesize:49 [2018-01-28 22:00:06,160 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:06,180 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:00:06,180 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 45 [2018-01-28 22:00:06,180 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-28 22:00:06,180 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-28 22:00:06,181 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=1944, Unknown=0, NotChecked=0, Total=2070 [2018-01-28 22:00:06,181 INFO L87 Difference]: Start difference. First operand 576 states and 620 transitions. Second operand 46 states. [2018-01-28 22:00:10,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:00:10,255 INFO L93 Difference]: Finished difference Result 999 states and 1086 transitions. [2018-01-28 22:00:10,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2018-01-28 22:00:10,256 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 133 [2018-01-28 22:00:10,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:00:10,258 INFO L225 Difference]: With dead ends: 999 [2018-01-28 22:00:10,258 INFO L226 Difference]: Without dead ends: 997 [2018-01-28 22:00:10,259 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3590 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=932, Invalid=11277, Unknown=1, NotChecked=0, Total=12210 [2018-01-28 22:00:10,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 997 states. [2018-01-28 22:00:10,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 997 to 741. [2018-01-28 22:00:10,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 741 states. [2018-01-28 22:00:10,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 802 transitions. [2018-01-28 22:00:10,308 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 802 transitions. Word has length 133 [2018-01-28 22:00:10,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:00:10,308 INFO L432 AbstractCegarLoop]: Abstraction has 741 states and 802 transitions. [2018-01-28 22:00:10,308 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-28 22:00:10,308 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 802 transitions. [2018-01-28 22:00:10,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-01-28 22:00:10,309 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:00:10,309 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:00:10,309 INFO L371 AbstractCegarLoop]: === Iteration 56 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:00:10,309 INFO L82 PathProgramCache]: Analyzing trace with hash 923507802, now seen corresponding path program 1 times [2018-01-28 22:00:10,310 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:00:10,310 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:00:10,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:10,310 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:10,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:10,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:10,336 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:00:11,504 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:11,504 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:00:11,504 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:00:11,509 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:11,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:11,561 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:00:11,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:00:11,564 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,566 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-28 22:00:11,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:00:11,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:00:11,801 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,802 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:00:11,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:00:11,814 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,815 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,823 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,823 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:44, output treesize:37 [2018-01-28 22:00:11,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-01-28 22:00:11,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-01-28 22:00:11,883 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-01-28 22:00:11,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-01-28 22:00:11,900 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-28 22:00:11,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 40 [2018-01-28 22:00:11,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 26 treesize of output 32 [2018-01-28 22:00:11,944 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:11,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-01-28 22:00:11,967 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:11,981 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:12,004 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-01-28 22:00:12,005 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:53, output treesize:201 [2018-01-28 22:00:12,095 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-01-28 22:00:12,095 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,104 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:12,105 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:12,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-01-28 22:00:12,105 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,112 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:110, output treesize:61 [2018-01-28 22:00:12,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:12,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:12,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 57 [2018-01-28 22:00:12,348 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:12,362 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:12,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:12,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-01-28 22:00:12,364 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,372 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,373 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:81, output treesize:57 [2018-01-28 22:00:12,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 74 [2018-01-28 22:00:12,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 66 [2018-01-28 22:00:12,537 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,567 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 73 [2018-01-28 22:00:12,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-01-28 22:00:12,597 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 62 [2018-01-28 22:00:12,621 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,632 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,642 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:12,642 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:88, output treesize:80 [2018-01-28 22:00:12,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 100 treesize of output 103 [2018-01-28 22:00:12,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 90 [2018-01-28 22:00:12,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 58 [2018-01-28 22:00:12,808 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 72 [2018-01-28 22:00:12,827 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 42 [2018-01-28 22:00:12,846 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:12,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 41 [2018-01-28 22:00:12,866 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:12,882 INFO L267 ElimStorePlain]: Start of recursive call 2: 5 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:00:12,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 51 treesize of output 47 [2018-01-28 22:00:12,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 30 [2018-01-28 22:00:12,908 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 26 [2018-01-28 22:00:12,925 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-01-28 22:00:12,942 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,958 INFO L267 ElimStorePlain]: Start of recursive call 8: 5 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 43 [2018-01-28 22:00:12,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2018-01-28 22:00:12,963 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-01-28 22:00:12,971 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,981 INFO L267 ElimStorePlain]: Start of recursive call 12: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:12,994 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:12,994 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 5 variables, input treesize:118, output treesize:14 [2018-01-28 22:00:13,170 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-28 22:00:13,190 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:00:13,190 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 27] total 52 [2018-01-28 22:00:13,191 INFO L409 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-01-28 22:00:13,191 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-01-28 22:00:13,191 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=2613, Unknown=0, NotChecked=0, Total=2756 [2018-01-28 22:00:13,191 INFO L87 Difference]: Start difference. First operand 741 states and 802 transitions. Second operand 53 states. [2018-01-28 22:00:17,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:00:17,959 INFO L93 Difference]: Finished difference Result 1020 states and 1117 transitions. [2018-01-28 22:00:17,959 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-01-28 22:00:17,959 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 133 [2018-01-28 22:00:17,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:00:17,962 INFO L225 Difference]: With dead ends: 1020 [2018-01-28 22:00:17,962 INFO L226 Difference]: Without dead ends: 1018 [2018-01-28 22:00:17,963 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 111 SyntacticMatches, 5 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3641 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=869, Invalid=11787, Unknown=0, NotChecked=0, Total=12656 [2018-01-28 22:00:17,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1018 states. [2018-01-28 22:00:18,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1018 to 908. [2018-01-28 22:00:18,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 908 states. [2018-01-28 22:00:18,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 908 states to 908 states and 984 transitions. [2018-01-28 22:00:18,040 INFO L78 Accepts]: Start accepts. Automaton has 908 states and 984 transitions. Word has length 133 [2018-01-28 22:00:18,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:00:18,040 INFO L432 AbstractCegarLoop]: Abstraction has 908 states and 984 transitions. [2018-01-28 22:00:18,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-01-28 22:00:18,041 INFO L276 IsEmpty]: Start isEmpty. Operand 908 states and 984 transitions. [2018-01-28 22:00:18,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-28 22:00:18,041 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:00:18,041 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:00:18,041 INFO L371 AbstractCegarLoop]: === Iteration 57 === [create_dataErr0RequiresViolation, create_dataErr14RequiresViolation, create_dataErr37RequiresViolation, create_dataErr19RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr11RequiresViolation, create_dataErr29RequiresViolation, create_dataErr32RequiresViolation, create_dataErr16RequiresViolation, create_dataErr24RequiresViolation, create_dataErr34RequiresViolation, create_dataErr39RequiresViolation, create_dataErr8RequiresViolation, create_dataErr6RequiresViolation, create_dataErr26RequiresViolation, create_dataErr17RequiresViolation, create_dataErr36RequiresViolation, create_dataErr27RequiresViolation, create_dataErr30RequiresViolation, create_dataErr13RequiresViolation, create_dataErr23RequiresViolation, create_dataErr9RequiresViolation, create_dataErr33RequiresViolation, create_dataErr2RequiresViolation, create_dataErr4RequiresViolation, create_dataErr10RequiresViolation, create_dataErr28RequiresViolation, create_dataErr38RequiresViolation, create_dataErr20RequiresViolation, create_dataErr18RequiresViolation, create_dataErr1RequiresViolation, create_dataErr31RequiresViolation, create_dataErr35RequiresViolation, create_dataErr21RequiresViolation, create_dataErr22RequiresViolation, create_dataErr12RequiresViolation, create_dataErr25RequiresViolation, create_dataErr7RequiresViolation, create_dataErr15RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr28EnsuresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr9RequiresViolation, appendErr13RequiresViolation, appendErr4RequiresViolation, appendErr8RequiresViolation, appendErr10RequiresViolation, appendErr14RequiresViolation, appendErr5RequiresViolation, appendErr12RequiresViolation, appendErr11RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr15RequiresViolation, appendErr1RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:00:18,041 INFO L82 PathProgramCache]: Analyzing trace with hash -857271995, now seen corresponding path program 1 times [2018-01-28 22:00:18,042 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:00:18,042 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:00:18,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:18,042 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:18,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:00:18,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:18,092 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:00:19,222 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:00:19,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:00:19,222 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:00:19,227 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:00:19,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:00:19,273 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:00:19,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:00:19,288 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,296 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-28 22:00:19,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:00:19,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:00:19,491 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,493 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:00:19,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:00:19,502 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,503 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,509 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:48, output treesize:32 [2018-01-28 22:00:19,581 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 101 [2018-01-28 22:00:19,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:00:19,586 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,590 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,599 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 22:00:19,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:00:19,603 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,606 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,610 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:114, output treesize:32 [2018-01-28 22:00:19,615 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,618 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 101 [2018-01-28 22:00:19,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:00:19,620 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,624 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,633 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 22:00:19,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:00:19,637 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,640 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,644 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,644 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:114, output treesize:32 [2018-01-28 22:00:19,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-28 22:00:19,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 8 [2018-01-28 22:00:19,648 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,654 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:41, output treesize:26 [2018-01-28 22:00:19,687 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-01-28 22:00:19,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 1 [2018-01-28 22:00:19,692 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,694 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,698 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:19,699 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:49, output treesize:26 [2018-01-28 22:00:19,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-01-28 22:00:19,748 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-01-28 22:00:19,750 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,753 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:19,758 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:26 [2018-01-28 22:00:19,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-01-28 22:00:19,767 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-01-28 22:00:19,769 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,771 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,776 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:19,777 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:26 [2018-01-28 22:00:19,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-01-28 22:00:19,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-01-28 22:00:19,782 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,785 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:19,791 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-01-28 22:00:19,927 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:19,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 27 [2018-01-28 22:00:19,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:00:19,932 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,937 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:00:19,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:00:19,952 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,954 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:00:19,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:00:19,964 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:67, output treesize:68 [2018-01-28 22:00:20,024 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:00:20,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 41 treesize of output 78 [2018-01-28 22:00:20,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 57 [2018-01-28 22:00:20,050 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:00:20,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 44 [2018-01-28 22:00:20,175 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. Received shutdown request... [2018-01-28 22:00:20,185 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-28 22:00:20,185 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-28 22:00:20,190 WARN L185 ceAbstractionStarter]: Timeout [2018-01-28 22:00:20,191 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 10:00:20 BoogieIcfgContainer [2018-01-28 22:00:20,191 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 22:00:20,191 INFO L168 Benchmark]: Toolchain (without parser) took 101491.48 ms. Allocated memory was 304.6 MB in the beginning and 1.3 GB in the end (delta: 996.1 MB). Free memory was 264.5 MB in the beginning and 542.7 MB in the end (delta: -278.2 MB). Peak memory consumption was 717.9 MB. Max. memory is 5.3 GB. [2018-01-28 22:00:20,192 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 304.6 MB. Free memory is still 270.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 22:00:20,192 INFO L168 Benchmark]: CACSL2BoogieTranslator took 216.07 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.5 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:00:20,193 INFO L168 Benchmark]: Boogie Preprocessor took 49.54 ms. Allocated memory is still 304.6 MB. Free memory was 251.5 MB in the beginning and 249.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:00:20,193 INFO L168 Benchmark]: RCFGBuilder took 829.51 ms. Allocated memory is still 304.6 MB. Free memory was 249.5 MB in the beginning and 194.0 MB in the end (delta: 55.6 MB). Peak memory consumption was 55.6 MB. Max. memory is 5.3 GB. [2018-01-28 22:00:20,193 INFO L168 Benchmark]: TraceAbstraction took 100389.02 ms. Allocated memory was 304.6 MB in the beginning and 1.3 GB in the end (delta: 996.1 MB). Free memory was 194.0 MB in the beginning and 542.7 MB in the end (delta: -348.7 MB). Peak memory consumption was 647.4 MB. Max. memory is 5.3 GB. [2018-01-28 22:00:20,194 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 304.6 MB. Free memory is still 270.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 216.07 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.5 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 49.54 ms. Allocated memory is still 304.6 MB. Free memory was 251.5 MB in the beginning and 249.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 829.51 ms. Allocated memory is still 304.6 MB. Free memory was 249.5 MB in the beginning and 194.0 MB in the end (delta: 55.6 MB). Peak memory consumption was 55.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 100389.02 ms. Allocated memory was 304.6 MB in the beginning and 1.3 GB in the end (delta: 996.1 MB). Free memory was 194.0 MB in the beginning and 542.7 MB in the end (delta: -348.7 MB). Peak memory consumption was 647.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 541). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 565). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 553). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 542). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 561). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 563). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 553). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 564). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 561). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 553). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 565). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 561). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 562). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 557). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 563). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 542). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 561). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 556). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 553). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 541). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 562). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 564). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 556). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 557). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 572). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 573). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 573). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 572). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 572). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 572). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 592). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 596). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 595). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 586). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 593). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 593). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 595). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 585]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 585). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 592). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 595). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 596). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 586). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 593). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 595). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 593). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 581). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 581). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 581). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 581). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 583). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 581). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 581). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 583). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 4, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 51. - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 266 locations, 91 error locations. TIMEOUT Result, 100.3s OverallTime, 57 OverallIterations, 4 TraceHistogramMax, 60.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11200 SDtfs, 14340 SDslu, 63065 SDs, 0 SdLazy, 41381 SolverSat, 1407 SolverUnsat, 834 SolverUnknown, 0 SolverNotchecked, 32.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3166 GetRequests, 1926 SyntacticMatches, 63 SemanticMatches, 1177 ConstructedPredicates, 37 IntricatePredicates, 0 DeprecatedPredicates, 12767 ImplicationChecksByTransitivity, 41.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=908occurred in iteration=56, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 1.2s AutomataMinimizationTime, 56 MinimizatonAttempts, 1979 StatesRemovedByMinimization, 47 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 1.6s SatisfiabilityAnalysisTime, 32.7s InterpolantComputationTime, 6997 NumberOfCodeBlocks, 6997 NumberOfCodeBlocksAsserted, 78 NumberOfCheckSat, 6923 ConstructedInterpolants, 799 QuantifiedInterpolants, 27959233 SizeOfPredicates, 213 NumberOfNonLiveVariables, 6866 ConjunctsInSsa, 588 ConjunctsInUnsatCore, 74 InterpolantComputations, 40 PerfectInterpolantSequences, 2036/2396 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/complex_data_creation_test02_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-28_22-00-20-205.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/complex_data_creation_test02_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_22-00-20-205.csv Completed graceful shutdown