java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 22:31:43,044 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 22:31:43,045 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 22:31:43,057 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 22:31:43,057 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 22:31:43,058 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 22:31:43,059 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 22:31:43,060 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 22:31:43,062 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 22:31:43,063 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 22:31:43,064 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 22:31:43,064 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 22:31:43,065 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 22:31:43,066 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 22:31:43,067 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 22:31:43,069 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 22:31:43,071 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 22:31:43,073 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 22:31:43,074 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 22:31:43,076 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 22:31:43,078 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-28 22:31:43,082 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 22:31:43,083 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 22:31:43,083 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 22:31:43,093 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 22:31:43,093 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 22:31:43,094 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 22:31:43,094 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 22:31:43,094 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 22:31:43,095 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 22:31:43,095 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 22:31:43,095 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 22:31:43,096 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 22:31:43,096 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 22:31:43,096 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 22:31:43,096 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 22:31:43,096 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 22:31:43,097 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 22:31:43,097 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 22:31:43,097 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 22:31:43,097 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 22:31:43,097 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 22:31:43,098 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 22:31:43,098 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 22:31:43,098 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 22:31:43,098 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 22:31:43,098 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 22:31:43,098 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:31:43,099 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 22:31:43,099 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 22:31:43,099 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 22:31:43,099 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 22:31:43,099 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 22:31:43,100 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 22:31:43,100 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 22:31:43,100 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 22:31:43,101 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 22:31:43,101 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 22:31:43,134 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 22:31:43,146 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 22:31:43,150 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 22:31:43,151 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 22:31:43,152 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 22:31:43,152 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-28 22:31:43,323 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 22:31:43,329 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 22:31:43,330 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 22:31:43,330 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 22:31:43,335 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 22:31:43,336 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,339 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@715ee194 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43, skipping insertion in model container [2018-01-28 22:31:43,340 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,358 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:31:43,410 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:31:43,532 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:31:43,553 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:31:43,565 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43 WrapperNode [2018-01-28 22:31:43,566 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 22:31:43,566 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 22:31:43,566 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 22:31:43,566 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 22:31:43,582 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,583 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,597 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,597 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,608 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,612 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,615 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... [2018-01-28 22:31:43,618 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 22:31:43,619 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 22:31:43,619 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 22:31:43,619 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 22:31:43,620 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:31:43,701 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 22:31:43,701 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 22:31:43,701 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:31:43,701 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-28 22:31:43,701 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:31:43,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-28 22:31:43,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-28 22:31:43,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-28 22:31:43,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-28 22:31:43,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-28 22:31:43,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-28 22:31:43,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-28 22:31:43,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-28 22:31:43,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-28 22:31:43,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-28 22:31:43,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-28 22:31:43,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-28 22:31:43,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-28 22:31:43,704 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-28 22:31:43,704 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 22:31:43,704 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 22:31:43,704 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 22:31:43,704 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 22:31:43,704 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 22:31:43,704 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 22:31:43,705 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 22:31:43,705 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 22:31:43,705 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-28 22:31:43,705 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-28 22:31:43,705 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 22:31:43,705 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-28 22:31:43,706 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-28 22:31:43,707 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-28 22:31:43,708 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-28 22:31:43,708 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-28 22:31:43,708 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-28 22:31:43,708 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 22:31:43,708 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 22:31:43,708 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 22:31:43,942 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-28 22:31:44,161 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 22:31:44,162 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:31:44 BoogieIcfgContainer [2018-01-28 22:31:44,162 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 22:31:44,162 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 22:31:44,162 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 22:31:44,165 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 22:31:44,165 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 10:31:43" (1/3) ... [2018-01-28 22:31:44,166 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7228f6db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:31:44, skipping insertion in model container [2018-01-28 22:31:44,166 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:31:43" (2/3) ... [2018-01-28 22:31:44,166 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7228f6db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:31:44, skipping insertion in model container [2018-01-28 22:31:44,166 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:31:44" (3/3) ... [2018-01-28 22:31:44,167 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-28 22:31:44,173 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 22:31:44,179 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-28 22:31:44,225 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 22:31:44,225 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 22:31:44,225 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 22:31:44,226 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 22:31:44,226 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 22:31:44,226 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 22:31:44,226 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 22:31:44,226 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 22:31:44,227 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 22:31:44,246 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states. [2018-01-28 22:31:44,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-28 22:31:44,251 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:44,251 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:44,252 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:44,256 INFO L82 PathProgramCache]: Analyzing trace with hash -1627230509, now seen corresponding path program 1 times [2018-01-28 22:31:44,258 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:44,258 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:44,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:44,305 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:44,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:44,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:44,360 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:44,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:44,554 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:44,555 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:31:44,556 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:31:44,570 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:31:44,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:31:44,573 INFO L87 Difference]: Start difference. First operand 175 states. Second operand 5 states. [2018-01-28 22:31:44,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:44,669 INFO L93 Difference]: Finished difference Result 332 states and 347 transitions. [2018-01-28 22:31:44,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:31:44,671 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-28 22:31:44,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:44,682 INFO L225 Difference]: With dead ends: 332 [2018-01-28 22:31:44,682 INFO L226 Difference]: Without dead ends: 179 [2018-01-28 22:31:44,687 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:31:44,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-28 22:31:44,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 177. [2018-01-28 22:31:44,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-28 22:31:44,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 185 transitions. [2018-01-28 22:31:44,724 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 185 transitions. Word has length 22 [2018-01-28 22:31:44,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:44,724 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 185 transitions. [2018-01-28 22:31:44,724 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:31:44,725 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 185 transitions. [2018-01-28 22:31:44,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:31:44,725 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:44,725 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:44,726 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:44,726 INFO L82 PathProgramCache]: Analyzing trace with hash -1951140373, now seen corresponding path program 1 times [2018-01-28 22:31:44,726 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:44,726 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:44,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:44,728 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:44,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:44,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:44,750 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:44,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:44,825 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:44,826 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:31:44,827 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:31:44,827 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:31:44,827 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:31:44,828 INFO L87 Difference]: Start difference. First operand 177 states and 185 transitions. Second operand 6 states. [2018-01-28 22:31:45,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:45,113 INFO L93 Difference]: Finished difference Result 180 states and 188 transitions. [2018-01-28 22:31:45,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:31:45,114 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-28 22:31:45,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:45,116 INFO L225 Difference]: With dead ends: 180 [2018-01-28 22:31:45,116 INFO L226 Difference]: Without dead ends: 179 [2018-01-28 22:31:45,117 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:31:45,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-28 22:31:45,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2018-01-28 22:31:45,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-28 22:31:45,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 184 transitions. [2018-01-28 22:31:45,129 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 184 transitions. Word has length 23 [2018-01-28 22:31:45,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:45,129 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 184 transitions. [2018-01-28 22:31:45,130 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:31:45,130 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 184 transitions. [2018-01-28 22:31:45,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:31:45,130 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:45,131 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:45,131 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:45,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1951140372, now seen corresponding path program 1 times [2018-01-28 22:31:45,131 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:45,131 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:45,132 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:45,132 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:45,132 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:45,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:45,152 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:45,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:45,404 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:45,404 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:31:45,404 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:31:45,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:31:45,405 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:31:45,405 INFO L87 Difference]: Start difference. First operand 176 states and 184 transitions. Second operand 7 states. [2018-01-28 22:31:45,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:45,653 INFO L93 Difference]: Finished difference Result 179 states and 187 transitions. [2018-01-28 22:31:45,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:31:45,653 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-28 22:31:45,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:45,655 INFO L225 Difference]: With dead ends: 179 [2018-01-28 22:31:45,655 INFO L226 Difference]: Without dead ends: 178 [2018-01-28 22:31:45,656 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:31:45,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-28 22:31:45,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 175. [2018-01-28 22:31:45,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-28 22:31:45,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 183 transitions. [2018-01-28 22:31:45,671 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 183 transitions. Word has length 23 [2018-01-28 22:31:45,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:45,671 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 183 transitions. [2018-01-28 22:31:45,671 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:31:45,671 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 183 transitions. [2018-01-28 22:31:45,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-28 22:31:45,673 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:45,673 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:45,674 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:45,674 INFO L82 PathProgramCache]: Analyzing trace with hash -774558826, now seen corresponding path program 1 times [2018-01-28 22:31:45,674 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:45,674 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:45,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:45,676 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:45,676 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:45,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:45,693 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:45,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:45,791 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:45,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:31:45,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:31:45,792 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:31:45,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:31:45,792 INFO L87 Difference]: Start difference. First operand 175 states and 183 transitions. Second operand 7 states. [2018-01-28 22:31:45,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:45,867 INFO L93 Difference]: Finished difference Result 291 states and 303 transitions. [2018-01-28 22:31:45,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:31:45,868 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-28 22:31:45,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:45,871 INFO L225 Difference]: With dead ends: 291 [2018-01-28 22:31:45,871 INFO L226 Difference]: Without dead ends: 192 [2018-01-28 22:31:45,872 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:31:45,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-01-28 22:31:45,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 185. [2018-01-28 22:31:45,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-28 22:31:45,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 193 transitions. [2018-01-28 22:31:45,890 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 193 transitions. Word has length 36 [2018-01-28 22:31:45,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:45,890 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 193 transitions. [2018-01-28 22:31:45,890 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:31:45,890 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 193 transitions. [2018-01-28 22:31:45,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:31:45,892 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:45,892 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:45,892 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:45,893 INFO L82 PathProgramCache]: Analyzing trace with hash -2065483374, now seen corresponding path program 1 times [2018-01-28 22:31:45,893 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:45,893 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:45,894 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:45,894 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:45,894 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:45,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:45,913 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:45,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:45,987 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:45,988 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:31:45,988 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:31:45,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:31:45,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:31:45,988 INFO L87 Difference]: Start difference. First operand 185 states and 193 transitions. Second operand 10 states. [2018-01-28 22:31:46,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:46,310 INFO L93 Difference]: Finished difference Result 185 states and 193 transitions. [2018-01-28 22:31:46,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:31:46,310 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-28 22:31:46,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:46,312 INFO L225 Difference]: With dead ends: 185 [2018-01-28 22:31:46,312 INFO L226 Difference]: Without dead ends: 184 [2018-01-28 22:31:46,312 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:31:46,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-28 22:31:46,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2018-01-28 22:31:46,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-28 22:31:46,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 192 transitions. [2018-01-28 22:31:46,321 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 192 transitions. Word has length 39 [2018-01-28 22:31:46,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:46,322 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 192 transitions. [2018-01-28 22:31:46,322 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:31:46,322 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 192 transitions. [2018-01-28 22:31:46,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:31:46,323 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:46,323 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:46,324 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:46,324 INFO L82 PathProgramCache]: Analyzing trace with hash -2065483373, now seen corresponding path program 1 times [2018-01-28 22:31:46,324 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:46,324 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:46,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,325 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:46,326 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:46,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:46,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:46,400 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:46,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:31:46,400 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:31:46,400 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:31:46,400 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:31:46,401 INFO L87 Difference]: Start difference. First operand 184 states and 192 transitions. Second operand 4 states. [2018-01-28 22:31:46,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:46,478 INFO L93 Difference]: Finished difference Result 324 states and 338 transitions. [2018-01-28 22:31:46,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:31:46,478 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-28 22:31:46,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:46,480 INFO L225 Difference]: With dead ends: 324 [2018-01-28 22:31:46,481 INFO L226 Difference]: Without dead ends: 188 [2018-01-28 22:31:46,482 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:31:46,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-01-28 22:31:46,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 185. [2018-01-28 22:31:46,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-28 22:31:46,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 193 transitions. [2018-01-28 22:31:46,494 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 193 transitions. Word has length 39 [2018-01-28 22:31:46,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:46,495 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 193 transitions. [2018-01-28 22:31:46,495 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:31:46,495 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 193 transitions. [2018-01-28 22:31:46,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-28 22:31:46,496 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:46,497 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:46,497 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:46,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1097981657, now seen corresponding path program 1 times [2018-01-28 22:31:46,497 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:46,497 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:46,498 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,498 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:46,499 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:46,510 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:46,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:46,559 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:46,559 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:31:46,560 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:31:46,560 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:31:46,560 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:31:46,560 INFO L87 Difference]: Start difference. First operand 185 states and 193 transitions. Second operand 3 states. [2018-01-28 22:31:46,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:46,637 INFO L93 Difference]: Finished difference Result 208 states and 218 transitions. [2018-01-28 22:31:46,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:31:46,637 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2018-01-28 22:31:46,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:46,639 INFO L225 Difference]: With dead ends: 208 [2018-01-28 22:31:46,639 INFO L226 Difference]: Without dead ends: 204 [2018-01-28 22:31:46,640 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:31:46,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-01-28 22:31:46,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 204. [2018-01-28 22:31:46,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-01-28 22:31:46,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 214 transitions. [2018-01-28 22:31:46,654 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 214 transitions. Word has length 41 [2018-01-28 22:31:46,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:46,654 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 214 transitions. [2018-01-28 22:31:46,654 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:31:46,655 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 214 transitions. [2018-01-28 22:31:46,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:31:46,656 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:46,656 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:46,657 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:46,657 INFO L82 PathProgramCache]: Analyzing trace with hash -2110626927, now seen corresponding path program 1 times [2018-01-28 22:31:46,657 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:46,657 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:46,658 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,658 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:46,658 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:46,675 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:46,730 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:46,730 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:31:46,730 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:31:46,740 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:46,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:46,802 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:31:46,841 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:46,874 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:31:46,874 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-28 22:31:46,875 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:31:46,875 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:31:46,875 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:31:46,875 INFO L87 Difference]: Start difference. First operand 204 states and 214 transitions. Second operand 6 states. [2018-01-28 22:31:46,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:46,933 INFO L93 Difference]: Finished difference Result 358 states and 374 transitions. [2018-01-28 22:31:46,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:31:46,934 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-28 22:31:46,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:46,935 INFO L225 Difference]: With dead ends: 358 [2018-01-28 22:31:46,936 INFO L226 Difference]: Without dead ends: 211 [2018-01-28 22:31:46,937 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:31:46,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-01-28 22:31:46,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 208. [2018-01-28 22:31:46,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-01-28 22:31:46,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 218 transitions. [2018-01-28 22:31:46,952 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 218 transitions. Word has length 43 [2018-01-28 22:31:46,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:46,953 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 218 transitions. [2018-01-28 22:31:46,953 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:31:46,953 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 218 transitions. [2018-01-28 22:31:46,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-28 22:31:46,954 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:46,955 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:46,955 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:46,955 INFO L82 PathProgramCache]: Analyzing trace with hash 475599041, now seen corresponding path program 1 times [2018-01-28 22:31:46,955 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:46,955 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:46,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,957 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:46,957 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:46,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:46,968 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:47,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:47,035 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:47,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:31:47,035 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:31:47,035 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:31:47,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:31:47,036 INFO L87 Difference]: Start difference. First operand 208 states and 218 transitions. Second operand 6 states. [2018-01-28 22:31:47,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:47,139 INFO L93 Difference]: Finished difference Result 298 states and 309 transitions. [2018-01-28 22:31:47,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:31:47,140 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-01-28 22:31:47,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:47,141 INFO L225 Difference]: With dead ends: 298 [2018-01-28 22:31:47,141 INFO L226 Difference]: Without dead ends: 202 [2018-01-28 22:31:47,141 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:31:47,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-01-28 22:31:47,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2018-01-28 22:31:47,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-01-28 22:31:47,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 210 transitions. [2018-01-28 22:31:47,154 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 210 transitions. Word has length 42 [2018-01-28 22:31:47,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:47,154 INFO L432 AbstractCegarLoop]: Abstraction has 202 states and 210 transitions. [2018-01-28 22:31:47,154 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:31:47,154 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 210 transitions. [2018-01-28 22:31:47,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-28 22:31:47,155 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:47,155 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:47,156 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:47,156 INFO L82 PathProgramCache]: Analyzing trace with hash 483411827, now seen corresponding path program 1 times [2018-01-28 22:31:47,156 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:47,156 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:47,158 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:47,158 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:47,158 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:47,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:47,171 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:47,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:47,353 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:47,353 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:31:47,353 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:31:47,354 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:31:47,354 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:31:47,354 INFO L87 Difference]: Start difference. First operand 202 states and 210 transitions. Second operand 7 states. [2018-01-28 22:31:47,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:47,430 INFO L93 Difference]: Finished difference Result 289 states and 296 transitions. [2018-01-28 22:31:47,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:31:47,431 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2018-01-28 22:31:47,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:47,432 INFO L225 Difference]: With dead ends: 289 [2018-01-28 22:31:47,432 INFO L226 Difference]: Without dead ends: 184 [2018-01-28 22:31:47,433 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:31:47,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-28 22:31:47,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 171. [2018-01-28 22:31:47,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-28 22:31:47,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 177 transitions. [2018-01-28 22:31:47,440 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 177 transitions. Word has length 48 [2018-01-28 22:31:47,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:47,440 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 177 transitions. [2018-01-28 22:31:47,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:31:47,441 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 177 transitions. [2018-01-28 22:31:47,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:31:47,441 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:47,441 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:47,441 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:47,442 INFO L82 PathProgramCache]: Analyzing trace with hash -1883218289, now seen corresponding path program 2 times [2018-01-28 22:31:47,442 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:47,442 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:47,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:47,443 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:47,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:47,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:47,456 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:47,544 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:47,545 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:31:47,545 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:31:47,563 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:31:47,586 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:31:47,590 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:31:47,595 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:31:47,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:31:47,641 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:31:47,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:31:47,657 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:31:47,670 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:31:47,671 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:31:48,115 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 45 DAG size of output 17 [2018-01-28 22:31:48,456 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-28 22:31:48,478 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:31:48,478 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-28 22:31:48,479 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:31:48,479 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:31:48,479 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:31:48,479 INFO L87 Difference]: Start difference. First operand 171 states and 177 transitions. Second operand 19 states. [2018-01-28 22:31:50,825 WARN L143 SmtUtils]: Spent 2016ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-28 22:31:51,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:51,648 INFO L93 Difference]: Finished difference Result 313 states and 326 transitions. [2018-01-28 22:31:51,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:31:51,648 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-28 22:31:51,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:51,649 INFO L225 Difference]: With dead ends: 313 [2018-01-28 22:31:51,650 INFO L226 Difference]: Without dead ends: 177 [2018-01-28 22:31:51,650 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-28 22:31:51,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-28 22:31:51,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 174. [2018-01-28 22:31:51,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-28 22:31:51,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 180 transitions. [2018-01-28 22:31:51,667 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 180 transitions. Word has length 47 [2018-01-28 22:31:51,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:51,667 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 180 transitions. [2018-01-28 22:31:51,668 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:31:51,668 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 180 transitions. [2018-01-28 22:31:51,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:31:51,668 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:51,669 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:51,669 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:51,669 INFO L82 PathProgramCache]: Analyzing trace with hash -1617259160, now seen corresponding path program 1 times [2018-01-28 22:31:51,669 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:51,669 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:51,671 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:51,671 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:31:51,671 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:51,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:51,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:51,796 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-28 22:31:51,796 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:51,796 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:31:51,796 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:31:51,797 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:31:51,797 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:31:51,797 INFO L87 Difference]: Start difference. First operand 174 states and 180 transitions. Second operand 12 states. [2018-01-28 22:31:52,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:52,070 INFO L93 Difference]: Finished difference Result 174 states and 180 transitions. [2018-01-28 22:31:52,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:31:52,070 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-28 22:31:52,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:52,072 INFO L225 Difference]: With dead ends: 174 [2018-01-28 22:31:52,072 INFO L226 Difference]: Without dead ends: 172 [2018-01-28 22:31:52,072 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:31:52,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-28 22:31:52,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-01-28 22:31:52,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-28 22:31:52,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 178 transitions. [2018-01-28 22:31:52,088 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 178 transitions. Word has length 56 [2018-01-28 22:31:52,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:52,088 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 178 transitions. [2018-01-28 22:31:52,088 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:31:52,089 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 178 transitions. [2018-01-28 22:31:52,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:31:52,089 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:52,089 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:52,090 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:52,090 INFO L82 PathProgramCache]: Analyzing trace with hash -1617259159, now seen corresponding path program 1 times [2018-01-28 22:31:52,090 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:52,090 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:52,091 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:52,091 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:52,091 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:52,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:52,108 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:52,190 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:52,190 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:31:52,191 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:31:52,204 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:52,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:52,238 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:31:52,267 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:52,299 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:31:52,299 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-28 22:31:52,300 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:31:52,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:31:52,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:31:52,300 INFO L87 Difference]: Start difference. First operand 172 states and 178 transitions. Second operand 8 states. [2018-01-28 22:31:52,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:52,381 INFO L93 Difference]: Finished difference Result 312 states and 324 transitions. [2018-01-28 22:31:52,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:31:52,381 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-28 22:31:52,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:52,383 INFO L225 Difference]: With dead ends: 312 [2018-01-28 22:31:52,383 INFO L226 Difference]: Without dead ends: 179 [2018-01-28 22:31:52,383 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:31:52,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-28 22:31:52,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2018-01-28 22:31:52,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-28 22:31:52,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 182 transitions. [2018-01-28 22:31:52,399 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 182 transitions. Word has length 56 [2018-01-28 22:31:52,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:52,400 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 182 transitions. [2018-01-28 22:31:52,400 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:31:52,400 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 182 transitions. [2018-01-28 22:31:52,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:31:52,401 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:52,401 INFO L330 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:52,401 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:52,401 INFO L82 PathProgramCache]: Analyzing trace with hash 1881204523, now seen corresponding path program 2 times [2018-01-28 22:31:52,401 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:52,401 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:52,402 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:52,402 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:52,402 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:52,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:52,419 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:52,469 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:52,469 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:31:52,469 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:31:52,476 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:31:52,495 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:31:52,499 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:31:52,503 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:31:52,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:31:52,517 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:31:52,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:31:52,531 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:31:52,544 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:31:52,544 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:31:53,070 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-28 22:31:53,089 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:31:53,089 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-28 22:31:53,090 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:31:53,090 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:31:53,090 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:31:53,090 INFO L87 Difference]: Start difference. First operand 176 states and 182 transitions. Second operand 22 states. [2018-01-28 22:31:54,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:54,284 INFO L93 Difference]: Finished difference Result 314 states and 328 transitions. [2018-01-28 22:31:54,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:31:54,285 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-28 22:31:54,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:54,286 INFO L225 Difference]: With dead ends: 314 [2018-01-28 22:31:54,286 INFO L226 Difference]: Without dead ends: 181 [2018-01-28 22:31:54,286 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 22:31:54,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-28 22:31:54,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 178. [2018-01-28 22:31:54,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-28 22:31:54,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 184 transitions. [2018-01-28 22:31:54,306 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 184 transitions. Word has length 60 [2018-01-28 22:31:54,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:54,306 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 184 transitions. [2018-01-28 22:31:54,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:31:54,306 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 184 transitions. [2018-01-28 22:31:54,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-28 22:31:54,307 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:54,307 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:54,307 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:54,308 INFO L82 PathProgramCache]: Analyzing trace with hash 856578843, now seen corresponding path program 1 times [2018-01-28 22:31:54,308 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:54,308 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:54,309 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:54,309 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:31:54,309 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:54,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:54,324 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:54,397 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:31:54,398 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:54,398 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:31:54,398 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:31:54,398 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:31:54,399 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:31:54,399 INFO L87 Difference]: Start difference. First operand 178 states and 184 transitions. Second operand 8 states. [2018-01-28 22:31:54,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:54,475 INFO L93 Difference]: Finished difference Result 287 states and 296 transitions. [2018-01-28 22:31:54,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:31:54,475 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 70 [2018-01-28 22:31:54,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:54,476 INFO L225 Difference]: With dead ends: 287 [2018-01-28 22:31:54,477 INFO L226 Difference]: Without dead ends: 178 [2018-01-28 22:31:54,477 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:31:54,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-28 22:31:54,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-01-28 22:31:54,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-28 22:31:54,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 183 transitions. [2018-01-28 22:31:54,495 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 183 transitions. Word has length 70 [2018-01-28 22:31:54,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:54,495 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 183 transitions. [2018-01-28 22:31:54,495 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:31:54,495 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 183 transitions. [2018-01-28 22:31:54,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-28 22:31:54,496 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:54,496 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:54,497 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:54,497 INFO L82 PathProgramCache]: Analyzing trace with hash 243427596, now seen corresponding path program 1 times [2018-01-28 22:31:54,497 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:54,497 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:54,498 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:54,498 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:54,498 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:54,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:54,514 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:54,596 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:31:54,597 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:54,597 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-28 22:31:54,597 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:31:54,597 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:31:54,597 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:31:54,598 INFO L87 Difference]: Start difference. First operand 178 states and 183 transitions. Second operand 10 states. [2018-01-28 22:31:54,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:54,706 INFO L93 Difference]: Finished difference Result 289 states and 297 transitions. [2018-01-28 22:31:54,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:31:54,706 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-01-28 22:31:54,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:54,707 INFO L225 Difference]: With dead ends: 289 [2018-01-28 22:31:54,707 INFO L226 Difference]: Without dead ends: 178 [2018-01-28 22:31:54,708 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:31:54,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-28 22:31:54,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-01-28 22:31:54,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-28 22:31:54,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 182 transitions. [2018-01-28 22:31:54,721 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 182 transitions. Word has length 75 [2018-01-28 22:31:54,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:54,721 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 182 transitions. [2018-01-28 22:31:54,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:31:54,721 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 182 transitions. [2018-01-28 22:31:54,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-28 22:31:54,722 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:54,722 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:54,722 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:54,722 INFO L82 PathProgramCache]: Analyzing trace with hash -1945594352, now seen corresponding path program 1 times [2018-01-28 22:31:54,722 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:54,722 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:54,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:54,723 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:54,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:54,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:54,735 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:54,915 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:31:54,915 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:31:54,916 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-28 22:31:54,916 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:31:54,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:31:54,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:31:54,917 INFO L87 Difference]: Start difference. First operand 178 states and 182 transitions. Second operand 15 states. [2018-01-28 22:31:55,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:55,306 INFO L93 Difference]: Finished difference Result 178 states and 182 transitions. [2018-01-28 22:31:55,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:31:55,306 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 86 [2018-01-28 22:31:55,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:55,308 INFO L225 Difference]: With dead ends: 178 [2018-01-28 22:31:55,308 INFO L226 Difference]: Without dead ends: 176 [2018-01-28 22:31:55,309 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:31:55,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-28 22:31:55,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-01-28 22:31:55,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-28 22:31:55,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 180 transitions. [2018-01-28 22:31:55,326 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 180 transitions. Word has length 86 [2018-01-28 22:31:55,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:55,326 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 180 transitions. [2018-01-28 22:31:55,326 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:31:55,327 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 180 transitions. [2018-01-28 22:31:55,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-28 22:31:55,327 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:55,328 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:55,328 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:55,328 INFO L82 PathProgramCache]: Analyzing trace with hash -1945594351, now seen corresponding path program 1 times [2018-01-28 22:31:55,328 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:55,328 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:55,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:55,329 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:55,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:55,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:55,354 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:55,560 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:55,560 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:31:55,560 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:31:55,577 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:55,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:55,626 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:31:55,741 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:55,761 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:31:55,761 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-28 22:31:55,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:31:55,762 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:31:55,762 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:31:55,762 INFO L87 Difference]: Start difference. First operand 176 states and 180 transitions. Second operand 10 states. [2018-01-28 22:31:56,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:31:56,007 INFO L93 Difference]: Finished difference Result 312 states and 320 transitions. [2018-01-28 22:31:56,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:31:56,048 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-01-28 22:31:56,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:31:56,049 INFO L225 Difference]: With dead ends: 312 [2018-01-28 22:31:56,049 INFO L226 Difference]: Without dead ends: 183 [2018-01-28 22:31:56,050 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:31:56,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-28 22:31:56,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2018-01-28 22:31:56,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-28 22:31:56,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 184 transitions. [2018-01-28 22:31:56,069 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 184 transitions. Word has length 86 [2018-01-28 22:31:56,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:31:56,069 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 184 transitions. [2018-01-28 22:31:56,069 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:31:56,070 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 184 transitions. [2018-01-28 22:31:56,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-28 22:31:56,070 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:31:56,071 INFO L330 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:31:56,071 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:31:56,071 INFO L82 PathProgramCache]: Analyzing trace with hash -1378686893, now seen corresponding path program 2 times [2018-01-28 22:31:56,071 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:31:56,071 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:31:56,072 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:56,072 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:31:56,072 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:31:56,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:31:56,091 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:31:56,206 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:31:56,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:31:56,206 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:31:56,216 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:31:56,253 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:31:56,259 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:31:56,264 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:31:56,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:31:56,271 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:31:56,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:31:56,302 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:31:56,317 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:31:56,318 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:00,562 WARN L143 SmtUtils]: Spent 2019ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-28 22:32:01,223 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-28 22:32:01,243 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:01,248 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27 [2018-01-28 22:32:01,248 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-28 22:32:01,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-28 22:32:01,249 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=602, Unknown=1, NotChecked=0, Total=702 [2018-01-28 22:32:01,249 INFO L87 Difference]: Start difference. First operand 180 states and 184 transitions. Second operand 27 states. [2018-01-28 22:32:03,414 WARN L143 SmtUtils]: Spent 2037ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-28 22:32:05,554 WARN L143 SmtUtils]: Spent 2021ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-28 22:32:06,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:06,708 INFO L93 Difference]: Finished difference Result 314 states and 324 transitions. [2018-01-28 22:32:06,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-28 22:32:06,709 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 90 [2018-01-28 22:32:06,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:06,709 INFO L225 Difference]: With dead ends: 314 [2018-01-28 22:32:06,709 INFO L226 Difference]: Without dead ends: 185 [2018-01-28 22:32:06,710 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 355 ImplicationChecksByTransitivity, 9.3s TimeCoverageRelationStatistics Valid=224, Invalid=1497, Unknown=1, NotChecked=0, Total=1722 [2018-01-28 22:32:06,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-28 22:32:06,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-28 22:32:06,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:32:06,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 186 transitions. [2018-01-28 22:32:06,733 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 186 transitions. Word has length 90 [2018-01-28 22:32:06,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:06,733 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 186 transitions. [2018-01-28 22:32:06,733 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-28 22:32:06,733 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 186 transitions. [2018-01-28 22:32:06,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-28 22:32:06,735 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:06,735 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:06,735 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:06,735 INFO L82 PathProgramCache]: Analyzing trace with hash 773443483, now seen corresponding path program 1 times [2018-01-28 22:32:06,735 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:06,736 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:06,736 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,737 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:06,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:06,757 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:06,880 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-28 22:32:06,880 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:06,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:32:06,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 22:32:06,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 22:32:06,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:06,881 INFO L87 Difference]: Start difference. First operand 182 states and 186 transitions. Second operand 11 states. [2018-01-28 22:32:06,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:06,983 INFO L93 Difference]: Finished difference Result 259 states and 265 transitions. [2018-01-28 22:32:06,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:32:06,984 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 99 [2018-01-28 22:32:06,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:06,985 INFO L225 Difference]: With dead ends: 259 [2018-01-28 22:32:06,985 INFO L226 Difference]: Without dead ends: 182 [2018-01-28 22:32:06,986 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:32:06,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-28 22:32:07,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-28 22:32:07,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:32:07,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 185 transitions. [2018-01-28 22:32:07,004 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 185 transitions. Word has length 99 [2018-01-28 22:32:07,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:07,004 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 185 transitions. [2018-01-28 22:32:07,005 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 22:32:07,005 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 185 transitions. [2018-01-28 22:32:07,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-28 22:32:07,006 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:07,006 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:07,007 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:07,007 INFO L82 PathProgramCache]: Analyzing trace with hash -360236654, now seen corresponding path program 1 times [2018-01-28 22:32:07,007 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:07,007 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:07,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,008 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:07,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:07,032 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:07,171 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-28 22:32:07,171 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:07,172 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:32:07,172 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 22:32:07,172 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 22:32:07,172 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:07,173 INFO L87 Difference]: Start difference. First operand 182 states and 185 transitions. Second operand 11 states. [2018-01-28 22:32:07,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:07,268 INFO L93 Difference]: Finished difference Result 188 states and 190 transitions. [2018-01-28 22:32:07,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:32:07,268 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 117 [2018-01-28 22:32:07,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:07,269 INFO L225 Difference]: With dead ends: 188 [2018-01-28 22:32:07,269 INFO L226 Difference]: Without dead ends: 182 [2018-01-28 22:32:07,270 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:32:07,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-28 22:32:07,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-28 22:32:07,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:32:07,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 184 transitions. [2018-01-28 22:32:07,282 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 184 transitions. Word has length 117 [2018-01-28 22:32:07,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:07,283 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 184 transitions. [2018-01-28 22:32:07,283 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 22:32:07,283 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 184 transitions. [2018-01-28 22:32:07,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-01-28 22:32:07,284 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:07,284 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:07,284 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:07,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1033575066, now seen corresponding path program 1 times [2018-01-28 22:32:07,284 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:07,285 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:07,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,286 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:07,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:07,314 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:07,455 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:07,455 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:07,455 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:07,467 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:07,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:07,538 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:07,561 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:07,595 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:07,595 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-28 22:32:07,595 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:32:07,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:32:07,596 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:32:07,596 INFO L87 Difference]: Start difference. First operand 182 states and 184 transitions. Second operand 12 states. [2018-01-28 22:32:07,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:07,684 INFO L93 Difference]: Finished difference Result 316 states and 320 transitions. [2018-01-28 22:32:07,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:32:07,685 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 124 [2018-01-28 22:32:07,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:07,686 INFO L225 Difference]: With dead ends: 316 [2018-01-28 22:32:07,687 INFO L226 Difference]: Without dead ends: 189 [2018-01-28 22:32:07,687 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:32:07,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-28 22:32:07,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-28 22:32:07,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:32:07,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 188 transitions. [2018-01-28 22:32:07,701 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 188 transitions. Word has length 124 [2018-01-28 22:32:07,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:07,701 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 188 transitions. [2018-01-28 22:32:07,701 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:32:07,701 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 188 transitions. [2018-01-28 22:32:07,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 22:32:07,702 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:07,702 INFO L330 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:07,702 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:07,702 INFO L82 PathProgramCache]: Analyzing trace with hash -648565924, now seen corresponding path program 2 times [2018-01-28 22:32:07,702 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:07,702 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:07,703 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,703 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:07,703 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:07,724 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:07,911 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:07,911 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:07,911 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:07,918 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:07,961 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:07,966 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:07,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:07,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:07,980 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:08,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:08,011 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:08,028 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:08,028 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:09,157 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-01-28 22:32:09,192 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:09,192 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-01-28 22:32:09,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-28 22:32:09,193 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-28 22:32:09,193 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-01-28 22:32:09,193 INFO L87 Difference]: Start difference. First operand 186 states and 188 transitions. Second operand 31 states. [2018-01-28 22:32:10,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:10,995 INFO L93 Difference]: Finished difference Result 318 states and 324 transitions. [2018-01-28 22:32:10,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-28 22:32:10,995 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 128 [2018-01-28 22:32:10,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:10,996 INFO L225 Difference]: With dead ends: 318 [2018-01-28 22:32:10,996 INFO L226 Difference]: Without dead ends: 191 [2018-01-28 22:32:10,997 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 107 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 533 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=297, Invalid=2055, Unknown=0, NotChecked=0, Total=2352 [2018-01-28 22:32:10,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-28 22:32:11,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 188. [2018-01-28 22:32:11,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-28 22:32:11,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 190 transitions. [2018-01-28 22:32:11,013 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 190 transitions. Word has length 128 [2018-01-28 22:32:11,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:11,013 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 190 transitions. [2018-01-28 22:32:11,013 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-28 22:32:11,013 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2018-01-28 22:32:11,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-28 22:32:11,014 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:11,014 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:11,014 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:11,015 INFO L82 PathProgramCache]: Analyzing trace with hash 788138781, now seen corresponding path program 1 times [2018-01-28 22:32:11,015 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:11,015 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:11,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:11,015 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:11,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:11,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:11,033 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:11,304 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-28 22:32:11,304 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:11,304 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-28 22:32:11,304 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 22:32:11,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 22:32:11,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:32:11,305 INFO L87 Difference]: Start difference. First operand 188 states and 190 transitions. Second operand 18 states. [2018-01-28 22:32:11,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:11,551 INFO L93 Difference]: Finished difference Result 195 states and 197 transitions. [2018-01-28 22:32:11,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 22:32:11,552 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 132 [2018-01-28 22:32:11,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:11,553 INFO L225 Difference]: With dead ends: 195 [2018-01-28 22:32:11,553 INFO L226 Difference]: Without dead ends: 193 [2018-01-28 22:32:11,553 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-01-28 22:32:11,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-28 22:32:11,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 186. [2018-01-28 22:32:11,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:32:11,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 188 transitions. [2018-01-28 22:32:11,571 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 188 transitions. Word has length 132 [2018-01-28 22:32:11,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:11,571 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 188 transitions. [2018-01-28 22:32:11,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 22:32:11,571 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 188 transitions. [2018-01-28 22:32:11,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-28 22:32:11,572 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:11,572 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:11,572 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:11,572 INFO L82 PathProgramCache]: Analyzing trace with hash -1488037050, now seen corresponding path program 1 times [2018-01-28 22:32:11,572 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:11,572 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:11,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:11,573 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:11,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:11,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:11,604 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:12,045 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-28 22:32:12,045 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:12,045 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-01-28 22:32:12,046 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-28 22:32:12,046 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-28 22:32:12,046 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=505, Unknown=0, NotChecked=0, Total=552 [2018-01-28 22:32:12,046 INFO L87 Difference]: Start difference. First operand 186 states and 188 transitions. Second operand 24 states. [2018-01-28 22:32:12,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:12,467 INFO L93 Difference]: Finished difference Result 193 states and 195 transitions. [2018-01-28 22:32:12,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-28 22:32:12,468 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 151 [2018-01-28 22:32:12,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:12,469 INFO L225 Difference]: With dead ends: 193 [2018-01-28 22:32:12,469 INFO L226 Difference]: Without dead ends: 191 [2018-01-28 22:32:12,469 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=93, Invalid=1029, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 22:32:12,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-28 22:32:12,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 184. [2018-01-28 22:32:12,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-28 22:32:12,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 186 transitions. [2018-01-28 22:32:12,501 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 186 transitions. Word has length 151 [2018-01-28 22:32:12,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:12,502 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 186 transitions. [2018-01-28 22:32:12,502 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-28 22:32:12,502 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 186 transitions. [2018-01-28 22:32:12,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-28 22:32:12,503 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:12,504 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:12,504 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:12,504 INFO L82 PathProgramCache]: Analyzing trace with hash -1488037049, now seen corresponding path program 1 times [2018-01-28 22:32:12,504 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:12,504 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:12,505 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:12,505 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:12,506 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:12,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:12,537 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:12,790 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:12,790 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:12,790 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:12,797 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:12,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:12,853 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:12,878 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:12,911 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:12,911 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-28 22:32:12,911 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-28 22:32:12,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-28 22:32:12,912 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:32:12,912 INFO L87 Difference]: Start difference. First operand 184 states and 186 transitions. Second operand 14 states. [2018-01-28 22:32:13,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:13,059 INFO L93 Difference]: Finished difference Result 312 states and 316 transitions. [2018-01-28 22:32:13,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:32:13,059 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 151 [2018-01-28 22:32:13,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:13,061 INFO L225 Difference]: With dead ends: 312 [2018-01-28 22:32:13,061 INFO L226 Difference]: Without dead ends: 191 [2018-01-28 22:32:13,061 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 151 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:32:13,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-28 22:32:13,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 188. [2018-01-28 22:32:13,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-28 22:32:13,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 190 transitions. [2018-01-28 22:32:13,088 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 190 transitions. Word has length 151 [2018-01-28 22:32:13,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:13,089 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 190 transitions. [2018-01-28 22:32:13,089 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-28 22:32:13,089 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2018-01-28 22:32:13,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-28 22:32:13,090 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:13,090 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:13,091 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:13,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1465949883, now seen corresponding path program 2 times [2018-01-28 22:32:13,091 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:13,091 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:13,092 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:13,092 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:13,092 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:13,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:13,120 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:13,357 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:13,357 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:13,357 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:13,365 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:13,427 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:13,437 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:13,447 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:13,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:13,454 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:13,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:13,504 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:13,516 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:13,516 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:14,784 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-28 22:32:14,804 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:14,804 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [14] total 39 [2018-01-28 22:32:14,805 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-28 22:32:14,805 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-28 22:32:14,806 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1309, Unknown=0, NotChecked=0, Total=1482 [2018-01-28 22:32:14,806 INFO L87 Difference]: Start difference. First operand 188 states and 190 transitions. Second operand 39 states. [2018-01-28 22:32:17,009 WARN L143 SmtUtils]: Spent 2046ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-28 22:32:19,185 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-28 22:32:21,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:21,075 INFO L93 Difference]: Finished difference Result 314 states and 320 transitions. [2018-01-28 22:32:21,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-28 22:32:21,075 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 155 [2018-01-28 22:32:21,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:21,076 INFO L225 Difference]: With dead ends: 314 [2018-01-28 22:32:21,076 INFO L226 Difference]: Without dead ends: 193 [2018-01-28 22:32:21,077 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 126 SyntacticMatches, 5 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 923 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=422, Invalid=3484, Unknown=0, NotChecked=0, Total=3906 [2018-01-28 22:32:21,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-28 22:32:21,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 190. [2018-01-28 22:32:21,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-28 22:32:21,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 192 transitions. [2018-01-28 22:32:21,096 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 192 transitions. Word has length 155 [2018-01-28 22:32:21,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:21,097 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 192 transitions. [2018-01-28 22:32:21,097 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-28 22:32:21,097 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 192 transitions. [2018-01-28 22:32:21,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-01-28 22:32:21,098 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:21,098 INFO L330 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:21,098 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:21,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1668324186, now seen corresponding path program 1 times [2018-01-28 22:32:21,098 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:21,098 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:21,099 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:21,099 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:21,099 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:21,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:21,122 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:21,328 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:21,328 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:21,328 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:21,333 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:21,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:21,391 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:21,414 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:21,434 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:21,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-28 22:32:21,435 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-28 22:32:21,435 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-28 22:32:21,435 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:32:21,435 INFO L87 Difference]: Start difference. First operand 190 states and 192 transitions. Second operand 16 states. [2018-01-28 22:32:21,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:21,527 INFO L93 Difference]: Finished difference Result 316 states and 320 transitions. [2018-01-28 22:32:21,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 22:32:21,527 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 164 [2018-01-28 22:32:21,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:21,528 INFO L225 Difference]: With dead ends: 316 [2018-01-28 22:32:21,528 INFO L226 Difference]: Without dead ends: 197 [2018-01-28 22:32:21,528 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:32:21,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-28 22:32:21,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2018-01-28 22:32:21,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-28 22:32:21,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 196 transitions. [2018-01-28 22:32:21,561 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 196 transitions. Word has length 164 [2018-01-28 22:32:21,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:21,561 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 196 transitions. [2018-01-28 22:32:21,561 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-28 22:32:21,562 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2018-01-28 22:32:21,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-01-28 22:32:21,563 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:21,563 INFO L330 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:21,563 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:21,563 INFO L82 PathProgramCache]: Analyzing trace with hash 1977387880, now seen corresponding path program 2 times [2018-01-28 22:32:21,563 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:21,564 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:21,564 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:21,565 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:21,565 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:21,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:21,591 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:21,848 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:21,849 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:21,849 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:21,858 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:21,907 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:21,921 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:21,928 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:22,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:32:22,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:32:22,007 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,008 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,009 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-28 22:32:22,102 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:32:22,104 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:32:22,108 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 22:32:22,108 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-28 22:32:22,111 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-28 22:32:22,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-28 22:32:22,120 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:32:22,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-28 22:32:22,129 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:32:22,130 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:32:22,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-28 22:32:22,134 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,140 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,143 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,148 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-28 22:32:22,587 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:32:22,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-28 22:32:22,589 INFO L682 Elim1Store]: detected equality via solver [2018-01-28 22:32:22,590 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:32:22,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-28 22:32:22,591 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,594 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,597 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:22,597 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-28 22:32:23,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-28 22:32:23,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-28 22:32:23,101 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:23,102 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:23,103 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:32:23,104 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-28 22:32:23,165 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-01-28 22:32:23,186 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:23,186 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [46] imperfect sequences [16] total 60 [2018-01-28 22:32:23,186 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-28 22:32:23,187 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-28 22:32:23,188 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=3210, Unknown=1, NotChecked=114, Total=3540 [2018-01-28 22:32:23,188 INFO L87 Difference]: Start difference. First operand 194 states and 196 transitions. Second operand 60 states. [2018-01-28 22:32:25,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:25,400 INFO L93 Difference]: Finished difference Result 296 states and 302 transitions. [2018-01-28 22:32:25,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-01-28 22:32:25,400 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 168 [2018-01-28 22:32:25,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:25,401 INFO L225 Difference]: With dead ends: 296 [2018-01-28 22:32:25,401 INFO L226 Difference]: Without dead ends: 177 [2018-01-28 22:32:25,403 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1365 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=371, Invalid=7114, Unknown=1, NotChecked=170, Total=7656 [2018-01-28 22:32:25,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-28 22:32:25,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 174. [2018-01-28 22:32:25,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-28 22:32:25,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 174 transitions. [2018-01-28 22:32:25,435 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 174 transitions. Word has length 168 [2018-01-28 22:32:25,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:25,436 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 174 transitions. [2018-01-28 22:32:25,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-28 22:32:25,436 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 174 transitions. [2018-01-28 22:32:25,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-01-28 22:32:25,436 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:25,437 INFO L330 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:25,437 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:25,437 INFO L82 PathProgramCache]: Analyzing trace with hash -280388892, now seen corresponding path program 1 times [2018-01-28 22:32:25,437 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:25,437 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:25,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:25,438 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:25,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:25,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:25,463 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:25,692 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:25,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:25,693 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:25,698 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:25,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:25,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:25,826 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:25,847 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:25,847 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-28 22:32:25,847 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 22:32:25,848 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 22:32:25,848 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:32:25,848 INFO L87 Difference]: Start difference. First operand 174 states and 174 transitions. Second operand 18 states. [2018-01-28 22:32:25,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:25,953 INFO L93 Difference]: Finished difference Result 276 states and 276 transitions. [2018-01-28 22:32:25,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:32:25,954 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 173 [2018-01-28 22:32:25,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:25,955 INFO L225 Difference]: With dead ends: 276 [2018-01-28 22:32:25,956 INFO L226 Difference]: Without dead ends: 181 [2018-01-28 22:32:25,956 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 173 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:32:25,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-28 22:32:25,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 178. [2018-01-28 22:32:25,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-28 22:32:25,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 178 transitions. [2018-01-28 22:32:25,992 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 178 transitions. Word has length 173 [2018-01-28 22:32:25,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:25,993 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 178 transitions. [2018-01-28 22:32:25,993 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 22:32:25,993 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 178 transitions. [2018-01-28 22:32:25,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-01-28 22:32:25,994 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:25,994 INFO L330 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:25,995 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:25,995 INFO L82 PathProgramCache]: Analyzing trace with hash 1125052002, now seen corresponding path program 2 times [2018-01-28 22:32:25,995 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:25,995 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:25,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:25,996 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:25,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:26,022 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:26,330 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:26,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:26,330 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:26,337 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:26,394 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:26,443 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:26,448 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:26,456 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:26,491 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:26,513 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:26,513 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-28 22:32:26,514 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:32:26,514 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:32:26,514 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:32:26,514 INFO L87 Difference]: Start difference. First operand 178 states and 178 transitions. Second operand 19 states. [2018-01-28 22:32:26,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:26,633 INFO L93 Difference]: Finished difference Result 280 states and 280 transitions. [2018-01-28 22:32:26,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 22:32:26,634 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 177 [2018-01-28 22:32:26,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:26,635 INFO L225 Difference]: With dead ends: 280 [2018-01-28 22:32:26,635 INFO L226 Difference]: Without dead ends: 185 [2018-01-28 22:32:26,636 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 177 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:32:26,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-28 22:32:26,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-28 22:32:26,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:32:26,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 182 transitions. [2018-01-28 22:32:26,670 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 182 transitions. Word has length 177 [2018-01-28 22:32:26,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:26,671 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 182 transitions. [2018-01-28 22:32:26,671 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:32:26,671 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 182 transitions. [2018-01-28 22:32:26,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-01-28 22:32:26,672 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:26,672 INFO L330 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:26,672 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:26,673 INFO L82 PathProgramCache]: Analyzing trace with hash -991800608, now seen corresponding path program 3 times [2018-01-28 22:32:26,673 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:26,673 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:26,674 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,674 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:26,674 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:26,700 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:27,167 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:27,168 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:27,168 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:27,176 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 22:32:27,216 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,241 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,221 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,375 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:29,745 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:31,523 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:32,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:34,600 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:36,890 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:43,347 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:43,351 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:43,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:43,708 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:43,732 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:43,733 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 24] total 41 [2018-01-28 22:32:43,733 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-28 22:32:43,733 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-28 22:32:43,734 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=472, Invalid=1168, Unknown=0, NotChecked=0, Total=1640 [2018-01-28 22:32:43,734 INFO L87 Difference]: Start difference. First operand 182 states and 182 transitions. Second operand 41 states. [2018-01-28 22:32:44,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:44,009 INFO L93 Difference]: Finished difference Result 284 states and 284 transitions. [2018-01-28 22:32:44,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-28 22:32:44,009 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 181 [2018-01-28 22:32:44,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:44,010 INFO L225 Difference]: With dead ends: 284 [2018-01-28 22:32:44,010 INFO L226 Difference]: Without dead ends: 189 [2018-01-28 22:32:44,011 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 160 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=522, Invalid=1458, Unknown=0, NotChecked=0, Total=1980 [2018-01-28 22:32:44,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-28 22:32:44,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-28 22:32:44,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:32:44,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 186 transitions. [2018-01-28 22:32:44,034 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 186 transitions. Word has length 181 [2018-01-28 22:32:44,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:44,034 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 186 transitions. [2018-01-28 22:32:44,034 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-28 22:32:44,034 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 186 transitions. [2018-01-28 22:32:44,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-01-28 22:32:44,035 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:44,035 INFO L330 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:44,035 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:44,035 INFO L82 PathProgramCache]: Analyzing trace with hash -1387050914, now seen corresponding path program 4 times [2018-01-28 22:32:44,035 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:44,035 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:44,036 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:44,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 22:32:44,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 22:32:44,229 INFO L389 BasicCegarLoop]: Counterexample might be feasible [2018-01-28 22:32:44,264 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-28 22:32:44,272 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-28 22:32:44,298 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 10:32:44 BoogieIcfgContainer [2018-01-28 22:32:44,298 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 22:32:44,299 INFO L168 Benchmark]: Toolchain (without parser) took 60975.33 ms. Allocated memory was 306.7 MB in the beginning and 800.1 MB in the end (delta: 493.4 MB). Free memory was 265.7 MB in the beginning and 580.7 MB in the end (delta: -315.0 MB). Peak memory consumption was 178.3 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:44,301 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 306.7 MB. Free memory is still 272.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 22:32:44,301 INFO L168 Benchmark]: CACSL2BoogieTranslator took 235.84 ms. Allocated memory is still 306.7 MB. Free memory was 265.7 MB in the beginning and 251.7 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:44,301 INFO L168 Benchmark]: Boogie Preprocessor took 52.36 ms. Allocated memory is still 306.7 MB. Free memory was 251.7 MB in the beginning and 249.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:44,302 INFO L168 Benchmark]: RCFGBuilder took 542.77 ms. Allocated memory is still 306.7 MB. Free memory was 249.7 MB in the beginning and 211.7 MB in the end (delta: 38.1 MB). Peak memory consumption was 38.1 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:44,302 INFO L168 Benchmark]: TraceAbstraction took 60135.87 ms. Allocated memory was 306.7 MB in the beginning and 800.1 MB in the end (delta: 493.4 MB). Free memory was 210.7 MB in the beginning and 580.7 MB in the end (delta: -370.1 MB). Peak memory consumption was 123.3 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:44,304 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 306.7 MB. Free memory is still 272.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 235.84 ms. Allocated memory is still 306.7 MB. Free memory was 265.7 MB in the beginning and 251.7 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 52.36 ms. Allocated memory is still 306.7 MB. Free memory was 251.7 MB in the beginning and 249.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 542.77 ms. Allocated memory is still 306.7 MB. Free memory was 249.7 MB in the beginning and 211.7 MB in the end (delta: 38.1 MB). Peak memory consumption was 38.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 60135.87 ms. Allocated memory was 306.7 MB in the beginning and 800.1 MB in the end (delta: 493.4 MB). Free memory was 210.7 MB in the beginning and 580.7 MB in the end (delta: -370.1 MB). Peak memory consumption was 123.3 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1444] CALL entry_point() [L1436] struct ldv_kobject *kobj; [L1437] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() VAL [\old(size)=16, __VERIFIER_nondet_int()=1, size=16] [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={24:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={24:0}, malloc(size)={24:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={24:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) VAL [kobj={24:0}, ldv_malloc(sizeof(*kobj))={24:0}] [L1409] COND FALSE !(!kobj) VAL [kobj={24:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={24:0}, memset(kobj, 0, sizeof(*kobj))={24:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={24:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={24:0}, kobj={24:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={24:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={24:0}, kobj={24:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={24:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={24:12}, kref={24:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={24:0}, kobj={24:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={24:4}] [L1099] FCALL list->next = list VAL [list={24:4}, list={24:4}] [L1100] FCALL list->prev = list VAL [list={24:4}, list={24:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={24:0}, kobj={24:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={24:0}] [L1414] RET return kobj; VAL [\result={24:0}, kobj={24:0}] [L1437] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={24:0}] [L1437] kobj = ldv_kobject_create() VAL [kobj={24:0}, ldv_kobject_create()={24:0}] [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={24:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={24:0}, kobj={24:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={24:12}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, v={24:12}] [L1255] int temp; VAL [\old(i)=1, i=1, v={24:12}, v={24:12}] [L1256] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={24:12}, v={24:12}, v->counter=1] [L1256] temp = v->counter VAL [\old(i)=1, i=1, temp=1, v={24:12}, v={24:12}, v->counter=1] [L1257] temp += i VAL [\old(i)=1, i=1, temp=2, v={24:12}, v={24:12}] [L1258] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=2, v={24:12}, v={24:12}] [L1259] RET return temp; VAL [\old(i)=1, \result=2, i=1, temp=2, v={24:12}, v={24:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={24:12}, kref={24:12}, ldv_atomic_add_return(1, (&kref->refcount))=2] [L1374] ldv_kref_get(&kobj->kref) VAL [kobj={24:0}, kobj={24:0}] [L1375] RET return kobj; VAL [\result={24:0}, kobj={24:0}, kobj={24:0}] [L1438] ldv_kobject_get(kobj) VAL [kobj={24:0}, ldv_kobject_get(kobj)={24:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={24:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={24:0}, kobj={24:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={24:12}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={24:12}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, v={24:12}] [L1264] int temp; VAL [\old(i)=1, i=1, v={24:12}, v={24:12}] [L1265] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={24:12}, v={24:12}, v->counter=2] [L1265] temp = v->counter VAL [\old(i)=1, i=1, temp=2, v={24:12}, v={24:12}, v->counter=2] [L1266] temp -= i VAL [\old(i)=1, i=1, temp=1, v={24:12}, v={24:12}] [L1267] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=1, v={24:12}, v={24:12}] [L1268] RET return temp; VAL [\old(i)=1, \result=1, i=1, temp=1, v={24:12}, v={24:12}] [L1281] EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={24:12}, kref={24:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) VAL [\old(count)=1, count=1, kref={24:12}, kref={24:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1285] RET return 0; VAL [\old(count)=1, \result=0, count=1, kref={24:12}, kref={24:12}, release={-1:0}, release={-1:0}] [L1313] EXPR ldv_kref_sub(kref, 1, release) VAL [kref={24:12}, kref={24:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] RET return ldv_kref_sub(kref, 1, release); VAL [\result=0, kref={24:12}, kref={24:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1363] ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={24:0}, kobj={24:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] FCALL ldv_kobject_put(kobj) - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 175 locations, 23 error locations. UNSAFE Result, 60.0s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 24.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4739 SDtfs, 2071 SDslu, 45063 SDs, 0 SdLazy, 13254 SolverSat, 324 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2311 GetRequests, 1680 SyntacticMatches, 11 SemanticMatches, 620 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4479 ImplicationChecksByTransitivity, 27.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=208occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 32 MinimizatonAttempts, 90 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 17.2s SatisfiabilityAnalysisTime, 16.1s InterpolantComputationTime, 4890 NumberOfCodeBlocks, 4722 NumberOfCodeBlocksAsserted, 64 NumberOfCheckSat, 4658 ConstructedInterpolants, 402 QuantifiedInterpolants, 2561178 SizeOfPredicates, 136 NumberOfNonLiveVariables, 5722 ConjunctsInSsa, 585 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 1324/5358 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-28_22-32-44-312.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_22-32-44-312.csv Received shutdown request...