java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 22:40:40,272 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 22:40:40,274 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 22:40:40,287 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 22:40:40,287 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 22:40:40,288 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 22:40:40,290 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 22:40:40,292 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 22:40:40,294 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 22:40:40,294 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 22:40:40,295 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 22:40:40,295 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 22:40:40,296 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 22:40:40,297 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 22:40:40,298 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 22:40:40,300 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 22:40:40,303 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 22:40:40,305 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 22:40:40,306 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 22:40:40,308 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 22:40:40,310 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-28 22:40:40,310 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-28 22:40:40,311 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-28 22:40:40,312 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-28 22:40:40,313 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-28 22:40:40,314 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-28 22:40:40,314 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-28 22:40:40,315 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-28 22:40:40,315 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-28 22:40:40,315 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 22:40:40,316 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 22:40:40,316 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 22:40:40,326 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 22:40:40,326 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 22:40:40,327 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 22:40:40,327 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 22:40:40,328 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 22:40:40,328 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 22:40:40,328 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 22:40:40,329 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 22:40:40,329 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 22:40:40,329 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 22:40:40,329 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 22:40:40,329 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 22:40:40,330 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 22:40:40,330 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 22:40:40,330 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 22:40:40,330 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 22:40:40,330 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 22:40:40,330 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 22:40:40,331 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 22:40:40,331 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 22:40:40,331 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 22:40:40,331 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 22:40:40,331 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 22:40:40,332 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:40:40,332 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 22:40:40,332 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 22:40:40,332 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 22:40:40,332 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 22:40:40,333 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 22:40:40,333 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 22:40:40,333 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 22:40:40,333 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 22:40:40,334 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 22:40:40,334 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 22:40:40,369 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 22:40:40,382 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 22:40:40,386 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 22:40:40,387 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 22:40:40,388 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 22:40:40,389 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-01-28 22:40:40,607 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 22:40:40,614 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 22:40:40,615 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 22:40:40,615 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 22:40:40,622 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 22:40:40,623 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,625 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ca3c60c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40, skipping insertion in model container [2018-01-28 22:40:40,626 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,640 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:40:40,689 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:40:40,808 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:40:40,831 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:40:40,842 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40 WrapperNode [2018-01-28 22:40:40,843 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 22:40:40,843 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 22:40:40,843 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 22:40:40,843 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 22:40:40,856 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,857 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,866 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,866 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,873 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,876 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,878 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... [2018-01-28 22:40:40,880 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 22:40:40,880 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 22:40:40,881 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 22:40:40,881 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 22:40:40,881 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:40:40,927 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 22:40:40,927 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 22:40:40,927 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:40:40,927 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-28 22:40:40,927 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:40:40,927 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-28 22:40:40,928 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-28 22:40:40,928 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-28 22:40:40,928 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-28 22:40:40,928 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-28 22:40:40,928 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-28 22:40:40,928 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-28 22:40:40,929 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-28 22:40:40,929 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-28 22:40:40,929 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-28 22:40:40,929 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-28 22:40:40,929 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 22:40:40,929 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 22:40:40,930 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 22:40:40,930 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 22:40:40,930 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 22:40:40,930 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 22:40:40,930 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 22:40:40,930 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 22:40:40,931 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-28 22:40:40,931 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-28 22:40:40,931 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 22:40:40,931 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-28 22:40:40,931 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 22:40:40,932 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-28 22:40:40,932 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-28 22:40:40,932 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:40:40,932 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-28 22:40:40,932 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-28 22:40:40,932 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:40:40,932 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-28 22:40:40,933 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-28 22:40:40,933 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-28 22:40:40,933 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-28 22:40:40,933 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-28 22:40:40,933 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-28 22:40:40,933 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-28 22:40:40,934 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-28 22:40:40,934 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-28 22:40:40,934 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 22:40:40,934 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 22:40:40,934 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 22:40:41,168 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-28 22:40:41,330 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 22:40:41,331 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:40:41 BoogieIcfgContainer [2018-01-28 22:40:41,331 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 22:40:41,332 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 22:40:41,332 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 22:40:41,336 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 22:40:41,336 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 10:40:40" (1/3) ... [2018-01-28 22:40:41,337 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34ebdfa8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:40:41, skipping insertion in model container [2018-01-28 22:40:41,337 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:40:40" (2/3) ... [2018-01-28 22:40:41,337 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34ebdfa8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:40:41, skipping insertion in model container [2018-01-28 22:40:41,338 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:40:41" (3/3) ... [2018-01-28 22:40:41,340 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-01-28 22:40:41,347 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 22:40:41,356 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-28 22:40:41,410 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 22:40:41,411 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 22:40:41,411 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 22:40:41,411 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 22:40:41,411 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 22:40:41,411 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 22:40:41,412 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 22:40:41,412 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 22:40:41,413 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 22:40:41,436 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states. [2018-01-28 22:40:41,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-28 22:40:41,444 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:41,445 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:41,445 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:41,451 INFO L82 PathProgramCache]: Analyzing trace with hash -1444558594, now seen corresponding path program 1 times [2018-01-28 22:40:41,453 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:41,454 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:41,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:41,521 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:41,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:41,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:41,585 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:41,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:41,798 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:41,798 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:40:41,800 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:40:41,813 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:40:41,813 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:40:41,816 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 5 states. [2018-01-28 22:40:41,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:41,899 INFO L93 Difference]: Finished difference Result 274 states and 287 transitions. [2018-01-28 22:40:41,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:40:41,900 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-28 22:40:41,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:41,916 INFO L225 Difference]: With dead ends: 274 [2018-01-28 22:40:41,916 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:40:41,921 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:40:41,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:40:41,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 148. [2018-01-28 22:40:41,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-01-28 22:40:41,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 155 transitions. [2018-01-28 22:40:41,966 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 155 transitions. Word has length 22 [2018-01-28 22:40:41,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:41,967 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 155 transitions. [2018-01-28 22:40:41,967 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:40:41,967 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 155 transitions. [2018-01-28 22:40:41,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:40:41,968 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:41,968 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:41,968 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:41,968 INFO L82 PathProgramCache]: Analyzing trace with hash -325615945, now seen corresponding path program 1 times [2018-01-28 22:40:41,968 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:41,968 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:41,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:41,970 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:41,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:41,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:41,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:42,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:42,052 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:42,052 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:40:42,053 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:40:42,054 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:40:42,054 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:40:42,054 INFO L87 Difference]: Start difference. First operand 148 states and 155 transitions. Second operand 6 states. [2018-01-28 22:40:42,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:42,229 INFO L93 Difference]: Finished difference Result 151 states and 158 transitions. [2018-01-28 22:40:42,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:40:42,229 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-28 22:40:42,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:42,232 INFO L225 Difference]: With dead ends: 151 [2018-01-28 22:40:42,232 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:40:42,233 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:40:42,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:40:42,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 147. [2018-01-28 22:40:42,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-28 22:40:42,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 154 transitions. [2018-01-28 22:40:42,243 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 154 transitions. Word has length 23 [2018-01-28 22:40:42,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:42,244 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 154 transitions. [2018-01-28 22:40:42,244 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:40:42,244 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 154 transitions. [2018-01-28 22:40:42,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:40:42,244 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:42,244 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:42,245 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:42,245 INFO L82 PathProgramCache]: Analyzing trace with hash -325615944, now seen corresponding path program 1 times [2018-01-28 22:40:42,245 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:42,245 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:42,246 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:42,247 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:42,247 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:42,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:42,268 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:42,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:42,542 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:42,543 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:40:42,543 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:40:42,543 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:40:42,543 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:40:42,544 INFO L87 Difference]: Start difference. First operand 147 states and 154 transitions. Second operand 7 states. [2018-01-28 22:40:42,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:42,766 INFO L93 Difference]: Finished difference Result 150 states and 157 transitions. [2018-01-28 22:40:42,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:40:42,766 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-28 22:40:42,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:42,768 INFO L225 Difference]: With dead ends: 150 [2018-01-28 22:40:42,768 INFO L226 Difference]: Without dead ends: 149 [2018-01-28 22:40:42,768 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:40:42,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-28 22:40:42,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 146. [2018-01-28 22:40:42,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-28 22:40:42,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 153 transitions. [2018-01-28 22:40:42,780 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 153 transitions. Word has length 23 [2018-01-28 22:40:42,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:42,781 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 153 transitions. [2018-01-28 22:40:42,781 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:40:42,781 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 153 transitions. [2018-01-28 22:40:42,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-28 22:40:42,783 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:42,783 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:42,783 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:42,783 INFO L82 PathProgramCache]: Analyzing trace with hash 820749947, now seen corresponding path program 1 times [2018-01-28 22:40:42,783 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:42,784 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:42,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:42,785 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:42,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:42,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:42,800 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:42,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:42,858 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:42,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:40:42,858 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:40:42,859 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:40:42,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:40:42,859 INFO L87 Difference]: Start difference. First operand 146 states and 153 transitions. Second operand 3 states. [2018-01-28 22:40:43,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:43,035 INFO L93 Difference]: Finished difference Result 167 states and 175 transitions. [2018-01-28 22:40:43,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:40:43,035 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-01-28 22:40:43,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:43,038 INFO L225 Difference]: With dead ends: 167 [2018-01-28 22:40:43,039 INFO L226 Difference]: Without dead ends: 163 [2018-01-28 22:40:43,039 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:40:43,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-28 22:40:43,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-28 22:40:43,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-28 22:40:43,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 171 transitions. [2018-01-28 22:40:43,058 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 171 transitions. Word has length 34 [2018-01-28 22:40:43,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:43,059 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 171 transitions. [2018-01-28 22:40:43,059 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:40:43,059 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 171 transitions. [2018-01-28 22:40:43,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-28 22:40:43,060 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:43,061 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:43,061 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:43,061 INFO L82 PathProgramCache]: Analyzing trace with hash -228225356, now seen corresponding path program 1 times [2018-01-28 22:40:43,061 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:43,061 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:43,062 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,062 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:43,062 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:43,076 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:43,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:43,110 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:43,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:40:43,110 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:40:43,110 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:40:43,110 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:40:43,111 INFO L87 Difference]: Start difference. First operand 163 states and 171 transitions. Second operand 6 states. [2018-01-28 22:40:43,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:43,139 INFO L93 Difference]: Finished difference Result 251 states and 261 transitions. [2018-01-28 22:40:43,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:40:43,140 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-28 22:40:43,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:43,141 INFO L225 Difference]: With dead ends: 251 [2018-01-28 22:40:43,141 INFO L226 Difference]: Without dead ends: 162 [2018-01-28 22:40:43,142 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:40:43,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-01-28 22:40:43,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-01-28 22:40:43,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-01-28 22:40:43,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 169 transitions. [2018-01-28 22:40:43,155 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 169 transitions. Word has length 35 [2018-01-28 22:40:43,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:43,155 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 169 transitions. [2018-01-28 22:40:43,155 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:40:43,155 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 169 transitions. [2018-01-28 22:40:43,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:40:43,157 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:43,157 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:43,157 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:43,157 INFO L82 PathProgramCache]: Analyzing trace with hash -1284688410, now seen corresponding path program 1 times [2018-01-28 22:40:43,157 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:43,157 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:43,159 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,159 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:43,159 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:43,176 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:43,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:43,254 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:43,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:40:43,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:40:43,292 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:40:43,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:40:43,293 INFO L87 Difference]: Start difference. First operand 162 states and 169 transitions. Second operand 10 states. [2018-01-28 22:40:43,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:43,490 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-01-28 22:40:43,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:40:43,490 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-28 22:40:43,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:43,492 INFO L225 Difference]: With dead ends: 162 [2018-01-28 22:40:43,492 INFO L226 Difference]: Without dead ends: 161 [2018-01-28 22:40:43,492 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:40:43,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-28 22:40:43,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2018-01-28 22:40:43,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-28 22:40:43,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-01-28 22:40:43,504 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 39 [2018-01-28 22:40:43,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:43,504 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-01-28 22:40:43,504 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:40:43,504 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-01-28 22:40:43,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:40:43,505 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:43,505 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:43,506 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:43,506 INFO L82 PathProgramCache]: Analyzing trace with hash -1284688409, now seen corresponding path program 1 times [2018-01-28 22:40:43,506 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:43,506 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:43,507 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,507 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:43,507 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:43,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:43,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:43,575 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:43,575 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:40:43,576 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:40:43,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:40:43,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:40:43,576 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 4 states. [2018-01-28 22:40:43,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:43,620 INFO L93 Difference]: Finished difference Result 283 states and 295 transitions. [2018-01-28 22:40:43,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:40:43,620 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-28 22:40:43,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:43,622 INFO L225 Difference]: With dead ends: 283 [2018-01-28 22:40:43,622 INFO L226 Difference]: Without dead ends: 165 [2018-01-28 22:40:43,623 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:40:43,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-28 22:40:43,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 162. [2018-01-28 22:40:43,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-01-28 22:40:43,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 169 transitions. [2018-01-28 22:40:43,637 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 169 transitions. Word has length 39 [2018-01-28 22:40:43,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:43,638 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 169 transitions. [2018-01-28 22:40:43,638 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:40:43,638 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 169 transitions. [2018-01-28 22:40:43,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-28 22:40:43,639 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:43,640 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:43,640 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:43,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1841335064, now seen corresponding path program 1 times [2018-01-28 22:40:43,640 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:43,640 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:43,641 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,641 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:43,642 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:43,657 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:43,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:43,758 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:43,758 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:40:43,759 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:40:43,759 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:40:43,759 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:40:43,759 INFO L87 Difference]: Start difference. First operand 162 states and 169 transitions. Second operand 7 states. [2018-01-28 22:40:43,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:43,807 INFO L93 Difference]: Finished difference Result 249 states and 255 transitions. [2018-01-28 22:40:43,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:40:43,808 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-28 22:40:43,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:43,810 INFO L225 Difference]: With dead ends: 249 [2018-01-28 22:40:43,810 INFO L226 Difference]: Without dead ends: 151 [2018-01-28 22:40:43,811 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:40:43,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-28 22:40:43,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 138. [2018-01-28 22:40:43,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-28 22:40:43,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 143 transitions. [2018-01-28 22:40:43,822 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 143 transitions. Word has length 41 [2018-01-28 22:40:43,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:43,822 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 143 transitions. [2018-01-28 22:40:43,823 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:40:43,823 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 143 transitions. [2018-01-28 22:40:43,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:40:43,824 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:43,824 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:43,824 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:43,825 INFO L82 PathProgramCache]: Analyzing trace with hash 43218853, now seen corresponding path program 1 times [2018-01-28 22:40:43,825 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:43,825 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:43,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,827 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:43,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:43,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:43,845 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:43,905 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:43,906 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:40:43,906 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:40:43,915 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:43,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:43,970 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:40:44,040 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:44,062 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:40:44,063 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-28 22:40:44,063 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:40:44,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:40:44,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:40:44,063 INFO L87 Difference]: Start difference. First operand 138 states and 143 transitions. Second operand 6 states. [2018-01-28 22:40:44,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:44,121 INFO L93 Difference]: Finished difference Result 252 states and 262 transitions. [2018-01-28 22:40:44,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:40:44,122 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-28 22:40:44,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:44,123 INFO L225 Difference]: With dead ends: 252 [2018-01-28 22:40:44,123 INFO L226 Difference]: Without dead ends: 145 [2018-01-28 22:40:44,124 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:40:44,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-28 22:40:44,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 142. [2018-01-28 22:40:44,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-28 22:40:44,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 147 transitions. [2018-01-28 22:40:44,134 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 147 transitions. Word has length 43 [2018-01-28 22:40:44,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:44,134 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 147 transitions. [2018-01-28 22:40:44,134 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:40:44,135 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 147 transitions. [2018-01-28 22:40:44,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:40:44,136 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:44,136 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:44,136 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:44,136 INFO L82 PathProgramCache]: Analyzing trace with hash -316233117, now seen corresponding path program 2 times [2018-01-28 22:40:44,137 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:44,137 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:44,138 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:44,138 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:44,138 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:44,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:44,157 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:44,218 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:44,218 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:40:44,218 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:40:44,229 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:40:44,260 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:40:44,263 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:40:44,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:40:44,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:40:44,306 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:40:44,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:40:44,336 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:40:44,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:40:44,364 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:40:45,321 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-28 22:40:45,342 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:40:45,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-28 22:40:45,342 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:40:45,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:40:45,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:40:45,343 INFO L87 Difference]: Start difference. First operand 142 states and 147 transitions. Second operand 19 states. [2018-01-28 22:40:47,652 WARN L143 SmtUtils]: Spent 2034ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-28 22:40:48,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:48,497 INFO L93 Difference]: Finished difference Result 255 states and 266 transitions. [2018-01-28 22:40:48,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:40:48,498 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-28 22:40:48,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:48,499 INFO L225 Difference]: With dead ends: 255 [2018-01-28 22:40:48,499 INFO L226 Difference]: Without dead ends: 148 [2018-01-28 22:40:48,500 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-28 22:40:48,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-01-28 22:40:48,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 145. [2018-01-28 22:40:48,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-28 22:40:48,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 150 transitions. [2018-01-28 22:40:48,511 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 150 transitions. Word has length 47 [2018-01-28 22:40:48,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:48,511 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 150 transitions. [2018-01-28 22:40:48,511 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:40:48,511 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 150 transitions. [2018-01-28 22:40:48,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:40:48,512 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:48,512 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:48,512 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:48,512 INFO L82 PathProgramCache]: Analyzing trace with hash 230226637, now seen corresponding path program 1 times [2018-01-28 22:40:48,512 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:48,513 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:48,514 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:48,514 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:40:48,514 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:48,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:48,528 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:48,683 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-28 22:40:48,684 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:48,684 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:40:48,684 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:40:48,684 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:40:48,685 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:40:48,685 INFO L87 Difference]: Start difference. First operand 145 states and 150 transitions. Second operand 12 states. [2018-01-28 22:40:48,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:48,964 INFO L93 Difference]: Finished difference Result 145 states and 150 transitions. [2018-01-28 22:40:48,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:40:48,964 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-28 22:40:48,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:48,966 INFO L225 Difference]: With dead ends: 145 [2018-01-28 22:40:48,966 INFO L226 Difference]: Without dead ends: 143 [2018-01-28 22:40:48,966 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:40:48,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-28 22:40:48,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-28 22:40:48,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-28 22:40:48,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-01-28 22:40:48,981 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 56 [2018-01-28 22:40:48,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:48,981 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-01-28 22:40:48,982 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:40:48,982 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-01-28 22:40:48,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:40:48,982 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:48,983 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:48,983 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:48,983 INFO L82 PathProgramCache]: Analyzing trace with hash 230226638, now seen corresponding path program 1 times [2018-01-28 22:40:48,983 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:48,983 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:48,984 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:48,984 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:48,984 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:49,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:49,001 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:49,059 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:49,059 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:40:49,059 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:40:49,074 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:49,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:49,114 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:40:49,150 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:49,182 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:40:49,182 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-28 22:40:49,182 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:40:49,182 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:40:49,183 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:40:49,183 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 8 states. [2018-01-28 22:40:49,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:49,226 INFO L93 Difference]: Finished difference Result 254 states and 264 transitions. [2018-01-28 22:40:49,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:40:49,226 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-28 22:40:49,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:49,227 INFO L225 Difference]: With dead ends: 254 [2018-01-28 22:40:49,228 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:40:49,228 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:40:49,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:40:49,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 147. [2018-01-28 22:40:49,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-28 22:40:49,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 152 transitions. [2018-01-28 22:40:49,239 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 152 transitions. Word has length 56 [2018-01-28 22:40:49,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:49,239 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 152 transitions. [2018-01-28 22:40:49,239 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:40:49,239 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 152 transitions. [2018-01-28 22:40:49,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:40:49,240 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:49,240 INFO L330 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:49,240 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:49,240 INFO L82 PathProgramCache]: Analyzing trace with hash 503491792, now seen corresponding path program 2 times [2018-01-28 22:40:49,240 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:49,240 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:49,241 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:49,241 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:49,241 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:49,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:49,256 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:49,379 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:49,380 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:40:49,380 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:40:49,390 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:40:49,411 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:40:49,414 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:40:49,419 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:40:49,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:40:49,432 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:40:49,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:40:49,447 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:40:49,461 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:40:49,461 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:40:50,000 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-28 22:40:50,019 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:40:50,019 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-28 22:40:50,020 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:40:50,020 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:40:50,020 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:40:50,020 INFO L87 Difference]: Start difference. First operand 147 states and 152 transitions. Second operand 22 states. [2018-01-28 22:40:54,538 WARN L143 SmtUtils]: Spent 4030ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-28 22:40:55,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:55,074 INFO L93 Difference]: Finished difference Result 256 states and 268 transitions. [2018-01-28 22:40:55,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:40:55,075 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-28 22:40:55,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:55,076 INFO L225 Difference]: With dead ends: 256 [2018-01-28 22:40:55,076 INFO L226 Difference]: Without dead ends: 152 [2018-01-28 22:40:55,077 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 22:40:55,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-28 22:40:55,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 149. [2018-01-28 22:40:55,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-28 22:40:55,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 154 transitions. [2018-01-28 22:40:55,096 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 154 transitions. Word has length 60 [2018-01-28 22:40:55,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:55,097 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 154 transitions. [2018-01-28 22:40:55,097 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:40:55,097 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 154 transitions. [2018-01-28 22:40:55,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-01-28 22:40:55,098 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:55,098 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:55,098 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:55,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1357348391, now seen corresponding path program 1 times [2018-01-28 22:40:55,098 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:55,098 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:55,099 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,100 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:40:55,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:55,115 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:55,192 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:40:55,192 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:55,192 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:40:55,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:40:55,193 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:40:55,193 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:40:55,193 INFO L87 Difference]: Start difference. First operand 149 states and 154 transitions. Second operand 8 states. [2018-01-28 22:40:55,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:55,251 INFO L93 Difference]: Finished difference Result 229 states and 236 transitions. [2018-01-28 22:40:55,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:40:55,251 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 68 [2018-01-28 22:40:55,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:55,252 INFO L225 Difference]: With dead ends: 229 [2018-01-28 22:40:55,252 INFO L226 Difference]: Without dead ends: 149 [2018-01-28 22:40:55,252 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:40:55,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-28 22:40:55,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-28 22:40:55,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-28 22:40:55,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 153 transitions. [2018-01-28 22:40:55,264 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 153 transitions. Word has length 68 [2018-01-28 22:40:55,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:55,264 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 153 transitions. [2018-01-28 22:40:55,264 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:40:55,264 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 153 transitions. [2018-01-28 22:40:55,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-28 22:40:55,265 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:55,265 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:55,265 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:55,265 INFO L82 PathProgramCache]: Analyzing trace with hash -1973403247, now seen corresponding path program 1 times [2018-01-28 22:40:55,265 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:55,265 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:55,266 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,266 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:55,266 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:55,277 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:55,376 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:40:55,376 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:55,376 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-28 22:40:55,377 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:40:55,377 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:40:55,377 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:40:55,377 INFO L87 Difference]: Start difference. First operand 149 states and 153 transitions. Second operand 10 states. [2018-01-28 22:40:55,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:55,448 INFO L93 Difference]: Finished difference Result 231 states and 237 transitions. [2018-01-28 22:40:55,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:40:55,449 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 73 [2018-01-28 22:40:55,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:55,450 INFO L225 Difference]: With dead ends: 231 [2018-01-28 22:40:55,450 INFO L226 Difference]: Without dead ends: 149 [2018-01-28 22:40:55,451 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:40:55,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-28 22:40:55,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-28 22:40:55,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-28 22:40:55,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 152 transitions. [2018-01-28 22:40:55,468 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 152 transitions. Word has length 73 [2018-01-28 22:40:55,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:55,469 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 152 transitions. [2018-01-28 22:40:55,469 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:40:55,469 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 152 transitions. [2018-01-28 22:40:55,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-28 22:40:55,470 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:55,470 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:55,470 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:55,470 INFO L82 PathProgramCache]: Analyzing trace with hash -114464506, now seen corresponding path program 1 times [2018-01-28 22:40:55,471 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:55,471 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:55,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,472 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:55,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:55,488 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:55,581 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:40:55,581 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:55,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:40:55,582 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 22:40:55,582 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 22:40:55,582 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:40:55,582 INFO L87 Difference]: Start difference. First operand 149 states and 152 transitions. Second operand 11 states. [2018-01-28 22:40:55,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:55,700 INFO L93 Difference]: Finished difference Result 155 states and 157 transitions. [2018-01-28 22:40:55,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:40:55,700 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 84 [2018-01-28 22:40:55,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:55,702 INFO L225 Difference]: With dead ends: 155 [2018-01-28 22:40:55,702 INFO L226 Difference]: Without dead ends: 149 [2018-01-28 22:40:55,702 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:40:55,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-28 22:40:55,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-28 22:40:55,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-28 22:40:55,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 151 transitions. [2018-01-28 22:40:55,720 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 151 transitions. Word has length 84 [2018-01-28 22:40:55,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:55,721 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 151 transitions. [2018-01-28 22:40:55,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 22:40:55,721 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 151 transitions. [2018-01-28 22:40:55,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-28 22:40:55,722 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:55,722 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:55,722 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:55,722 INFO L82 PathProgramCache]: Analyzing trace with hash 975359997, now seen corresponding path program 1 times [2018-01-28 22:40:55,722 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:55,722 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:55,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,723 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:55,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:55,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:55,745 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:56,082 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:40:56,082 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:40:56,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-01-28 22:40:56,083 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-28 22:40:56,083 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-28 22:40:56,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-01-28 22:40:56,084 INFO L87 Difference]: Start difference. First operand 149 states and 151 transitions. Second operand 21 states. [2018-01-28 22:40:56,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:56,583 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-01-28 22:40:56,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-28 22:40:56,583 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 91 [2018-01-28 22:40:56,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:56,585 INFO L225 Difference]: With dead ends: 156 [2018-01-28 22:40:56,585 INFO L226 Difference]: Without dead ends: 154 [2018-01-28 22:40:56,585 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=73, Invalid=739, Unknown=0, NotChecked=0, Total=812 [2018-01-28 22:40:56,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-28 22:40:56,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 147. [2018-01-28 22:40:56,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-28 22:40:56,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 149 transitions. [2018-01-28 22:40:56,604 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 149 transitions. Word has length 91 [2018-01-28 22:40:56,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:56,604 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 149 transitions. [2018-01-28 22:40:56,605 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-28 22:40:56,605 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 149 transitions. [2018-01-28 22:40:56,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-28 22:40:56,606 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:56,606 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:56,606 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:56,606 INFO L82 PathProgramCache]: Analyzing trace with hash 975359998, now seen corresponding path program 1 times [2018-01-28 22:40:56,606 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:56,606 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:56,607 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:56,608 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:56,608 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:56,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:56,631 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:56,810 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:56,811 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:40:56,811 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:40:56,818 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:56,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:56,872 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:40:56,908 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:56,942 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:40:56,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-28 22:40:56,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:40:56,943 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:40:56,943 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:40:56,943 INFO L87 Difference]: Start difference. First operand 147 states and 149 transitions. Second operand 10 states. [2018-01-28 22:40:57,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:40:57,011 INFO L93 Difference]: Finished difference Result 254 states and 258 transitions. [2018-01-28 22:40:57,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:40:57,012 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 91 [2018-01-28 22:40:57,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:40:57,013 INFO L225 Difference]: With dead ends: 254 [2018-01-28 22:40:57,013 INFO L226 Difference]: Without dead ends: 154 [2018-01-28 22:40:57,014 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:40:57,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-28 22:40:57,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 151. [2018-01-28 22:40:57,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-28 22:40:57,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 153 transitions. [2018-01-28 22:40:57,032 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 153 transitions. Word has length 91 [2018-01-28 22:40:57,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:40:57,032 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 153 transitions. [2018-01-28 22:40:57,032 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:40:57,032 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 153 transitions. [2018-01-28 22:40:57,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-01-28 22:40:57,033 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:40:57,033 INFO L330 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:40:57,034 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:40:57,034 INFO L82 PathProgramCache]: Analyzing trace with hash 451563196, now seen corresponding path program 2 times [2018-01-28 22:40:57,034 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:40:57,034 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:40:57,035 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:57,035 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:40:57,035 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:40:57,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:40:57,056 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:40:57,140 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:40:57,141 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:40:57,141 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:40:57,150 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:40:57,192 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:40:57,199 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:40:57,205 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:40:57,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:40:57,219 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:40:57,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:40:57,255 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:40:57,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:40:57,267 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:40:58,513 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-28 22:40:58,533 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:40:58,533 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-28 22:40:58,534 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-28 22:40:58,534 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-28 22:40:58,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-28 22:40:58,535 INFO L87 Difference]: Start difference. First operand 151 states and 153 transitions. Second operand 29 states. [2018-01-28 22:41:05,157 WARN L143 SmtUtils]: Spent 6034ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-28 22:41:06,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:06,160 INFO L93 Difference]: Finished difference Result 256 states and 262 transitions. [2018-01-28 22:41:06,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-28 22:41:06,160 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 95 [2018-01-28 22:41:06,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:06,161 INFO L225 Difference]: With dead ends: 256 [2018-01-28 22:41:06,161 INFO L226 Difference]: Without dead ends: 156 [2018-01-28 22:41:06,162 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 76 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 7.7s TimeCoverageRelationStatistics Valid=238, Invalid=1742, Unknown=0, NotChecked=0, Total=1980 [2018-01-28 22:41:06,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-01-28 22:41:06,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 153. [2018-01-28 22:41:06,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-01-28 22:41:06,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 155 transitions. [2018-01-28 22:41:06,182 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 155 transitions. Word has length 95 [2018-01-28 22:41:06,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:06,183 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 155 transitions. [2018-01-28 22:41:06,183 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-28 22:41:06,183 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 155 transitions. [2018-01-28 22:41:06,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-28 22:41:06,184 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:06,185 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:06,185 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:06,185 INFO L82 PathProgramCache]: Analyzing trace with hash 1287222945, now seen corresponding path program 1 times [2018-01-28 22:41:06,185 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:06,185 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:06,186 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:06,187 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:06,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:06,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:06,213 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:06,630 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-28 22:41:06,631 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:06,631 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-01-28 22:41:06,631 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-28 22:41:06,631 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-28 22:41:06,631 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=601, Unknown=0, NotChecked=0, Total=650 [2018-01-28 22:41:06,632 INFO L87 Difference]: Start difference. First operand 153 states and 155 transitions. Second operand 26 states. [2018-01-28 22:41:07,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:07,267 INFO L93 Difference]: Finished difference Result 160 states and 162 transitions. [2018-01-28 22:41:07,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-28 22:41:07,267 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 118 [2018-01-28 22:41:07,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:07,268 INFO L225 Difference]: With dead ends: 160 [2018-01-28 22:41:07,268 INFO L226 Difference]: Without dead ends: 158 [2018-01-28 22:41:07,269 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=107, Invalid=1375, Unknown=0, NotChecked=0, Total=1482 [2018-01-28 22:41:07,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-28 22:41:07,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 151. [2018-01-28 22:41:07,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-28 22:41:07,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 153 transitions. [2018-01-28 22:41:07,290 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 153 transitions. Word has length 118 [2018-01-28 22:41:07,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:07,290 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 153 transitions. [2018-01-28 22:41:07,290 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-28 22:41:07,291 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 153 transitions. [2018-01-28 22:41:07,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-28 22:41:07,291 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:07,292 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:07,292 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:07,292 INFO L82 PathProgramCache]: Analyzing trace with hash 1287222946, now seen corresponding path program 1 times [2018-01-28 22:41:07,292 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:07,292 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:07,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:07,294 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:07,294 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:07,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:07,319 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:07,438 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:07,439 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:07,439 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:07,445 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:07,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:07,496 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:07,515 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:07,536 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:07,536 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-28 22:41:07,536 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:41:07,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:41:07,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:41:07,537 INFO L87 Difference]: Start difference. First operand 151 states and 153 transitions. Second operand 12 states. [2018-01-28 22:41:07,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:07,593 INFO L93 Difference]: Finished difference Result 254 states and 258 transitions. [2018-01-28 22:41:07,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:41:07,594 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 118 [2018-01-28 22:41:07,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:07,594 INFO L225 Difference]: With dead ends: 254 [2018-01-28 22:41:07,594 INFO L226 Difference]: Without dead ends: 158 [2018-01-28 22:41:07,595 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:41:07,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-28 22:41:07,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 155. [2018-01-28 22:41:07,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-28 22:41:07,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 157 transitions. [2018-01-28 22:41:07,607 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 157 transitions. Word has length 118 [2018-01-28 22:41:07,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:07,607 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 157 transitions. [2018-01-28 22:41:07,608 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:41:07,608 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 157 transitions. [2018-01-28 22:41:07,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-28 22:41:07,609 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:07,609 INFO L330 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:07,609 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:07,609 INFO L82 PathProgramCache]: Analyzing trace with hash -1000951516, now seen corresponding path program 2 times [2018-01-28 22:41:07,609 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:07,609 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:07,610 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:07,610 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:07,610 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:07,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:07,628 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:07,795 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:07,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:07,795 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:07,800 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:07,836 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:07,841 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:07,845 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:07,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:41:07,850 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:07,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:41:07,862 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:07,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:41:07,872 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:41:08,955 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-01-28 22:41:08,975 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:41:08,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [12] total 37 [2018-01-28 22:41:08,976 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-28 22:41:08,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-28 22:41:08,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=1182, Unknown=0, NotChecked=0, Total=1332 [2018-01-28 22:41:08,977 INFO L87 Difference]: Start difference. First operand 155 states and 157 transitions. Second operand 37 states. [2018-01-28 22:41:11,506 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-28 22:41:13,593 WARN L143 SmtUtils]: Spent 2024ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-28 22:41:17,220 WARN L143 SmtUtils]: Spent 3555ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-28 22:41:18,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:18,657 INFO L93 Difference]: Finished difference Result 256 states and 262 transitions. [2018-01-28 22:41:18,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-28 22:41:18,657 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 122 [2018-01-28 22:41:18,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:18,659 INFO L225 Difference]: With dead ends: 256 [2018-01-28 22:41:18,659 INFO L226 Difference]: Without dead ends: 160 [2018-01-28 22:41:18,660 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 95 SyntacticMatches, 3 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 756 ImplicationChecksByTransitivity, 9.6s TimeCoverageRelationStatistics Valid=351, Invalid=3071, Unknown=0, NotChecked=0, Total=3422 [2018-01-28 22:41:18,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-28 22:41:18,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 157. [2018-01-28 22:41:18,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-28 22:41:18,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 159 transitions. [2018-01-28 22:41:18,676 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 159 transitions. Word has length 122 [2018-01-28 22:41:18,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:18,676 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 159 transitions. [2018-01-28 22:41:18,676 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-28 22:41:18,677 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 159 transitions. [2018-01-28 22:41:18,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-01-28 22:41:18,677 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:18,677 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:18,677 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:18,677 INFO L82 PathProgramCache]: Analyzing trace with hash 1165294926, now seen corresponding path program 1 times [2018-01-28 22:41:18,678 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:18,678 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:18,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:18,678 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:18,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:18,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:18,705 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:18,850 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:18,850 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:18,886 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:18,893 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:18,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:18,966 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:18,990 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:19,023 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:19,024 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-28 22:41:19,024 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-28 22:41:19,025 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-28 22:41:19,025 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:41:19,025 INFO L87 Difference]: Start difference. First operand 157 states and 159 transitions. Second operand 14 states. [2018-01-28 22:41:19,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:19,159 INFO L93 Difference]: Finished difference Result 258 states and 262 transitions. [2018-01-28 22:41:19,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:41:19,159 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 131 [2018-01-28 22:41:19,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:19,160 INFO L225 Difference]: With dead ends: 258 [2018-01-28 22:41:19,160 INFO L226 Difference]: Without dead ends: 164 [2018-01-28 22:41:19,160 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:41:19,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-28 22:41:19,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 161. [2018-01-28 22:41:19,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-28 22:41:19,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 163 transitions. [2018-01-28 22:41:19,176 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 163 transitions. Word has length 131 [2018-01-28 22:41:19,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:19,176 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 163 transitions. [2018-01-28 22:41:19,176 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-28 22:41:19,177 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 163 transitions. [2018-01-28 22:41:19,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-01-28 22:41:19,177 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:19,177 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:19,177 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:19,178 INFO L82 PathProgramCache]: Analyzing trace with hash -951687668, now seen corresponding path program 2 times [2018-01-28 22:41:19,178 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:19,178 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:19,178 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:19,179 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:19,179 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:19,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:19,207 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:19,495 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:19,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:19,495 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:19,501 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:19,543 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:19,557 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:19,559 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:19,563 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:19,580 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:19,601 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:19,601 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-01-28 22:41:19,602 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:41:19,602 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:41:19,602 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:41:19,602 INFO L87 Difference]: Start difference. First operand 161 states and 163 transitions. Second operand 15 states. [2018-01-28 22:41:19,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:19,698 INFO L93 Difference]: Finished difference Result 262 states and 266 transitions. [2018-01-28 22:41:19,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 22:41:19,698 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 135 [2018-01-28 22:41:19,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:19,700 INFO L225 Difference]: With dead ends: 262 [2018-01-28 22:41:19,700 INFO L226 Difference]: Without dead ends: 168 [2018-01-28 22:41:19,700 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:41:19,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-01-28 22:41:19,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 165. [2018-01-28 22:41:19,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-28 22:41:19,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 167 transitions. [2018-01-28 22:41:19,718 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 167 transitions. Word has length 135 [2018-01-28 22:41:19,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:19,718 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 167 transitions. [2018-01-28 22:41:19,718 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:41:19,719 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 167 transitions. [2018-01-28 22:41:19,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-01-28 22:41:19,719 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:19,720 INFO L330 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:19,720 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:19,720 INFO L82 PathProgramCache]: Analyzing trace with hash -1130807350, now seen corresponding path program 3 times [2018-01-28 22:41:19,720 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:19,720 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:19,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:19,721 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:19,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:19,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:19,748 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:19,925 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:19,926 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:19,926 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:19,931 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 22:41:19,975 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:19,986 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:20,011 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:20,081 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:20,146 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:20,229 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:20,610 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:20,804 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:21,058 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:21,222 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:21,496 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:22,154 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:41:22,156 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:22,162 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:22,344 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:22,375 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:22,375 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 20] total 33 [2018-01-28 22:41:22,375 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-28 22:41:22,376 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-28 22:41:22,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=770, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 22:41:22,376 INFO L87 Difference]: Start difference. First operand 165 states and 167 transitions. Second operand 33 states. [2018-01-28 22:41:22,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:22,543 INFO L93 Difference]: Finished difference Result 266 states and 270 transitions. [2018-01-28 22:41:22,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-28 22:41:22,544 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 139 [2018-01-28 22:41:22,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:22,545 INFO L225 Difference]: With dead ends: 266 [2018-01-28 22:41:22,545 INFO L226 Difference]: Without dead ends: 172 [2018-01-28 22:41:22,546 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 406 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=328, Invalid=1004, Unknown=0, NotChecked=0, Total=1332 [2018-01-28 22:41:22,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-28 22:41:22,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 169. [2018-01-28 22:41:22,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-28 22:41:22,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 171 transitions. [2018-01-28 22:41:22,570 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 171 transitions. Word has length 139 [2018-01-28 22:41:22,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:22,571 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 171 transitions. [2018-01-28 22:41:22,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-28 22:41:22,571 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 171 transitions. [2018-01-28 22:41:22,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-01-28 22:41:22,571 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:22,571 INFO L330 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:22,572 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:22,572 INFO L82 PathProgramCache]: Analyzing trace with hash -1253242232, now seen corresponding path program 4 times [2018-01-28 22:41:22,572 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:22,572 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:22,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:22,573 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:22,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:22,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:22,596 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:22,820 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:22,820 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:22,820 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:22,828 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 22:41:23,060 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:23,065 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:23,085 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:23,106 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:23,106 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-01-28 22:41:23,106 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 22:41:23,106 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 22:41:23,107 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:41:23,107 INFO L87 Difference]: Start difference. First operand 169 states and 171 transitions. Second operand 17 states. [2018-01-28 22:41:23,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:23,192 INFO L93 Difference]: Finished difference Result 270 states and 274 transitions. [2018-01-28 22:41:23,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-28 22:41:23,192 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 143 [2018-01-28 22:41:23,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:23,193 INFO L225 Difference]: With dead ends: 270 [2018-01-28 22:41:23,193 INFO L226 Difference]: Without dead ends: 176 [2018-01-28 22:41:23,194 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:41:23,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-28 22:41:23,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 173. [2018-01-28 22:41:23,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-28 22:41:23,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 175 transitions. [2018-01-28 22:41:23,211 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 175 transitions. Word has length 143 [2018-01-28 22:41:23,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:23,211 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 175 transitions. [2018-01-28 22:41:23,211 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 22:41:23,211 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 175 transitions. [2018-01-28 22:41:23,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-01-28 22:41:23,212 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:23,212 INFO L330 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:23,212 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:23,212 INFO L82 PathProgramCache]: Analyzing trace with hash 1166100038, now seen corresponding path program 5 times [2018-01-28 22:41:23,212 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:23,212 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:23,213 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:23,213 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:23,213 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:23,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:23,232 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:23,571 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:23,571 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:23,571 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:23,588 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 22:41:23,603 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,620 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,638 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,653 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,672 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,741 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,794 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,875 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,923 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:23,928 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:23,933 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:23,950 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:23,972 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:23,972 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-28 22:41:23,972 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 22:41:23,972 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 22:41:23,973 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:41:23,973 INFO L87 Difference]: Start difference. First operand 173 states and 175 transitions. Second operand 18 states. [2018-01-28 22:41:24,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:24,061 INFO L93 Difference]: Finished difference Result 274 states and 278 transitions. [2018-01-28 22:41:24,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:41:24,062 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 147 [2018-01-28 22:41:24,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:24,062 INFO L225 Difference]: With dead ends: 274 [2018-01-28 22:41:24,062 INFO L226 Difference]: Without dead ends: 180 [2018-01-28 22:41:24,063 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:41:24,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-28 22:41:24,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 177. [2018-01-28 22:41:24,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-28 22:41:24,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 179 transitions. [2018-01-28 22:41:24,083 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 179 transitions. Word has length 147 [2018-01-28 22:41:24,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:24,083 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 179 transitions. [2018-01-28 22:41:24,083 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 22:41:24,084 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 179 transitions. [2018-01-28 22:41:24,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-28 22:41:24,085 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:24,085 INFO L330 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:24,085 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:24,085 INFO L82 PathProgramCache]: Analyzing trace with hash -443190524, now seen corresponding path program 6 times [2018-01-28 22:41:24,085 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:24,086 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:24,086 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:24,087 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:24,087 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:24,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:24,112 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:24,391 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:24,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:24,392 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:24,397 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 22:41:24,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:24,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:24,453 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:24,526 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:24,664 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:24,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:25,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:27,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:27,681 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:29,034 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:29,583 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:29,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:32,752 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:34,881 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:36,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:41:36,805 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:36,818 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:36,847 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:36,871 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:36,871 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-28 22:41:36,871 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:41:36,872 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:41:36,872 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:41:36,872 INFO L87 Difference]: Start difference. First operand 177 states and 179 transitions. Second operand 19 states. [2018-01-28 22:41:36,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:36,973 INFO L93 Difference]: Finished difference Result 278 states and 282 transitions. [2018-01-28 22:41:36,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 22:41:36,973 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 151 [2018-01-28 22:41:36,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:36,974 INFO L225 Difference]: With dead ends: 278 [2018-01-28 22:41:36,974 INFO L226 Difference]: Without dead ends: 184 [2018-01-28 22:41:36,975 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 151 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:41:36,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-28 22:41:37,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 181. [2018-01-28 22:41:37,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-01-28 22:41:37,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 183 transitions. [2018-01-28 22:41:37,005 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 183 transitions. Word has length 151 [2018-01-28 22:41:37,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:37,006 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 183 transitions. [2018-01-28 22:41:37,006 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:41:37,006 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 183 transitions. [2018-01-28 22:41:37,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-28 22:41:37,008 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:37,008 INFO L330 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:37,008 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:37,008 INFO L82 PathProgramCache]: Analyzing trace with hash -769060670, now seen corresponding path program 7 times [2018-01-28 22:41:37,008 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:37,009 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:37,009 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,010 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:37,010 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:37,033 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:37,412 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:37,413 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:37,413 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:37,420 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:37,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:37,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:37,509 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:37,530 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:37,530 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-01-28 22:41:37,531 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:41:37,531 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:41:37,531 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:41:37,531 INFO L87 Difference]: Start difference. First operand 181 states and 183 transitions. Second operand 20 states. [2018-01-28 22:41:37,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:37,635 INFO L93 Difference]: Finished difference Result 282 states and 286 transitions. [2018-01-28 22:41:37,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-28 22:41:37,635 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 155 [2018-01-28 22:41:37,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:37,637 INFO L225 Difference]: With dead ends: 282 [2018-01-28 22:41:37,637 INFO L226 Difference]: Without dead ends: 188 [2018-01-28 22:41:37,637 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-01-28 22:41:37,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-01-28 22:41:37,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 185. [2018-01-28 22:41:37,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-28 22:41:37,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 187 transitions. [2018-01-28 22:41:37,657 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 187 transitions. Word has length 155 [2018-01-28 22:41:37,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:37,657 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 187 transitions. [2018-01-28 22:41:37,657 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:41:37,657 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 187 transitions. [2018-01-28 22:41:37,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-01-28 22:41:37,658 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:37,658 INFO L330 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:37,658 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:37,659 INFO L82 PathProgramCache]: Analyzing trace with hash -333734016, now seen corresponding path program 8 times [2018-01-28 22:41:37,659 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:37,659 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:37,660 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,660 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:37,660 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:37,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:43,191 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:43,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:43,191 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:43,197 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:43,237 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:43,256 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:43,261 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:43,271 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:43,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-01-28 22:41:43,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-01-28 22:41:43,891 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:43,893 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:43,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:43,898 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-01-28 22:41:44,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-01-28 22:41:44,049 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-01-28 22:41:44,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,061 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,070 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-01-28 22:41:44,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-01-28 22:41:44,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-01-28 22:41:44,229 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,253 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,261 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-28 22:41:44,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-28 22:41:44,396 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,396 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,397 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,398 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,399 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,399 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-01-28 22:41:44,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,412 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,420 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,420 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-01-28 22:41:44,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-01-28 22:41:44,566 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,567 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,568 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,569 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,569 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,570 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,571 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,572 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,572 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,573 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-01-28 22:41:44,575 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,592 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:64, output treesize:60 [2018-01-28 22:41:44,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-28 22:41:44,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-01-28 22:41:44,787 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,811 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,822 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:44,822 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:75, output treesize:71 [2018-01-28 22:41:44,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-01-28 22:41:44,996 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,997 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,998 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,999 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:44,999 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,000 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,001 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,002 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,002 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,003 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,004 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,004 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,005 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,006 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,007 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,007 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,008 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,009 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,010 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,011 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,011 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-01-28 22:41:45,013 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,052 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,065 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:86, output treesize:82 [2018-01-28 22:41:45,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-01-28 22:41:45,304 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-01-28 22:41:45,331 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,397 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,416 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,416 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-01-28 22:41:45,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-01-28 22:41:45,710 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,711 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,713 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,713 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,715 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,716 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,717 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,718 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,719 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,720 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,722 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,723 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,724 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,725 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,726 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,728 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,729 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,730 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,731 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,732 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,734 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,736 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,737 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,738 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,741 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,743 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,744 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,745 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,746 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,747 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,748 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,749 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,750 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:45,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-01-28 22:41:45,753 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,851 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,885 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:45,886 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:108, output treesize:104 [2018-01-28 22:41:46,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-01-28 22:41:46,119 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,162 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-01-28 22:41:46,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:46,307 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:46,328 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:46,328 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:119, output treesize:115 [2018-01-28 22:41:46,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-01-28 22:41:46,580 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,581 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,582 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,582 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,583 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,584 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,585 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,586 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,586 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,587 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,588 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,589 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,589 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,590 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,591 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,592 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,593 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,593 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,594 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,595 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,596 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,596 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,597 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,598 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,599 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,599 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,600 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,601 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,602 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,603 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,603 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,604 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,605 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,606 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,606 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,607 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,608 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,609 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,610 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,613 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,620 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,621 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,622 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,623 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,624 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,625 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,625 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,626 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,627 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,628 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,628 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,629 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,630 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,631 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,631 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:46,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-01-28 22:41:46,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:46,783 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:46,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:46,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:130, output treesize:126 [2018-01-28 22:41:47,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-01-28 22:41:47,111 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,114 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,116 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,117 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,119 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,120 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,123 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,124 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,126 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,127 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,128 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,129 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,131 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,132 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,133 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,134 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,135 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,136 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,137 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,142 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,143 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,145 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,146 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,147 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,148 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,151 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,152 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,154 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,155 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,157 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,158 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,159 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,181 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-01-28 22:41:47,192 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:47,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:47,386 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:47,386 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:141, output treesize:137 [2018-01-28 22:41:47,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-01-28 22:41:47,684 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,685 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,685 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,686 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,686 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,687 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,688 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,688 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,689 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,690 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,690 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,691 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,692 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,692 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,693 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,693 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,694 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,695 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,695 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,696 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,696 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,697 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,698 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,698 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,699 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,699 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,700 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,701 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,701 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,702 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,702 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,703 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,704 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,704 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,705 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,705 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,706 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,707 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,707 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,708 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,709 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,709 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,710 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,710 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,711 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,712 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,712 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,713 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,714 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,714 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,715 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,715 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,716 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,717 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,717 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,718 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,718 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,719 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,720 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,720 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,722 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,722 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,723 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,724 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,724 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,725 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,725 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,726 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,727 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,727 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,728 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,729 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,729 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,730 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,730 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,731 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:47,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-01-28 22:41:47,734 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:47,957 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:47,984 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:47,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:152, output treesize:148 [2018-01-28 22:41:48,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-01-28 22:41:48,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,332 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,335 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,336 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,337 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,338 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,339 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,340 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,342 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,343 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,344 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,345 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,346 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,348 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,349 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,350 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,352 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,352 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,353 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,354 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,355 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,356 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,357 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,359 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,360 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,362 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,367 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,368 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,369 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,374 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,375 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,376 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,377 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,378 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,379 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,380 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,381 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,382 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,383 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,384 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,385 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,386 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,387 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,388 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,389 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,390 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,391 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,392 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,393 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,394 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,395 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,396 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,397 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,398 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,400 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,401 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,402 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,403 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:48,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-01-28 22:41:48,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:48,813 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:48,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:48,846 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:163, output treesize:159 [2018-01-28 22:41:49,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-01-28 22:41:49,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,268 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,269 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,269 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,270 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,271 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,273 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,275 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,277 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,278 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,278 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,280 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,281 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,281 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,282 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,283 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,283 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,284 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,287 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,288 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,288 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,289 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,289 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,290 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,291 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,291 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,292 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,293 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,293 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,294 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,295 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,296 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,296 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,297 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,298 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,298 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,299 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,300 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,300 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,301 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,302 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,304 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,332 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:49,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-01-28 22:41:49,336 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:49,692 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:49,727 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:41:49,728 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:179, output treesize:175 [2018-01-28 22:41:50,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-01-28 22:41:50,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,215 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,218 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,223 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,233 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,234 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,235 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,236 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,237 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,240 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,242 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,243 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,268 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,269 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,270 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,271 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,275 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,277 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,278 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,280 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,281 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,282 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,283 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,284 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,288 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,289 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,290 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,291 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,292 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,293 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,294 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,296 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,297 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,298 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,299 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,300 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,302 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,304 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:41:50,326 INFO L303 Elim1Store]: Index analysis took 138 ms [2018-01-28 22:41:50,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-01-28 22:41:50,330 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:50,809 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:41:50,850 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 22:41:50,851 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:195, output treesize:191 [2018-01-28 22:41:58,534 WARN L143 SmtUtils]: Spent 543ms on a formula simplification that was a NOOP. DAG size: 80 [2018-01-28 22:42:00,735 WARN L143 SmtUtils]: Spent 2027ms on a formula simplification that was a NOOP. DAG size: 78 [2018-01-28 22:42:00,878 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_kref_init_~kref.offset Int)) (and (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kref_init_#in~kref.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kref_init_#in~kref.base|) ldv_kref_init_~kref.offset (select (select |c_#memory_$Pointer$.offset| |c_ldv_kref_init_#in~kref.base|) ldv_kref_init_~kref.offset)))) (<= |c_ldv_kref_init_#in~kref.offset| ldv_kref_init_~kref.offset))) is different from true [2018-01-28 22:42:01,263 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:01,266 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:01,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:01,270 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:31 [2018-01-28 22:42:01,273 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_kref_init_~kref.offset Int) (v_DerPreprocessor_2 Int)) (and (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) ldv_kref_init_~kref.offset v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|) (<= (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 12) ldv_kref_init_~kref.offset))) is different from true [2018-01-28 22:42:01,277 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_kref_init_~kref.offset Int) (v_DerPreprocessor_2 Int)) (and (<= (+ |c_ldv_kobject_init_#in~kobj.offset| 12) ldv_kref_init_~kref.offset) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) ldv_kref_init_~kref.offset v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|))) is different from true [2018-01-28 22:42:01,289 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 154 [2018-01-28 22:42:01,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,332 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,334 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,335 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,336 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,336 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,337 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,338 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,338 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,339 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,340 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,341 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,341 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,342 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,343 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,343 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,344 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,345 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,346 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,346 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,348 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,348 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,349 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,350 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,351 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,351 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,352 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,353 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,353 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,354 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,355 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,356 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,356 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,357 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,359 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,360 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,362 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,367 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,369 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,371 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,371 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,373 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,374 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,375 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,377 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,378 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,378 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,379 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,380 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,381 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,382 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,383 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,384 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,385 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,386 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,387 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,387 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,388 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,389 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,390 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,390 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,392 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,393 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,394 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,395 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,395 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,396 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,397 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,399 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,401 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,401 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,402 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,403 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,404 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,406 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,406 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,407 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,407 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,408 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,409 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,410 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,410 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,411 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,412 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,413 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,414 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,415 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,416 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,418 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,419 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,420 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,420 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,421 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,422 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,423 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,423 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,424 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,425 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,426 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,455 INFO L303 Elim1Store]: Index analysis took 160 ms [2018-01-28 22:42:01,658 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 143 disjoint index pairs (out of 136 index pairs), introduced 3 new quantified variables, introduced 16 case distinctions, treesize of input 154 treesize of output 1286 [2018-01-28 22:42:01,660 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-28 22:42:01,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,820 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,830 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,832 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,834 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,839 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,854 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,869 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,871 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,873 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,889 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,892 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,894 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,900 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,902 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,904 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,917 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,921 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,923 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,933 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,937 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,939 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,941 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,942 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,944 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,946 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,947 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,949 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,951 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,955 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,957 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,959 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,961 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,963 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,965 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,967 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,969 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,970 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,977 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,983 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,988 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,989 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,991 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,993 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,995 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,997 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,999 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,002 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,003 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,005 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,007 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,008 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,010 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,011 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,013 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,015 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,021 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,022 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,023 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,025 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,026 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,027 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,029 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,030 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,032 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,033 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,034 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,036 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,037 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,039 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,040 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,041 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,043 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,044 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,046 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,047 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,048 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,050 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,051 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,053 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,054 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,056 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,057 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,059 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,060 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,061 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,063 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,064 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,065 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,067 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,068 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,069 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,071 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,072 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,076 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,113 INFO L303 Elim1Store]: Index analysis took 310 ms [2018-01-28 22:42:02,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 155 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1216 treesize of output 1267 [2018-01-28 22:42:03,851 WARN L146 SmtUtils]: Spent 1717ms on a formula simplification. DAG size of input: 274 DAG size of output 205 [2018-01-28 22:42:03,858 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,887 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,888 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,889 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,890 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,890 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,891 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,892 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,892 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,893 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,894 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,894 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,895 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,899 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,900 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,901 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,902 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,907 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,911 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,912 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,912 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,913 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,914 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,914 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,915 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,917 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,921 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,922 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,922 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,923 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,925 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,927 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,927 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,928 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,929 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,929 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,930 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,933 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,933 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,934 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,935 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,935 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,936 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,937 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,938 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,939 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,939 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,940 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,941 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,942 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,942 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,943 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,944 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,945 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,945 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,946 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,947 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,947 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,948 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,949 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,950 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,950 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,951 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,952 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,952 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,954 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,955 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,955 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,956 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,957 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,957 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,958 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,959 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,960 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,960 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,961 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,962 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,963 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,963 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,964 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,965 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,966 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,966 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,967 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,968 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:03,986 INFO L303 Elim1Store]: Index analysis took 131 ms [2018-01-28 22:42:03,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 121 disjoint index pairs (out of 136 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 314 treesize of output 1315 [2018-01-28 22:42:03,992 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:04,967 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,968 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,969 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,969 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,970 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,971 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,975 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,975 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,977 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,980 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,983 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,984 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,984 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,986 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,987 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,987 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,988 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,989 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,989 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,990 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,991 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,991 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,992 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,993 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,993 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,994 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,994 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,995 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,996 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,996 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,997 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,998 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,998 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:04,999 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,000 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,000 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,001 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,001 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,002 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,003 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,004 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,004 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,005 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,005 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,006 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,007 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,007 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,008 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,008 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,009 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,010 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,010 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,011 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,012 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,012 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,013 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,014 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,014 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,015 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,016 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,016 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,018 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,018 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,019 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,020 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,021 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,021 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,022 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,023 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,024 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,024 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,025 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,026 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,027 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,027 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,028 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,029 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,029 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,030 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,031 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,031 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,032 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,033 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,033 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,034 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,035 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,036 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,036 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,037 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,038 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,038 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,039 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,040 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,041 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,041 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,042 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,042 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,043 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,044 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,044 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,045 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,045 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,046 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,047 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:05,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 1151 [2018-01-28 22:42:05,062 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:05,525 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-28 22:42:36,698 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,700 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,702 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,704 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,706 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,711 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,713 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,715 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,716 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,718 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,720 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,723 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,724 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,725 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,727 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,728 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,730 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,731 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,735 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,736 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,738 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,741 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,744 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,745 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,746 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,748 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,749 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,750 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,752 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,754 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,755 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,757 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,758 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,759 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,761 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,762 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,763 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,765 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,792 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,807 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,809 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,811 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,815 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,820 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,825 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,829 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,830 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,833 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,834 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,837 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,839 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,841 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,854 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,855 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,856 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,858 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,859 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,861 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,862 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,864 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,865 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,867 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,868 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,870 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,872 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,873 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,884 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,887 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,888 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,890 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,892 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,894 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,900 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,903 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,913 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,915 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,921 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,923 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,928 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,930 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,933 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,935 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,937 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,941 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:36,983 INFO L303 Elim1Store]: Index analysis took 290 ms [2018-01-28 22:42:36,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 135 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1140 [2018-01-28 22:42:38,751 WARN L146 SmtUtils]: Spent 1751ms on a formula simplification. DAG size of input: 265 DAG size of output 203 [2018-01-28 22:42:38,761 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,762 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,763 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,764 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,765 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,766 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,767 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,768 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,773 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,807 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,809 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,810 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,811 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,815 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,816 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,819 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,820 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,823 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,825 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,829 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,830 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,831 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,832 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,833 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,834 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,835 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,837 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,839 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,840 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,841 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,843 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,845 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,852 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,854 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,855 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,856 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,857 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,858 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,859 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,860 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,861 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,862 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,863 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,864 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,865 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,866 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,867 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,868 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,869 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,870 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,870 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,871 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,872 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,873 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,876 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,880 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,883 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,884 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,885 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,886 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,887 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,888 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,889 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:38,912 INFO L303 Elim1Store]: Index analysis took 155 ms [2018-01-28 22:42:38,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 127 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 305 treesize of output 1351 [2018-01-28 22:42:38,916 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:39,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,815 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,815 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,816 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,819 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,820 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,820 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,823 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,823 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,825 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,829 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,830 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,830 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,831 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,831 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,832 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,833 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,833 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,834 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,834 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,835 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,837 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,837 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,839 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,840 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,840 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,841 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,843 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,843 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,845 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,848 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,852 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,852 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,854 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,855 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,855 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,856 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,856 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,857 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,858 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,858 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,859 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,860 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,860 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,861 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,862 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,862 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,863 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,864 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,864 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,865 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,866 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,866 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,867 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,868 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,868 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,869 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,870 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,870 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,871 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,871 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,872 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,873 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,873 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,876 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,880 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,883 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,883 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,884 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,884 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,885 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,886 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:39,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 1097 [2018-01-28 22:42:39,901 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:40,338 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-28 22:42:49,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,810 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,816 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,819 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,829 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,830 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,832 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,834 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,839 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,840 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,845 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,854 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,856 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,858 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,859 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,861 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,862 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,863 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,865 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,867 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,869 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,870 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,871 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,872 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,876 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,880 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,884 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,885 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,886 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,888 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,890 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,891 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,893 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,895 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,898 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,900 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,902 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,903 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,905 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,911 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,913 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,914 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,922 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,928 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,933 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,935 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,937 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,938 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,940 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,941 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,942 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,944 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,946 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,948 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,949 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,951 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,952 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,955 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,956 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,957 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,959 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,961 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,962 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,964 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,966 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,967 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,970 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,971 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,980 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,984 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,988 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,990 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,992 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,994 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,997 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:49,998 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,002 INFO L303 Elim1Store]: Index analysis took 214 ms [2018-01-28 22:42:50,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 122 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 153 treesize of output 1060 [2018-01-28 22:42:50,304 WARN L146 SmtUtils]: Spent 298ms on a formula simplification. DAG size of input: 170 DAG size of output 132 [2018-01-28 22:42:50,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,332 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,332 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,334 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,334 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,335 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,335 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,336 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,337 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,337 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,338 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,338 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,339 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,340 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,340 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,341 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,341 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,342 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,342 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,343 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,344 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,344 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,345 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,345 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,346 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,348 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,348 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,349 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,350 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,350 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,351 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,351 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,352 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,353 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,357 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,359 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,360 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,360 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,362 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,367 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,368 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,368 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,369 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,369 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,371 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,371 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,373 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,374 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,374 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,375 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,375 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,376 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,377 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,377 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:50,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 122 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 1151 [2018-01-28 22:42:50,382 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:50,914 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. Received shutdown request... [2018-01-28 22:42:52,139 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-28 22:42:52,139 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-28 22:42:52,143 WARN L185 ceAbstractionStarter]: Timeout [2018-01-28 22:42:52,143 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 10:42:52 BoogieIcfgContainer [2018-01-28 22:42:52,143 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 22:42:52,144 INFO L168 Benchmark]: Toolchain (without parser) took 131536.36 ms. Allocated memory was 302.0 MB in the beginning and 882.4 MB in the end (delta: 580.4 MB). Free memory was 261.0 MB in the beginning and 371.5 MB in the end (delta: -110.5 MB). Peak memory consumption was 780.9 MB. Max. memory is 5.3 GB. [2018-01-28 22:42:52,145 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 302.0 MB. Free memory is still 268.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 22:42:52,145 INFO L168 Benchmark]: CACSL2BoogieTranslator took 227.81 ms. Allocated memory is still 302.0 MB. Free memory was 261.0 MB in the beginning and 246.9 MB in the end (delta: 14.2 MB). Peak memory consumption was 14.2 MB. Max. memory is 5.3 GB. [2018-01-28 22:42:52,145 INFO L168 Benchmark]: Boogie Preprocessor took 36.87 ms. Allocated memory is still 302.0 MB. Free memory was 246.9 MB in the beginning and 244.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:42:52,146 INFO L168 Benchmark]: RCFGBuilder took 450.55 ms. Allocated memory is still 302.0 MB. Free memory was 244.9 MB in the beginning and 211.1 MB in the end (delta: 33.7 MB). Peak memory consumption was 33.7 MB. Max. memory is 5.3 GB. [2018-01-28 22:42:52,146 INFO L168 Benchmark]: TraceAbstraction took 130811.36 ms. Allocated memory was 302.0 MB in the beginning and 882.4 MB in the end (delta: 580.4 MB). Free memory was 211.1 MB in the beginning and 371.5 MB in the end (delta: -160.4 MB). Peak memory consumption was 731.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:42:52,147 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 302.0 MB. Free memory is still 268.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 227.81 ms. Allocated memory is still 302.0 MB. Free memory was 261.0 MB in the beginning and 246.9 MB in the end (delta: 14.2 MB). Peak memory consumption was 14.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 36.87 ms. Allocated memory is still 302.0 MB. Free memory was 246.9 MB in the beginning and 244.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 450.55 ms. Allocated memory is still 302.0 MB. Free memory was 244.9 MB in the beginning and 211.1 MB in the end (delta: 33.7 MB). Peak memory consumption was 33.7 MB. Max. memory is 5.3 GB. * TraceAbstraction took 130811.36 ms. Allocated memory was 302.0 MB in the beginning and 882.4 MB in the end (delta: 580.4 MB). Free memory was 211.1 MB in the beginning and 371.5 MB in the end (delta: -160.4 MB). Peak memory consumption was 731.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1441]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1441). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 645. - StatisticsResult: Ultimate Automizer benchmark data CFG has 18 procedures, 146 locations, 19 error locations. TIMEOUT Result, 130.7s OverallTime, 30 OverallIterations, 16 TraceHistogramMax, 29.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3626 SDtfs, 1518 SDslu, 31751 SDs, 0 SdLazy, 7856 SolverSat, 219 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2060 GetRequests, 1574 SyntacticMatches, 5 SemanticMatches, 481 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2258 ImplicationChecksByTransitivity, 29.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=185occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 29 MinimizatonAttempts, 83 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 15.9s SatisfiabilityAnalysisTime, 9.1s InterpolantComputationTime, 4012 NumberOfCodeBlocks, 3932 NumberOfCodeBlocksAsserted, 84 NumberOfCheckSat, 3968 ConstructedInterpolants, 260 QuantifiedInterpolants, 1544938 SizeOfPredicates, 81 NumberOfNonLiveVariables, 5464 ConjunctsInSsa, 395 ConjunctsInUnsatCore, 44 InterpolantComputations, 18 PerfectInterpolantSequences, 506/5006 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-28_22-42-52-154.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_22-42-52-154.csv Completed graceful shutdown