java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 22:32:03,996 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 22:32:03,998 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 22:32:04,013 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 22:32:04,013 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 22:32:04,014 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 22:32:04,015 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 22:32:04,017 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 22:32:04,019 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 22:32:04,020 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 22:32:04,020 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 22:32:04,020 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 22:32:04,021 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 22:32:04,022 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 22:32:04,023 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 22:32:04,025 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 22:32:04,027 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 22:32:04,029 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 22:32:04,030 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 22:32:04,031 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 22:32:04,034 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-28 22:32:04,038 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 22:32:04,039 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 22:32:04,039 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 22:32:04,049 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 22:32:04,049 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 22:32:04,050 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 22:32:04,050 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 22:32:04,050 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 22:32:04,050 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 22:32:04,051 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 22:32:04,051 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 22:32:04,051 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 22:32:04,052 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 22:32:04,052 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 22:32:04,052 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 22:32:04,052 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 22:32:04,052 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 22:32:04,053 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 22:32:04,053 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 22:32:04,053 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 22:32:04,053 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 22:32:04,053 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 22:32:04,054 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 22:32:04,054 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 22:32:04,054 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 22:32:04,054 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 22:32:04,054 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:32:04,055 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 22:32:04,055 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 22:32:04,055 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 22:32:04,055 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 22:32:04,056 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 22:32:04,056 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 22:32:04,056 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 22:32:04,056 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 22:32:04,057 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 22:32:04,057 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 22:32:04,092 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 22:32:04,105 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 22:32:04,108 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 22:32:04,110 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 22:32:04,110 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 22:32:04,110 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-01-28 22:32:04,294 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 22:32:04,301 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 22:32:04,302 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 22:32:04,302 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 22:32:04,308 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 22:32:04,308 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,311 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6be36ce3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04, skipping insertion in model container [2018-01-28 22:32:04,311 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,324 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:32:04,371 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:32:04,489 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:32:04,506 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:32:04,516 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04 WrapperNode [2018-01-28 22:32:04,516 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 22:32:04,517 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 22:32:04,517 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 22:32:04,518 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 22:32:04,533 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,534 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,545 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,545 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,549 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,552 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,553 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... [2018-01-28 22:32:04,555 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 22:32:04,555 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 22:32:04,556 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 22:32:04,556 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 22:32:04,557 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-28 22:32:04,605 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-28 22:32:04,606 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 22:32:04,606 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-28 22:32:04,606 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-28 22:32:04,607 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-28 22:32:04,608 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-28 22:32:04,608 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 22:32:04,608 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 22:32:04,608 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 22:32:04,734 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-28 22:32:04,846 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 22:32:04,846 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:32:04 BoogieIcfgContainer [2018-01-28 22:32:04,846 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 22:32:04,847 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 22:32:04,847 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 22:32:04,850 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 22:32:04,850 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 10:32:04" (1/3) ... [2018-01-28 22:32:04,851 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@237c6e10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:32:04, skipping insertion in model container [2018-01-28 22:32:04,851 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:04" (2/3) ... [2018-01-28 22:32:04,851 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@237c6e10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:32:04, skipping insertion in model container [2018-01-28 22:32:04,852 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:32:04" (3/3) ... [2018-01-28 22:32:04,854 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-01-28 22:32:04,863 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 22:32:04,870 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 9 error locations. [2018-01-28 22:32:04,917 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 22:32:04,918 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 22:32:04,918 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 22:32:04,918 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 22:32:04,918 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 22:32:04,918 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 22:32:04,918 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 22:32:04,918 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 22:32:04,919 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 22:32:04,936 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states. [2018-01-28 22:32:04,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-28 22:32:04,941 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:04,942 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:04,942 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:04,946 INFO L82 PathProgramCache]: Analyzing trace with hash -319557672, now seen corresponding path program 1 times [2018-01-28 22:32:04,947 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:04,948 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:04,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:04,993 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:04,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:05,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:05,052 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:05,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:05,317 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:05,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:32:05,320 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:32:05,329 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:32:05,330 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:32:05,332 INFO L87 Difference]: Start difference. First operand 77 states. Second operand 5 states. [2018-01-28 22:32:05,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:05,459 INFO L93 Difference]: Finished difference Result 136 states and 143 transitions. [2018-01-28 22:32:05,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:32:05,461 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-28 22:32:05,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:05,476 INFO L225 Difference]: With dead ends: 136 [2018-01-28 22:32:05,476 INFO L226 Difference]: Without dead ends: 81 [2018-01-28 22:32:05,480 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:05,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-28 22:32:05,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 79. [2018-01-28 22:32:05,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-28 22:32:05,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 83 transitions. [2018-01-28 22:32:05,519 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 83 transitions. Word has length 22 [2018-01-28 22:32:05,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:05,520 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 83 transitions. [2018-01-28 22:32:05,520 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:32:05,520 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 83 transitions. [2018-01-28 22:32:05,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:32:05,521 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:05,522 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:05,522 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:05,522 INFO L82 PathProgramCache]: Analyzing trace with hash -285015550, now seen corresponding path program 1 times [2018-01-28 22:32:05,522 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:05,522 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:05,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:05,524 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:05,525 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:05,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:05,555 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:05,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:05,815 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:05,815 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:32:05,817 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:32:05,817 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:32:05,817 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:32:05,818 INFO L87 Difference]: Start difference. First operand 79 states and 83 transitions. Second operand 7 states. [2018-01-28 22:32:06,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:06,079 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2018-01-28 22:32:06,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:32:06,080 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-28 22:32:06,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:06,082 INFO L225 Difference]: With dead ends: 82 [2018-01-28 22:32:06,082 INFO L226 Difference]: Without dead ends: 81 [2018-01-28 22:32:06,083 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:06,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-28 22:32:06,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 78. [2018-01-28 22:32:06,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-01-28 22:32:06,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2018-01-28 22:32:06,094 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 82 transitions. Word has length 23 [2018-01-28 22:32:06,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:06,094 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 82 transitions. [2018-01-28 22:32:06,094 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:32:06,094 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 82 transitions. [2018-01-28 22:32:06,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:32:06,095 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:06,095 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:06,095 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:06,096 INFO L82 PathProgramCache]: Analyzing trace with hash -285015551, now seen corresponding path program 1 times [2018-01-28 22:32:06,096 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:06,096 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:06,098 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,098 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:06,098 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:06,114 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:06,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:06,183 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:06,183 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:32:06,183 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:32:06,184 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:32:06,184 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:06,184 INFO L87 Difference]: Start difference. First operand 78 states and 82 transitions. Second operand 6 states. [2018-01-28 22:32:06,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:06,299 INFO L93 Difference]: Finished difference Result 81 states and 85 transitions. [2018-01-28 22:32:06,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:32:06,315 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-28 22:32:06,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:06,317 INFO L225 Difference]: With dead ends: 81 [2018-01-28 22:32:06,317 INFO L226 Difference]: Without dead ends: 80 [2018-01-28 22:32:06,317 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:06,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-28 22:32:06,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 77. [2018-01-28 22:32:06,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-28 22:32:06,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 81 transitions. [2018-01-28 22:32:06,324 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 81 transitions. Word has length 23 [2018-01-28 22:32:06,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:06,324 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 81 transitions. [2018-01-28 22:32:06,324 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:32:06,324 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 81 transitions. [2018-01-28 22:32:06,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-28 22:32:06,325 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:06,325 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:06,325 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:06,325 INFO L82 PathProgramCache]: Analyzing trace with hash 295001646, now seen corresponding path program 1 times [2018-01-28 22:32:06,326 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:06,326 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:06,327 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,327 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:06,327 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:06,340 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:06,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:06,374 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:06,374 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:32:06,374 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:32:06,375 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:32:06,375 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:32:06,375 INFO L87 Difference]: Start difference. First operand 77 states and 81 transitions. Second operand 3 states. [2018-01-28 22:32:06,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:06,431 INFO L93 Difference]: Finished difference Result 86 states and 89 transitions. [2018-01-28 22:32:06,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:32:06,431 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2018-01-28 22:32:06,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:06,432 INFO L225 Difference]: With dead ends: 86 [2018-01-28 22:32:06,432 INFO L226 Difference]: Without dead ends: 70 [2018-01-28 22:32:06,433 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:32:06,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-01-28 22:32:06,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2018-01-28 22:32:06,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-01-28 22:32:06,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 73 transitions. [2018-01-28 22:32:06,438 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 73 transitions. Word has length 29 [2018-01-28 22:32:06,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:06,439 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 73 transitions. [2018-01-28 22:32:06,439 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:32:06,439 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 73 transitions. [2018-01-28 22:32:06,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-28 22:32:06,440 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:06,440 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:06,440 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:06,440 INFO L82 PathProgramCache]: Analyzing trace with hash 1354721476, now seen corresponding path program 1 times [2018-01-28 22:32:06,440 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:06,440 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:06,441 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,441 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:06,441 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:06,451 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:06,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:06,492 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:06,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:32:06,492 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:32:06,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:32:06,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:06,493 INFO L87 Difference]: Start difference. First operand 70 states and 73 transitions. Second operand 6 states. [2018-01-28 22:32:06,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:06,524 INFO L93 Difference]: Finished difference Result 78 states and 80 transitions. [2018-01-28 22:32:06,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:32:06,525 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-28 22:32:06,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:06,527 INFO L225 Difference]: With dead ends: 78 [2018-01-28 22:32:06,527 INFO L226 Difference]: Without dead ends: 69 [2018-01-28 22:32:06,527 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:06,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-01-28 22:32:06,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-01-28 22:32:06,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-01-28 22:32:06,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 71 transitions. [2018-01-28 22:32:06,536 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 71 transitions. Word has length 30 [2018-01-28 22:32:06,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:06,536 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 71 transitions. [2018-01-28 22:32:06,536 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:32:06,536 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2018-01-28 22:32:06,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:32:06,537 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:06,538 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:06,538 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:06,538 INFO L82 PathProgramCache]: Analyzing trace with hash 1004761274, now seen corresponding path program 1 times [2018-01-28 22:32:06,538 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:06,539 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:06,540 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,540 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:06,540 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:06,557 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:06,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:06,679 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:06,679 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:32:06,679 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:32:06,680 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:32:06,680 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:06,680 INFO L87 Difference]: Start difference. First operand 69 states and 71 transitions. Second operand 10 states. [2018-01-28 22:32:06,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:06,965 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2018-01-28 22:32:06,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:32:06,966 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-28 22:32:06,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:06,967 INFO L225 Difference]: With dead ends: 69 [2018-01-28 22:32:06,968 INFO L226 Difference]: Without dead ends: 68 [2018-01-28 22:32:06,968 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:32:06,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-28 22:32:06,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-01-28 22:32:06,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-01-28 22:32:06,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 70 transitions. [2018-01-28 22:32:06,977 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 70 transitions. Word has length 39 [2018-01-28 22:32:06,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:06,978 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 70 transitions. [2018-01-28 22:32:06,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:32:06,978 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 70 transitions. [2018-01-28 22:32:06,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:32:06,979 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:06,979 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:06,980 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:06,980 INFO L82 PathProgramCache]: Analyzing trace with hash 1004761275, now seen corresponding path program 1 times [2018-01-28 22:32:06,980 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:06,980 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:06,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,982 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:06,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:06,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:06,999 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:07,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:07,035 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:07,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:32:07,035 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:32:07,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:32:07,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:32:07,036 INFO L87 Difference]: Start difference. First operand 68 states and 70 transitions. Second operand 4 states. [2018-01-28 22:32:07,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:07,079 INFO L93 Difference]: Finished difference Result 110 states and 114 transitions. [2018-01-28 22:32:07,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:32:07,081 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-28 22:32:07,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:07,082 INFO L225 Difference]: With dead ends: 110 [2018-01-28 22:32:07,083 INFO L226 Difference]: Without dead ends: 72 [2018-01-28 22:32:07,083 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:32:07,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-01-28 22:32:07,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 69. [2018-01-28 22:32:07,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-01-28 22:32:07,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 71 transitions. [2018-01-28 22:32:07,092 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 71 transitions. Word has length 39 [2018-01-28 22:32:07,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:07,092 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 71 transitions. [2018-01-28 22:32:07,093 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:32:07,093 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2018-01-28 22:32:07,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:32:07,094 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:07,094 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:07,094 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:07,095 INFO L82 PathProgramCache]: Analyzing trace with hash 1624195129, now seen corresponding path program 1 times [2018-01-28 22:32:07,095 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:07,095 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:07,096 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,096 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:07,096 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:07,113 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:07,161 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:07,161 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:07,161 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:07,174 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:07,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:07,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:07,257 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:07,293 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:07,293 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-28 22:32:07,294 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:32:07,294 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:32:07,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:07,294 INFO L87 Difference]: Start difference. First operand 69 states and 71 transitions. Second operand 6 states. [2018-01-28 22:32:07,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:07,359 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2018-01-28 22:32:07,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:32:07,359 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-28 22:32:07,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:07,360 INFO L225 Difference]: With dead ends: 114 [2018-01-28 22:32:07,360 INFO L226 Difference]: Without dead ends: 76 [2018-01-28 22:32:07,361 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:32:07,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-01-28 22:32:07,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 73. [2018-01-28 22:32:07,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-01-28 22:32:07,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 75 transitions. [2018-01-28 22:32:07,370 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 75 transitions. Word has length 43 [2018-01-28 22:32:07,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:07,370 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 75 transitions. [2018-01-28 22:32:07,370 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:32:07,371 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 75 transitions. [2018-01-28 22:32:07,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:32:07,372 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:07,372 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:07,372 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:07,373 INFO L82 PathProgramCache]: Analyzing trace with hash -2077548361, now seen corresponding path program 2 times [2018-01-28 22:32:07,373 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:07,373 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:07,375 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,375 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:07,375 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:07,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:07,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:07,465 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:07,466 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:07,466 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:07,478 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:07,509 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:07,513 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:07,519 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:07,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:07,560 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:07,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:07,597 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:07,635 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:07,635 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:08,178 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 45 DAG size of output 17 [2018-01-28 22:32:08,391 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-28 22:32:08,412 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:08,412 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-28 22:32:08,412 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:32:08,413 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:32:08,413 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:32:08,413 INFO L87 Difference]: Start difference. First operand 73 states and 75 transitions. Second operand 19 states. [2018-01-28 22:32:09,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:09,322 INFO L93 Difference]: Finished difference Result 117 states and 122 transitions. [2018-01-28 22:32:09,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:32:09,323 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-28 22:32:09,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:09,324 INFO L225 Difference]: With dead ends: 117 [2018-01-28 22:32:09,324 INFO L226 Difference]: Without dead ends: 79 [2018-01-28 22:32:09,325 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-28 22:32:09,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-01-28 22:32:09,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 76. [2018-01-28 22:32:09,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-28 22:32:09,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 78 transitions. [2018-01-28 22:32:09,337 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 78 transitions. Word has length 47 [2018-01-28 22:32:09,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:09,338 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 78 transitions. [2018-01-28 22:32:09,338 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:32:09,338 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 78 transitions. [2018-01-28 22:32:09,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:32:09,339 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:09,339 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:09,340 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:09,340 INFO L82 PathProgramCache]: Analyzing trace with hash 557031604, now seen corresponding path program 1 times [2018-01-28 22:32:09,340 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:09,340 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:09,341 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:09,342 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:09,342 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:09,361 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:09,495 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-28 22:32:09,495 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:09,496 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:32:09,496 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:32:09,496 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:32:09,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:32:09,496 INFO L87 Difference]: Start difference. First operand 76 states and 78 transitions. Second operand 12 states. [2018-01-28 22:32:09,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:09,720 INFO L93 Difference]: Finished difference Result 76 states and 78 transitions. [2018-01-28 22:32:09,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:32:09,720 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-28 22:32:09,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:09,721 INFO L225 Difference]: With dead ends: 76 [2018-01-28 22:32:09,721 INFO L226 Difference]: Without dead ends: 74 [2018-01-28 22:32:09,722 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:32:09,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-01-28 22:32:09,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2018-01-28 22:32:09,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-01-28 22:32:09,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 76 transitions. [2018-01-28 22:32:09,729 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 76 transitions. Word has length 56 [2018-01-28 22:32:09,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:09,729 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 76 transitions. [2018-01-28 22:32:09,729 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:32:09,730 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 76 transitions. [2018-01-28 22:32:09,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:32:09,731 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:09,731 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:09,731 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:09,731 INFO L82 PathProgramCache]: Analyzing trace with hash 557031605, now seen corresponding path program 1 times [2018-01-28 22:32:09,731 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:09,731 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:09,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:09,732 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:09,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:09,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:09,749 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:09,846 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:09,847 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:09,847 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:09,858 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:09,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:09,897 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:09,929 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:09,962 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:09,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-28 22:32:09,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:32:09,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:32:09,963 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:09,963 INFO L87 Difference]: Start difference. First operand 74 states and 76 transitions. Second operand 8 states. [2018-01-28 22:32:10,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:10,047 INFO L93 Difference]: Finished difference Result 116 states and 120 transitions. [2018-01-28 22:32:10,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:32:10,048 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-28 22:32:10,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:10,049 INFO L225 Difference]: With dead ends: 116 [2018-01-28 22:32:10,049 INFO L226 Difference]: Without dead ends: 81 [2018-01-28 22:32:10,050 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:32:10,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-28 22:32:10,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 78. [2018-01-28 22:32:10,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-01-28 22:32:10,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 80 transitions. [2018-01-28 22:32:10,060 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 80 transitions. Word has length 56 [2018-01-28 22:32:10,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:10,060 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 80 transitions. [2018-01-28 22:32:10,060 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:32:10,060 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 80 transitions. [2018-01-28 22:32:10,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:32:10,061 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:10,062 INFO L330 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:10,062 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:10,062 INFO L82 PathProgramCache]: Analyzing trace with hash -984810249, now seen corresponding path program 2 times [2018-01-28 22:32:10,062 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:10,062 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:10,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:10,063 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:10,064 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:10,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:10,081 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:10,172 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:10,172 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:10,172 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:10,180 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:10,200 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:10,204 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:10,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:10,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:10,214 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:10,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:10,236 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:10,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:10,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:12,408 WARN L143 SmtUtils]: Spent 2017ms on a formula simplification that was a NOOP. DAG size: 21 [2018-01-28 22:32:12,867 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-28 22:32:12,888 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:12,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-28 22:32:12,888 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:32:12,889 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:32:12,889 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:32:12,889 INFO L87 Difference]: Start difference. First operand 78 states and 80 transitions. Second operand 22 states. [2018-01-28 22:32:15,239 WARN L143 SmtUtils]: Spent 2036ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-28 22:32:15,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:15,861 INFO L93 Difference]: Finished difference Result 118 states and 124 transitions. [2018-01-28 22:32:15,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:32:15,862 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-28 22:32:15,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:15,863 INFO L225 Difference]: With dead ends: 118 [2018-01-28 22:32:15,863 INFO L226 Difference]: Without dead ends: 83 [2018-01-28 22:32:15,864 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 22:32:15,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-28 22:32:15,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 80. [2018-01-28 22:32:15,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-28 22:32:15,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 82 transitions. [2018-01-28 22:32:15,873 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 82 transitions. Word has length 60 [2018-01-28 22:32:15,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:15,874 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 82 transitions. [2018-01-28 22:32:15,874 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:32:15,874 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2018-01-28 22:32:15,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-28 22:32:15,874 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:15,874 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:15,875 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:15,875 INFO L82 PathProgramCache]: Analyzing trace with hash 554912594, now seen corresponding path program 1 times [2018-01-28 22:32:15,875 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:15,875 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:15,876 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:15,876 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:15,876 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:15,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:15,889 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:16,010 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:32:16,010 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:16,010 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:32:16,011 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:32:16,011 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:32:16,011 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:16,011 INFO L87 Difference]: Start difference. First operand 80 states and 82 transitions. Second operand 8 states. [2018-01-28 22:32:16,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:16,055 INFO L93 Difference]: Finished difference Result 91 states and 92 transitions. [2018-01-28 22:32:16,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:32:16,055 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 63 [2018-01-28 22:32:16,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:16,055 INFO L225 Difference]: With dead ends: 91 [2018-01-28 22:32:16,056 INFO L226 Difference]: Without dead ends: 80 [2018-01-28 22:32:16,056 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:16,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-28 22:32:16,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-01-28 22:32:16,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-28 22:32:16,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 81 transitions. [2018-01-28 22:32:16,065 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 81 transitions. Word has length 63 [2018-01-28 22:32:16,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:16,066 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 81 transitions. [2018-01-28 22:32:16,066 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:32:16,066 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 81 transitions. [2018-01-28 22:32:16,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-01-28 22:32:16,066 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:16,066 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:16,067 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:16,067 INFO L82 PathProgramCache]: Analyzing trace with hash -1424216055, now seen corresponding path program 1 times [2018-01-28 22:32:16,067 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:16,067 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:16,068 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,068 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:16,068 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:16,083 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:16,171 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:32:16,171 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:16,171 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-28 22:32:16,171 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:32:16,172 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:32:16,172 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:16,172 INFO L87 Difference]: Start difference. First operand 80 states and 81 transitions. Second operand 10 states. [2018-01-28 22:32:16,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:16,241 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-01-28 22:32:16,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:32:16,241 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 68 [2018-01-28 22:32:16,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:16,242 INFO L225 Difference]: With dead ends: 93 [2018-01-28 22:32:16,242 INFO L226 Difference]: Without dead ends: 80 [2018-01-28 22:32:16,243 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:32:16,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-28 22:32:16,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-01-28 22:32:16,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-28 22:32:16,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 80 transitions. [2018-01-28 22:32:16,251 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 80 transitions. Word has length 68 [2018-01-28 22:32:16,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:16,251 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 80 transitions. [2018-01-28 22:32:16,251 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:32:16,252 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 80 transitions. [2018-01-28 22:32:16,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-28 22:32:16,252 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:16,252 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:16,252 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:16,252 INFO L82 PathProgramCache]: Analyzing trace with hash -2116538207, now seen corresponding path program 1 times [2018-01-28 22:32:16,252 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:16,253 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:16,253 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,254 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:16,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:16,267 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:16,440 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:16,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:16,440 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:16,452 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:16,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:16,488 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:16,515 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:16,536 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:16,536 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-28 22:32:16,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:32:16,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:32:16,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:16,537 INFO L87 Difference]: Start difference. First operand 80 states and 80 transitions. Second operand 10 states. [2018-01-28 22:32:16,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:16,668 INFO L93 Difference]: Finished difference Result 120 states and 120 transitions. [2018-01-28 22:32:16,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:32:16,669 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 79 [2018-01-28 22:32:16,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:16,669 INFO L225 Difference]: With dead ends: 120 [2018-01-28 22:32:16,669 INFO L226 Difference]: Without dead ends: 87 [2018-01-28 22:32:16,670 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:16,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-01-28 22:32:16,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 84. [2018-01-28 22:32:16,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-01-28 22:32:16,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 84 transitions. [2018-01-28 22:32:16,680 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 84 transitions. Word has length 79 [2018-01-28 22:32:16,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:16,680 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 84 transitions. [2018-01-28 22:32:16,680 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:32:16,680 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 84 transitions. [2018-01-28 22:32:16,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-28 22:32:16,681 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:16,681 INFO L330 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:16,681 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:16,682 INFO L82 PathProgramCache]: Analyzing trace with hash -648140257, now seen corresponding path program 2 times [2018-01-28 22:32:16,682 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:16,682 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:16,682 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,683 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:16,683 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:16,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:16,790 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:16,791 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:16,791 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:16,801 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:16,828 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:16,840 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:16,842 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:16,846 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:16,883 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:16,903 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:16,903 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-01-28 22:32:16,904 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 22:32:16,904 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 22:32:16,904 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:16,904 INFO L87 Difference]: Start difference. First operand 84 states and 84 transitions. Second operand 11 states. [2018-01-28 22:32:16,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:16,962 INFO L93 Difference]: Finished difference Result 124 states and 124 transitions. [2018-01-28 22:32:16,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:32:16,962 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 83 [2018-01-28 22:32:16,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:16,963 INFO L225 Difference]: With dead ends: 124 [2018-01-28 22:32:16,963 INFO L226 Difference]: Without dead ends: 91 [2018-01-28 22:32:16,964 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:32:16,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-01-28 22:32:16,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 88. [2018-01-28 22:32:16,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-28 22:32:16,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 88 transitions. [2018-01-28 22:32:16,975 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 88 transitions. Word has length 83 [2018-01-28 22:32:16,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:16,975 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 88 transitions. [2018-01-28 22:32:16,976 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 22:32:16,976 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 88 transitions. [2018-01-28 22:32:16,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-28 22:32:16,976 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:16,976 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:16,976 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:16,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1573964643, now seen corresponding path program 3 times [2018-01-28 22:32:16,977 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:16,977 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:16,977 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,977 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:16,978 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:16,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:16,996 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:17,101 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:17,102 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:17,102 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:17,108 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 22:32:17,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,139 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,149 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,177 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,267 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,487 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:17,488 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:17,493 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:17,627 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:17,648 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:17,648 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 16] total 25 [2018-01-28 22:32:17,648 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-28 22:32:17,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-28 22:32:17,649 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=452, Unknown=0, NotChecked=0, Total=600 [2018-01-28 22:32:17,649 INFO L87 Difference]: Start difference. First operand 88 states and 88 transitions. Second operand 25 states. [2018-01-28 22:32:17,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:17,800 INFO L93 Difference]: Finished difference Result 128 states and 128 transitions. [2018-01-28 22:32:17,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:32:17,800 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 87 [2018-01-28 22:32:17,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:17,801 INFO L225 Difference]: With dead ends: 128 [2018-01-28 22:32:17,801 INFO L226 Difference]: Without dead ends: 95 [2018-01-28 22:32:17,802 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=182, Invalid=630, Unknown=0, NotChecked=0, Total=812 [2018-01-28 22:32:17,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-01-28 22:32:17,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 92. [2018-01-28 22:32:17,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-01-28 22:32:17,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 92 transitions. [2018-01-28 22:32:17,812 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 92 transitions. Word has length 87 [2018-01-28 22:32:17,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:17,812 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 92 transitions. [2018-01-28 22:32:17,813 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-28 22:32:17,813 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 92 transitions. [2018-01-28 22:32:17,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-28 22:32:17,813 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:17,813 INFO L330 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:17,814 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:17,814 INFO L82 PathProgramCache]: Analyzing trace with hash 777703451, now seen corresponding path program 4 times [2018-01-28 22:32:17,814 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:17,814 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:17,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:17,815 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:17,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:17,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:17,834 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:17,937 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:17,937 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:17,937 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:17,943 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 22:32:17,995 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:17,998 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:18,022 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:18,050 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:18,051 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-01-28 22:32:18,051 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 22:32:18,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 22:32:18,052 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:32:18,052 INFO L87 Difference]: Start difference. First operand 92 states and 92 transitions. Second operand 13 states. [2018-01-28 22:32:18,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:18,155 INFO L93 Difference]: Finished difference Result 132 states and 132 transitions. [2018-01-28 22:32:18,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 22:32:18,156 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 91 [2018-01-28 22:32:18,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:18,156 INFO L225 Difference]: With dead ends: 132 [2018-01-28 22:32:18,156 INFO L226 Difference]: Without dead ends: 99 [2018-01-28 22:32:18,157 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:32:18,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-28 22:32:18,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 96. [2018-01-28 22:32:18,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-01-28 22:32:18,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 96 transitions. [2018-01-28 22:32:18,166 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 96 transitions. Word has length 91 [2018-01-28 22:32:18,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:18,167 INFO L432 AbstractCegarLoop]: Abstraction has 96 states and 96 transitions. [2018-01-28 22:32:18,167 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 22:32:18,167 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 96 transitions. [2018-01-28 22:32:18,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-01-28 22:32:18,168 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:18,168 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:18,168 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:18,168 INFO L82 PathProgramCache]: Analyzing trace with hash 1009810585, now seen corresponding path program 5 times [2018-01-28 22:32:18,168 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:18,168 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:18,169 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:18,169 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:18,169 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:18,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:18,183 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:18,298 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:18,298 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:18,298 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:18,306 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 22:32:18,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,319 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,320 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,325 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,332 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,339 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,360 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,441 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,562 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,620 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:18,623 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:18,627 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:18,641 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:18,662 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:18,662 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-28 22:32:18,662 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-28 22:32:18,663 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-28 22:32:18,663 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:32:18,663 INFO L87 Difference]: Start difference. First operand 96 states and 96 transitions. Second operand 14 states. [2018-01-28 22:32:18,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:18,727 INFO L93 Difference]: Finished difference Result 136 states and 136 transitions. [2018-01-28 22:32:18,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:32:18,728 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 95 [2018-01-28 22:32:18,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:18,729 INFO L225 Difference]: With dead ends: 136 [2018-01-28 22:32:18,729 INFO L226 Difference]: Without dead ends: 103 [2018-01-28 22:32:18,729 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:32:18,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-01-28 22:32:18,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 100. [2018-01-28 22:32:18,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-01-28 22:32:18,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 100 transitions. [2018-01-28 22:32:18,744 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 100 transitions. Word has length 95 [2018-01-28 22:32:18,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:18,744 INFO L432 AbstractCegarLoop]: Abstraction has 100 states and 100 transitions. [2018-01-28 22:32:18,744 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-28 22:32:18,745 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 100 transitions. [2018-01-28 22:32:18,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-28 22:32:18,745 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:18,746 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:18,746 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:18,746 INFO L82 PathProgramCache]: Analyzing trace with hash -700466665, now seen corresponding path program 6 times [2018-01-28 22:32:18,746 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:18,746 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:18,747 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:18,747 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:18,747 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:18,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:18,767 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:18,970 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:18,970 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:18,970 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:18,976 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 22:32:18,999 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:19,008 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:19,020 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:19,069 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:19,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:19,328 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:20,034 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:21,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:22,711 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:23,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:25,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:32:25,849 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:25,856 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:25,878 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:25,902 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:25,902 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-01-28 22:32:25,902 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:32:25,902 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:32:25,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:32:25,903 INFO L87 Difference]: Start difference. First operand 100 states and 100 transitions. Second operand 15 states. [2018-01-28 22:32:26,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:26,016 INFO L93 Difference]: Finished difference Result 140 states and 140 transitions. [2018-01-28 22:32:26,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 22:32:26,017 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 99 [2018-01-28 22:32:26,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:26,017 INFO L225 Difference]: With dead ends: 140 [2018-01-28 22:32:26,017 INFO L226 Difference]: Without dead ends: 107 [2018-01-28 22:32:26,018 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 99 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:32:26,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-28 22:32:26,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 104. [2018-01-28 22:32:26,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-01-28 22:32:26,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 104 transitions. [2018-01-28 22:32:26,043 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 104 transitions. Word has length 99 [2018-01-28 22:32:26,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:26,044 INFO L432 AbstractCegarLoop]: Abstraction has 104 states and 104 transitions. [2018-01-28 22:32:26,044 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:32:26,044 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 104 transitions. [2018-01-28 22:32:26,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-28 22:32:26,045 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:26,045 INFO L330 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:26,045 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:26,045 INFO L82 PathProgramCache]: Analyzing trace with hash 861407381, now seen corresponding path program 7 times [2018-01-28 22:32:26,046 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:26,046 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:26,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,047 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:26,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:26,068 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:26,242 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:26,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:26,243 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:26,248 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:26,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:26,280 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:26,297 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:26,318 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:26,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-28 22:32:26,318 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-28 22:32:26,318 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-28 22:32:26,319 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:32:26,319 INFO L87 Difference]: Start difference. First operand 104 states and 104 transitions. Second operand 16 states. [2018-01-28 22:32:26,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:26,410 INFO L93 Difference]: Finished difference Result 144 states and 144 transitions. [2018-01-28 22:32:26,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 22:32:26,410 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 103 [2018-01-28 22:32:26,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:26,411 INFO L225 Difference]: With dead ends: 144 [2018-01-28 22:32:26,411 INFO L226 Difference]: Without dead ends: 111 [2018-01-28 22:32:26,411 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:32:26,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-28 22:32:26,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 108. [2018-01-28 22:32:26,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-01-28 22:32:26,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 108 transitions. [2018-01-28 22:32:26,426 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 108 transitions. Word has length 103 [2018-01-28 22:32:26,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:26,427 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 108 transitions. [2018-01-28 22:32:26,427 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-28 22:32:26,427 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 108 transitions. [2018-01-28 22:32:26,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-28 22:32:26,428 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:26,428 INFO L330 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:26,428 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:26,428 INFO L82 PathProgramCache]: Analyzing trace with hash -1769412589, now seen corresponding path program 8 times [2018-01-28 22:32:26,429 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:26,429 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:26,430 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,430 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:26,430 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:26,451 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:26,618 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:26,619 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:26,619 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:26,624 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:26,657 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:26,673 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:26,675 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:26,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:26,692 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:26,713 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:26,713 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-01-28 22:32:26,714 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 22:32:26,714 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 22:32:26,714 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:32:26,714 INFO L87 Difference]: Start difference. First operand 108 states and 108 transitions. Second operand 17 states. [2018-01-28 22:32:26,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:26,826 INFO L93 Difference]: Finished difference Result 148 states and 148 transitions. [2018-01-28 22:32:26,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-28 22:32:26,827 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 107 [2018-01-28 22:32:26,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:26,829 INFO L225 Difference]: With dead ends: 148 [2018-01-28 22:32:26,829 INFO L226 Difference]: Without dead ends: 115 [2018-01-28 22:32:26,830 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:32:26,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-28 22:32:26,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 112. [2018-01-28 22:32:26,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-28 22:32:26,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-01-28 22:32:26,845 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 107 [2018-01-28 22:32:26,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:26,845 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-01-28 22:32:26,846 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 22:32:26,846 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-01-28 22:32:26,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-01-28 22:32:26,847 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:26,847 INFO L330 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:26,847 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:26,847 INFO L82 PathProgramCache]: Analyzing trace with hash 790747281, now seen corresponding path program 9 times [2018-01-28 22:32:26,847 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:26,848 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:26,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,849 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:26,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:26,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:26,872 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:27,077 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:27,077 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:27,077 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:27,083 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 22:32:27,110 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,123 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,201 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,267 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:27,670 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,093 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,256 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,492 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:28,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:29,597 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:29,843 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:32:29,845 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:29,852 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:30,069 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:30,091 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:30,091 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 22] total 37 [2018-01-28 22:32:30,091 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-28 22:32:30,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-28 22:32:30,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=373, Invalid=959, Unknown=0, NotChecked=0, Total=1332 [2018-01-28 22:32:30,092 INFO L87 Difference]: Start difference. First operand 112 states and 112 transitions. Second operand 37 states. [2018-01-28 22:32:30,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:30,269 INFO L93 Difference]: Finished difference Result 152 states and 152 transitions. [2018-01-28 22:32:30,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:32:30,269 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 111 [2018-01-28 22:32:30,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:30,270 INFO L225 Difference]: With dead ends: 152 [2018-01-28 22:32:30,270 INFO L226 Difference]: Without dead ends: 119 [2018-01-28 22:32:30,270 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 530 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=419, Invalid=1221, Unknown=0, NotChecked=0, Total=1640 [2018-01-28 22:32:30,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-28 22:32:30,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 116. [2018-01-28 22:32:30,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-28 22:32:30,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-01-28 22:32:30,284 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 111 [2018-01-28 22:32:30,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:30,284 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-01-28 22:32:30,284 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-28 22:32:30,284 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-01-28 22:32:30,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-01-28 22:32:30,284 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:30,284 INFO L330 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:30,285 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:30,285 INFO L82 PathProgramCache]: Analyzing trace with hash -122529265, now seen corresponding path program 10 times [2018-01-28 22:32:30,285 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:30,285 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:30,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:30,286 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:30,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:30,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:30,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:30,523 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:30,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:30,523 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:30,531 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 22:32:30,739 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:30,743 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:30,770 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:30,791 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:30,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-28 22:32:30,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:32:30,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:32:30,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:32:30,792 INFO L87 Difference]: Start difference. First operand 116 states and 116 transitions. Second operand 19 states. [2018-01-28 22:32:30,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:30,867 INFO L93 Difference]: Finished difference Result 156 states and 156 transitions. [2018-01-28 22:32:30,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 22:32:30,867 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 115 [2018-01-28 22:32:30,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:30,868 INFO L225 Difference]: With dead ends: 156 [2018-01-28 22:32:30,868 INFO L226 Difference]: Without dead ends: 123 [2018-01-28 22:32:30,868 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:32:30,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-28 22:32:30,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 120. [2018-01-28 22:32:30,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-28 22:32:30,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 120 transitions. [2018-01-28 22:32:30,878 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 120 transitions. Word has length 115 [2018-01-28 22:32:30,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:30,879 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 120 transitions. [2018-01-28 22:32:30,879 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:32:30,879 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 120 transitions. [2018-01-28 22:32:30,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-01-28 22:32:30,880 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:30,880 INFO L330 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:30,880 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:30,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1693848435, now seen corresponding path program 11 times [2018-01-28 22:32:30,881 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:30,881 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:30,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:30,882 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:30,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:30,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:30,902 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:31,192 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:31,192 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:31,192 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:31,200 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 22:32:31,212 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,214 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,216 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,221 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,246 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,325 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,377 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,643 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,818 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:31,906 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:32,021 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:32,024 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:32,029 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:32,054 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:32,075 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:32,075 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-01-28 22:32:32,076 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:32:32,076 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:32:32,076 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:32:32,076 INFO L87 Difference]: Start difference. First operand 120 states and 120 transitions. Second operand 20 states. [2018-01-28 22:32:32,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:32,177 INFO L93 Difference]: Finished difference Result 160 states and 160 transitions. [2018-01-28 22:32:32,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-28 22:32:32,177 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 119 [2018-01-28 22:32:32,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:32,178 INFO L225 Difference]: With dead ends: 160 [2018-01-28 22:32:32,178 INFO L226 Difference]: Without dead ends: 127 [2018-01-28 22:32:32,178 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-01-28 22:32:32,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-28 22:32:32,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 124. [2018-01-28 22:32:32,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-28 22:32:32,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 124 transitions. [2018-01-28 22:32:32,193 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 124 transitions. Word has length 119 [2018-01-28 22:32:32,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:32,194 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 124 transitions. [2018-01-28 22:32:32,194 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:32:32,194 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 124 transitions. [2018-01-28 22:32:32,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-28 22:32:32,195 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:32,195 INFO L330 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:32,195 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:32,195 INFO L82 PathProgramCache]: Analyzing trace with hash 1245188107, now seen corresponding path program 12 times [2018-01-28 22:32:32,195 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:32,195 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:32,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:32,196 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:32,197 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:32,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 22:32:32,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 22:32:32,300 INFO L389 BasicCegarLoop]: Counterexample might be feasible [2018-01-28 22:32:32,329 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-28 22:32:32,333 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-28 22:32:32,351 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 10:32:32 BoogieIcfgContainer [2018-01-28 22:32:32,351 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 22:32:32,352 INFO L168 Benchmark]: Toolchain (without parser) took 28057.49 ms. Allocated memory was 303.0 MB in the beginning and 607.6 MB in the end (delta: 304.6 MB). Free memory was 261.9 MB in the beginning and 501.6 MB in the end (delta: -239.7 MB). Peak memory consumption was 64.9 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:32,354 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 303.0 MB. Free memory is still 268.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 22:32:32,354 INFO L168 Benchmark]: CACSL2BoogieTranslator took 214.66 ms. Allocated memory is still 303.0 MB. Free memory was 261.9 MB in the beginning and 248.7 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:32,355 INFO L168 Benchmark]: Boogie Preprocessor took 37.87 ms. Allocated memory is still 303.0 MB. Free memory was 248.7 MB in the beginning and 246.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:32,355 INFO L168 Benchmark]: RCFGBuilder took 291.05 ms. Allocated memory is still 303.0 MB. Free memory was 246.7 MB in the beginning and 223.7 MB in the end (delta: 23.0 MB). Peak memory consumption was 23.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:32,355 INFO L168 Benchmark]: TraceAbstraction took 27504.38 ms. Allocated memory was 303.0 MB in the beginning and 607.6 MB in the end (delta: 304.6 MB). Free memory was 223.7 MB in the beginning and 501.6 MB in the end (delta: -277.9 MB). Peak memory consumption was 26.7 MB. Max. memory is 5.3 GB. [2018-01-28 22:32:32,357 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 303.0 MB. Free memory is still 268.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 214.66 ms. Allocated memory is still 303.0 MB. Free memory was 261.9 MB in the beginning and 248.7 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 37.87 ms. Allocated memory is still 303.0 MB. Free memory was 248.7 MB in the beginning and 246.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 291.05 ms. Allocated memory is still 303.0 MB. Free memory was 246.7 MB in the beginning and 223.7 MB in the end (delta: 23.0 MB). Peak memory consumption was 23.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 27504.38 ms. Allocated memory was 303.0 MB in the beginning and 607.6 MB in the end (delta: 304.6 MB). Free memory was 223.7 MB in the beginning and 501.6 MB in the end (delta: -277.9 MB). Peak memory consumption was 26.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1441]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1441. Possible FailurePath: [L1442] CALL entry_point() [L1436] struct ldv_kobject *kobj; [L1437] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() VAL [\old(size)=16, __VERIFIER_nondet_int()=1, size=16] [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={20:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={20:0}, malloc(size)={20:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={20:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) VAL [kobj={20:0}, ldv_malloc(sizeof(*kobj))={20:0}] [L1409] COND FALSE !(!kobj) VAL [kobj={20:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={20:0}, memset(kobj, 0, sizeof(*kobj))={20:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={20:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={20:0}, kobj={20:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={20:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={20:0}, kobj={20:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={20:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={20:12}, kref={20:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={20:0}, kobj={20:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={20:4}] [L1099] FCALL list->next = list VAL [list={20:4}, list={20:4}] [L1100] FCALL list->prev = list VAL [list={20:4}, list={20:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={20:0}, kobj={20:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={20:0}] [L1414] RET return kobj; VAL [\result={20:0}, kobj={20:0}] [L1437] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={20:0}] [L1437] RET kobj = ldv_kobject_create() VAL [kobj={20:0}, ldv_kobject_create()={20:0}] [L1442] entry_point() - StatisticsResult: Ultimate Automizer benchmark data CFG has 11 procedures, 77 locations, 9 error locations. UNSAFE Result, 27.4s OverallTime, 26 OverallIterations, 16 TraceHistogramMax, 6.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1474 SDtfs, 758 SDslu, 10130 SDs, 0 SdLazy, 3101 SolverSat, 112 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1596 GetRequests, 1259 SyntacticMatches, 1 SemanticMatches, 336 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1285 ImplicationChecksByTransitivity, 8.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=124occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 25 MinimizatonAttempts, 56 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 11.9s SatisfiabilityAnalysisTime, 7.4s InterpolantComputationTime, 3105 NumberOfCodeBlocks, 3081 NumberOfCodeBlocksAsserted, 99 NumberOfCheckSat, 2942 ConstructedInterpolants, 75 QuantifiedInterpolants, 645449 SizeOfPredicates, 41 NumberOfNonLiveVariables, 3839 ConjunctsInSsa, 279 ConjunctsInUnsatCore, 40 InterpolantComputations, 12 PerfectInterpolantSequences, 139/4825 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-28_22-32-32-365.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_22-32-32-365.csv Received shutdown request...