java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 22:41:14,990 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 22:41:14,992 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 22:41:15,006 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 22:41:15,006 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 22:41:15,007 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 22:41:15,008 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 22:41:15,009 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 22:41:15,011 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 22:41:15,012 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 22:41:15,013 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 22:41:15,013 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 22:41:15,014 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 22:41:15,015 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 22:41:15,016 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 22:41:15,019 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 22:41:15,021 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 22:41:15,023 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 22:41:15,024 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 22:41:15,025 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 22:41:15,027 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-28 22:41:15,027 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-28 22:41:15,028 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-28 22:41:15,029 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-28 22:41:15,029 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-28 22:41:15,031 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-28 22:41:15,031 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-28 22:41:15,031 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-28 22:41:15,032 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-28 22:41:15,032 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 22:41:15,032 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 22:41:15,033 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 22:41:15,042 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 22:41:15,043 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 22:41:15,044 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 22:41:15,044 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 22:41:15,044 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 22:41:15,044 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 22:41:15,044 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 22:41:15,045 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 22:41:15,045 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 22:41:15,046 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 22:41:15,046 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 22:41:15,046 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 22:41:15,046 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 22:41:15,046 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 22:41:15,046 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 22:41:15,047 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 22:41:15,047 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 22:41:15,047 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 22:41:15,047 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 22:41:15,048 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 22:41:15,048 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 22:41:15,048 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 22:41:15,048 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 22:41:15,048 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:41:15,049 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 22:41:15,049 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 22:41:15,049 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 22:41:15,049 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 22:41:15,049 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 22:41:15,049 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 22:41:15,050 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 22:41:15,050 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 22:41:15,051 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 22:41:15,051 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 22:41:15,086 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 22:41:15,099 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 22:41:15,103 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 22:41:15,105 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 22:41:15,105 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 22:41:15,106 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-01-28 22:41:15,323 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 22:41:15,330 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 22:41:15,331 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 22:41:15,332 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 22:41:15,339 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 22:41:15,341 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,344 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@715ee194 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15, skipping insertion in model container [2018-01-28 22:41:15,344 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,362 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:41:15,414 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:41:15,535 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:41:15,558 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:41:15,570 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15 WrapperNode [2018-01-28 22:41:15,570 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 22:41:15,571 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 22:41:15,571 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 22:41:15,571 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 22:41:15,587 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,587 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,599 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,599 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,608 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,611 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,613 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... [2018-01-28 22:41:15,616 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 22:41:15,616 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 22:41:15,616 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 22:41:15,616 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 22:41:15,617 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:41:15,667 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 22:41:15,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 22:41:15,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:41:15,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-28 22:41:15,668 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:41:15,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-28 22:41:15,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-28 22:41:15,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-28 22:41:15,669 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-28 22:41:15,669 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-28 22:41:15,669 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-28 22:41:15,669 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-28 22:41:15,669 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-28 22:41:15,669 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-28 22:41:15,669 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-28 22:41:15,670 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-28 22:41:15,670 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-28 22:41:15,670 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-28 22:41:15,670 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-28 22:41:15,670 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 22:41:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 22:41:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 22:41:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 22:41:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 22:41:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 22:41:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 22:41:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 22:41:15,672 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-28 22:41:15,672 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-28 22:41:15,672 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 22:41:15,672 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-28 22:41:15,672 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 22:41:15,672 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-28 22:41:15,673 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-28 22:41:15,673 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:41:15,673 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-28 22:41:15,673 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-28 22:41:15,673 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-28 22:41:15,673 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:41:15,673 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-28 22:41:15,674 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-28 22:41:15,674 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-28 22:41:15,674 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-28 22:41:15,674 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-28 22:41:15,674 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-28 22:41:15,674 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-28 22:41:15,675 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-28 22:41:15,675 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-28 22:41:15,675 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-28 22:41:15,675 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-28 22:41:15,675 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 22:41:15,675 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 22:41:15,675 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 22:41:15,908 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-28 22:41:16,131 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 22:41:16,131 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:41:16 BoogieIcfgContainer [2018-01-28 22:41:16,131 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 22:41:16,132 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 22:41:16,132 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 22:41:16,135 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 22:41:16,135 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 10:41:15" (1/3) ... [2018-01-28 22:41:16,135 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b9ae4f5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:41:16, skipping insertion in model container [2018-01-28 22:41:16,136 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:41:15" (2/3) ... [2018-01-28 22:41:16,136 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b9ae4f5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:41:16, skipping insertion in model container [2018-01-28 22:41:16,136 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:41:16" (3/3) ... [2018-01-28 22:41:16,137 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-01-28 22:41:16,144 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 22:41:16,152 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-28 22:41:16,196 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 22:41:16,196 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 22:41:16,196 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 22:41:16,196 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 22:41:16,196 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 22:41:16,197 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 22:41:16,197 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 22:41:16,197 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 22:41:16,198 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 22:41:16,217 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states. [2018-01-28 22:41:16,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-28 22:41:16,222 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:16,223 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:16,223 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:16,228 INFO L82 PathProgramCache]: Analyzing trace with hash -1152760657, now seen corresponding path program 1 times [2018-01-28 22:41:16,230 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:16,230 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:16,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:16,280 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:16,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:16,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:16,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:16,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:16,535 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:16,536 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:41:16,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:41:16,547 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:41:16,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:41:16,550 INFO L87 Difference]: Start difference. First operand 176 states. Second operand 5 states. [2018-01-28 22:41:16,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:16,661 INFO L93 Difference]: Finished difference Result 334 states and 351 transitions. [2018-01-28 22:41:16,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:41:16,663 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-28 22:41:16,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:16,674 INFO L225 Difference]: With dead ends: 334 [2018-01-28 22:41:16,675 INFO L226 Difference]: Without dead ends: 180 [2018-01-28 22:41:16,678 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:41:16,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-28 22:41:16,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 178. [2018-01-28 22:41:16,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-28 22:41:16,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 187 transitions. [2018-01-28 22:41:16,721 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 187 transitions. Word has length 22 [2018-01-28 22:41:16,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:16,721 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 187 transitions. [2018-01-28 22:41:16,722 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:41:16,722 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 187 transitions. [2018-01-28 22:41:16,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:41:16,722 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:16,722 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:16,723 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:16,723 INFO L82 PathProgramCache]: Analyzing trace with hash -126553328, now seen corresponding path program 1 times [2018-01-28 22:41:16,723 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:16,723 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:16,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:16,725 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:16,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:16,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:16,749 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:16,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:16,819 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:16,819 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:41:16,821 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:41:16,821 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:41:16,821 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:41:16,822 INFO L87 Difference]: Start difference. First operand 178 states and 187 transitions. Second operand 6 states. [2018-01-28 22:41:17,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:17,045 INFO L93 Difference]: Finished difference Result 181 states and 190 transitions. [2018-01-28 22:41:17,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:41:17,046 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-28 22:41:17,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:17,048 INFO L225 Difference]: With dead ends: 181 [2018-01-28 22:41:17,049 INFO L226 Difference]: Without dead ends: 180 [2018-01-28 22:41:17,050 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:41:17,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-28 22:41:17,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 177. [2018-01-28 22:41:17,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-28 22:41:17,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 186 transitions. [2018-01-28 22:41:17,063 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 186 transitions. Word has length 23 [2018-01-28 22:41:17,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:17,063 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 186 transitions. [2018-01-28 22:41:17,063 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:41:17,063 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 186 transitions. [2018-01-28 22:41:17,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:41:17,064 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:17,064 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:17,064 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:17,064 INFO L82 PathProgramCache]: Analyzing trace with hash -126553327, now seen corresponding path program 1 times [2018-01-28 22:41:17,064 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:17,064 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:17,065 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:17,066 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:17,066 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:17,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:17,086 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:17,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:17,405 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:17,405 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:41:17,405 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:41:17,406 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:41:17,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:41:17,406 INFO L87 Difference]: Start difference. First operand 177 states and 186 transitions. Second operand 7 states. [2018-01-28 22:41:17,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:17,632 INFO L93 Difference]: Finished difference Result 180 states and 189 transitions. [2018-01-28 22:41:17,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:41:17,633 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-28 22:41:17,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:17,635 INFO L225 Difference]: With dead ends: 180 [2018-01-28 22:41:17,635 INFO L226 Difference]: Without dead ends: 179 [2018-01-28 22:41:17,636 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:41:17,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-28 22:41:17,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2018-01-28 22:41:17,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-28 22:41:17,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 185 transitions. [2018-01-28 22:41:17,652 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 185 transitions. Word has length 23 [2018-01-28 22:41:17,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:17,653 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 185 transitions. [2018-01-28 22:41:17,653 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:41:17,653 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 185 transitions. [2018-01-28 22:41:17,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-28 22:41:17,655 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:17,655 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:17,655 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:17,655 INFO L82 PathProgramCache]: Analyzing trace with hash -1417222794, now seen corresponding path program 1 times [2018-01-28 22:41:17,655 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:17,656 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:17,657 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:17,657 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:17,657 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:17,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:17,678 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:17,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:17,779 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:17,779 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:41:17,779 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:41:17,780 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:41:17,780 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:41:17,780 INFO L87 Difference]: Start difference. First operand 176 states and 185 transitions. Second operand 7 states. [2018-01-28 22:41:17,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:17,877 INFO L93 Difference]: Finished difference Result 294 states and 309 transitions. [2018-01-28 22:41:17,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:41:17,878 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-28 22:41:17,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:17,880 INFO L225 Difference]: With dead ends: 294 [2018-01-28 22:41:17,880 INFO L226 Difference]: Without dead ends: 194 [2018-01-28 22:41:17,881 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:41:17,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-28 22:41:17,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 186. [2018-01-28 22:41:17,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:41:17,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 195 transitions. [2018-01-28 22:41:17,897 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 195 transitions. Word has length 36 [2018-01-28 22:41:17,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:17,898 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 195 transitions. [2018-01-28 22:41:17,898 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:41:17,898 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 195 transitions. [2018-01-28 22:41:17,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:41:17,899 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:17,900 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:17,900 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:17,900 INFO L82 PathProgramCache]: Analyzing trace with hash -1985119748, now seen corresponding path program 1 times [2018-01-28 22:41:17,900 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:17,900 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:17,902 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:17,902 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:17,902 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:17,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:17,924 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:17,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:17,962 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:17,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:41:17,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:41:17,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:41:17,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:41:17,963 INFO L87 Difference]: Start difference. First operand 186 states and 195 transitions. Second operand 4 states. [2018-01-28 22:41:18,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:18,014 INFO L93 Difference]: Finished difference Result 328 states and 344 transitions. [2018-01-28 22:41:18,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:41:18,015 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-28 22:41:18,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:18,016 INFO L225 Difference]: With dead ends: 328 [2018-01-28 22:41:18,017 INFO L226 Difference]: Without dead ends: 190 [2018-01-28 22:41:18,017 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:41:18,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-28 22:41:18,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 187. [2018-01-28 22:41:18,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-01-28 22:41:18,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 196 transitions. [2018-01-28 22:41:18,030 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 196 transitions. Word has length 39 [2018-01-28 22:41:18,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:18,030 INFO L432 AbstractCegarLoop]: Abstraction has 187 states and 196 transitions. [2018-01-28 22:41:18,030 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:41:18,030 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 196 transitions. [2018-01-28 22:41:18,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:41:18,032 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:18,032 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:18,032 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:18,033 INFO L82 PathProgramCache]: Analyzing trace with hash 557553978, now seen corresponding path program 1 times [2018-01-28 22:41:18,033 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:18,033 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:18,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:18,034 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:18,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:18,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:18,056 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:18,096 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:18,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:18,096 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:18,107 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:18,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:18,147 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:18,185 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:18,208 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:18,208 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-28 22:41:18,208 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:41:18,209 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:41:18,209 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:41:18,209 INFO L87 Difference]: Start difference. First operand 187 states and 196 transitions. Second operand 6 states. [2018-01-28 22:41:18,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:18,255 INFO L93 Difference]: Finished difference Result 332 states and 348 transitions. [2018-01-28 22:41:18,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:41:18,257 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-28 22:41:18,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:18,259 INFO L225 Difference]: With dead ends: 332 [2018-01-28 22:41:18,259 INFO L226 Difference]: Without dead ends: 194 [2018-01-28 22:41:18,259 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:41:18,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-28 22:41:18,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2018-01-28 22:41:18,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-28 22:41:18,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 200 transitions. [2018-01-28 22:41:18,269 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 200 transitions. Word has length 43 [2018-01-28 22:41:18,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:18,270 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 200 transitions. [2018-01-28 22:41:18,270 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:41:18,270 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 200 transitions. [2018-01-28 22:41:18,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:41:18,271 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:18,272 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:18,272 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:18,272 INFO L82 PathProgramCache]: Analyzing trace with hash -99882632, now seen corresponding path program 2 times [2018-01-28 22:41:18,272 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:18,272 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:18,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:18,273 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:18,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:18,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:18,293 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:18,353 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:18,353 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:18,353 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:18,367 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:18,396 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:18,400 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:18,405 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:18,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:41:18,442 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:18,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:41:18,470 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:18,487 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:41:18,488 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:41:19,258 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-28 22:41:19,284 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:41:19,284 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-28 22:41:19,285 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:41:19,285 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:41:19,285 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:41:19,285 INFO L87 Difference]: Start difference. First operand 191 states and 200 transitions. Second operand 19 states. [2018-01-28 22:41:21,516 WARN L143 SmtUtils]: Spent 2069ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-28 22:41:23,785 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-28 22:41:26,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:26,757 INFO L93 Difference]: Finished difference Result 418 states and 439 transitions. [2018-01-28 22:41:26,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:41:26,757 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-28 22:41:26,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:26,759 INFO L225 Difference]: With dead ends: 418 [2018-01-28 22:41:26,759 INFO L226 Difference]: Without dead ends: 280 [2018-01-28 22:41:26,760 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-28 22:41:26,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2018-01-28 22:41:26,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 194. [2018-01-28 22:41:26,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-28 22:41:26,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 203 transitions. [2018-01-28 22:41:26,776 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 203 transitions. Word has length 47 [2018-01-28 22:41:26,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:26,776 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 203 transitions. [2018-01-28 22:41:26,776 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:41:26,776 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 203 transitions. [2018-01-28 22:41:26,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-28 22:41:26,779 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:26,779 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:26,779 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:26,779 INFO L82 PathProgramCache]: Analyzing trace with hash -266816363, now seen corresponding path program 1 times [2018-01-28 22:41:26,779 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:26,779 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:26,781 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:26,781 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:26,781 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:26,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:26,792 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:26,825 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-28 22:41:26,825 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:26,826 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:41:26,826 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:41:26,826 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:41:26,826 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:41:26,827 INFO L87 Difference]: Start difference. First operand 194 states and 203 transitions. Second operand 3 states. [2018-01-28 22:41:26,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:26,956 INFO L93 Difference]: Finished difference Result 218 states and 232 transitions. [2018-01-28 22:41:26,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:41:26,956 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2018-01-28 22:41:26,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:26,959 INFO L225 Difference]: With dead ends: 218 [2018-01-28 22:41:26,959 INFO L226 Difference]: Without dead ends: 214 [2018-01-28 22:41:26,959 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:41:26,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-01-28 22:41:26,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2018-01-28 22:41:26,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-01-28 22:41:26,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 228 transitions. [2018-01-28 22:41:26,977 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 228 transitions. Word has length 46 [2018-01-28 22:41:26,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:26,977 INFO L432 AbstractCegarLoop]: Abstraction has 214 states and 228 transitions. [2018-01-28 22:41:26,977 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:41:26,977 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 228 transitions. [2018-01-28 22:41:26,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-28 22:41:26,979 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:26,979 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:26,979 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:26,979 INFO L82 PathProgramCache]: Analyzing trace with hash -1158135947, now seen corresponding path program 1 times [2018-01-28 22:41:26,979 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:26,979 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:26,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:26,981 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:26,981 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:26,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:26,992 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:27,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:27,093 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:27,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:41:27,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:41:27,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:41:27,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:41:27,094 INFO L87 Difference]: Start difference. First operand 214 states and 228 transitions. Second operand 7 states. [2018-01-28 22:41:27,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:27,400 INFO L93 Difference]: Finished difference Result 310 states and 335 transitions. [2018-01-28 22:41:27,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:41:27,400 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2018-01-28 22:41:27,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:27,402 INFO L225 Difference]: With dead ends: 310 [2018-01-28 22:41:27,402 INFO L226 Difference]: Without dead ends: 209 [2018-01-28 22:41:27,403 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:41:27,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-01-28 22:41:27,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 194. [2018-01-28 22:41:27,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-28 22:41:27,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 203 transitions. [2018-01-28 22:41:27,418 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 203 transitions. Word has length 48 [2018-01-28 22:41:27,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:27,418 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 203 transitions. [2018-01-28 22:41:27,418 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:41:27,418 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 203 transitions. [2018-01-28 22:41:27,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:41:27,419 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:27,419 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:27,419 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:27,419 INFO L82 PathProgramCache]: Analyzing trace with hash -1176072202, now seen corresponding path program 1 times [2018-01-28 22:41:27,419 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:27,419 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:27,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:27,420 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:27,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:27,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:27,430 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:27,495 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-28 22:41:27,496 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:27,496 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:41:27,496 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:41:27,496 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:41:27,497 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:41:27,497 INFO L87 Difference]: Start difference. First operand 194 states and 203 transitions. Second operand 6 states. [2018-01-28 22:41:27,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:27,531 INFO L93 Difference]: Finished difference Result 198 states and 206 transitions. [2018-01-28 22:41:27,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:41:27,532 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 47 [2018-01-28 22:41:27,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:27,533 INFO L225 Difference]: With dead ends: 198 [2018-01-28 22:41:27,533 INFO L226 Difference]: Without dead ends: 176 [2018-01-28 22:41:27,534 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:41:27,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-28 22:41:27,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-01-28 22:41:27,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-28 22:41:27,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 183 transitions. [2018-01-28 22:41:27,549 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 183 transitions. Word has length 47 [2018-01-28 22:41:27,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:27,549 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 183 transitions. [2018-01-28 22:41:27,549 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:41:27,549 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 183 transitions. [2018-01-28 22:41:27,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-28 22:41:27,550 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:27,550 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:27,550 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:27,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1436412597, now seen corresponding path program 1 times [2018-01-28 22:41:27,551 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:27,551 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:27,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:27,552 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:27,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:27,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:27,567 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:27,664 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-28 22:41:27,665 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:27,665 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:41:27,665 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:41:27,665 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:41:27,665 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:41:27,665 INFO L87 Difference]: Start difference. First operand 176 states and 183 transitions. Second operand 12 states. [2018-01-28 22:41:27,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:27,924 INFO L93 Difference]: Finished difference Result 176 states and 183 transitions. [2018-01-28 22:41:27,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:41:27,924 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 51 [2018-01-28 22:41:27,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:27,925 INFO L225 Difference]: With dead ends: 176 [2018-01-28 22:41:27,925 INFO L226 Difference]: Without dead ends: 175 [2018-01-28 22:41:27,926 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:41:27,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-01-28 22:41:27,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 175. [2018-01-28 22:41:27,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-28 22:41:27,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 182 transitions. [2018-01-28 22:41:27,945 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 182 transitions. Word has length 51 [2018-01-28 22:41:27,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:27,945 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 182 transitions. [2018-01-28 22:41:27,945 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:41:27,945 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 182 transitions. [2018-01-28 22:41:27,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:41:27,946 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:27,946 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:27,947 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:27,947 INFO L82 PathProgramCache]: Analyzing trace with hash 713524960, now seen corresponding path program 1 times [2018-01-28 22:41:27,947 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:27,947 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:27,948 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:27,948 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:27,948 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:27,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:27,964 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:28,087 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-28 22:41:28,087 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:28,088 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:41:28,088 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:41:28,088 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:41:28,088 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:41:28,089 INFO L87 Difference]: Start difference. First operand 175 states and 182 transitions. Second operand 12 states. [2018-01-28 22:41:28,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:28,455 INFO L93 Difference]: Finished difference Result 175 states and 182 transitions. [2018-01-28 22:41:28,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:41:28,455 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-28 22:41:28,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:28,456 INFO L225 Difference]: With dead ends: 175 [2018-01-28 22:41:28,457 INFO L226 Difference]: Without dead ends: 173 [2018-01-28 22:41:28,457 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:41:28,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-28 22:41:28,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2018-01-28 22:41:28,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-28 22:41:28,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 180 transitions. [2018-01-28 22:41:28,471 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 180 transitions. Word has length 56 [2018-01-28 22:41:28,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:28,471 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 180 transitions. [2018-01-28 22:41:28,471 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:41:28,472 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 180 transitions. [2018-01-28 22:41:28,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:41:28,472 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:28,472 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:28,472 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:28,473 INFO L82 PathProgramCache]: Analyzing trace with hash 713524961, now seen corresponding path program 1 times [2018-01-28 22:41:28,473 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:28,473 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:28,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:28,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:28,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:28,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:28,490 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:28,548 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:28,549 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:28,549 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:28,559 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:28,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:28,593 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:28,606 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:28,627 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:28,627 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-28 22:41:28,627 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:41:28,628 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:41:28,628 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:41:28,628 INFO L87 Difference]: Start difference. First operand 173 states and 180 transitions. Second operand 8 states. [2018-01-28 22:41:28,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:28,690 INFO L93 Difference]: Finished difference Result 314 states and 328 transitions. [2018-01-28 22:41:28,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:41:28,691 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-28 22:41:28,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:28,692 INFO L225 Difference]: With dead ends: 314 [2018-01-28 22:41:28,692 INFO L226 Difference]: Without dead ends: 180 [2018-01-28 22:41:28,692 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:41:28,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-28 22:41:28,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 177. [2018-01-28 22:41:28,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-28 22:41:28,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 184 transitions. [2018-01-28 22:41:28,703 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 184 transitions. Word has length 56 [2018-01-28 22:41:28,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:28,703 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 184 transitions. [2018-01-28 22:41:28,703 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:41:28,703 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 184 transitions. [2018-01-28 22:41:28,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:41:28,704 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:28,704 INFO L330 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:28,704 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:28,704 INFO L82 PathProgramCache]: Analyzing trace with hash 644877155, now seen corresponding path program 2 times [2018-01-28 22:41:28,704 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:28,704 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:28,705 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:28,705 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:28,705 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:28,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:28,720 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:28,855 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:28,855 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:28,855 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:28,872 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:28,895 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:28,899 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:28,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:28,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:41:28,923 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:28,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:41:28,995 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:29,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:41:29,017 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:41:29,574 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-28 22:41:29,595 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:41:29,595 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-28 22:41:29,595 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:41:29,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:41:29,596 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:41:29,596 INFO L87 Difference]: Start difference. First operand 177 states and 184 transitions. Second operand 22 states. [2018-01-28 22:41:31,795 WARN L143 SmtUtils]: Spent 2032ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-28 22:41:33,854 WARN L143 SmtUtils]: Spent 2018ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-28 22:41:36,129 WARN L143 SmtUtils]: Spent 2029ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-28 22:41:36,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:36,796 INFO L93 Difference]: Finished difference Result 316 states and 332 transitions. [2018-01-28 22:41:36,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:41:36,796 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-28 22:41:36,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:36,797 INFO L225 Difference]: With dead ends: 316 [2018-01-28 22:41:36,797 INFO L226 Difference]: Without dead ends: 182 [2018-01-28 22:41:36,798 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 7.0s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 22:41:36,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-28 22:41:36,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 179. [2018-01-28 22:41:36,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-28 22:41:36,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 186 transitions. [2018-01-28 22:41:36,812 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 186 transitions. Word has length 60 [2018-01-28 22:41:36,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:36,812 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 186 transitions. [2018-01-28 22:41:36,813 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:41:36,813 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 186 transitions. [2018-01-28 22:41:36,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-28 22:41:36,813 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:36,813 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:36,813 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:36,814 INFO L82 PathProgramCache]: Analyzing trace with hash 1076592855, now seen corresponding path program 1 times [2018-01-28 22:41:36,814 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:36,814 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:36,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:36,815 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:36,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:36,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:36,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:36,904 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:41:36,904 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:36,905 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:41:36,905 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:41:36,905 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:41:36,905 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:41:36,905 INFO L87 Difference]: Start difference. First operand 179 states and 186 transitions. Second operand 8 states. [2018-01-28 22:41:36,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:36,953 INFO L93 Difference]: Finished difference Result 289 states and 300 transitions. [2018-01-28 22:41:36,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:41:36,953 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 70 [2018-01-28 22:41:36,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:36,954 INFO L225 Difference]: With dead ends: 289 [2018-01-28 22:41:36,954 INFO L226 Difference]: Without dead ends: 179 [2018-01-28 22:41:36,955 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:41:36,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-28 22:41:36,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2018-01-28 22:41:36,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-28 22:41:36,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 185 transitions. [2018-01-28 22:41:36,973 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 185 transitions. Word has length 70 [2018-01-28 22:41:36,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:36,974 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 185 transitions. [2018-01-28 22:41:36,974 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:41:36,974 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 185 transitions. [2018-01-28 22:41:36,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-28 22:41:36,975 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:36,975 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:36,975 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:36,975 INFO L82 PathProgramCache]: Analyzing trace with hash 1113543445, now seen corresponding path program 1 times [2018-01-28 22:41:36,975 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:36,976 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:36,976 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:36,977 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:36,977 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:36,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:36,992 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:37,104 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:41:37,104 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:37,105 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-28 22:41:37,105 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:41:37,105 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:41:37,105 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:41:37,105 INFO L87 Difference]: Start difference. First operand 179 states and 185 transitions. Second operand 10 states. [2018-01-28 22:41:37,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:37,198 INFO L93 Difference]: Finished difference Result 291 states and 301 transitions. [2018-01-28 22:41:37,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:41:37,198 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-01-28 22:41:37,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:37,200 INFO L225 Difference]: With dead ends: 291 [2018-01-28 22:41:37,200 INFO L226 Difference]: Without dead ends: 179 [2018-01-28 22:41:37,201 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:41:37,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-28 22:41:37,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2018-01-28 22:41:37,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-28 22:41:37,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 184 transitions. [2018-01-28 22:41:37,218 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 184 transitions. Word has length 75 [2018-01-28 22:41:37,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:37,218 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 184 transitions. [2018-01-28 22:41:37,218 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:41:37,218 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 184 transitions. [2018-01-28 22:41:37,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-28 22:41:37,219 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:37,219 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:37,219 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:37,220 INFO L82 PathProgramCache]: Analyzing trace with hash 603467016, now seen corresponding path program 1 times [2018-01-28 22:41:37,220 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:37,220 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:37,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,221 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:37,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:37,240 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:37,424 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:41:37,425 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:37,425 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-28 22:41:37,425 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:41:37,425 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:41:37,425 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:41:37,425 INFO L87 Difference]: Start difference. First operand 179 states and 184 transitions. Second operand 15 states. [2018-01-28 22:41:37,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:37,832 INFO L93 Difference]: Finished difference Result 179 states and 184 transitions. [2018-01-28 22:41:37,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:41:37,833 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 86 [2018-01-28 22:41:37,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:37,834 INFO L225 Difference]: With dead ends: 179 [2018-01-28 22:41:37,834 INFO L226 Difference]: Without dead ends: 177 [2018-01-28 22:41:37,834 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:41:37,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-28 22:41:37,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-01-28 22:41:37,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-28 22:41:37,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 182 transitions. [2018-01-28 22:41:37,847 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 182 transitions. Word has length 86 [2018-01-28 22:41:37,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:37,847 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 182 transitions. [2018-01-28 22:41:37,848 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:41:37,848 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 182 transitions. [2018-01-28 22:41:37,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-28 22:41:37,848 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:37,849 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:37,849 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:37,849 INFO L82 PathProgramCache]: Analyzing trace with hash 603467017, now seen corresponding path program 1 times [2018-01-28 22:41:37,849 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:37,849 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:37,850 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,850 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:37,850 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:37,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:37,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:37,955 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:37,955 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:37,955 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:37,964 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:38,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:38,005 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:38,033 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:38,055 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:38,055 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-28 22:41:38,055 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:41:38,056 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:41:38,056 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:41:38,056 INFO L87 Difference]: Start difference. First operand 177 states and 182 transitions. Second operand 10 states. [2018-01-28 22:41:38,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:38,162 INFO L93 Difference]: Finished difference Result 314 states and 324 transitions. [2018-01-28 22:41:38,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:41:38,163 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-01-28 22:41:38,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:38,164 INFO L225 Difference]: With dead ends: 314 [2018-01-28 22:41:38,164 INFO L226 Difference]: Without dead ends: 184 [2018-01-28 22:41:38,165 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:41:38,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-28 22:41:38,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 181. [2018-01-28 22:41:38,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-01-28 22:41:38,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 186 transitions. [2018-01-28 22:41:38,185 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 186 transitions. Word has length 86 [2018-01-28 22:41:38,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:38,185 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 186 transitions. [2018-01-28 22:41:38,186 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:41:38,186 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 186 transitions. [2018-01-28 22:41:38,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-28 22:41:38,186 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:38,187 INFO L330 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:38,187 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:38,188 INFO L82 PathProgramCache]: Analyzing trace with hash -11050485, now seen corresponding path program 2 times [2018-01-28 22:41:38,188 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:38,189 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:38,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:38,190 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:38,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:38,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:38,211 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:38,351 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:38,351 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:38,351 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:38,359 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:38,402 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:38,408 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:38,414 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:38,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:41:38,420 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:38,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:41:38,443 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:38,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:41:38,472 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:41:39,553 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-28 22:41:39,586 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:41:39,586 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27 [2018-01-28 22:41:39,586 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-28 22:41:39,587 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-28 22:41:39,587 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-28 22:41:39,587 INFO L87 Difference]: Start difference. First operand 181 states and 186 transitions. Second operand 27 states. [2018-01-28 22:41:41,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:41,115 INFO L93 Difference]: Finished difference Result 316 states and 328 transitions. [2018-01-28 22:41:41,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-28 22:41:41,116 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 90 [2018-01-28 22:41:41,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:41,117 INFO L225 Difference]: With dead ends: 316 [2018-01-28 22:41:41,117 INFO L226 Difference]: Without dead ends: 186 [2018-01-28 22:41:41,117 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 356 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=224, Invalid=1498, Unknown=0, NotChecked=0, Total=1722 [2018-01-28 22:41:41,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-28 22:41:41,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 183. [2018-01-28 22:41:41,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-28 22:41:41,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 188 transitions. [2018-01-28 22:41:41,132 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 188 transitions. Word has length 90 [2018-01-28 22:41:41,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:41,133 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 188 transitions. [2018-01-28 22:41:41,133 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-28 22:41:41,133 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 188 transitions. [2018-01-28 22:41:41,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-01-28 22:41:41,134 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:41,135 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:41,135 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:41,135 INFO L82 PathProgramCache]: Analyzing trace with hash -997535317, now seen corresponding path program 1 times [2018-01-28 22:41:41,135 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:41,135 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:41,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:41,136 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:41,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:41,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:41,156 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:41,276 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2018-01-28 22:41:41,276 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:41,276 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:41:41,276 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 22:41:41,277 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 22:41:41,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:41:41,277 INFO L87 Difference]: Start difference. First operand 183 states and 188 transitions. Second operand 11 states. [2018-01-28 22:41:41,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:41,395 INFO L93 Difference]: Finished difference Result 261 states and 269 transitions. [2018-01-28 22:41:41,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:41:41,395 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 104 [2018-01-28 22:41:41,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:41,396 INFO L225 Difference]: With dead ends: 261 [2018-01-28 22:41:41,396 INFO L226 Difference]: Without dead ends: 183 [2018-01-28 22:41:41,397 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:41:41,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-28 22:41:41,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-01-28 22:41:41,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-28 22:41:41,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 187 transitions. [2018-01-28 22:41:41,410 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 187 transitions. Word has length 104 [2018-01-28 22:41:41,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:41,410 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 187 transitions. [2018-01-28 22:41:41,410 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 22:41:41,410 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 187 transitions. [2018-01-28 22:41:41,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-28 22:41:41,411 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:41,411 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:41,411 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:41,411 INFO L82 PathProgramCache]: Analyzing trace with hash -1728656908, now seen corresponding path program 1 times [2018-01-28 22:41:41,411 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:41,412 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:41,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:41,413 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:41,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:41,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:41,431 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:41,743 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-01-28 22:41:41,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:41,744 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:41,750 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:41,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:41,795 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:41,890 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-28 22:41:41,911 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:41,912 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-01-28 22:41:41,912 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:41:41,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:41:41,913 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:41:41,913 INFO L87 Difference]: Start difference. First operand 183 states and 187 transitions. Second operand 20 states. [2018-01-28 22:41:42,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:42,175 INFO L93 Difference]: Finished difference Result 320 states and 329 transitions. [2018-01-28 22:41:42,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-28 22:41:42,176 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 122 [2018-01-28 22:41:42,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:42,177 INFO L225 Difference]: With dead ends: 320 [2018-01-28 22:41:42,177 INFO L226 Difference]: Without dead ends: 190 [2018-01-28 22:41:42,178 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2018-01-28 22:41:42,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-28 22:41:42,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 187. [2018-01-28 22:41:42,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-01-28 22:41:42,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 190 transitions. [2018-01-28 22:41:42,197 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 190 transitions. Word has length 122 [2018-01-28 22:41:42,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:42,198 INFO L432 AbstractCegarLoop]: Abstraction has 187 states and 190 transitions. [2018-01-28 22:41:42,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:41:42,198 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 190 transitions. [2018-01-28 22:41:42,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 22:41:42,199 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:42,199 INFO L330 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:42,199 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:42,199 INFO L82 PathProgramCache]: Analyzing trace with hash -973611882, now seen corresponding path program 1 times [2018-01-28 22:41:42,199 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:42,199 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:42,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:42,200 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:42,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:42,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:42,226 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:42,372 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:42,373 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:42,373 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:42,378 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:42,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:42,433 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:42,474 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:42,509 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:42,510 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-01-28 22:41:42,510 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 22:41:42,510 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 22:41:42,510 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:41:42,511 INFO L87 Difference]: Start difference. First operand 187 states and 190 transitions. Second operand 13 states. [2018-01-28 22:41:42,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:42,615 INFO L93 Difference]: Finished difference Result 322 states and 328 transitions. [2018-01-28 22:41:42,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 22:41:42,617 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 128 [2018-01-28 22:41:42,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:42,619 INFO L225 Difference]: With dead ends: 322 [2018-01-28 22:41:42,619 INFO L226 Difference]: Without dead ends: 194 [2018-01-28 22:41:42,620 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:41:42,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-28 22:41:42,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2018-01-28 22:41:42,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-28 22:41:42,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 194 transitions. [2018-01-28 22:41:42,641 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 194 transitions. Word has length 128 [2018-01-28 22:41:42,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:42,642 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 194 transitions. [2018-01-28 22:41:42,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 22:41:42,642 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 194 transitions. [2018-01-28 22:41:42,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-28 22:41:42,643 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:42,643 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:42,643 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:42,644 INFO L82 PathProgramCache]: Analyzing trace with hash 1359458072, now seen corresponding path program 2 times [2018-01-28 22:41:42,644 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:42,644 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:42,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:42,645 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:42,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:42,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:42,672 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:42,913 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:42,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:42,913 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:42,921 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:43,003 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:43,012 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:43,019 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:43,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:41:43,026 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:43,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:41:43,045 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:43,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:41:43,062 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:41:44,240 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-28 22:41:44,274 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:41:44,274 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [13] total 32 [2018-01-28 22:41:44,275 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-28 22:41:44,275 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-28 22:41:44,275 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=855, Unknown=0, NotChecked=0, Total=992 [2018-01-28 22:41:44,275 INFO L87 Difference]: Start difference. First operand 191 states and 194 transitions. Second operand 32 states. [2018-01-28 22:41:46,454 WARN L143 SmtUtils]: Spent 2030ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-28 22:41:48,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:48,034 INFO L93 Difference]: Finished difference Result 324 states and 332 transitions. [2018-01-28 22:41:48,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-28 22:41:48,034 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 132 [2018-01-28 22:41:48,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:48,035 INFO L225 Difference]: With dead ends: 324 [2018-01-28 22:41:48,035 INFO L226 Difference]: Without dead ends: 196 [2018-01-28 22:41:48,036 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 111 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=331, Invalid=2219, Unknown=0, NotChecked=0, Total=2550 [2018-01-28 22:41:48,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-01-28 22:41:48,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 193. [2018-01-28 22:41:48,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-01-28 22:41:48,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 196 transitions. [2018-01-28 22:41:48,052 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 196 transitions. Word has length 132 [2018-01-28 22:41:48,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:48,053 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 196 transitions. [2018-01-28 22:41:48,053 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-28 22:41:48,053 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 196 transitions. [2018-01-28 22:41:48,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-01-28 22:41:48,054 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:48,054 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:48,054 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:48,054 INFO L82 PathProgramCache]: Analyzing trace with hash 1392930969, now seen corresponding path program 1 times [2018-01-28 22:41:48,054 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:48,054 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:48,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:48,055 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:41:48,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:48,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:48,078 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:48,341 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-28 22:41:48,341 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:48,341 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-28 22:41:48,342 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 22:41:48,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 22:41:48,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:41:48,342 INFO L87 Difference]: Start difference. First operand 193 states and 196 transitions. Second operand 18 states. [2018-01-28 22:41:48,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:48,732 INFO L93 Difference]: Finished difference Result 228 states and 236 transitions. [2018-01-28 22:41:48,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-28 22:41:48,732 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 136 [2018-01-28 22:41:48,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:48,734 INFO L225 Difference]: With dead ends: 228 [2018-01-28 22:41:48,735 INFO L226 Difference]: Without dead ends: 226 [2018-01-28 22:41:48,735 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-01-28 22:41:48,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-01-28 22:41:48,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 224. [2018-01-28 22:41:48,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-01-28 22:41:48,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 230 transitions. [2018-01-28 22:41:48,763 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 230 transitions. Word has length 136 [2018-01-28 22:41:48,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:48,764 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 230 transitions. [2018-01-28 22:41:48,764 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 22:41:48,764 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 230 transitions. [2018-01-28 22:41:48,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-28 22:41:48,766 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:48,766 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:48,766 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:48,766 INFO L82 PathProgramCache]: Analyzing trace with hash 1805222194, now seen corresponding path program 1 times [2018-01-28 22:41:48,766 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:48,766 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:48,767 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:48,767 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:48,768 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:48,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:48,792 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:49,237 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-28 22:41:49,237 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:41:49,237 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-01-28 22:41:49,237 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-28 22:41:49,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-28 22:41:49,238 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=463, Unknown=0, NotChecked=0, Total=506 [2018-01-28 22:41:49,238 INFO L87 Difference]: Start difference. First operand 224 states and 230 transitions. Second operand 23 states. [2018-01-28 22:41:49,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:49,722 INFO L93 Difference]: Finished difference Result 240 states and 250 transitions. [2018-01-28 22:41:49,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-28 22:41:49,722 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 155 [2018-01-28 22:41:49,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:49,723 INFO L225 Difference]: With dead ends: 240 [2018-01-28 22:41:49,723 INFO L226 Difference]: Without dead ends: 238 [2018-01-28 22:41:49,724 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=93, Invalid=1029, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 22:41:49,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2018-01-28 22:41:49,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 233. [2018-01-28 22:41:49,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-01-28 22:41:49,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 243 transitions. [2018-01-28 22:41:49,755 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 243 transitions. Word has length 155 [2018-01-28 22:41:49,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:49,756 INFO L432 AbstractCegarLoop]: Abstraction has 233 states and 243 transitions. [2018-01-28 22:41:49,756 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-28 22:41:49,756 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 243 transitions. [2018-01-28 22:41:49,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-28 22:41:49,757 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:49,757 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:49,757 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:49,757 INFO L82 PathProgramCache]: Analyzing trace with hash 1805222195, now seen corresponding path program 1 times [2018-01-28 22:41:49,758 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:49,758 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:49,759 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:49,759 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:49,759 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:49,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:49,786 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:50,063 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:50,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:50,063 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:50,072 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:50,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:50,158 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:50,187 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:50,208 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:41:50,208 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-01-28 22:41:50,209 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:41:50,209 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:41:50,209 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:41:50,209 INFO L87 Difference]: Start difference. First operand 233 states and 243 transitions. Second operand 15 states. [2018-01-28 22:41:50,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:41:50,295 INFO L93 Difference]: Finished difference Result 406 states and 426 transitions. [2018-01-28 22:41:50,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 22:41:50,296 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 155 [2018-01-28 22:41:50,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:41:50,297 INFO L225 Difference]: With dead ends: 406 [2018-01-28 22:41:50,297 INFO L226 Difference]: Without dead ends: 240 [2018-01-28 22:41:50,298 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:41:50,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-01-28 22:41:50,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 237. [2018-01-28 22:41:50,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-01-28 22:41:50,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 247 transitions. [2018-01-28 22:41:50,336 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 247 transitions. Word has length 155 [2018-01-28 22:41:50,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:41:50,336 INFO L432 AbstractCegarLoop]: Abstraction has 237 states and 247 transitions. [2018-01-28 22:41:50,336 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:41:50,336 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 247 transitions. [2018-01-28 22:41:50,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-01-28 22:41:50,338 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:41:50,338 INFO L330 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:41:50,338 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:41:50,338 INFO L82 PathProgramCache]: Analyzing trace with hash 828124529, now seen corresponding path program 2 times [2018-01-28 22:41:50,338 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:41:50,339 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:41:50,339 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:50,340 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:41:50,340 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:41:50,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:41:50,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:41:50,608 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:41:50,608 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:41:50,609 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:41:50,614 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:41:50,660 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:41:50,666 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:41:50,673 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:41:50,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:41:50,686 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:50,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:41:50,700 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:41:50,712 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:41:50,712 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:41:52,105 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-01-28 22:41:52,125 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:41:52,125 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [15] total 40 [2018-01-28 22:41:52,126 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-28 22:41:52,126 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-28 22:41:52,127 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=1374, Unknown=0, NotChecked=0, Total=1560 [2018-01-28 22:41:52,127 INFO L87 Difference]: Start difference. First operand 237 states and 247 transitions. Second operand 40 states. [2018-01-28 22:41:56,309 WARN L143 SmtUtils]: Spent 4038ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-28 22:41:58,934 WARN L143 SmtUtils]: Spent 2025ms on a formula simplification that was a NOOP. DAG size: 36 [2018-01-28 22:42:00,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:42:00,484 INFO L93 Difference]: Finished difference Result 408 states and 430 transitions. [2018-01-28 22:42:00,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-28 22:42:00,485 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 159 [2018-01-28 22:42:00,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:42:00,486 INFO L225 Difference]: With dead ends: 408 [2018-01-28 22:42:00,486 INFO L226 Difference]: Without dead ends: 242 [2018-01-28 22:42:00,487 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 130 SyntacticMatches, 5 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 996 ImplicationChecksByTransitivity, 8.3s TimeCoverageRelationStatistics Valid=462, Invalid=3698, Unknown=0, NotChecked=0, Total=4160 [2018-01-28 22:42:00,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-01-28 22:42:00,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 239. [2018-01-28 22:42:00,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-01-28 22:42:00,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 248 transitions. [2018-01-28 22:42:00,511 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 248 transitions. Word has length 159 [2018-01-28 22:42:00,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:42:00,511 INFO L432 AbstractCegarLoop]: Abstraction has 239 states and 248 transitions. [2018-01-28 22:42:00,511 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-28 22:42:00,512 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 248 transitions. [2018-01-28 22:42:00,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-01-28 22:42:00,512 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:42:00,512 INFO L330 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:42:00,512 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:42:00,513 INFO L82 PathProgramCache]: Analyzing trace with hash -310688389, now seen corresponding path program 1 times [2018-01-28 22:42:00,513 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:42:00,513 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:42:00,513 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:00,514 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:42:00,514 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:00,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:00,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:42:00,729 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:42:00,730 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:42:00,730 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:42:00,735 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:42:00,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:00,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:42:00,814 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:42:00,835 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:42:00,835 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-01-28 22:42:00,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 22:42:00,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 22:42:00,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:42:00,837 INFO L87 Difference]: Start difference. First operand 239 states and 248 transitions. Second operand 17 states. [2018-01-28 22:42:00,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:42:00,953 INFO L93 Difference]: Finished difference Result 410 states and 428 transitions. [2018-01-28 22:42:00,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-28 22:42:00,954 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 168 [2018-01-28 22:42:00,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:42:00,956 INFO L225 Difference]: With dead ends: 410 [2018-01-28 22:42:00,956 INFO L226 Difference]: Without dead ends: 246 [2018-01-28 22:42:00,957 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 168 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:42:00,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-01-28 22:42:00,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 243. [2018-01-28 22:42:00,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2018-01-28 22:42:00,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 252 transitions. [2018-01-28 22:42:00,996 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 252 transitions. Word has length 168 [2018-01-28 22:42:00,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:42:00,997 INFO L432 AbstractCegarLoop]: Abstraction has 243 states and 252 transitions. [2018-01-28 22:42:00,997 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 22:42:00,997 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 252 transitions. [2018-01-28 22:42:00,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-01-28 22:42:00,998 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:42:00,998 INFO L330 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:42:00,998 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:42:00,999 INFO L82 PathProgramCache]: Analyzing trace with hash -903418371, now seen corresponding path program 2 times [2018-01-28 22:42:00,999 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:42:00,999 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:42:01,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:01,000 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:42:01,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:01,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:01,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:42:01,458 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:42:01,458 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:42:01,458 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:42:01,465 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:42:01,533 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:42:01,545 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:42:01,556 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:42:01,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:42:01,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:42:01,747 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:01,749 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:01,751 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:01,752 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-28 22:42:01,877 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:01,879 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:01,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:01,883 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-28 22:42:01,886 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-28 22:42:01,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-28 22:42:01,894 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-28 22:42:01,903 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,904 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:01,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-28 22:42:01,908 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:01,914 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:01,917 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:01,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:01,921 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-28 22:42:02,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-28 22:42:02,320 INFO L682 Elim1Store]: detected equality via solver [2018-01-28 22:42:02,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:02,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-28 22:42:02,322 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:02,324 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:02,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:02,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-28 22:42:02,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-28 22:42:02,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-28 22:42:02,866 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:02,867 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:02,868 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:02,868 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-28 22:42:02,942 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-01-28 22:42:02,962 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:42:02,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [46] imperfect sequences [17] total 61 [2018-01-28 22:42:02,963 INFO L409 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-01-28 22:42:02,963 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-01-28 22:42:02,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=3313, Unknown=1, NotChecked=116, Total=3660 [2018-01-28 22:42:02,964 INFO L87 Difference]: Start difference. First operand 243 states and 252 transitions. Second operand 61 states. [2018-01-28 22:42:05,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:42:05,754 INFO L93 Difference]: Finished difference Result 404 states and 420 transitions. [2018-01-28 22:42:05,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-01-28 22:42:05,755 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 172 [2018-01-28 22:42:05,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:42:05,756 INFO L225 Difference]: With dead ends: 404 [2018-01-28 22:42:05,756 INFO L226 Difference]: Without dead ends: 240 [2018-01-28 22:42:05,757 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 129 SyntacticMatches, 0 SemanticMatches, 87 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=387, Invalid=7272, Unknown=1, NotChecked=172, Total=7832 [2018-01-28 22:42:05,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-01-28 22:42:05,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 237. [2018-01-28 22:42:05,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-01-28 22:42:05,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 240 transitions. [2018-01-28 22:42:05,802 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 240 transitions. Word has length 172 [2018-01-28 22:42:05,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:42:05,802 INFO L432 AbstractCegarLoop]: Abstraction has 237 states and 240 transitions. [2018-01-28 22:42:05,802 INFO L433 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-01-28 22:42:05,802 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 240 transitions. [2018-01-28 22:42:05,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-01-28 22:42:05,803 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:42:05,804 INFO L330 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:42:05,804 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:42:05,804 INFO L82 PathProgramCache]: Analyzing trace with hash 306840936, now seen corresponding path program 1 times [2018-01-28 22:42:05,804 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:42:05,804 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:42:05,805 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:05,805 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:42:05,805 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:05,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:05,833 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:42:06,245 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-01-28 22:42:06,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:42:06,246 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:42:06,252 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:42:06,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:06,352 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:42:06,685 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-28 22:42:06,706 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:42:06,706 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 35 [2018-01-28 22:42:06,706 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-28 22:42:06,707 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-28 22:42:06,707 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1016, Unknown=0, NotChecked=0, Total=1190 [2018-01-28 22:42:06,707 INFO L87 Difference]: Start difference. First operand 237 states and 240 transitions. Second operand 35 states. [2018-01-28 22:42:07,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:42:07,818 INFO L93 Difference]: Finished difference Result 410 states and 417 transitions. [2018-01-28 22:42:07,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-28 22:42:07,819 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 189 [2018-01-28 22:42:07,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:42:07,820 INFO L225 Difference]: With dead ends: 410 [2018-01-28 22:42:07,820 INFO L226 Difference]: Without dead ends: 256 [2018-01-28 22:42:07,822 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 178 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=521, Invalid=3639, Unknown=0, NotChecked=0, Total=4160 [2018-01-28 22:42:07,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-01-28 22:42:07,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 251. [2018-01-28 22:42:07,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-01-28 22:42:07,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 254 transitions. [2018-01-28 22:42:07,862 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 254 transitions. Word has length 189 [2018-01-28 22:42:07,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:42:07,863 INFO L432 AbstractCegarLoop]: Abstraction has 251 states and 254 transitions. [2018-01-28 22:42:07,863 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-28 22:42:07,863 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 254 transitions. [2018-01-28 22:42:07,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-01-28 22:42:07,864 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:42:07,864 INFO L330 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:42:07,864 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:42:07,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1585136261, now seen corresponding path program 1 times [2018-01-28 22:42:07,864 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:42:07,864 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:42:07,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:07,865 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:42:07,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:07,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:07,895 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:42:08,502 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 446 trivial. 0 not checked. [2018-01-28 22:42:08,502 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:42:08,502 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:42:08,507 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:42:08,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:08,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:42:09,010 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-01-28 22:42:09,042 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:42:09,043 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 19] total 41 [2018-01-28 22:42:09,043 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-28 22:42:09,043 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-28 22:42:09,044 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=1441, Unknown=0, NotChecked=0, Total=1640 [2018-01-28 22:42:09,044 INFO L87 Difference]: Start difference. First operand 251 states and 254 transitions. Second operand 41 states. [2018-01-28 22:42:10,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:42:10,607 INFO L93 Difference]: Finished difference Result 423 states and 430 transitions. [2018-01-28 22:42:10,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-28 22:42:10,607 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 212 [2018-01-28 22:42:10,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:42:10,608 INFO L225 Difference]: With dead ends: 423 [2018-01-28 22:42:10,608 INFO L226 Difference]: Without dead ends: 259 [2018-01-28 22:42:10,610 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 276 GetRequests, 200 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 666 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=617, Invalid=5389, Unknown=0, NotChecked=0, Total=6006 [2018-01-28 22:42:10,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-01-28 22:42:10,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 254. [2018-01-28 22:42:10,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-01-28 22:42:10,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 257 transitions. [2018-01-28 22:42:10,653 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 257 transitions. Word has length 212 [2018-01-28 22:42:10,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:42:10,653 INFO L432 AbstractCegarLoop]: Abstraction has 254 states and 257 transitions. [2018-01-28 22:42:10,653 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-28 22:42:10,653 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 257 transitions. [2018-01-28 22:42:10,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-01-28 22:42:10,655 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:42:10,655 INFO L330 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:42:10,655 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:42:10,655 INFO L82 PathProgramCache]: Analyzing trace with hash -1494315070, now seen corresponding path program 1 times [2018-01-28 22:42:10,656 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:42:10,656 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:42:10,656 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:10,657 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:42:10,657 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:42:10,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:10,786 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:42:13,552 WARN L146 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 46 DAG size of output 18 [2018-01-28 22:42:13,744 WARN L146 SmtUtils]: Spent 146ms on a formula simplification. DAG size of input: 52 DAG size of output 24 [2018-01-28 22:42:13,952 WARN L146 SmtUtils]: Spent 137ms on a formula simplification. DAG size of input: 48 DAG size of output 25 [2018-01-28 22:42:18,196 INFO L134 CoverageAnalysis]: Checked inductivity of 519 backedges. 46 proven. 468 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-01-28 22:42:18,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:42:18,196 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:42:18,201 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:42:18,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:42:18,279 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:42:18,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-01-28 22:42:18,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-01-28 22:42:18,432 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,433 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,438 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-01-28 22:42:18,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-01-28 22:42:18,581 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:18,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-01-28 22:42:18,582 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,592 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-01-28 22:42:18,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-01-28 22:42:18,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:18,773 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:18,773 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:18,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-01-28 22:42:18,774 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,782 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:18,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:18,791 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:47, output treesize:43 [2018-01-28 22:42:19,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-28 22:42:19,013 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,014 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,015 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,016 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,016 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-01-28 22:42:19,018 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:19,031 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:19,042 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:19,043 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:63, output treesize:59 [2018-01-28 22:42:19,548 WARN L143 SmtUtils]: Spent 394ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-28 22:42:19,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-01-28 22:42:19,752 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,753 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,754 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,756 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,757 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,758 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,759 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,760 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,761 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,762 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:19,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-01-28 22:42:19,763 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:19,784 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:19,799 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:19,799 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:79, output treesize:75 [2018-01-28 22:42:20,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-28 22:42:20,096 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,097 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,098 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,099 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,102 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,103 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,104 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,105 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,106 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,107 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,109 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,110 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,111 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:20,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-01-28 22:42:20,114 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:20,150 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:20,172 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:20,173 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:95, output treesize:91 [2018-01-28 22:42:20,954 WARN L143 SmtUtils]: Spent 603ms on a formula simplification that was a NOOP. DAG size: 44 [2018-01-28 22:42:21,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-01-28 22:42:21,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,181 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:21,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-01-28 22:42:21,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:21,418 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:21,443 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:21,444 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:111, output treesize:107 [2018-01-28 22:42:22,148 WARN L143 SmtUtils]: Spent 457ms on a formula simplification that was a NOOP. DAG size: 50 [2018-01-28 22:42:22,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-01-28 22:42:22,968 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,970 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,971 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,975 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,977 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,980 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,983 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,984 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,986 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,987 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,988 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,988 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,989 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,990 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,991 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,991 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:22,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-01-28 22:42:22,994 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:23,056 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:23,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:23,085 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:127, output treesize:123 [2018-01-28 22:42:24,742 WARN L143 SmtUtils]: Spent 1001ms on a formula simplification that was a NOOP. DAG size: 56 [2018-01-28 22:42:33,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-01-28 22:42:33,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,791 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,792 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,794 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,807 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,809 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,810 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,811 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,815 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,816 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:42:33,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-01-28 22:42:33,819 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:42:33,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:42:33,941 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-01-28 22:42:33,941 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:143, output treesize:139 [2018-01-28 22:42:41,932 WARN L143 SmtUtils]: Spent 650ms on a formula simplification that was a NOOP. DAG size: 62 [2018-01-28 22:43:03,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-01-28 22:43:03,617 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,619 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,621 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,623 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,624 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,626 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,628 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,630 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,631 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,633 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,635 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,637 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,639 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,640 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,642 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,643 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,644 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,646 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,647 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,648 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,650 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,651 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,653 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,654 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,655 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,656 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,657 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,659 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,660 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,661 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,662 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,663 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,664 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,665 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,666 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,667 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,668 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,669 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,670 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,671 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,672 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,673 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,674 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,675 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,676 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:43:03,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-01-28 22:43:03,679 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:43:03,795 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:43:03,831 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 1 xjuncts. [2018-01-28 22:43:03,831 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:159, output treesize:155 Received shutdown request... [2018-01-28 22:43:22,371 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-28 22:43:22,371 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-28 22:43:22,376 WARN L185 ceAbstractionStarter]: Timeout [2018-01-28 22:43:22,376 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 10:43:22 BoogieIcfgContainer [2018-01-28 22:43:22,376 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 22:43:22,377 INFO L168 Benchmark]: Toolchain (without parser) took 127053.29 ms. Allocated memory was 304.1 MB in the beginning and 1.2 GB in the end (delta: 906.0 MB). Free memory was 263.1 MB in the beginning and 885.3 MB in the end (delta: -622.1 MB). Peak memory consumption was 283.8 MB. Max. memory is 5.3 GB. [2018-01-28 22:43:22,378 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 304.1 MB. Free memory is still 270.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 22:43:22,378 INFO L168 Benchmark]: CACSL2BoogieTranslator took 239.04 ms. Allocated memory is still 304.1 MB. Free memory was 263.1 MB in the beginning and 249.1 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:43:22,378 INFO L168 Benchmark]: Boogie Preprocessor took 44.87 ms. Allocated memory is still 304.1 MB. Free memory was 249.1 MB in the beginning and 247.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:43:22,378 INFO L168 Benchmark]: RCFGBuilder took 515.42 ms. Allocated memory is still 304.1 MB. Free memory was 247.1 MB in the beginning and 208.5 MB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 5.3 GB. [2018-01-28 22:43:22,379 INFO L168 Benchmark]: TraceAbstraction took 126244.01 ms. Allocated memory was 304.1 MB in the beginning and 1.2 GB in the end (delta: 906.0 MB). Free memory was 208.5 MB in the beginning and 885.3 MB in the end (delta: -676.7 MB). Peak memory consumption was 229.2 MB. Max. memory is 5.3 GB. [2018-01-28 22:43:22,381 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 304.1 MB. Free memory is still 270.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 239.04 ms. Allocated memory is still 304.1 MB. Free memory was 263.1 MB in the beginning and 249.1 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 44.87 ms. Allocated memory is still 304.1 MB. Free memory was 249.1 MB in the beginning and 247.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 515.42 ms. Allocated memory is still 304.1 MB. Free memory was 247.1 MB in the beginning and 208.5 MB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 126244.01 ms. Allocated memory was 304.1 MB in the beginning and 1.2 GB in the end (delta: 906.0 MB). Free memory was 208.5 MB in the beginning and 885.3 MB in the end (delta: -676.7 MB). Peak memory consumption was 229.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 97 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 176 locations, 23 error locations. TIMEOUT Result, 126.1s OverallTime, 32 OverallIterations, 16 TraceHistogramMax, 38.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4763 SDtfs, 2385 SDslu, 41693 SDs, 0 SdLazy, 18428 SolverSat, 419 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 11.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2400 GetRequests, 1686 SyntacticMatches, 11 SemanticMatches, 703 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 5086 ImplicationChecksByTransitivity, 33.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=254occurred in iteration=31, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 31 MinimizatonAttempts, 173 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 1.0s SatisfiabilityAnalysisTime, 13.4s InterpolantComputationTime, 4655 NumberOfCodeBlocks, 4475 NumberOfCodeBlocksAsserted, 46 NumberOfCheckSat, 4609 ConstructedInterpolants, 410 QuantifiedInterpolants, 2646401 SizeOfPredicates, 134 NumberOfNonLiveVariables, 5857 ConjunctsInSsa, 565 ConjunctsInUnsatCore, 46 InterpolantComputations, 22 PerfectInterpolantSequences, 2418/5450 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-28_22-43-22-388.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_22-43-22-388.csv Completed graceful shutdown