java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 22:32:34,073 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 22:32:34,075 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 22:32:34,090 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 22:32:34,090 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 22:32:34,091 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 22:32:34,092 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 22:32:34,093 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 22:32:34,094 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 22:32:34,095 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 22:32:34,096 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 22:32:34,096 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 22:32:34,096 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 22:32:34,097 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 22:32:34,098 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 22:32:34,101 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 22:32:34,103 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 22:32:34,105 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 22:32:34,106 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 22:32:34,107 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 22:32:34,109 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-28 22:32:34,110 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-28 22:32:34,110 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-28 22:32:34,111 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-28 22:32:34,112 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-28 22:32:34,113 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-28 22:32:34,113 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-28 22:32:34,114 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-28 22:32:34,114 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-28 22:32:34,114 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 22:32:34,115 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 22:32:34,115 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 22:32:34,125 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 22:32:34,125 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 22:32:34,126 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 22:32:34,126 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 22:32:34,127 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 22:32:34,127 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 22:32:34,127 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 22:32:34,128 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 22:32:34,128 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 22:32:34,128 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 22:32:34,128 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 22:32:34,128 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 22:32:34,128 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 22:32:34,129 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 22:32:34,129 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 22:32:34,129 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 22:32:34,129 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 22:32:34,129 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 22:32:34,130 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 22:32:34,130 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 22:32:34,130 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 22:32:34,130 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 22:32:34,130 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 22:32:34,131 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:32:34,131 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 22:32:34,131 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 22:32:34,131 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 22:32:34,131 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 22:32:34,132 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 22:32:34,132 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 22:32:34,132 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 22:32:34,132 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 22:32:34,133 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 22:32:34,133 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 22:32:34,167 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 22:32:34,180 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 22:32:34,184 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 22:32:34,186 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 22:32:34,186 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 22:32:34,187 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-28 22:32:34,389 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 22:32:34,395 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 22:32:34,396 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 22:32:34,396 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 22:32:34,402 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 22:32:34,403 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,405 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6896244f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34, skipping insertion in model container [2018-01-28 22:32:34,405 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,418 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:32:34,467 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:32:34,589 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:32:34,615 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:32:34,628 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34 WrapperNode [2018-01-28 22:32:34,629 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 22:32:34,630 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 22:32:34,630 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 22:32:34,630 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 22:32:34,643 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,643 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,657 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,657 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,665 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,668 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,669 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... [2018-01-28 22:32:34,673 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 22:32:34,674 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 22:32:34,674 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 22:32:34,674 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 22:32:34,675 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:32:34,719 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 22:32:34,719 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 22:32:34,719 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:32:34,719 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-28 22:32:34,720 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:32:34,720 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-28 22:32:34,720 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-28 22:32:34,720 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-28 22:32:34,720 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-28 22:32:34,720 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-28 22:32:34,720 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-28 22:32:34,721 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-28 22:32:34,721 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-28 22:32:34,721 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-28 22:32:34,721 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-28 22:32:34,721 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-28 22:32:34,721 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-28 22:32:34,722 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-28 22:32:34,722 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-01-28 22:32:34,722 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-28 22:32:34,722 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 22:32:34,722 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 22:32:34,722 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 22:32:34,723 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 22:32:34,723 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 22:32:34,723 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 22:32:34,723 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 22:32:34,723 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 22:32:34,724 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-28 22:32:34,724 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-28 22:32:34,724 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 22:32:34,724 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-28 22:32:34,724 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 22:32:34,724 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-28 22:32:34,725 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-28 22:32:34,725 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:32:34,725 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-28 22:32:34,725 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-28 22:32:34,725 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-28 22:32:34,725 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:32:34,726 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-28 22:32:34,726 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-28 22:32:34,726 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-28 22:32:34,726 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-28 22:32:34,726 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-28 22:32:34,726 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-28 22:32:34,726 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 22:32:34,727 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 22:32:34,985 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-28 22:32:35,153 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 22:32:35,154 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:32:35 BoogieIcfgContainer [2018-01-28 22:32:35,154 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 22:32:35,155 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 22:32:35,156 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 22:32:35,158 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 22:32:35,159 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 10:32:34" (1/3) ... [2018-01-28 22:32:35,159 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f926082 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:32:35, skipping insertion in model container [2018-01-28 22:32:35,159 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:32:34" (2/3) ... [2018-01-28 22:32:35,160 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f926082 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:32:35, skipping insertion in model container [2018-01-28 22:32:35,160 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:32:35" (3/3) ... [2018-01-28 22:32:35,161 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-28 22:32:35,168 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 22:32:35,174 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-28 22:32:35,214 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 22:32:35,214 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 22:32:35,214 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 22:32:35,214 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 22:32:35,214 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 22:32:35,215 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 22:32:35,215 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 22:32:35,215 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 22:32:35,215 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 22:32:35,234 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states. [2018-01-28 22:32:35,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-28 22:32:35,240 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:35,241 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:35,241 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:35,245 INFO L82 PathProgramCache]: Analyzing trace with hash -1920728985, now seen corresponding path program 1 times [2018-01-28 22:32:35,247 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:35,247 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:35,294 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:35,294 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:35,294 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:35,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:35,349 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:35,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:35,570 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:35,570 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:32:35,571 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:32:35,581 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:32:35,582 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:32:35,584 INFO L87 Difference]: Start difference. First operand 179 states. Second operand 5 states. [2018-01-28 22:32:35,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:35,664 INFO L93 Difference]: Finished difference Result 340 states and 355 transitions. [2018-01-28 22:32:35,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:32:35,666 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-28 22:32:35,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:35,680 INFO L225 Difference]: With dead ends: 340 [2018-01-28 22:32:35,681 INFO L226 Difference]: Without dead ends: 183 [2018-01-28 22:32:35,686 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:35,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-28 22:32:35,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 181. [2018-01-28 22:32:35,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-01-28 22:32:35,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 189 transitions. [2018-01-28 22:32:35,733 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 189 transitions. Word has length 22 [2018-01-28 22:32:35,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:35,733 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 189 transitions. [2018-01-28 22:32:35,733 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:32:35,734 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 189 transitions. [2018-01-28 22:32:35,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:32:35,735 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:35,735 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:35,735 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:35,735 INFO L82 PathProgramCache]: Analyzing trace with hash 1723562718, now seen corresponding path program 1 times [2018-01-28 22:32:35,735 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:35,736 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:35,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:35,737 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:35,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:35,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:35,761 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:35,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:35,825 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:35,825 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:32:35,827 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:32:35,828 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:32:35,828 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:35,828 INFO L87 Difference]: Start difference. First operand 181 states and 189 transitions. Second operand 6 states. [2018-01-28 22:32:36,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:36,032 INFO L93 Difference]: Finished difference Result 184 states and 192 transitions. [2018-01-28 22:32:36,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:32:36,035 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-28 22:32:36,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:36,038 INFO L225 Difference]: With dead ends: 184 [2018-01-28 22:32:36,038 INFO L226 Difference]: Without dead ends: 183 [2018-01-28 22:32:36,039 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:36,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-28 22:32:36,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2018-01-28 22:32:36,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-28 22:32:36,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 188 transitions. [2018-01-28 22:32:36,056 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 188 transitions. Word has length 23 [2018-01-28 22:32:36,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:36,057 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 188 transitions. [2018-01-28 22:32:36,057 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:32:36,057 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 188 transitions. [2018-01-28 22:32:36,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:32:36,058 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:36,058 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:36,058 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:36,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1723562719, now seen corresponding path program 1 times [2018-01-28 22:32:36,058 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:36,058 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:36,060 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:36,060 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:36,060 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:36,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:36,081 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:36,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:36,387 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:36,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:32:36,387 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:32:36,388 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:32:36,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:32:36,388 INFO L87 Difference]: Start difference. First operand 180 states and 188 transitions. Second operand 7 states. [2018-01-28 22:32:36,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:36,699 INFO L93 Difference]: Finished difference Result 183 states and 191 transitions. [2018-01-28 22:32:36,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:32:36,699 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-28 22:32:36,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:36,702 INFO L225 Difference]: With dead ends: 183 [2018-01-28 22:32:36,702 INFO L226 Difference]: Without dead ends: 182 [2018-01-28 22:32:36,703 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:36,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-28 22:32:36,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 179. [2018-01-28 22:32:36,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-28 22:32:36,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 187 transitions. [2018-01-28 22:32:36,719 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 187 transitions. Word has length 23 [2018-01-28 22:32:36,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:36,720 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 187 transitions. [2018-01-28 22:32:36,720 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:32:36,720 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 187 transitions. [2018-01-28 22:32:36,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-28 22:32:36,722 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:36,722 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:36,722 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:36,722 INFO L82 PathProgramCache]: Analyzing trace with hash 47541349, now seen corresponding path program 1 times [2018-01-28 22:32:36,723 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:36,723 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:36,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:36,724 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:36,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:36,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:36,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:36,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:36,865 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:36,865 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:32:36,866 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 22:32:36,866 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 22:32:36,866 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:32:36,866 INFO L87 Difference]: Start difference. First operand 179 states and 187 transitions. Second operand 9 states. [2018-01-28 22:32:36,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:36,969 INFO L93 Difference]: Finished difference Result 301 states and 313 transitions. [2018-01-28 22:32:36,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:32:36,969 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-01-28 22:32:36,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:36,973 INFO L225 Difference]: With dead ends: 301 [2018-01-28 22:32:36,973 INFO L226 Difference]: Without dead ends: 200 [2018-01-28 22:32:36,974 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:32:36,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-01-28 22:32:36,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 194. [2018-01-28 22:32:36,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-28 22:32:36,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 202 transitions. [2018-01-28 22:32:36,994 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 202 transitions. Word has length 38 [2018-01-28 22:32:36,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:36,994 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 202 transitions. [2018-01-28 22:32:36,994 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 22:32:36,994 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 202 transitions. [2018-01-28 22:32:36,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:32:36,996 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:36,996 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:36,996 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:36,996 INFO L82 PathProgramCache]: Analyzing trace with hash -123092145, now seen corresponding path program 1 times [2018-01-28 22:32:36,997 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:36,997 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:36,998 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:36,998 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:36,998 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:37,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:37,017 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:37,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:37,084 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:37,085 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:32:37,085 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:32:37,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:32:37,085 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:37,085 INFO L87 Difference]: Start difference. First operand 194 states and 202 transitions. Second operand 10 states. [2018-01-28 22:32:37,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:37,367 INFO L93 Difference]: Finished difference Result 194 states and 202 transitions. [2018-01-28 22:32:37,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:32:37,367 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-28 22:32:37,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:37,369 INFO L225 Difference]: With dead ends: 194 [2018-01-28 22:32:37,370 INFO L226 Difference]: Without dead ends: 193 [2018-01-28 22:32:37,370 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:32:37,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-28 22:32:37,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2018-01-28 22:32:37,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-01-28 22:32:37,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 201 transitions. [2018-01-28 22:32:37,382 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 201 transitions. Word has length 39 [2018-01-28 22:32:37,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:37,383 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 201 transitions. [2018-01-28 22:32:37,383 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:32:37,383 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 201 transitions. [2018-01-28 22:32:37,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:32:37,384 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:37,384 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:37,385 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:37,385 INFO L82 PathProgramCache]: Analyzing trace with hash -123092144, now seen corresponding path program 1 times [2018-01-28 22:32:37,385 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:37,385 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:37,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:37,386 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:37,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:37,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:37,404 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:37,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:37,441 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:37,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:32:37,442 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:32:37,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:32:37,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:32:37,442 INFO L87 Difference]: Start difference. First operand 193 states and 201 transitions. Second operand 4 states. [2018-01-28 22:32:37,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:37,476 INFO L93 Difference]: Finished difference Result 337 states and 351 transitions. [2018-01-28 22:32:37,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:32:37,482 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-28 22:32:37,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:37,484 INFO L225 Difference]: With dead ends: 337 [2018-01-28 22:32:37,485 INFO L226 Difference]: Without dead ends: 197 [2018-01-28 22:32:37,486 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:32:37,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-28 22:32:37,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2018-01-28 22:32:37,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-28 22:32:37,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 202 transitions. [2018-01-28 22:32:37,497 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 202 transitions. Word has length 39 [2018-01-28 22:32:37,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:37,497 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 202 transitions. [2018-01-28 22:32:37,497 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:32:37,497 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 202 transitions. [2018-01-28 22:32:37,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:32:37,498 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:37,498 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:37,499 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:37,499 INFO L82 PathProgramCache]: Analyzing trace with hash 802130446, now seen corresponding path program 1 times [2018-01-28 22:32:37,499 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:37,499 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:37,500 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:37,500 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:37,500 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:37,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:37,514 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:37,569 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:37,569 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:37,569 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:37,592 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:37,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:37,642 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:37,733 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:37,755 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:37,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-28 22:32:37,756 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:32:37,756 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:32:37,756 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:37,757 INFO L87 Difference]: Start difference. First operand 194 states and 202 transitions. Second operand 6 states. [2018-01-28 22:32:37,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:37,813 INFO L93 Difference]: Finished difference Result 341 states and 355 transitions. [2018-01-28 22:32:37,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:32:37,814 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-28 22:32:37,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:37,816 INFO L225 Difference]: With dead ends: 341 [2018-01-28 22:32:37,816 INFO L226 Difference]: Without dead ends: 201 [2018-01-28 22:32:37,818 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:32:37,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-01-28 22:32:37,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 198. [2018-01-28 22:32:37,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-01-28 22:32:37,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 206 transitions. [2018-01-28 22:32:37,831 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 206 transitions. Word has length 43 [2018-01-28 22:32:37,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:37,832 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 206 transitions. [2018-01-28 22:32:37,832 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:32:37,832 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 206 transitions. [2018-01-28 22:32:37,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-28 22:32:37,833 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:37,834 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:37,834 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:37,834 INFO L82 PathProgramCache]: Analyzing trace with hash -810591901, now seen corresponding path program 1 times [2018-01-28 22:32:37,834 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:37,834 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:37,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:37,836 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:37,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:37,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:37,849 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:37,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:37,899 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:37,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:32:37,903 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:32:37,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:32:37,904 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:32:37,904 INFO L87 Difference]: Start difference. First operand 198 states and 206 transitions. Second operand 3 states. [2018-01-28 22:32:38,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:38,230 INFO L93 Difference]: Finished difference Result 220 states and 230 transitions. [2018-01-28 22:32:38,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:32:38,231 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2018-01-28 22:32:38,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:38,233 INFO L225 Difference]: With dead ends: 220 [2018-01-28 22:32:38,233 INFO L226 Difference]: Without dead ends: 216 [2018-01-28 22:32:38,234 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:32:38,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-01-28 22:32:38,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 216. [2018-01-28 22:32:38,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-01-28 22:32:38,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 226 transitions. [2018-01-28 22:32:38,257 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 226 transitions. Word has length 45 [2018-01-28 22:32:38,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:38,257 INFO L432 AbstractCegarLoop]: Abstraction has 216 states and 226 transitions. [2018-01-28 22:32:38,257 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:32:38,258 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 226 transitions. [2018-01-28 22:32:38,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-28 22:32:38,262 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:38,262 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:38,262 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:38,263 INFO L82 PathProgramCache]: Analyzing trace with hash 1801980172, now seen corresponding path program 1 times [2018-01-28 22:32:38,263 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:38,263 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:38,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:38,264 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:38,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:38,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:38,275 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:38,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:38,311 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:38,311 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:32:38,312 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:32:38,312 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:32:38,312 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:32:38,312 INFO L87 Difference]: Start difference. First operand 216 states and 226 transitions. Second operand 6 states. [2018-01-28 22:32:38,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:38,355 INFO L93 Difference]: Finished difference Result 310 states and 321 transitions. [2018-01-28 22:32:38,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:32:38,356 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 46 [2018-01-28 22:32:38,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:38,358 INFO L225 Difference]: With dead ends: 310 [2018-01-28 22:32:38,358 INFO L226 Difference]: Without dead ends: 210 [2018-01-28 22:32:38,358 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:38,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-01-28 22:32:38,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 210. [2018-01-28 22:32:38,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-01-28 22:32:38,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 218 transitions. [2018-01-28 22:32:38,374 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 218 transitions. Word has length 46 [2018-01-28 22:32:38,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:38,374 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 218 transitions. [2018-01-28 22:32:38,374 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:32:38,375 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 218 transitions. [2018-01-28 22:32:38,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:32:38,376 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:38,376 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:38,376 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:38,376 INFO L82 PathProgramCache]: Analyzing trace with hash 1024967116, now seen corresponding path program 2 times [2018-01-28 22:32:38,377 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:38,377 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:38,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:38,378 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:38,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:38,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:38,393 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:38,439 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:38,439 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:38,439 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:38,447 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:38,474 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:38,478 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:38,483 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:38,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:38,512 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:38,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:38,535 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:38,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:38,548 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:39,221 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-28 22:32:39,242 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:39,242 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-28 22:32:39,242 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:32:39,242 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:32:39,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:32:39,243 INFO L87 Difference]: Start difference. First operand 210 states and 218 transitions. Second operand 19 states. [2018-01-28 22:32:42,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:42,690 INFO L93 Difference]: Finished difference Result 447 states and 463 transitions. [2018-01-28 22:32:42,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:32:42,690 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-28 22:32:42,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:42,692 INFO L225 Difference]: With dead ends: 447 [2018-01-28 22:32:42,692 INFO L226 Difference]: Without dead ends: 283 [2018-01-28 22:32:42,692 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-28 22:32:42,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-01-28 22:32:42,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 247. [2018-01-28 22:32:42,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-01-28 22:32:42,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 262 transitions. [2018-01-28 22:32:42,710 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 262 transitions. Word has length 47 [2018-01-28 22:32:42,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:42,711 INFO L432 AbstractCegarLoop]: Abstraction has 247 states and 262 transitions. [2018-01-28 22:32:42,711 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:32:42,711 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 262 transitions. [2018-01-28 22:32:42,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-28 22:32:42,711 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:42,712 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:42,712 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:42,712 INFO L82 PathProgramCache]: Analyzing trace with hash -202905466, now seen corresponding path program 1 times [2018-01-28 22:32:42,712 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:42,712 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:42,713 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:42,713 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:42,713 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:42,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:42,722 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:42,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:42,912 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:42,912 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:32:42,912 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:32:42,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:32:42,912 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:32:42,912 INFO L87 Difference]: Start difference. First operand 247 states and 262 transitions. Second operand 7 states. [2018-01-28 22:32:43,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:43,086 INFO L93 Difference]: Finished difference Result 274 states and 281 transitions. [2018-01-28 22:32:43,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:32:43,087 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2018-01-28 22:32:43,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:43,088 INFO L225 Difference]: With dead ends: 274 [2018-01-28 22:32:43,088 INFO L226 Difference]: Without dead ends: 180 [2018-01-28 22:32:43,088 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:32:43,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-28 22:32:43,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 178. [2018-01-28 22:32:43,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-28 22:32:43,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 184 transitions. [2018-01-28 22:32:43,102 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 184 transitions. Word has length 52 [2018-01-28 22:32:43,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:43,103 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 184 transitions. [2018-01-28 22:32:43,103 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:32:43,103 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 184 transitions. [2018-01-28 22:32:43,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:32:43,103 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:43,103 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:43,103 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:43,104 INFO L82 PathProgramCache]: Analyzing trace with hash -2020467638, now seen corresponding path program 1 times [2018-01-28 22:32:43,104 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:43,104 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:43,104 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:43,105 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:43,105 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:43,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:43,117 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:43,314 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-28 22:32:43,314 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:43,314 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:32:43,315 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:32:43,315 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:32:43,315 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:32:43,315 INFO L87 Difference]: Start difference. First operand 178 states and 184 transitions. Second operand 12 states. [2018-01-28 22:32:43,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:43,847 INFO L93 Difference]: Finished difference Result 178 states and 184 transitions. [2018-01-28 22:32:43,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:32:43,848 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-28 22:32:43,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:43,849 INFO L225 Difference]: With dead ends: 178 [2018-01-28 22:32:43,849 INFO L226 Difference]: Without dead ends: 176 [2018-01-28 22:32:43,849 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:32:43,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-28 22:32:43,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-01-28 22:32:43,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-28 22:32:43,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 182 transitions. [2018-01-28 22:32:43,863 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 182 transitions. Word has length 56 [2018-01-28 22:32:43,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:43,863 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 182 transitions. [2018-01-28 22:32:43,863 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:32:43,863 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 182 transitions. [2018-01-28 22:32:43,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:32:43,864 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:43,864 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:43,864 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:43,865 INFO L82 PathProgramCache]: Analyzing trace with hash -2020467637, now seen corresponding path program 1 times [2018-01-28 22:32:43,865 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:43,865 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:43,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:43,866 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:43,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:43,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:43,883 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:43,993 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:43,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:43,994 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:44,006 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:44,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:44,047 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:44,119 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:44,141 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:44,142 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-28 22:32:44,143 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:32:44,143 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:32:44,143 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:44,144 INFO L87 Difference]: Start difference. First operand 176 states and 182 transitions. Second operand 8 states. [2018-01-28 22:32:44,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:44,294 INFO L93 Difference]: Finished difference Result 320 states and 332 transitions. [2018-01-28 22:32:44,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:32:44,294 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-28 22:32:44,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:44,295 INFO L225 Difference]: With dead ends: 320 [2018-01-28 22:32:44,295 INFO L226 Difference]: Without dead ends: 183 [2018-01-28 22:32:44,296 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:32:44,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-28 22:32:44,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2018-01-28 22:32:44,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-28 22:32:44,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 186 transitions. [2018-01-28 22:32:44,308 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 186 transitions. Word has length 56 [2018-01-28 22:32:44,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:44,308 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 186 transitions. [2018-01-28 22:32:44,308 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:32:44,308 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 186 transitions. [2018-01-28 22:32:44,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:32:44,309 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:44,309 INFO L330 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:44,309 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:44,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1741231795, now seen corresponding path program 2 times [2018-01-28 22:32:44,309 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:44,309 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:44,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:44,311 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:44,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:44,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:44,326 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:44,396 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:44,396 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:44,396 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-01-28 22:32:44,407 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:44,430 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:44,443 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:44,448 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:44,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:44,459 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:44,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:44,481 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:44,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:44,494 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:45,038 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-28 22:32:45,062 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:45,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-28 22:32:45,062 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:32:45,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:32:45,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:32:45,063 INFO L87 Difference]: Start difference. First operand 180 states and 186 transitions. Second operand 22 states. [2018-01-28 22:32:46,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:46,377 INFO L93 Difference]: Finished difference Result 322 states and 336 transitions. [2018-01-28 22:32:46,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:32:46,378 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-28 22:32:46,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:46,379 INFO L225 Difference]: With dead ends: 322 [2018-01-28 22:32:46,379 INFO L226 Difference]: Without dead ends: 185 [2018-01-28 22:32:46,380 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 22:32:46,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-28 22:32:46,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-28 22:32:46,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:32:46,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 188 transitions. [2018-01-28 22:32:46,402 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 188 transitions. Word has length 60 [2018-01-28 22:32:46,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:46,402 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 188 transitions. [2018-01-28 22:32:46,402 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:32:46,402 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 188 transitions. [2018-01-28 22:32:46,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-28 22:32:46,403 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:46,404 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:46,404 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:46,404 INFO L82 PathProgramCache]: Analyzing trace with hash 190511670, now seen corresponding path program 1 times [2018-01-28 22:32:46,404 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:46,404 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:46,405 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:46,406 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:46,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:46,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:46,422 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:46,495 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:32:46,495 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:46,495 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:32:46,495 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:32:46,496 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:32:46,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:32:46,496 INFO L87 Difference]: Start difference. First operand 182 states and 188 transitions. Second operand 8 states. [2018-01-28 22:32:46,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:46,549 INFO L93 Difference]: Finished difference Result 295 states and 304 transitions. [2018-01-28 22:32:46,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:32:46,550 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 72 [2018-01-28 22:32:46,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:46,551 INFO L225 Difference]: With dead ends: 295 [2018-01-28 22:32:46,551 INFO L226 Difference]: Without dead ends: 182 [2018-01-28 22:32:46,551 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:46,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-28 22:32:46,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-28 22:32:46,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:32:46,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 187 transitions. [2018-01-28 22:32:46,567 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 187 transitions. Word has length 72 [2018-01-28 22:32:46,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:46,567 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 187 transitions. [2018-01-28 22:32:46,567 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:32:46,567 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 187 transitions. [2018-01-28 22:32:46,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-28 22:32:46,568 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:46,568 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:46,569 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:46,569 INFO L82 PathProgramCache]: Analyzing trace with hash 2000820890, now seen corresponding path program 1 times [2018-01-28 22:32:46,569 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:46,569 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:46,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:46,570 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:46,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:46,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:46,586 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:46,706 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:32:46,707 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:46,707 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-28 22:32:46,707 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:32:46,708 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:32:46,708 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:46,708 INFO L87 Difference]: Start difference. First operand 182 states and 187 transitions. Second operand 10 states. [2018-01-28 22:32:46,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:46,800 INFO L93 Difference]: Finished difference Result 297 states and 305 transitions. [2018-01-28 22:32:46,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:32:46,800 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 77 [2018-01-28 22:32:46,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:46,802 INFO L225 Difference]: With dead ends: 297 [2018-01-28 22:32:46,802 INFO L226 Difference]: Without dead ends: 182 [2018-01-28 22:32:46,803 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:32:46,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-28 22:32:46,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-28 22:32:46,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:32:46,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 186 transitions. [2018-01-28 22:32:46,824 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 186 transitions. Word has length 77 [2018-01-28 22:32:46,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:46,824 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 186 transitions. [2018-01-28 22:32:46,824 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:32:46,824 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 186 transitions. [2018-01-28 22:32:46,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-28 22:32:46,825 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:46,826 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:46,826 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:46,826 INFO L82 PathProgramCache]: Analyzing trace with hash 281004515, now seen corresponding path program 1 times [2018-01-28 22:32:46,826 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:46,826 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:46,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:46,827 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:46,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:46,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:46,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:47,192 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:32:47,193 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:47,193 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-01-28 22:32:47,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 22:32:47,193 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 22:32:47,193 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=241, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:32:47,193 INFO L87 Difference]: Start difference. First operand 182 states and 186 transitions. Second operand 17 states. [2018-01-28 22:32:47,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:47,880 INFO L93 Difference]: Finished difference Result 182 states and 186 transitions. [2018-01-28 22:32:47,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-28 22:32:47,880 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 88 [2018-01-28 22:32:47,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:47,881 INFO L225 Difference]: With dead ends: 182 [2018-01-28 22:32:47,881 INFO L226 Difference]: Without dead ends: 180 [2018-01-28 22:32:47,881 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=63, Invalid=537, Unknown=0, NotChecked=0, Total=600 [2018-01-28 22:32:47,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-28 22:32:47,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-01-28 22:32:47,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-28 22:32:47,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 184 transitions. [2018-01-28 22:32:47,903 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 184 transitions. Word has length 88 [2018-01-28 22:32:47,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:47,903 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 184 transitions. [2018-01-28 22:32:47,903 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 22:32:47,903 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 184 transitions. [2018-01-28 22:32:47,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-28 22:32:47,904 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:47,905 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:47,905 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:47,905 INFO L82 PathProgramCache]: Analyzing trace with hash 281004516, now seen corresponding path program 1 times [2018-01-28 22:32:47,905 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:47,905 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:47,906 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:47,906 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:47,906 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:47,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:47,928 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:48,030 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:48,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:48,031 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:48,039 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:48,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:48,083 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:48,104 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:48,139 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:48,139 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-28 22:32:48,140 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:32:48,140 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:32:48,140 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:32:48,140 INFO L87 Difference]: Start difference. First operand 180 states and 184 transitions. Second operand 10 states. [2018-01-28 22:32:48,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:48,198 INFO L93 Difference]: Finished difference Result 320 states and 328 transitions. [2018-01-28 22:32:48,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:32:48,198 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 88 [2018-01-28 22:32:48,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:48,199 INFO L225 Difference]: With dead ends: 320 [2018-01-28 22:32:48,199 INFO L226 Difference]: Without dead ends: 187 [2018-01-28 22:32:48,199 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:48,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-01-28 22:32:48,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 184. [2018-01-28 22:32:48,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-28 22:32:48,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 188 transitions. [2018-01-28 22:32:48,212 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 188 transitions. Word has length 88 [2018-01-28 22:32:48,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:48,212 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 188 transitions. [2018-01-28 22:32:48,212 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:32:48,212 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 188 transitions. [2018-01-28 22:32:48,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-28 22:32:48,213 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:48,213 INFO L330 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:48,213 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:48,214 INFO L82 PathProgramCache]: Analyzing trace with hash 1319112422, now seen corresponding path program 2 times [2018-01-28 22:32:48,214 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:48,214 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:48,215 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:48,215 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:48,215 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:48,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:48,231 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:48,439 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:48,439 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:48,439 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:48,451 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:48,483 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:48,491 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:48,497 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:48,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:48,515 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:48,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:48,650 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:48,708 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:48,709 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:49,916 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-28 22:32:49,938 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:49,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-28 22:32:49,938 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-28 22:32:49,939 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-28 22:32:49,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-28 22:32:49,939 INFO L87 Difference]: Start difference. First operand 184 states and 188 transitions. Second operand 29 states. [2018-01-28 22:32:51,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:51,729 INFO L93 Difference]: Finished difference Result 322 states and 332 transitions. [2018-01-28 22:32:51,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-28 22:32:51,729 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 92 [2018-01-28 22:32:51,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:51,731 INFO L225 Difference]: With dead ends: 322 [2018-01-28 22:32:51,731 INFO L226 Difference]: Without dead ends: 189 [2018-01-28 22:32:51,732 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=238, Invalid=1742, Unknown=0, NotChecked=0, Total=1980 [2018-01-28 22:32:51,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-28 22:32:51,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-28 22:32:51,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:32:51,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 190 transitions. [2018-01-28 22:32:51,754 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 190 transitions. Word has length 92 [2018-01-28 22:32:51,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:51,754 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 190 transitions. [2018-01-28 22:32:51,754 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-28 22:32:51,754 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 190 transitions. [2018-01-28 22:32:51,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-28 22:32:51,755 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:51,755 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:51,756 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:51,756 INFO L82 PathProgramCache]: Analyzing trace with hash 1119276193, now seen corresponding path program 1 times [2018-01-28 22:32:51,756 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:51,756 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:51,757 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:51,757 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:51,757 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:51,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:51,775 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:51,999 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-28 22:32:51,999 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:51,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-28 22:32:51,999 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 22:32:52,000 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 22:32:52,000 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:32:52,000 INFO L87 Difference]: Start difference. First operand 186 states and 190 transitions. Second operand 13 states. [2018-01-28 22:32:52,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:52,241 INFO L93 Difference]: Finished difference Result 265 states and 271 transitions. [2018-01-28 22:32:52,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 22:32:52,242 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 103 [2018-01-28 22:32:52,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:52,243 INFO L225 Difference]: With dead ends: 265 [2018-01-28 22:32:52,243 INFO L226 Difference]: Without dead ends: 186 [2018-01-28 22:32:52,243 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:32:52,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-28 22:32:52,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-01-28 22:32:52,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:32:52,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 189 transitions. [2018-01-28 22:32:52,257 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 189 transitions. Word has length 103 [2018-01-28 22:32:52,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:52,258 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 189 transitions. [2018-01-28 22:32:52,258 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 22:32:52,258 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 189 transitions. [2018-01-28 22:32:52,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-28 22:32:52,258 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:52,259 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:52,259 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:52,259 INFO L82 PathProgramCache]: Analyzing trace with hash 1846686008, now seen corresponding path program 1 times [2018-01-28 22:32:52,259 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:52,259 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:52,260 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:52,260 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:52,260 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:52,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:52,278 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:52,603 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-28 22:32:52,603 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:52,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:32:52,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 22:32:52,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 22:32:52,604 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:32:52,604 INFO L87 Difference]: Start difference. First operand 186 states and 189 transitions. Second operand 11 states. [2018-01-28 22:32:52,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:52,937 INFO L93 Difference]: Finished difference Result 192 states and 194 transitions. [2018-01-28 22:32:52,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:32:52,951 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 121 [2018-01-28 22:32:52,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:52,952 INFO L225 Difference]: With dead ends: 192 [2018-01-28 22:32:52,952 INFO L226 Difference]: Without dead ends: 186 [2018-01-28 22:32:52,952 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:32:52,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-28 22:32:52,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-01-28 22:32:52,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:32:52,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 188 transitions. [2018-01-28 22:32:52,977 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 188 transitions. Word has length 121 [2018-01-28 22:32:52,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:52,977 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 188 transitions. [2018-01-28 22:32:52,977 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 22:32:52,977 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 188 transitions. [2018-01-28 22:32:52,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 22:32:52,978 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:52,978 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:52,978 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:52,978 INFO L82 PathProgramCache]: Analyzing trace with hash 1313834769, now seen corresponding path program 1 times [2018-01-28 22:32:52,978 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:52,979 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:52,979 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:52,980 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:52,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:53,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:53,001 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:53,257 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:53,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:53,257 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:53,265 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:53,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:53,329 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:53,421 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:53,443 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:32:53,443 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-28 22:32:53,444 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:32:53,444 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:32:53,444 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:32:53,444 INFO L87 Difference]: Start difference. First operand 186 states and 188 transitions. Second operand 12 states. [2018-01-28 22:32:53,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:53,693 INFO L93 Difference]: Finished difference Result 324 states and 328 transitions. [2018-01-28 22:32:53,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:32:53,695 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 128 [2018-01-28 22:32:53,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:53,696 INFO L225 Difference]: With dead ends: 324 [2018-01-28 22:32:53,696 INFO L226 Difference]: Without dead ends: 193 [2018-01-28 22:32:53,697 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:32:53,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-28 22:32:53,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 190. [2018-01-28 22:32:53,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-28 22:32:53,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 192 transitions. [2018-01-28 22:32:53,712 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 192 transitions. Word has length 128 [2018-01-28 22:32:53,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:53,712 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 192 transitions. [2018-01-28 22:32:53,712 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:32:53,712 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 192 transitions. [2018-01-28 22:32:53,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-28 22:32:53,713 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:53,713 INFO L330 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:53,713 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:53,713 INFO L82 PathProgramCache]: Analyzing trace with hash 1896292883, now seen corresponding path program 2 times [2018-01-28 22:32:53,713 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:53,713 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:53,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:53,714 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:53,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:53,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:53,734 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:53,922 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:32:53,922 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:32:53,922 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:32:53,928 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:32:53,981 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:32:53,993 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:32:54,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:32:54,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:32:54,007 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:54,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:32:54,033 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:32:54,044 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:32:54,044 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:32:54,965 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-01-28 22:32:54,999 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:32:54,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-01-28 22:32:55,000 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-28 22:32:55,000 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-28 22:32:55,000 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-01-28 22:32:55,001 INFO L87 Difference]: Start difference. First operand 190 states and 192 transitions. Second operand 31 states. [2018-01-28 22:32:57,512 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-28 22:32:58,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:58,858 INFO L93 Difference]: Finished difference Result 326 states and 332 transitions. [2018-01-28 22:32:58,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-28 22:32:58,858 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 132 [2018-01-28 22:32:58,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:58,859 INFO L225 Difference]: With dead ends: 326 [2018-01-28 22:32:58,859 INFO L226 Difference]: Without dead ends: 195 [2018-01-28 22:32:58,860 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 111 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 533 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=297, Invalid=2055, Unknown=0, NotChecked=0, Total=2352 [2018-01-28 22:32:58,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-28 22:32:58,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 192. [2018-01-28 22:32:58,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-28 22:32:58,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 194 transitions. [2018-01-28 22:32:58,877 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 194 transitions. Word has length 132 [2018-01-28 22:32:58,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:58,878 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 194 transitions. [2018-01-28 22:32:58,878 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-28 22:32:58,878 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 194 transitions. [2018-01-28 22:32:58,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-01-28 22:32:58,879 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:58,879 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:58,879 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:58,879 INFO L82 PathProgramCache]: Analyzing trace with hash -392860652, now seen corresponding path program 1 times [2018-01-28 22:32:58,880 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:58,880 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:58,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:58,881 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:32:58,881 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:58,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:58,902 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:32:59,183 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-28 22:32:59,184 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:32:59,184 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-01-28 22:32:59,184 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:32:59,184 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:32:59,185 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=341, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:32:59,185 INFO L87 Difference]: Start difference. First operand 192 states and 194 transitions. Second operand 20 states. [2018-01-28 22:32:59,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:32:59,563 INFO L93 Difference]: Finished difference Result 199 states and 201 transitions. [2018-01-28 22:32:59,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:32:59,563 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 136 [2018-01-28 22:32:59,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:32:59,564 INFO L225 Difference]: With dead ends: 199 [2018-01-28 22:32:59,564 INFO L226 Difference]: Without dead ends: 197 [2018-01-28 22:32:59,564 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2018-01-28 22:32:59,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-28 22:32:59,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 190. [2018-01-28 22:32:59,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-28 22:32:59,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 192 transitions. [2018-01-28 22:32:59,582 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 192 transitions. Word has length 136 [2018-01-28 22:32:59,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:32:59,583 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 192 transitions. [2018-01-28 22:32:59,583 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:32:59,583 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 192 transitions. [2018-01-28 22:32:59,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-28 22:32:59,583 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:32:59,583 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:32:59,584 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:32:59,584 INFO L82 PathProgramCache]: Analyzing trace with hash -607993699, now seen corresponding path program 1 times [2018-01-28 22:32:59,584 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:32:59,584 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:32:59,585 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:59,585 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:32:59,585 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:32:59,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:32:59,605 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:00,373 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-28 22:33:00,374 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:33:00,374 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-01-28 22:33:00,374 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-28 22:33:00,374 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-28 22:33:00,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=599, Unknown=0, NotChecked=0, Total=650 [2018-01-28 22:33:00,374 INFO L87 Difference]: Start difference. First operand 190 states and 192 transitions. Second operand 26 states. [2018-01-28 22:33:00,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:00,873 INFO L93 Difference]: Finished difference Result 197 states and 199 transitions. [2018-01-28 22:33:00,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-28 22:33:00,873 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 155 [2018-01-28 22:33:00,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:00,874 INFO L225 Difference]: With dead ends: 197 [2018-01-28 22:33:00,875 INFO L226 Difference]: Without dead ends: 195 [2018-01-28 22:33:00,875 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=101, Invalid=1231, Unknown=0, NotChecked=0, Total=1332 [2018-01-28 22:33:00,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-28 22:33:00,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 188. [2018-01-28 22:33:00,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-28 22:33:00,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 190 transitions. [2018-01-28 22:33:00,904 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 190 transitions. Word has length 155 [2018-01-28 22:33:00,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:00,904 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 190 transitions. [2018-01-28 22:33:00,905 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-28 22:33:00,905 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2018-01-28 22:33:00,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-28 22:33:00,906 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:00,906 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:00,906 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:00,906 INFO L82 PathProgramCache]: Analyzing trace with hash -607993698, now seen corresponding path program 1 times [2018-01-28 22:33:00,906 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:00,907 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:00,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:00,908 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:33:00,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:00,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:00,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:01,186 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:01,186 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:33:01,186 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:33:01,194 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:33:01,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:01,271 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:33:01,328 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:01,364 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:33:01,364 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-28 22:33:01,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-28 22:33:01,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-28 22:33:01,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:33:01,365 INFO L87 Difference]: Start difference. First operand 188 states and 190 transitions. Second operand 14 states. [2018-01-28 22:33:01,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:01,462 INFO L93 Difference]: Finished difference Result 320 states and 324 transitions. [2018-01-28 22:33:01,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:33:01,462 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 155 [2018-01-28 22:33:01,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:01,463 INFO L225 Difference]: With dead ends: 320 [2018-01-28 22:33:01,463 INFO L226 Difference]: Without dead ends: 195 [2018-01-28 22:33:01,464 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:33:01,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-28 22:33:01,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 192. [2018-01-28 22:33:01,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-28 22:33:01,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 194 transitions. [2018-01-28 22:33:01,482 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 194 transitions. Word has length 155 [2018-01-28 22:33:01,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:01,483 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 194 transitions. [2018-01-28 22:33:01,483 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-28 22:33:01,483 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 194 transitions. [2018-01-28 22:33:01,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-01-28 22:33:01,484 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:01,484 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:01,484 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:01,484 INFO L82 PathProgramCache]: Analyzing trace with hash 801395804, now seen corresponding path program 2 times [2018-01-28 22:33:01,484 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:01,484 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:01,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:01,485 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:33:01,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:01,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:01,505 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:01,935 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:01,935 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:33:01,935 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:33:01,945 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:33:01,996 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:33:02,002 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:33:02,008 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:33:02,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:33:02,014 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:33:02,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:33:02,049 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:33:02,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:33:02,075 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:33:03,513 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-28 22:33:03,534 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:33:03,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [14] total 39 [2018-01-28 22:33:03,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-28 22:33:03,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-28 22:33:03,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1309, Unknown=0, NotChecked=0, Total=1482 [2018-01-28 22:33:03,536 INFO L87 Difference]: Start difference. First operand 192 states and 194 transitions. Second operand 39 states. [2018-01-28 22:33:05,797 WARN L143 SmtUtils]: Spent 2042ms on a formula simplification that was a NOOP. DAG size: 34 [2018-01-28 22:33:07,878 WARN L143 SmtUtils]: Spent 2025ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-28 22:33:10,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:10,009 INFO L93 Difference]: Finished difference Result 322 states and 328 transitions. [2018-01-28 22:33:10,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-28 22:33:10,010 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 159 [2018-01-28 22:33:10,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:10,011 INFO L225 Difference]: With dead ends: 322 [2018-01-28 22:33:10,011 INFO L226 Difference]: Without dead ends: 197 [2018-01-28 22:33:10,012 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 130 SyntacticMatches, 5 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 923 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=422, Invalid=3484, Unknown=0, NotChecked=0, Total=3906 [2018-01-28 22:33:10,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-28 22:33:10,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2018-01-28 22:33:10,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-28 22:33:10,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 196 transitions. [2018-01-28 22:33:10,032 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 196 transitions. Word has length 159 [2018-01-28 22:33:10,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:10,033 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 196 transitions. [2018-01-28 22:33:10,033 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-28 22:33:10,033 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2018-01-28 22:33:10,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-01-28 22:33:10,034 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:10,034 INFO L330 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:10,035 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:10,035 INFO L82 PathProgramCache]: Analyzing trace with hash 443425390, now seen corresponding path program 1 times [2018-01-28 22:33:10,035 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:10,035 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:10,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:10,036 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:33:10,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:10,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:10,065 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:10,291 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:10,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:33:10,291 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:33:10,300 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:33:10,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:10,368 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:33:10,425 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:10,446 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:33:10,446 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-28 22:33:10,447 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-28 22:33:10,447 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-28 22:33:10,447 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:33:10,447 INFO L87 Difference]: Start difference. First operand 194 states and 196 transitions. Second operand 16 states. [2018-01-28 22:33:10,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:10,535 INFO L93 Difference]: Finished difference Result 324 states and 328 transitions. [2018-01-28 22:33:10,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 22:33:10,535 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 168 [2018-01-28 22:33:10,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:10,536 INFO L225 Difference]: With dead ends: 324 [2018-01-28 22:33:10,536 INFO L226 Difference]: Without dead ends: 201 [2018-01-28 22:33:10,537 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 168 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:33:10,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-01-28 22:33:10,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 198. [2018-01-28 22:33:10,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-01-28 22:33:10,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 200 transitions. [2018-01-28 22:33:10,558 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 200 transitions. Word has length 168 [2018-01-28 22:33:10,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:10,558 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 200 transitions. [2018-01-28 22:33:10,558 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-28 22:33:10,558 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 200 transitions. [2018-01-28 22:33:10,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-01-28 22:33:10,559 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:10,559 INFO L330 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:10,559 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:10,559 INFO L82 PathProgramCache]: Analyzing trace with hash 225383280, now seen corresponding path program 2 times [2018-01-28 22:33:10,559 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:10,560 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:10,560 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:10,560 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:33:10,560 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:10,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:10,578 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:10,921 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:10,921 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:33:10,921 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:33:10,927 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:33:10,967 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:33:10,975 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:33:10,983 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:33:11,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:33:11,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:33:11,051 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,052 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,053 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-28 22:33:11,147 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:33:11,150 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:33:11,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 22:33:11,154 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-28 22:33:11,157 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-28 22:33:11,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-28 22:33:11,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:33:11,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-28 22:33:11,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:33:11,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:33:11,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-28 22:33:11,180 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,186 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,189 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,193 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,194 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-28 22:33:11,678 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:33:11,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-01-28 22:33:11,680 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:33:11,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-01-28 22:33:11,681 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,682 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:11,684 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:13 [2018-01-28 22:33:12,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-28 22:33:12,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-28 22:33:12,258 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:33:12,259 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:12,260 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:33:12,260 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-28 22:33:12,332 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-01-28 22:33:12,354 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:33:12,354 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [48] imperfect sequences [16] total 62 [2018-01-28 22:33:12,354 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-28 22:33:12,355 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-28 22:33:12,355 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=3443, Unknown=1, NotChecked=118, Total=3782 [2018-01-28 22:33:12,356 INFO L87 Difference]: Start difference. First operand 198 states and 200 transitions. Second operand 62 states. [2018-01-28 22:33:14,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:14,840 INFO L93 Difference]: Finished difference Result 304 states and 310 transitions. [2018-01-28 22:33:14,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-01-28 22:33:14,840 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 172 [2018-01-28 22:33:14,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:14,841 INFO L225 Difference]: With dead ends: 304 [2018-01-28 22:33:14,841 INFO L226 Difference]: Without dead ends: 181 [2018-01-28 22:33:14,843 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 88 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1428 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=376, Invalid=7459, Unknown=1, NotChecked=174, Total=8010 [2018-01-28 22:33:14,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-28 22:33:14,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 178. [2018-01-28 22:33:14,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-28 22:33:14,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 178 transitions. [2018-01-28 22:33:14,882 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 178 transitions. Word has length 172 [2018-01-28 22:33:14,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:14,882 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 178 transitions. [2018-01-28 22:33:14,882 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-28 22:33:14,882 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 178 transitions. [2018-01-28 22:33:14,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-01-28 22:33:14,883 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:14,884 INFO L330 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:14,884 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:14,884 INFO L82 PathProgramCache]: Analyzing trace with hash -1540672566, now seen corresponding path program 1 times [2018-01-28 22:33:14,884 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:14,884 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:14,885 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:14,886 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:33:14,886 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:14,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:14,914 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:15,296 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:15,296 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:33:15,296 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:33:15,304 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:33:15,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:15,388 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:33:15,425 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:15,460 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:33:15,461 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-28 22:33:15,461 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 22:33:15,462 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 22:33:15,462 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:33:15,462 INFO L87 Difference]: Start difference. First operand 178 states and 178 transitions. Second operand 18 states. [2018-01-28 22:33:15,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:15,625 INFO L93 Difference]: Finished difference Result 284 states and 284 transitions. [2018-01-28 22:33:15,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:33:15,626 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 177 [2018-01-28 22:33:15,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:15,626 INFO L225 Difference]: With dead ends: 284 [2018-01-28 22:33:15,626 INFO L226 Difference]: Without dead ends: 185 [2018-01-28 22:33:15,627 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 177 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:33:15,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-28 22:33:15,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-28 22:33:15,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 22:33:15,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 182 transitions. [2018-01-28 22:33:15,664 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 182 transitions. Word has length 177 [2018-01-28 22:33:15,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:15,664 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 182 transitions. [2018-01-28 22:33:15,664 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 22:33:15,664 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 182 transitions. [2018-01-28 22:33:15,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-01-28 22:33:15,666 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:15,666 INFO L330 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:15,666 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:15,666 INFO L82 PathProgramCache]: Analyzing trace with hash 490489096, now seen corresponding path program 2 times [2018-01-28 22:33:15,666 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:15,666 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:15,667 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:15,667 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:33:15,667 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:15,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:15,690 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:16,017 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:16,017 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:33:16,017 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:33:16,035 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:33:16,097 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:33:16,128 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:33:16,131 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:33:16,137 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:33:16,193 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:16,218 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:33:16,218 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-28 22:33:16,218 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:33:16,218 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:33:16,219 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:33:16,219 INFO L87 Difference]: Start difference. First operand 182 states and 182 transitions. Second operand 19 states. [2018-01-28 22:33:16,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:16,318 INFO L93 Difference]: Finished difference Result 288 states and 288 transitions. [2018-01-28 22:33:16,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 22:33:16,318 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 181 [2018-01-28 22:33:16,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:16,319 INFO L225 Difference]: With dead ends: 288 [2018-01-28 22:33:16,319 INFO L226 Difference]: Without dead ends: 189 [2018-01-28 22:33:16,320 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:33:16,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-28 22:33:16,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-28 22:33:16,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-28 22:33:16,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 186 transitions. [2018-01-28 22:33:16,355 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 186 transitions. Word has length 181 [2018-01-28 22:33:16,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:16,356 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 186 transitions. [2018-01-28 22:33:16,356 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:33:16,356 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 186 transitions. [2018-01-28 22:33:16,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-01-28 22:33:16,357 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:16,357 INFO L330 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:16,358 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:16,358 INFO L82 PathProgramCache]: Analyzing trace with hash -1731819706, now seen corresponding path program 3 times [2018-01-28 22:33:16,358 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:16,358 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:16,359 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:16,359 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:33:16,359 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:16,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:33:16,385 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:33:16,662 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:16,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:33:16,662 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:33:16,668 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 22:33:16,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:16,732 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:16,757 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:16,835 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:17,126 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:18,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:18,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:18,972 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:19,206 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:19,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:19,614 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:21,850 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:22,333 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:24,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:28,284 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:33,956 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:33:33,960 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:33:33,972 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:33:34,370 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:33:34,395 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:33:34,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 24] total 41 [2018-01-28 22:33:34,396 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-28 22:33:34,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-28 22:33:34,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=472, Invalid=1168, Unknown=0, NotChecked=0, Total=1640 [2018-01-28 22:33:34,397 INFO L87 Difference]: Start difference. First operand 186 states and 186 transitions. Second operand 41 states. [2018-01-28 22:33:34,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:33:34,808 INFO L93 Difference]: Finished difference Result 292 states and 292 transitions. [2018-01-28 22:33:34,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-28 22:33:34,808 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 185 [2018-01-28 22:33:34,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:33:34,809 INFO L225 Difference]: With dead ends: 292 [2018-01-28 22:33:34,810 INFO L226 Difference]: Without dead ends: 193 [2018-01-28 22:33:34,811 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=522, Invalid=1458, Unknown=0, NotChecked=0, Total=1980 [2018-01-28 22:33:34,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-28 22:33:34,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 190. [2018-01-28 22:33:34,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-28 22:33:34,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 190 transitions. [2018-01-28 22:33:34,847 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 190 transitions. Word has length 185 [2018-01-28 22:33:34,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:33:34,848 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 190 transitions. [2018-01-28 22:33:34,848 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-28 22:33:34,848 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 190 transitions. [2018-01-28 22:33:34,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-01-28 22:33:34,849 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:33:34,849 INFO L330 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:33:34,850 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:33:34,850 INFO L82 PathProgramCache]: Analyzing trace with hash -456557948, now seen corresponding path program 4 times [2018-01-28 22:33:34,850 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:33:34,850 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:33:34,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:34,851 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:33:34,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:33:34,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 22:33:34,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 22:33:35,034 INFO L389 BasicCegarLoop]: Counterexample might be feasible [2018-01-28 22:33:35,067 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-28 22:33:35,074 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-28 22:33:35,100 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 10:33:35 BoogieIcfgContainer [2018-01-28 22:33:35,100 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 22:33:35,101 INFO L168 Benchmark]: Toolchain (without parser) took 60711.48 ms. Allocated memory was 303.0 MB in the beginning and 803.7 MB in the end (delta: 500.7 MB). Free memory was 262.1 MB in the beginning and 448.5 MB in the end (delta: -186.4 MB). Peak memory consumption was 314.3 MB. Max. memory is 5.3 GB. [2018-01-28 22:33:35,102 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 303.0 MB. Free memory is still 269.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 22:33:35,103 INFO L168 Benchmark]: CACSL2BoogieTranslator took 233.32 ms. Allocated memory is still 303.0 MB. Free memory was 262.1 MB in the beginning and 248.1 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:33:35,103 INFO L168 Benchmark]: Boogie Preprocessor took 43.92 ms. Allocated memory is still 303.0 MB. Free memory was 248.1 MB in the beginning and 246.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:33:35,103 INFO L168 Benchmark]: RCFGBuilder took 480.79 ms. Allocated memory is still 303.0 MB. Free memory was 245.1 MB in the beginning and 206.4 MB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 5.3 GB. [2018-01-28 22:33:35,104 INFO L168 Benchmark]: TraceAbstraction took 59944.63 ms. Allocated memory was 303.0 MB in the beginning and 803.7 MB in the end (delta: 500.7 MB). Free memory was 206.4 MB in the beginning and 448.5 MB in the end (delta: -242.0 MB). Peak memory consumption was 258.7 MB. Max. memory is 5.3 GB. [2018-01-28 22:33:35,105 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 303.0 MB. Free memory is still 269.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 233.32 ms. Allocated memory is still 303.0 MB. Free memory was 262.1 MB in the beginning and 248.1 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 43.92 ms. Allocated memory is still 303.0 MB. Free memory was 248.1 MB in the beginning and 246.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 480.79 ms. Allocated memory is still 303.0 MB. Free memory was 245.1 MB in the beginning and 206.4 MB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 59944.63 ms. Allocated memory was 303.0 MB in the beginning and 803.7 MB in the end (delta: 500.7 MB). Free memory was 206.4 MB in the beginning and 448.5 MB in the end (delta: -242.0 MB). Peak memory consumption was 258.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1453] CALL entry_point() [L1445] struct ldv_kobject *kobj; [L1446] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() VAL [\old(size)=16, __VERIFIER_nondet_int()=1, size=16] [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={22:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={22:0}, malloc(size)={22:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={22:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) VAL [kobj={22:0}, ldv_malloc(sizeof(*kobj))={22:0}] [L1409] COND FALSE !(!kobj) VAL [kobj={22:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={22:0}, memset(kobj, 0, sizeof(*kobj))={22:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={22:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={22:0}, kobj={22:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={22:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={22:0}, kobj={22:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={22:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={22:12}, kref={22:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={22:0}, kobj={22:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={22:4}] [L1099] FCALL list->next = list VAL [list={22:4}, list={22:4}] [L1100] FCALL list->prev = list VAL [list={22:4}, list={22:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={22:0}, kobj={22:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={22:0}] [L1414] RET return kobj; VAL [\result={22:0}, kobj={22:0}] [L1446] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={22:0}] [L1446] kobj = ldv_kobject_create() VAL [kobj={22:0}, ldv_kobject_create()={22:0}] [L1447] CALL f_22_get(kobj) VAL [kobj={22:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={22:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={22:0}, kobj={22:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={22:12}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, v={22:12}] [L1255] int temp; VAL [\old(i)=1, i=1, v={22:12}, v={22:12}] [L1256] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={22:12}, v={22:12}, v->counter=1] [L1256] temp = v->counter VAL [\old(i)=1, i=1, temp=1, v={22:12}, v={22:12}, v->counter=1] [L1257] temp += i VAL [\old(i)=1, i=1, temp=2, v={22:12}, v={22:12}] [L1258] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=2, v={22:12}, v={22:12}] [L1259] RET return temp; VAL [\old(i)=1, \result=2, i=1, temp=2, v={22:12}, v={22:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={22:12}, kref={22:12}, ldv_atomic_add_return(1, (&kref->refcount))=2] [L1374] ldv_kref_get(&kobj->kref) VAL [kobj={22:0}, kobj={22:0}] [L1375] RET return kobj; VAL [\result={22:0}, kobj={22:0}, kobj={22:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={22:0}, kobj={22:0}, ldv_kobject_get(kobj)={22:0}] [L1447] f_22_get(kobj) VAL [kobj={22:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={22:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={22:0}, kobj={22:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={22:12}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={22:12}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, v={22:12}] [L1264] int temp; VAL [\old(i)=1, i=1, v={22:12}, v={22:12}] [L1265] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={22:12}, v={22:12}, v->counter=2] [L1265] temp = v->counter VAL [\old(i)=1, i=1, temp=2, v={22:12}, v={22:12}, v->counter=2] [L1266] temp -= i VAL [\old(i)=1, i=1, temp=1, v={22:12}, v={22:12}] [L1267] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=1, v={22:12}, v={22:12}] [L1268] RET return temp; VAL [\old(i)=1, \result=1, i=1, temp=1, v={22:12}, v={22:12}] [L1281] EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={22:12}, kref={22:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) VAL [\old(count)=1, count=1, kref={22:12}, kref={22:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1285] RET return 0; VAL [\old(count)=1, \result=0, count=1, kref={22:12}, kref={22:12}, release={-1:0}, release={-1:0}] [L1313] EXPR ldv_kref_sub(kref, 1, release) VAL [kref={22:12}, kref={22:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] RET return ldv_kref_sub(kref, 1, release); VAL [\result=0, kref={22:12}, kref={22:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1363] ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={22:0}, kobj={22:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] FCALL ldv_kobject_put(kobj) - StatisticsResult: Ultimate Automizer benchmark data CFG has 22 procedures, 179 locations, 23 error locations. UNSAFE Result, 59.8s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 25.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4951 SDtfs, 1997 SDslu, 47144 SDs, 0 SdLazy, 14134 SolverSat, 312 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 11.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2367 GetRequests, 1716 SyntacticMatches, 11 SemanticMatches, 640 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4633 ImplicationChecksByTransitivity, 22.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=247occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 32 MinimizatonAttempts, 111 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 18.3s SatisfiabilityAnalysisTime, 14.1s InterpolantComputationTime, 5010 NumberOfCodeBlocks, 4842 NumberOfCodeBlocksAsserted, 64 NumberOfCheckSat, 4774 ConstructedInterpolants, 412 QuantifiedInterpolants, 2678783 SizeOfPredicates, 140 NumberOfNonLiveVariables, 5894 ConjunctsInSsa, 603 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 1324/5358 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-28_22-33-35-114.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_22-33-35-114.csv Received shutdown request...