java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-memsafety/cstrpbrk-alloca_true-valid-memsafety_true-termination.i
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This is Ultimate 0.1.23-acfac67
[2018-01-28 23:24:40,567 INFO L170 SettingsManager]: Resetting all preferences to default values...
[2018-01-28 23:24:40,569 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values
[2018-01-28 23:24:40,583 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2018-01-28 23:24:40,583 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2018-01-28 23:24:40,584 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2018-01-28 23:24:40,585 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2018-01-28 23:24:40,587 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values
[2018-01-28 23:24:40,589 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values
[2018-01-28 23:24:40,590 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values
[2018-01-28 23:24:40,591 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2018-01-28 23:24:40,591 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values
[2018-01-28 23:24:40,592 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2018-01-28 23:24:40,594 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2018-01-28 23:24:40,595 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2018-01-28 23:24:40,597 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2018-01-28 23:24:40,599 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values
[2018-01-28 23:24:40,601 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2018-01-28 23:24:40,602 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2018-01-28 23:24:40,603 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values
[2018-01-28 23:24:40,606 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2018-01-28 23:24:40,606 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2018-01-28 23:24:40,606 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values
[2018-01-28 23:24:40,607 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values
[2018-01-28 23:24:40,608 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values
[2018-01-28 23:24:40,609 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2018-01-28 23:24:40,609 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values
[2018-01-28 23:24:40,610 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring...
[2018-01-28 23:24:40,610 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2018-01-28 23:24:40,610 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values
[2018-01-28 23:24:40,611 INFO L181 SettingsManager]: Finished resetting all preferences to default values...
[2018-01-28 23:24:40,611 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf
[2018-01-28 23:24:40,621 INFO L110 SettingsManager]: Loading preferences was successful
[2018-01-28 23:24:40,621 INFO L112 SettingsManager]: Preferences different from defaults after loading the file:
[2018-01-28 23:24:40,622 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2018-01-28 23:24:40,622 INFO L133 SettingsManager]: * to procedures, called more than once=true
[2018-01-28 23:24:40,622 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults:
[2018-01-28 23:24:40,622 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain
[2018-01-28 23:24:40,622 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true
[2018-01-28 23:24:40,623 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2018-01-28 23:24:40,623 INFO L133 SettingsManager]: * sizeof long=4
[2018-01-28 23:24:40,623 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2018-01-28 23:24:40,624 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true
[2018-01-28 23:24:40,624 INFO L133 SettingsManager]: * sizeof POINTER=4
[2018-01-28 23:24:40,624 INFO L133 SettingsManager]: * Check division by zero=IGNORE
[2018-01-28 23:24:40,624 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true
[2018-01-28 23:24:40,624 INFO L133 SettingsManager]: * Bitprecise bitfields=true
[2018-01-28 23:24:40,624 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true
[2018-01-28 23:24:40,625 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2018-01-28 23:24:40,625 INFO L133 SettingsManager]: * sizeof long double=12
[2018-01-28 23:24:40,625 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2018-01-28 23:24:40,625 INFO L133 SettingsManager]: * Size of a code block=SingleStatement
[2018-01-28 23:24:40,625 INFO L133 SettingsManager]: * To the following directory=./dump/
[2018-01-28 23:24:40,626 INFO L133 SettingsManager]: * Add additional assume for each assert=false
[2018-01-28 23:24:40,626 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode
[2018-01-28 23:24:40,626 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-01-28 23:24:40,626 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2018-01-28 23:24:40,626 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK
[2018-01-28 23:24:40,627 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2018-01-28 23:24:40,627 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2018-01-28 23:24:40,627 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL
[2018-01-28 23:24:40,627 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode
[2018-01-28 23:24:40,627 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2018-01-28 23:24:40,627 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2018-01-28 23:24:40,628 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2018-01-28 23:24:40,628 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR
[2018-01-28 23:24:40,663 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp
[2018-01-28 23:24:40,676 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized
[2018-01-28 23:24:40,679 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected.
[2018-01-28 23:24:40,681 INFO L271 PluginConnector]: Initializing CDTParser...
[2018-01-28 23:24:40,681 INFO L276 PluginConnector]: CDTParser initialized
[2018-01-28 23:24:40,682 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/cstrpbrk-alloca_true-valid-memsafety_true-termination.i
[2018-01-28 23:24:40,857 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2018-01-28 23:24:40,863 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements.
[2018-01-28 23:24:40,864 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2018-01-28 23:24:40,864 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2018-01-28 23:24:40,870 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized
[2018-01-28 23:24:40,871 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:24:40" (1/1) ...
[2018-01-28 23:24:40,873 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@67990aa8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:40, skipping insertion in model container
[2018-01-28 23:24:40,873 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:24:40" (1/1) ...
[2018-01-28 23:24:40,886 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-01-28 23:24:40,924 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-01-28 23:24:41,034 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-01-28 23:24:41,050 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-01-28 23:24:41,057 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41 WrapperNode
[2018-01-28 23:24:41,057 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2018-01-28 23:24:41,058 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2018-01-28 23:24:41,058 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2018-01-28 23:24:41,058 INFO L276 PluginConnector]: Boogie Preprocessor initialized
[2018-01-28 23:24:41,074 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,075 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,086 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,086 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,091 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,096 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,097 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,099 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2018-01-28 23:24:41,100 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2018-01-28 23:24:41,100 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2018-01-28 23:24:41,100 INFO L276 PluginConnector]: RCFGBuilder initialized
[2018-01-28 23:24:41,101 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (1/1) ...
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-01-28 23:24:41,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2018-01-28 23:24:41,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2018-01-28 23:24:41,165 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrpbrk
[2018-01-28 23:24:41,165 INFO L136 BoogieDeclarations]: Found implementation of procedure main
[2018-01-28 23:24:41,165 INFO L128 BoogieDeclarations]: Found specification of procedure write~int
[2018-01-28 23:24:41,165 INFO L128 BoogieDeclarations]: Found specification of procedure read~int
[2018-01-28 23:24:41,165 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free
[2018-01-28 23:24:41,165 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2018-01-28 23:24:41,166 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc
[2018-01-28 23:24:41,166 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2018-01-28 23:24:41,166 INFO L128 BoogieDeclarations]: Found specification of procedure cstrpbrk
[2018-01-28 23:24:41,166 INFO L128 BoogieDeclarations]: Found specification of procedure main
[2018-01-28 23:24:41,166 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2018-01-28 23:24:41,166 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2018-01-28 23:24:41,479 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2018-01-28 23:24:41,480 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:24:41 BoogieIcfgContainer
[2018-01-28 23:24:41,480 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2018-01-28 23:24:41,480 INFO L113 PluginConnector]: ------------------------IcfgTransformer----------------------------
[2018-01-28 23:24:41,480 INFO L271 PluginConnector]: Initializing IcfgTransformer...
[2018-01-28 23:24:41,481 INFO L276 PluginConnector]: IcfgTransformer initialized
[2018-01-28 23:24:41,484 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:24:41" (1/1) ...
[2018-01-28 23:24:41,490 INFO L103 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning
[2018-01-28 23:24:41,490 INFO L104 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int]
[2018-01-28 23:24:41,491 INFO L150 apSepIcfgTransformer]: starting freeze-var-style preprocessing
[2018-01-28 23:24:41,548 INFO L218 apSepIcfgTransformer]: finished preprocessing for the equality analysis
[2018-01-28 23:24:41,609 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2)
[2018-01-28 23:25:17,784 INFO L311 AbstractInterpreter]: Visited 100 different actions 1010 times. Merged at 66 different actions 574 times. Never widened. Found 70 fixpoints after 10 different actions. Largest state had 44 variables.
[2018-01-28 23:25:17,786 INFO L226 apSepIcfgTransformer]: finished equality analysis
[2018-01-28 23:25:17,797 INFO L244 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 7
[2018-01-28 23:25:17,797 INFO L238 apSepIcfgTransformer]: Finished pre analysis before partitioning
[2018-01-28 23:25:17,797 INFO L239 apSepIcfgTransformer]: array groups: Set:
[#memory_int]
[2018-01-28 23:25:17,797 INFO L241 apSepIcfgTransformer]: select infos: Set:
((select (select |v_#memory_int_3| v_cstrpbrk_~s~2.base_3) v_cstrpbrk_~s~2.offset_3), at (SUMMARY for call #t~mem3 := read~int(~s~2.base, ~s~2.offset, 1); srcloc: L548))
((select (select |v_#memory_int_5| v_cstrpbrk_~s~2.base_11) v_cstrpbrk_~s~2.offset_9), at (SUMMARY for call #t~mem7 := read~int(~s~2.base, ~s~2.offset, 1); srcloc: L548'''''''''''''''))
((select |v_#memory_int_11| v_main_~nondetString2~4.base_2), at (SUMMARY for call write~int(0, ~nondetString2~4.base, ~nondetString2~4.offset + (~length2~4 - 1) * 1, 1); srcloc: L566'))
((select (select |v_#memory_int_4| v_cstrpbrk_~s~2.base_6) v_cstrpbrk_~s~2.offset_5), at (SUMMARY for call #t~mem4 := read~int(~s~2.base, ~s~2.offset, 1); srcloc: L548'''))
((select |v_#memory_int_9| v_main_~nondetString1~4.base_2), at (SUMMARY for call write~int(0, ~nondetString1~4.base, ~nondetString1~4.offset + (~length1~4 - 1) * 1, 1); srcloc: L566))
((select (select |v_#memory_int_2| v_cstrpbrk_~sc1~2.base_6) v_cstrpbrk_~sc1~2.offset_5), at (SUMMARY for call #t~mem2 := read~int(~sc1~2.base, ~sc1~2.offset, 1); srcloc: L547))
((select (select |v_#memory_int_1| v_cstrpbrk_~sc1~2.base_3) v_cstrpbrk_~sc1~2.offset_3), at (SUMMARY for call #t~mem1 := read~int(~sc1~2.base, ~sc1~2.offset, 1); srcloc: L545'))
[2018-01-28 23:25:17,818 INFO L544 PartitionManager]: partitioning result:
[2018-01-28 23:25:17,819 INFO L549 PartitionManager]: location blocks for array group [#memory_int]
[2018-01-28 23:25:17,819 INFO L558 PartitionManager]: at dimension 0
[2018-01-28 23:25:17,819 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1
[2018-01-28 23:25:17,819 INFO L560 PartitionManager]: # location blocks :1
[2018-01-28 23:25:17,819 INFO L558 PartitionManager]: at dimension 1
[2018-01-28 23:25:17,820 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1
[2018-01-28 23:25:17,820 INFO L560 PartitionManager]: # location blocks :1
[2018-01-28 23:25:17,921 INFO L86 ransitionTransformer]: executing heap partitioning transformation
[2018-01-28 23:25:17,936 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:25:17 BasicIcfg
[2018-01-28 23:25:17,936 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer----------------------------
[2018-01-28 23:25:17,937 INFO L113 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2018-01-28 23:25:17,937 INFO L271 PluginConnector]: Initializing TraceAbstraction...
[2018-01-28 23:25:17,939 INFO L276 PluginConnector]: TraceAbstraction initialized
[2018-01-28 23:25:17,939 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 11:24:40" (1/4) ...
[2018-01-28 23:25:17,940 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@303b9def and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:25:17, skipping insertion in model container
[2018-01-28 23:25:17,940 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:24:41" (2/4) ...
[2018-01-28 23:25:17,940 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@303b9def and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:25:17, skipping insertion in model container
[2018-01-28 23:25:17,940 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:24:41" (3/4) ...
[2018-01-28 23:25:17,940 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@303b9def and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:25:17, skipping insertion in model container
[2018-01-28 23:25:17,941 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:25:17" (4/4) ...
[2018-01-28 23:25:17,942 INFO L107 eAbstractionObserver]: Analyzing ICFG HeapSeparatedIcfg
[2018-01-28 23:25:17,948 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2018-01-28 23:25:17,954 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 15 error locations.
[2018-01-28 23:25:17,983 INFO L322 AbstractCegarLoop]: Interprodecural is true
[2018-01-28 23:25:17,984 INFO L323 AbstractCegarLoop]: Hoare is true
[2018-01-28 23:25:17,984 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP
[2018-01-28 23:25:17,984 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK
[2018-01-28 23:25:17,984 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2018-01-28 23:25:17,984 INFO L327 AbstractCegarLoop]: Difference is false
[2018-01-28 23:25:17,984 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2018-01-28 23:25:17,985 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2018-01-28 23:25:17,985 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure
[2018-01-28 23:25:17,996 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states.
[2018-01-28 23:25:18,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16
[2018-01-28 23:25:18,000 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:18,001 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:18,001 INFO L371 AbstractCegarLoop]: === Iteration 1 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:18,004 INFO L82 PathProgramCache]: Analyzing trace with hash 162455402, now seen corresponding path program 1 times
[2018-01-28 23:25:18,005 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:18,006 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:18,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,043 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:18,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:18,097 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:18,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:18,216 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:18,216 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-01-28 23:25:18,217 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-01-28 23:25:18,224 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-01-28 23:25:18,225 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-01-28 23:25:18,226 INFO L87 Difference]: Start difference. First operand 90 states. Second operand 4 states.
[2018-01-28 23:25:18,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:18,322 INFO L93 Difference]: Finished difference Result 147 states and 162 transitions.
[2018-01-28 23:25:18,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-01-28 23:25:18,324 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15
[2018-01-28 23:25:18,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:18,334 INFO L225 Difference]: With dead ends: 147
[2018-01-28 23:25:18,334 INFO L226 Difference]: Without dead ends: 86
[2018-01-28 23:25:18,338 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-01-28 23:25:18,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states.
[2018-01-28 23:25:18,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86.
[2018-01-28 23:25:18,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states.
[2018-01-28 23:25:18,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 93 transitions.
[2018-01-28 23:25:18,371 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 93 transitions. Word has length 15
[2018-01-28 23:25:18,372 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:18,372 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 93 transitions.
[2018-01-28 23:25:18,372 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-01-28 23:25:18,372 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 93 transitions.
[2018-01-28 23:25:18,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16
[2018-01-28 23:25:18,372 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:18,373 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:18,373 INFO L371 AbstractCegarLoop]: === Iteration 2 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:18,373 INFO L82 PathProgramCache]: Analyzing trace with hash 162455404, now seen corresponding path program 1 times
[2018-01-28 23:25:18,373 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:18,373 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:18,374 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,374 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:18,374 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:18,390 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:18,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:18,518 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:18,519 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:25:18,520 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:25:18,521 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:25:18,521 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:25:18,521 INFO L87 Difference]: Start difference. First operand 86 states and 93 transitions. Second operand 6 states.
[2018-01-28 23:25:18,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:18,627 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions.
[2018-01-28 23:25:18,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:25:18,627 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15
[2018-01-28 23:25:18,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:18,629 INFO L225 Difference]: With dead ends: 86
[2018-01-28 23:25:18,629 INFO L226 Difference]: Without dead ends: 85
[2018-01-28 23:25:18,630 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42
[2018-01-28 23:25:18,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states.
[2018-01-28 23:25:18,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85.
[2018-01-28 23:25:18,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states.
[2018-01-28 23:25:18,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 92 transitions.
[2018-01-28 23:25:18,641 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 92 transitions. Word has length 15
[2018-01-28 23:25:18,641 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:18,641 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 92 transitions.
[2018-01-28 23:25:18,641 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:25:18,641 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 92 transitions.
[2018-01-28 23:25:18,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17
[2018-01-28 23:25:18,642 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:18,642 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:18,642 INFO L371 AbstractCegarLoop]: === Iteration 3 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:18,643 INFO L82 PathProgramCache]: Analyzing trace with hash 741150561, now seen corresponding path program 1 times
[2018-01-28 23:25:18,643 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:18,643 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:18,644 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,644 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:18,644 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:18,656 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:18,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:18,682 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:18,682 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-01-28 23:25:18,683 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-01-28 23:25:18,683 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-01-28 23:25:18,683 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-01-28 23:25:18,683 INFO L87 Difference]: Start difference. First operand 85 states and 92 transitions. Second operand 4 states.
[2018-01-28 23:25:18,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:18,765 INFO L93 Difference]: Finished difference Result 85 states and 92 transitions.
[2018-01-28 23:25:18,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-01-28 23:25:18,765 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16
[2018-01-28 23:25:18,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:18,766 INFO L225 Difference]: With dead ends: 85
[2018-01-28 23:25:18,766 INFO L226 Difference]: Without dead ends: 84
[2018-01-28 23:25:18,767 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-01-28 23:25:18,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states.
[2018-01-28 23:25:18,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84.
[2018-01-28 23:25:18,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states.
[2018-01-28 23:25:18,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 91 transitions.
[2018-01-28 23:25:18,773 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 91 transitions. Word has length 16
[2018-01-28 23:25:18,773 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:18,773 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 91 transitions.
[2018-01-28 23:25:18,774 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-01-28 23:25:18,774 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 91 transitions.
[2018-01-28 23:25:18,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17
[2018-01-28 23:25:18,774 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:18,774 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:18,775 INFO L371 AbstractCegarLoop]: === Iteration 4 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:18,775 INFO L82 PathProgramCache]: Analyzing trace with hash 741150563, now seen corresponding path program 1 times
[2018-01-28 23:25:18,775 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:18,775 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:18,776 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,776 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:18,776 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:18,787 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:18,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:18,845 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:18,845 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-01-28 23:25:18,845 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-01-28 23:25:18,845 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-01-28 23:25:18,845 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-01-28 23:25:18,846 INFO L87 Difference]: Start difference. First operand 84 states and 91 transitions. Second operand 5 states.
[2018-01-28 23:25:18,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:18,881 INFO L93 Difference]: Finished difference Result 84 states and 91 transitions.
[2018-01-28 23:25:18,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:25:18,882 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16
[2018-01-28 23:25:18,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:18,883 INFO L225 Difference]: With dead ends: 84
[2018-01-28 23:25:18,883 INFO L226 Difference]: Without dead ends: 83
[2018-01-28 23:25:18,883 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:25:18,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states.
[2018-01-28 23:25:18,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83.
[2018-01-28 23:25:18,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states.
[2018-01-28 23:25:18,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 90 transitions.
[2018-01-28 23:25:18,888 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 90 transitions. Word has length 16
[2018-01-28 23:25:18,889 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:18,889 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 90 transitions.
[2018-01-28 23:25:18,889 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-01-28 23:25:18,889 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 90 transitions.
[2018-01-28 23:25:18,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25
[2018-01-28 23:25:18,890 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:18,890 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:18,890 INFO L371 AbstractCegarLoop]: === Iteration 5 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:18,891 INFO L82 PathProgramCache]: Analyzing trace with hash 419239665, now seen corresponding path program 1 times
[2018-01-28 23:25:18,891 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:18,891 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:18,892 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,892 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:18,892 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:18,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:18,905 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:19,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:19,011 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:19,011 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:25:19,011 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:25:19,011 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:25:19,012 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:25:19,012 INFO L87 Difference]: Start difference. First operand 83 states and 90 transitions. Second operand 6 states.
[2018-01-28 23:25:19,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:19,219 INFO L93 Difference]: Finished difference Result 83 states and 90 transitions.
[2018-01-28 23:25:19,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-28 23:25:19,220 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24
[2018-01-28 23:25:19,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:19,221 INFO L225 Difference]: With dead ends: 83
[2018-01-28 23:25:19,221 INFO L226 Difference]: Without dead ends: 69
[2018-01-28 23:25:19,221 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2018-01-28 23:25:19,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states.
[2018-01-28 23:25:19,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69.
[2018-01-28 23:25:19,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states.
[2018-01-28 23:25:19,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 74 transitions.
[2018-01-28 23:25:19,259 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 74 transitions. Word has length 24
[2018-01-28 23:25:19,259 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:19,259 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 74 transitions.
[2018-01-28 23:25:19,259 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:25:19,260 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 74 transitions.
[2018-01-28 23:25:19,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26
[2018-01-28 23:25:19,260 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:19,260 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:19,260 INFO L371 AbstractCegarLoop]: === Iteration 6 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:19,260 INFO L82 PathProgramCache]: Analyzing trace with hash 1816414242, now seen corresponding path program 1 times
[2018-01-28 23:25:19,261 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:19,261 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:19,261 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,261 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:19,261 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:19,269 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:19,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:19,309 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:19,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:25:19,310 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:25:19,310 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:25:19,310 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:25:19,310 INFO L87 Difference]: Start difference. First operand 69 states and 74 transitions. Second operand 6 states.
[2018-01-28 23:25:19,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:19,388 INFO L93 Difference]: Finished difference Result 73 states and 78 transitions.
[2018-01-28 23:25:19,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:25:19,389 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25
[2018-01-28 23:25:19,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:19,390 INFO L225 Difference]: With dead ends: 73
[2018-01-28 23:25:19,390 INFO L226 Difference]: Without dead ends: 71
[2018-01-28 23:25:19,390 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56
[2018-01-28 23:25:19,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states.
[2018-01-28 23:25:19,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 70.
[2018-01-28 23:25:19,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states.
[2018-01-28 23:25:19,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions.
[2018-01-28 23:25:19,397 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 25
[2018-01-28 23:25:19,397 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:19,397 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions.
[2018-01-28 23:25:19,397 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:25:19,397 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions.
[2018-01-28 23:25:19,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26
[2018-01-28 23:25:19,398 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:19,398 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:19,399 INFO L371 AbstractCegarLoop]: === Iteration 7 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:19,399 INFO L82 PathProgramCache]: Analyzing trace with hash 1816414244, now seen corresponding path program 1 times
[2018-01-28 23:25:19,399 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:19,399 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:19,400 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,400 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:19,400 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:19,410 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:19,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:19,538 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:19,538 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-01-28 23:25:19,539 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-01-28 23:25:19,539 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-01-28 23:25:19,539 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72
[2018-01-28 23:25:19,539 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 9 states.
[2018-01-28 23:25:19,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:19,653 INFO L93 Difference]: Finished difference Result 105 states and 112 transitions.
[2018-01-28 23:25:19,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2018-01-28 23:25:19,653 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 25
[2018-01-28 23:25:19,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:19,654 INFO L225 Difference]: With dead ends: 105
[2018-01-28 23:25:19,654 INFO L226 Difference]: Without dead ends: 103
[2018-01-28 23:25:19,654 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156
[2018-01-28 23:25:19,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states.
[2018-01-28 23:25:19,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 74.
[2018-01-28 23:25:19,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states.
[2018-01-28 23:25:19,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 79 transitions.
[2018-01-28 23:25:19,659 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 79 transitions. Word has length 25
[2018-01-28 23:25:19,659 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:19,659 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 79 transitions.
[2018-01-28 23:25:19,659 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-01-28 23:25:19,660 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 79 transitions.
[2018-01-28 23:25:19,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34
[2018-01-28 23:25:19,660 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:19,660 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:19,660 INFO L371 AbstractCegarLoop]: === Iteration 8 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:19,660 INFO L82 PathProgramCache]: Analyzing trace with hash -124406480, now seen corresponding path program 1 times
[2018-01-28 23:25:19,661 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:19,661 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:19,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,661 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:19,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:19,671 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:19,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:19,722 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:19,722 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:25:19,722 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:25:19,722 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:25:19,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:25:19,723 INFO L87 Difference]: Start difference. First operand 74 states and 79 transitions. Second operand 6 states.
[2018-01-28 23:25:19,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:19,801 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions.
[2018-01-28 23:25:19,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:25:19,802 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33
[2018-01-28 23:25:19,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:19,803 INFO L225 Difference]: With dead ends: 78
[2018-01-28 23:25:19,803 INFO L226 Difference]: Without dead ends: 75
[2018-01-28 23:25:19,803 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56
[2018-01-28 23:25:19,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states.
[2018-01-28 23:25:19,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 74.
[2018-01-28 23:25:19,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states.
[2018-01-28 23:25:19,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 80 transitions.
[2018-01-28 23:25:19,810 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 80 transitions. Word has length 33
[2018-01-28 23:25:19,810 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:19,810 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 80 transitions.
[2018-01-28 23:25:19,810 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:25:19,811 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions.
[2018-01-28 23:25:19,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34
[2018-01-28 23:25:19,811 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:19,812 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:19,812 INFO L371 AbstractCegarLoop]: === Iteration 9 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:19,812 INFO L82 PathProgramCache]: Analyzing trace with hash -124406478, now seen corresponding path program 1 times
[2018-01-28 23:25:19,812 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:19,812 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:19,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,813 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:19,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:19,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:19,824 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:19,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:19,912 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:19,912 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-01-28 23:25:19,912 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-01-28 23:25:19,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-01-28 23:25:19,913 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72
[2018-01-28 23:25:19,913 INFO L87 Difference]: Start difference. First operand 74 states and 80 transitions. Second operand 9 states.
[2018-01-28 23:25:20,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:20,002 INFO L93 Difference]: Finished difference Result 103 states and 110 transitions.
[2018-01-28 23:25:20,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-28 23:25:20,002 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33
[2018-01-28 23:25:20,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:20,003 INFO L225 Difference]: With dead ends: 103
[2018-01-28 23:25:20,003 INFO L226 Difference]: Without dead ends: 100
[2018-01-28 23:25:20,004 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132
[2018-01-28 23:25:20,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states.
[2018-01-28 23:25:20,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 83.
[2018-01-28 23:25:20,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states.
[2018-01-28 23:25:20,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 90 transitions.
[2018-01-28 23:25:20,009 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 90 transitions. Word has length 33
[2018-01-28 23:25:20,009 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:20,009 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 90 transitions.
[2018-01-28 23:25:20,009 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-01-28 23:25:20,009 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 90 transitions.
[2018-01-28 23:25:20,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45
[2018-01-28 23:25:20,010 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:20,010 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:20,010 INFO L371 AbstractCegarLoop]: === Iteration 10 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:20,011 INFO L82 PathProgramCache]: Analyzing trace with hash -2033440913, now seen corresponding path program 1 times
[2018-01-28 23:25:20,011 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:20,011 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:20,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:20,012 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:20,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:20,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:20,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:20,054 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:25:20,054 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:20,054 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-01-28 23:25:20,055 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states
[2018-01-28 23:25:20,055 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2018-01-28 23:25:20,055 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-01-28 23:25:20,055 INFO L87 Difference]: Start difference. First operand 83 states and 90 transitions. Second operand 3 states.
[2018-01-28 23:25:20,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:20,079 INFO L93 Difference]: Finished difference Result 133 states and 146 transitions.
[2018-01-28 23:25:20,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2018-01-28 23:25:20,080 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44
[2018-01-28 23:25:20,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:20,080 INFO L225 Difference]: With dead ends: 133
[2018-01-28 23:25:20,081 INFO L226 Difference]: Without dead ends: 85
[2018-01-28 23:25:20,081 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-01-28 23:25:20,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states.
[2018-01-28 23:25:20,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85.
[2018-01-28 23:25:20,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states.
[2018-01-28 23:25:20,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 92 transitions.
[2018-01-28 23:25:20,097 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 92 transitions. Word has length 44
[2018-01-28 23:25:20,097 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:20,097 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 92 transitions.
[2018-01-28 23:25:20,097 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states.
[2018-01-28 23:25:20,097 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 92 transitions.
[2018-01-28 23:25:20,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47
[2018-01-28 23:25:20,098 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:20,099 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:20,099 INFO L371 AbstractCegarLoop]: === Iteration 11 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:20,099 INFO L82 PathProgramCache]: Analyzing trace with hash -1413679037, now seen corresponding path program 1 times
[2018-01-28 23:25:20,099 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:20,099 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:20,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:20,100 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:20,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:20,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:25:20,114 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:25:20,170 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-01-28 23:25:20,171 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:25:20,171 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-28 23:25:20,171 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-28 23:25:20,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-28 23:25:20,172 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-28 23:25:20,172 INFO L87 Difference]: Start difference. First operand 85 states and 92 transitions. Second operand 7 states.
[2018-01-28 23:25:20,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:25:20,254 INFO L93 Difference]: Finished difference Result 85 states and 92 transitions.
[2018-01-28 23:25:20,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-01-28 23:25:20,255 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 46
[2018-01-28 23:25:20,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:25:20,256 INFO L225 Difference]: With dead ends: 85
[2018-01-28 23:25:20,256 INFO L226 Difference]: Without dead ends: 84
[2018-01-28 23:25:20,256 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90
[2018-01-28 23:25:20,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states.
[2018-01-28 23:25:20,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84.
[2018-01-28 23:25:20,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states.
[2018-01-28 23:25:20,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 91 transitions.
[2018-01-28 23:25:20,262 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 91 transitions. Word has length 46
[2018-01-28 23:25:20,263 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:25:20,263 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 91 transitions.
[2018-01-28 23:25:20,263 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-28 23:25:20,263 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 91 transitions.
[2018-01-28 23:25:20,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47
[2018-01-28 23:25:20,264 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:25:20,264 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:25:20,264 INFO L371 AbstractCegarLoop]: === Iteration 12 === [cstrpbrkErr3RequiresViolation, cstrpbrkErr1RequiresViolation, cstrpbrkErr9RequiresViolation, cstrpbrkErr7RequiresViolation, cstrpbrkErr2RequiresViolation, cstrpbrkErr8RequiresViolation, cstrpbrkErr4RequiresViolation, cstrpbrkErr0RequiresViolation, cstrpbrkErr6RequiresViolation, cstrpbrkErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:25:20,264 INFO L82 PathProgramCache]: Analyzing trace with hash -1413679035, now seen corresponding path program 1 times
[2018-01-28 23:25:20,265 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:25:20,265 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:25:20,265 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:20,266 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:25:20,266 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:25:20,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-01-28 23:25:20,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-01-28 23:25:20,331 INFO L389 BasicCegarLoop]: Counterexample might be feasible
[2018-01-28 23:25:20,334 INFO L84 mationBacktranslator]: Skipped ATE [401] [401] ULTIMATE.startENTRY-->L1: Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base]
[2018-01-28 23:25:20,335 INFO L84 mationBacktranslator]: Skipped ATE [407] [407] L1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,335 INFO L84 mationBacktranslator]: Skipped ATE [413] [413] mainENTRY-->L556: Formula: (and (<= 0 (+ |v_main_#t~nondet8_1| 2147483648)) (<= |v_main_#t~nondet8_1| 2147483647)) InVars {main_#t~nondet8=|v_main_#t~nondet8_1|} OutVars{main_#t~nondet8=|v_main_#t~nondet8_1|} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,335 INFO L84 mationBacktranslator]: Skipped ATE [417] [417] L556-->L556': Formula: (= v_main_~length1~4_1 |v_main_#t~nondet8_2|) InVars {main_#t~nondet8=|v_main_#t~nondet8_2|} OutVars{main_#t~nondet8=|v_main_#t~nondet8_2|, main_~length1~4=v_main_~length1~4_1} AuxVars[] AssignedVars[main_~length1~4]
[2018-01-28 23:25:20,335 INFO L84 mationBacktranslator]: Skipped ATE [421] [421] L556'-->L557: Formula: true InVars {} OutVars{main_#t~nondet8=|v_main_#t~nondet8_3|} AuxVars[] AssignedVars[main_#t~nondet8]
[2018-01-28 23:25:20,335 INFO L84 mationBacktranslator]: Skipped ATE [423] [423] L557-->L557': Formula: (and (<= |v_main_#t~nondet9_1| 2147483647) (<= 0 (+ |v_main_#t~nondet9_1| 2147483648))) InVars {main_#t~nondet9=|v_main_#t~nondet9_1|} OutVars{main_#t~nondet9=|v_main_#t~nondet9_1|} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,335 INFO L84 mationBacktranslator]: Skipped ATE [425] [425] L557'-->L557'': Formula: (= v_main_~length2~4_1 |v_main_#t~nondet9_2|) InVars {main_#t~nondet9=|v_main_#t~nondet9_2|} OutVars{main_#t~nondet9=|v_main_#t~nondet9_2|, main_~length2~4=v_main_~length2~4_1} AuxVars[] AssignedVars[main_~length2~4]
[2018-01-28 23:25:20,336 INFO L84 mationBacktranslator]: Skipped ATE [427] [427] L557''-->L558: Formula: true InVars {} OutVars{main_#t~nondet9=|v_main_#t~nondet9_3|} AuxVars[] AssignedVars[main_#t~nondet9]
[2018-01-28 23:25:20,336 INFO L84 mationBacktranslator]: Skipped ATE [431] [431] L558-->L558'': Formula: (not (< v_main_~length1~4_4 1)) InVars {main_~length1~4=v_main_~length1~4_4} OutVars{main_~length1~4=v_main_~length1~4_4} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,336 INFO L84 mationBacktranslator]: Skipped ATE [437] [437] L558''-->L561': Formula: (not (< v_main_~length2~4_4 1)) InVars {main_~length2~4=v_main_~length2~4_4} OutVars{main_~length2~4=v_main_~length2~4_4} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,336 INFO L84 mationBacktranslator]: Skipped ATE [441] [441] L561'-->L564: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_main_#t~malloc10.base_1| v_main_~length1~4_5)) (= |v_#valid_17| (store |v_#valid_18| |v_main_#t~malloc10.base_1| 1)) (not (= 0 |v_main_#t~malloc10.base_1|)) (= |v_main_#t~malloc10.offset_1| 0) (= (select |v_#valid_18| |v_main_#t~malloc10.base_1|) 0)) InVars {#length=|v_#length_14|, main_~length1~4=v_main_~length1~4_5, #valid=|v_#valid_18|} OutVars{#length=|v_#length_13|, main_#t~malloc10.offset=|v_main_#t~malloc10.offset_1|, main_~length1~4=v_main_~length1~4_5, main_#t~malloc10.base=|v_main_#t~malloc10.base_1|, #valid=|v_#valid_17|} AuxVars[] AssignedVars[#valid, #length, main_#t~malloc10.offset, main_#t~malloc10.base]
[2018-01-28 23:25:20,336 INFO L84 mationBacktranslator]: Skipped ATE [443] [443] L564-->L565: Formula: (and (= v_main_~nondetString1~4.base_1 |v_main_#t~malloc10.base_2|) (= v_main_~nondetString1~4.offset_1 |v_main_#t~malloc10.offset_2|)) InVars {main_#t~malloc10.base=|v_main_#t~malloc10.base_2|, main_#t~malloc10.offset=|v_main_#t~malloc10.offset_2|} OutVars{main_#t~malloc10.offset=|v_main_#t~malloc10.offset_2|, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_1, main_#t~malloc10.base=|v_main_#t~malloc10.base_2|, main_~nondetString1~4.base=v_main_~nondetString1~4.base_1} AuxVars[] AssignedVars[main_~nondetString1~4.base, main_~nondetString1~4.offset]
[2018-01-28 23:25:20,336 INFO L84 mationBacktranslator]: Skipped ATE [445] [445] L565-->L565': Formula: (and (= |v_#valid_19| (store |v_#valid_20| |v_main_#t~malloc11.base_1| 1)) (= |v_main_#t~malloc11.offset_1| 0) (not (= |v_main_#t~malloc11.base_1| 0)) (= 0 (select |v_#valid_20| |v_main_#t~malloc11.base_1|)) (= |v_#length_15| (store |v_#length_16| |v_main_#t~malloc11.base_1| v_main_~length2~4_5))) InVars {main_~length2~4=v_main_~length2~4_5, #length=|v_#length_16|, #valid=|v_#valid_20|} OutVars{main_~length2~4=v_main_~length2~4_5, #length=|v_#length_15|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_1|, main_#t~malloc11.base=|v_main_#t~malloc11.base_1|, #valid=|v_#valid_19|} AuxVars[] AssignedVars[#valid, #length, main_#t~malloc11.offset, main_#t~malloc11.base]
[2018-01-28 23:25:20,337 INFO L84 mationBacktranslator]: Skipped ATE [447] [447] L565'-->L566: Formula: (and (= v_main_~nondetString2~4.base_1 |v_main_#t~malloc11.base_2|) (= v_main_~nondetString2~4.offset_1 |v_main_#t~malloc11.offset_2|)) InVars {main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|} OutVars{main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_1, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|, main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_~nondetString2~4.base=v_main_~nondetString2~4.base_1} AuxVars[] AssignedVars[main_~nondetString2~4.offset, main_~nondetString2~4.base]
[2018-01-28 23:25:20,337 INFO L84 mationBacktranslator]: Skipped ATE [449] [449] L566-->L566': Formula: (let ((.cse0 (+ v_main_~length1~4_6 v_main_~nondetString1~4.offset_2))) (and (= |v_#memory_int_part_locs_0_locs_0_1| |v_#memory_int_part_locs_0_locs_0_2|) (= (select |v_#valid_21| v_main_~nondetString1~4.base_2) 1) (<= 1 .cse0) (<= .cse0 (select |v_#length_17| v_main_~nondetString1~4.base_2)))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_2|, main_~length1~4=v_main_~length1~4_6, main_~nondetString1~4.base=v_main_~nondetString1~4.base_2, #valid=|v_#valid_21|, #length=|v_#length_17|, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_2} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_1|, main_~length1~4=v_main_~length1~4_6, main_~nondetString1~4.base=v_main_~nondetString1~4.base_2, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_8|, #length=|v_#length_17|, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_2} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int]
[2018-01-28 23:25:20,337 INFO L84 mationBacktranslator]: Skipped ATE [455] [455] L566'-->L567: Formula: (let ((.cse0 (+ v_main_~nondetString2~4.offset_2 v_main_~length2~4_6))) (and (<= .cse0 (select |v_#length_19| v_main_~nondetString2~4.base_2)) (= 1 (select |v_#valid_23| v_main_~nondetString2~4.base_2)) (= |v_#memory_int_part_locs_0_locs_0_3| |v_#memory_int_part_locs_0_locs_0_4|) (<= 1 .cse0))) InVars {main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_2, #memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_3|, #valid=|v_#valid_23|, main_~length2~4=v_main_~length2~4_6, #length=|v_#length_19|, main_~nondetString2~4.base=v_main_~nondetString2~4.base_2} OutVars{main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_2, #memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_4|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_10|, main_~length2~4=v_main_~length2~4_6, #length=|v_#length_19|, main_~nondetString2~4.base=v_main_~nondetString2~4.base_2} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int]
[2018-01-28 23:25:20,337 INFO L84 mationBacktranslator]: Skipped ATE [463] [463] L567-->cstrpbrkENTRY: Formula: (and (= |v_cstrpbrk_#in~s2.baseInParam_1| v_main_~nondetString2~4.base_6) (= |v_cstrpbrk_#in~s1.baseInParam_1| v_main_~nondetString1~4.base_6) (= |v_cstrpbrk_#in~s1.offsetInParam_1| v_main_~nondetString1~4.offset_5) (= |v_cstrpbrk_#in~s2.offsetInParam_1| v_main_~nondetString2~4.offset_5)) InVars {main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_5, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_5, main_~nondetString1~4.base=v_main_~nondetString1~4.base_6, main_~nondetString2~4.base=v_main_~nondetString2~4.base_6} OutVars{cstrpbrk_#in~s1.offset=|v_cstrpbrk_#in~s1.offsetInParam_1|, cstrpbrk_#in~s2.base=|v_cstrpbrk_#in~s2.baseInParam_1|, cstrpbrk_#in~s1.base=|v_cstrpbrk_#in~s1.baseInParam_1|, cstrpbrk_#in~s2.offset=|v_cstrpbrk_#in~s2.offsetInParam_1|} AuxVars[] AssignedVars[cstrpbrk_#in~s2.base, cstrpbrk_#in~s1.base, cstrpbrk_#in~s1.offset, cstrpbrk_#in~s2.offset]
[2018-01-28 23:25:20,337 INFO L84 mationBacktranslator]: Skipped ATE [467] [467] cstrpbrkENTRY-->L540: Formula: (and (= v_cstrpbrk_~s1.offset_1 |v_cstrpbrk_#in~s1.offset_1|) (= v_cstrpbrk_~s1.base_1 |v_cstrpbrk_#in~s1.base_1|)) InVars {cstrpbrk_#in~s1.offset=|v_cstrpbrk_#in~s1.offset_1|, cstrpbrk_#in~s1.base=|v_cstrpbrk_#in~s1.base_1|} OutVars{cstrpbrk_#in~s1.offset=|v_cstrpbrk_#in~s1.offset_1|, cstrpbrk_#in~s1.base=|v_cstrpbrk_#in~s1.base_1|, cstrpbrk_~s1.base=v_cstrpbrk_~s1.base_1, cstrpbrk_~s1.offset=v_cstrpbrk_~s1.offset_1} AuxVars[] AssignedVars[cstrpbrk_~s1.base, cstrpbrk_~s1.offset]
[2018-01-28 23:25:20,337 INFO L84 mationBacktranslator]: Skipped ATE [471] [471] L540-->L542: Formula: (and (= v_cstrpbrk_~s2.offset_1 |v_cstrpbrk_#in~s2.offset_1|) (= v_cstrpbrk_~s2.base_1 |v_cstrpbrk_#in~s2.base_1|)) InVars {cstrpbrk_#in~s2.offset=|v_cstrpbrk_#in~s2.offset_1|, cstrpbrk_#in~s2.base=|v_cstrpbrk_#in~s2.base_1|} OutVars{cstrpbrk_~s2.offset=v_cstrpbrk_~s2.offset_1, cstrpbrk_#in~s2.base=|v_cstrpbrk_#in~s2.base_1|, cstrpbrk_#in~s2.offset=|v_cstrpbrk_#in~s2.offset_1|, cstrpbrk_~s2.base=v_cstrpbrk_~s2.base_1} AuxVars[] AssignedVars[cstrpbrk_~s2.base, cstrpbrk_~s2.offset]
[2018-01-28 23:25:20,338 INFO L84 mationBacktranslator]: Skipped ATE [475] [475] L542-->L543: Formula: true InVars {} OutVars{cstrpbrk_~sc1~2.offset=v_cstrpbrk_~sc1~2.offset_1, cstrpbrk_~sc1~2.base=v_cstrpbrk_~sc1~2.base_1} AuxVars[] AssignedVars[cstrpbrk_~sc1~2.offset, cstrpbrk_~sc1~2.base]
[2018-01-28 23:25:20,338 INFO L84 mationBacktranslator]: Skipped ATE [479] [479] L543-->L544: Formula: true InVars {} OutVars{cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_1, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_1} AuxVars[] AssignedVars[cstrpbrk_~s~2.base, cstrpbrk_~s~2.offset]
[2018-01-28 23:25:20,338 INFO L84 mationBacktranslator]: Skipped ATE [483] [483] L544-->L545: Formula: true InVars {} OutVars{cstrpbrk_~c~2=v_cstrpbrk_~c~2_1} AuxVars[] AssignedVars[cstrpbrk_~c~2]
[2018-01-28 23:25:20,338 INFO L84 mationBacktranslator]: Skipped ATE [487] [487] L545-->L545''''''''': Formula: (and (= v_cstrpbrk_~sc1~2.offset_2 v_cstrpbrk_~s1.offset_2) (= v_cstrpbrk_~sc1~2.base_2 v_cstrpbrk_~s1.base_2)) InVars {cstrpbrk_~s1.base=v_cstrpbrk_~s1.base_2, cstrpbrk_~s1.offset=v_cstrpbrk_~s1.offset_2} OutVars{cstrpbrk_~sc1~2.offset=v_cstrpbrk_~sc1~2.offset_2, cstrpbrk_~sc1~2.base=v_cstrpbrk_~sc1~2.base_2, cstrpbrk_~s1.base=v_cstrpbrk_~s1.base_2, cstrpbrk_~s1.offset=v_cstrpbrk_~s1.offset_2} AuxVars[] AssignedVars[cstrpbrk_~sc1~2.offset, cstrpbrk_~sc1~2.base]
[2018-01-28 23:25:20,338 INFO L84 mationBacktranslator]: Skipped ATE [493] [493] L545'''''''''-->L545': Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,339 INFO L84 mationBacktranslator]: Skipped ATE [497] [497] L545'-->L545'': Formula: (and (<= 0 v_cstrpbrk_~sc1~2.offset_3) (= |v_cstrpbrk_#t~mem1_1| (select (select |v_#memory_int_part_locs_0_locs_0_5| v_cstrpbrk_~sc1~2.base_3) v_cstrpbrk_~sc1~2.offset_3)) (= 1 (select |v_#valid_3| v_cstrpbrk_~sc1~2.base_3)) (<= (+ v_cstrpbrk_~sc1~2.offset_3 1) (select |v_#length_1| v_cstrpbrk_~sc1~2.base_3))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, cstrpbrk_~sc1~2.offset=v_cstrpbrk_~sc1~2.offset_3, #length=|v_#length_1|, cstrpbrk_~sc1~2.base=v_cstrpbrk_~sc1~2.base_3, #valid=|v_#valid_3|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, cstrpbrk_~sc1~2.offset=v_cstrpbrk_~sc1~2.offset_3, cstrpbrk_~sc1~2.base=v_cstrpbrk_~sc1~2.base_3, #valid=|v_#valid_3|, cstrpbrk_#t~mem1=|v_cstrpbrk_#t~mem1_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[cstrpbrk_#t~mem1]
[2018-01-28 23:25:20,339 INFO L84 mationBacktranslator]: Skipped ATE [507] [507] L545''-->L545''''': Formula: (not (= 0 |v_cstrpbrk_#t~mem1_4|)) InVars {cstrpbrk_#t~mem1=|v_cstrpbrk_#t~mem1_4|} OutVars{cstrpbrk_#t~mem1=|v_cstrpbrk_#t~mem1_4|} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,339 INFO L84 mationBacktranslator]: Skipped ATE [513] [513] L545'''''-->L546: Formula: true InVars {} OutVars{cstrpbrk_#t~mem1=|v_cstrpbrk_#t~mem1_5|} AuxVars[] AssignedVars[cstrpbrk_#t~mem1]
[2018-01-28 23:25:20,339 INFO L84 mationBacktranslator]: Skipped ATE [515] [515] L546-->L547: Formula: (and (= v_cstrpbrk_~s~2.base_2 v_cstrpbrk_~s2.base_2) (= v_cstrpbrk_~s~2.offset_2 v_cstrpbrk_~s2.offset_2)) InVars {cstrpbrk_~s2.offset=v_cstrpbrk_~s2.offset_2, cstrpbrk_~s2.base=v_cstrpbrk_~s2.base_2} OutVars{cstrpbrk_~s2.offset=v_cstrpbrk_~s2.offset_2, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_2, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_2, cstrpbrk_~s2.base=v_cstrpbrk_~s2.base_2} AuxVars[] AssignedVars[cstrpbrk_~s~2.base, cstrpbrk_~s~2.offset]
[2018-01-28 23:25:20,339 INFO L84 mationBacktranslator]: Skipped ATE [517] [517] L547-->L547': Formula: (and (<= (+ v_cstrpbrk_~sc1~2.offset_5 1) (select |v_#length_3| v_cstrpbrk_~sc1~2.base_6)) (<= 0 v_cstrpbrk_~sc1~2.offset_5) (= |v_cstrpbrk_#t~mem2_1| (select (select |v_#memory_int_part_locs_0_locs_0_6| v_cstrpbrk_~sc1~2.base_6) v_cstrpbrk_~sc1~2.offset_5)) (= (select |v_#valid_5| v_cstrpbrk_~sc1~2.base_6) 1)) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_6|, cstrpbrk_~sc1~2.offset=v_cstrpbrk_~sc1~2.offset_5, #length=|v_#length_3|, cstrpbrk_~sc1~2.base=v_cstrpbrk_~sc1~2.base_6, #valid=|v_#valid_5|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_6|, cstrpbrk_~sc1~2.offset=v_cstrpbrk_~sc1~2.offset_5, cstrpbrk_~sc1~2.base=v_cstrpbrk_~sc1~2.base_6, #valid=|v_#valid_5|, cstrpbrk_#t~mem2=|v_cstrpbrk_#t~mem2_1|, #length=|v_#length_3|} AuxVars[] AssignedVars[cstrpbrk_#t~mem2]
[2018-01-28 23:25:20,339 INFO L84 mationBacktranslator]: Skipped ATE [523] [523] L547'-->L547'': Formula: (= v_cstrpbrk_~c~2_2 |v_cstrpbrk_#t~mem2_2|) InVars {cstrpbrk_#t~mem2=|v_cstrpbrk_#t~mem2_2|} OutVars{cstrpbrk_#t~mem2=|v_cstrpbrk_#t~mem2_2|, cstrpbrk_~c~2=v_cstrpbrk_~c~2_2} AuxVars[] AssignedVars[cstrpbrk_~c~2]
[2018-01-28 23:25:20,339 INFO L84 mationBacktranslator]: Skipped ATE [525] [525] L547''-->L548'''''''''''''': Formula: true InVars {} OutVars{cstrpbrk_#t~mem2=|v_cstrpbrk_#t~mem2_3|} AuxVars[] AssignedVars[cstrpbrk_#t~mem2]
[2018-01-28 23:25:20,340 INFO L84 mationBacktranslator]: Skipped ATE [527] [527] L548''''''''''''''-->L548: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,340 INFO L84 mationBacktranslator]: Skipped ATE [531] [531] L548-->L548': Formula: (and (<= (+ v_cstrpbrk_~s~2.offset_3 1) (select |v_#length_5| v_cstrpbrk_~s~2.base_3)) (= 1 (select |v_#valid_7| v_cstrpbrk_~s~2.base_3)) (<= 0 v_cstrpbrk_~s~2.offset_3) (= (select (select |v_#memory_int_part_locs_0_locs_0_7| v_cstrpbrk_~s~2.base_3) v_cstrpbrk_~s~2.offset_3) |v_cstrpbrk_#t~mem3_1|)) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_7|, #length=|v_#length_5|, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_3, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_3, #valid=|v_#valid_7|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_7|, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_3, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_3, #valid=|v_#valid_7|, #length=|v_#length_5|, cstrpbrk_#t~mem3=|v_cstrpbrk_#t~mem3_1|} AuxVars[] AssignedVars[cstrpbrk_#t~mem3]
[2018-01-28 23:25:20,340 INFO L84 mationBacktranslator]: Skipped ATE [543] [543] L548'-->L548'': Formula: (let ((.cse0 (= 0 |v_cstrpbrk_#t~mem3_2|))) (or (and .cse0 (not |v_cstrpbrk_#t~short5_1|)) (and |v_cstrpbrk_#t~short5_1| (not .cse0)))) InVars {cstrpbrk_#t~mem3=|v_cstrpbrk_#t~mem3_2|} OutVars{cstrpbrk_#t~short5=|v_cstrpbrk_#t~short5_1|, cstrpbrk_#t~mem3=|v_cstrpbrk_#t~mem3_2|} AuxVars[] AssignedVars[cstrpbrk_#t~short5]
[2018-01-28 23:25:20,340 INFO L84 mationBacktranslator]: Skipped ATE [549] [549] L548''-->L548''': Formula: |v_cstrpbrk_#t~short5_2| InVars {cstrpbrk_#t~short5=|v_cstrpbrk_#t~short5_2|} OutVars{cstrpbrk_#t~short5=|v_cstrpbrk_#t~short5_2|} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,340 INFO L84 mationBacktranslator]: Skipped ATE [557] [557] L548'''-->L548'''': Formula: (and (= (select |v_#valid_9| v_cstrpbrk_~s~2.base_6) 1) (<= (+ v_cstrpbrk_~s~2.offset_5 1) (select |v_#length_7| v_cstrpbrk_~s~2.base_6)) (= (select (select |v_#memory_int_part_locs_0_locs_0_9| v_cstrpbrk_~s~2.base_6) v_cstrpbrk_~s~2.offset_5) |v_cstrpbrk_#t~mem4_1|) (<= 0 v_cstrpbrk_~s~2.offset_5)) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_9|, #length=|v_#length_7|, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_6, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_5, #valid=|v_#valid_9|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_9|, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_6, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_5, #valid=|v_#valid_9|, cstrpbrk_#t~mem4=|v_cstrpbrk_#t~mem4_1|, #length=|v_#length_7|} AuxVars[] AssignedVars[cstrpbrk_#t~mem4]
[2018-01-28 23:25:20,341 INFO L84 mationBacktranslator]: Skipped ATE [571] [571] L548''''-->L548'''''': Formula: (let ((.cse0 (= (let ((.cse1 (mod v_cstrpbrk_~c~2_3 256))) (ite (<= .cse1 127) .cse1 (+ .cse1 (- 256)))) |v_cstrpbrk_#t~mem4_2|))) (or (and .cse0 (not |v_cstrpbrk_#t~short5_3|)) (and |v_cstrpbrk_#t~short5_3| (not .cse0)))) InVars {cstrpbrk_~c~2=v_cstrpbrk_~c~2_3, cstrpbrk_#t~mem4=|v_cstrpbrk_#t~mem4_2|} OutVars{cstrpbrk_~c~2=v_cstrpbrk_~c~2_3, cstrpbrk_#t~mem4=|v_cstrpbrk_#t~mem4_2|, cstrpbrk_#t~short5=|v_cstrpbrk_#t~short5_3|} AuxVars[] AssignedVars[cstrpbrk_#t~short5]
[2018-01-28 23:25:20,341 INFO L84 mationBacktranslator]: Skipped ATE [565] [565] L548''''''-->L548''''''''''': Formula: |v_cstrpbrk_#t~short5_7| InVars {cstrpbrk_#t~short5=|v_cstrpbrk_#t~short5_7|} OutVars{cstrpbrk_#t~short5=|v_cstrpbrk_#t~short5_7|} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,341 INFO L84 mationBacktranslator]: Skipped ATE [575] [575] L548'''''''''''-->L548'''''''''''': Formula: true InVars {} OutVars{cstrpbrk_#t~mem3=|v_cstrpbrk_#t~mem3_4|} AuxVars[] AssignedVars[cstrpbrk_#t~mem3]
[2018-01-28 23:25:20,341 INFO L84 mationBacktranslator]: Skipped ATE [581] [581] L548''''''''''''-->L548''''''''''''': Formula: true InVars {} OutVars{cstrpbrk_#t~mem4=|v_cstrpbrk_#t~mem4_4|} AuxVars[] AssignedVars[cstrpbrk_#t~mem4]
[2018-01-28 23:25:20,341 INFO L84 mationBacktranslator]: Skipped ATE [587] [587] L548'''''''''''''-->L549: Formula: true InVars {} OutVars{cstrpbrk_#t~short5=|v_cstrpbrk_#t~short5_8|} AuxVars[] AssignedVars[cstrpbrk_#t~short5]
[2018-01-28 23:25:20,341 INFO L84 mationBacktranslator]: Skipped ATE [589] [589] L549-->L549': Formula: (and (= |v_cstrpbrk_#t~post6.offset_1| v_cstrpbrk_~s~2.offset_7) (= |v_cstrpbrk_#t~post6.base_1| v_cstrpbrk_~s~2.base_9)) InVars {cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_7, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_9} OutVars{cstrpbrk_#t~post6.base=|v_cstrpbrk_#t~post6.base_1|, cstrpbrk_#t~post6.offset=|v_cstrpbrk_#t~post6.offset_1|, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_7, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_9} AuxVars[] AssignedVars[cstrpbrk_#t~post6.offset, cstrpbrk_#t~post6.base]
[2018-01-28 23:25:20,341 INFO L84 mationBacktranslator]: Skipped ATE [591] [591] L549'-->L549'': Formula: (and (= v_cstrpbrk_~s~2.offset_8 (+ |v_cstrpbrk_#t~post6.offset_2| 1)) (= v_cstrpbrk_~s~2.base_10 |v_cstrpbrk_#t~post6.base_2|)) InVars {cstrpbrk_#t~post6.offset=|v_cstrpbrk_#t~post6.offset_2|, cstrpbrk_#t~post6.base=|v_cstrpbrk_#t~post6.base_2|} OutVars{cstrpbrk_#t~post6.base=|v_cstrpbrk_#t~post6.base_2|, cstrpbrk_#t~post6.offset=|v_cstrpbrk_#t~post6.offset_2|, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_10, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_8} AuxVars[] AssignedVars[cstrpbrk_~s~2.base, cstrpbrk_~s~2.offset]
[2018-01-28 23:25:20,342 INFO L84 mationBacktranslator]: Skipped ATE [593] [593] L549''-->L548'''''''''''''': Formula: true InVars {} OutVars{cstrpbrk_#t~post6.offset=|v_cstrpbrk_#t~post6.offset_3|, cstrpbrk_#t~post6.base=|v_cstrpbrk_#t~post6.base_3|} AuxVars[] AssignedVars[cstrpbrk_#t~post6.offset, cstrpbrk_#t~post6.base]
[2018-01-28 23:25:20,342 INFO L84 mationBacktranslator]: Skipped ATE [527] [527] L548''''''''''''''-->L548: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,342 INFO L84 mationBacktranslator]: Skipped ATE [535] [535] L548-->cstrpbrkErr5RequiresViolation: Formula: (or (not (<= (+ v_cstrpbrk_~s~2.offset_4 1) (select |v_#length_6| v_cstrpbrk_~s~2.base_5))) (not (<= 0 v_cstrpbrk_~s~2.offset_4))) InVars {#length=|v_#length_6|, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_4, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_5} OutVars{#length=|v_#length_6|, cstrpbrk_~s~2.offset=v_cstrpbrk_~s~2.offset_4, cstrpbrk_~s~2.base=v_cstrpbrk_~s~2.base_5} AuxVars[] AssignedVars[]
[2018-01-28 23:25:20,348 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:25:20 BasicIcfg
[2018-01-28 23:25:20,348 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2018-01-28 23:25:20,349 INFO L168 Benchmark]: Toolchain (without parser) took 39491.06 ms. Allocated memory was 307.2 MB in the beginning and 2.2 GB in the end (delta: 1.9 GB). Free memory was 267.1 MB in the beginning and 1.8 GB in the end (delta: -1.6 GB). Peak memory consumption was 351.2 MB. Max. memory is 5.3 GB.
[2018-01-28 23:25:20,349 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 307.2 MB. Free memory is still 273.1 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-01-28 23:25:20,350 INFO L168 Benchmark]: CACSL2BoogieTranslator took 193.51 ms. Allocated memory is still 307.2 MB. Free memory was 266.1 MB in the beginning and 255.9 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB.
[2018-01-28 23:25:20,350 INFO L168 Benchmark]: Boogie Preprocessor took 41.94 ms. Allocated memory is still 307.2 MB. Free memory was 255.9 MB in the beginning and 253.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB.
[2018-01-28 23:25:20,350 INFO L168 Benchmark]: RCFGBuilder took 380.06 ms. Allocated memory is still 307.2 MB. Free memory was 253.9 MB in the beginning and 230.9 MB in the end (delta: 22.9 MB). Peak memory consumption was 22.9 MB. Max. memory is 5.3 GB.
[2018-01-28 23:25:20,350 INFO L168 Benchmark]: IcfgTransformer took 36455.72 ms. Allocated memory was 307.2 MB in the beginning and 2.2 GB in the end (delta: 1.9 GB). Free memory was 230.9 MB in the beginning and 2.2 GB in the end (delta: -1.9 GB). Peak memory consumption was 128.7 MB. Max. memory is 5.3 GB.
[2018-01-28 23:25:20,351 INFO L168 Benchmark]: TraceAbstraction took 2411.30 ms. Allocated memory is still 2.2 GB. Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 311.8 MB). Peak memory consumption was 311.8 MB. Max. memory is 5.3 GB.
[2018-01-28 23:25:20,353 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.17 ms. Allocated memory is still 307.2 MB. Free memory is still 273.1 MB. There was no memory consumed. Max. memory is 5.3 GB.
* CACSL2BoogieTranslator took 193.51 ms. Allocated memory is still 307.2 MB. Free memory was 266.1 MB in the beginning and 255.9 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB.
* Boogie Preprocessor took 41.94 ms. Allocated memory is still 307.2 MB. Free memory was 255.9 MB in the beginning and 253.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB.
* RCFGBuilder took 380.06 ms. Allocated memory is still 307.2 MB. Free memory was 253.9 MB in the beginning and 230.9 MB in the end (delta: 22.9 MB). Peak memory consumption was 22.9 MB. Max. memory is 5.3 GB.
* IcfgTransformer took 36455.72 ms. Allocated memory was 307.2 MB in the beginning and 2.2 GB in the end (delta: 1.9 GB). Free memory was 230.9 MB in the beginning and 2.2 GB in the end (delta: -1.9 GB). Peak memory consumption was 128.7 MB. Max. memory is 5.3 GB.
* TraceAbstraction took 2411.30 ms. Allocated memory is still 2.2 GB. Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 311.8 MB). Peak memory consumption was 311.8 MB. Max. memory is 5.3 GB.
* Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2:
- StatisticsResult: ArrayEqualityDomainStatistics
#Locations : 82
LocStat_MAX_WEQGRAPH_SIZE : 5
LocStat_MAX_SIZEOF_WEQEDGELABEL : 3
LocStat_NO_SUPPORTING_EQUALITIES : 1418
LocStat_NO_SUPPORTING_DISEQUALITIES : 618
LocStat_NO_DISJUNCTIONS : -164
LocStat_MAX_NO_DISJUNCTIONS : -1
#Transitions : 109
TransStat_MAX_WEQGRAPH_SIZE : 2
TransStat_MAX_SIZEOF_WEQEDGELABEL : 1
TransStat_NO_SUPPORTING_EQUALITIES : 131
TransStat_NO_SUPPORTING_DISEQUALITIES : 16
TransStat_NO_DISJUNCTIONS : 116
TransStat_MAX_NO_DISJUNCTIONS : 2
- StatisticsResult: EqConstraintFactoryStatistics
CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.010543
RENAME_VARIABLES(MILLISECONDS) : 0.119058
UNFREEZE(MILLISECONDS) : 0.000000
CONJOIN(MILLISECONDS) : 0.000479
PROJECTAWAY(MILLISECONDS) : 0.059891
ADD_WEAK_EQUALITY(MILLISECONDS) : 0.070317
DISJOIN(MILLISECONDS) : 0.124969
RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.133289
ADD_EQUALITY(MILLISECONDS) : 0.010044
DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000
ADD_DISEQUALITY(MILLISECONDS) : 0.008440
#CONJOIN_DISJUNCTIVE : 1531
#RENAME_VARIABLES : 3388
#UNFREEZE : 0
#CONJOIN : 2069
#PROJECTAWAY : 1887
#ADD_WEAK_EQUALITY : 11
#DISJOIN : 387
#RENAME_VARIABLES_DISJUNCTIVE : 3262
#ADD_EQUALITY : 133
#DISJOIN_DISJUNCTIVE : 0
#ADD_DISEQUALITY : 14
* Results from de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation:
- StatisticsResult: HeapSeparatorStatistics
COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_0 : 1
COUNT_BLOCKS_for_[#memory_int]_at_dim_0 : 1
COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_1 : 1
COUNT_BLOCKS_for_[#memory_int]_at_dim_1 : 1
COUNT_ARRAY_READS for [#memory_int] : 7
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- CounterExampleResult [Line: 1]: pointer dereference may fail
pointer dereference may fail
We found a FailurePath:
- StatisticsResult: Ultimate Automizer benchmark data
CFG has 4 procedures, 90 locations, 15 error locations. UNSAFE Result, 2.3s OverallTime, 12 OverallIterations, 2 TraceHistogramMax, 1.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 776 SDtfs, 884 SDslu, 1329 SDs, 0 SdLazy, 745 SolverSat, 38 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 79 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=90occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 11 MinimizatonAttempts, 48 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 338 NumberOfCodeBlocks, 338 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 281 ConstructedInterpolants, 0 QuantifiedInterpolants, 31483 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 11 InterpolantComputations, 11 PerfectInterpolantSequences, 4/4 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrpbrk-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-01-28_23-25-20-362.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrpbrk-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-VPDomainBenchmark-0-2018-01-28_23-25-20-362.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrpbrk-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-0-2018-01-28_23-25-20-362.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrpbrk-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-HeapSeparatorBenchmark-0-2018-01-28_23-25-20-362.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrpbrk-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_23-25-20-362.csv
Received shutdown request...