java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-memsafety/openbsd_cstrcmp-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 23:31:36,590 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 23:31:36,591 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 23:31:36,605 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 23:31:36,606 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 23:31:36,607 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 23:31:36,608 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 23:31:36,609 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 23:31:36,611 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 23:31:36,612 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 23:31:36,613 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 23:31:36,613 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 23:31:36,613 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 23:31:36,614 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 23:31:36,615 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 23:31:36,617 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 23:31:36,619 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 23:31:36,621 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 23:31:36,623 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 23:31:36,624 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 23:31:36,626 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-28 23:31:36,626 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-28 23:31:36,627 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-28 23:31:36,627 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-28 23:31:36,628 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-28 23:31:36,630 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-28 23:31:36,630 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-28 23:31:36,630 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-28 23:31:36,631 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-28 23:31:36,631 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 23:31:36,631 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 23:31:36,632 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 23:31:36,641 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 23:31:36,642 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 23:31:36,643 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 23:31:36,643 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 23:31:36,643 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 23:31:36,643 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 23:31:36,643 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 23:31:36,644 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 23:31:36,644 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 23:31:36,644 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 23:31:36,645 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 23:31:36,645 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 23:31:36,645 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 23:31:36,645 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 23:31:36,645 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 23:31:36,646 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 23:31:36,646 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 23:31:36,646 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 23:31:36,646 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 23:31:36,646 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 23:31:36,647 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 23:31:36,647 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 23:31:36,647 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 23:31:36,647 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 23:31:36,647 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 23:31:36,648 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 23:31:36,648 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 23:31:36,648 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 23:31:36,648 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 23:31:36,648 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 23:31:36,649 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 23:31:36,649 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 23:31:36,650 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 23:31:36,650 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 23:31:36,685 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 23:31:36,697 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 23:31:36,701 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 23:31:36,703 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 23:31:36,704 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 23:31:36,704 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/openbsd_cstrcmp-alloca_true-valid-memsafety_true-termination.i [2018-01-28 23:31:36,872 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 23:31:36,879 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-01-28 23:31:36,880 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 23:31:36,880 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 23:31:36,885 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 23:31:36,886 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:31:36" (1/1) ... [2018-01-28 23:31:36,888 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c6f32fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:36, skipping insertion in model container [2018-01-28 23:31:36,888 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:31:36" (1/1) ... [2018-01-28 23:31:36,908 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 23:31:36,947 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 23:31:37,059 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 23:31:37,075 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 23:31:37,081 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37 WrapperNode [2018-01-28 23:31:37,082 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 23:31:37,082 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 23:31:37,083 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 23:31:37,083 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 23:31:37,099 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,100 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,110 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,110 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,114 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,117 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,118 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,120 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 23:31:37,120 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 23:31:37,120 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 23:31:37,120 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 23:31:37,121 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 23:31:37,165 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 23:31:37,165 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 23:31:37,165 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrcmp [2018-01-28 23:31:37,165 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 23:31:37,165 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 23:31:37,165 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 23:31:37,165 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 23:31:37,166 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 23:31:37,166 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 23:31:37,166 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 23:31:37,166 INFO L128 BoogieDeclarations]: Found specification of procedure cstrcmp [2018-01-28 23:31:37,166 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 23:31:37,166 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 23:31:37,166 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 23:31:37,424 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 23:31:37,425 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:31:37 BoogieIcfgContainer [2018-01-28 23:31:37,425 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 23:31:37,425 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-01-28 23:31:37,425 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-01-28 23:31:37,426 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-01-28 23:31:37,428 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:31:37" (1/1) ... [2018-01-28 23:31:37,435 INFO L103 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-01-28 23:31:37,435 INFO L104 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-01-28 23:31:37,436 INFO L150 apSepIcfgTransformer]: starting freeze-var-style preprocessing [2018-01-28 23:31:37,497 INFO L218 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-01-28 23:31:37,544 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-28 23:32:05,019 INFO L311 AbstractInterpreter]: Visited 89 different actions 500 times. Merged at 60 different actions 225 times. Never widened. Found 20 fixpoints after 5 different actions. Largest state had 39 variables. [2018-01-28 23:32:05,021 INFO L226 apSepIcfgTransformer]: finished equality analysis [2018-01-28 23:32:05,035 INFO L244 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 7 [2018-01-28 23:32:05,035 INFO L238 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-01-28 23:32:05,035 INFO L239 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-01-28 23:32:05,035 INFO L241 apSepIcfgTransformer]: select infos: Set: ((select (select |v_#memory_int_2| |v_cstrcmp_#t~post0.base_3|) |v_cstrcmp_#t~post0.offset_3|), at (SUMMARY for call #t~mem2 := read~int(#t~post0.base, #t~post0.offset, 1); srcloc: L543''')) ((select (select |v_#memory_int_5| |v_cstrcmp_#t~pre5.base_2|) |v_cstrcmp_#t~pre5.offset_2|), at (SUMMARY for call #t~mem7 := read~int(#t~pre5.base, #t~pre5.offset, 1); srcloc: L546'')) ((select |v_#memory_int_9| v_main_~nondetString1~3.base_2), at (SUMMARY for call write~int(0, ~nondetString1~3.base, ~nondetString1~3.offset + (~length1~3 - 1) * 1, 1); srcloc: L559)) ((select (select |v_#memory_int_3| |v_cstrcmp_#t~post3.base_3|) |v_cstrcmp_#t~post3.offset_3|), at (SUMMARY for call #t~mem4 := read~int(#t~post3.base, #t~post3.offset, 1); srcloc: L544'')) ((select (select |v_#memory_int_1| v_cstrcmp_~s1.base_2) v_cstrcmp_~s1.offset_2), at (SUMMARY for call #t~mem1 := read~int(~s1.base, ~s1.offset, 1); srcloc: L543)) ((select (select |v_#memory_int_4| v_cstrcmp_~s1.base_7) v_cstrcmp_~s1.offset_6), at (SUMMARY for call #t~mem6 := read~int(~s1.base, ~s1.offset, 1); srcloc: L543''''''''''''')) ((select |v_#memory_int_11| v_main_~nondetString2~3.base_2), at (SUMMARY for call write~int(0, ~nondetString2~3.base, ~nondetString2~3.offset + (~length2~3 - 1) * 1, 1); srcloc: L559')) [2018-01-28 23:32:05,059 INFO L544 PartitionManager]: partitioning result: [2018-01-28 23:32:05,059 INFO L549 PartitionManager]: location blocks for array group [#memory_int] [2018-01-28 23:32:05,059 INFO L558 PartitionManager]: at dimension 0 [2018-01-28 23:32:05,059 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-01-28 23:32:05,060 INFO L560 PartitionManager]: # location blocks :1 [2018-01-28 23:32:05,060 INFO L558 PartitionManager]: at dimension 1 [2018-01-28 23:32:05,060 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-01-28 23:32:05,060 INFO L560 PartitionManager]: # location blocks :1 [2018-01-28 23:32:05,060 INFO L86 ransitionTransformer]: executing heap partitioning transformation [2018-01-28 23:32:05,076 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:32:05 BasicIcfg [2018-01-28 23:32:05,076 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-01-28 23:32:05,077 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 23:32:05,077 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 23:32:05,145 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 23:32:05,146 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 11:31:36" (1/4) ... [2018-01-28 23:32:05,146 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b5dc5cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:32:05, skipping insertion in model container [2018-01-28 23:32:05,147 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:31:37" (2/4) ... [2018-01-28 23:32:05,147 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b5dc5cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:32:05, skipping insertion in model container [2018-01-28 23:32:05,147 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:31:37" (3/4) ... [2018-01-28 23:32:05,147 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b5dc5cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:32:05, skipping insertion in model container [2018-01-28 23:32:05,147 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:32:05" (4/4) ... [2018-01-28 23:32:05,148 INFO L107 eAbstractionObserver]: Analyzing ICFG HeapSeparatedIcfg [2018-01-28 23:32:05,155 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 23:32:05,161 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 15 error locations. [2018-01-28 23:32:05,191 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 23:32:05,192 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 23:32:05,192 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 23:32:05,192 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 23:32:05,192 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 23:32:05,192 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 23:32:05,192 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 23:32:05,193 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 23:32:05,193 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 23:32:05,203 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states. [2018-01-28 23:32:05,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 23:32:05,208 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:05,208 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:05,208 INFO L371 AbstractCegarLoop]: === Iteration 1 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:05,211 INFO L82 PathProgramCache]: Analyzing trace with hash 624907710, now seen corresponding path program 1 times [2018-01-28 23:32:05,213 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:05,213 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:05,252 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,252 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:05,252 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:05,304 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:05,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:05,393 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:05,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 23:32:05,394 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 23:32:05,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 23:32:05,402 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 23:32:05,403 INFO L87 Difference]: Start difference. First operand 82 states. Second operand 4 states. [2018-01-28 23:32:05,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:05,520 INFO L93 Difference]: Finished difference Result 108 states and 114 transitions. [2018-01-28 23:32:05,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 23:32:05,522 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-28 23:32:05,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:05,534 INFO L225 Difference]: With dead ends: 108 [2018-01-28 23:32:05,535 INFO L226 Difference]: Without dead ends: 78 [2018-01-28 23:32:05,538 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:32:05,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-01-28 23:32:05,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-01-28 23:32:05,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-01-28 23:32:05,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-01-28 23:32:05,580 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 15 [2018-01-28 23:32:05,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:05,581 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-01-28 23:32:05,581 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 23:32:05,581 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-01-28 23:32:05,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 23:32:05,582 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:05,582 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:05,582 INFO L371 AbstractCegarLoop]: === Iteration 2 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:05,583 INFO L82 PathProgramCache]: Analyzing trace with hash 624907712, now seen corresponding path program 1 times [2018-01-28 23:32:05,583 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:05,583 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:05,584 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,584 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:05,584 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:05,600 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:05,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:05,723 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:05,723 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:32:05,725 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:32:05,726 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:32:05,726 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:32:05,726 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 6 states. [2018-01-28 23:32:05,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:05,791 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2018-01-28 23:32:05,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:32:05,794 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-01-28 23:32:05,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:05,795 INFO L225 Difference]: With dead ends: 78 [2018-01-28 23:32:05,795 INFO L226 Difference]: Without dead ends: 77 [2018-01-28 23:32:05,796 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-01-28 23:32:05,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-01-28 23:32:05,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-01-28 23:32:05,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-28 23:32:05,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 82 transitions. [2018-01-28 23:32:05,805 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 82 transitions. Word has length 15 [2018-01-28 23:32:05,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:05,806 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 82 transitions. [2018-01-28 23:32:05,806 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:32:05,806 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 82 transitions. [2018-01-28 23:32:05,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 23:32:05,807 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:05,807 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:05,807 INFO L371 AbstractCegarLoop]: === Iteration 3 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:05,807 INFO L82 PathProgramCache]: Analyzing trace with hash -2102697119, now seen corresponding path program 1 times [2018-01-28 23:32:05,808 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:05,808 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:05,809 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,809 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:05,809 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:05,820 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:05,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:05,844 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:05,844 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 23:32:05,844 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 23:32:05,844 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 23:32:05,844 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 23:32:05,845 INFO L87 Difference]: Start difference. First operand 77 states and 82 transitions. Second operand 4 states. [2018-01-28 23:32:05,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:05,918 INFO L93 Difference]: Finished difference Result 77 states and 82 transitions. [2018-01-28 23:32:05,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 23:32:05,918 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-01-28 23:32:05,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:05,919 INFO L225 Difference]: With dead ends: 77 [2018-01-28 23:32:05,919 INFO L226 Difference]: Without dead ends: 76 [2018-01-28 23:32:05,920 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:32:05,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-01-28 23:32:05,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-01-28 23:32:05,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-28 23:32:05,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2018-01-28 23:32:05,924 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 16 [2018-01-28 23:32:05,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:05,925 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2018-01-28 23:32:05,925 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 23:32:05,925 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2018-01-28 23:32:05,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 23:32:05,925 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:05,925 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:05,925 INFO L371 AbstractCegarLoop]: === Iteration 4 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:05,926 INFO L82 PathProgramCache]: Analyzing trace with hash -2102697117, now seen corresponding path program 1 times [2018-01-28 23:32:05,926 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:05,926 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:05,927 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,927 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:05,927 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:05,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:05,937 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:06,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:06,009 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:06,009 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 23:32:06,010 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 23:32:06,010 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 23:32:06,010 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:32:06,010 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand 5 states. [2018-01-28 23:32:06,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:06,046 INFO L93 Difference]: Finished difference Result 76 states and 81 transitions. [2018-01-28 23:32:06,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:32:06,047 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-01-28 23:32:06,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:06,047 INFO L225 Difference]: With dead ends: 76 [2018-01-28 23:32:06,047 INFO L226 Difference]: Without dead ends: 75 [2018-01-28 23:32:06,048 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:32:06,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-01-28 23:32:06,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-01-28 23:32:06,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-01-28 23:32:06,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 80 transitions. [2018-01-28 23:32:06,052 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 80 transitions. Word has length 16 [2018-01-28 23:32:06,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:06,052 INFO L432 AbstractCegarLoop]: Abstraction has 75 states and 80 transitions. [2018-01-28 23:32:06,052 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 23:32:06,053 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 80 transitions. [2018-01-28 23:32:06,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-28 23:32:06,053 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:06,053 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:06,053 INFO L371 AbstractCegarLoop]: === Iteration 5 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:06,053 INFO L82 PathProgramCache]: Analyzing trace with hash 435034608, now seen corresponding path program 1 times [2018-01-28 23:32:06,053 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:06,054 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:06,054 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,054 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:06,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:06,065 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:06,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:06,095 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:06,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 23:32:06,095 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 23:32:06,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 23:32:06,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:32:06,096 INFO L87 Difference]: Start difference. First operand 75 states and 80 transitions. Second operand 5 states. [2018-01-28 23:32:06,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:06,166 INFO L93 Difference]: Finished difference Result 81 states and 86 transitions. [2018-01-28 23:32:06,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 23:32:06,166 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-01-28 23:32:06,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:06,169 INFO L225 Difference]: With dead ends: 81 [2018-01-28 23:32:06,170 INFO L226 Difference]: Without dead ends: 79 [2018-01-28 23:32:06,170 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:32:06,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-01-28 23:32:06,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 76. [2018-01-28 23:32:06,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-28 23:32:06,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-01-28 23:32:06,175 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 21 [2018-01-28 23:32:06,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:06,176 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-01-28 23:32:06,176 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 23:32:06,176 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-01-28 23:32:06,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-28 23:32:06,176 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:06,176 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:06,176 INFO L371 AbstractCegarLoop]: === Iteration 6 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:06,177 INFO L82 PathProgramCache]: Analyzing trace with hash 435034610, now seen corresponding path program 1 times [2018-01-28 23:32:06,177 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:06,177 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:06,177 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,177 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:06,178 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:06,189 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:06,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:06,276 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:06,277 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 23:32:06,277 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 23:32:06,277 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 23:32:06,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:32:06,278 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 8 states. [2018-01-28 23:32:06,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:06,473 INFO L93 Difference]: Finished difference Result 104 states and 110 transitions. [2018-01-28 23:32:06,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 23:32:06,473 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-01-28 23:32:06,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:06,474 INFO L225 Difference]: With dead ends: 104 [2018-01-28 23:32:06,475 INFO L226 Difference]: Without dead ends: 102 [2018-01-28 23:32:06,475 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-01-28 23:32:06,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-01-28 23:32:06,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 84. [2018-01-28 23:32:06,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-01-28 23:32:06,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 92 transitions. [2018-01-28 23:32:06,483 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 92 transitions. Word has length 21 [2018-01-28 23:32:06,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:06,483 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 92 transitions. [2018-01-28 23:32:06,484 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 23:32:06,484 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 92 transitions. [2018-01-28 23:32:06,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-28 23:32:06,485 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:06,485 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:06,485 INFO L371 AbstractCegarLoop]: === Iteration 7 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:06,485 INFO L82 PathProgramCache]: Analyzing trace with hash -2094903939, now seen corresponding path program 1 times [2018-01-28 23:32:06,485 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:06,485 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:06,486 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,487 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:06,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:06,497 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:06,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:06,543 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:06,543 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:32:06,544 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:32:06,544 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:32:06,544 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:32:06,544 INFO L87 Difference]: Start difference. First operand 84 states and 92 transitions. Second operand 6 states. [2018-01-28 23:32:06,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:06,622 INFO L93 Difference]: Finished difference Result 84 states and 92 transitions. [2018-01-28 23:32:06,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:32:06,623 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-01-28 23:32:06,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:06,624 INFO L225 Difference]: With dead ends: 84 [2018-01-28 23:32:06,624 INFO L226 Difference]: Without dead ends: 83 [2018-01-28 23:32:06,624 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:32:06,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-28 23:32:06,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-01-28 23:32:06,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-01-28 23:32:06,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 90 transitions. [2018-01-28 23:32:06,632 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 90 transitions. Word has length 24 [2018-01-28 23:32:06,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:06,632 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 90 transitions. [2018-01-28 23:32:06,632 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:32:06,632 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 90 transitions. [2018-01-28 23:32:06,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-28 23:32:06,633 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:06,633 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:06,634 INFO L371 AbstractCegarLoop]: === Iteration 8 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:06,634 INFO L82 PathProgramCache]: Analyzing trace with hash -2094903937, now seen corresponding path program 1 times [2018-01-28 23:32:06,634 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:06,634 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:06,635 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,635 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:06,635 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:06,646 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:06,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:06,740 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:06,740 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 23:32:06,740 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 23:32:06,740 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 23:32:06,740 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-01-28 23:32:06,740 INFO L87 Difference]: Start difference. First operand 83 states and 90 transitions. Second operand 9 states. [2018-01-28 23:32:06,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:06,843 INFO L93 Difference]: Finished difference Result 86 states and 92 transitions. [2018-01-28 23:32:06,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 23:32:06,844 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-01-28 23:32:06,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:06,844 INFO L225 Difference]: With dead ends: 86 [2018-01-28 23:32:06,845 INFO L226 Difference]: Without dead ends: 85 [2018-01-28 23:32:06,845 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2018-01-28 23:32:06,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-01-28 23:32:06,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 83. [2018-01-28 23:32:06,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-01-28 23:32:06,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 89 transitions. [2018-01-28 23:32:06,851 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 89 transitions. Word has length 24 [2018-01-28 23:32:06,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:06,852 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 89 transitions. [2018-01-28 23:32:06,852 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 23:32:06,852 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 89 transitions. [2018-01-28 23:32:06,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-28 23:32:06,853 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:06,853 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:06,853 INFO L371 AbstractCegarLoop]: === Iteration 9 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:06,853 INFO L82 PathProgramCache]: Analyzing trace with hash 2072569026, now seen corresponding path program 1 times [2018-01-28 23:32:06,853 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:06,854 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:06,854 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,854 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:06,855 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:06,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:06,865 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:06,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:06,975 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:06,975 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:32:06,976 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:32:06,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:32:06,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:32:06,976 INFO L87 Difference]: Start difference. First operand 83 states and 89 transitions. Second operand 6 states. [2018-01-28 23:32:07,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:07,139 INFO L93 Difference]: Finished difference Result 83 states and 89 transitions. [2018-01-28 23:32:07,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 23:32:07,139 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-01-28 23:32:07,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:07,140 INFO L225 Difference]: With dead ends: 83 [2018-01-28 23:32:07,140 INFO L226 Difference]: Without dead ends: 65 [2018-01-28 23:32:07,140 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:32:07,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-01-28 23:32:07,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2018-01-28 23:32:07,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-01-28 23:32:07,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 69 transitions. [2018-01-28 23:32:07,145 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 69 transitions. Word has length 25 [2018-01-28 23:32:07,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:07,146 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 69 transitions. [2018-01-28 23:32:07,146 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:32:07,146 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 69 transitions. [2018-01-28 23:32:07,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-28 23:32:07,146 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:07,146 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:07,146 INFO L371 AbstractCegarLoop]: === Iteration 10 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:07,147 INFO L82 PathProgramCache]: Analyzing trace with hash 1979237878, now seen corresponding path program 1 times [2018-01-28 23:32:07,147 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:07,147 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:07,148 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,148 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:07,148 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:07,159 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:07,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:07,239 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:07,239 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 23:32:07,239 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 23:32:07,239 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 23:32:07,239 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:32:07,240 INFO L87 Difference]: Start difference. First operand 65 states and 69 transitions. Second operand 8 states. [2018-01-28 23:32:07,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:07,313 INFO L93 Difference]: Finished difference Result 80 states and 83 transitions. [2018-01-28 23:32:07,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 23:32:07,313 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2018-01-28 23:32:07,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:07,314 INFO L225 Difference]: With dead ends: 80 [2018-01-28 23:32:07,315 INFO L226 Difference]: Without dead ends: 79 [2018-01-28 23:32:07,315 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-01-28 23:32:07,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-01-28 23:32:07,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 71. [2018-01-28 23:32:07,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-01-28 23:32:07,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 76 transitions. [2018-01-28 23:32:07,321 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 76 transitions. Word has length 31 [2018-01-28 23:32:07,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:07,321 INFO L432 AbstractCegarLoop]: Abstraction has 71 states and 76 transitions. [2018-01-28 23:32:07,321 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 23:32:07,321 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 76 transitions. [2018-01-28 23:32:07,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-28 23:32:07,322 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:07,323 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:07,323 INFO L371 AbstractCegarLoop]: === Iteration 11 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:07,323 INFO L82 PathProgramCache]: Analyzing trace with hash 1979237876, now seen corresponding path program 1 times [2018-01-28 23:32:07,323 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:07,323 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:07,324 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,324 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:07,324 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:07,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:07,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:07,449 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:07,449 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:32:07,449 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:32:07,449 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:32:07,449 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:32:07,449 INFO L87 Difference]: Start difference. First operand 71 states and 76 transitions. Second operand 6 states. [2018-01-28 23:32:07,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:07,536 INFO L93 Difference]: Finished difference Result 71 states and 76 transitions. [2018-01-28 23:32:07,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:32:07,537 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2018-01-28 23:32:07,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:07,537 INFO L225 Difference]: With dead ends: 71 [2018-01-28 23:32:07,538 INFO L226 Difference]: Without dead ends: 69 [2018-01-28 23:32:07,538 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:32:07,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-01-28 23:32:07,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-01-28 23:32:07,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-01-28 23:32:07,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 73 transitions. [2018-01-28 23:32:07,542 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 73 transitions. Word has length 31 [2018-01-28 23:32:07,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:07,542 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 73 transitions. [2018-01-28 23:32:07,542 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:32:07,542 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 73 transitions. [2018-01-28 23:32:07,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-28 23:32:07,543 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:07,543 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:07,543 INFO L371 AbstractCegarLoop]: === Iteration 12 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:07,544 INFO L82 PathProgramCache]: Analyzing trace with hash 200225437, now seen corresponding path program 1 times [2018-01-28 23:32:07,544 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:07,544 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:07,545 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,545 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:07,545 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:07,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:07,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:07,607 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:07,607 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 23:32:07,608 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 23:32:07,608 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 23:32:07,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 23:32:07,608 INFO L87 Difference]: Start difference. First operand 69 states and 73 transitions. Second operand 7 states. [2018-01-28 23:32:07,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:07,684 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-01-28 23:32:07,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 23:32:07,684 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-01-28 23:32:07,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:07,685 INFO L225 Difference]: With dead ends: 69 [2018-01-28 23:32:07,685 INFO L226 Difference]: Without dead ends: 68 [2018-01-28 23:32:07,685 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-01-28 23:32:07,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-28 23:32:07,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-01-28 23:32:07,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-01-28 23:32:07,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-01-28 23:32:07,688 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 32 [2018-01-28 23:32:07,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:07,688 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-01-28 23:32:07,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 23:32:07,689 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-01-28 23:32:07,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-28 23:32:07,689 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:07,689 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:07,689 INFO L371 AbstractCegarLoop]: === Iteration 13 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:07,690 INFO L82 PathProgramCache]: Analyzing trace with hash 200225439, now seen corresponding path program 1 times [2018-01-28 23:32:07,690 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:07,690 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:07,690 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,690 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:07,690 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:32:07,702 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:32:07,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:32:07,776 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:32:07,777 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 23:32:07,777 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 23:32:07,777 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 23:32:07,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-01-28 23:32:07,777 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 10 states. [2018-01-28 23:32:07,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:32:07,900 INFO L93 Difference]: Finished difference Result 80 states and 83 transitions. [2018-01-28 23:32:07,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 23:32:07,900 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-01-28 23:32:07,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:32:07,901 INFO L225 Difference]: With dead ends: 80 [2018-01-28 23:32:07,901 INFO L226 Difference]: Without dead ends: 72 [2018-01-28 23:32:07,901 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2018-01-28 23:32:07,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-01-28 23:32:07,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 64. [2018-01-28 23:32:07,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-28 23:32:07,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 67 transitions. [2018-01-28 23:32:07,905 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 67 transitions. Word has length 32 [2018-01-28 23:32:07,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:32:07,905 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 67 transitions. [2018-01-28 23:32:07,905 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 23:32:07,905 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 67 transitions. [2018-01-28 23:32:07,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-28 23:32:07,906 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:32:07,906 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:32:07,906 INFO L371 AbstractCegarLoop]: === Iteration 14 === [cstrcmpErr0RequiresViolation, cstrcmpErr9RequiresViolation, cstrcmpErr7RequiresViolation, cstrcmpErr4RequiresViolation, cstrcmpErr5RequiresViolation, cstrcmpErr6RequiresViolation, cstrcmpErr1RequiresViolation, cstrcmpErr3RequiresViolation, cstrcmpErr2RequiresViolation, cstrcmpErr8RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-01-28 23:32:07,907 INFO L82 PathProgramCache]: Analyzing trace with hash 1780045537, now seen corresponding path program 1 times [2018-01-28 23:32:07,907 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:32:07,907 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:32:07,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,908 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:32:07,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:32:07,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 23:32:07,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 23:32:07,952 INFO L389 BasicCegarLoop]: Counterexample might be feasible [2018-01-28 23:32:07,955 INFO L84 mationBacktranslator]: Skipped ATE [357] [357] ULTIMATE.startENTRY-->L1: Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-01-28 23:32:07,955 INFO L84 mationBacktranslator]: Skipped ATE [363] [363] L1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,956 INFO L84 mationBacktranslator]: Skipped ATE [369] [369] mainENTRY-->L549: Formula: (and (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (<= |v_main_#t~nondet8_2| 2147483647)) InVars {main_#t~nondet8=|v_main_#t~nondet8_2|} OutVars{main_#t~nondet8=|v_main_#t~nondet8_2|} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,956 INFO L84 mationBacktranslator]: Skipped ATE [373] [373] L549-->L549': Formula: (= v_main_~length1~3_7 |v_main_#t~nondet8_3|) InVars {main_#t~nondet8=|v_main_#t~nondet8_3|} OutVars{main_~length1~3=v_main_~length1~3_7, main_#t~nondet8=|v_main_#t~nondet8_3|} AuxVars[] AssignedVars[main_~length1~3] [2018-01-28 23:32:07,956 INFO L84 mationBacktranslator]: Skipped ATE [377] [377] L549'-->L550: Formula: true InVars {} OutVars{main_#t~nondet8=|v_main_#t~nondet8_1|} AuxVars[] AssignedVars[main_#t~nondet8] [2018-01-28 23:32:07,956 INFO L84 mationBacktranslator]: Skipped ATE [379] [379] L550-->L550': Formula: (and (<= |v_main_#t~nondet9_1| 2147483647) (<= 0 (+ |v_main_#t~nondet9_1| 2147483648))) InVars {main_#t~nondet9=|v_main_#t~nondet9_1|} OutVars{main_#t~nondet9=|v_main_#t~nondet9_1|} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,956 INFO L84 mationBacktranslator]: Skipped ATE [381] [381] L550'-->L550'': Formula: (= v_main_~length2~3_1 |v_main_#t~nondet9_2|) InVars {main_#t~nondet9=|v_main_#t~nondet9_2|} OutVars{main_~length2~3=v_main_~length2~3_1, main_#t~nondet9=|v_main_#t~nondet9_2|} AuxVars[] AssignedVars[main_~length2~3] [2018-01-28 23:32:07,956 INFO L84 mationBacktranslator]: Skipped ATE [383] [383] L550''-->L551: Formula: true InVars {} OutVars{main_#t~nondet9=|v_main_#t~nondet9_3|} AuxVars[] AssignedVars[main_#t~nondet9] [2018-01-28 23:32:07,957 INFO L84 mationBacktranslator]: Skipped ATE [387] [387] L551-->L551'': Formula: (not (< v_main_~length1~3_3 1)) InVars {main_~length1~3=v_main_~length1~3_3} OutVars{main_~length1~3=v_main_~length1~3_3} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,957 INFO L84 mationBacktranslator]: Skipped ATE [393] [393] L551''-->L554': Formula: (not (< v_main_~length2~3_4 1)) InVars {main_~length2~3=v_main_~length2~3_4} OutVars{main_~length2~3=v_main_~length2~3_4} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,957 INFO L84 mationBacktranslator]: Skipped ATE [397] [397] L554'-->L557: Formula: (and (= |v_#valid_17| (store |v_#valid_18| |v_main_#t~malloc10.base_1| 1)) (= (store |v_#length_14| |v_main_#t~malloc10.base_1| v_main_~length1~3_4) |v_#length_13|) (not (= 0 |v_main_#t~malloc10.base_1|)) (= |v_main_#t~malloc10.offset_1| 0) (= (select |v_#valid_18| |v_main_#t~malloc10.base_1|) 0)) InVars {#length=|v_#length_14|, main_~length1~3=v_main_~length1~3_4, #valid=|v_#valid_18|} OutVars{#length=|v_#length_13|, main_#t~malloc10.offset=|v_main_#t~malloc10.offset_1|, main_~length1~3=v_main_~length1~3_4, main_#t~malloc10.base=|v_main_#t~malloc10.base_1|, #valid=|v_#valid_17|} AuxVars[] AssignedVars[#valid, #length, main_#t~malloc10.offset, main_#t~malloc10.base] [2018-01-28 23:32:07,957 INFO L84 mationBacktranslator]: Skipped ATE [399] [399] L557-->L558: Formula: (and (= v_main_~nondetString1~3.base_1 |v_main_#t~malloc10.base_2|) (= v_main_~nondetString1~3.offset_1 |v_main_#t~malloc10.offset_2|)) InVars {main_#t~malloc10.base=|v_main_#t~malloc10.base_2|, main_#t~malloc10.offset=|v_main_#t~malloc10.offset_2|} OutVars{main_#t~malloc10.offset=|v_main_#t~malloc10.offset_2|, main_~nondetString1~3.offset=v_main_~nondetString1~3.offset_1, main_#t~malloc10.base=|v_main_#t~malloc10.base_2|, main_~nondetString1~3.base=v_main_~nondetString1~3.base_1} AuxVars[] AssignedVars[main_~nondetString1~3.offset, main_~nondetString1~3.base] [2018-01-28 23:32:07,957 INFO L84 mationBacktranslator]: Skipped ATE [401] [401] L558-->L558': Formula: (and (= |v_#length_15| (store |v_#length_16| |v_main_#t~malloc11.base_1| v_main_~length2~3_5)) (= |v_#valid_19| (store |v_#valid_20| |v_main_#t~malloc11.base_1| 1)) (= |v_main_#t~malloc11.offset_1| 0) (not (= |v_main_#t~malloc11.base_1| 0)) (= 0 (select |v_#valid_20| |v_main_#t~malloc11.base_1|))) InVars {main_~length2~3=v_main_~length2~3_5, #length=|v_#length_16|, #valid=|v_#valid_20|} OutVars{main_~length2~3=v_main_~length2~3_5, #length=|v_#length_15|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_1|, main_#t~malloc11.base=|v_main_#t~malloc11.base_1|, #valid=|v_#valid_19|} AuxVars[] AssignedVars[#valid, #length, main_#t~malloc11.offset, main_#t~malloc11.base] [2018-01-28 23:32:07,957 INFO L84 mationBacktranslator]: Skipped ATE [403] [403] L558'-->L559: Formula: (and (= v_main_~nondetString2~3.offset_1 |v_main_#t~malloc11.offset_2|) (= v_main_~nondetString2~3.base_1 |v_main_#t~malloc11.base_2|)) InVars {main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|} OutVars{main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|, main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_~nondetString2~3.offset=v_main_~nondetString2~3.offset_1, main_~nondetString2~3.base=v_main_~nondetString2~3.base_1} AuxVars[] AssignedVars[main_~nondetString2~3.offset, main_~nondetString2~3.base] [2018-01-28 23:32:07,957 INFO L84 mationBacktranslator]: Skipped ATE [405] [405] L559-->L559': Formula: (let ((.cse0 (+ v_main_~length1~3_5 v_main_~nondetString1~3.offset_2))) (and (= 1 (select |v_#valid_21| v_main_~nondetString1~3.base_2)) (= |v_#memory_int_part_locs_0_locs_0_1| |v_#memory_int_part_locs_0_locs_0_2|) (<= 1 .cse0) (<= .cse0 (select |v_#length_17| v_main_~nondetString1~3.base_2)))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_1|, main_~length1~3=v_main_~length1~3_5, main_~nondetString1~3.offset=v_main_~nondetString1~3.offset_2, main_~nondetString1~3.base=v_main_~nondetString1~3.base_2, #valid=|v_#valid_21|, #length=|v_#length_17|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_2|, main_~length1~3=v_main_~length1~3_5, main_~nondetString1~3.offset=v_main_~nondetString1~3.offset_2, main_~nondetString1~3.base=v_main_~nondetString1~3.base_2, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_8|, #length=|v_#length_17|} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [411] [411] L559'-->L560: Formula: (let ((.cse0 (+ v_main_~length2~3_6 v_main_~nondetString2~3.offset_2))) (and (<= 1 .cse0) (<= .cse0 (select |v_#length_19| v_main_~nondetString2~3.base_2)) (= |v_#memory_int_part_locs_0_locs_0_3| |v_#memory_int_part_locs_0_locs_0_4|) (= 1 (select |v_#valid_23| v_main_~nondetString2~3.base_2)))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_4|, main_~nondetString2~3.offset=v_main_~nondetString2~3.offset_2, #valid=|v_#valid_23|, main_~length2~3=v_main_~length2~3_6, #length=|v_#length_19|, main_~nondetString2~3.base=v_main_~nondetString2~3.base_2} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_3|, main_~nondetString2~3.offset=v_main_~nondetString2~3.offset_2, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_10|, main_~length2~3=v_main_~length2~3_6, #length=|v_#length_19|, main_~nondetString2~3.base=v_main_~nondetString2~3.base_2} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [419] [419] L560-->cstrcmpENTRY: Formula: (and (= |v_cstrcmp_#in~s1.baseInParam_1| v_main_~nondetString1~3.base_6) (= |v_cstrcmp_#in~s1.offsetInParam_1| v_main_~nondetString1~3.offset_5) (= |v_cstrcmp_#in~s2.baseInParam_1| v_main_~nondetString2~3.base_6) (= |v_cstrcmp_#in~s2.offsetInParam_1| v_main_~nondetString2~3.offset_5)) InVars {main_~nondetString2~3.offset=v_main_~nondetString2~3.offset_5, main_~nondetString1~3.offset=v_main_~nondetString1~3.offset_5, main_~nondetString1~3.base=v_main_~nondetString1~3.base_6, main_~nondetString2~3.base=v_main_~nondetString2~3.base_6} OutVars{cstrcmp_#in~s1.base=|v_cstrcmp_#in~s1.baseInParam_1|, cstrcmp_#in~s2.base=|v_cstrcmp_#in~s2.baseInParam_1|, cstrcmp_#in~s1.offset=|v_cstrcmp_#in~s1.offsetInParam_1|, cstrcmp_#in~s2.offset=|v_cstrcmp_#in~s2.offsetInParam_1|} AuxVars[] AssignedVars[cstrcmp_#in~s1.base, cstrcmp_#in~s2.base, cstrcmp_#in~s1.offset, cstrcmp_#in~s2.offset] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [423] [423] cstrcmpENTRY-->L540: Formula: (and (= v_cstrcmp_~s1.offset_1 |v_cstrcmp_#in~s1.offset_1|) (= v_cstrcmp_~s1.base_1 |v_cstrcmp_#in~s1.base_1|)) InVars {cstrcmp_#in~s1.offset=|v_cstrcmp_#in~s1.offset_1|, cstrcmp_#in~s1.base=|v_cstrcmp_#in~s1.base_1|} OutVars{cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_1, cstrcmp_#in~s1.base=|v_cstrcmp_#in~s1.base_1|, cstrcmp_#in~s1.offset=|v_cstrcmp_#in~s1.offset_1|, cstrcmp_~s1.base=v_cstrcmp_~s1.base_1} AuxVars[] AssignedVars[cstrcmp_~s1.offset, cstrcmp_~s1.base] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [427] [427] L540-->L543'''''''''''': Formula: (and (= v_cstrcmp_~s2.offset_1 |v_cstrcmp_#in~s2.offset_1|) (= v_cstrcmp_~s2.base_1 |v_cstrcmp_#in~s2.base_1|)) InVars {cstrcmp_#in~s2.offset=|v_cstrcmp_#in~s2.offset_1|, cstrcmp_#in~s2.base=|v_cstrcmp_#in~s2.base_1|} OutVars{cstrcmp_~s2.offset=v_cstrcmp_~s2.offset_1, cstrcmp_#in~s2.base=|v_cstrcmp_#in~s2.base_1|, cstrcmp_#in~s2.offset=|v_cstrcmp_#in~s2.offset_1|, cstrcmp_~s2.base=v_cstrcmp_~s2.base_1} AuxVars[] AssignedVars[cstrcmp_~s2.base, cstrcmp_~s2.offset] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [431] [431] L543''''''''''''-->L543: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [437] [437] L543-->L543': Formula: (and (= (select (select |v_#memory_int_part_locs_0_locs_0_5| v_cstrcmp_~s1.base_2) v_cstrcmp_~s1.offset_2) |v_cstrcmp_#t~mem1_1|) (<= 0 v_cstrcmp_~s1.offset_2) (<= (+ v_cstrcmp_~s1.offset_2 1) (select |v_#length_1| v_cstrcmp_~s1.base_2)) (= 1 (select |v_#valid_3| v_cstrcmp_~s1.base_2))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_2, #length=|v_#length_1|, cstrcmp_~s1.base=v_cstrcmp_~s1.base_2, #valid=|v_#valid_3|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_2, cstrcmp_~s1.base=v_cstrcmp_~s1.base_2, #valid=|v_#valid_3|, #length=|v_#length_1|, cstrcmp_#t~mem1=|v_cstrcmp_#t~mem1_1|} AuxVars[] AssignedVars[cstrcmp_#t~mem1] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [451] [451] L543'-->L543'': Formula: (and (= |v_cstrcmp_#t~post0.offset_1| v_cstrcmp_~s2.offset_2) (= |v_cstrcmp_#t~post0.base_1| v_cstrcmp_~s2.base_2)) InVars {cstrcmp_~s2.offset=v_cstrcmp_~s2.offset_2, cstrcmp_~s2.base=v_cstrcmp_~s2.base_2} OutVars{cstrcmp_~s2.offset=v_cstrcmp_~s2.offset_2, cstrcmp_#t~post0.base=|v_cstrcmp_#t~post0.base_1|, cstrcmp_#t~post0.offset=|v_cstrcmp_#t~post0.offset_1|, cstrcmp_~s2.base=v_cstrcmp_~s2.base_2} AuxVars[] AssignedVars[cstrcmp_#t~post0.base, cstrcmp_#t~post0.offset] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [457] [457] L543''-->L543''': Formula: (and (= v_cstrcmp_~s2.offset_3 (+ |v_cstrcmp_#t~post0.offset_2| 1)) (= v_cstrcmp_~s2.base_3 |v_cstrcmp_#t~post0.base_2|)) InVars {cstrcmp_#t~post0.base=|v_cstrcmp_#t~post0.base_2|, cstrcmp_#t~post0.offset=|v_cstrcmp_#t~post0.offset_2|} OutVars{cstrcmp_~s2.offset=v_cstrcmp_~s2.offset_3, cstrcmp_#t~post0.base=|v_cstrcmp_#t~post0.base_2|, cstrcmp_~s2.base=v_cstrcmp_~s2.base_3, cstrcmp_#t~post0.offset=|v_cstrcmp_#t~post0.offset_2|} AuxVars[] AssignedVars[cstrcmp_~s2.base, cstrcmp_~s2.offset] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [463] [463] L543'''-->L543'''': Formula: (and (<= 0 |v_cstrcmp_#t~post0.offset_3|) (<= (+ |v_cstrcmp_#t~post0.offset_3| 1) (select |v_#length_3| |v_cstrcmp_#t~post0.base_3|)) (= (select (select |v_#memory_int_part_locs_0_locs_0_7| |v_cstrcmp_#t~post0.base_3|) |v_cstrcmp_#t~post0.offset_3|) |v_cstrcmp_#t~mem2_1|) (= (select |v_#valid_5| |v_cstrcmp_#t~post0.base_3|) 1)) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_7|, #length=|v_#length_3|, cstrcmp_#t~post0.base=|v_cstrcmp_#t~post0.base_3|, cstrcmp_#t~post0.offset=|v_cstrcmp_#t~post0.offset_3|, #valid=|v_#valid_5|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_7|, cstrcmp_#t~post0.base=|v_cstrcmp_#t~post0.base_3|, cstrcmp_#t~post0.offset=|v_cstrcmp_#t~post0.offset_3|, #valid=|v_#valid_5|, cstrcmp_#t~mem2=|v_cstrcmp_#t~mem2_1|, #length=|v_#length_3|} AuxVars[] AssignedVars[cstrcmp_#t~mem2] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [481] [481] L543''''-->L543''''''''': Formula: (= |v_cstrcmp_#t~mem2_4| |v_cstrcmp_#t~mem1_4|) InVars {cstrcmp_#t~mem2=|v_cstrcmp_#t~mem2_4|, cstrcmp_#t~mem1=|v_cstrcmp_#t~mem1_4|} OutVars{cstrcmp_#t~mem2=|v_cstrcmp_#t~mem2_4|, cstrcmp_#t~mem1=|v_cstrcmp_#t~mem1_4|} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,958 INFO L84 mationBacktranslator]: Skipped ATE [487] [487] L543'''''''''-->L543'''''''''': Formula: true InVars {} OutVars{cstrcmp_#t~mem1=|v_cstrcmp_#t~mem1_5|} AuxVars[] AssignedVars[cstrcmp_#t~mem1] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [493] [493] L543''''''''''-->L543''''''''''': Formula: true InVars {} OutVars{cstrcmp_#t~post0.base=|v_cstrcmp_#t~post0.base_7|, cstrcmp_#t~post0.offset=|v_cstrcmp_#t~post0.offset_6|} AuxVars[] AssignedVars[cstrcmp_#t~post0.base, cstrcmp_#t~post0.offset] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [499] [499] L543'''''''''''-->L544: Formula: true InVars {} OutVars{cstrcmp_#t~mem2=|v_cstrcmp_#t~mem2_5|} AuxVars[] AssignedVars[cstrcmp_#t~mem2] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [503] [503] L544-->L544': Formula: (and (= |v_cstrcmp_#t~post3.offset_1| v_cstrcmp_~s1.offset_4) (= |v_cstrcmp_#t~post3.base_1| v_cstrcmp_~s1.base_5)) InVars {cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_4, cstrcmp_~s1.base=v_cstrcmp_~s1.base_5} OutVars{cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_4, cstrcmp_#t~post3.base=|v_cstrcmp_#t~post3.base_1|, cstrcmp_#t~post3.offset=|v_cstrcmp_#t~post3.offset_1|, cstrcmp_~s1.base=v_cstrcmp_~s1.base_5} AuxVars[] AssignedVars[cstrcmp_#t~post3.base, cstrcmp_#t~post3.offset] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [507] [507] L544'-->L544'': Formula: (and (= v_cstrcmp_~s1.base_6 |v_cstrcmp_#t~post3.base_2|) (= v_cstrcmp_~s1.offset_5 (+ |v_cstrcmp_#t~post3.offset_2| 1))) InVars {cstrcmp_#t~post3.base=|v_cstrcmp_#t~post3.base_2|, cstrcmp_#t~post3.offset=|v_cstrcmp_#t~post3.offset_2|} OutVars{cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_5, cstrcmp_#t~post3.base=|v_cstrcmp_#t~post3.base_2|, cstrcmp_#t~post3.offset=|v_cstrcmp_#t~post3.offset_2|, cstrcmp_~s1.base=v_cstrcmp_~s1.base_6} AuxVars[] AssignedVars[cstrcmp_~s1.offset, cstrcmp_~s1.base] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [509] [509] L544''-->L544''': Formula: (and (<= (+ |v_cstrcmp_#t~post3.offset_3| 1) (select |v_#length_5| |v_cstrcmp_#t~post3.base_3|)) (= (select |v_#valid_7| |v_cstrcmp_#t~post3.base_3|) 1) (<= 0 |v_cstrcmp_#t~post3.offset_3|) (= |v_cstrcmp_#t~mem4_1| (select (select |v_#memory_int_part_locs_0_locs_0_9| |v_cstrcmp_#t~post3.base_3|) |v_cstrcmp_#t~post3.offset_3|))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_9|, #length=|v_#length_5|, cstrcmp_#t~post3.base=|v_cstrcmp_#t~post3.base_3|, cstrcmp_#t~post3.offset=|v_cstrcmp_#t~post3.offset_3|, #valid=|v_#valid_7|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_9|, cstrcmp_#t~post3.base=|v_cstrcmp_#t~post3.base_3|, #valid=|v_#valid_7|, #length=|v_#length_5|, cstrcmp_#t~mem4=|v_cstrcmp_#t~mem4_1|, cstrcmp_#t~post3.offset=|v_cstrcmp_#t~post3.offset_3|} AuxVars[] AssignedVars[cstrcmp_#t~mem4] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [517] [517] L544'''-->L544'''''': Formula: (not (= 0 |v_cstrcmp_#t~mem4_4|)) InVars {cstrcmp_#t~mem4=|v_cstrcmp_#t~mem4_4|} OutVars{cstrcmp_#t~mem4=|v_cstrcmp_#t~mem4_4|} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [521] [521] L544''''''-->L544''''''': Formula: true InVars {} OutVars{cstrcmp_#t~post3.base=|v_cstrcmp_#t~post3.base_7|, cstrcmp_#t~post3.offset=|v_cstrcmp_#t~post3.offset_6|} AuxVars[] AssignedVars[cstrcmp_#t~post3.base, cstrcmp_#t~post3.offset] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [525] [525] L544'''''''-->L543'''''''''''': Formula: true InVars {} OutVars{cstrcmp_#t~mem4=|v_cstrcmp_#t~mem4_5|} AuxVars[] AssignedVars[cstrcmp_#t~mem4] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [431] [431] L543''''''''''''-->L543: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,959 INFO L84 mationBacktranslator]: Skipped ATE [441] [441] L543-->cstrcmpErr1RequiresViolation: Formula: (or (not (<= (+ v_cstrcmp_~s1.offset_3 1) (select |v_#length_2| v_cstrcmp_~s1.base_4))) (not (<= 0 v_cstrcmp_~s1.offset_3))) InVars {cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_3, #length=|v_#length_2|, cstrcmp_~s1.base=v_cstrcmp_~s1.base_4} OutVars{cstrcmp_~s1.offset=v_cstrcmp_~s1.offset_3, #length=|v_#length_2|, cstrcmp_~s1.base=v_cstrcmp_~s1.base_4} AuxVars[] AssignedVars[] [2018-01-28 23:32:07,964 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:32:07 BasicIcfg [2018-01-28 23:32:07,964 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 23:32:07,965 INFO L168 Benchmark]: Toolchain (without parser) took 31091.76 ms. Allocated memory was 308.3 MB in the beginning and 1.9 GB in the end (delta: 1.6 GB). Free memory was 268.3 MB in the beginning and 1.5 GB in the end (delta: -1.2 GB). Peak memory consumption was 404.6 MB. Max. memory is 5.3 GB. [2018-01-28 23:32:07,965 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 308.3 MB. Free memory is still 274.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 23:32:07,966 INFO L168 Benchmark]: CACSL2BoogieTranslator took 202.44 ms. Allocated memory is still 308.3 MB. Free memory was 267.3 MB in the beginning and 257.1 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB. [2018-01-28 23:32:07,966 INFO L168 Benchmark]: Boogie Preprocessor took 37.27 ms. Allocated memory is still 308.3 MB. Free memory was 257.1 MB in the beginning and 255.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 23:32:07,966 INFO L168 Benchmark]: RCFGBuilder took 304.85 ms. Allocated memory is still 308.3 MB. Free memory was 255.1 MB in the beginning and 234.5 MB in the end (delta: 20.6 MB). Peak memory consumption was 20.6 MB. Max. memory is 5.3 GB. [2018-01-28 23:32:07,967 INFO L168 Benchmark]: IcfgTransformer took 27650.97 ms. Allocated memory was 308.3 MB in the beginning and 1.8 GB in the end (delta: 1.5 GB). Free memory was 234.5 MB in the beginning and 391.6 MB in the end (delta: -157.1 MB). Peak memory consumption was 1.4 GB. Max. memory is 5.3 GB. [2018-01-28 23:32:07,967 INFO L168 Benchmark]: TraceAbstraction took 2887.43 ms. Allocated memory was 1.8 GB in the beginning and 1.9 GB in the end (delta: 105.4 MB). Free memory was 391.6 MB in the beginning and 1.5 GB in the end (delta: -1.1 GB). There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 23:32:07,969 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 308.3 MB. Free memory is still 274.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 202.44 ms. Allocated memory is still 308.3 MB. Free memory was 267.3 MB in the beginning and 257.1 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 37.27 ms. Allocated memory is still 308.3 MB. Free memory was 257.1 MB in the beginning and 255.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 304.85 ms. Allocated memory is still 308.3 MB. Free memory was 255.1 MB in the beginning and 234.5 MB in the end (delta: 20.6 MB). Peak memory consumption was 20.6 MB. Max. memory is 5.3 GB. * IcfgTransformer took 27650.97 ms. Allocated memory was 308.3 MB in the beginning and 1.8 GB in the end (delta: 1.5 GB). Free memory was 234.5 MB in the beginning and 391.6 MB in the end (delta: -157.1 MB). Peak memory consumption was 1.4 GB. Max. memory is 5.3 GB. * TraceAbstraction took 2887.43 ms. Allocated memory was 1.8 GB in the beginning and 1.9 GB in the end (delta: 105.4 MB). Free memory was 391.6 MB in the beginning and 1.5 GB in the end (delta: -1.1 GB). There was no memory consumed. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 74 LocStat_MAX_WEQGRAPH_SIZE : 5 LocStat_MAX_SIZEOF_WEQEDGELABEL : 3 LocStat_NO_SUPPORTING_EQUALITIES : 1186 LocStat_NO_SUPPORTING_DISEQUALITIES : 510 LocStat_NO_DISJUNCTIONS : -148 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 98 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 117 TransStat_NO_SUPPORTING_DISEQUALITIES : 14 TransStat_NO_DISJUNCTIONS : 104 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 1.889288 RENAME_VARIABLES(MILLISECONDS) : 0.009351 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 1.236929 PROJECTAWAY(MILLISECONDS) : 0.918713 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.041101 DISJOIN(MILLISECONDS) : 0.261684 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.018775 ADD_EQUALITY(MILLISECONDS) : 0.011384 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.008507 #CONJOIN_DISJUNCTIVE : 792 #RENAME_VARIABLES : 1708 #UNFREEZE : 0 #CONJOIN : 1066 #PROJECTAWAY : 992 #ADD_WEAK_EQUALITY : 11 #DISJOIN : 318 #RENAME_VARIABLES_DISJUNCTIVE : 1646 #ADD_EQUALITY : 119 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 12 * Results from de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation: - StatisticsResult: HeapSeparatorStatistics COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_0 : 1 COUNT_BLOCKS_for_[#memory_int]_at_dim_0 : 1 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_1 : 1 COUNT_BLOCKS_for_[#memory_int]_at_dim_1 : 1 COUNT_ARRAY_READS for [#memory_int] : 7 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: pointer dereference may fail pointer dereference may fail We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 82 locations, 15 error locations. UNSAFE Result, 2.7s OverallTime, 14 OverallIterations, 2 TraceHistogramMax, 1.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 793 SDtfs, 824 SDslu, 1816 SDs, 0 SdLazy, 955 SolverSat, 52 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 110 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=84occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 13 MinimizatonAttempts, 39 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 339 NumberOfCodeBlocks, 339 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 290 ConstructedInterpolants, 0 QuantifiedInterpolants, 29584 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 13 InterpolantComputations, 13 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrcmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-01-28_23-32-07-976.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrcmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-VPDomainBenchmark-0-2018-01-28_23-32-07-976.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrcmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-0-2018-01-28_23-32-07-976.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrcmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-HeapSeparatorBenchmark-0-2018-01-28_23-32-07-976.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrcmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_23-32-07-976.csv Received shutdown request...