java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-memsafety/openbsd_cstrncmp-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 23:34:50,258 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 23:34:50,260 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 23:34:50,272 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 23:34:50,272 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 23:34:50,273 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 23:34:50,274 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 23:34:50,276 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 23:34:50,278 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 23:34:50,279 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 23:34:50,280 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 23:34:50,280 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 23:34:50,281 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 23:34:50,283 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 23:34:50,284 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 23:34:50,286 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 23:34:50,289 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 23:34:50,291 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 23:34:50,292 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 23:34:50,293 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 23:34:50,295 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-28 23:34:50,296 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-28 23:34:50,296 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-28 23:34:50,297 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-28 23:34:50,298 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-28 23:34:50,299 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-28 23:34:50,299 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-28 23:34:50,300 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-28 23:34:50,300 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-28 23:34:50,301 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 23:34:50,301 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 23:34:50,301 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 23:34:50,312 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 23:34:50,312 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 23:34:50,313 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 23:34:50,313 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 23:34:50,313 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 23:34:50,313 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 23:34:50,313 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 23:34:50,314 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 23:34:50,314 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 23:34:50,314 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 23:34:50,315 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 23:34:50,315 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 23:34:50,315 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 23:34:50,315 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 23:34:50,315 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 23:34:50,316 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 23:34:50,316 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 23:34:50,316 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 23:34:50,316 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 23:34:50,316 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 23:34:50,316 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 23:34:50,317 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 23:34:50,317 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 23:34:50,317 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 23:34:50,317 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 23:34:50,317 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 23:34:50,318 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 23:34:50,318 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 23:34:50,318 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 23:34:50,318 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 23:34:50,318 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 23:34:50,318 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 23:34:50,319 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 23:34:50,320 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 23:34:50,354 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 23:34:50,366 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 23:34:50,370 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 23:34:50,372 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 23:34:50,372 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 23:34:50,373 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/openbsd_cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-01-28 23:34:50,537 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 23:34:50,544 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-01-28 23:34:50,545 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 23:34:50,545 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 23:34:50,552 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 23:34:50,553 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,557 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@67a116ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50, skipping insertion in model container [2018-01-28 23:34:50,557 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,576 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 23:34:50,617 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 23:34:50,750 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 23:34:50,767 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 23:34:50,776 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50 WrapperNode [2018-01-28 23:34:50,776 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 23:34:50,777 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 23:34:50,777 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 23:34:50,777 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 23:34:50,794 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,794 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,805 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,806 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,810 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,813 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,814 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... [2018-01-28 23:34:50,816 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 23:34:50,816 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 23:34:50,816 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 23:34:50,816 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 23:34:50,817 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 23:34:50,869 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 23:34:50,870 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 23:34:50,870 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrncmp [2018-01-28 23:34:50,870 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 23:34:50,870 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 23:34:50,870 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 23:34:50,870 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 23:34:50,870 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 23:34:50,871 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 23:34:50,871 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 23:34:50,871 INFO L128 BoogieDeclarations]: Found specification of procedure cstrncmp [2018-01-28 23:34:50,871 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 23:34:50,871 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 23:34:50,871 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 23:34:51,178 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 23:34:51,179 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:34:51 BoogieIcfgContainer [2018-01-28 23:34:51,179 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 23:34:51,180 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-01-28 23:34:51,180 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-01-28 23:34:51,181 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-01-28 23:34:51,184 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:34:51" (1/1) ... [2018-01-28 23:34:51,191 INFO L103 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-01-28 23:34:51,192 INFO L104 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-01-28 23:34:51,192 INFO L150 apSepIcfgTransformer]: starting freeze-var-style preprocessing [2018-01-28 23:34:51,264 INFO L218 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-01-28 23:34:51,312 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-28 23:35:29,192 INFO L311 AbstractInterpreter]: Visited 101 different actions 586 times. Merged at 65 different actions 271 times. Never widened. Found 26 fixpoints after 2 different actions. Largest state had 42 variables. [2018-01-28 23:35:29,194 INFO L226 apSepIcfgTransformer]: finished equality analysis [2018-01-28 23:35:29,206 INFO L244 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 7 [2018-01-28 23:35:29,207 INFO L238 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-01-28 23:35:29,207 INFO L239 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-01-28 23:35:29,207 INFO L241 apSepIcfgTransformer]: select infos: Set: ((select (select |v_#memory_int_7| v_cstrncmp_~s1.base_2) v_cstrncmp_~s1.offset_2), at (SUMMARY for call #t~mem2 := read~int(~s1.base, ~s1.offset, 1); srcloc: L546)) ((select (select |v_#memory_int_8| |v_cstrncmp_#t~post1.base_3|) |v_cstrncmp_#t~post1.offset_3|), at (SUMMARY for call #t~mem3 := read~int(#t~post1.base, #t~post1.offset, 1); srcloc: L546''')) ((select (select |v_#memory_int_11| |v_cstrncmp_#t~post7.base_3|) |v_cstrncmp_#t~post7.offset_3|), at (SUMMARY for call #t~mem8 := read~int(#t~post7.base, #t~post7.offset, 1); srcloc: L548'')) ((select |v_#memory_int_6| v_main_~nondetString2~4.base_2), at (SUMMARY for call write~int(0, ~nondetString2~4.base, ~nondetString2~4.offset + (~length2~4 - 1) * 1, 1); srcloc: L564')) ((select (select |v_#memory_int_9| v_cstrncmp_~s1.base_5) v_cstrncmp_~s1.offset_4), at (SUMMARY for call #t~mem5 := read~int(~s1.base, ~s1.offset, 1); srcloc: L547)) ((select |v_#memory_int_4| v_main_~nondetString1~4.base_2), at (SUMMARY for call write~int(0, ~nondetString1~4.base, ~nondetString1~4.offset + (~length1~4 - 1) * 1, 1); srcloc: L564)) ((select (select |v_#memory_int_10| |v_cstrncmp_#t~pre4.base_2|) |v_cstrncmp_#t~pre4.offset_2|), at (SUMMARY for call #t~mem6 := read~int(#t~pre4.base, #t~pre4.offset, 1); srcloc: L547''')) [2018-01-28 23:35:29,236 INFO L544 PartitionManager]: partitioning result: [2018-01-28 23:35:29,236 INFO L549 PartitionManager]: location blocks for array group [#memory_int] [2018-01-28 23:35:29,236 INFO L558 PartitionManager]: at dimension 0 [2018-01-28 23:35:29,236 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-01-28 23:35:29,237 INFO L560 PartitionManager]: # location blocks :1 [2018-01-28 23:35:29,237 INFO L558 PartitionManager]: at dimension 1 [2018-01-28 23:35:29,237 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-01-28 23:35:29,237 INFO L560 PartitionManager]: # location blocks :1 [2018-01-28 23:35:29,345 INFO L86 ransitionTransformer]: executing heap partitioning transformation [2018-01-28 23:35:29,364 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:35:29 BasicIcfg [2018-01-28 23:35:29,364 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-01-28 23:35:29,365 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 23:35:29,365 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 23:35:29,368 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 23:35:29,369 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 11:34:50" (1/4) ... [2018-01-28 23:35:29,369 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@467325e4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:35:29, skipping insertion in model container [2018-01-28 23:35:29,370 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:34:50" (2/4) ... [2018-01-28 23:35:29,370 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@467325e4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:35:29, skipping insertion in model container [2018-01-28 23:35:29,370 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:34:51" (3/4) ... [2018-01-28 23:35:29,371 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@467325e4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:35:29, skipping insertion in model container [2018-01-28 23:35:29,371 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:35:29" (4/4) ... [2018-01-28 23:35:29,372 INFO L107 eAbstractionObserver]: Analyzing ICFG HeapSeparatedIcfg [2018-01-28 23:35:29,380 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 23:35:29,385 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 15 error locations. [2018-01-28 23:35:29,413 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 23:35:29,413 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 23:35:29,413 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 23:35:29,413 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 23:35:29,413 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 23:35:29,413 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 23:35:29,414 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 23:35:29,414 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 23:35:29,414 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 23:35:29,426 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states. [2018-01-28 23:35:29,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 23:35:29,430 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:29,431 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:29,431 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:29,434 INFO L82 PathProgramCache]: Analyzing trace with hash -1050940434, now seen corresponding path program 1 times [2018-01-28 23:35:29,436 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:29,436 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:29,473 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:29,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:29,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:29,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:29,522 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:29,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:29,600 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:29,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 23:35:29,602 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 23:35:29,609 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 23:35:29,609 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 23:35:29,611 INFO L87 Difference]: Start difference. First operand 92 states. Second operand 4 states. [2018-01-28 23:35:29,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:29,704 INFO L93 Difference]: Finished difference Result 108 states and 116 transitions. [2018-01-28 23:35:29,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 23:35:29,706 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-28 23:35:29,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:29,716 INFO L225 Difference]: With dead ends: 108 [2018-01-28 23:35:29,716 INFO L226 Difference]: Without dead ends: 88 [2018-01-28 23:35:29,720 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:35:29,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-01-28 23:35:29,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-01-28 23:35:29,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-28 23:35:29,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-01-28 23:35:29,754 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 15 [2018-01-28 23:35:29,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:29,754 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-01-28 23:35:29,754 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 23:35:29,754 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-01-28 23:35:29,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 23:35:29,755 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:29,755 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:29,755 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:29,756 INFO L82 PathProgramCache]: Analyzing trace with hash -1050940432, now seen corresponding path program 1 times [2018-01-28 23:35:29,756 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:29,756 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:29,757 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:29,757 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:29,757 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:29,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:29,772 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:29,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:29,900 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:29,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:35:29,901 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:35:29,902 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:35:29,902 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:35:29,902 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 6 states. [2018-01-28 23:35:29,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:29,972 INFO L93 Difference]: Finished difference Result 88 states and 95 transitions. [2018-01-28 23:35:29,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:35:29,972 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-01-28 23:35:29,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:29,974 INFO L225 Difference]: With dead ends: 88 [2018-01-28 23:35:29,974 INFO L226 Difference]: Without dead ends: 87 [2018-01-28 23:35:29,975 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-01-28 23:35:29,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-01-28 23:35:29,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-01-28 23:35:29,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-28 23:35:29,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 94 transitions. [2018-01-28 23:35:29,984 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 94 transitions. Word has length 15 [2018-01-28 23:35:29,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:29,984 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 94 transitions. [2018-01-28 23:35:29,984 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:35:29,984 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 94 transitions. [2018-01-28 23:35:29,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 23:35:29,985 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:29,985 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:29,985 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:29,986 INFO L82 PathProgramCache]: Analyzing trace with hash 1780585313, now seen corresponding path program 1 times [2018-01-28 23:35:29,986 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:29,986 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:29,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:29,987 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:29,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:29,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:29,999 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:30,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:30,025 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:30,025 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 23:35:30,025 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 23:35:30,025 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 23:35:30,026 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 23:35:30,026 INFO L87 Difference]: Start difference. First operand 87 states and 94 transitions. Second operand 4 states. [2018-01-28 23:35:30,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:30,087 INFO L93 Difference]: Finished difference Result 87 states and 94 transitions. [2018-01-28 23:35:30,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 23:35:30,087 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-01-28 23:35:30,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:30,088 INFO L225 Difference]: With dead ends: 87 [2018-01-28 23:35:30,088 INFO L226 Difference]: Without dead ends: 86 [2018-01-28 23:35:30,088 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:35:30,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-01-28 23:35:30,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-01-28 23:35:30,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-28 23:35:30,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 93 transitions. [2018-01-28 23:35:30,095 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 93 transitions. Word has length 16 [2018-01-28 23:35:30,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:30,095 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 93 transitions. [2018-01-28 23:35:30,095 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 23:35:30,095 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 93 transitions. [2018-01-28 23:35:30,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 23:35:30,095 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:30,095 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:30,096 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:30,096 INFO L82 PathProgramCache]: Analyzing trace with hash 1780585315, now seen corresponding path program 1 times [2018-01-28 23:35:30,096 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:30,096 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:30,096 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,097 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:30,097 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:30,107 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:30,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:30,193 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:30,193 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 23:35:30,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 23:35:30,194 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 23:35:30,194 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:35:30,194 INFO L87 Difference]: Start difference. First operand 86 states and 93 transitions. Second operand 5 states. [2018-01-28 23:35:30,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:30,253 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions. [2018-01-28 23:35:30,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:35:30,254 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-01-28 23:35:30,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:30,254 INFO L225 Difference]: With dead ends: 86 [2018-01-28 23:35:30,254 INFO L226 Difference]: Without dead ends: 85 [2018-01-28 23:35:30,255 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:35:30,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-01-28 23:35:30,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2018-01-28 23:35:30,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-01-28 23:35:30,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 92 transitions. [2018-01-28 23:35:30,259 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 92 transitions. Word has length 16 [2018-01-28 23:35:30,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:30,260 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 92 transitions. [2018-01-28 23:35:30,260 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 23:35:30,260 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 92 transitions. [2018-01-28 23:35:30,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-28 23:35:30,260 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:30,260 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:30,260 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:30,261 INFO L82 PathProgramCache]: Analyzing trace with hash -430381833, now seen corresponding path program 1 times [2018-01-28 23:35:30,261 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:30,261 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:30,262 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,262 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:30,262 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:30,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:30,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:30,308 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:30,308 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 23:35:30,308 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 23:35:30,309 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 23:35:30,309 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:35:30,309 INFO L87 Difference]: Start difference. First operand 85 states and 92 transitions. Second operand 5 states. [2018-01-28 23:35:30,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:30,403 INFO L93 Difference]: Finished difference Result 91 states and 98 transitions. [2018-01-28 23:35:30,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 23:35:30,404 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-01-28 23:35:30,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:30,408 INFO L225 Difference]: With dead ends: 91 [2018-01-28 23:35:30,408 INFO L226 Difference]: Without dead ends: 89 [2018-01-28 23:35:30,409 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:35:30,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-01-28 23:35:30,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 86. [2018-01-28 23:35:30,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-28 23:35:30,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 94 transitions. [2018-01-28 23:35:30,417 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 94 transitions. Word has length 24 [2018-01-28 23:35:30,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:30,417 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 94 transitions. [2018-01-28 23:35:30,417 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 23:35:30,417 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 94 transitions. [2018-01-28 23:35:30,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-28 23:35:30,418 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:30,418 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:30,418 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:30,419 INFO L82 PathProgramCache]: Analyzing trace with hash -430381831, now seen corresponding path program 1 times [2018-01-28 23:35:30,419 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:30,419 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:30,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,420 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:30,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:30,434 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:30,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:30,567 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:30,567 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 23:35:30,567 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 23:35:30,568 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 23:35:30,568 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:35:30,568 INFO L87 Difference]: Start difference. First operand 86 states and 94 transitions. Second operand 8 states. [2018-01-28 23:35:30,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:30,718 INFO L93 Difference]: Finished difference Result 114 states and 122 transitions. [2018-01-28 23:35:30,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 23:35:30,718 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 24 [2018-01-28 23:35:30,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:30,719 INFO L225 Difference]: With dead ends: 114 [2018-01-28 23:35:30,719 INFO L226 Difference]: Without dead ends: 112 [2018-01-28 23:35:30,719 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-01-28 23:35:30,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-01-28 23:35:30,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 94. [2018-01-28 23:35:30,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-01-28 23:35:30,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 104 transitions. [2018-01-28 23:35:30,727 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 104 transitions. Word has length 24 [2018-01-28 23:35:30,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:30,727 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 104 transitions. [2018-01-28 23:35:30,728 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 23:35:30,728 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 104 transitions. [2018-01-28 23:35:30,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-28 23:35:30,729 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:30,729 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:30,729 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:30,729 INFO L82 PathProgramCache]: Analyzing trace with hash -1027360366, now seen corresponding path program 1 times [2018-01-28 23:35:30,729 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:30,729 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:30,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,730 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:30,731 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:30,743 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:30,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:30,791 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:30,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:35:30,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:35:30,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:35:30,791 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:35:30,792 INFO L87 Difference]: Start difference. First operand 94 states and 104 transitions. Second operand 6 states. [2018-01-28 23:35:30,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:30,879 INFO L93 Difference]: Finished difference Result 94 states and 104 transitions. [2018-01-28 23:35:30,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:35:30,880 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-01-28 23:35:30,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:30,881 INFO L225 Difference]: With dead ends: 94 [2018-01-28 23:35:30,881 INFO L226 Difference]: Without dead ends: 93 [2018-01-28 23:35:30,881 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:35:30,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-28 23:35:30,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2018-01-28 23:35:30,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-01-28 23:35:30,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 102 transitions. [2018-01-28 23:35:30,887 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 102 transitions. Word has length 27 [2018-01-28 23:35:30,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:30,887 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 102 transitions. [2018-01-28 23:35:30,888 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:35:30,888 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 102 transitions. [2018-01-28 23:35:30,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-28 23:35:30,889 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:30,889 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:30,889 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:30,889 INFO L82 PathProgramCache]: Analyzing trace with hash -1027360364, now seen corresponding path program 1 times [2018-01-28 23:35:30,889 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:30,889 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:30,890 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,890 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:30,890 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:30,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:30,902 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:30,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:30,990 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:30,990 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 23:35:30,990 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 23:35:30,990 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 23:35:30,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-01-28 23:35:30,991 INFO L87 Difference]: Start difference. First operand 93 states and 102 transitions. Second operand 9 states. [2018-01-28 23:35:31,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:31,089 INFO L93 Difference]: Finished difference Result 98 states and 106 transitions. [2018-01-28 23:35:31,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 23:35:31,089 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 27 [2018-01-28 23:35:31,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:31,090 INFO L225 Difference]: With dead ends: 98 [2018-01-28 23:35:31,090 INFO L226 Difference]: Without dead ends: 97 [2018-01-28 23:35:31,091 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2018-01-28 23:35:31,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-01-28 23:35:31,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 93. [2018-01-28 23:35:31,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-01-28 23:35:31,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 101 transitions. [2018-01-28 23:35:31,097 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 101 transitions. Word has length 27 [2018-01-28 23:35:31,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:31,098 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 101 transitions. [2018-01-28 23:35:31,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 23:35:31,098 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 101 transitions. [2018-01-28 23:35:31,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-28 23:35:31,099 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:31,099 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:31,099 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:31,099 INFO L82 PathProgramCache]: Analyzing trace with hash 1896582994, now seen corresponding path program 1 times [2018-01-28 23:35:31,100 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:31,100 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:31,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,101 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:31,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:31,111 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:31,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:31,200 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:31,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:35:31,200 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:35:31,200 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:35:31,201 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:35:31,201 INFO L87 Difference]: Start difference. First operand 93 states and 101 transitions. Second operand 6 states. [2018-01-28 23:35:31,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:31,338 INFO L93 Difference]: Finished difference Result 93 states and 101 transitions. [2018-01-28 23:35:31,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 23:35:31,338 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-01-28 23:35:31,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:31,339 INFO L225 Difference]: With dead ends: 93 [2018-01-28 23:35:31,339 INFO L226 Difference]: Without dead ends: 72 [2018-01-28 23:35:31,339 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:35:31,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-01-28 23:35:31,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-01-28 23:35:31,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-01-28 23:35:31,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 76 transitions. [2018-01-28 23:35:31,343 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 76 transitions. Word has length 27 [2018-01-28 23:35:31,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:31,343 INFO L432 AbstractCegarLoop]: Abstraction has 72 states and 76 transitions. [2018-01-28 23:35:31,343 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:35:31,343 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 76 transitions. [2018-01-28 23:35:31,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-28 23:35:31,344 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:31,344 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:31,344 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:31,344 INFO L82 PathProgramCache]: Analyzing trace with hash 1338533173, now seen corresponding path program 1 times [2018-01-28 23:35:31,344 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:31,345 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:31,345 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,345 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:31,345 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:31,357 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:31,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:31,456 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:31,456 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 23:35:31,456 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 23:35:31,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 23:35:31,457 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:35:31,457 INFO L87 Difference]: Start difference. First operand 72 states and 76 transitions. Second operand 8 states. [2018-01-28 23:35:31,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:31,535 INFO L93 Difference]: Finished difference Result 87 states and 90 transitions. [2018-01-28 23:35:31,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 23:35:31,535 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-01-28 23:35:31,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:31,536 INFO L225 Difference]: With dead ends: 87 [2018-01-28 23:35:31,536 INFO L226 Difference]: Without dead ends: 86 [2018-01-28 23:35:31,536 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-01-28 23:35:31,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-01-28 23:35:31,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 78. [2018-01-28 23:35:31,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-01-28 23:35:31,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-01-28 23:35:31,540 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 34 [2018-01-28 23:35:31,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:31,540 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-01-28 23:35:31,541 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 23:35:31,541 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-01-28 23:35:31,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-28 23:35:31,541 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:31,541 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:31,542 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:31,542 INFO L82 PathProgramCache]: Analyzing trace with hash 1338533171, now seen corresponding path program 1 times [2018-01-28 23:35:31,542 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:31,542 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:31,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,543 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:31,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:31,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:31,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:31,588 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:31,588 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 23:35:31,589 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:35:31,589 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:35:31,589 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:35:31,589 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 6 states. [2018-01-28 23:35:31,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:31,660 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2018-01-28 23:35:31,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:35:31,661 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-01-28 23:35:31,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:31,661 INFO L225 Difference]: With dead ends: 78 [2018-01-28 23:35:31,661 INFO L226 Difference]: Without dead ends: 76 [2018-01-28 23:35:31,662 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:35:31,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-01-28 23:35:31,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-01-28 23:35:31,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-28 23:35:31,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 80 transitions. [2018-01-28 23:35:31,665 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 80 transitions. Word has length 34 [2018-01-28 23:35:31,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:31,665 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 80 transitions. [2018-01-28 23:35:31,665 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:35:31,665 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2018-01-28 23:35:31,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-28 23:35:31,666 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:31,667 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:31,667 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:31,667 INFO L82 PathProgramCache]: Analyzing trace with hash 1814876330, now seen corresponding path program 1 times [2018-01-28 23:35:31,667 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:31,667 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:31,668 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,668 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:31,668 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:31,679 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:31,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:31,706 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:31,707 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 23:35:31,707 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 23:35:31,707 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 23:35:31,707 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:35:31,707 INFO L87 Difference]: Start difference. First operand 76 states and 80 transitions. Second operand 5 states. [2018-01-28 23:35:31,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:31,793 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-01-28 23:35:31,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:35:31,793 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-01-28 23:35:31,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:31,794 INFO L225 Difference]: With dead ends: 76 [2018-01-28 23:35:31,794 INFO L226 Difference]: Without dead ends: 75 [2018-01-28 23:35:31,794 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-28 23:35:31,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-01-28 23:35:31,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-01-28 23:35:31,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-01-28 23:35:31,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 79 transitions. [2018-01-28 23:35:31,797 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 79 transitions. Word has length 35 [2018-01-28 23:35:31,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:31,798 INFO L432 AbstractCegarLoop]: Abstraction has 75 states and 79 transitions. [2018-01-28 23:35:31,798 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 23:35:31,798 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 79 transitions. [2018-01-28 23:35:31,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-28 23:35:31,799 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:31,799 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:31,799 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:31,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1814876332, now seen corresponding path program 1 times [2018-01-28 23:35:31,800 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:31,800 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:31,801 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,801 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:31,801 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:31,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:35:31,812 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:35:32,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:35:32,003 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:35:32,003 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 23:35:32,003 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 23:35:32,003 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 23:35:32,003 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-01-28 23:35:32,003 INFO L87 Difference]: Start difference. First operand 75 states and 79 transitions. Second operand 12 states. [2018-01-28 23:35:32,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:35:32,193 INFO L93 Difference]: Finished difference Result 91 states and 94 transitions. [2018-01-28 23:35:32,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 23:35:32,194 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 35 [2018-01-28 23:35:32,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:35:32,194 INFO L225 Difference]: With dead ends: 91 [2018-01-28 23:35:32,194 INFO L226 Difference]: Without dead ends: 83 [2018-01-28 23:35:32,195 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2018-01-28 23:35:32,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-28 23:35:32,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 71. [2018-01-28 23:35:32,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-01-28 23:35:32,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 74 transitions. [2018-01-28 23:35:32,198 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 74 transitions. Word has length 35 [2018-01-28 23:35:32,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:35:32,198 INFO L432 AbstractCegarLoop]: Abstraction has 71 states and 74 transitions. [2018-01-28 23:35:32,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 23:35:32,198 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 74 transitions. [2018-01-28 23:35:32,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 23:35:32,199 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:35:32,199 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:35:32,199 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation]=== [2018-01-28 23:35:32,200 INFO L82 PathProgramCache]: Analyzing trace with hash 128910148, now seen corresponding path program 1 times [2018-01-28 23:35:32,200 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:35:32,200 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:35:32,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:32,201 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:35:32,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:35:32,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 23:35:32,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-28 23:35:32,260 INFO L389 BasicCegarLoop]: Counterexample might be feasible [2018-01-28 23:35:32,262 INFO L84 mationBacktranslator]: Skipped ATE [405] [405] ULTIMATE.startENTRY-->L1: Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-01-28 23:35:32,262 INFO L84 mationBacktranslator]: Skipped ATE [411] [411] L1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,262 INFO L84 mationBacktranslator]: Skipped ATE [417] [417] mainENTRY-->L554: Formula: (and (<= |v_main_#t~nondet9_1| 2147483647) (<= 0 (+ |v_main_#t~nondet9_1| 2147483648))) InVars {main_#t~nondet9=|v_main_#t~nondet9_1|} OutVars{main_#t~nondet9=|v_main_#t~nondet9_1|} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,262 INFO L84 mationBacktranslator]: Skipped ATE [421] [421] L554-->L554': Formula: (= v_main_~length1~4_1 |v_main_#t~nondet9_2|) InVars {main_#t~nondet9=|v_main_#t~nondet9_2|} OutVars{main_#t~nondet9=|v_main_#t~nondet9_2|, main_~length1~4=v_main_~length1~4_1} AuxVars[] AssignedVars[main_~length1~4] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [425] [425] L554'-->L555: Formula: true InVars {} OutVars{main_#t~nondet9=|v_main_#t~nondet9_3|} AuxVars[] AssignedVars[main_#t~nondet9] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [427] [427] L555-->L555': Formula: (and (<= |v_main_#t~nondet10_1| 2147483647) (<= 0 (+ |v_main_#t~nondet10_1| 2147483648))) InVars {main_#t~nondet10=|v_main_#t~nondet10_1|} OutVars{main_#t~nondet10=|v_main_#t~nondet10_1|} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [429] [429] L555'-->L555'': Formula: (= v_main_~length2~4_1 |v_main_#t~nondet10_2|) InVars {main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~length2~4=v_main_~length2~4_1, main_#t~nondet10=|v_main_#t~nondet10_2|} AuxVars[] AssignedVars[main_~length2~4] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [431] [431] L555''-->L556: Formula: true InVars {} OutVars{main_#t~nondet10=|v_main_#t~nondet10_3|} AuxVars[] AssignedVars[main_#t~nondet10] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [435] [435] L556-->L556'': Formula: (not (< v_main_~length1~4_4 1)) InVars {main_~length1~4=v_main_~length1~4_4} OutVars{main_~length1~4=v_main_~length1~4_4} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [441] [441] L556''-->L559': Formula: (not (< v_main_~length2~4_4 1)) InVars {main_~length2~4=v_main_~length2~4_4} OutVars{main_~length2~4=v_main_~length2~4_4} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [445] [445] L559'-->L562: Formula: (and (= |v_main_#t~malloc11.offset_1| 0) (= |v_#length_3| (store |v_#length_4| |v_main_#t~malloc11.base_1| v_main_~length1~4_5)) (not (= |v_main_#t~malloc11.base_1| 0)) (= (store |v_#valid_8| |v_main_#t~malloc11.base_1| 1) |v_#valid_7|) (= 0 (select |v_#valid_8| |v_main_#t~malloc11.base_1|))) InVars {#length=|v_#length_4|, main_~length1~4=v_main_~length1~4_5, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_1|, main_#t~malloc11.base=|v_main_#t~malloc11.base_1|, main_~length1~4=v_main_~length1~4_5, #valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid, #length, main_#t~malloc11.offset, main_#t~malloc11.base] [2018-01-28 23:35:32,263 INFO L84 mationBacktranslator]: Skipped ATE [447] [447] L562-->L563: Formula: (and (= v_main_~nondetString1~4.offset_1 |v_main_#t~malloc11.offset_2|) (= v_main_~nondetString1~4.base_1 |v_main_#t~malloc11.base_2|)) InVars {main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|} OutVars{main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|, main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_1, main_~nondetString1~4.base=v_main_~nondetString1~4.base_1} AuxVars[] AssignedVars[main_~nondetString1~4.base, main_~nondetString1~4.offset] [2018-01-28 23:35:32,264 INFO L84 mationBacktranslator]: Skipped ATE [449] [449] L563-->L563': Formula: (and (= |v_#length_5| (store |v_#length_6| |v_main_#t~malloc12.base_1| v_main_~length2~4_5)) (not (= 0 |v_main_#t~malloc12.base_1|)) (= (store |v_#valid_10| |v_main_#t~malloc12.base_1| 1) |v_#valid_9|) (= 0 (select |v_#valid_10| |v_main_#t~malloc12.base_1|)) (= 0 |v_main_#t~malloc12.offset_1|)) InVars {main_~length2~4=v_main_~length2~4_5, #length=|v_#length_6|, #valid=|v_#valid_10|} OutVars{main_#t~malloc12.offset=|v_main_#t~malloc12.offset_1|, main_~length2~4=v_main_~length2~4_5, #length=|v_#length_5|, main_#t~malloc12.base=|v_main_#t~malloc12.base_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[main_#t~malloc12.offset, #valid, #length, main_#t~malloc12.base] [2018-01-28 23:35:32,264 INFO L84 mationBacktranslator]: Skipped ATE [451] [451] L563'-->L564: Formula: (and (= v_main_~nondetString2~4.offset_1 |v_main_#t~malloc12.offset_2|) (= v_main_~nondetString2~4.base_1 |v_main_#t~malloc12.base_2|)) InVars {main_#t~malloc12.offset=|v_main_#t~malloc12.offset_2|, main_#t~malloc12.base=|v_main_#t~malloc12.base_2|} OutVars{main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_1, main_#t~malloc12.offset=|v_main_#t~malloc12.offset_2|, main_#t~malloc12.base=|v_main_#t~malloc12.base_2|, main_~nondetString2~4.base=v_main_~nondetString2~4.base_1} AuxVars[] AssignedVars[main_~nondetString2~4.offset, main_~nondetString2~4.base] [2018-01-28 23:35:32,264 INFO L84 mationBacktranslator]: Skipped ATE [453] [453] L564-->L564': Formula: (let ((.cse0 (+ v_main_~length1~4_6 v_main_~nondetString1~4.offset_2))) (and (= 1 (select |v_#valid_11| v_main_~nondetString1~4.base_2)) (<= 1 .cse0) (<= .cse0 (select |v_#length_7| v_main_~nondetString1~4.base_2)) (= |v_#memory_int_part_locs_0_locs_0_1| |v_#memory_int_part_locs_0_locs_0_2|))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_1|, main_~length1~4=v_main_~length1~4_6, main_~nondetString1~4.base=v_main_~nondetString1~4.base_2, #valid=|v_#valid_11|, #length=|v_#length_7|, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_2} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_2|, main_~length1~4=v_main_~length1~4_6, main_~nondetString1~4.base=v_main_~nondetString1~4.base_2, #valid=|v_#valid_11|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_2} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int] [2018-01-28 23:35:32,264 INFO L84 mationBacktranslator]: Skipped ATE [459] [459] L564'-->L565: Formula: (let ((.cse0 (+ v_main_~nondetString2~4.offset_2 v_main_~length2~4_6))) (and (<= .cse0 (select |v_#length_9| v_main_~nondetString2~4.base_2)) (= |v_#memory_int_part_locs_0_locs_0_3| |v_#memory_int_part_locs_0_locs_0_4|) (= (select |v_#valid_13| v_main_~nondetString2~4.base_2) 1) (<= 1 .cse0))) InVars {main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_2, #memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_3|, #valid=|v_#valid_13|, main_~length2~4=v_main_~length2~4_6, #length=|v_#length_9|, main_~nondetString2~4.base=v_main_~nondetString2~4.base_2} OutVars{main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_2, #memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_4|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, main_~length2~4=v_main_~length2~4_6, #length=|v_#length_9|, main_~nondetString2~4.base=v_main_~nondetString2~4.base_2} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int] [2018-01-28 23:35:32,264 INFO L84 mationBacktranslator]: Skipped ATE [465] [465] L565-->L566: Formula: (and (<= |v_main_#t~nondet15_1| 2147483647) (<= 0 (+ |v_main_#t~nondet15_1| 2147483648))) InVars {main_#t~nondet15=|v_main_#t~nondet15_1|} OutVars{main_#t~nondet15=|v_main_#t~nondet15_1|} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,264 INFO L84 mationBacktranslator]: Skipped ATE [469] [469] L566-->cstrncmpENTRY: Formula: (and (= |v_cstrncmp_#in~s2.offsetInParam_1| v_main_~nondetString2~4.offset_5) (= |v_cstrncmp_#in~s1.baseInParam_1| v_main_~nondetString1~4.base_6) (= |v_cstrncmp_#in~nInParam_1| |v_main_#t~nondet15_4|) (= |v_cstrncmp_#in~s1.offsetInParam_1| v_main_~nondetString1~4.offset_5) (= |v_cstrncmp_#in~s2.baseInParam_1| v_main_~nondetString2~4.base_6)) InVars {main_~nondetString2~4.offset=v_main_~nondetString2~4.offset_5, main_#t~nondet15=|v_main_#t~nondet15_4|, main_~nondetString1~4.offset=v_main_~nondetString1~4.offset_5, main_~nondetString1~4.base=v_main_~nondetString1~4.base_6, main_~nondetString2~4.base=v_main_~nondetString2~4.base_6} OutVars{cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.baseInParam_1|, cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offsetInParam_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.baseInParam_1|, cstrncmp_#in~n=|v_cstrncmp_#in~nInParam_1|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offsetInParam_1|} AuxVars[] AssignedVars[cstrncmp_#in~s2.base, cstrncmp_#in~s1.offset, cstrncmp_#in~s1.base, cstrncmp_#in~n, cstrncmp_#in~s2.offset] [2018-01-28 23:35:32,265 INFO L84 mationBacktranslator]: Skipped ATE [473] [473] cstrncmpENTRY-->L540: Formula: (and (= v_cstrncmp_~s1.base_1 |v_cstrncmp_#in~s1.base_1|) (= v_cstrncmp_~s1.offset_1 |v_cstrncmp_#in~s1.offset_1|)) InVars {cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offset_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.base_1|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_1, cstrncmp_~s1.base=v_cstrncmp_~s1.base_1, cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offset_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.base_1|} AuxVars[] AssignedVars[cstrncmp_~s1.offset, cstrncmp_~s1.base] [2018-01-28 23:35:32,265 INFO L84 mationBacktranslator]: Skipped ATE [477] [477] L540-->L540': Formula: (and (= v_cstrncmp_~s2.offset_1 |v_cstrncmp_#in~s2.offset_1|) (= v_cstrncmp_~s2.base_1 |v_cstrncmp_#in~s2.base_1|)) InVars {cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.base_1|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offset_1|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_1, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_1, cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.base_1|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offset_1|} AuxVars[] AssignedVars[cstrncmp_~s2.base, cstrncmp_~s2.offset] [2018-01-28 23:35:32,265 INFO L84 mationBacktranslator]: Skipped ATE [481] [481] L540'-->L543: Formula: (= v_cstrncmp_~n_1 |v_cstrncmp_#in~n_1|) InVars {cstrncmp_#in~n=|v_cstrncmp_#in~n_1|} OutVars{cstrncmp_~n=v_cstrncmp_~n_1, cstrncmp_#in~n=|v_cstrncmp_#in~n_1|} AuxVars[] AssignedVars[cstrncmp_~n] [2018-01-28 23:35:32,265 INFO L84 mationBacktranslator]: Skipped ATE [487] [487] L543-->L545''': Formula: (not (= 0 (mod v_cstrncmp_~n_3 4294967296))) InVars {cstrncmp_~n=v_cstrncmp_~n_3} OutVars{cstrncmp_~n=v_cstrncmp_~n_3} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,265 INFO L84 mationBacktranslator]: Skipped ATE [493] [493] L545'''-->L546: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,265 INFO L84 mationBacktranslator]: Skipped ATE [501] [501] L546-->L546': Formula: (and (= 1 (select |v_#valid_21| v_cstrncmp_~s1.base_2)) (<= 0 v_cstrncmp_~s1.offset_2) (= (select (select |v_#memory_int_part_locs_0_locs_0_5| v_cstrncmp_~s1.base_2) v_cstrncmp_~s1.offset_2) |v_cstrncmp_#t~mem2_1|) (<= (+ v_cstrncmp_~s1.offset_2 1) (select |v_#length_11| v_cstrncmp_~s1.base_2))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_2, cstrncmp_~s1.base=v_cstrncmp_~s1.base_2, #length=|v_#length_11|, #valid=|v_#valid_21|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_2, cstrncmp_~s1.base=v_cstrncmp_~s1.base_2, #valid=|v_#valid_21|, #length=|v_#length_11|, cstrncmp_#t~mem2=|v_cstrncmp_#t~mem2_1|} AuxVars[] AssignedVars[cstrncmp_#t~mem2] [2018-01-28 23:35:32,266 INFO L84 mationBacktranslator]: Skipped ATE [511] [511] L546'-->L546'': Formula: (and (= |v_cstrncmp_#t~post1.base_1| v_cstrncmp_~s2.base_2) (= |v_cstrncmp_#t~post1.offset_1| v_cstrncmp_~s2.offset_2)) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_2, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_2} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_2, cstrncmp_#t~post1.offset=|v_cstrncmp_#t~post1.offset_1|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_2, cstrncmp_#t~post1.base=|v_cstrncmp_#t~post1.base_1|} AuxVars[] AssignedVars[cstrncmp_#t~post1.offset, cstrncmp_#t~post1.base] [2018-01-28 23:35:32,266 INFO L84 mationBacktranslator]: Skipped ATE [515] [515] L546''-->L546''': Formula: (and (= v_cstrncmp_~s2.offset_3 (+ |v_cstrncmp_#t~post1.offset_2| 1)) (= v_cstrncmp_~s2.base_3 |v_cstrncmp_#t~post1.base_2|)) InVars {cstrncmp_#t~post1.offset=|v_cstrncmp_#t~post1.offset_2|, cstrncmp_#t~post1.base=|v_cstrncmp_#t~post1.base_2|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_3, cstrncmp_#t~post1.offset=|v_cstrncmp_#t~post1.offset_2|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_3, cstrncmp_#t~post1.base=|v_cstrncmp_#t~post1.base_2|} AuxVars[] AssignedVars[cstrncmp_~s2.base, cstrncmp_~s2.offset] [2018-01-28 23:35:32,266 INFO L84 mationBacktranslator]: Skipped ATE [521] [521] L546'''-->L546'''': Formula: (and (<= 0 |v_cstrncmp_#t~post1.offset_3|) (= |v_cstrncmp_#t~mem3_1| (select (select |v_#memory_int_part_locs_0_locs_0_6| |v_cstrncmp_#t~post1.base_3|) |v_cstrncmp_#t~post1.offset_3|)) (<= (+ |v_cstrncmp_#t~post1.offset_3| 1) (select |v_#length_13| |v_cstrncmp_#t~post1.base_3|)) (= 1 (select |v_#valid_23| |v_cstrncmp_#t~post1.base_3|))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_6|, cstrncmp_#t~post1.offset=|v_cstrncmp_#t~post1.offset_3|, #length=|v_#length_13|, cstrncmp_#t~post1.base=|v_cstrncmp_#t~post1.base_3|, #valid=|v_#valid_23|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_6|, cstrncmp_#t~post1.offset=|v_cstrncmp_#t~post1.offset_3|, cstrncmp_#t~post1.base=|v_cstrncmp_#t~post1.base_3|, #valid=|v_#valid_23|, #length=|v_#length_13|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_1|} AuxVars[] AssignedVars[cstrncmp_#t~mem3] [2018-01-28 23:35:32,266 INFO L84 mationBacktranslator]: Skipped ATE [529] [529] L546''''-->L546'''''''': Formula: (= |v_cstrncmp_#t~mem2_4| |v_cstrncmp_#t~mem3_4|) InVars {cstrncmp_#t~mem2=|v_cstrncmp_#t~mem2_4|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_4|} OutVars{cstrncmp_#t~mem2=|v_cstrncmp_#t~mem2_4|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_4|} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,266 INFO L84 mationBacktranslator]: Skipped ATE [533] [533] L546''''''''-->L546''''''''': Formula: true InVars {} OutVars{cstrncmp_#t~mem2=|v_cstrncmp_#t~mem2_5|} AuxVars[] AssignedVars[cstrncmp_#t~mem2] [2018-01-28 23:35:32,266 INFO L84 mationBacktranslator]: Skipped ATE [537] [537] L546'''''''''-->L546'''''''''': Formula: true InVars {} OutVars{cstrncmp_#t~post1.offset=|v_cstrncmp_#t~post1.offset_6|, cstrncmp_#t~post1.base=|v_cstrncmp_#t~post1.base_7|} AuxVars[] AssignedVars[cstrncmp_#t~post1.offset, cstrncmp_#t~post1.base] [2018-01-28 23:35:32,266 INFO L84 mationBacktranslator]: Skipped ATE [541] [541] L546''''''''''-->L548: Formula: true InVars {} OutVars{cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_5|} AuxVars[] AssignedVars[cstrncmp_#t~mem3] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [549] [549] L548-->L548': Formula: (and (= |v_cstrncmp_#t~post7.offset_1| v_cstrncmp_~s1.offset_6) (= |v_cstrncmp_#t~post7.base_1| v_cstrncmp_~s1.base_8)) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_6, cstrncmp_~s1.base=v_cstrncmp_~s1.base_8} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_6, cstrncmp_~s1.base=v_cstrncmp_~s1.base_8, cstrncmp_#t~post7.base=|v_cstrncmp_#t~post7.base_1|, cstrncmp_#t~post7.offset=|v_cstrncmp_#t~post7.offset_1|} AuxVars[] AssignedVars[cstrncmp_#t~post7.base, cstrncmp_#t~post7.offset] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [553] [553] L548'-->L548'': Formula: (and (= v_cstrncmp_~s1.offset_7 (+ |v_cstrncmp_#t~post7.offset_2| 1)) (= v_cstrncmp_~s1.base_9 |v_cstrncmp_#t~post7.base_2|)) InVars {cstrncmp_#t~post7.base=|v_cstrncmp_#t~post7.base_2|, cstrncmp_#t~post7.offset=|v_cstrncmp_#t~post7.offset_2|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_7, cstrncmp_~s1.base=v_cstrncmp_~s1.base_9, cstrncmp_#t~post7.base=|v_cstrncmp_#t~post7.base_2|, cstrncmp_#t~post7.offset=|v_cstrncmp_#t~post7.offset_2|} AuxVars[] AssignedVars[cstrncmp_~s1.offset, cstrncmp_~s1.base] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [557] [557] L548''-->L548''': Formula: (and (<= 0 |v_cstrncmp_#t~post7.offset_3|) (= (select (select |v_#memory_int_part_locs_0_locs_0_8| |v_cstrncmp_#t~post7.base_3|) |v_cstrncmp_#t~post7.offset_3|) |v_cstrncmp_#t~mem8_1|) (<= (+ |v_cstrncmp_#t~post7.offset_3| 1) (select |v_#length_19| |v_cstrncmp_#t~post7.base_3|)) (= (select |v_#valid_29| |v_cstrncmp_#t~post7.base_3|) 1)) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_8|, #length=|v_#length_19|, cstrncmp_#t~post7.base=|v_cstrncmp_#t~post7.base_3|, #valid=|v_#valid_29|, cstrncmp_#t~post7.offset=|v_cstrncmp_#t~post7.offset_3|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_8|, cstrncmp_#t~mem8=|v_cstrncmp_#t~mem8_1|, cstrncmp_#t~post7.base=|v_cstrncmp_#t~post7.base_3|, #valid=|v_#valid_29|, #length=|v_#length_19|, cstrncmp_#t~post7.offset=|v_cstrncmp_#t~post7.offset_3|} AuxVars[] AssignedVars[cstrncmp_#t~mem8] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [571] [571] L548'''-->L548'''''': Formula: (not (= 0 |v_cstrncmp_#t~mem8_4|)) InVars {cstrncmp_#t~mem8=|v_cstrncmp_#t~mem8_4|} OutVars{cstrncmp_#t~mem8=|v_cstrncmp_#t~mem8_4|} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [577] [577] L548''''''-->L548''''''': Formula: true InVars {} OutVars{cstrncmp_#t~post7.base=|v_cstrncmp_#t~post7.base_7|, cstrncmp_#t~post7.offset=|v_cstrncmp_#t~post7.offset_6|} AuxVars[] AssignedVars[cstrncmp_#t~post7.base, cstrncmp_#t~post7.offset] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [583] [583] L548'''''''-->L545: Formula: true InVars {} OutVars{cstrncmp_#t~mem8=|v_cstrncmp_#t~mem8_5|} AuxVars[] AssignedVars[cstrncmp_#t~mem8] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [587] [587] L545-->L550: Formula: (= |v_cstrncmp_#t~pre0_1| (+ v_cstrncmp_~n_4 (- 1))) InVars {cstrncmp_~n=v_cstrncmp_~n_4} OutVars{cstrncmp_#t~pre0=|v_cstrncmp_#t~pre0_1|, cstrncmp_~n=v_cstrncmp_~n_4} AuxVars[] AssignedVars[cstrncmp_#t~pre0] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [591] [591] L550-->L545': Formula: (= v_cstrncmp_~n_5 (+ v_cstrncmp_~n_6 (- 1))) InVars {cstrncmp_~n=v_cstrncmp_~n_6} OutVars{cstrncmp_~n=v_cstrncmp_~n_5} AuxVars[] AssignedVars[cstrncmp_~n] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [595] [595] L545'-->L550'': Formula: (not (= 0 (mod |v_cstrncmp_#t~pre0_4| 4294967296))) InVars {cstrncmp_#t~pre0=|v_cstrncmp_#t~pre0_4|} OutVars{cstrncmp_#t~pre0=|v_cstrncmp_#t~pre0_4|} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [599] [599] L550''-->L545''': Formula: true InVars {} OutVars{cstrncmp_#t~pre0=|v_cstrncmp_#t~pre0_5|} AuxVars[] AssignedVars[cstrncmp_#t~pre0] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [493] [493] L545'''-->L546: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,267 INFO L84 mationBacktranslator]: Skipped ATE [505] [505] L546-->cstrncmpErr1RequiresViolation: Formula: (or (not (<= 0 v_cstrncmp_~s1.offset_3)) (not (<= (+ v_cstrncmp_~s1.offset_3 1) (select |v_#length_12| v_cstrncmp_~s1.base_4)))) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_4, #length=|v_#length_12|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_4, #length=|v_#length_12|} AuxVars[] AssignedVars[] [2018-01-28 23:35:32,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:35:32 BasicIcfg [2018-01-28 23:35:32,272 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 23:35:32,273 INFO L168 Benchmark]: Toolchain (without parser) took 41735.00 ms. Allocated memory was 308.3 MB in the beginning and 2.3 GB in the end (delta: 2.0 GB). Free memory was 268.2 MB in the beginning and 1.8 GB in the end (delta: -1.5 GB). Peak memory consumption was 432.7 MB. Max. memory is 5.3 GB. [2018-01-28 23:35:32,274 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 308.3 MB. Free memory is still 274.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 23:35:32,274 INFO L168 Benchmark]: CACSL2BoogieTranslator took 231.47 ms. Allocated memory is still 308.3 MB. Free memory was 267.2 MB in the beginning and 256.9 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB. [2018-01-28 23:35:32,274 INFO L168 Benchmark]: Boogie Preprocessor took 39.07 ms. Allocated memory is still 308.3 MB. Free memory was 256.9 MB in the beginning and 255.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 23:35:32,274 INFO L168 Benchmark]: RCFGBuilder took 363.13 ms. Allocated memory is still 308.3 MB. Free memory was 255.0 MB in the beginning and 231.9 MB in the end (delta: 23.0 MB). Peak memory consumption was 23.0 MB. Max. memory is 5.3 GB. [2018-01-28 23:35:32,275 INFO L168 Benchmark]: IcfgTransformer took 38184.57 ms. Allocated memory was 308.3 MB in the beginning and 2.3 GB in the end (delta: 2.0 GB). Free memory was 231.9 MB in the beginning and 2.2 GB in the end (delta: -2.0 GB). Peak memory consumption was 676.5 MB. Max. memory is 5.3 GB. [2018-01-28 23:35:32,275 INFO L168 Benchmark]: TraceAbstraction took 2907.28 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 390.7 MB). Peak memory consumption was 390.7 MB. Max. memory is 5.3 GB. [2018-01-28 23:35:32,277 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 308.3 MB. Free memory is still 274.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 231.47 ms. Allocated memory is still 308.3 MB. Free memory was 267.2 MB in the beginning and 256.9 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 39.07 ms. Allocated memory is still 308.3 MB. Free memory was 256.9 MB in the beginning and 255.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 363.13 ms. Allocated memory is still 308.3 MB. Free memory was 255.0 MB in the beginning and 231.9 MB in the end (delta: 23.0 MB). Peak memory consumption was 23.0 MB. Max. memory is 5.3 GB. * IcfgTransformer took 38184.57 ms. Allocated memory was 308.3 MB in the beginning and 2.3 GB in the end (delta: 2.0 GB). Free memory was 231.9 MB in the beginning and 2.2 GB in the end (delta: -2.0 GB). Peak memory consumption was 676.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 2907.28 ms. Allocated memory is still 2.3 GB. Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 390.7 MB). Peak memory consumption was 390.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 84 LocStat_MAX_WEQGRAPH_SIZE : 5 LocStat_MAX_SIZEOF_WEQEDGELABEL : 3 LocStat_NO_SUPPORTING_EQUALITIES : 1375 LocStat_NO_SUPPORTING_DISEQUALITIES : 607 LocStat_NO_DISJUNCTIONS : -168 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 110 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 125 TransStat_NO_SUPPORTING_DISEQUALITIES : 16 TransStat_NO_DISJUNCTIONS : 116 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 1.933444 RENAME_VARIABLES(MILLISECONDS) : 0.009823 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 1.314849 PROJECTAWAY(MILLISECONDS) : 0.735650 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.044744 DISJOIN(MILLISECONDS) : 0.239994 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.019003 ADD_EQUALITY(MILLISECONDS) : 0.027746 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.009157 #CONJOIN_DISJUNCTIVE : 938 #RENAME_VARIABLES : 2127 #UNFREEZE : 0 #CONJOIN : 1386 #PROJECTAWAY : 1319 #ADD_WEAK_EQUALITY : 11 #DISJOIN : 361 #RENAME_VARIABLES_DISJUNCTIVE : 2065 #ADD_EQUALITY : 127 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 14 * Results from de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation: - StatisticsResult: HeapSeparatorStatistics COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_0 : 1 COUNT_BLOCKS_for_[#memory_int]_at_dim_0 : 1 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_1 : 1 COUNT_BLOCKS_for_[#memory_int]_at_dim_1 : 1 COUNT_ARRAY_READS for [#memory_int] : 7 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: pointer dereference may fail pointer dereference may fail We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 92 locations, 15 error locations. UNSAFE Result, 2.8s OverallTime, 14 OverallIterations, 2 TraceHistogramMax, 1.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 924 SDtfs, 931 SDslu, 2176 SDs, 0 SdLazy, 1051 SolverSat, 60 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 107 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=94occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 13 MinimizatonAttempts, 45 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 372 NumberOfCodeBlocks, 372 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 316 ConstructedInterpolants, 0 QuantifiedInterpolants, 37273 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 13 InterpolantComputations, 13 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-01-28_23-35-32-283.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-VPDomainBenchmark-0-2018-01-28_23-35-32-283.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-0-2018-01-28_23-35-32-283.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-HeapSeparatorBenchmark-0-2018-01-28_23-35-32-283.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/openbsd_cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_23-35-32-283.csv Received shutdown request...